Release U-Boot 1.1.6

Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Signed-off-by: Stefan Roese <sr@denx.de>

COPYING

@@ -2,10 +2,17 @@
 applications that use U-Boot services by means of the jump table
 provided by U-Boot exactly for this purpose - this is merely
 considered normal use of U-Boot, and does *not* fall under the
-heading of "derived work". Also note that the GPL below is
-copyrighted by the Free Software Foundation, but the instance of code
-that it refers to (the U-Boot source code) is copyrighted by me and
-others who actually wrote it. -- Wolfgang Denk
+heading of "derived work".
+
+  The header files "include/image.h" and "include/asm-*/u-boot.h"
+define interfaces to U-Boot. Including these (unmodified) header
+files in another file is considered normal use of U-Boot, and does
+*not* fall under the heading of "derived work".
+
+  Also note that the GPL below is copyrighted by the Free Software
+Foundation, but the instance of code that it refers to (the U-Boot
+source code) is copyrighted by me and others who actually wrote it.
+-- Wolfgang Denk
 
 =======================================================================
 

CREDITS

@@ -29,6 +29,7 @@ D: ERIC Support
 N: Pantelis Antoniou
 E: panto@intracom.gr
 D: NETVIA & NETPHONE board support, ARTOS support.
+D: Support for Silicon Turnkey eXpress XTc
 
 N: Pierre Aubert
 E: <p.aubert@staubli.com>
@@ -64,6 +65,12 @@ N: Raphael Bossek
 E: raphael.bossek@solutions4linux.de
 D: 8xxrom-0.3.0
 
+N: Cliff Brake
+E: cliff.brake@gmail.com
+D: Port to Vibren PXA255 IDP platform
+W: http://www.vibren.com
+W: http://bec-systems.com
+
 N: Rick Bronson
 E: rick@efn.org
 D: Atmel AT91RM9200DK and NAND support
@@ -98,6 +105,10 @@ N: Magnus Damm
 E: damm@opensource.se
 D: 8xxrom
 
+N: Richard Danter
+E: richard.danter@windriver.com
+D: Support for Wind River PPMC 7xx/74xx boards
+
 N: George G. Davis
 E: gdavis@mvista.com
 D: Board ports for ADS GraphicsClient+ and Intel Assabet
@@ -198,10 +209,9 @@ D: Support for Samsung ARM920T S3C2400X, ARM920T "TRAB"
 W: www.denx.de
 
 N: Murray Jensen
-E: Murray.Jensen@cmst.csiro.au
+E: Murray.Jensen@csiro.au
 D: Initial 8260 support; GDB support
 D: Port to Cogent+Hymod boards; Hymod Board Database
-W: http://www.msa.cmst.csiro.au/ourstaff/MurrayJensen/mjj.html
 
 N: Yoo. Jonghoon
 E: yooth@ipone.co.kr
@@ -223,6 +233,7 @@ D: Port to Windriver ppmc8260 board
 N: Sangmoon Kim
 E: dogoil@etinsys.com
 D: Support for debris board
+D: Support for KVME080 board
 
 N: Frederick W. Klatt
 E: fred.klatt@windriver.com
@@ -247,7 +258,12 @@ D  Support for Intrinsyc CERF PXA250 board.
 
 N: Thomas Lange
 E: thomas@corelatus.se
-D: Support for GTH and dbau1x00 boards; lots of PCMCIA fixes
+D: Support for GTH, GTH2 and dbau1x00 boards; lots of PCMCIA fixes
+
+N: Marc Leeman
+E: marc.leeman@barco.com
+D: Support for Barco Streaming Video Card (SVC) and Sample Compress Network (SCN)
+W: www.barco.com
 
 N: The LEOX team
 E: team@leox.org
@@ -269,8 +285,9 @@ E: lo@routefree.com
 D: Support for DOS partitions
 
 N: Dan Malek
-E: dan@netx4.com
+E: dan@embeddedalley.com
 D: FADSROM, the grandfather of all of this
+D: Support for Silicon Turnkey eXpress XTc
 
 N: Andrea "llandre" Marson
 E: andrea.marson@dave-tech.it
@@ -305,6 +322,10 @@ E: rof@sysgo.de
 D: Initial support for SSV-DNP1110, SMC91111 driver
 W: www.elinos.com
 
+N: John Otken
+E: jotken@softadvances.com
+D: Support for AMCC Luan 440SP board
+
 N: Tolunay Orkun
 E: torkun@nextio.com
 D: Support for Cogent CSB272 & CSB472 boards
@@ -339,7 +360,7 @@ W: http://www.windriver.com
 
 N: Stefan Roese
 E: stefan.roese@esd-electronics.com
-D: IBM PPC401/403/405GP Support; Windows environment support
+D: AMCC PPC401/403/405GP Support; Windows environment support
 
 N: Erwin Rol
 E: erwin@muffin.org
@@ -355,7 +376,7 @@ D: Author of LiMon-1.4.2, which contributed some ideas
 
 N: Travis B. Sawyer
 E: travis.sawyer@sandburst.com
-D: Support for IBM PPC440GX, XES XPedite1000 440GX PrPMC board.  IBM 440gx Ref Platform (Ocotea)
+D: Support for AMCC PPC440GX, XES XPedite1000 440GX PrPMC board.  AMCC 440gx Ref Platform (Ocotea)
 
 N: Paolo Scaffardi
 E: arsenio@tin.it
@@ -365,6 +386,14 @@ N: Robert Schwebel
 E: r.schwebel@pengutronix.de
 D: Support for csb226, logodl and innokom boards (PXA2xx)
 
+N: Aaron Sells
+E: sellsa@embeddedplanet.com
+D: Support for EP82xxM
+
+N: Art Shipkowski
+E: art@videon-central.com
+D: Support for NetSilicon NS7520
+
 N: Yasushi Shoji
 E: yashi@atmark-techno.com
 D: Support for Xilinx MicroBlaze, for Atmark Techno SUZAKU FPGA board
@@ -431,3 +460,8 @@ N: Alex Zuepke
 E: azu@sysgo.de
 D: Overall improvements on StrongARM, ARM720TDMI; Support for Tuxscreen; initial PCMCIA support for ARM
 W: www.elinos.com
+
+N: James MacAulay
+E: james.macaulay@amirix.com
+D: Suppport for Amirix AP1000
+W: www.amirix.com

MAINTAINERS

@@ -27,11 +27,15 @@ Pantelis Antoniou <panto@intracom.gr>
 
 Reinhard Arlt <reinhard.arlt@esd-electronics.com>
 
+	cpci5200		MPC5200
+	pf5200			MPC5200
+
 	CPCI750			PPC750FX/GX
 
 Yuli Barcohen <yuli@arabellasw.com>
 
 	Adder			MPC87x/MPC852T
+	ep8248			MPC8248
 	ISPAN			MPC8260
 	MPC8260ADS		MPC826x/MPC827x/MPC8280
 	Rattler			MPC8248
@@ -41,10 +45,6 @@ Jerry Van Baren <gerald.vanbaren@smiths-aerospace.com>
 
 	sacsng			MPC8260
 
-Rick Bronson <rick@efn.org>
-
-	AT91RM9200DK		at91rm9200
-
 Oliver Brown <obrown@adventnetworks.com>
 
 	gw8260			MPC8260
@@ -129,107 +129,6 @@ Thomas Frieden <ThomasF@hyperion-entertainment.com>
 
 	AmigaOneG3SE		MPC7xx
 
-Frank Gottschling <fgottschling@eltec.de>
-
-	MHPC			MPC8xx
-
-	BAB7xx			MPC740/MPC750
-
-Wolfgang Grandegger <wg@denx.de>
-
-	CCM			MPC855
-
-	PN62			MPC8240
-
-	IPHASE4539		MPC8260
-	SCM			MPC8260
-
-Howard Gray <mvsensor@matrix-vision.de>
-
-	MVS1			MPC823
-
-Bill Hargen <Bill_Hargen@Jabil.com>
-
-	BUBINGA405EP		PPC405EP
-
-Klaus Heydeck <heydeck@kieback-peter.de>
-
-	KUP4K			MPC855
-	KUP4X			MPC859
-
-Murray Jensen <Murray.Jensen@cmst.csiro.au>
-
-	cogent_mpc8xx		MPC8xx
-
-	cogent_mpc8260		MPC8260
-	hymod			MPC8260
-
-Brad Kemp <Brad.Kemp@seranoa.com>
-
-	ppmc8260		MPC8260
-
-Sangmoon Kim <dogoil@etinsys.com>
-
-	debris			MPC8245
-
-Nye Liu <nyet@zumanetworks.com>
-
-	ZUMA			MPC7xx_74xx
-
-Thomas Lange <thomas@corelatus.se>
-
-	GTH			MPC860
-
-The LEOX team <team@leox.org>
-
-	ELPT860			MPC860T
-
-Eran Man <eran@nbase.co.il>
-
-	EVB64260_750CX		MPC750CX
-
-Andrea "llandre" Marson <andrea.marson@dave-tech.it>
-
-	PPChameleonEVB	PPC405EP
-
-Reinhard Meyer <r.meyer@emk-elektronik.de>
-
-	TOP860			MPC860T
-	TOP5200			MPC5200
-
-Scott McNutt <smcnutt@artesyncp.com>
-
-	EBONY			PPC440GP
-
-Tolunay Orkun <torkun@nextio.com>
-	csb272			PPC405GP
-	csb472			PPC405GP
-
-Keith Outwater <Keith_Outwater@mvis.com>
-
-	GEN860T			MPC860T
-	GEN860T_SC		MPC860T
-
-Frank Panno <fpanno@delphintech.com>
-
-	ep8260			MPC8260
-
-Peter Pearse <peter.pearse@arm.com>
-
-	Integrator/AP		CM 926EJ-S, CM7x0T, CM9x0T
-	Integrator/CP		CM 926EJ-S  CM920T, CM940T, CM922T-XA10
-	Versatile/AB		ARM926EJ-S
-	Versatile/PB		ARM926EJ-S
-
-Denis Peter <d.peter@mpl.ch>
-
-	MIP405			PPC4xx
-	PIP405			PPC4xx
-
-Daniel Poirot <dan.poirot@windriver.com>
-	sbc8240			MPC8240
-	sbc405			PPC405GP
-
 Matthias Fuchs <matthias.fuchs@esd-electronics.com>
 
 	ADCIOP			IOP480 (PPC401)
@@ -237,6 +136,7 @@ Matthias Fuchs <matthias.fuchs@esd-electronics.com>
 	AR405			PPC405GP
 	ASH405			PPC405EP
 	CANBT			PPC405CR
+	CPCI2DP			PPC405GP
 	CPCI405			PPC405GP
 	CPCI4052		PPC405GP
 	CPCI405AB		PPC405GP
@@ -257,11 +157,151 @@ Matthias Fuchs <matthias.fuchs@esd-electronics.com>
 	VOH405			PPC405EP
 	VOM405			PPC405EP
 	WUH405			PPC405EP
+	CMS700                  PPC405EP
+
+Frank Gottschling <fgottschling@eltec.de>
+
+	MHPC			MPC8xx
+
+	BAB7xx			MPC740/MPC750
+
+Wolfgang Grandegger <wg@denx.de>
+
+	CCM			MPC855
+
+	PN62			MPC8240
+
+	IPHASE4539		MPC8260
+	SCM			MPC8260
+
+Howard Gray <mvsensor@matrix-vision.de>
+
+	MVS1			MPC823
+
+Klaus Heydeck <heydeck@kieback-peter.de>
+
+	KUP4K			MPC855
+	KUP4X			MPC859
+
+Murray Jensen <Murray.Jensen@csiro.au>
+
+	cogent_mpc8xx		MPC8xx
+
+	cogent_mpc8260		MPC8260
+	hymod			MPC8260
+
+Brad Kemp <Brad.Kemp@seranoa.com>
+
+	ppmc8260		MPC8260
+
+Sangmoon Kim <dogoil@etinsys.com>
+
+	debris			MPC8245
+	KVME080			MPC8245
+
+Thomas Lange <thomas@corelatus.se>
+
+	GTH			MPC860
+
+The LEOX team <team@leox.org>
+
+	ELPT860			MPC860T
+
+Nye Liu <nyet@zumanetworks.com>
+
+	ZUMA			MPC7xx_74xx
+
+Jon Loeliger <jdl@freescale.com>
+
+	MPC8540ADS		MPC8540
+	MPC8560ADS		MPC8560
+	MPC8541CDS		MPC8541
+	MPC8555CDS		MPC8555
+
+	MPC8641HPCN		MPC8641D
+
+Dan Malek <dan@embeddededge.com>
+
+	STxGP3			MPC85xx
+	STxXTc			MPC8xx
+
+Eran Man <eran@nbase.co.il>
+
+	EVB64260_750CX		MPC750CX
+
+Andrea "llandre" Marson <andrea.marson@dave-tech.it>
+
+	PPChameleonEVB	PPC405EP
+
+Reinhard Meyer <r.meyer@emk-elektronik.de>
+
+	TOP860			MPC860T
+	TOP5200			MPC5200
+
+Tolunay Orkun <torkun@nextio.com>
+
+	csb272			PPC405GP
+	csb472			PPC405GP
+
+John Otken <jotken@softadvances.com>
+
+	luan			PPC440SP
+
+Keith Outwater <Keith_Outwater@mvis.com>
+
+	GEN860T			MPC860T
+	GEN860T_SC		MPC860T
+
+Frank Panno <fpanno@delphintech.com>
+
+	ep8260			MPC8260
+
+Peter Pearse <peter.pearse@arm.com>
+	integratorcp		All current ARM supplied &
+				supported core modules
+				- see http://www.arm.com
+				/products/DevTools
+				/Hardware_Platforms.html
+	versatile		ARM926EJ-S
+	versatile		ARM926EJ-S
+
+Denis Peter <d.peter@mpl.ch>
+
+	MIP405			PPC4xx
+	PIP405			PPC4xx
+
+Daniel Poirot <dan.poirot@windriver.com>
+
+	sbc8240			MPC8240
+	sbc405			PPC405GP
+
+Stefan Roese <sr@denx.de>
+
+	uc100			MPC857
+
+	TQM85xx			MPC8540/8541/8555/8560
+
+	bamboo			PPC440EP
+	bunbinga		PPC405EP
+	ebony			PPC440GP
+	ocotea			PPC440GX
+	p3p440			PPC440GP
+	pcs440ep		PPC440EP
+	sequoia			PPC440EPx
+	sycamore		PPC405GPr
+	walnut			PPC405GP
+	yellowstone		PPC440GR
+	yosemite		PPC440EP
+
+Yusdi Santoso <yusdi_santoso@adaptec.com>
+
+	HIDDEN_DRAGON	MPC8241/MPC8245
 
 Travis Sawyer (travis.sawyer@sandburst.com>
 
+	KAREF			PPC440GX
+	METROBOX		PPC440GX
 	XPEDITE1K		PPC440GX
-	OCOTEA			PPC440GX
 
 Peter De Schrijver <p2@mind.be>
 
@@ -281,6 +321,11 @@ Rune Torgersen <runet@innovsys.com>
 
 	MPC8266ADS		MPC8266
 
+
+David Updegraff <dave@cray.com>
+
+	CRAYL1			PPC4xx
+
 Josef Wagner <Wagner@Microsys.de>
 
 	CPC45			MPC8245
@@ -294,21 +339,6 @@ John Zhan <zhanz@sinovee.com>
 
 	svm_sc8xx		MPC8xx
 
-Jon Loeliger <jdl@freescale.com>
-
-	MPC8540ADS		MPC8540
-	MPC8560ADS		MPC8560
-	MPC8541CDS		MPC8541
-	MPC8555CDS		MPC8555
-
-Dan Malek <dan@embeddededge.com>
-
-	STxGP3			MPC85xx
-
-Yusdi Santoso <yusdi_santoso@adaptec.com>
-
-	HIDDEN_DRAGON	MPC8241/MPC8245
-
 -------------------------------------------------------------------------
 
 Unknown / orphaned boards:
@@ -325,9 +355,7 @@ Unknown / orphaned boards:
 	RPXClassic		MPC8xx
 	RPXlite			MPC8xx
 
-	CRAYL1			PPC4xx
 	ERIC			PPC4xx
-	WALNUT405		PPC4xx
 
 	MOUSSE			MPC824x
 
@@ -344,6 +372,22 @@ Unknown / orphaned boards:
 #	Board			CPU					#
 #########################################################################
 
+Rowel Atienza <rowel@diwalabs.com>
+
+	armadillo		ARM720T
+
+Rishi Bhattacharya <rishi@ti.com>
+
+	omap5912osk		ARM926EJS
+
+Cliff Brake <cliff.brake@gmail.com>
+
+	pxa255_idp		xscale
+
+Rick Bronson <rick@efn.org>
+
+	AT91RM9200DK		at91rm9200
+
 George G. Davis <gdavis@mvista.com>
 
 	assabet			SA1100
@@ -362,6 +406,11 @@ Marius Gr
 	impa7			ARM720T (EP7211)
 	ep7312			ARM720T (EP7312)
 
+Kshitij Gupta <kshitij@ti.com>
+
+	omap1510inn		ARM925T
+	omap1610inn		ARM926EJS
+
 Kyle Harris <kharris@nexus-tech.net>
 
 	lubbock			xscale
@@ -373,29 +422,13 @@ Gary Jennejohn <gj@denx.de>
 	smdk2400		ARM920T
 	trab			ARM920T
 
-Prakash Kumar <prakash@embedx.com>
-
-	cerf250			xscale
-
-Kshitij Gupta <kshitij@ti.com>
-
-	omap1510inn		ARM925T
-	omap1610inn		ARM926EJS
-
-Dave Peverley <dpeverley@mpc-data.co.uk>
-	omap730p2		ARM926EJS
-
 Nishant Kamat <nskamat@ti.com>
 
 	omap1610h2		ARM926EJS
 
-Rishi Bhattacharya <rishi@ti.com>
+Prakash Kumar <prakash@embedx.com>
 
-	omap5912osk		ARM926EJS
-
-Richard Woodruff <r-woodruff2@ti.com>
-
-	omap2420h4		ARM1136EJS
+	cerf250			xscale
 
 David M<>ller <d.mueller@elsoft.ch>
 
@@ -406,6 +439,15 @@ Rolf Offermanns <rof@sysgo.de>
 
 	shannon			SA1100
 
+Dave Peverley <dpeverley@mpc-data.co.uk>
+
+	omap730p2		ARM926EJS
+
+Stefan Roese <sr@denx.de>
+
+	ixdpg425		xscale
+	pdnb3			xscale
+
 Robert Schwebel <r.schwebel@pengutronix.de>
 
 	csb226			xscale
@@ -413,7 +455,7 @@ Robert Schwebel <r.schwebel@pengutronix.de>
 
 Andrea Scian <andrea.scian@dave-tech.it>
 
-	B2				ARM7TDMI (S3C44B0X)
+	B2			ARM7TDMI (S3C44B0X)
 
 Greg Ungerer <greg.ungerer@opengear.com>
 
@@ -421,6 +463,10 @@ Greg Ungerer <greg.ungerer@opengear.com>
 	cm4116			ks8695p
 	cm4148			ks8695p
 
+Richard Woodruff <r-woodruff2@ti.com>
+
+	omap2420h4		ARM1136EJS
+
 Alex Z<>pke <azu@sysgo.de>
 
 	lart			SA1100
@@ -451,6 +497,7 @@ Wolfgang Denk <wd@denx.de>
 
 Thomas Lange <thomas@corelatus.se>
 	dbau1x00		MIPS32 Au1000
+	gth2			MIPS32 Au1000
 
 #########################################################################
 # Nios-32 Systems:							#
@@ -479,6 +526,9 @@ Scott McNutt <smcnutt@psyent.com>
 
 	PCI5441			Nios-II
 	PK1C20			Nios-II
+	EP1C20			Nios-II
+	EP1S10			Nios-II
+	EP1S40			Nios-II
 
 #########################################################################
 # MicroBlaze Systems:							#
@@ -502,6 +552,21 @@ Matthias Fuchs <matthias.fuchs@esd-electronics.com>
 
 	TASREG			MCF5249
 
+Zachary P. Landau <zachary.landau@labxtechnologies.com>
+
+	r5200			mcf52x2
+
+#########################################################################
+# AVR32 Systems:							#
+#									#
+# Maintainer Name, Email Address					#
+#	Board			CPU					#
+#########################################################################
+
+Haavard Skinnemoen <hskinnemoen@atmel.com>
+
+	ATSTK1000		AT32AP7000
+
 #########################################################################
 # End of MAINTAINERS list						#
 #########################################################################

MAKEALL

@@ -8,7 +8,17 @@ else
 	MAKE=make
 fi
 
-[ -d LOG ] || mkdir LOG || exit 1
+if [ "${MAKEALL_LOGDIR}" ] ; then
+	LOG_DIR=${MAKEALL_LOGDIR}
+else
+	LOG_DIR="LOG"
+fi
+
+if [ ! "${BUILD_DIR}" ] ; then
+	BUILD_DIR="."
+fi
+
+[ -d ${LOG_DIR} ] || mkdir ${LOG_DIR} || exit 1
 
 LIST=""
 
@@ -25,14 +35,16 @@ LIST_5xx="	\
 #########################################################################
 
 LIST_5xxx="	\
-	icecube_5100	icecube_5200	EVAL5200	PM520		\
-	Total5100	Total5200	Total5200_Rev2	TQM5200_auto	\
+	BC3450		cpci5200	EVAL5200	fo300		\
+	icecube_5100	icecube_5200	lite5200b	mcc200		\
+	o2dnt		pf5200		PM520		TB5200		\
+	Total5100	Total5200	Total5200_Rev2	TQM5200		\
+	TQM5200_B	TQM5200S	v38b				\
 "
 
 #########################################################################
 ## MPC8xx Systems
 #########################################################################
-
 LIST_8xx="	\
 	Adder87x	GENIETV		MBX860T		R360MPI		\
 	AdderII		GTH		MHPC		RBC823		\
@@ -42,15 +54,17 @@ LIST_8xx="	\
 	CCM		IP860		NETPHONE	RPXlite_DW	\
 	cogent_mpc8xx	IVML24		NETTA		RRvision	\
 	ELPT860		IVML24_128	NETTA2		SM850		\
-	ESTEEM192E	IVML24_256	NETTA_ISDN	SPD823TS	\
-	ETX094		IVMS8		NETVIA		svm_sc8xx	\
-	FADS823		IVMS8_128	NETVIA_V2	SXNI855T	\
-	FADS850SAR	IVMS8_256	NX823		TOP860		\
-	FADS860T	KUP4K		pcu_e		TQM823L		\
-	FLAGADM		KUP4X		QS823		TQM823L_LCD	\
-	FPS850L		LANTEC		QS850		TQM850L		\
-	GEN860T		lwmon		QS860T		TQM855L		\
-	GEN860T_SC	MBX		quantum		TQM860L		\
+	EP88x		IVML24_256	NETTA_ISDN	spc1920		\
+	ESTEEM192E	IVMS8		NETVIA		SPD823TS	\
+	ETX094		IVMS8_128	NETVIA_V2	svm_sc8xx	\
+	FADS823		IVMS8_256	NX823		SXNI855T	\
+	FADS850SAR	KUP4K		pcu_e		TOP860		\
+	FADS860T	KUP4X		QS823		TQM823L		\
+	FLAGADM		LANTEC		QS850		TQM823L_LCD	\
+	FPS850L		lwmon		QS860T		TQM850L		\
+	GEN860T		MBX		quantum		TQM855L		\
+	GEN860T_SC					TQM860L		\
+							TQM885D		\
 							uc100		\
 							v37		\
 "
@@ -60,16 +74,21 @@ LIST_8xx="	\
 #########################################################################
 
 LIST_4xx="	\
-	ADCIOP		AR405		ASH405		BUBINGA405EP	\
-	CANBT		CPCI405		CPCI4052	CPCI405AB	\
-	CPCI440		CPCIISER4	CRAYL1		csb272		\
-	csb472		DASA_SIM	DP405		DU405		\
-	EBONY		ERIC		EXBITGEN	HUB405		\
-	JSE		MIP405		MIP405T		ML2		\
-	ml300		OCOTEA		OCRTC		ORSG		\
-	PCI405		PIP405		PLU405		PMC405		\
-	PPChameleonEVB	VOH405		W7OLMC		W7OLMG		\
-	WALNUT405	WUH405          XPEDITE1K			\
+	ADCIOP		AP1000		AR405		ASH405		\
+	bamboo		bubinga		CANBT		CMS700		\
+	CPCI2DP		CPCI405		CPCI4052	CPCI405AB	\
+	CPCI405DT	CPCI440		CPCIISER4	CRAYL1		\
+	csb272		csb472		DASA_SIM	DP405		\
+	DU405		ebony		ERIC		EXBITGEN	\
+	G2000		HH405		HUB405		JSE		\
+	KAREF		luan		METROBOX	MIP405		\
+	MIP405T		ML2		ml300		ocotea		\
+	OCRTC		ORSG		p3p440		PCI405		\
+	pcs440ep	PIP405		PLU405		PMC405		\
+	PPChameleonEVB	sbc405		sequoia		sequoia_nand	\
+	VOH405		VOM405		W7OLMC		W7OLMG		\
+	walnut		WUH405		XPEDITE1K	yellowstone	\
+	yosemite	yucca		bamboo		\
 "
 
 #########################################################################
@@ -85,11 +104,11 @@ LIST_8220="	\
 #########################################################################
 
 LIST_824x="	\
-	A3000		BMW		CPC45		CU824		\
-	debris		eXalion		HIDDEN_DRAGON	MOUSSE		\
-	MUSENKI		MVBLUE		OXC		PN62		\
-	Sandpoint8240	Sandpoint8245	SL8245		utx8245		\
-	sbc8240	\
+	A3000		barco		BMW		CPC45		\
+	CU824		debris		eXalion		HIDDEN_DRAGON	\
+			MOUSSE		MUSENKI		MVBLUE		\
+	OXC		PN62		Sandpoint8240	Sandpoint8245	\
+	sbc8240		SL8245		utx8245				\
 "
 
 #########################################################################
@@ -98,22 +117,32 @@ LIST_824x="	\
 
 LIST_8260="	\
 	atc		cogent_mpc8260	CPU86		CPU87		\
-	ep8260		gw8260		hymod		IPHASE4539	\
-	ISPAN		MPC8260ADS	MPC8266ADS	MPC8272ADS	\
-	PM826		PM828		ppmc8260	Rattler8248	\
-	RPXsuper	rsdproto	sacsng		sbc8260		\
-	SCM		TQM8260_AC	TQM8260_AD	TQM8260_AE	\
-	ZPC1900								\
+	ep8248		ep8260		ep82xxm		gw8260		\
+	hymod		IPHASE4539	ISPAN		MPC8260ADS	\
+	MPC8266ADS	MPC8272ADS	PM826		PM828		\
+	ppmc8260	Rattler8248	RPXsuper	rsdproto	\
+	sacsng		sbc8260		SCM		TQM8260_AC	\
+	TQM8260_AD	TQM8260_AE	ZPC1900				\
 "
 
+#########################################################################
+## MPC83xx Systems (includes 8349, etc.)
+#########################################################################
+
+LIST_83xx="	\
+	TQM834x		MPC8349EMDS					\
+"
+
+
 #########################################################################
 ## MPC85xx Systems (includes 8540, 8560 etc.)
 #########################################################################
 
 LIST_85xx="	\
-	MPC8540ADS	MPC8541CDS	MPC8555CDS	MPC8560ADS	\
-	PM854		sbc8540		sbc8560		stxgp3		\
-	TQM8540								\
+	MPC8540ADS	MPC8540EVAL	MPC8541CDS	MPC8548CDS	\
+	MPC8555CDS	MPC8560ADS	PM854		PM856		\
+	sbc8540		sbc8560		stxgp3		TQM8540		\
+	TQM8541		TQM8555		TQM8560				\
 "
 
 #########################################################################
@@ -126,12 +155,13 @@ LIST_74xx="	\
 "
 
 LIST_7xx="	\
-	BAB7xx		CPCI750		ELPPC				\
+	BAB7xx		CPCI750		ELPPC		ppmc7xx		\
 "
 
 LIST_ppc="${LIST_5xx}  ${LIST_5xxx}		\
 	  ${LIST_8xx}				\
 	  ${LIST_8220} ${LIST_824x} ${LIST_8260} \
+	  ${LIST_83xx}				\
 	  ${LIST_85xx}				\
 	  ${LIST_4xx}				\
 	  ${LIST_74xx} ${LIST_7xx}"
@@ -146,24 +176,41 @@ LIST_SA="assabet dnp1110 gcplus lart shannon"
 ## ARM7 Systems
 #########################################################################
 
-LIST_ARM7="B2 ep7312 evb4510 impa7 modnet50"
+LIST_ARM7="	\
+	armadillo	B2		ep7312		evb4510		\
+	impa7		integratorap	ap7		ap720t		\
+	modnet50							\
+"
 
 #########################################################################
 ## ARM9 Systems
 #########################################################################
 
 LIST_ARM9="	\
-	at91rm9200dk	cmc_pu2		integratorcp	integratorap 	\
-	lpd7a400	mx1ads		mx1fs2		omap1510inn	\
-	omap1610h2	omap1610inn	omap730p2	scb9328		\
-	smdk2400	smdk2410	trab		VCMA9		\
-	versatile	voiceblue					\
+	at91rm9200dk	cmc_pu2						\
+	ap920t		ap922_XA10	ap926ejs	ap946es		\
+	ap966		cp920t		cp922_XA10	cp926ejs	\
+	cp946es		cp966		lpd7a400	mp2usb		\
+	mx1ads		mx1fs2		netstar		omap1510inn	\
+	omap1610h2	omap1610inn	omap730p2	sbc2410x	\
+	scb9328		smdk2400	smdk2410	trab		\
+	VCMA9		versatile	versatileab	versatilepb	\
+	voiceblue							\
+"
+
+#########################################################################
+## ARM10 Systems
+#########################################################################
+LIST_ARM10="	\
+	integratorcp	cp1026						\
 "
 
 #########################################################################
 ## ARM11 Systems
 #########################################################################
-LIST_ARM11="omap2420h4"
+LIST_ARM11="	\
+	cp1136		omap2420h4					\
+"
 
 #########################################################################
 ## Xscale Systems
@@ -171,31 +218,44 @@ LIST_ARM11="omap2420h4"
 
 LIST_pxa="	\
 	adsvix		cerf250		cradle		csb226		\
-	innokom		lubbock		wepep250	xaeniax		\
-	xm250		xsengine							\
+	delta		innokom		lubbock		pleb2		\
+	pxa255_idp	wepep250	xaeniax		xm250		\
+	xsengine	zylonite					\
 "
 
-LIST_ixp="ixdp425"
+LIST_ixp="ixdp425	ixdpg425	pdnb3"
 
 
 LIST_arm="	\
 	${LIST_SA}							\
-	${LIST_ARM7} ${LIST_ARM9} ${LIST_ARM11}				\
+	${LIST_ARM7} ${LIST_ARM9} ${LIST_ARM10} ${LIST_ARM11}		\
 	${LIST_pxa} ${LIST_ixp}						\
 "
 
 #########################################################################
-## MIPS Systems
+## MIPS Systems		(default = big endian)
 #########################################################################
 
 LIST_mips4kc="incaip"
 
 LIST_mips5kc="purple"
 
-LIST_au1xx0="dbau1000 dbau1100 dbau1500 dbau1550 dbau1550_el"
+LIST_au1xx0="dbau1000 dbau1100 dbau1500 dbau1550 dbau1550_el gth2"
 
 LIST_mips="${LIST_mips4kc} ${LIST_mips5kc} ${LIST_au1xx0}"
 
+#########################################################################
+## MIPS Systems		(little endian)
+#########################################################################
+
+LIST_mips4kc_el=""
+
+LIST_mips5kc_el=""
+
+LIST_au1xx0_el="dbau1550_el"
+
+LIST_mips_el="${LIST_mips4kc_el} ${LIST_mips5kc_el} ${LIST_au1xx0_el}"
+
 #########################################################################
 ## i386 Systems
 #########################################################################
@@ -209,23 +269,44 @@ LIST_x86="${LIST_I486}"
 #########################################################################
 
 LIST_nios="	\
-	ADNPESC1 ADNPESC1_base_32					\
+	ADNPESC1		ADNPESC1_base_32			\
 	ADNPESC1_DNPEVA2_base_32					\
-	DK1C20 DK1C20_standard_32					\
-	DK1S10 DK1S10_standard_32 DK1S10_mtx_ldk_20			\
+	DK1C20			DK1C20_standard_32			\
+	DK1S10			DK1S10_standard_32 DK1S10_mtx_ldk_20	\
 "
 
 #########################################################################
 ## Nios-II Systems
 #########################################################################
 
-LIST_nios2="PCI5441 PK1C20"
+LIST_nios2="	\
+	EP1C20		EP1S10		EP1S40				\
+	PCI5441		PK1C20						\
+"
 
 #########################################################################
 ## MicroBlaze Systems
 #########################################################################
 
-LIST_microblaze="suzaku"
+LIST_microblaze="	\
+	suzaku
+"
+
+#########################################################################
+## ColdFire Systems
+#########################################################################
+
+LIST_coldfire="	\
+	cobra5272	EB+MCF-EV123	EB+MCF-EV123_internal		\
+	M5271EVB	M5272C3		M5282EVB	TASREG		\
+	r5200		M5271EVB					\
+"
+
+#########################################################################
+## AVR32 Systems
+#########################################################################
+
+LIST_avr32="atstk1002"
 
 #-----------------------------------------------------------------------
 
@@ -239,8 +320,12 @@ build_target() {
 
 	${MAKE} distclean >/dev/null
 	${MAKE} ${target}_config
-	${MAKE} ${JOBS} all 2>&1 >LOG/$target.MAKELOG | tee LOG/$target.ERR
-	${CROSS_COMPILE:-ppc_8xx-}size u-boot | tee -a LOG/$target.MAKELOG
+
+	${MAKE} ${JOBS} all 2>&1 >${LOG_DIR}/$target.MAKELOG \
+				| tee ${LOG_DIR}/$target.ERR
+
+	${CROSS_COMPILE:-ppc_8xx-}size ${BUILD_DIR}/u-boot \
+				| tee -a ${LOG_DIR}/$target.MAKELOG
 }
 
 #-----------------------------------------------------------------------
@@ -249,12 +334,14 @@ build_target() {
 for arg in $@
 do
 	case "$arg" in
-	ppc|5xx|5xxx|8xx|8220|824x|8260|85xx|4xx|7xx|74xx| \
-	arm|SA|ARM7|ARM9|ARM11|pxa|ixp| \
+	ppc|5xx|5xxx|8xx|8220|824x|8260|83xx|85xx|4xx|7xx|74xx| \
+	arm|SA|ARM7|ARM9|ARM10|ARM11|pxa|ixp| \
 	microblaze| \
-	mips| \
+	mips|mips_el| \
 	nios|nios2| \
-	x86|I486)
+	x86|I486| \
+	coldfire| \
+	avr32)
 			for target in `eval echo '$LIST_'${arg}`
 			do
 				build_target ${target}

README

@@ -132,6 +132,7 @@ Directory Hierarchy:
   - arm925t	Files specific to ARM 925 CPUs
   - arm926ejs	Files specific to ARM 926 CPUs
   - arm1136	Files specific to ARM 1136 CPUs
+  - at32ap	Files specific to Atmel AVR32 AP CPUs
   - i386	Files specific to i386 CPUs
   - ixp		Files specific to Intel XScale IXP CPUs
   - mcf52x2	Files specific to Freescale ColdFire MCF52x2 CPUs
@@ -145,7 +146,7 @@ Directory Hierarchy:
   - mpc85xx	Files specific to Freescale MPC85xx CPUs
   - nios	Files specific to Altera NIOS CPUs
   - nios2	Files specific to Altera Nios-II CPUs
-  - ppc4xx	Files specific to IBM PowerPC 4xx CPUs
+  - ppc4xx	Files specific to AMCC PowerPC 4xx CPUs
   - pxa		Files specific to Intel XScale PXA CPUs
   - s3c44b0	Files specific to Samsung S3C44B0 CPUs
   - sa1100	Files specific to Intel StrongARM SA1100 CPUs
@@ -156,6 +157,7 @@ Directory Hierarchy:
 - examples	Example code for standalone applications, etc.
 - include	Header Files
 - lib_arm	Files generic to ARM	 architecture
+- lib_avr32	Files generic to AVR32	 architecture
 - lib_generic	Files generic to all	 architectures
 - lib_i386	Files generic to i386	 architecture
 - lib_m68k	Files generic to m68k	 architecture
@@ -246,6 +248,7 @@ The following options need to be configured:
 		CONFIG_SA1110
 		CONFIG_ARM7
 		CONFIG_PXA250
+		CONFIG_CPU_MONAHANS
 
 		MicroBlaze based CPUs:
 		----------------------
@@ -255,60 +258,66 @@ The following options need to be configured:
 		----------------------
 		CONFIG_NIOS2
 
+		AVR32 based CPUs:
+		----------------------
+		CONFIG_AT32AP
 
 - Board Type:	Define exactly one of
 
 		PowerPC based boards:
 		---------------------
 
-		CONFIG_ADCIOP		CONFIG_GEN860T		CONFIG_PCI405
-		CONFIG_ADS860		CONFIG_GENIETV		CONFIG_PCIPPC2
-		CONFIG_AMX860		CONFIG_GTH		CONFIG_PCIPPC6
+		CONFIG_ADCIOP		CONFIG_FPS860L		CONFIG_OXC
+		CONFIG_ADS860		CONFIG_GEN860T		CONFIG_PCI405
+		CONFIG_AMX860		CONFIG_GENIETV		CONFIG_PCIPPC2
+		CONFIG_AP1000		CONFIG_GTH		CONFIG_PCIPPC6
 		CONFIG_AR405		CONFIG_gw8260		CONFIG_pcu_e
 		CONFIG_BAB7xx		CONFIG_hermes		CONFIG_PIP405
-		CONFIG_c2mon		CONFIG_hymod		CONFIG_PM826
-		CONFIG_CANBT		CONFIG_IAD210		CONFIG_ppmc8260
-		CONFIG_CCM		CONFIG_ICU862		CONFIG_QS823
-		CONFIG_CMI		CONFIG_IP860		CONFIG_QS850
-		CONFIG_cogent_mpc8260	CONFIG_IPHASE4539	CONFIG_QS860T
-		CONFIG_cogent_mpc8xx	CONFIG_IVML24		CONFIG_RBC823
-		CONFIG_CPCI405		CONFIG_IVML24_128	CONFIG_RPXClassic
-		CONFIG_CPCI4052		CONFIG_IVML24_256	CONFIG_RPXlite
-		CONFIG_CPCIISER4	CONFIG_IVMS8		CONFIG_RPXsuper
-		CONFIG_CPU86		CONFIG_IVMS8_128	CONFIG_rsdproto
-		CONFIG_CRAYL1		CONFIG_IVMS8_256	CONFIG_sacsng
-		CONFIG_CSB272		CONFIG_JSE		CONFIG_Sandpoint8240
-		CONFIG_CU824		CONFIG_LANTEC		CONFIG_Sandpoint8245
-		CONFIG_DASA_SIM		CONFIG_lwmon		CONFIG_sbc8260
-		CONFIG_DB64360		CONFIG_MBX		CONFIG_sbc8560
-		CONFIG_DB64460		CONFIG_MBX860T		CONFIG_SM850
-		CONFIG_DU405		CONFIG_MHPC		CONFIG_SPD823TS
-		CONFIG_DUET_ADS		CONFIG_MIP405		CONFIG_STXGP3
-		CONFIG_EBONY		CONFIG_MOUSSE		CONFIG_SXNI855T
-		CONFIG_ELPPC		CONFIG_MPC8260ADS	CONFIG_TQM823L
-		CONFIG_ELPT860		CONFIG_MPC8540ADS	CONFIG_TQM8260
-		CONFIG_ep8260		CONFIG_MPC8560ADS	CONFIG_TQM850L
-		CONFIG_ERIC		CONFIG_MUSENKI		CONFIG_TQM855L
-		CONFIG_ESTEEM192E	CONFIG_MVS1		CONFIG_TQM860L
-		CONFIG_ETX094		CONFIG_NETPHONE		CONFIG_TTTech
-		CONFIG_EVB64260		CONFIG_NETTA		CONFIG_UTX8245
-		CONFIG_FADS823		CONFIG_NETVIA		CONFIG_V37
-		CONFIG_FADS850SAR	CONFIG_NX823		CONFIG_W7OLMC
-		CONFIG_FADS860T		CONFIG_OCRTC		CONFIG_W7OLMG
-		CONFIG_FLAGADM		CONFIG_ORSG		CONFIG_WALNUT405
-		CONFIG_FPS850L		CONFIG_OXC		CONFIG_ZPC1900
-		CONFIG_FPS860L					CONFIG_ZUMA
+		CONFIG_BC3450		CONFIG_hymod		CONFIG_PM826
+		CONFIG_c2mon		CONFIG_IAD210		CONFIG_ppmc8260
+		CONFIG_CANBT		CONFIG_ICU862		CONFIG_QS823
+		CONFIG_CCM		CONFIG_IP860		CONFIG_QS850
+		CONFIG_CMI		CONFIG_IPHASE4539	CONFIG_QS860T
+		CONFIG_cogent_mpc8260	CONFIG_IVML24		CONFIG_RBC823
+		CONFIG_cogent_mpc8xx	CONFIG_IVML24_128	CONFIG_RPXClassic
+		CONFIG_CPCI405		CONFIG_IVML24_256	CONFIG_RPXlite
+		CONFIG_CPCI4052		CONFIG_IVMS8		CONFIG_RPXsuper
+		CONFIG_CPCIISER4	CONFIG_IVMS8_128	CONFIG_rsdproto
+		CONFIG_CPU86		CONFIG_IVMS8_256	CONFIG_sacsng
+		CONFIG_CRAYL1		CONFIG_JSE		CONFIG_Sandpoint8240
+		CONFIG_CSB272		CONFIG_LANTEC		CONFIG_Sandpoint8245
+		CONFIG_CU824		CONFIG_LITE5200B	CONFIG_sbc8260
+		CONFIG_DASA_SIM		CONFIG_lwmon		CONFIG_sbc8560
+		CONFIG_DB64360		CONFIG_MBX		CONFIG_SM850
+		CONFIG_DB64460		CONFIG_MBX860T		CONFIG_SPD823TS
+		CONFIG_DU405		CONFIG_MHPC		CONFIG_STXGP3
+		CONFIG_DUET_ADS		CONFIG_MIP405		CONFIG_SXNI855T
+		CONFIG_EBONY		CONFIG_MOUSSE		CONFIG_TQM823L
+		CONFIG_ELPPC		CONFIG_MPC8260ADS	CONFIG_TQM8260
+		CONFIG_ELPT860		CONFIG_MPC8540ADS	CONFIG_TQM850L
+		CONFIG_ep8260		CONFIG_MPC8540EVAL	CONFIG_TQM855L
+		CONFIG_ERIC		CONFIG_MPC8560ADS	CONFIG_TQM860L
+		CONFIG_ESTEEM192E	CONFIG_MUSENKI		CONFIG_TTTech
+		CONFIG_ETX094		CONFIG_MVS1		CONFIG_UTX8245
+		CONFIG_EVB64260		CONFIG_NETPHONE		CONFIG_V37
+		CONFIG_FADS823		CONFIG_NETTA		CONFIG_W7OLMC
+		CONFIG_FADS850SAR	CONFIG_NETVIA		CONFIG_W7OLMG
+		CONFIG_FADS860T		CONFIG_NX823		CONFIG_WALNUT
+		CONFIG_FLAGADM		CONFIG_OCRTC		CONFIG_ZPC1900
+		CONFIG_FPS850L		CONFIG_ORSG		CONFIG_ZUMA
 
 		ARM based boards:
 		-----------------
 
-		CONFIG_AT91RM9200DK,	CONFIG_CERF250,		CONFIG_DNP1110,
+		CONFIG_ARMADILLO,	CONFIG_AT91RM9200DK,	CONFIG_CERF250,
+		CONFIG_CSB637,		CONFIG_DELTA,		CONFIG_DNP1110,
 		CONFIG_EP7312,		CONFIG_H2_OMAP1610,	CONFIG_HHP_CRADLE,
-		CONFIG_IMPA7,		CONFIG_INNOVATOROMAP1510, CONFIG_INNOVATOROMAP1610,
-		CONFIG_LART,		CONFIG_LPD7A400		CONFIG_LUBBOCK,
-		CONFIG_OSK_OMAP5912,	CONFIG_OMAP2420H4,	CONFIG_SHANNON,
-		CONFIG_P2_OMAP730,	CONFIG_SMDK2400,	CONFIG_SMDK2410,
-		CONFIG_TRAB,		CONFIG_VCMA9
+		CONFIG_IMPA7,	    CONFIG_INNOVATOROMAP1510,	CONFIG_INNOVATOROMAP1610,
+		CONFIG_KB9202,		CONFIG_LART,		CONFIG_LPD7A400,
+		CONFIG_LUBBOCK,		CONFIG_OSK_OMAP5912,	CONFIG_OMAP2420H4,
+		CONFIG_PLEB2,		CONFIG_SHANNON,		CONFIG_P2_OMAP730,
+		CONFIG_SMDK2400,	CONFIG_SMDK2410,	CONFIG_TRAB,
+		CONFIG_VCMA9
 
 		MicroBlaze based boards:
 		------------------------
@@ -319,6 +328,16 @@ The following options need to be configured:
 		------------------------
 
 		CONFIG_PCI5441 CONFIG_PK1C20
+		CONFIG_EP1C20 CONFIG_EP1S10 CONFIG_EP1S40
+
+		AVR32 based boards:
+		-------------------
+
+		CONFIG_ATSTK1000
+
+- CPU Daughterboard Type: (if CONFIG_ATSTK1000 is defined)
+		Define exactly one of
+		CONFIG_ATSTK1002
 
 
 - CPU Module Type: (if CONFIG_COGENT is defined)
@@ -377,6 +396,20 @@ The following options need to be configured:
 		that this requires a (stable) reference clock (32 kHz
 		RTC clock or CFG_8XX_XIN)
 
+- Intel Monahans options:
+		CFG_MONAHANS_RUN_MODE_OSC_RATIO
+
+		Defines the Monahans run mode to oscillator
+		ratio. Valid values are 8, 16, 24, 31. The core
+		frequency is this value multiplied by 13 MHz.
+
+		CFG_MONAHANS_TURBO_RUN_MODE_RATIO
+
+		Defines the Monahans turbo mode to oscillator
+		ratio. Valid values are 1 (default if undefined) and
+		2. The core frequency as calculated above is multiplied
+		by this value.
+
 - Linux Kernel Interface:
 		CONFIG_CLOCKS_IN_MHZ
 
@@ -397,6 +430,42 @@ The following options need to be configured:
 		expect it to be in bytes, others in MB.
 		Define CONFIG_MEMSIZE_IN_BYTES to make it in bytes.
 
+		CONFIG_OF_FLAT_TREE
+
+		New kernel versions are expecting firmware settings to be
+		passed using flat open firmware trees.
+		The environment variable "disable_of", when set, disables this
+		functionality.
+
+		CONFIG_OF_FLAT_TREE_MAX_SIZE
+
+		The maximum size of the constructed OF tree.
+
+		OF_CPU - The proper name of the cpus node.
+		OF_SOC - The proper name of the soc node.
+		OF_TBCLK - The timebase frequency.
+		OF_STDOUT_PATH - The path to the console device
+
+		CONFIG_OF_HAS_BD_T
+
+		The resulting flat device tree will have a copy of the bd_t.
+		Space should be pre-allocated in the dts for the bd_t.
+
+		CONFIG_OF_HAS_UBOOT_ENV
+
+		The resulting flat device tree will have a copy of u-boot's
+		environment variables
+
+		CONFIG_OF_BOARD_SETUP
+
+		Board code has addition modification that it wants to make
+		to the flat device tree before handing it off to the kernel
+
+		CONFIG_OF_BOOT_CPU
+
+		This define fills in the correct boot cpu in the boot
+		param header, the default value is zero if undefined.
+
 - Serial Ports:
 		CFG_PL010_SERIAL
 
@@ -497,7 +566,7 @@ The following options need to be configured:
 - Console UART Number:
 		CONFIG_UART1_CONSOLE
 
-		IBM PPC4xx only.
+		AMCC PPC4xx only.
 		If defined internal UART1 (and not UART0) is used
 		as default U-Boot console.
 
@@ -590,7 +659,7 @@ The following options need to be configured:
 		CFG_CMD_DIAG	* Diagnostics
 		CFG_CMD_DOC	* Disk-On-Chip Support
 		CFG_CMD_DTT	* Digital Therm and Thermostat
-		CFG_CMD_ECHO	* echo arguments
+		CFG_CMD_ECHO	  echo arguments
 		CFG_CMD_EEPROM	* EEPROM read/write support
 		CFG_CMD_ELF	* bootelf, bootvx
 		CFG_CMD_ENV	  saveenv
@@ -960,6 +1029,12 @@ The following options need to be configured:
 		allows for a "silent" boot where a splash screen is
 		loaded very quickly after power-on.
 
+- Gzip compressed BMP image support: CONFIG_VIDEO_BMP_GZIP
+
+		If this option is set, additionally to standard BMP
+		images, gzipped BMP images can be displayed via the
+		splashscreen support or the bmp command.
+
 - Compression support:
 		CONFIG_BZIP2
 
@@ -1355,7 +1430,7 @@ The following options need to be configured:
 		remaining RAM in a form that can be passed as boot
 		argument to Linux, for instance like that:
 
-			setenv bootargs ... mem=\$(mem)
+			setenv bootargs ... mem=\${mem}
 			saveenv
 
 		This way you can tell Linux not to use this memory,
@@ -1391,10 +1466,14 @@ The following options need to be configured:
 		default value of 5 is used.
 
 - Command Interpreter:
-		CFG_AUTO_COMPLETE
+		CONFIG_AUTO_COMPLETE
 
 		Enable auto completion of commands using TAB.
 
+                Note that this feature has NOT been implemented yet
+                for the "hush" shell.
+
+
 		CFG_HUSH_PARSER
 
 		Define this variable to enable the "hush" shell (from
@@ -1434,6 +1513,12 @@ The following options need to be configured:
 		of the backslashes before semicolons and special
 		symbols.
 
+- Commandline Editing and History:
+		CONFIG_CMDLINE_EDITING
+
+		Enable editiong and History functions for interactive
+		commandline input operations
+
 - Default Environment:
 		CONFIG_EXTRA_ENV_SETTINGS
 
@@ -1481,6 +1566,26 @@ The following options need to be configured:
 		When SystemACE support is added, the "ace" device type
 		becomes available to the fat commands, i.e. fatls.
 
+- TFTP Fixed UDP Port:
+		CONFIG_TFTP_PORT
+
+		If this is defined, the environment variable tftpsrcp
+		is used to supply the TFTP UDP source port value.
+		If tftpsrcp isn't defined, the normal pseudo-random port
+		number generator is used.
+
+		Also, the environment variable tftpdstp is used to supply
+		the TFTP UDP destination port value.  If tftpdstp isn't
+		defined, the normal port 69 is used.
+
+		The purpose for tftpsrcp is to allow a TFTP server to
+		blindly start the TFTP transfer using the pre-configured
+		target IP address and UDP port. This has the effect of
+		"punching through" the (Windows XP) firewall, allowing
+		the remainder of the TFTP transfer to proceed normally.
+		A better solution is to properly configure the firewall,
+		but sometimes that is not allowed.
+
 - Show boot progress:
 		CONFIG_SHOW_BOOT_PROGRESS
 
@@ -1675,6 +1780,12 @@ Configuration Settings:
 - CFG_MALLOC_LEN:
 		Size of DRAM reserved for malloc() use.
 
+- CFG_BOOTM_LEN:
+		Normally compressed uImages are limited to an
+		uncompressed size of 8 MBytes. If this is not enough,
+		you can define CFG_BOOTM_LEN in your board config file
+		to adjust this setting to your needs.
+
 - CFG_BOOTMAPSZ:
 		Maximum size of memory mapped by the startup code of
 		the Linux kernel; all data that must be processed by
@@ -1724,6 +1835,12 @@ Configuration Settings:
 		This option also enables the building of the cfi_flash driver
 		in the drivers directory
 
+- CFG_FLASH_QUIET_TEST
+		If this option is defined, the common CFI flash doesn't
+		print it's warning upon not recognized FLASH banks. This
+		is useful, if some of the configured banks are only
+		optionally available.
+
 - CFG_RX_ETH_BUFFER:
 		Defines the number of ethernet receive buffers. On some
 		ethernet controllers it is recommended to set this value
@@ -1898,6 +2015,17 @@ to save the current settings.
 	  These two #defines specify the offset and size of the environment
 	  area within the first NAND device.
 
+	- CFG_ENV_OFFSET_REDUND
+
+	  This setting describes a second storage area of CFG_ENV_SIZE
+	  size used to hold a redundant copy of the environment data,
+	  so that there is a valid backup copy in case there is a
+	  power failure during a "saveenv" operation.
+
+	Note: CFG_ENV_OFFSET and CFG_ENV_OFFSET_REDUND must be aligned
+	to a block boundary, and CFG_ENV_SIZE must be a multiple of
+	the NAND devices block size.
+
 - CFG_SPI_INIT_OFFSET
 
 	Defines offset to the initial SPI buffer area in DPRAM. The
@@ -2186,14 +2314,14 @@ configurations; the following names are supported:
 	DUET_ADS_config		MBX_config		sbc8560_66_config
 	EBONY_config		MPC8260ADS_config	SM850_config
 	ELPT860_config		MPC8540ADS_config	SPD823TS_config
-	ESTEEM192E_config	MPC8560ADS_config	stxgp3_config
-	ETX094_config		NETVIA_config		SXNI855T_config
-	FADS823_config		omap1510inn_config	TQM823L_config
-	FADS850SAR_config	omap1610h2_config	TQM850L_config
-	FADS860T_config		omap1610inn_config	TQM855L_config
-	FPS850L_config		omap5912osk_config	TQM860L_config
-				omap2420h4_config	WALNUT405_config
-							Yukon8220_config
+	ESTEEM192E_config	MPC8540EVAL_config	stxgp3_config
+	ETX094_config		MPC8560ADS_config	SXNI855T_config
+	FADS823_config		NETVIA_config		TQM823L_config
+	FADS850SAR_config	omap1510inn_config	TQM850L_config
+	FADS860T_config		omap1610h2_config	TQM855L_config
+	FPS850L_config		omap1610inn_config	TQM860L_config
+				omap5912osk_config	walnut_config
+				omap2420h4_config	Yukon8220_config
 							ZPC1900_config
 
 Note: for some board special configuration names may exist; check if
@@ -2218,6 +2346,26 @@ images ready for download to / installation on your system:
 - "u-boot" is an image in ELF binary format
 - "u-boot.srec" is in Motorola S-Record format
 
+By default the build is performed locally and the objects are saved
+in the source directory. One of the two methods can be used to change
+this behavior and build U-Boot to some external directory:
+
+1. Add O= to the make command line invocations:
+
+	make O=/tmp/build distclean
+	make O=/tmp/build NAME_config
+	make O=/tmp/build all
+
+2. Set environment variable BUILD_DIR to point to the desired location:
+
+	export BUILD_DIR=/tmp/build
+	make distclean
+	make NAME_config
+	make all
+
+Note that the command line "O=" setting overrides the BUILD_DIR environment
+variable.
+
 
 Please be aware that the Makefiles assume you are using GNU make, so
 for instance on NetBSD you might need to use "gmake" instead of
@@ -2271,6 +2419,22 @@ or to build on a native PowerPC system you can type
 
 	CROSS_COMPILE=' ' MAKEALL
 
+When using the MAKEALL script, the default behaviour is to build U-Boot
+in the source directory. This location can be changed by setting the
+BUILD_DIR environment variable. Also, for each target built, the MAKEALL
+script saves two log files (<target>.ERR and <target>.MAKEALL) in the
+<source dir>/LOG directory. This default location can be changed by
+setting the MAKEALL_LOGDIR environment variable. For example:
+
+	export BUILD_DIR=/tmp/build
+	export MAKEALL_LOGDIR=/tmp/log
+	CROSS_COMPILE=ppc_8xx- MAKEALL
+
+With the above settings build objects are saved in the /tmp/build, log
+files are saved in the /tmp/log and the source tree remains clean during
+the whole build process.
+
+
 See also "U-Boot Porting Guide" below.
 
 
@@ -2446,6 +2610,12 @@ Some configuration options can be set using Environment Variables:
 		  Useful on scripts which control the retry operation
 		  themselves.
 
+  tftpsrcport	- If this is set, the value is used for TFTP's
+		  UDP source port.
+
+  tftpdstport	- If this is set, the value is used for TFTP's UDP
+		  destination port instead of the Well Know Port 69.
+
    vlan		- When set to a value < 4095 the traffic over
 		  ethernet is encapsulated/received over 802.1q
 		  VLAN tagged frames.
@@ -2498,10 +2668,10 @@ Old, simple command line parser:
 
 - supports environment variables (through setenv / saveenv commands)
 - several commands on one line, separated by ';'
-- variable substitution using "... $(name) ..." syntax
+- variable substitution using "... ${name} ..." syntax
 - special characters ('$', ';') can be escaped by prefixing with '\',
   for example:
-	setenv bootcmd bootm \$(address)
+	setenv bootcmd bootm \${address}
 - You can also escape text by enclosing in single apostrophes, for example:
 	setenv addip 'setenv bootargs $bootargs ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off'
 
@@ -2575,9 +2745,9 @@ defines the following image properties:
   4.4BSD, Linux, SVR4, Esix, Solaris, Irix, SCO, Dell, NCR, VxWorks,
   LynxOS, pSOS, QNX, RTEMS, ARTOS;
   Currently supported: Linux, NetBSD, VxWorks, QNX, RTEMS, ARTOS, LynxOS).
-* Target CPU Architecture (Provisions for Alpha, ARM, Intel x86,
+* Target CPU Architecture (Provisions for Alpha, ARM, AVR32, Intel x86,
   IA64, MIPS, NIOS, PowerPC, IBM S390, SuperH, Sparc, Sparc 64 Bit;
-  Currently supported: ARM, Intel x86, MIPS, NIOS, PowerPC).
+  Currently supported: ARM, AVR32, Intel x86, MIPS, NIOS, PowerPC).
 * Compression Type (uncompressed, gzip, bzip2)
 * Load Address
 * Entry Point
@@ -2908,6 +3078,55 @@ format!) to the "bootm" command:
 
 	bash#
 
+Boot Linux and pass a flat device tree:
+-----------
+
+First, U-Boot must be compiled with the appropriate defines. See the section
+titled "Linux Kernel Interface" above for a more in depth explanation. The
+following is an example of how to start a kernel and pass an updated
+flat device tree:
+
+=> print oftaddr
+oftaddr=0x300000
+=> print oft
+oft=oftrees/mpc8540ads.dtb
+=> tftp $oftaddr $oft
+Speed: 1000, full duplex
+Using TSEC0 device
+TFTP from server 192.168.1.1; our IP address is 192.168.1.101
+Filename 'oftrees/mpc8540ads.dtb'.
+Load address: 0x300000
+Loading: #
+done
+Bytes transferred = 4106 (100a hex)
+=> tftp $loadaddr $bootfile
+Speed: 1000, full duplex
+Using TSEC0 device
+TFTP from server 192.168.1.1; our IP address is 192.168.1.2
+Filename 'uImage'.
+Load address: 0x200000
+Loading:############
+done
+Bytes transferred = 1029407 (fb51f hex)
+=> print loadaddr
+loadaddr=200000
+=> print oftaddr
+oftaddr=0x300000
+=> bootm $loadaddr - $oftaddr
+## Booting image at 00200000 ...
+   Image Name:   Linux-2.6.17-dirty
+   Image Type:   PowerPC Linux Kernel Image (gzip compressed)
+   Data Size:    1029343 Bytes = 1005.2 kB
+   Load Address: 00000000
+   Entry Point:  00000000
+   Verifying Checksum ... OK
+   Uncompressing Kernel Image ... OK
+Booting using flat device tree at 0x300000
+Using MPC85xx ADS machine description
+Memory CAM mapping: CAM0=256Mb, CAM1=256Mb, CAM2=0Mb residual: 0Mb
+[snip]
+
+
 More About U-Boot Image Types:
 ------------------------------
 
@@ -3135,7 +3354,7 @@ locked as (mis-) used as memory, etc.
 	CFG_INIT_RAM_ADDR should be somewhere that won't interfere
 	with your processor/board/system design. The default value
 	you will find in any recent u-boot distribution in
-	Walnut405.h should work for you. I'd set it to a value larger
+	walnut.h should work for you. I'd set it to a value larger
 	than your SDRAM module. If you have a 64MB SDRAM module, set
 	it above 400_0000. Just make sure your board has no resources
 	that are supposed to respond to that address! That code in
@@ -3206,6 +3425,8 @@ On ARM, the following registers are used:
 
     ==> U-Boot will use R8 to hold a pointer to the global data
 
+NOTE: DECLARE_GLOBAL_DATA_PTR must be used with file-global scope,
+or current versions of GCC may "optimize" the code too much.
 
 Memory Management:
 ------------------
@@ -3356,12 +3577,19 @@ Coding Standards:
 -----------------
 
 All contributions to U-Boot should conform to the Linux kernel
-coding style; see the file "Documentation/CodingStyle" in your Linux
-kernel source directory.
+coding style; see the file "Documentation/CodingStyle" and the script
+"scripts/Lindent" in your Linux kernel source directory.  In sources
+originating from U-Boot a style corresponding to "Lindent -pcs" (adding
+spaces before parameters to function calls) is actually used.
 
-Please note that U-Boot is implemented in C (and to some small parts
-in Assembler); no C++ is used, so please do not use C++ style
-comments (//) in your code.
+Source files originating from a different project (for example the
+MTD subsystem) are generally exempt from these guidelines and are not
+reformated to ease subsequent migration to newer versions of those
+sources.
+
+Please note that U-Boot is implemented in C (and to some small parts in
+Assembler); no C++ is used, so please do not use C++ style comments (//)
+in your code.
 
 Please also stick to the following formatting rules:
 - remove any trailing white space

avr32_config.mk

@@ -0,0 +1,25 @@
+#
+# (C) Copyright 2000-2002
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+PLATFORM_RELFLAGS	+= -ffixed-r5 -mno-pic -mrelax
+PLATFORM_LDFLAGS	+= --relax

blackfin_config.mk

@@ -0,0 +1,24 @@
+#
+# (C) Copyright 2000-2002
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+PLATFORM_CPPFLAGS += -DCONFIG_BLACKFIN -D__blackfin__

board/AtmarkTechno/suzaku/Makefile

@@ -1,5 +1,5 @@
 #
-# (C) Copyright 2003
+# (C) Copyright 2003-2006
 # Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 #
 # See file CREDITS for list of people who contributed to this
@@ -23,18 +23,22 @@
 
 include $(TOPDIR)/config.mk
 
-LIB	= lib$(BOARD).a
+LIB	= $(obj)lib$(BOARD).a
 
-OBJS	= $(BOARD).o flash.o
+COBJS	= $(BOARD).o flash.o
 
-$(LIB):	.depend $(OBJS)
-	$(AR) crv $@ $(OBJS)
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))
+
+$(LIB):	$(obj).depend $(OBJS)
+	$(AR) $(ARFLAGS) $@ $(OBJS)
 
 #########################################################################
 
-.depend:	Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
-		$(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
 
-sinclude .depend
+sinclude $(obj).depend
 
 #########################################################################

board/AtmarkTechno/suzaku/u-boot.lds

@@ -51,6 +51,7 @@ SECTIONS
 
 	.u_boot_cmd ALIGN(0x4):
 	{
+		. = .;
 		__u_boot_cmd_start = .;
 		*(.u_boot_cmd)
 		__u_boot_cmd_end = .;

board/BuS/EB+MCF-EV123/EB+MCF-EV123.c

@@ -0,0 +1,162 @@
+/*
+ * (C) Copyright 2005
+ * BuS Elektronik GmbH & Co.KG <esw@bus-elektonik.de>
+ *
+ * (C) Copyright 2000-2003
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <command.h>
+#include "asm/m5282.h"
+#include "VCxK.h"
+
+int checkboard (void)
+{
+	puts ("Board: MCF-EV1 + MCF-EV23 (BuS Elektronik GmbH & Co. KG)\n");
+#if (TEXT_BASE ==  CFG_INT_FLASH_BASE)
+	puts ("       Boot from Internal FLASH\n");
+#endif
+
+	return 0;
+}
+
+long int initdram (int board_type)
+{
+	int size,i;
+
+	size = 0;
+	MCFSDRAMC_DCR =	MCFSDRAMC_DCR_RTIM_6
+			| MCFSDRAMC_DCR_RC((15 * CFG_CLK)>>4);
+	#ifdef CFG_SDRAM_BASE0
+
+		MCFSDRAMC_DACR0 =	MCFSDRAMC_DACR_BASE(CFG_SDRAM_BASE0)
+					| MCFSDRAMC_DACR_CASL(1)
+ 					| MCFSDRAMC_DACR_CBM(3)
+					| MCFSDRAMC_DACR_PS_16);
+
+		MCFSDRAMC_DMR0 =	MCFSDRAMC_DMR_BAM_16M
+					| MCFSDRAMC_DMR_V;
+
+		MCFSDRAMC_DACR0 |= 	MCFSDRAMC_DACR_IP;
+
+		*(unsigned short *)(CFG_SDRAM_BASE0) = 0xA5A5;
+		MCFSDRAMC_DACR0 |=	MCFSDRAMC_DACR_RE;
+		for (i=0; i < 2000; i++)
+			asm(" nop");
+		mbar_writeLong(MCFSDRAMC_DACR0, mbar_readLong(MCFSDRAMC_DACR0)
+								    | MCFSDRAMC_DACR_IMRS);
+		*(unsigned int *)(CFG_SDRAM_BASE0 + 0x220) = 0xA5A5;
+		size += CFG_SDRAM_SIZE * 1024 * 1024;
+	#endif
+	#ifdef CFG_SDRAM_BASE1
+		MCFSDRAMC_DACR1 =	MCFSDRAMC_DACR_BASE(CFG_SDRAM_BASE1)
+					| MCFSDRAMC_DACR_CASL(1)
+ 					| MCFSDRAMC_DACR_CBM(3)
+					| MCFSDRAMC_DACR_PS_16;
+
+		MCFSDRAMC_DMR1 = 	MCFSDRAMC_DMR_BAM_16M
+					| MCFSDRAMC_DMR_V;
+
+		MCFSDRAMC_DACR1 |=	MCFSDRAMC_DACR_IP;
+
+		*(unsigned short *)(CFG_SDRAM_BASE1) = 0xA5A5;
+		MCFSDRAMC_DACR1 |=	MCFSDRAMC_DACR_RE;
+		for (i=0; i < 2000; i++)
+			asm(" nop");
+		MCFSDRAMC_DACR1 |= 	MCFSDRAMC_DACR_IMRS;
+		*(unsigned int *)(CFG_SDRAM_BASE1 + 0x220) = 0xA5A5;
+		size += CFG_SDRAM_SIZE1 * 1024 * 1024;
+	#endif
+	return size;
+}
+
+
+#if defined(CFG_DRAM_TEST)
+int testdram (void)
+{
+	uint *pstart = (uint *) CFG_MEMTEST_START;
+	uint *pend = (uint *) CFG_MEMTEST_END;
+	uint *p;
+
+	printf("SDRAM test phase 1:\n");
+	for (p = pstart; p < pend; p++)
+		*p = 0xaaaaaaaa;
+
+	for (p = pstart; p < pend; p++) {
+		if (*p != 0xaaaaaaaa) {
+			printf ("SDRAM test fails at: %08x\n", (uint) p);
+			return 1;
+		}
+	}
+
+	printf("SDRAM test phase 2:\n");
+	for (p = pstart; p < pend; p++)
+		*p = 0x55555555;
+
+	for (p = pstart; p < pend; p++) {
+		if (*p != 0x55555555) {
+			printf ("SDRAM test fails at: %08x\n", (uint) p);
+			return 1;
+		}
+	}
+
+	printf("SDRAM test passed.\n");
+	return 0;
+}
+#endif
+
+int misc_init_r(void)
+{
+	init_vcxk();
+	return 1;
+}
+
+/*---------------------------------------------------------------------------*/
+
+int do_vcimage (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+	int rcode = 0;
+	ulong source;
+
+	switch (argc) {
+	case 2:
+		source = simple_strtoul(argv[1],NULL,16);
+		vcxk_loadimage(source);
+		rcode = 0;
+		break;
+	default:
+		printf ("Usage:\n%s\n", cmdtp->usage);
+		rcode = 1;
+		break;
+	}
+	return rcode;
+}
+
+/***************************************************/
+
+U_BOOT_CMD(
+	vcimage,	2,	0,	do_vcimage,
+	"vcimage - loads an image to Display\n",
+	"vcimage addr\n"
+);
+
+/* EOF EB+MCF-EV123c */

board/BuS/EB+MCF-EV123/Makefile

@@ -0,0 +1,44 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).a
+
+COBJS	= $(BOARD).o cfm_flash.o flash.o VCxK.o
+
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))
+
+$(LIB):	$(obj).depend $(OBJS)
+	$(AR) $(ARFLAGS) $@ $(OBJS)
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################

board/BuS/EB+MCF-EV123/VCxK.c

@@ -0,0 +1,136 @@
+/*
+ * (C) Copyright 2005
+ * BuS Elektronik GmbH & Co.KG <esw@bus-elektonik.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/m5282.h>
+#include "VCxK.h"
+
+vu_char *vcxk_bws = (vu_char *)(CFG_CS3_BASE);
+#define VCXK_BWS vcxk_bws
+
+static ulong vcxk_driver;
+
+
+ulong search_vcxk_driver(void);
+void vcxk_cls(void);
+void vcxk_setbrightness(short brightness);
+int vcxk_request(void);
+int vcxk_acknowledge_wait(void);
+void vcxk_clear(void);
+
+int init_vcxk(void)
+{
+	VIDEO_Invert_CFG &= ~VIDEO_Invert_IO;
+	VIDEO_INVERT_PORT |= VIDEO_INVERT_PIN;
+	VIDEO_INVERT_DDR  |= VIDEO_INVERT_PIN;
+
+	VIDEO_REQUEST_PORT |= VIDEO_REQUEST_PIN;
+	VIDEO_REQUEST_DDR |= VIDEO_REQUEST_PIN;
+
+	VIDEO_ACKNOWLEDGE_DDR &= ~VIDEO_ACKNOWLEDGE_PIN;
+
+	vcxk_driver = search_vcxk_driver();
+	if (vcxk_driver)
+	{
+		/* use flash resist driver */
+	}
+	else
+	{
+		vcxk_cls();
+		vcxk_cls();
+		vcxk_setbrightness(1000);
+	}
+	VIDEO_ENABLE_DDR |= VIDEO_ENABLE_PIN;
+	VIDEO_ENABLE_PORT |= VIDEO_ENABLE_PIN;
+	VIDEO_ENABLE_PORT &= ~VIDEO_ENABLE_PIN;
+	return 1;
+}
+
+void 	vcxk_loadimage(ulong source)
+{
+	int cnt;
+	vcxk_acknowledge_wait();
+	for (cnt=0; cnt<16384; cnt++)
+	{
+		VCXK_BWS[cnt*2] = (*(vu_char*) source);
+		source++;
+	}
+	vcxk_request();
+}
+
+void vcxk_cls(void)
+{
+	vcxk_acknowledge_wait();
+	vcxk_clear();
+	vcxk_request();
+}
+
+void vcxk_clear(void)
+{
+	int cnt;
+	for (cnt=0; cnt<16384; cnt++)
+	{
+		VCXK_BWS[cnt*2] = 0x00;
+	}
+}
+
+void vcxk_setbrightness(short brightness)
+{
+	VCXK_BWS[0x8000]=(brightness >> 4) +2;
+	VCXK_BWS[0xC000]= (brightness + 23) >> 8;
+	VCXK_BWS[0xC001]= (brightness + 23) & 0xFF;
+}
+
+int vcxk_request(void)
+{
+	if (vcxk_driver)
+	{
+		/* use flash resist driver */
+	}
+	else
+	{
+		VIDEO_REQUEST_PORT &= ~VIDEO_REQUEST_PIN;
+		VIDEO_REQUEST_PORT |= VIDEO_REQUEST_PIN;
+	}
+	return 1;
+}
+
+int vcxk_acknowledge_wait(void)
+{
+	if (vcxk_driver)
+	{
+		/* use flash resist driver */
+	}
+	else
+	{
+		while (!(VIDEO_ACKNOWLEDGE_PORT & VIDEO_ACKNOWLEDGE_PIN));
+	}
+	return 1;
+}
+
+ulong search_vcxk_driver(void)
+{
+	return 0;
+}
+
+/* eof */

board/BuS/EB+MCF-EV123/VCxK.h

@@ -0,0 +1,48 @@
+/*
+ * (C) Copyright 2005
+ * BuS Elektronik GmbH & Co.KG <esw@bus-elektonik.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __VCXK_H_
+#define __VCXK_H_
+
+extern int init_vcxk(void);
+void 	vcxk_loadimage(ulong source);
+
+#define VIDEO_ACKNOWLEDGE_PORT	MCFGPTB_GPTPORT
+#define VIDEO_ACKNOWLEDGE_DDR 	MCFGPTB_GPTDDR
+#define VIDEO_ACKNOWLEDGE_PIN	0x0001
+
+#define VIDEO_ENABLE_PORT    	MCFGPTB_GPTPORT
+#define VIDEO_ENABLE_DDR 	MCFGPTB_GPTDDR
+#define VIDEO_ENABLE_PIN	0x0002
+
+#define VIDEO_REQUEST_PORT   	MCFGPTB_GPTPORT
+#define VIDEO_REQUEST_DDR 	MCFGPTB_GPTDDR
+#define VIDEO_REQUEST_PIN	0x0004
+
+#define VIDEO_Invert_CFG	MCFGPIO_PEPAR
+#define VIDEO_Invert_IO		MCFGPIO_PEPAR_PEPA2
+#define VIDEO_INVERT_PORT   	MCFGPIO_PORTE
+#define VIDEO_INVERT_DDR 	MCFGPIO_DDRE
+#define VIDEO_INVERT_PIN	MCFGPIO_PORT2
+
+#endif

board/BuS/EB+MCF-EV123/cfm_flash.c

@@ -0,0 +1,212 @@
+/*
+ * Basic Flash Driver for Freescale MCF 5281/5282 internal FLASH
+ *
+ * (C) Copyright 2005 BuS Elektronik GmbH & Co.KG <esw@bus-elektonik.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/m5282.h>
+#include  "cfm_flash.h"
+
+#if defined(CONFIG_M5281) || defined(CONFIG_M5282)
+
+#if (CFG_CLK>20000000)
+	#define CFM_CLK  (((long) CFG_CLK / (400000 * 8) + 1) | 0x40)
+#else
+	#define CFM_CLK  ((long) CFG_CLK / 400000 + 1)
+#endif
+
+#define cmf_backdoor_address(addr)	(((addr) & 0x0007FFFF) | 0x04000000 | \
+					 (CFG_MBAR & 0xC0000000))
+
+void cfm_flash_print_info (flash_info_t * info)
+{
+	printf ("Freescale: ");
+	switch (info->flash_id & FLASH_TYPEMASK) {
+	case FREESCALE_ID_MCF5281 & FLASH_TYPEMASK:
+		printf ("MCF5281 internal FLASH\n");
+		break;
+	case FREESCALE_ID_MCF5282 & FLASH_TYPEMASK:
+		printf ("MCF5282 internal FLASH\n");
+		break;
+	default:
+		printf ("Unknown Chip Type\n");
+		break;
+	}
+}
+
+void cfm_flash_init (flash_info_t * info)
+{
+	int sector;
+	ulong protection;
+	MCFCFM_MCR = 0;
+	MCFCFM_CLKD = CFM_CLK;
+	debug ("CFM Clock divider: %ld (%d Hz @ %ld Hz)\n",CFM_CLK,\
+	 	CFG_CLK / (2* ((CFM_CLK & 0x3F)+1) * (1+((CFM_CLK & 0x40)>>6)*7)),\
+		CFG_CLK);
+	MCFCFM_SACC = 0;
+	MCFCFM_DACC = 0;
+
+	if (MCFCFM_SEC & MCFCFM_SEC_KEYEN)
+		puts("CFM backdoor access is enabled\n");
+	if (MCFCFM_SEC & MCFCFM_SEC_SECSTAT)
+		puts("CFM securety is enabled\n");
+
+	#ifdef CONFIG_M5281
+		info->flash_id = (FREESCALE_MANUFACT & FLASH_VENDMASK) |
+				 (FREESCALE_ID_MCF5281 & FLASH_TYPEMASK);
+		info->size = 256*1024;
+		info->sector_count = 16;
+	#else
+		info->flash_id = (FREESCALE_MANUFACT & FLASH_VENDMASK) |
+				 (FREESCALE_ID_MCF5282 & FLASH_TYPEMASK);
+		info->size = 512*1024;
+		info->sector_count = 32;
+	#endif
+	protection = MCFCFM_PROT;
+	for (sector = 0; sector < info->sector_count; sector++)
+	{
+		if (sector == 0)
+		{
+			info->start[sector] = CFG_INT_FLASH_BASE;
+		}
+		else
+		{
+			info->start[sector] = info->start[sector-1] + 0x04000;
+		}
+		info->protect[sector] = protection & 1;
+		protection >>= 1;
+	}
+}
+
+int cfm_flash_readycheck(int checkblank)
+{
+	int	rc;
+	unsigned char state;
+
+	rc	= ERR_OK;
+	while (!(MCFCFM_USTAT & MCFCFM_USTAT_CCIF));
+	state = MCFCFM_USTAT;
+	if (state & MCFCFM_USTAT_ACCERR)
+	{
+		debug ("%s(): CFM access error",__FUNCTION__);
+		rc = ERR_PROG_ERROR;
+	}
+	if (state & MCFCFM_USTAT_PVIOL)
+	{
+		debug ("%s(): CFM protection violation",__FUNCTION__);
+		rc = ERR_PROTECTED;
+	}
+	if (checkblank)
+	{
+		if (!(state & MCFCFM_USTAT_BLANK))
+		{
+			debug ("%s(): CFM erras error",__FUNCTION__);
+			rc = ERR_NOT_ERASED;
+		}
+	}
+	MCFCFM_USTAT = state & 0x34; /* reset state */
+	return rc;
+}
+
+/* Erase 16KiB = 8 2KiB pages */
+
+int cfm_flash_erase_sector (flash_info_t * info, int sector)
+{
+	ulong address;
+	int page;
+	int rc;
+	rc= ERR_OK;
+	address = cmf_backdoor_address(info->start[sector]);
+	for (page=0; (page<8) && (rc==ERR_OK); page++)
+	{
+		*(volatile __u32*) address = 0;
+		MCFCFM_CMD = MCFCFM_CMD_PGERS;
+		MCFCFM_USTAT = MCFCFM_USTAT_CBEIF;
+		rc = cfm_flash_readycheck(0);
+		if (rc==ERR_OK)
+		{
+			*(volatile __u32*) address = 0;
+			MCFCFM_CMD = MCFCFM_CMD_PGERSVER;
+			MCFCFM_USTAT = MCFCFM_USTAT_CBEIF;
+			rc = cfm_flash_readycheck(1);
+		}
+		address += 0x800;
+	}
+	return rc;
+}
+
+int cfm_flash_write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
+{
+	int rc;
+	ulong dest, data;
+
+	rc = ERR_OK;
+	if (addr & 3)
+	{
+		debug ("Byte and Word alignment not supported\n");
+		rc = ERR_ALIGN;
+	}
+	if (cnt & 3)
+	{
+		debug ("Byte and Word transfer not supported\n");
+		rc = ERR_ALIGN;
+	}
+	dest = cmf_backdoor_address(addr);
+	while ((cnt>=4) && (rc == ERR_OK))
+	{
+		data =*((volatile u32 *) src);
+		*(volatile u32*) dest = data;
+		MCFCFM_CMD = MCFCFM_CMD_PGM;
+		MCFCFM_USTAT = MCFCFM_USTAT_CBEIF;
+		rc = cfm_flash_readycheck(0);
+		if (*(volatile u32*) addr != data) rc = ERR_PROG_ERROR;
+		src +=4;
+		dest +=4;
+		addr +=4;
+		cnt -=4;
+	}
+	return rc;
+}
+
+#ifdef CFG_FLASH_PROTECTION
+
+int cfm_flash_protect(flash_info_t * info,long sector,int prot)
+{
+	int rc;
+
+	rc= ERR_OK;
+	if (prot)
+	{
+		MCFCFM_PROT |= (1<<sector);
+		info->protect[sector]=1;
+	}
+	else
+	{
+		MCFCFM_PROT &= ~(1<<sector);
+		info->protect[sector]=0;
+	}
+	return rc;
+}
+
+#endif
+
+#endif

board/BuS/EB+MCF-EV123/cfm_flash.h

@@ -0,0 +1,40 @@
+/*
+ * Basic Flash Driver for Freescale MCF 5282 internal FLASH
+ *
+ * (C) Copyright 2005 BuS Elektronik GmbH & Co.KG <esw@bus-elektonik.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CFM_FLASH_H_
+#define __CFM_FLASH_H_
+
+#define	FREESCALE_MANUFACT 0xFACFFACF
+#define	FREESCALE_ID_MCF5281 0x5281
+#define	FREESCALE_ID_MCF5282 0x5282
+
+extern void cfm_flash_print_info (flash_info_t * info);
+extern int cfm_flash_erase_sector (flash_info_t * info, int sector);
+extern void cfm_flash_init (flash_info_t * info);
+extern int cfm_flash_write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt);
+#ifdef CFG_FLASH_PROTECTION
+extern int cfm_flash_protect(flash_info_t * info,long sector,int prot);
+#endif
+
+#endif

board/BuS/EB+MCF-EV123/config.mk

@@ -0,0 +1,28 @@
+#
+# (C) Copyright 2000-2003
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+# Coldfire contribution by Bernhard Kuhn <bkuhn@metrowerks.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+sinclude $(TOPDIR)/board/$(BOARDDIR)/textbase.mk
+ifndef TEXT_BASE
+TEXT_BASE = 0xFE000000
+endif

board/BuS/EB+MCF-EV123/flash.c

@@ -0,0 +1,413 @@
+/*
+ * (C) Copyright 2005
+ * BuS Elektronik GmbH & Co.KG <esw@bus-elektonik.de>
+ *
+ * Based On
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include  "cfm_flash.h"
+
+#define PHYS_FLASH_1 CFG_FLASH_BASE
+#define FLASH_BANK_SIZE 0x200000
+
+flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
+
+void flash_print_info (flash_info_t * info)
+{
+	int i;
+
+	switch (info->flash_id & FLASH_VENDMASK) {
+	case (AMD_MANUFACT & FLASH_VENDMASK):
+		printf ("AMD: ");
+		switch (info->flash_id & FLASH_TYPEMASK) {
+		case (AMD_ID_LV160B & FLASH_TYPEMASK):
+			printf ("AM29LV160B (16Bit)\n");
+			break;
+		default:
+			printf ("Unknown Chip Type\n");
+			break;
+		}
+		break;
+	case FREESCALE_MANUFACT & FLASH_VENDMASK:
+		cfm_flash_print_info (info);
+		break;
+	default:
+		printf ("Unknown Vendor ");
+		break;
+	}
+
+	puts ("  Size: ");
+	if ((info->size >> 20) > 0)
+	{
+		printf ("%ld MiB",info->size >> 20);
+	}
+	else
+	{
+		printf ("%ld KiB",info->size >> 10);
+	}
+	printf (" in %d Sectors\n", info->sector_count);
+
+	printf ("  Sector Start Addresses:");
+	for (i = 0; i < info->sector_count; i++) {
+		if ((i % 4) == 0) {
+			printf ("\n    ");
+		}
+		printf ("%02d: %08lX%s  ", i,info->start[i],
+			info->protect[i] ? " P" : "  ");
+	}
+	printf ("\n\n");
+}
+
+unsigned long flash_init (void)
+{
+	int i, j;
+	ulong size = 0;
+
+	for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
+		ulong flashbase = 0;
+
+		switch (i)
+		{
+		case 1:
+			flash_info[i].flash_id =
+				(AMD_MANUFACT & FLASH_VENDMASK) |
+				(AMD_ID_LV160B & FLASH_TYPEMASK);
+			flash_info[i].size = FLASH_BANK_SIZE;
+			flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
+			memset (flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
+			flashbase = PHYS_FLASH_1;
+			for (j = 0; j < flash_info[i].sector_count; j++) {
+				if (j == 0) {
+					/* 1st is 16 KiB */
+					flash_info[i].start[j] = flashbase;
+				}
+				if ((j >= 1) && (j <= 2)) {
+				/* 2nd and 3rd are 8 KiB */
+					flash_info[i].start[j] =
+						flashbase + 0x4000 + 0x2000 * (j - 1);
+				}
+				if (j == 3) {
+					/* 4th is 32 KiB */
+					flash_info[i].start[j] = flashbase + 0x8000;
+				}
+				if ((j >= 4) && (j <= 34)) {
+					/* rest is 256 KiB */
+					flash_info[i].start[j] =
+						flashbase + 0x10000 + 0x10000 * (j - 4);
+				}
+			}
+			break;
+		case 0:
+			cfm_flash_init (&flash_info[i]);
+			break;
+		default:
+			panic ("configured to many flash banks!\n");
+		}
+
+		size += flash_info[i].size;
+	}
+
+	flash_protect (FLAG_PROTECT_SET,
+		       CFG_FLASH_BASE,
+		       CFG_FLASH_BASE + 0xffff, &flash_info[0]);
+
+	return size;
+}
+
+#define CMD_READ_ARRAY		0x00F0
+#define CMD_UNLOCK1		0x00AA
+#define CMD_UNLOCK2		0x0055
+#define CMD_ERASE_SETUP		0x0080
+#define CMD_ERASE_CONFIRM	0x0030
+#define CMD_PROGRAM		0x00A0
+#define CMD_UNLOCK_BYPASS	0x0020
+
+#define MEM_FLASH_ADDR1		(*(volatile u16 *)(info->start[0] + (0x00000555<<1)))
+#define MEM_FLASH_ADDR2		(*(volatile u16 *)(info->start[0] + (0x000002AA<<1)))
+
+
+#define BIT_ERASE_DONE		0x0080
+#define BIT_RDY_MASK		0x0080
+#define BIT_PROGRAM_ERROR	0x0020
+#define BIT_TIMEOUT		0x80000000	/* our flag */
+
+#define ERR_READY -1
+
+int amd_flash_erase_sector(flash_info_t * info, int sector)
+{
+	int state;
+	ulong result;
+
+	volatile u16 *addr =
+				(volatile u16 *) (info->start[sector]);
+
+	MEM_FLASH_ADDR1 = CMD_UNLOCK1;
+	MEM_FLASH_ADDR2 = CMD_UNLOCK2;
+	MEM_FLASH_ADDR1 = CMD_ERASE_SETUP;
+
+	MEM_FLASH_ADDR1 = CMD_UNLOCK1;
+	MEM_FLASH_ADDR2 = CMD_UNLOCK2;
+	*addr = CMD_ERASE_CONFIRM;
+
+	/* wait until flash is ready */
+	state = 0;
+	set_timer (0);
+
+	do {
+		result = *addr;
+
+		/* check timeout */
+		if (get_timer (0) > CFG_FLASH_ERASE_TOUT) {
+			MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
+			state = ERR_TIMOUT;
+		}
+
+		if (!state && (result & 0xFFFF) & BIT_ERASE_DONE)
+			state = ERR_READY;
+	}
+	while (!state);
+	if (state == ERR_READY)
+		state = ERR_OK;
+
+	MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
+
+	return state;
+}
+
+int flash_erase (flash_info_t * info, int s_first, int s_last)
+{
+	int iflag, cflag;
+	int sector;
+	int rc;
+
+	rc = ERR_OK;
+
+	if (info->flash_id == FLASH_UNKNOWN)
+	{
+		rc = ERR_UNKNOWN_FLASH_TYPE;
+	} /* (info->flash_id == FLASH_UNKNOWN) */
+
+	if ((s_first < 0) || (s_first > s_last) || s_last >= info->sector_count)
+	{
+		rc = ERR_INVAL;
+	}
+
+	cflag = icache_status ();
+	icache_disable ();
+	iflag = disable_interrupts ();
+
+	for (sector = s_first; (sector <= s_last) && (rc == ERR_OK); sector++) {
+
+		if (info->protect[sector])
+		{
+			putc('P'); /*  protected sector will not erase */
+		}
+		else
+		{
+			/* erase on unprotected sector */
+			puts("E\b");
+			switch (info->flash_id & FLASH_VENDMASK)
+			{
+			case (AMD_MANUFACT & FLASH_VENDMASK):
+				rc = amd_flash_erase_sector(info,sector);
+				break;
+			case (FREESCALE_MANUFACT & FLASH_VENDMASK):
+				rc = cfm_flash_erase_sector(info,sector);
+				break;
+			default:
+				return ERR_UNKNOWN_FLASH_VENDOR;
+			}
+			putc('.');
+		}
+	}
+	if (rc!=ERR_OK)
+	{
+		printf ("\n   ");
+		flash_perror (rc);
+	}
+	else
+	{
+		printf (" done\n");
+	}
+
+	udelay (10000);	/* allow flash to settle - wait 10 ms */
+
+	if (iflag)
+		enable_interrupts ();
+
+	if (cflag)
+  		icache_enable ();
+
+	return rc;
+}
+
+volatile static int amd_write_word (flash_info_t * info, ulong dest, u16 data)
+{
+	volatile u16 *addr;
+	ulong result;
+	int cflag, iflag;
+	int state;
+
+	/*
+	 * Check if Flash is (sufficiently) erased
+	 */
+	addr = (volatile u16 *) dest;
+
+	result = *addr;
+	if ((result & data) != data)
+		return ERR_NOT_ERASED;
+
+	/*
+	 * Disable interrupts which might cause a timeout
+	 * here. Remember that our exception vectors are
+	 * at address 0 in the flash, and we don't want a
+	 * (ticker) exception to happen while the flash
+	 * chip is in programming mode.
+	 */
+
+	cflag = icache_status ();
+	icache_disable ();
+	iflag = disable_interrupts ();
+
+	MEM_FLASH_ADDR1 = CMD_UNLOCK1;
+	MEM_FLASH_ADDR2 = CMD_UNLOCK2;
+	MEM_FLASH_ADDR1 = CMD_PROGRAM;
+	*addr = data;
+
+	/* arm simple, non interrupt dependent timer */
+	set_timer (0);
+
+	/* wait until flash is ready */
+	state = 0;
+	do {
+		result = *addr;
+
+		/* check timeout */
+		if (get_timer (0) > CFG_FLASH_ERASE_TOUT) {
+				state = ERR_TIMOUT;
+		}
+		if (!state && ((result & BIT_RDY_MASK) == (data & BIT_RDY_MASK)))
+			state = ERR_READY;
+
+	} while (!state);
+
+	*addr = CMD_READ_ARRAY;
+
+	if (state == ERR_READY)
+		state = ERR_OK;
+	if ((*addr != data) && (state != ERR_TIMOUT))
+		state = ERR_PROG_ERROR;
+
+	if (iflag)
+		enable_interrupts ();
+
+	if (cflag)
+		icache_enable ();
+
+	return state;
+}
+
+int amd_flash_write_buff(flash_info_t * info, uchar * src, ulong addr, ulong cnt)
+{
+	int rc;
+	ulong dest;
+	u16 data;
+
+	rc = ERR_OK;
+	if (addr & 1)
+	{
+		debug ("Byte alignment not supported\n");
+		rc = ERR_ALIGN;
+	}
+	if (cnt & 1)
+	{
+		debug ("Byte transfer not supported\n");
+		rc = ERR_ALIGN;
+	}
+
+	dest = addr;
+	while ((cnt>=2) && (rc == ERR_OK))
+	{
+		data =*((volatile u16 *) src);
+		rc=amd_write_word (info,dest,data);
+		src +=2;
+		dest +=2;
+		cnt -=2;
+	}
+	return rc;
+}
+
+int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
+{
+	int rc;
+
+	switch (info->flash_id & FLASH_VENDMASK)
+	{
+		case (AMD_MANUFACT & FLASH_VENDMASK):
+			rc = amd_flash_write_buff(info,src,addr,cnt);
+			break;
+		case (FREESCALE_MANUFACT & FLASH_VENDMASK):
+			rc = cfm_flash_write_buff(info,src,addr,cnt);
+			break;
+		default:
+			rc = ERR_UNKNOWN_FLASH_VENDOR;
+	}
+	return rc;
+
+}
+int amd_flash_protect(flash_info_t * info,long sector,int prot)
+{
+	int rc;
+	rc= ERR_OK;
+	if (prot)
+	{
+		info->protect[sector]=1;
+	}
+	else
+	{
+		info->protect[sector]=0;
+	}
+	return rc;
+}
+
+#ifdef CFG_FLASH_PROTECTION
+
+int flash_real_protect(flash_info_t * info,long sector,int prot)
+{
+	int rc;
+
+	switch (info->flash_id & FLASH_VENDMASK)
+	{
+		case (AMD_MANUFACT & FLASH_VENDMASK):
+			rc = amd_flash_protect(info,sector,prot);
+			break;
+		case (FREESCALE_MANUFACT & FLASH_VENDMASK):
+			rc = cfm_flash_protect(info,sector,prot);
+			break;
+		default:
+			rc = ERR_UNKNOWN_FLASH_VENDOR;
+	}
+	return rc;
+}
+
+#endif

board/BuS/EB+MCF-EV123/textbase.mk

@@ -0,0 +1 @@
+TEXT_BASE = 0xFFE00000

board/BuS/EB+MCF-EV123/u-boot.lds

@@ -0,0 +1,141 @@
+/*
+ * (C) Copyright 2000-2003
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(m68k)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib);
+/* Do we need any of these for elf?
+   __DYNAMIC = 0;    */
+SECTIONS
+{
+  /* Read-only sections, merged into text segment: */
+  . = + SIZEOF_HEADERS;
+  .interp : { *(.interp) }
+  .hash          : { *(.hash)		}
+  .dynsym        : { *(.dynsym)		}
+  .dynstr        : { *(.dynstr)		}
+  .rel.text      : { *(.rel.text)		}
+  .rela.text     : { *(.rela.text) 	}
+  .rel.data      : { *(.rel.data)		}
+  .rela.data     : { *(.rela.data) 	}
+  .rel.rodata    : { *(.rel.rodata) 	}
+  .rela.rodata   : { *(.rela.rodata) 	}
+  .rel.got       : { *(.rel.got)		}
+  .rela.got      : { *(.rela.got)		}
+  .rel.ctors     : { *(.rel.ctors)	}
+  .rela.ctors    : { *(.rela.ctors)	}
+  .rel.dtors     : { *(.rel.dtors)	}
+  .rela.dtors    : { *(.rela.dtors)	}
+  .rel.bss       : { *(.rel.bss)		}
+  .rela.bss      : { *(.rela.bss)		}
+  .rel.plt       : { *(.rel.plt)		}
+  .rela.plt      : { *(.rela.plt)		}
+  .init          : { *(.init)	}
+  .plt : { *(.plt) }
+  .text      :
+  {
+    /* WARNING - the following is hand-optimized to fit within	*/
+    /* the sector layout of our flash chips!	XXX FIXME XXX	*/
+
+    cpu/mcf52x2/start.o	(.text)
+    common/dlmalloc.o	(.text)
+    lib_generic/string.o	(.text)
+    lib_generic/vsprintf.o	(.text)
+    lib_generic/crc32.o	(.text)
+    lib_generic/zlib.o	(.text)
+
+/*    . = env_offset; */
+    common/environment.o(.text)
+
+    *(.text)
+    *(.fixup)
+    *(.got1)
+  }
+  _etext = .;
+  PROVIDE (etext = .);
+  .rodata    :
+  {
+    *(.rodata)
+    *(.rodata1)
+  }
+  .fini      : { *(.fini)    } =0
+  .ctors     : { *(.ctors)   }
+  .dtors     : { *(.dtors)   }
+
+  /* Read-write section, merged into data segment: */
+  . = (. + 0x00FF) & 0xFFFFFF00;
+  _erotext = .;
+  PROVIDE (erotext = .);
+    .reloc   :
+  {
+    __got_start = .;
+    *(.got)
+    __got_end = .;
+    _GOT2_TABLE_ = .;
+    *(.got2)
+    _FIXUP_TABLE_ = .;
+    *(.fixup)
+  }
+  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+  .data    :
+  {
+    *(.data)
+    *(.data1)
+    *(.sdata)
+    *(.sdata2)
+    *(.dynamic)
+    CONSTRUCTORS
+  }
+  _edata  =  .;
+  PROVIDE (edata = .);
+
+  __u_boot_cmd_start = .;
+  .u_boot_cmd : { *(.u_boot_cmd) }
+  __u_boot_cmd_end = .;
+
+  __start___ex_table = .;
+  __ex_table : { *(__ex_table) }
+  __stop___ex_table = .;
+
+  . = ALIGN(256);
+  __init_begin = .;
+  .text.init : { *(.text.init) }
+  .data.init : { *(.data.init) }
+  . = ALIGN(256);
+  __init_end = .;
+
+  __bss_start = .;
+  .bss       :
+  {
+   _sbss = .;
+   *(.sbss) *(.scommon)
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+   . = ALIGN(4);
+   _ebss = .;
+  }
+  _end = . ;
+  PROVIDE (end = .);
+}

board/LEOX/elpt860/Makefile

@@ -4,6 +4,9 @@
 # Copyright (C) 2000, 2001, 2002, 2003
 # The LEOX team <team@leox.org>, http://www.leox.org
 #
+# (C) Copyright 2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
 # LEOX.org is about the development of free hardware and software resources
 #   for system on chip.
 #
@@ -31,18 +34,22 @@
 
 include $(TOPDIR)/config.mk
 
-LIB	= lib$(BOARD).a
+LIB	= $(obj)lib$(BOARD).a
 
-OBJS	= $(BOARD).o flash.o
+COBJS	= $(BOARD).o flash.o
 
-$(LIB):	.depend $(OBJS)
-	$(AR) crv $@ $(OBJS)
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))
+
+$(LIB):	$(obj).depend $(OBJS)
+	$(AR) $(ARFLAGS) $@ $(OBJS)
 
 #########################################################################
 
-.depend:	Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
-		$(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
 
-sinclude .depend
+sinclude $(obj).depend
 
 #########################################################################

board/LEOX/elpt860/README.LEOX

@@ -124,9 +124,9 @@ nfsserverip=192.168.0.1
 preboot=echo;echo Type "run nfsboot" to mount root filesystem over NFS;echo
 gatewayip=192.168.0.1
 ramargs=setenv bootargs root=/dev/ram rw
-rootargs=setenv rootpath /tftp/$(ipaddr)
-nfsargs=setenv bootargs root=/dev/nfs rw nfsroot=$(nfsserverip):$(rootpath)
-addip=setenv bootargs $(bootargs) ip=$(ipaddr):$(nfsserverip):$(gatewayip):$(netmask):$(hostname):eth0:
+rootargs=setenv rootpath /tftp/${ipaddr}
+nfsargs=setenv bootargs root=/dev/nfs rw nfsroot=${nfsserverip}:${rootpath}
+addip=setenv bootargs ${bootargs} ip=${ipaddr}:${nfsserverip}:${gatewayip}:${netmask}:${hostname}:eth0:
 ramboot=tftp 400000 /home/leox/pMulti;run ramargs;bootm
 nfsboot=tftp 400000 /home/leox/uImage;run rootargs;run nfsargs;run addip;bootm
 bootcmd=run ramboot

board/LEOX/elpt860/elpt860.c

@@ -169,7 +169,7 @@ int board_early_init_f (void)
 
 int checkboard (void)
 {
-	unsigned char *s = getenv ("serial#");
+	char *s = getenv ("serial#");
 
 	if (!s || strncmp (s, "ELPT860", 7))
 		printf ("### No HW ID - assuming ELPT860\n");
@@ -253,7 +253,7 @@ long int initdram (int board_type)
 	 * try 8 column mode
 	 */
 	size8 = dram_size (CFG_MAMR_8COL,
-			   (ulong *) SDRAM_BASE1_PRELIM, SDRAM_MAX_SIZE);
+			   SDRAM_BASE1_PRELIM, SDRAM_MAX_SIZE);
 
 	udelay (1000);
 
@@ -261,7 +261,7 @@ long int initdram (int board_type)
 	 * try 9 column mode
 	 */
 	size9 = dram_size (CFG_MAMR_9COL,
-			   (ulong *) SDRAM_BASE1_PRELIM, SDRAM_MAX_SIZE);
+			   SDRAM_BASE1_PRELIM, SDRAM_MAX_SIZE);
 
 	if (size8 < size9) {	/* leave configuration at 9 columns       */
 		size_b0 = size9;

board/LEOX/elpt860/u-boot.lds

@@ -91,6 +91,7 @@ SECTIONS
     *(.rodata)
     *(.rodata1)
     *(.rodata.str1.4)
+    *(.eh_frame)
   }
   .fini      : { *(.fini)    } =0
   .ctors     : { *(.ctors)   }
@@ -123,10 +124,12 @@ SECTIONS
   _edata  =  .;
   PROVIDE (edata = .);
 
+  . = .;
   __u_boot_cmd_start = .;
   .u_boot_cmd : { *(.u_boot_cmd) }
   __u_boot_cmd_end = .;
 
+  . = .;
   __start___ex_table = .;
   __ex_table : { *(__ex_table) }
   __stop___ex_table = .;

board/LEOX/elpt860/u-boot.lds.debug

@@ -83,6 +83,8 @@ SECTIONS
   {
     *(.rodata)
     *(.rodata1)
+    *(.rodata.str1.4)
+    *(.eh_frame)
   }
   .fini      : { *(.fini)    } =0
   .ctors     : { *(.ctors)   }

board/MAI/AmigaOneG3SE/AmigaOneG3SE.c

@@ -1,6 +1,7 @@
 /*
  * (C) Copyright 2002
  * Hyperion Entertainment, ThomasF@hyperion-entertainment.com
+ * (C) Copyright 2006
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  *
  * See file CREDITS for list of people who contributed to this
@@ -88,8 +89,6 @@ long initdram (int board_type)
 
 void after_reloc (ulong dest_addr, gd_t *gd)
 {
-/* HJF:	DECLARE_GLOBAL_DATA_PTR; */
-
 	board_init_r (gd, dest_addr);
 }
 

board/MAI/AmigaOneG3SE/Makefile

@@ -1,5 +1,5 @@
 #
-# (C) Copyright 2002
+# (C) Copyright 2002-2006
 # Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 #
 # See file CREDITS for list of people who contributed to this
@@ -22,8 +22,12 @@
 #
 
 include $(TOPDIR)/config.mk
+ifneq ($(OBJTREE),$(SRCTREE))
+$(shell mkdir -p $(obj)../menu)
+$(shell mkdir -p $(obj)../bios_emulator)
+endif
 
-LIB	= lib$(BOARD).a
+LIB	= $(obj)lib$(BOARD).a
 
 COBJS	= $(BOARD).o articiaS.o flash.o serial.o smbus.o articiaS_pci.o \
 		via686.o i8259.o ../bios_emulator/x86interface.o 	\
@@ -31,26 +35,29 @@ COBJS	= $(BOARD).o articiaS.o flash.o serial.o smbus.o articiaS_pci.o \
 		interrupts.o ps2kbd.o video.o usb_uhci.o enet.o	        \
 		../menu/cmd_menu.o cmd_boota.o nvram.o
 
-AOBJS	= board_asm_init.o memio.o
-
-OBJS	= $(COBJS) $(AOBJS)
+SOBJS	= board_asm_init.o memio.o
 
 EMUDIR  = ../bios_emulator/scitech/src/x86emu/
 EMUOBJ  = $(EMUDIR)decode.o $(EMUDIR)ops2.o $(EMUDIR)fpu.o $(EMUDIR)prim_ops.o \
 		$(EMUDIR)ops.o $(EMUDIR)sys.o
-EMUSRC = $(EMUOBJ:.o=.c)
+EMUSRC  = $(EMUOBJ:.o=.c)
 
-$(LIB):	.depend $(OBJS) $(EMUSRC)
-	make libx86emu.a -C ../bios_emulator/scitech/src/x86emu -f makefile.uboot CROSS_COMPILE=$(CROSS_COMPILE)
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))
+EMUOBJ  := $(addprefix $(obj),$(EMUOBJ))
+
+$(LIB):	$(obj).depend $(OBJS) $(SOBJS) $(EMUSRC)
+	make $(obj)libx86emu.a -C ../bios_emulator/scitech/src/x86emu -f makefile.uboot CROSS_COMPILE=$(CROSS_COMPILE)
 	-rm $(LIB)
-	$(AR) crv $@ $(OBJS) $(EMUOBJ)
+	$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) $(EMUOBJ)
 
 
 #########################################################################
 
-.depend: Makefile $(AOBJS:.o=.S) $(COBJS:.o=.c)
-	$(CC) -M $(CFLAGS) $(AOBJS:.o=.S) $(COBJS:.o=.c) > $@
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
 
-sinclude .depend
+sinclude $(obj).depend
 
 #########################################################################

board/MAI/AmigaOneG3SE/articiaS.c

@@ -29,6 +29,8 @@
 #include "smbus.h"
 #include "via686.h"
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #undef DEBUG
 
 struct dimm_bank {
@@ -82,7 +84,6 @@ static inline unsigned short NSto10PS (unsigned char spd_byte)
 
 long detect_sdram (uint8 * rom, int dimmNum, struct dimm_bank *banks)
 {
-    DECLARE_GLOBAL_DATA_PTR;
 	int dimm_address = (dimmNum == 0) ? SM_DIMM0_ADDR : SM_DIMM1_ADDR;
 	uint32 busclock = gd->bus_clk;
 	uint32 memclock = busclock;
@@ -394,8 +395,6 @@ uint32 burst_to_len (uint32 support)
 
 long articiaS_ram_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	register uint32 i;
 	register uint32 value1;
 	register uint32 value2;

board/MAI/AmigaOneG3SE/articiaS_pci.c

@@ -26,6 +26,8 @@
 #include "memio.h"
 #include "articiaS.h"
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #undef ARTICIA_PCI_DEBUG
 
 #ifdef  ARTICIA_PCI_DEBUG
@@ -493,8 +495,6 @@ pci_dev_t video_dev;
 
 int articiaS_init_vga (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
     extern void shutdown_bios(void);
     pci_dev_t dev = ~0;
     int busnr = 0;

board/MAI/AmigaOneG3SE/cmd_boota.c

@@ -3,6 +3,7 @@
 #include "../disk/part_amiga.h"
 #include <asm/cache.h>
 
+DECLARE_GLOBAL_DATA_PTR;
 
 #undef BOOTA_DEBUG
 
@@ -108,8 +109,6 @@ int do_boota (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 
 	s = getenv ("autostart");
 	if (s && strcmp (s, "yes") == 0) {
-		DECLARE_GLOBAL_DATA_PTR;
-
 		void (*boot) (bd_t *, char *, block_dev_desc_t *);
 		char *args;
 

board/MAI/AmigaOneG3SE/ps2kbd.c

@@ -656,7 +656,7 @@ char * kbd_initialize(void)
 			      | KBD_MODE_DISABLE_MOUSE
 			      | KBD_MODE_KCC);
 
-	/* ibm powerpc portables need this to use scan-code set 1 -- Cort */
+	/* AMCC powerpc portables need this to use scan-code set 1 -- Cort */
 	kbd_write_command_w(KBD_CCMD_READ_MODE);
 	if (!(kbd_wait_for_input() & KBD_MODE_KCC)) {
 		/*

board/MAI/AmigaOneG3SE/serial.c

@@ -4,6 +4,8 @@
 #include "memio.h"
 #include "articiaS.h"
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #ifndef CFG_NS16550
 static uint32 ComPort1;
 
@@ -150,8 +152,6 @@ const NS16550_t Com1 = (NS16550_t) CFG_NS16550_COM2;
 
 int serial_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	uint32 clock_divisor = 115200 / gd->baudrate;
 
 	NS16550_init (Com0, clock_divisor);
@@ -239,8 +239,6 @@ void serial_puts (const char *string)
 
 void serial_setbrg (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	uint32 clock_divisor = 115200 / gd->baudrate;
 
 	NS16550_init (Com0, clock_divisor);

board/MAI/AmigaOneG3SE/u-boot.lds

@@ -76,6 +76,7 @@ SECTIONS
     *(.rodata)
     *(.rodata1)
     *(.rodata.str1.4)
+    *(.eh_frame)
   }
   .fini      : { *(.fini)    } =0
   .ctors     : { *(.ctors)   }
@@ -108,11 +109,13 @@ SECTIONS
   _edata  =  .;
   PROVIDE (edata = .);
 
+  . = .;
   __u_boot_cmd_start = .;
   .u_boot_cmd : { *(.u_boot_cmd) }
   __u_boot_cmd_end = .;
 
 
+  . = .;
   __start___ex_table = .;
   __ex_table : { *(__ex_table) }
   __stop___ex_table = .;

board/MAI/AmigaOneG3SE/via686.c

@@ -28,6 +28,8 @@
 #include "via686.h"
 #include "i8259.h"
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #undef VIA_DEBUG
 
 #ifdef  VIA_DEBUG
@@ -226,33 +228,31 @@ __asm         ("    .globl via_calibrate_time_base \n"
 
 extern unsigned long via_calibrate_time_base(void);
 
-void via_calibrate_bus_freq(void)
+void via_calibrate_bus_freq (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
+	unsigned long tb;
 
-    unsigned long tb;
+	/* This is 20 microseconds */
+#define CALIBRATE_TIME 28636
 
-    /* This is 20 microseconds */
-    #define CALIBRATE_TIME 28636
+	/* Enable the timer (and disable speaker) */
+	unsigned char c;
 
+	c = in_byte (0x61);
+	out_byte (0x61, ((c & ~0x02) | 0x01));
 
-    /* Enable the timer (and disable speaker) */
-    unsigned char c;
-    c = in_byte(0x61);
-    out_byte(0x61, ((c & ~0x02) | 0x01));
+	/* Set timer 2 to low/high writing */
+	out_byte (0x43, 0xb0);
+	out_byte (0x42, CALIBRATE_TIME & 0xff);
+	out_byte (0x42, CALIBRATE_TIME >> 8);
 
-    /* Set timer 2 to low/high writing */
-    out_byte(0x43, 0xb0);
-    out_byte(0x42, CALIBRATE_TIME & 0xff);
-    out_byte(0x42, CALIBRATE_TIME >>8);
+	/* Read the time base */
+	tb = via_calibrate_time_base ();
 
-    /* Read the time base */
-    tb = via_calibrate_time_base();
-
-    if (tb >= 700000)
-	gd->bus_clk = 133333333;
-    else
-	gd->bus_clk = 100000000;
+	if (tb >= 700000)
+		gd->bus_clk = 133333333;
+	else
+		gd->bus_clk = 100000000;
 
 }
 

board/MAI/AmigaOneG3SE/video.c

@@ -26,6 +26,8 @@
 #include "memio.h"
 #include <part.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 unsigned char *cursor_position;
 unsigned int cursor_row;
 unsigned int cursor_col;
@@ -480,7 +482,6 @@ extern char version_string[];
 void video_banner(void)
 {
     block_dev_desc_t *ide;
-    DECLARE_GLOBAL_DATA_PTR;
     int i;
     char *s;
     int maxdev;