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124 Commits

Author SHA1 Message Date
wdenk
eeacb89cb3 help text cleanup 2003-06-28 23:18:28 +00:00
wdenk
3d96ede975 Fix duplicate command entry. 2003-06-28 23:13:56 +00:00
wdenk
9d2b18a0f9 Rewrite command lookup and help command (fix problems with bubble
sort when sorting command name list). Minor cleanup here and there.
2003-06-28 23:11:04 +00:00
wdenk
d1cbe85b08 Merge from "stable branch", tag LABEL_2003_06_28_1800-stable:
- Allow to call sysmon function interactively
- PIC on LWMON board needs delay after power-on
- Add missing RSR definitions for MPC8xx
- Improve log buffer handling: guarantee clean reset after power-on
- Add support for EXBITGEN board
- Add support for SL8245 board
2003-06-28 17:24:46 +00:00
wdenk
8bde7f776c * Code cleanup:
- remove trailing white space, trailing empty lines, C++ comments, etc.
  - split cmd_boot.c (separate cmd_bdinfo.c and cmd_load.c)

* Patches by Kenneth Johansson, 25 Jun 2003:
  - major rework of command structure
    (work done mostly by Michal Cendrowski and Joakim Kristiansen)
2003-06-27 21:31:46 +00:00
wdenk
993cad9364 * Patches by Robert Schwebel, 26 Jun 2003:
- logdl
  - csb226
  - innokom

* Patch by Pantelis Antoniou, 25 Jun 2003:
  update NetVia with V2 board support
2003-06-26 22:04:09 +00:00
wdenk
b783edaee8 * Header file cleanup for ARM
* Patch by Murray Jensen, 24 Jun 2003:
  - make sure to use only U-boot provided header files
  - fix problems with ".rodata.str1.4" section as used by GCC-3.x
2003-06-25 22:26:29 +00:00
stroese
a300d83cb8 Patch from Stefan Roese. 2003-06-24 14:32:24 +00:00
stroese
a6457f7971 - Remove EEPROM command. 2003-06-24 14:31:16 +00:00
stroese
a0e135b493 - Add ping support. 2003-06-24 14:30:28 +00:00
stroese
e118e233a8 - Update NAND FLASH support. 2003-06-24 14:27:27 +00:00
stroese
95aeb34580 - Update new fpga file. 2003-06-24 14:26:41 +00:00
wdenk
cceb871fff * Patch by Yuli Barcohen, 23 Jun 2003:
Update for MPC8260ADS board

* Patch by Murray Jensen, 23 Jun 2003:
  - cleanup of GCC 3.x compiler warnings
2003-06-23 18:12:28 +00:00
wdenk
3595ac4979 * Patch by Rune Torgersen, 4 Jun 2003:
add large memory support for MPC8266ADS board

* Patch by Richard Woodruff, 19 June 03:
  - Enabled standard u-boot device abstraction for ARM
  - Enabled console device for ARM
  - Initilized bi_baudrate for ARM

* Patch by Bill Hargen, 23 Apr 2003:
  fix byte order for 824x I2C addresses (write op)
2003-06-22 17:18:28 +00:00
wdenk
9a0e21a3a8 Had to move the RTC area for ATC board to upper addresses
(0xf5000000, to be specific). The reason is that the RTC first gets
accessed before MMU is initialized and, consequently, it needs to be
placed at physical addresses which are later mapped to the same
virtual addresses (like 0xf5000000 physical is mapped to 0xf5000000
virtual).
2003-06-22 10:30:54 +00:00
wdenk
592c5cabe7 Patch by Murray Jensen, 20 Jun 2003:
- hymod update
- cleanup (especially for gcc-3.x compilers)
2003-06-21 00:17:24 +00:00
wdenk
72755c7137 Patch by Tom Guilliams, 20 Jun 2003:
added CONFIG_750FX support for IBM 750FX processors
2003-06-20 23:10:58 +00:00
wdenk
0332990b85 * Patch by Devin Crumb, 02 Apr 2003:
Fix clock divider rounding problem in drivers/serial.c

* Patch by Ken Chou, 19 June 2003:
  Added support for A3000 SBC board (Artis Microsystems Inc.)
2003-06-20 22:36:30 +00:00
wdenk
0b97ab144f * Patch by Richard Woodruff, 19 June 03:
- Fixed smc91c111 driver to sync with the u-boot environment (driver/smc91c111.c).
- Added eth_init error return check in NetLoop (net/net.c).
2003-06-19 23:58:30 +00:00
wdenk
6dd652fa4d Patches by Murray Jensen, 17 Jun 2003:
- Hymod board database mods: add "who" field and new xilinx chip types
- provide new "init_cmd_timeout()" function so code external to
  "common/main.c" can use the "reset_cmd_timeout()" function before
  entering the main loop
- add DTT support for adm1021 (new file dtt/adm1021.c; config
  slightly different. see include/configs/hymod.h for an example
  (requires CONFIG_DTT_ADM1021, CONFIG_DTT_SENSORS, and
  CFG_DTT_ADM1021 defined)
- add new "eeprom_probe()" function which has similar args and
  behaves in a similar way to "eeprom_read()" etc.
- add 8260 FCC ethernet loopback code (new "eth_loopback_test()"
  function which is enabled by defining CONFIG_ETHER_LOOPBACK_TEST)
- gdbtools copyright update
- ensure that set_msr() executes the "sync" and "isync" instructions
  after the "mtmsr" instruction in cpu/mpc8260/interrupts.c
- 8260 I/O ports fix: Open Drain should be set last when configuring
- add SIU IRQ defines for 8260
- allow LDSCRIPT override and OBJCFLAGS initialization: change to
  config.mk to allow board configurations to override the GNU
  linker script, selected via the LDSCRIPT, make variable, and to
  give an initial value to the OBJCFLAGS make variable
- 8260 i2c enhancement:
  o correctly extends the timeout depending on the size of all
    queued messages for both transmit and receive
  o will not continue with receive if transmit times out
  o ensures that the error callback is done for all queued tx
    and rx messages
  o correctly detects both tx and rx timeouts, only delivers one to
    the callback, and does not overwrite an earlier error
  o logic in i2c_probe now correct
- add "vprintf()" function so that "panic()" function can be
  technically correct
- many Hymod board changes
2003-06-19 23:40:20 +00:00
wdenk
52f52c1494 Patches by Robert Schwebel, 14 Jun 2003:
- add support for Logotronic DL datalogger board
- cleanup serial line after kermit binary download
- add debugX macro (debug level support)
- update mach-types.h to latest arm.linux.org.uk master list.
2003-06-19 23:04:19 +00:00
wdenk
48b42616e9 * Patches by David Mller, 12 Jun 2003:
- rewrite of the S3C24X0 register definitions stuff
  - "driver" for the built-in S3C24X0 RTC

* Patches by Yuli Barcohen, 12 Jun 2003:
  - Add MII support and Ethernet PHY initialization for MPC8260ADS board
  - Fix incorrect SIUMCR initialisation caused by wrong Hard Reset
    configuration word supplied by FPGA on some MPC8260ADS boards

* Patch by Pantelis Antoniou, 10 Jun 2003:
  Unify status LED interface
2003-06-19 23:01:32 +00:00
wdenk
15ef8a5d17 Add support for DS12887 RTC; add RTC support for ATC board 2003-06-18 20:22:24 +00:00
wdenk
2abbe07547 * Patch by Nicolas Lacressonniere, 11 Jun 2003:
Modifications for Atmel AT91RM9200DK ARM920T based development kit
  - Add Atmel DataFlash support for reading and writing.
  - Add possibility to boot a Linux from DataFlash with BOOTM command.
  - Add Flash detection on Atmel AT91RM9200DK
    (between Atmel AT49BV1614 and AT49BV1614A flashes)
  - Replace old Ethernet PHY layer functions
  - Change link address

* Patch by Frank Smith, 9 Jun 2003:
  use CRIT_EXCEPTION for machine check on 4xx

* Patch by Detlev Zundel, 13 Jun 2003:
  added implementation of the "carinfo" command in cmd_immap.c
2003-06-16 23:50:08 +00:00
wdenk
71f9511803 * Fix CONFIG_NET_MULTI support in include/net.h
* Patches by Kyle Harris, 13 Mar 2003:
  - Add FAT partition support
  - Add command support for FAT
  - Add command support for MMC
  ----
  - Add Intel PXA support for video
  - Add Intel PXA support for MMC
  ----
  - Enable MMC and FAT for lubbock board
  - Other misc changes for lubbock board
2003-06-15 22:40:42 +00:00
wdenk
487778b781 Patch by Robert Schwebel, April 02, 2003:
fix for SMSC91111 driver
2003-06-06 11:20:01 +00:00
stroese
8b601449e8 - Update new fpga file. 2003-06-06 09:44:40 +00:00
stroese
e58dc13283 - Fix compile bug (PPC4xx). 2003-06-06 09:43:42 +00:00
wdenk
a3ed3996cd * Patch by Vladimir Gurevich, 04 Jun 2003:
make ppc405 ethernet driver compatible with CONFIG_NET_MULTI option
2003-06-05 19:37:36 +00:00
wdenk
73a8b27c57 * Add support for RMU board
* Add support for TQM862L at 100/50 MHz

* Patch by Pantelis Antoniou, 02 Jun 2003:
  major reconstruction of networking code;
  add "ping" support (outgoing only!)
2003-06-05 19:27:42 +00:00
stroese
08eaea9c9f Patch from Stefan Roese. 2003-06-05 15:44:37 +00:00
stroese
53cf9435cc - CFG_RX_ETH_BUFFER added. 2003-06-05 15:39:44 +00:00
stroese
c602883592 - CFG_ETH_RX_BUFFER added. 2003-06-05 15:38:29 +00:00
stroese
3720878599 - Fix bug for initial stack in data cache as pointed out by Thomas Schaefer (tschaefer@giga-stream.de). Now inital stack in data cache can be used even if the chip select is in use. 2003-06-05 15:35:20 +00:00
wdenk
f3e0de60a6 * Patch by Denis Peter, 04 June 2003:
add support for the MIP405T board
2003-06-04 15:05:30 +00:00
wdenk
682011ff69 * Patches by Udi Finkelstein, 2 June 2003:
- Added support for custom keyboards, initialized by defining a
    board-specific drv_keyboard_init as well as defining CONFIG_KEYBOARD .
  - Added support for the RBC823 board.
  - cpu/mpc8xx/lcd.c now automatically calculates the
    Horizontal Pixel Count field.

* Fix alignment problem in BOOTP (dhcp_leasetime option)
  [pointed out by Nicolas Lacressonnire, 2 Jun 2003]

* Patch by Mark Rakes, 14 May 2003:
  add support for Intel e1000 gig cards.

* Patch by Nye Liu, 3 Jun 2003:
  fix critical typo in MAMR definition (include/mpc8xx.h)

* Fix requirement to align U-Boot image on 16 kB boundaries on PPC.

* Patch by Klaus Heydeck, 2 Jun 2003
  Minor changes for KUP4K configuration
2003-06-03 23:54:09 +00:00
wdenk
7a8e9bed17 * Patch by Marc Singer, 29 May 2003:
Fixed rarp boot method for IA32 and other little-endian CPUs.

* Patch by Marc Singer, 28 May 2003:
  Added port I/O commands.

* Patch by Matthew McClintock, 28 May 2003
  - cpu/mpc824x/start.S: fix relocation code when booting from RAM
  - minor patches for utx8245

* Patch by Daniel Engstrm, 28 May 2003:
  x86 update

* Patch by Dave Ellis, 9 May 2003 + 27 May 2003:
  add nand flash support to SXNI855T configuration
  fix/extend nand flash support:
  - fix 'nand erase' command so does not erase bad blocks
  - fix 'nand write' command so does not write to bad blocks
  - fix nand_probe() so handles no flash detected properly
  - add doc/README.nand
  - add .jffs2 and .oob options to nand read/write
  - add 'nand bad' command to list bad blocks
  - add 'clean' option to 'nand erase' to write JFFS2 clean markers
  - make NAND read/write faster

* Patch by Rune Torgersen, 23 May 2003:
  Update for MPC8266ADS board
2003-05-31 18:35:21 +00:00
wdenk
3b57fe0a70 * Get (mostly) rid of CFG_MONITOR_LEN definition; compute real length
instead CFG_MONITOR_LEN is now only used to determine  _at_compile_
  _time_  (!) if the environment is embedded within the U-Boot image,
  or in a separate flash sector.

* Cleanup CFG_DER #defines in config files (wd maintained only)
2003-05-30 12:48:29 +00:00
wdenk
f07771cc28 * Fix data abort exception handling for arm920t CPU
* Fix alignment problems with flash driver for TRAB board

* Patch by Donald White, 21 May 2003:
  fix calculation of base address in pci_hose_config_device()

* Fix bug in command line parsing: "cmd1;cmd2" is supposed to always
  execute "cmd2", even if "cmd1" fails. Note that this is different
  to "run var1 var2" where the contents of "var2" will NOT be
  executed when a command in "var1" fails.
2003-05-28 08:06:31 +00:00
wdenk
38b99261c1 Add zero-copy ramdisk support (requires corresponding kernel support!) 2003-05-23 23:18:21 +00:00
wdenk
4c3b21a5f9 Patch by Kyle Harris, 20 May 2003:
In preparation for an ixp port, rename cpu/xscale and arch-xscale
into cpu/pxa and arch-pxa.
2003-05-23 12:36:20 +00:00
stroese
d9ff6e84e4 Patch from Stefan Roese. 2003-05-23 11:49:24 +00:00
stroese
e1e89324ad - ASH405 board added (PPC405EP based).
- CPCI4052 added (PPC405GP based).
- CPCI405AB added (PPC405GP based).
- PCI405 added (PPC405GP based).
- PMC405 added (PPC405GP based).
2003-05-23 11:43:00 +00:00
stroese
549826eaa0 - ASH405 board added (PPC405EP based).
- BUBINGA405EP added (PPC405EP based).
- CPCI405AB added (PPC405GP based).
- PMC405 added (PPC405GP based).
2003-05-23 11:41:44 +00:00
stroese
1d49b1f365 CONFIG_UART1_CONSOLE added. 2003-05-23 11:39:05 +00:00
wdenk
33149b8812 Patch by Denis Peter, 19 Mai 2003:
add support for the MIP405-3 board
2003-05-23 11:38:58 +00:00
stroese
9919f13cc1 DHCP support added. 2003-05-23 11:38:22 +00:00
stroese
071d897c96 PMC405 board added. 2003-05-23 11:35:47 +00:00
stroese
3871842529 Code cleanup. 2003-05-23 11:35:09 +00:00
stroese
b6d9e4f5af New FPGA image with 527 support. 2003-05-23 11:34:40 +00:00
stroese
1545ad35c5 Local Bus Timeout increased. 2003-05-23 11:33:57 +00:00
stroese
c231d00f4e Code reworked for PPC405EP support. 2003-05-23 11:32:53 +00:00
stroese
d4629c8c8d CPCI405AB (special version of esd CPCI405) board added. 2003-05-23 11:30:39 +00:00
stroese
46578cc018 BUBINGA405EP board added (IBM PPC405EP Eval Board). 2003-05-23 11:28:55 +00:00
stroese
c93f70962b ASH405 board added (PPC405EP based). 2003-05-23 11:27:18 +00:00
stroese
8749cfb44e - PPC405EP support added.
- CONFIG_UART1_CONSOLE added (see README).
2003-05-23 11:25:57 +00:00
stroese
b867d705b6 PPC405EP support added. 2003-05-23 11:18:02 +00:00
stroese
bedc497029 - PPC405EP support added.
- "nand_init" (NAND FLASH) added.
2003-05-23 11:16:49 +00:00
wdenk
5d232d0e7e * Patch by Dave Ellis, 22 May 2003:
Fix problem with only partially cleared .bss segment

* Patch by Rune Torgersen, 12 May 2003:
  get PCI to work on a MPC8266ADS board; incorporate change to
  cpu/mpc8260/pci.c to enable overrides of PCI memory parameters
2003-05-22 22:52:13 +00:00
wdenk
c8c3a8be2d Add support for arbitrary bitmaps for TRAB's VFD command;
allow to pass boot bitmap addresses in environment variables;
allow for zero boot delay
2003-05-21 20:26:20 +00:00
wdenk
82226bf4d2 * Add support for arbitrary bitmaps for TRAB's VFD command
* Patch by Christian Geiinger, 19 May 2002:
  On TRAB: wait until the dummy byte has been completely sent
2003-05-20 20:49:01 +00:00
wdenk
7f70e85309 * Patch by David Updegraff, 22 Apr 2003:
update for CrayL1 board

* Patch by Pantelis Antoniou, 21 Apr 2003:
  add boot support for ARTOS (a proprietary OS)

* Patch by Steven Scholz, 11 Apr 2003:
  Add support for RTC DS1338

* Patch by Rod Boyce, 24 Jan 2003:
  Fix counting of extended partitions in diskboot command
2003-05-20 14:25:27 +00:00
wdenk
59de2ed6b5 Patch by Christophe Lindheimer, 20 May 2003:
allow the use of CFG_LOADS when CFG_NO_FLASH is set
2003-05-20 10:58:04 +00:00
wdenk
86d82762f6 Fix SDRAM timing on Purple board 2003-05-20 10:39:44 +00:00
wdenk
66fd3d1ce7 Add support for CompactFlash on ATC board
(includes support for Intel 82365 and compatible PC Card controllers,
and Yenta-compatible PCI-to-CardBus controllers)
2003-05-18 11:30:09 +00:00
wdenk
45219c4660 Patch by Mathijs Haarman, 08 May 2003:
Add lan91c96 driver (tested on Lubbock and custom PXA250 board only)
2003-05-12 21:50:16 +00:00
wdenk
f7de16ae25 Fix SDRAM initialization 2003-05-12 09:51:52 +00:00
wdenk
d6815435c0 Add default switch settings. 2003-05-12 09:51:00 +00:00
wdenk
e600962991 Fix ATC board configuration and flash driver 2003-05-05 17:09:41 +00:00
wdenk
9c62cc58b8 Fix problem with usage of "true" (undefined in current versions of bfd.h) 2003-05-03 23:33:47 +00:00
wdenk
7aa7861471 * Add support for Promess ATC board
* Patch by Keith Outwater, 28 Apr 2003:
  - Miscellaneous corrections and additions to GEN860T board specific code.
  - Added GEN860_SC variant to GEN860T.
  - Miscellaneous corrections to GEN860T documentation.
  - Correct duplicate entry in U-Boot CREDITS file.
  - Add GEN860T_SC entry in MAINTAINERS file.
  - Update CREDITS file with GEN860T_SC info.

* Update Smiths Aerospace addresses in MAINTAINERS file

* Fix error handling in hush's version of "run" command
2003-05-03 15:50:43 +00:00
wdenk
4532cb696e * LWMON extensions:
- Splashscreen support
  - modem support
  - sysmon support
  - temperature dependend enabling of LCD

* Allow booting from old "PPCBoot" disk partitions

* Add support for TQM8255 Board / MPC8255 CPU
2003-04-27 22:52:51 +00:00
wdenk
02c9bed451 *** empty log message *** 2003-04-20 17:41:25 +00:00
wdenk
53cad435bb Make compile clean 2003-04-20 17:26:01 +00:00
wdenk
059ae173e9 Add files needed for bitmap load support 2003-04-20 16:52:09 +00:00
wdenk
824a1ebffe Compile fixes 2003-04-20 16:49:37 +00:00
wdenk
d791b1dc3e * Make sure Block Lock Bits get cleared in R360MPI flash driver
* MPC823 LCD driver: Fill color map backwards, to allow for steady
  display when Linux takes over

* Patch by Erwin Rol, 27 Feb 2003:
  Add support for RTEMS (this time for real).

* Add support for "bmp info" and "bmp display" commands to load
  bitmap images; this can be used (for example in a "preboot"
  command) to display a splash screen very quickly after poweron.

* Add support for 133 MHz clock on INCA-IP board
2003-04-20 14:04:18 +00:00
wdenk
4a6fd34b26 * Patch by Lutz Dennig, 10 Apr 2003:
Update for R360MPI board

* Add new meaning to "autostart" environment variable:
  If set to "no", a standalone image passed to the
  "bootm" command will be copied to the load address
  (and eventually uncompressed), but NOT be started.
  This can be used to load and uncompress arbitrary
  data.

* Set max brightness for MN11236 displays on TRAB board
2003-04-12 23:38:12 +00:00
stroese
69f8f827d5 Patch from Stefan Roese. 2003-04-10 13:30:28 +00:00
stroese
759a51b4f3 Changed DHCP client to use ip address from server option field #54 from the OFFER-paket in the server option field #54 in the REQUEST-paket. This fixes a problem using a Windows 2000 DHCP server, where the DHCP-server is not the TFTP-server. 2003-04-10 13:26:44 +00:00
wdenk
d126bfbdbd Add support for TQM862L modules 2003-04-10 11:18:18 +00:00
wdenk
60fbe25424 Prepare for 0.3.0 release
* Add support for Purple Board (MIPS64 5Kc)

* Add support for MIPS64 5Kc CPUs
2003-04-08 23:25:21 +00:00
wdenk
3e38691e8f * Patch by Arun Dharankar, 4 Apr 2003:
Add IDMA example code (tested on 8260 only)

* Add support for Purple Board (MIPS64 5Kc)

* Add support for MIPS64 5Kc CPUs

* Fix missing setting of "loadaddr" and "bootfile" on ARM and MIPS

* Patch by Denis Peter, 04 Apr 2003:
  - update MIP405-4 board

* Patches by Denis Peter, 03 April 2003:
  - fix PCI IRQs on MPL boards
  - fix two more un-relocated pointer problems

* Fix behaviour of "run" command:
  - print error message iv variable does not exist
  - terminate processing of arguments in case of error

* Patches by Peter Figuli, 10 Mar 2003
  - Add support for BTUART on PXA platform
  - Add support for WEP EP250 (PXA) board

* Fix flash problems on INCA-IP; add tool to allow bruning images  to
  flash using a BDI2000

* Implement fix for I2C Edge Conditions problem for all boards that
  use the bit-banging driver (common/soft_i2c.c)

* Add patches by Robert Schwebel, 31 Mar 2003:
  - csb226 board: bring in sync with innokom/memsetup.S
  - csb226 board: fix MDREFR handling
  - misc doc fixes / extensions
  - innokom board: cleanup, MDREFR fix in memsetup.S, config update
  - add BOOT_PROGRESS to armlinux.c
2003-04-05 00:53:31 +00:00
stroese
36c05a80ec Patch from Stefan Roese. 2003-04-04 16:55:30 +00:00
stroese
afcc4a7404 Changed CPCI405 to use CTS instead of DSR on PPC405 UART1. 2003-04-04 16:52:57 +00:00
stroese
9e7d5ebea9 U-Boot version environment variable "ver" added (CONFIG_VERSION_VARIABLE). 2003-04-04 16:48:07 +00:00
stroese
baa3d528fe Changed PPC405GPr version from A to B. 2003-04-04 16:00:33 +00:00
stroese
c1551ea817 U-Boot version environment variable "ver" added (CONFIG_VERSION_VARIABLE). 2003-04-04 15:53:41 +00:00
stroese
0587597ca3 U-Boot version environment variable "ver" added (CONFIG_VERSION_VARIABLE). 2003-04-04 15:44:49 +00:00
wdenk
0db5bca807 * Patch by Martin Winistoerfer, 23 Mar 2003
- Add port to MPC555/556 microcontrollers
  - Add support for cmi customer board with
    Intel 28F128J3A, 28F320J3A or 28F640J3A flash.

* Patch by Rick Bronson, 28 Mar 2003:
  - fix common/cmd_nand.c
2003-03-31 17:27:09 +00:00
wdenk
85ec0bcc1b * Patch by Arun Dharankar, 24 Mar 2003:
- add threads / scheduler example code

* Add patches by Robert Schwebel, 31 Mar 2003:
  - add ctrl-c support for kermit download
  - align bdinfo output on ARM

* Add CPU ID, version, and clock speed for INCA-IP
2003-03-31 16:34:49 +00:00
wdenk
506f044131 Patches by Dave Ellis, 18 Mar 2003 for SXNI855T board:
- fix SRAM and SDRAM memory sizing
- add status LED support
- add MAC address for second (SCC1) ethernet port

Update default environment for TQM8260 board
2003-03-28 14:40:36 +00:00
wdenk
cdd8a0f151 Fix MIPS build problem 2003-03-27 18:00:16 +00:00
wdenk
c021880ac5 * Add support for MIPS32 4Kc CPUs
* Add support for INCA-IP Board
2003-03-27 12:09:35 +00:00
wdenk
ac6dbb85b7 Make compile clean, fix the usual small problems. 2003-03-26 11:42:53 +00:00
stroese
2a46cabd77 esd PCI405 updated. 2003-03-26 10:36:12 +00:00
wdenk
dc7c9a1a52 * Patch by Rick Bronson, 16 Mar 2003:
Add support for Atmel AT91RM9200DK w/NAND

* Patches by Robert Schwebel, 19 Mar 2003:
  - use arm-linux-gcc as default compiler for ARM
  - fix i2c fixup code
  - fix missing baudrate setting
  - added $loadaddr / CFG_LOAD_ADDR support to loadb
  - moved "ignoring trailing characters" _before_ u-boot wants to
    print out diagnostics messages; removes bogus characters at the
    end of transmission

* Patch by John Zhan, 18 Mar 2003:
  Add support for SinoVee Microsystems SC8xx boards

* Patch by Rolf Offermanns, 21 Mar 2003:
  ported the dnp1110 related changes from the current armboot cvs to
  current u-boot cvs. smc91111 does not work. problem marked in
  smc91111.c, grep for "FIXME".

* Patch by Brian Auld, 25 Mar 2003:
  Add support for STM flash chips on ebony board

 * Add PCI support for MPC8250 Boards (PM825 module)

 * Patch by Stefan Roese, 25 Mar 2003:
2003-03-26 06:55:25 +00:00
wdenk
10f670178c *** empty log message *** 2003-03-25 18:06:06 +00:00
wdenk
4d75a504d0 Add PCI support for MPC8250 Boards (PM825 module) 2003-03-25 16:50:56 +00:00
stroese
44e5c5c4f1 Patch by Stefan Roese , 25 Mar 2003. 2003-03-25 14:44:48 +00:00
stroese
a02ab7d184 BSP-Command for esd PCI405 added. 2003-03-25 14:43:01 +00:00
stroese
d69b100e70 esd PCI405 updated. 2003-03-25 14:41:35 +00:00
stroese
5d5d44e717 Patch by Stefan Roese , 20 Mar 2003. 2003-03-20 15:32:59 +00:00
stroese
6f4474e87b CPCI4052 update (support for revision 3). 2003-03-20 15:31:19 +00:00
stroese
97a43d641d Added edge conditioning register (ecr) for PPC405GPr. 2003-03-20 15:27:41 +00:00
stroese
7e11d8269e Clip udiv to 5 bits on PPC405 (serial.c). 2003-03-20 15:25:59 +00:00
stroese
38daa27d21 Set edge conditioning circuitry on PPC405GPr for compatibility to existing PPC405GP designs. 2003-03-20 15:21:50 +00:00
wdenk
1957dd29d9 Add files that were forgotten 2003-03-14 21:34:25 +00:00
wdenk
06d01dbe00 * Avoid flicker on the TRAB's VFD by synchronizing the enable with
the HSYNC/VSYNC. Requires new CPLD code (Version 101 for Rev. 100
  boards, version 153 for Rev. 200 boards).

* Patch by Vladimir Gurevich, 12 Mar 2003:
  Fix relocation problem of statically initialized string pointers
  in common/cmd_pci.c

* Patch by Kai-Uwe Blm, 12 Mar 2003:
  Cleanup & bug fixes for JFFS2 code:
  - the memory mangement was broken. It caused havoc on malloc by
    writing beyond the block boundaries.
  - the length calculation for files was wrong, sometimes resulting
    in short file reads.
  - data copying now optionally takes fragment version numbers into
    account, to avoid copying from older data.
  See doc/README.JFFS2 for details.
2003-03-14 20:47:52 +00:00
wdenk
09127c6096 Cleanup compiler warning 2003-03-12 10:43:01 +00:00
wdenk
3bac351370 * Patch by Josef Wagner, 12 Mar 2003:
- 16/32 MB and 50/80 MHz support with auto-detection for IP860
  - ETH05 and BEDBUG support for CU824
  - added support for MicroSys CPC45
  - new BOOTROM/FLASH0 and DOC base for PM826

* Patch by Robert Schwebel, 12 Mar 2003:
  Fix the chpart command on innokom board

* Name cleanup:
  mv include/asm-i386/ppcboot-i386.h include/asm-i386/u-boot-i386.h
  s/PPCBoot/U-Boot/ in some files
  s/pImage/uImage/  in some files

* Patch by Detlev Zundel, 15 Jan 2003:
  Fix '' command line quoting

* Patch by The LEOX team, 19 Jan 2003:
  - add support for the ELPT860 board
  - add support for Dallas ds164x RTC
2003-03-12 10:41:04 +00:00
wdenk
1cb8e980c4 * Patches by David Mller, 31 Jan 2003:
- minimal setup for CardBus bridges
  - add EEPROM read/write support in the CS8900 driver
  - add support for the builtin I2C controller in the Samsung s3c24x0 chips
  - add support for  MPL's VCMA9 (Samsung s3c2410 based) board

* Patch by Steven Scholz, 04 Feb 2003:
  add support for RTC DS1307

* Patch by Reinhard Meyer, 5 Feb 2003:
  fix PLPRCR/SCCR init sequence on 8xx to allow for
  changes of EBDF by software

* Patch by Vladimir Gurevich, 07 Feb 2003:
  "API-compatibility patch" for 4xx I2C driver
2003-03-06 21:55:29 +00:00
wdenk
500545cc6b Fix problem with default #defines
Cleanup compiler warning
2003-03-06 14:23:06 +00:00
wdenk
47cd00fa70 * Patches by Robert Schwebel, 06 Mar 2003:
- fix bug in BOOTP code (must use NetCopyIP)
  - update of CSB226 port
  - clear BSS segment on XScale
  - added support for i2c_init_board() function
  - update to the Innokom plattform

* Extend support for redundand environments for configurations where
  environment size < sector size
2003-03-06 13:39:27 +00:00
wdenk
db2f721ffc * Patch by Rune Torgersen, 13 Feb 2003:
Add support for Motorola MPC8266ADS board

* Patch by Kyle Harris, 19 Feb 2003:
  patches for the Intel lubbock board:
  memsetup.S - general cleanup (based on Robert's csb226 code)
  flash.c - overhaul, actually works now
  lubbock.c - fix init funcs to return proper value

* Patch by Kenneth Johansson, 26 Feb 2003:
  - Fixed off by one in RFTA calculation.
  - No need to abort when LDF is lower than we can program it's only
    minimum timing so clamp it to what we can do.
  - Takes function pointer to function for reading the spd_nvram. Usefull
    for faking data or hardcode a module without the nvram.
  - fix other user for above change
  - fix some comments.

* Patches by Brian Waite, 26 Feb 2003:
  - fix port for evb64260 board
  - fix PCI for evb64260 board
  - fix PCI scan

* Patch by Reinhard Meyer, 1 Mar 2003:
  Add support for EMK TOP860 Module

* Patch by Yuli Barcohen, 02 Mar 2003:
  Add SPD EEPROM support for MPC8260ADS board
2003-03-06 00:58:30 +00:00
wdenk
43d9616cff * Patch by Robert Schwebel, 21 Jan 2003:
- Add support for Innokom board
  - Don't complain if "install" fails
  - README cleanup (remove duplicated lines)
  - Update PXA header files

* Add documentation for existing POST code (doc/README.POST)

* Patch by Laudney Ren, 15 Jan 2003:
  Fix handling of redundand environment in "tools/envcrc.c"

* Patch by Detlev Zundel, 28 Feb 2003:
  Add bedbug support for 824x systems

* Add support for 16 MB flash configuration of TRAB board

* Patch by Erwin Rol, 27 Feb 2003:
  Add support for RTEMS

* Add image information to README

* Fix dual PCMCIA slot support (when running with just one
  slot populated)

* Add VFD type detection to trab board

* extend drivers/cs8900.c driver to synchronize  ethaddr  environment
  variable with value in the EEPROM
2003-03-06 00:02:04 +00:00
wdenk
6069ff2653 * Add support for 16 MB flash configuration of TRAB board
* Patch by Erwin Rol, 27 Feb 2003:
  Add support for RTEMS

* Add image information to README

* Fix dual PCMCIA slot support (when running with just one
  slot populated)

* Add VFD type detection to trab board

* extend drivers/cs8900.c driver to synchronize  ethaddr  environment
  variable with value in the EEPROM

* Start adding MIPS support files
2003-02-28 00:49:47 +00:00
stroese
2a9e02ead3 CPCIISER4 configuration updated. 2003-02-18 11:30:24 +00:00
stroese
d7787c6e57 Fixed bug in ext. serial clock setup on PPC405 (since PPC440 port). 2003-02-17 16:06:06 +00:00
stroese
ad10dd9aaf Add "pcidelay" environment variable (in ms, enabled via CONFIG_PCI_BOOTDELAY). 2003-02-14 11:21:23 +00:00
wdenk
e5ad56b13b Cleanup: remove trailing white space 2003-02-11 01:49:43 +00:00
stroese
ee1b3b5fe4 Add support for 4MB and 128MB onboard SDRAM (cpu/ppc4xx/sdram.c) 2003-02-10 16:39:00 +00:00
stroese
6177445dab Added 4MByte and 128MByte onboard SDRAM 2003-02-10 16:26:37 +00:00
wdenk
aacf9a49aa * Add dual ethernet support on PM826
* Add support for LXT971 PHY on PM826

* Patch by Tord Andersson, 16 Jan 2003:
  Fix flash sector count for TQM8xxL

* Fix I2C EEPROM problem on ICU862 board (would only write the first
  16 bytes out of each 32 byte block)
2003-01-17 16:27:01 +00:00
1563 changed files with 145523 additions and 61512 deletions

661
CHANGELOG
View File

@@ -1,5 +1,664 @@
======================================================================
Changes since U-Boot 0.2.0:
Changes since U-Boot 0.4.0:
======================================================================
* Rewrite command lookup and help command (fix problems with bubble
sort when sorting command name list). Minor cleanup here and there.
* Merge from "stable branch", tag LABEL_2003_06_28_1800-stable:
- Allow to call sysmon function interactively
- PIC on LWMON board needs delay after power-on
- Add missing RSR definitions for MPC8xx
- Improve log buffer handling: guarantee clean reset after power-on
- Add support for EXBITGEN board
- Add support for SL8245 board
* Code cleanup:
- remove trailing white space, trailing empty lines, C++ comments, etc.
- split cmd_boot.c (separate cmd_bdinfo.c and cmd_load.c)
* Patches by Kenneth Johansson, 25 Jun 2003:
- major rework of command structure
(work done mostly by Michal Cendrowski and Joakim Kristiansen)
======================================================================
Changes for U-Boot 0.4.0:
======================================================================
* Patches by Robert Schwebel, 26 Jun 2003:
- csb226 configuration updated
- credits for logodl port updated
- innokom configuration updated
- logodl tree update, still with coding style inconsistencies
- added OCM for ppc405 warning to README
* Patch by Pantelis Antoniou, 25 Jun 2003:
update NetVia with V2 board support
* Header file cleanup for ARM
* Patch by Murray Jensen, 24 Jun 2003:
- make sure to use only U-boot provided header files
- fix problems with ".rodata.str1.4" section as used by GCC-3.x
* Patch by Stefan Roese, 24 Jun 2003:
- Update esd ASH405 board files.
- Update esd DASA_SIM config file.
- Add ping command to some esd boards.
* Patch by Yuli Barcohen, 23 Jun 2003:
Update for MPC8260ADS board
* Patch by Murray Jensen, 23 Jun 2003:
- cleanup of GCC 3.x compiler warnings
* Patch by Rune Torgersen, 4 Jun 2003:
add large memory support for MPC8266ADS board
* Patch by Richard Woodruff, 19 June 03:
- Enabled standard u-boot device abstraction for ARM
- Enabled console device for ARM
- Initilized bi_baudrate for ARM
* Patch by Bill Hargen, 23 Apr 2003:
fix byte order for 824x I2C addresses (write op)
* Patch by Murray Jensen, 20 Jun 2003:
- hymod update
- cleanup (especially for gcc-3.x compilers)
* Patch by Tom Guilliams, 20 Jun 2003:
added CONFIG_750FX support for IBM 750FX processors
* Patch by Devin Crumb, 02 Apr 2003:
Fix clock divider rounding problem in drivers/serial.c
* Patch by Richard Woodruff, 19 June 03:
- Fixed smc91c111 driver to sync with the u-boot environment
(driver/smc91c111.c).
- Added eth_init error return check in NetLoop (net/net.c).
* Patch by Ken Chou, 19 June 2003:
Added support for A3000 SBC board (Artis Microsystems Inc.)
* Patches by Murray Jensen, 17 Jun 2003:
- Hymod board database mods: add "who" field and new xilinx chip types
- provide new "init_cmd_timeout()" function so code external to
"common/main.c" can use the "reset_cmd_timeout()" function before
entering the main loop
- add DTT support for adm1021 (new file dtt/adm1021.c; config
slightly different. see include/configs/hymod.h for an example
(requires CONFIG_DTT_ADM1021, CONFIG_DTT_SENSORS, and
CFG_DTT_ADM1021 defined)
- add new "eeprom_probe()" function which has similar args and
behaves in a similar way to "eeprom_read()" etc.
- add 8260 FCC ethernet loopback code (new "eth_loopback_test()"
function which is enabled by defining CONFIG_ETHER_LOOPBACK_TEST)
- gdbtools copyright update
- ensure that set_msr() executes the "sync" and "isync" instructions
after the "mtmsr" instruction in cpu/mpc8260/interrupts.c
- 8260 I/O ports fix: Open Drain should be set last when configuring
- add SIU IRQ defines for 8260
- allow LDSCRIPT override and OBJCFLAGS initialization: change to
config.mk to allow board configurations to override the GNU
linker script, selected via the LDSCRIPT, make variable, and to
give an initial value to the OBJCFLAGS make variable
- 8260 i2c enhancement:
o correctly extends the timeout depending on the size of all
queued messages for both transmit and receive
o will not continue with receive if transmit times out
o ensures that the error callback is done for all queued tx
and rx messages
o correctly detects both tx and rx timeouts, only delivers one to
the callback, and does not overwrite an earlier error
o logic in i2c_probe now correct
- add "vprintf()" function so that "panic()" function can be
technically correct
- many Hymod board changes
* Patches by Robert Schwebel, 14 Jun 2003:
- add support for Logotronic DL datalogger board
- cleanup serial line after kermit binary download
- add debugX macro (debug level support)
- update mach-types.h to latest arm.linux.org.uk master list.
* Patches by David M<>ller, 12 Jun 2003:
- rewrite of the S3C24X0 register definitions stuff
- "driver" for the built-in S3C24X0 RTC
* Patches by Yuli Barcohen, 12 Jun 2003:
- Add MII support and Ethernet PHY initialization for MPC8260ADS board
- Fix incorrect SIUMCR initialisation caused by wrong Hard Reset
configuration word supplied by FPGA on some MPC8260ADS boards
* Patch by Pantelis Antoniou, 10 Jun 2003:
Unify status LED interface
* Add support for DS12887 RTC; add RTC support for ATC board
* Patch by Nicolas Lacressonniere, 11 Jun 2003:
Modifications for Atmel AT91RM9200DK ARM920T based development kit
- Add Atmel DataFlash support for reading and writing.
- Add possibility to boot a Linux from DataFlash with BOOTM command.
- Add Flash detection on Atmel AT91RM9200DK
(between Atmel AT49BV1614 and AT49BV1614A flashes)
- Replace old Ethernet PHY layer functions
- Change link address
* Patch by Frank Smith, 9 Jun 2003:
use CRIT_EXCEPTION for machine check on 4xx
* Patch by Detlev Zundel, 13 Jun 2003:
added implementation of the "carinfo" command in cmd_immap.c
* Fix CONFIG_NET_MULTI support in include/net.h
* Patches by Kyle Harris, 13 Mar 2003:
- Add FAT partition support
- Add command support for FAT
- Add command support for MMC
----
- Add Intel PXA support for video
- Add Intel PXA support for MMC
----
- Enable MMC and FAT for lubbock board
- Other misc changes for lubbock board
* Patch by Robert Schwebel, April 02, 2003:
fix for SMSC91111 driver
* Patch by Vladimir Gurevich, 04 Jun 2003:
make ppc405 ethernet driver compatible with CONFIG_NET_MULTI option
* Patch by Stefan Roese, 05 Jun 2003:
- PPC4xx: Fix bug for initial stack in data cache as pointed out by
Thomas Schaefer (tschaefer@giga-stream.de). Now inital stack in
data cache can be used even if the chip select is in use.
- CFG_RX_ETH_BUFFER added to set the ethernet receive buffer count
(see README for further description).
- Changed config files of CONFIG_EEPRO100 boards to use the
CFG_RX_ETH_BUFFER define.
* Add support for RMU board
* Add support for TQM862L at 100/50 MHz
* Patch by Pantelis Antoniou, 02 Jun 2003:
major reconstruction of networking code;
add "ping" support (outgoing only!)
* Patch by Denis Peter, 04 June 2003:
add support for the MIP405T board
* Patches by Udi Finkelstein, 2 June 2003:
- Added support for custom keyboards, initialized by defining a
board-specific drv_keyboard_init as well as defining CONFIG_KEYBOARD .
- Added support for the RBC823 board.
- cpu/mpc8xx/lcd.c now automatically calculates the
Horizontal Pixel Count field.
* Fix alignment problem in BOOTP (dhcp_leasetime option)
[pointed out by Nicolas Lacressonni<6E>re, 2 Jun 2003]
* Patch by Mark Rakes, 14 May 2003:
add support for Intel e1000 gig cards.
* Patch by Nye Liu, 3 Jun 2003:
fix critical typo in MAMR definition (include/mpc8xx.h)
* Fix requirement to align U-Boot image on 16 kB boundaries on PPC.
* Patch by Klaus Heydeck, 2 Jun 2003
Minor changes for KUP4K configuration
* Patch by Marc Singer, 29 May 2003:
Fixed rarp boot method for IA32 and other little-endian CPUs.
* Patch by Marc Singer, 28 May 2003:
Added port I/O commands.
* Patch by Matthew McClintock, 28 May 2003
- cpu/mpc824x/start.S: fix relocation code when booting from RAM
- minor patches for utx8245
* Patch by Daniel Engstr<74>m, 28 May 2003:
x86 update
* Patch by Dave Ellis, 9 May 2003 + 27 May 2003:
add nand flash support to SXNI855T configuration
fix/extend nand flash support:
- fix 'nand erase' command so does not erase bad blocks
- fix 'nand write' command so does not write to bad blocks
- fix nand_probe() so handles no flash detected properly
- add doc/README.nand
- add .jffs2 and .oob options to nand read/write
- add 'nand bad' command to list bad blocks
- add 'clean' option to 'nand erase' to write JFFS2 clean markers
- make NAND read/write faster
* Patch by Rune Torgersen, 23 May 2003:
Update for MPC8266ADS board
* Get (mostly) rid of CFG_MONITOR_LEN definition; compute real length
instead CFG_MONITOR_LEN is now only used to determine _at_compile_
_time_ (!) if the environment is embedded within the U-Boot image,
or in a separate flash sector.
* Cleanup CFG_DER #defines in config files (wd maintained only)
* Fix data abort exception handling for arm920t CPU
* Fix alignment problems with flash driver for TRAB board
* Patch by Donald White, 21 May 2003:
fix calculation of base address in pci_hose_config_device()
* Fix bug in command line parsing: "cmd1;cmd2" is supposed to always
execute "cmd2", even if "cmd1" fails. Note that this is different
to "run var1 var2" where the contents of "var2" will NOT be
executed when a command in "var1" fails.
* Add zero-copy ramdisk support (requires corresponding kernel support!)
* Patch by Kyle Harris, 20 May 2003:
In preparation for an ixp port, rename cpu/xscale and arch-xscale
into cpu/pxa and arch-pxa.
* Patch by Stefan Roese, 23 May 2003:
- IBM PPC405EP port added.
- CONFIG_UART1_CONSOLE added. If defined internal UART1 (and not
UART0) is used as default U-Boot console. PPC4xx only!
- esd ASH405 board added (PPC405EP based).
- BUBINGA405EP board added (PPC405EP based - IBM Eval Board).
- esd CPCI405AB board added.
- esd PMC405 board added.
- Update of some esd boards.
* Patch by Denis Peter, 19 Mai 2003:
add support for the MIP405-3 board
* Patch by Dave Ellis, 22 May 2003:
Fix problem with only partially cleared .bss segment
* Patch by Rune Torgersen, 12 May 2003:
get PCI to work on a MPC8266ADS board; incorporate change to
cpu/mpc8260/pci.c to enable overrides of PCI memory parameters
* Patch by Nye Liu, 1 May 2003:
minor patches for the FADS8xx
* Patch by Thomas Sch<63>fer, 28 Apr 2003:
Fix SPD handling for 256 ECC DIMM on Walnut
* Add support for arbitrary bitmaps for TRAB's VFD command;
allow to pass boot bitmap addresses in environment variables;
allow for zero boot delay
* Patch by Christian Gei<65>inger, 19 May 2002:
On TRAB: wait until the dummy byte has been completely sent
* Patch by David Updegraff, 22 Apr 2003:
update for CrayL1 board
* Patch by Pantelis Antoniou, 21 Apr 2003:
add boot support for ARTOS (a proprietary OS)
* Patch by Steven Scholz, 11 Apr 2003:
Add support for RTC DS1338
* Patch by Rod Boyce, 24 Jan 2003:
Fix counting of extended partitions in diskboot command
* Patch by Christophe Lindheimer, 20 May 2003:
allow the use of CFG_LOADS when CFG_NO_FLASH is set
* Fix SDRAM timing on Purple board
* Add support for CompactFlash on ATC board
(includes support for Intel 82365 and compatible PC Card controllers,
and Yenta-compatible PCI-to-CardBus controllers)
* Patch by Mathijs Haarman, 08 May 2003:
Add lan91c96 driver (tested on Lubbock and custom PXA250 board only)
* Fix problem with usage of "true" (undefined in current versions of bfd.h)
* Add support for Promess ATC board
* Patch by Keith Outwater, 28 Apr 2003:
- Miscellaneous corrections and additions to GEN860T board specific code.
- Added GEN860_SC variant to GEN860T.
- Miscellaneous corrections to GEN860T documentation.
- Correct duplicate entry in U-Boot CREDITS file.
- Add GEN860T_SC entry in MAINTAINERS file.
- Update CREDITS file with GEN860T_SC info.
* Update Smiths Aerospace addresses in MAINTAINERS file
* Fix error handling in hush's version of "run" command
* LWMON extensions:
- Splashscreen support
- modem support
- sysmon support
- temperature dependend enabling of LCD
* Allow booting from old "PPCBoot" disk partitions
* Add support for TQM8255 Board / MPC8255 CPU
======================================================================
Changes for U-Boot 0.3.1:
======================================================================
* Make sure Block Lock Bits get cleared in R360MPI flash driver
* MPC823 LCD driver: Fill color map backwards, to allow for steady
display when Linux takes over
* Patch by Erwin Rol, 27 Feb 2003:
Add support for RTEMS (this time for real).
* Add support for "bmp info" and "bmp display" commands to load
bitmap images; this can be used (for example in a "preboot"
command) to display a splash screen very quickly after poweron.
* Add support for 133 MHz clock on INCA-IP board
* Patch by Lutz Dennig, 10 Apr 2003:
Update for R360MPI board
* Add new meaning to "autostart" environment variable:
If set to "no", a standalone image passed to the
"bootm" command will be copied to the load address
(and eventually uncompressed), but NOT be started.
This can be used to load and uncompress arbitrary
data.
* Patch by Stefan Roese, 10 Apr 2003:
Changed DHCP client to use IP address from server option field #54
from the OFFER packet in the server option field #54 in the REQUEST
packet. This fixes a problem using a Windows 2000 DHCP server,
where the DHCP-server is not the TFTP-server.
* Set max brightness for MN11236 displays on TRAB board
* Add support for TQM862L modules
======================================================================
Changes for U-Boot 0.3.0:
======================================================================
* Patch by Arun Dharankar, 4 Apr 2003:
Add IDMA example code (tested on 8260 only)
* Add support for Purple Board (MIPS64 5Kc)
* Add support for MIPS64 5Kc CPUs
* Fix missing setting of "loadaddr" and "bootfile" on ARM and MIPS
* Patch by Denis Peter, 04 Apr 2003:
- update MIP405-4 board
* Patch by Stefan Roese, 4 Apr 2003:
- U-Boot version environment variable "ver" added
(CONFIG_VERSION_VARIABLE).
- Changed PPC405GPr version from A to B.
- Changed CPCI405 to use CTS instead of DSR on PPC405 UART1.
* Patches by Denis Peter, 03 April 2003:
- fix PCI IRQs on MPL boards
- fix two more un-relocated pointer problems
* Fix behaviour of "run" command:
- print error message iv variable does not exist
- terminate processing of arguments in case of error
* Patches by Peter Figuli, 10 Mar 2003
- Add support for BTUART on PXA platform
- Add support for WEP EP250 (PXA) board
* Fix flash problems on INCA-IP; add tool to allow bruning images to
flash using a BDI2000
* Implement fix for I2C Edge Conditions problem for all boards that
use the bit-banging driver (common/soft_i2c.c)
* Patch by Martin Winistoerfer, 23 Mar 2003
- Add port to MPC555/556 microcontrollers
- Add support for cmi customer board with
Intel 28F128J3A, 28F320J3A or 28F640J3A flash.
* Patch by Rick Bronson, 28 Mar 2003:
- fix common/cmd_nand.c
* Patch by Arun Dharankar, 24 Mar 2003:
- add threads / scheduler example code
* Add patches by Robert Schwebel, 31 Mar 2003:
- add ctrl-c support for kermit download
- align bdinfo output on ARM
- csb226 board: bring in sync with innokom/memsetup.S
- csb226 board: fix MDREFR handling
- misc doc fixes / extensions
- innokom board: cleanup, MDREFR fix in memsetup.S, config update
- add BOOT_PROGRESS to armlinux.c
* Add CPU ID, version, and clock speed for INCA-IP
* Patches by Dave Ellis, 18 Mar 2003 for SXNI855T board:
- fix SRAM and SDRAM memory sizing
- add status LED support
- add MAC address for second (SCC1) ethernet port
* Update default environment for TQM8260 board
* Patch by Rick Bronson, 16 Mar 2003:
- Add NAND flash support for reading, writing, and erasing NAND
flash (certain forms of which are called SmartMedia).
- Add support for Atmel AT91RM9200DK ARM920T based development kit.
* Patches by Robert Schwebel, 19 Mar 2003:
- use arm-linux-gcc as default compiler for ARM
- fix i2c fixup code
- fix missing baudrate setting
- added $loadaddr / CFG_LOAD_ADDR support to loadb
- moved "ignoring trailing characters" _before_ u-boot wants to
print out diagnostics messages; removes bogus characters at the
end of transmission
* Patch by John Zhan, 18 Mar 2003:
Add support for SinoVee Microsystems SC8xx boards
* Patch by Rolf Offermanns, 21 Mar 2003:
ported the dnp1110 related changes from the current armboot cvs to
current u-boot cvs. smc91111 does not work. problem marked in
smc91111.c, grep for "FIXME".
* Patch by Brian Auld, 25 Mar 2003:
Add support for STM flash chips on ebony board
* Add PCI support for MPC8250 Boards (PM825 module)
* Patch by Stefan Roese, 25 Mar 2003:
- PCI405 update.
* Patch by Stefan Roese, 20 Mar 2003:
- CPCI4052 update (support for revision 3).
- Set edge conditioning circuitry on PPC405GPr for compatibility
to existing PPC405GP designs.
- Clip udiv to 5 bits on PPC405 (serial.c).
* Extend INCAIP board support:
- add automatic RAM size detection
- add "bdinfo" command
- pass flash address and size to Linux kernel
- switch to 150 MHz clock
* Avoid flicker on the TRAB's VFD by synchronizing the enable with
the HSYNC/VSYNC. Requires new CPLD code (Version 101 for Rev. 100
boards, version 153 for Rev. 200 boards).
* Patch by Vladimir Gurevich, 12 Mar 2003:
Fix relocation problem of statically initialized string pointers
in common/cmd_pci.c
* Patch by Kai-Uwe Bl<42>m, 12 Mar 2003:
Cleanup & bug fixes for JFFS2 code:
- the memory mangement was broken. It caused havoc on malloc by
writing beyond the block boundaries.
- the length calculation for files was wrong, sometimes resulting
in short file reads.
- data copying now optionally takes fragment version numbers into
account, to avoid copying from older data.
See doc/README.JFFS2 for details.
* Patch by Josef Wagner, 12 Mar 2003:
- 16/32 MB and 50/80 MHz support with auto-detection for IP860
- ETH05 and BEDBUG support for CU824
- added support for MicroSys CPC45
- new BOOTROM/FLASH0 and DOC base for PM826
* Patch by Robert Schwebel, 12 Mar 2003:
Fix the chpart command on innokom board
* Name cleanup:
mv include/asm-i386/ppcboot-i386.h include/asm-i386/u-boot-i386.h
s/PPCBoot/U-Boot/ in some files
s/pImage/uImage/ in some files
* Patch by Detlev Zundel, 15 Jan 2003:
Fix '' command line quoting
* Patch by The LEOX team, 19 Jan 2003:
- add support for the ELPT860 board
- add support for Dallas ds164x RTC
* Patches by David M<>ller, 31 Jan 2003:
- minimal setup for CardBus bridges
- add EEPROM read/write support in the CS8900 driver
- add support for the builtin I2C controller in the Samsung s3c24x0 chips
- add support for MPL's VCMA9 (Samsung s3c2410 based) board
* Patch by Steven Scholz, 04 Feb 2003:
add support for RTC DS1307
* Patch by Reinhard Meyer, 5 Feb 2003:
fix PLPRCR/SCCR init sequence on 8xx to allow for
changes of EBDF by software
* Patch by Vladimir Gurevich, 07 Feb 2003:
"API-compatibility patch" for 4xx I2C driver
* TRAB fixes / extensions:
- Restore VFD brightness as saved in environment
- add support for Fujitsu flashes
- make sure both buzzers are turned off (drive low level)
* Patches by Robert Schwebel, 06 Mar 2003:
- fix bug in BOOTP code (must use NetCopyIP)
- update of CSB226 port
- clear BSS segment on XScale
- added support for i2c_init_board() function
- update to the Innokom plattform
* Extend support for redundand environments for configurations where
environment size < sector size
* Patch by Rune Torgersen, 13 Feb 2003:
Add support for Motorola MPC8266ADS board
* Patch by Kyle Harris, 19 Feb 2003:
patches for the Intel lubbock board:
memsetup.S - general cleanup (based on Robert's csb226 code)
flash.c - overhaul, actually works now
lubbock.c - fix init funcs to return proper value
* Patch by Kenneth Johansson, 26 Feb 2003:
- Fixed off by one in RFTA calculation.
- No need to abort when LDF is lower than we can program it's only
minimum timing so clamp it to what we can do.
- Takes function pointer to function for reading the spd_nvram. Usefull
for faking data or hardcode a module without the nvram.
- fix other user for above change
- fix some comments.
* Patches by Brian Waite, 26 Feb 2003:
- fix port for evb64260 board
- fix PCI for evb64260 board
- fix PCI scan
* Patch by Reinhard Meyer, 1 Mar 2003:
Add support for EMK TOP860 Module
* Patch by Yuli Barcohen, 02 Mar 2003:
Add SPD EEPROM support for MPC8260ADS board
* Patch by Robert Schwebel, 21 Jan 2003:
- Add support for Innokom board
- Don't complain if "install" fails
- README cleanup (remove duplicated lines)
- Update PXA header files
* Add documentation for existing POST code (doc/README.POST)
* Patch by Laudney Ren, 15 Jan 2003:
Fix handling of redundand environment in "tools/envcrc.c"
* Patch by Detlev Zundel, 28 Feb 2003:
Add bedbug support for 824x systems
* Add support for 16 MB flash configuration of TRAB board
* Patch by Erwin Rol, 27 Feb 2003:
Add support for RTEMS
* Add image information to README
* Patch by Stefan Roese, 18 Feb 2003:
CPCIISER4 configuration updated.
* Patch by Stefan Roese, 17 Feb 2003:
Fixed bug in ext. serial clock setup on PPC405 (since PPC440 port).
* Patch by Stefan Roese, 13 Feb 2003:
Add "pcidelay" environment variable (in ms, enabled via
CONFIG_PCI_BOOTDELAY).
PCI spec 2.2 defines, that a pci target has 2^25 pci clocks after
RST# to respond to configuration cycles (33MHz -> 1s).
* Fix dual PCMCIA slot support (when running with just one
slot populated)
* Add VFD type detection to trab board
* extend drivers/cs8900.c driver to synchronize ethaddr environment
variable with value in the EEPROM
* Patch by Stefan Roese, 10 Feb 2003:
Add support for 4MB and 128MB onboard SDRAM (cpu/ppc4xx/sdram.c)
* Add support for MIPS32 4Kc CPUs
* Add support for INCA-IP Board
======================================================================
Changes for U-Boot 0.2.2:
======================================================================
* Add dual ethernet support on PM826
* Add support for LXT971 PHY on PM826
* Patch by Tord Andersson, 16 Jan 2003:
Fix flash sector count for TQM8xxL
* Fix I2C EEPROM problem on ICU862 board (would only write the first
16 bytes out of each 32 byte block)
======================================================================
Changes for U-Boot 0.2.1:
======================================================================
* Add support for V37 board

62
CREDITS
View File

@@ -26,6 +26,10 @@ N: Guillaume Alexandre
E: guillaume.alexandre@gespac.ch
D: Add PCIPPC6 configuration
N: Pantelis Antoniou
E: panto@intracom.gr
D: NETVIA board support, ARTOS support.
N: Pierre Aubert
E: <p.aubert@staubli.com>
D: Support for RPXClassic board
@@ -46,6 +50,10 @@ N: Raphael Bossek
E: raphael.bossek@solutions4linux.de
D: 8xxrom-0.3.0
N: Rick Bronson
E: rick@efn.org
D: Atmel AT91RM9200DK and NAND support
N: David Brown
E: DBrown03@harris.com
D: Extensions to 8xxrom-0.3.0
@@ -58,6 +66,10 @@ N: Jonathan De Bruyne
E: jonathan.debruyne@siemens.atea.be
D: Port to Siemens IAD210 board
N: Ken Chou
E: kchou@ieee.org
D: Support for A3000 SBC board
N: Conn Clark
E: clark@esteem.com
D: ESTEEM192E support
@@ -66,6 +78,10 @@ N: Magnus Damm
E: eramdam@kieray1.p.y.ki.era.ericsson.se
D: 8xxrom
N: Arun Dharankar
E: ADharankar@ATTBI.Com
D: threads / scheduler example code
N: K<>ri Dav<61><76>sson
E: kd@flaga.is
D: FLAGA DM Support
@@ -96,6 +112,10 @@ E: wg@denx.de
D: Support for Interphase 4539 T1/E1/J1 PMC, PN62, CCM, SCM boards
W: www.denx.de
N: Peter Figuli
E: peposh@etc.sk
D: Support for WEP EP250 (PXA) board
N: Thomas Frieden
E: ThomasF@hyperion-entertainment.com
D: Support for AmigaOne
@@ -126,6 +146,10 @@ N: Andreas Heppel
E: aheppel@sysgo.de
D: CPU Support for MPC 75x; board support for Eltec BAB750 [obsolete!]
N: August Hoeraendl
E: august.hoerandl@gmx.at
D: Support for the logodl board (PXA2xx)
N: Josh Huber
E: huber@alum.wpi.edu
D: Port to the Galileo Evaluation Board, and the MPC74xx cpu series.
@@ -166,6 +190,11 @@ N: Thomas Lange
E: thomas@corelatus.com
D: Support for GTH board; lots of PCMCIA fixes
N: The LEOX team
E: team@leox.org
D: Support for LEOX boards, DS164x RTC
W: http://www.leox.org
N: Raymond Lo
E: lo@routefree.com
D: Support for DOS partitions
@@ -174,6 +203,10 @@ N: Dan Malek
E: dan@netx4.com
D: FADSROM, the grandfather of all of this
N: Reinhard Meyer
E: r.meyer@emk-elektronik.de
D: Port to EMK TOP860 Module
N: Jay Monkman
E: jtm@smoothsmoothie.com
D: EST SBC8260 support
@@ -191,13 +224,9 @@ E: rof@sysgo.de
D: Initial support for SSV-DNP1110, SMC91111 driver
W: www.elinos.com
N: Keith Outwater
E: Keith_Outwater@mvis.com
D: Support for GEN860T board
N: Keith Outwater
E: keith_outwater@mvis.com
D: Support for generic/custom MPC860T board (GEN860T)
D: Support for generic/custom MPC860T boards (GEN860T, GEN860T_SC)
N: Frank Panno
E: fpanno@delphintech.com
@@ -217,6 +246,10 @@ N: Stefan Roese
E: stefan.roese@esd-electronics.com
D: IBM PPC401/403/405GP Support; Windows environment support
N: Erwin Rol
E: erwin@muffin.org
D: boot support for RTEMS
N: Neil Russell
E: caret@c-side.com
D: Author of LiMon-1.4.2, which contributed some ideas
@@ -227,7 +260,8 @@ D: FADS823 configuration, MPC823 video support, I2C, wireless keyboard, lots mor
N: Robert Schwebel
E: r.schwebel@pengutronix.de
D: Support for csb226 board (xscale)
D: Support for csb226, logodl and innokom boards (PXA2xx)
N: Rob Taylor
E: robt@flyingpig.com
D: Port to MBX860T and Sandpoint8240
@@ -240,15 +274,31 @@ N: Jim Thompson
E: jim@musenki.com
D: Support for MUSENKI board
N: Rune Torgersen
E: <runet@innovsys.com>
D: Support for Motorola MPC8266ADS board
N: David Updegraff
E: dave@cray.com
D: Port to Cray L1 board; DHCP vendor extensions
N: Martin Winistoerfer
E: martinwinistoerfer@gmx.ch
D: Port to MPC555/556 microcontrollers and support for cmi board
N: Christian Vejlbo
E: christian.vejlbo@tellabs.com
D: FADS860T ethernet support
N: John Zhan
E: zhanz@sinovee.com
D: Support for SinoVee Microsystems SC8xx SBC
N: Alex Zuepke
E: azu@sysgo.de
D: Overall improvements on StrongARM, ARM720TDMI; Support for Tuxscreen; initial PCMCIA support for ARM
W: www.elinos.com
N: Pantelis Antoniou
E: panto@intracom.gr
D: NETVIA board support, ARTOS support.

View File

@@ -3,10 +3,7 @@
# Regular Maintainers for U-Boot board support: #
# #
# For any board without permanent maintainer, please contact #
# for PowerPC systems: #
# Wolfgang Denk <wd@denx.de> #
# for ARM systems: #
# Marius Gr<47>ger <mag@sysgo.de> #
# and Cc: the <U-Boot-Users@lists.sourceforge.net> mailing lists. #
# #
# Note: lists sorted by Maintainer Name #
@@ -14,6 +11,7 @@
#########################################################################
# PowerPC Systems: #
# #
# Maintainer Name, Email Address #
# Board CPU #
@@ -27,10 +25,14 @@ Pantelis Antoniou <panto@intracom.gr>
NETVIA MPC8xx
Jerry Van Baren <vanbaren_gerald@si.com>
Jerry Van Baren <gerald.vanbaren@smiths-aerospace.com>
sacsng MPC8260
Rick Bronson <rick@efn.org>
AT91RM9200DK at91rm9200
Oliver Brown <obrown@adventnetworks.com>
gw8260 MPC8260
@@ -58,6 +60,9 @@ Wolfgang Denk <wd@denx.de>
IVMS8_128 MPC860
IVMS8_256 MPC860
LANTEC MPC850
LWMON MPC823
R360MPI MPC823
RMU MPC850
RRvision MPC823
SM850 MPC850
SPD823TS MPC823
@@ -67,6 +72,7 @@ Wolfgang Denk <wd@denx.de>
TQM855L MPC855
TQM860L MPC860
TQM860L_FEC MPC860
TTTech MPC823
c2mon MPC855
hermes MPC860
lwmon MPC823
@@ -74,6 +80,12 @@ Wolfgang Denk <wd@denx.de>
CU824 MPC8240
Sandpoint8240 MPC8240
SL8245 MPC8245
ATC MPC8250
PM825 MPC8250
TQM8255 MPC8255
CPU86 MPC8260
PM826 MPC8260
@@ -82,7 +94,9 @@ Wolfgang Denk <wd@denx.de>
PCIPPC2 MPC750
PCIPPC6 MPC750
Jon Diekema <diekema_jon@si.com>
EXBITGEN PPC405GP
Jon Diekema <jon.diekema@smiths-aerospace.com>
sbc8260 MPC8260
@@ -136,10 +150,18 @@ Thomas Lange <thomas@corelatus.com>
GTH MPC860
The LEOX team <team@leox.org>
ELPT860 MPC860T
Eran Man <eran@nbase.co.il>
EVB64260_750CX MPC750CX
Reinhard Meyer <r.meyer@emk-elektronik.de>
TOP860 MPC860
Scott McNutt <smcnutt@artesyncp.com>
EBONY PPC440GP
@@ -147,6 +169,7 @@ Scott McNutt <smcnutt@artesyncp.com>
Keith Outwater <Keith_Outwater@mvis.com>
GEN860T MPC860T
GEN860T_SC MPC860T
Frank Panno <fpanno@delphintech.com>
@@ -161,14 +184,19 @@ Stefan Roese <stefan.roese@esd-electronics.com>
ADCIOP IOP480 (PPC401)
AR405 PPC405GP
ASH405 PPC405EP
CANBT PPC405CR
CPCI405 PPC405GP
CPCI4052 PPC405GP
CPCI405AB PPC405GP
CPCI440 PPC440GP
CPCIISER4 PPC405GP
DASA_SIM IOP480 (PPC401)
DU405 PPC405GP
OCRTC PPC405GP
ORSG PPC405GP
PCI405 PPC405GP
PMC405 PPC405GP
Peter De Schrijver <p2@mind.be>
@@ -184,6 +212,14 @@ Jim Thompson <jim@musenki.com>
MUSENKI MPC8245/8241
Sandpoint8245 MPC8245
Rune Torgersen <runet@innovsys.com>
MPC8266ADS MPC8266
John Zhan <zhanz@sinovee.com>
svm_sc8xx MPC8xx
-------------------------------------------------------------------------
Unknown / orphaned boards:
@@ -220,6 +256,10 @@ Unknown / orphaned boards:
# Board CPU #
#########################################################################
Peter Figuli <peposh@etc.sk>
wepep250 xscale
Marius Gr<47>ger <mag@sysgo.de>
impa7 ARM720T (EP7211)
@@ -238,6 +278,7 @@ Gary Jennejohn <gj@denx.de>
David M<>ller <d.mueller@elsoft.ch>
smdk2410 ARM920T
VCMA9 ARM920T
Rolf Offermanns <rof@sysgo.de>
@@ -246,6 +287,7 @@ Rolf Offermanns <rof@sysgo.de>
Robert Schwebel <r.schwebel@pengutronix.de>
csb226 xscale
innokom xscale
Alex Z<>pke <azu@sysgo.de>
@@ -263,6 +305,18 @@ Daniel Engstr
sc520_cdp x86
#########################################################################
# MIPS Systems: #
# #
# Maintainer Name, Email Address #
# Board CPU #
#########################################################################
Wolfgang Denk <wd@denx.de>
incaip MIPS32 4Kc
purple MIPS64 5Kc
#########################################################################
# End of MAINTAINERS list #
#########################################################################

100
MAKEALL
View File

@@ -10,24 +10,33 @@ fi
LIST=""
#########################################################################
## MPC5xx Systems
#########################################################################
LIST_5xx=" \
cmi_mpc5xx \
"
#########################################################################
## MPC8xx Systems
#########################################################################
LIST_8xx=" \
ADS860 AMX860 c2mon CCM \
cogent_mpc8xx ESTEEM192E ETX094 FADS823 \
FADS850SAR FADS860T FLAGADM FPS850L \
GEN860T GENIETV GTH hermes \
IAD210 ICU862_100MHz IP860 IVML24 \
IVML24_128 IVML24_256 IVMS8 IVMS8_128 \
IVMS8_256 KUP4K LANTEC lwmon \
MBX MBX860T MHPC MVS1 \
NETVIA NX823 pcu_e R360MPI \
RPXClassic RPXlite RRvision SM850 \
SPD823TS SXNI855T TQM823L TQM823L_LCD \
TQM850L TQM855L TQM860L TQM860L_FEC \
TTTech v37 \
cogent_mpc8xx ESTEEM192E ETX094 ELPT860 \
FADS823 FADS850SAR FADS860T FLAGADM \
FPS850L GEN860T GEN860T_SC GENIETV \
GTH hermes IAD210 ICU862_100MHz \
IP860 IVML24 IVML24_128 IVML24_256 \
IVMS8 IVMS8_128 IVMS8_256 KUP4K \
LANTEC lwmon MBX MBX860T \
MHPC MVS1 NETVIA NETVIA_V2 \
NX823 pcu_e R360MPI RBC823 \
rmu RPXClassic RPXlite RRvision \
SM850 SPD823TS svm_sc8xx SXNI855T \
TOP860 TQM823L TQM823L_LCD TQM850L \
TQM855L TQM860L TTTech v37 \
"
#########################################################################
@@ -35,12 +44,13 @@ LIST_8xx=" \
#########################################################################
LIST_4xx=" \
ADCIOP AR405 CANBT CPCI405 \
CPCI4052 CPCI440 CPCIISER4 CRAYL1 \
DASA_SIM DU405 EBONY ERIC \
MIP405 ML2 OCRTC ORSG \
PCI405 PIP405 W7OLMC W7OLMG \
WALNUT405 \
ADCIOP AR405 ASH405 BUBINGA405EP \
CANBT CPCI405 CPCI4052 CPCI405AB \
CPCI440 CPCIISER4 CRAYL1 DASA_SIM \
DU405 EBONY ERIC EXBITGEN \
MIP405 MIP405T ML2 OCRTC \
ORSG PCI405 PIP405 PMC405 \
W7OLMC W7OLMG WALNUT405 \
"
#########################################################################
@@ -48,20 +58,21 @@ LIST_4xx=" \
#########################################################################
LIST_824x=" \
BMW CU824 MOUSSE MUSENKI \
OXC PN62 Sandpoint8240 Sandpoint8245 \
utx8245 \
A3000 BMW CPC45 CU824 \
MOUSSE MUSENKI OXC PN62 \
Sandpoint8240 Sandpoint8245 SL8245 utx8245 \
"
#########################################################################
## MPC8260 Systems
## MPC8260 Systems (includes 8250, 8255 etc.)
#########################################################################
LIST_8260=" \
cogent_mpc8260 CPU86 ep8260 gw8260 \
hymod IPHASE4539 MPC8260ADS PM826 \
ppmc8260 RPXsuper rsdproto sacsng \
sbc8260 SCM TQM8260 \
atc cogent_mpc8260 CPU86 ep8260 \
gw8260 hymod IPHASE4539 MPC8260ADS \
MPC8266ADS PM826 ppmc8260 RPXsuper \
rsdproto sacsng sbc8260 SCM \
TQM8260 \
"
#########################################################################
@@ -76,36 +87,57 @@ LIST_7xx=" \
BAB7xx ELPPC \
"
LIST_ppc="${LIST_8xx} ${LIST_824x} ${LIST_8260} \
${LIST_4xx} ${LIST_74xx} ${LIST_7xx}"
LIST_ppc="${LIST_5xx} ${LIST_8xx} \
${LIST_824x} ${LIST_8260} \
${LIST_4xx} \
${LIST_74xx} ${LIST_7xx}"
#########################################################################
## StrongARM Systems
#########################################################################
LIST_SA="lart shannon dnp1110"
LIST_SA="dnp1110 lart shannon"
#########################################################################
## ARM7 Systems
#########################################################################
LIST_ARM7="impa7 ep7312"
LIST_ARM7="ep7312 impa7"
#########################################################################
## ARM9 Systems
#########################################################################
LIST_ARM9="smdk2400 smdk2410 trab"
LIST_ARM9="at91rm9200dk smdk2400 smdk2410 trab VCMA9"
#########################################################################
## Xscale Systems
#########################################################################
LIST_xscale="lubbock cradle csb226"
LIST_pxa="cradle csb226 innokom lubbock wepep250"
LIST_arm="${LIST_SA} ${LIST_ARM7} ${LIST_ARM9} ${LIST_xscale}"
LIST_arm="${LIST_SA} ${LIST_ARM7} ${LIST_ARM9} ${LIST_pxa}"
#########################################################################
## MIPS 4Kc Systems
#########################################################################
LIST_mips4kc="incaip"
LIST_mips5kc="purple"
LIST_mips="${LIST_mips4kc} ${LIST_mips5kc}"
#########################################################################
## i386 Systems
#########################################################################
LIST_I486="sc520_cdp sc520_spunk sc520_spunk_rel"
LIST_x86="${LIST_I486}"
#-----------------------------------------------------------------------
#----- for now, just run PPC by default -----
[ $# = 0 ] && set $LIST_ppc
@@ -127,7 +159,7 @@ build_target() {
for arg in $@
do
case "$arg" in
8xx|824x|8260|4xx|7xx|74xx|SA|ARM7|ARM9|ppc|arm|xscale)
5xx|8xx|824x|8260|4xx|7xx|74xx|SA|ARM7|ARM9|ppc|arm|pxa|mips|I486|x86)
for target in `eval echo '$LIST_'${arg}`
do
build_target ${target}

249
Makefile
View File

@@ -53,29 +53,21 @@ ifndef CROSS_COMPILE
ifeq ($(HOSTARCH),ppc)
CROSS_COMPILE =
else
## #ifeq ($(CPU),mpc8xx)
## CROSS_COMPILE = ppc_8xx-
## #endif
## #ifeq ($(CPU),ppc4xx)
## #CROSS_COMPILE = ppc_4xx-
## #endif
## #ifeq ($(CPU),mpc824x)
## #CROSS_COMPILE = ppc_82xx-
## #endif
## #ifeq ($(CPU),mpc8260)
## #CROSS_COMPILE = ppc_82xx-
## #endif
## #ifeq ($(CPU),74xx_7xx)
## #CROSS_COMPILE = ppc_74xx-)
## #endif
ifeq ($(ARCH),ppc)
CROSS_COMPILE = ppc_8xx-
endif
ifeq ($(ARCH),arm)
CROSS_COMPILE = arm_920TDI-
CROSS_COMPILE = arm-linux-
endif
ifeq ($(ARCH),i386)
#CROSS_COMPILE = i386-elf-
ifeq ($(HOSTARCH),i386)
CROSS_COMPILE =
else
CROSS_COMPILE = i386-linux-
endif
endif
ifeq ($(ARCH),mips)
CROSS_COMPILE = mips_4KC-
endif
endif
endif
@@ -114,7 +106,7 @@ endif
LIBS = board/$(BOARDDIR)/lib$(BOARD).a
LIBS += cpu/$(CPU)/lib$(CPU).a
LIBS += lib_$(ARCH)/lib$(ARCH).a
LIBS += fs/jffs2/libjffs2.a fs/fdos/libfdos.a
LIBS += fs/jffs2/libjffs2.a fs/fdos/libfdos.a fs/fat/libfat.a
LIBS += net/libnet.a
LIBS += disk/libdisk.a
LIBS += rtc/librtc.a
@@ -129,8 +121,8 @@ LIBS += lib_generic/libgeneric.a
all: u-boot.srec u-boot.bin System.map
install: all
cp u-boot.bin /tftpboot/u-boot.bin
cp u-boot.bin /net/sam/tftpboot/u-boot.bin
-cp u-boot.bin /tftpboot/u-boot.bin
-cp u-boot.bin /net/denx/tftpboot/u-boot.bin
u-boot.srec: u-boot
$(OBJCOPY) ${OBJCFLAGS} -O srec $< $@
@@ -142,7 +134,8 @@ u-boot.dis: u-boot
$(OBJDUMP) -d $< > $@
u-boot: depend subdirs $(OBJS) $(LIBS) $(LDSCRIPT)
$(LD) $(LDFLAGS) $(OBJS) \
UNDEF_SYM=`$(OBJDUMP) -x $(LIBS) |sed -n -e 's/.*\(__u_boot_cmd_.*\)/-u\1/p'|sort|uniq`;\
$(LD) $(LDFLAGS) $$UNDEF_SYM $(OBJS) \
--start-group $(LIBS) --end-group \
-Map u-boot.map -o u-boot
@@ -180,6 +173,14 @@ unconfig:
#========================================================================
# PowerPC
#========================================================================
#########################################################################
## MPC5xx Systems
#########################################################################
cmi_mpc5xx_config: unconfig
@./mkconfig $(@:_config=) ppc mpc5xx cmi
#########################################################################
## MPC8xx Systems
#########################################################################
@@ -199,6 +200,9 @@ CCM_config: unconfig
cogent_mpc8xx_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8xx cogent
ELPT860_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8xx elpt860 LEOX
ESTEEM192E_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8xx esteem192e
@@ -213,8 +217,16 @@ FADS860T_config: unconfig
FLAGADM_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8xx flagadm
xtract_GEN860T = $(subst _SC,,$(subst _config,,$1))
GEN860T_SC_config \
GEN860T_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8xx gen860t
@ >include/config.h
@[ -z "$(findstring _SC,$@)" ] || \
{ echo "#define CONFIG_SC" >>include/config.h ; \
echo "With reduced H/W feature set (SC)..." ; \
}
@./mkconfig -a $(call xtract_GEN860T,$@) ppc mpc8xx gen860t
GENIETV_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8xx genietv
@@ -291,8 +303,20 @@ MHPC_config: unconfig
MVS1_config : unconfig
@./mkconfig $(@:_config=) ppc mpc8xx mvs1
xtract_NETVIA = $(subst _V2,,$(subst _config,,$1))
NETVIA_V2_config \
NETVIA_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8xx netvia
@ >include/config.h
@[ -z "$(findstring NETVIA_config,$@)" ] || \
{ echo "#define CONFIG_NETVIA_VERSION 1" >>include/config.h ; \
echo "... Version 1" ; \
}
@[ -z "$(findstring NETVIA_V2_config,$@)" ] || \
{ echo "#define CONFIG_NETVIA_VERSION 2" >>include/config.h ; \
echo "... Version 2" ; \
}
@./mkconfig -a $(call xtract_NETVIA,$@) ppc mpc8xx netvia
NX823_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8xx nx823
@@ -303,12 +327,18 @@ pcu_e_config: unconfig
R360MPI_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8xx r360mpi
RBC823_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8xx rbc823
RPXClassic_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8xx RPXClassic
RPXlite_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8xx RPXlite
rmu_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8xx rmu
RRvision_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8xx RRvision
@@ -323,14 +353,22 @@ SM850_config : unconfig
SPD823TS_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8xx spd8xx
svm_sc8xx_config: unconfig
@ >include/config.h
@./mkconfig $(@:_config=) ppc mpc8xx svm_sc8xx
SXNI855T_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8xx sixnet
# EMK MPC8xx based modules
TOP860_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8xx top860 emk
# Play some tricks for configuration selection
# All boards can come with 50 MHz (default), 66MHz or 80MHz clock,
# All boards can come with 50 MHz (default), 66MHz, 80MHz or 100 MHz clock,
# but only 855 and 860 boards may come with FEC
# and 823 boards may have LCD support
xtract_8xx = $(subst _66MHz,,$(subst _80MHz,,$(subst _LCD,,$(subst _FEC,,$(subst _config,,$1)))))
xtract_8xx = $(subst _66MHz,,$(subst _80MHz,,$(subst _100MHz,,$(subst _LCD,,$(subst _config,,$1)))))
FPS850L_config \
FPS860L_config \
@@ -346,20 +384,14 @@ TQM850L_80MHz_config \
TQM855L_config \
TQM855L_66MHz_config \
TQM855L_80MHz_config \
TQM855L_FEC_config \
TQM855L_FEC_66MHz_config \
TQM855L_FEC_80MHz_config \
TQM860L_config \
TQM860L_66MHz_config \
TQM860L_80MHz_config \
TQM860L_FEC_config \
TQM860L_FEC_66MHz_config \
TQM860L_FEC_80MHz_config: unconfig
TQM862L_config \
TQM862L_66MHz_config \
TQM862L_80MHz_config \
TQM862M_100MHz_config: unconfig
@ >include/config.h
@[ -z "$(findstring _FEC,$@)" ] || \
{ echo "#define CONFIG_FEC_ENET" >>include/config.h ; \
echo "... with FEC support" ; \
}
@[ -z "$(findstring _66MHz,$@)" ] || \
{ echo "#define CONFIG_66MHz" >>include/config.h ; \
echo "... with 66MHz system clock" ; \
@@ -368,6 +400,10 @@ TQM860L_FEC_80MHz_config: unconfig
{ echo "#define CONFIG_80MHz" >>include/config.h ; \
echo "... with 80MHz system clock" ; \
}
@[ -z "$(findstring _100MHz,$@)" ] || \
{ echo "#define CONFIG_100MHz" >>include/config.h ; \
echo "... with 100MHz system clock" ; \
}
@[ -z "$(findstring _LCD,$@)" ] || \
{ echo "#define CONFIG_LCD" >>include/config.h ; \
echo "#define CONFIG_NEC_NL6648BC20" >>include/config.h ; \
@@ -395,11 +431,18 @@ ADCIOP_config: unconfig
AR405_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx ar405 esd
ASH405_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx ash405 esd
BUBINGA405EP_config:unconfig
@./mkconfig $(@:_config=) ppc ppc4xx bubinga405ep
CANBT_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx canbt esd
CPCI405_config \
CPCI4052_config: unconfig
CPCI405_config \
CPCI4052_config \
CPCI405AB_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx cpci405 esd
@echo "BOARD_REVISION = $(@:_config=)" >>include/config.mk
@@ -424,9 +467,17 @@ EBONY_config:unconfig
ERIC_config:unconfig
@./mkconfig $(@:_config=) ppc ppc4xx eric
EXBITGEN_config:unconfig
@./mkconfig $(@:_config=) ppc ppc4xx exbitgen
MIP405_config:unconfig
@./mkconfig $(@:_config=) ppc ppc4xx mip405 mpl
MIP405T_config:unconfig
@echo "#define CONFIG_MIP405T" >include/config.h
@echo "Enable subset config for MIP405T"
@./mkconfig -a MIP405 ppc ppc4xx mip405 mpl
ML2_config:unconfig
@./mkconfig $(@:_config=) ppc ppc4xx ml2
@@ -440,6 +491,9 @@ PCI405_config: unconfig
PIP405_config:unconfig
@./mkconfig $(@:_config=) ppc ppc4xx pip405 mpl
PMC405_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx pmc405 esd
W7OLMC_config \
W7OLMG_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx w7o
@@ -450,9 +504,27 @@ WALNUT405_config:unconfig
#########################################################################
## MPC824x Systems
#########################################################################
xtract_82xx = $(subst _ROMBOOT,,$(subst _L2,,$(subst _266MHz,,$(subst _300MHz,,$(subst _config,,$1)))))
A3000_config: unconfig
@./mkconfig $(@:_config=) ppc mpc824x a3000
BMW_config: unconfig
@./mkconfig $(@:_config=) ppc mpc824x bmw
CPC45_config \
CPC45_ROMBOOT_config: unconfig
@./mkconfig $(call xtract_82xx,$@) ppc mpc824x cpc45
@cd ./include ; \
if [ "$(findstring _ROMBOOT_,$@)" ] ; then \
echo "CONFIG_BOOT_ROM = y" >> config.mk ; \
echo "... booting from 8-bit flash" ; \
else \
echo "CONFIG_BOOT_ROM = n" >> config.mk ; \
echo "... booting from 64-bit flash" ; \
fi; \
echo "export CONFIG_BOOT_ROM" >> config.mk;
CU824_config: unconfig
@./mkconfig $(@:_config=) ppc mpc824x cu824
@@ -474,13 +546,15 @@ Sandpoint8240_config: unconfig
Sandpoint8245_config: unconfig
@./mkconfig $(@:_config=) ppc mpc824x sandpoint
SL8245_config: unconfig
@./mkconfig $(@:_config=) ppc mpc824x sl8245
utx8245_config: unconfig
@./mkconfig $(@:_config=) ppc mpc824x utx8245
#########################################################################
## MPC8260 Systems
#########################################################################
xtract_82xx = $(subst _ROMBOOT,,$(subst _L2,,$(subst _266MHz,,$(subst _300MHz,,$(subst _config,,$1)))))
cogent_mpc8260_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8260 cogent
@@ -513,6 +587,23 @@ IPHASE4539_config: unconfig
MPC8260ADS_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8260 mpc8260ads
MPC8266ADS_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8260 mpc8266ads
PM825_config \
PM825_ROMBOOT_config: unconfig
@echo "#define CONFIG_PCI" >include/config.h
@./mkconfig -a PM826 ppc mpc8260 pm826
@cd ./include ; \
if [ "$(findstring _ROMBOOT_,$@)" ] ; then \
echo "CONFIG_BOOT_ROM = y" >> config.mk ; \
echo "... booting from 8-bit flash" ; \
else \
echo "CONFIG_BOOT_ROM = n" >> config.mk ; \
echo "... booting from 64-bit flash" ; \
fi; \
echo "export CONFIG_BOOT_ROM" >> config.mk; \
PM826_config \
PM826_ROMBOOT_config: unconfig
@./mkconfig $(call xtract_82xx,$@) ppc mpc8260 pm826
@@ -544,10 +635,13 @@ sbc8260_config: unconfig
SCM_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8260 SCM siemens
TQM8255_config \
TQM8260_config \
TQM8260_L2_config \
TQM8255_266MHz_config \
TQM8260_266MHz_config \
TQM8260_L2_266MHz_config \
TQM8255_300MHz_config \
TQM8260_300MHz_config: unconfig
@ >include/config.h
@if [ "$(findstring _L2_,$@)" ] ; then \
@@ -565,7 +659,12 @@ TQM8260_300MHz_config: unconfig
{ echo "#define CONFIG_300MHz" >>include/config.h ; \
echo "... with 300MHz system clock" ; \
}
@./mkconfig -a $(call xtract_82xx,$@) ppc mpc8260 tqm8260
@[ -z "$(findstring TQM8255_,$@)" ] || \
{ echo "#define CONFIG_MPC8255" >>include/config.h ; }
@./mkconfig -a TQM8260 ppc mpc8260 tqm8260
atc_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8260 atc
#########################################################################
## 74xx/7xx Systems
@@ -598,6 +697,9 @@ ELPPC_config: unconfig
## StrongARM Systems
#########################################################################
at91rm9200dk_config : unconfig
@./mkconfig $(@:_config=) arm at91rm9200 at91rm9200dk
lart_config : unconfig
@./mkconfig $(@:_config=) arm sa1100 lart
@@ -611,14 +713,25 @@ shannon_config : unconfig
## ARM920T Systems
#########################################################################
xtract_trab = $(subst _big_flash,,$(subst _config,,$1))
smdk2400_config : unconfig
@./mkconfig $(@:_config=) arm arm920t smdk2400
smdk2410_config : unconfig
@./mkconfig $(@:_config=) arm arm920t smdk2410
trab_config : unconfig
@./mkconfig $(@:_config=) arm arm920t trab
trab_config \
trab_big_flash_config: unconfig
@ >include/config.h
@[ -z "$(findstring _big_flash,$@)" ] || \
{ echo "#define CONFIG_BIG_FLASH" >>include/config.h ; \
echo "... with big flash support" ; \
}
@./mkconfig -a $(call xtract_trab,$@) arm arm920t trab
VCMA9_config : unconfig
@./mkconfig $(@:_config=) arm arm920t vcma9 mpl
#########################################################################
## ARM720T Systems
@@ -631,27 +744,56 @@ ep7312_config : unconfig
@./mkconfig $(@:_config=) arm arm720t ep7312
#########################################################################
## Xscale Systems
## XScale Systems
#########################################################################
lubbock_config : unconfig
@./mkconfig $(@:_config=) arm xscale lubbock
cradle_config : unconfig
@./mkconfig $(@:_config=) arm xscale cradle
@./mkconfig $(@:_config=) arm pxa cradle
csb226_config : unconfig
@./mkconfig $(@:_config=) arm xscale csb226
@./mkconfig $(@:_config=) arm pxa csb226
innokom_config : unconfig
@./mkconfig $(@:_config=) arm pxa innokom
lubbock_config : unconfig
@./mkconfig $(@:_config=) arm pxa lubbock
logodl_config : unconfig
@./mkconfig $(@:_config=) arm pxa logodl
wepep250_config : unconfig
@./mkconfig $(@:_config=) arm pxa wepep250
#========================================================================
# i386
#========================================================================
#########################################################################
## AMD SC520 CDP
## AMD SC520 CDP
#########################################################################
sc520_cdp_config : unconfig
@./mkconfig $(@:_config=) i386 i386 sc520_cdp
sc520_spunk_config : unconfig
@./mkconfig $(@:_config=) i386 i386 sc520_spunk
sc520_spunk_rel_config : unconfig
@./mkconfig $(@:_config=) i386 i386 sc520_spunk
#========================================================================
# MIPS
#========================================================================
#########################################################################
## MIPS32 4Kc
#########################################################################
incaip_config : unconfig
@./mkconfig $(@:_config=) mips mips incaip
purple_config : unconfig
@./mkconfig $(@:_config=) mips mips purple
#########################################################################
#########################################################################
clean:
@@ -659,11 +801,15 @@ clean:
\( -name 'core' -o -name '*.bak' -o -name '*~' \
-o -name '*.o' -o -name '*.a' \) -print \
| xargs rm -f
rm -f examples/hello_world examples/timer examples/eepro100_eeprom
rm -f examples/hello_world examples/timer \
examples/eepro100_eeprom examples/sched \
examples/mem_to_mem_idma2intr examples/82559_eeprom
rm -f tools/img2srec tools/mkimage tools/envcrc tools/gen_eth_addr
rm -f tools/easylogo/easylogo tools/bmp_logo
rm -f tools/gdb/astest tools/gdb/gdbcont tools/gdb/gdbsend
rm -f tools/env/fw_printenv tools/env/fw_setenv
rm -f board/cray/L1/bootscript.c board/cray/L1/bootscript.image
clobber: clean
find . -type f \
@@ -672,9 +818,10 @@ clobber: clean
| xargs rm -f
rm -f $(OBJS) *.bak tags TAGS
rm -fr *.*~
rm -f u-boot u-boot.bin u-boot.elf u-boot.srec u-boot.map System.map
rm -f u-boot u-boot.bin u-boot.srec u-boot.map System.map
rm -f tools/crc32.c tools/environment.c tools/env/crc32.c
rm -f include/asm/arch include/asm
rm -f tools/inca-swap-bytes cpu/mpc824x/bedbug_603e.c
rm -f include/asm/proc include/asm/arch include/asm
mrproper \
distclean: clobber unconfig

707
README

File diff suppressed because it is too large Load Diff

View File

@@ -0,0 +1,48 @@
#######################################################################
#
# Copyright (C) 2000, 2001, 2002, 2003
# The LEOX team <team@leox.org>, http://www.leox.org
#
# LEOX.org is about the development of free hardware and software resources
# for system on chip.
#
# Description: U-Boot port on the LEOX's ELPT860 CPU board
# ~~~~~~~~~~~
#
#######################################################################
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
#######################################################################
include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a
OBJS = $(BOARD).o flash.o
$(LIB): .depend $(OBJS)
$(AR) crv $@ $(OBJS)
#########################################################################
.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
$(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
sinclude .depend
#########################################################################

View File

@@ -0,0 +1,424 @@
=============================================================================
U-Boot port on the LEOX's ELPT860 CPU board
-------------------------------------------
LEOX.org is about the development of free hardware and software resources
for system on chip.
For more information, contact The LEOX team <team@leox.org>
References:
~~~~~~~~~~
1) Get the last stable release from denx.de:
o ftp://ftp.denx.de/pub/u-boot/u-boot-0.2.0.tar.bz2
2) Get the current CVS snapshot:
o cvs -d:pserver:anonymous@cvs.u-boot.sourceforge.net:/cvsroot/u-boot login
o cvs -z6 -d:pserver:anonymous@cvs.u-boot.sourceforge.net:/cvsroot/u-boot co -P u-boot
=============================================================================
The ELPT860 CPU board has the following features:
Processor: - MPC860T @ 50MHz
- PowerPC Core
- 65 MIPS
- Caches: D->4KB, I->4KB
- CPM: 4 SCCs, 2 SMCs
- Ethernet 10/100
- SPI, I2C, PCMCIA, Parallel
CPU board: - DRAM: 16 MB
- FLASH: 512 KB + (2 * 4 MB)
- NVRAM: 128 KB
- 1 Serial link
- 2 Ethernet 10 BaseT Channels
On power-up the processor jumps to the address of 0x02000100
Thus, U-Boot is configured to reside in flash starting at the address of
0x02001000. The environment space is located in NVRAM separately from
U-Boot, at the address of 0x03000000.
=============================================================================
U-Boot test results
=============================================================================
##################################################
# Operation on the serial console (SMC1)
##############################
U-Boot 0.2.2 (Jan 19 2003 - 11:08:39)
CPU: XPC860xxZPnnB at 50 MHz: 4 kB I-Cache 4 kB D-Cache FEC present
*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
Board: ### No HW ID - assuming ELPT860
DRAM: 16 MB
FLASH: 512 kB
In: serial
Out: serial
Err: serial
Net: SCC ETHERNET
Type "run nfsboot" to mount root filesystem over NFS
Hit any key to stop autoboot: 0
LEOX_elpt860: help
askenv - get environment variables from stdin
autoscr - run script from memory
base - print or set address offset
bdinfo - print Board Info structure
bootm - boot application image from memory
bootp - boot image via network using BootP/TFTP protocol
bootd - boot default, i.e., run 'bootcmd'
cmp - memory compare
coninfo - print console devices and informations
cp - memory copy
crc32 - checksum calculation
echo - echo args to console
erase - erase FLASH memory
flinfo - print FLASH memory information
go - start application at address 'addr'
help - print online help
iminfo - print header information for application image
loadb - load binary file over serial line (kermit mode)
loads - load S-Record file over serial line
loop - infinite loop on address range
md - memory display
mm - memory modify (auto-incrementing)
mtest - simple RAM test
mw - memory write (fill)
nm - memory modify (constant address)
printenv- print environment variables
protect - enable or disable FLASH write protection
rarpboot- boot image via network using RARP/TFTP protocol
reset - Perform RESET of the CPU
run - run commands in an environment variable
saveenv - save environment variables to persistent storage
setenv - set environment variables
sleep - delay execution for some time
tftpboot- boot image via network using TFTP protocol
and env variables ipaddr and serverip
version - print monitor version
? - alias for 'help'
##################################################
# Environment Variables (CFG_ENV_IS_IN_NVRAM)
##############################
LEOX_elpt860: printenv
bootdelay=5
loads_echo=1
baudrate=9600
stdin=serial
stdout=serial
stderr=serial
ethaddr=00:03:ca:00:64:df
ipaddr=192.168.0.30
netmask=255.255.255.0
serverip=192.168.0.1
nfsserverip=192.168.0.1
preboot=echo;echo Type "run nfsboot" to mount root filesystem over NFS;echo
gatewayip=192.168.0.1
ramargs=setenv bootargs root=/dev/ram rw
rootargs=setenv rootpath /tftp/$(ipaddr)
nfsargs=setenv bootargs root=/dev/nfs rw nfsroot=$(nfsserverip):$(rootpath)
addip=setenv bootargs $(bootargs) ip=$(ipaddr):$(nfsserverip):$(gatewayip):$(netmask):$(hostname):eth0:
ramboot=tftp 400000 /home/leox/pMulti;run ramargs;bootm
nfsboot=tftp 400000 /home/leox/uImage;run rootargs;run nfsargs;run addip;bootm
bootcmd=run ramboot
clocks_in_mhz=1
Environment size: 730/16380 bytes
##################################################
# Flash Memory Information
##############################
LEOX_elpt860: flinfo
Bank # 1: AMD AM29F040 (4 Mbits)
Size: 512 KB in 8 Sectors
Sector Start Addresses:
02000000 (RO) 02010000 (RO) 02020000 (RO) 02030000 (RO) 02040000
02050000 02060000 02070000
##################################################
# Board Information Structure
##############################
LEOX_elpt860: bdinfo
memstart = 0x00000000
memsize = 0x01000000
flashstart = 0x02000000
flashsize = 0x00080000
flashoffset = 0x00030000
sramstart = 0x00000000
sramsize = 0x00000000
immr_base = 0xFF000000
bootflags = 0x00000001
intfreq = 50 MHz
busfreq = 50 MHz
ethaddr = 00:03:ca:00:64:df
IP addr = 192.168.0.30
baudrate = 9600 bps
##################################################
# Image Download and run over serial port
# hello_world (S-Record image)
# ===> 1) Enter "loads" command into U-Boot monitor
# ===> 2) From TeraTerm's bar menu, Select 'File/Send file...'
# Then select 'hello_world.srec' with the file browser
##############################
U-Boot 0.2.2 (Jan 19 2003 - 11:08:39)
CPU: XPC860xxZPnnB at 50 MHz: 4 kB I-Cache 4 kB D-Cache FEC present
*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
Board: ### No HW ID - assuming ELPT860
DRAM: 16 MB
FLASH: 512 kB
In: serial
Out: serial
Err: serial
Net: SCC ETHERNET
Type "run nfsboot" to mount root filesystem over NFS
Hit any key to stop autoboot: 0
LEOX_elpt860: loads
## Ready for S-Record download ...
S804040004F3050154000501709905014C000501388D
## First Load Addr = 0x00040000
## Last Load Addr = 0x0005018B
## Total Size = 0x0001018C = 65932 Bytes
## Start Addr = 0x00040004
LEOX_elpt860: go 40004 This is a test !!!
## Starting application at 0x00040004 ...
Hello World
argc = 6
argv[0] = "40004"
argv[1] = "This"
argv[2] = "is"
argv[3] = "a"
argv[4] = "test"
argv[5] = "!!!"
argv[6] = "<NULL>"
Hit any key to exit ...
## Application terminated, rc = 0x0
##################################################
# Image download and run over ethernet interface
# Linux-2.4.4 (uImage) + Root filesystem mounted over NFS
##############################
U-Boot 0.2.2 (Jan 19 2003 - 11:08:39)
CPU: XPC860xxZPnnB at 50 MHz: 4 kB I-Cache 4 kB D-Cache FEC present
*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
Board: ### No HW ID - assuming ELPT860
DRAM: 16 MB
FLASH: 512 kB
In: serial
Out: serial
Err: serial
Net: SCC ETHERNET
Type "run nfsboot" to mount root filesystem over NFS
Hit any key to stop autoboot: 0
LEOX_elpt860: run nfsboot
ARP broadcast 1
TFTP from server 192.168.0.1; our IP address is 192.168.0.30
Filename '/home/leox/uImage'.
Load address: 0x400000
Loading: #################################################################
#############################
done
Bytes transferred = 477294 (7486e hex)
## Booting image at 00400000 ...
Image Name: Linux-2.4.4
Image Type: PowerPC Linux Kernel Image (gzip compressed)
Data Size: 477230 Bytes = 466 kB = 0 MB
Load Address: 00000000
Entry Point: 00000000
Verifying Checksum ... OK
Uncompressing Kernel Image ... OK
Linux version 2.4.4-rthal5 (leox@p5ak6650) (gcc version 2.95.3 20010315 (release/MontaVista)) #1 Wed Jul 3 10:23:53 CEST 2002
On node 0 totalpages: 4096
zone(0): 4096 pages.
zone(1): 0 pages.
zone(2): 0 pages.
Kernel command line: root=/dev/nfs rw nfsroot=192.168.0.1:/tftp/192.168.0.30 ip=192.168.0.30:192.168.0.1:192.168.0.1:255.255.255.0::eth0:
rtsched version <20010618.1050.24>
Decrementer Frequency: 3125000
Warning: real time clock seems stuck!
Calibrating delay loop... 49.76 BogoMIPS
Memory: 14720k available (928k kernel code, 384k data, 44k init, 0k highmem)
Dentry-cache hash table entries: 2048 (order: 2, 16384 bytes)
Buffer-cache hash table entries: 1024 (order: 0, 4096 bytes)
Page-cache hash table entries: 4096 (order: 2, 16384 bytes)
Inode-cache hash table entries: 1024 (order: 1, 8192 bytes)
POSIX conformance testing by UNIFIX
Linux NET4.0 for Linux 2.4
Based upon Swansea University Computer Society NET3.039
Starting kswapd v1.8
CPM UART driver version 0.03
ttyS0 on SMC1 at 0x0280, BRG1
block: queued sectors max/low 9701kB/3233kB, 64 slots per queue
RAMDISK driver initialized: 16 RAM disks of 4096K size 1024 blocksize
eth0: CPM ENET Version 0.2 on SCC1, 00:03:ca:00:64:df
NET4: Linux TCP/IP 1.0 for NET4.0
IP Protocols: ICMP, UDP, TCP
IP: routing cache hash table of 512 buckets, 4Kbytes
TCP: Hash tables configured (established 1024 bind 1024)
NET4: Unix domain sockets 1.0/SMP for Linux NET4.0.
Looking up port of RPC 100003/2 on 192.168.0.1
Looking up port of RPC 100005/2 on 192.168.0.1
VFS: Mounted root (nfs filesystem).
Freeing unused kernel memory: 44k init
INIT: version 2.78 booting
Welcome to DENX Embedded Linux Environment
Press 'I' to enter interactive startup.
Mounting proc filesystem: [ OK ]
Configuring kernel parameters: [ OK ]
Cannot access the Hardware Clock via any known method.
Use the --debug option to see the details of our search for an access method.
Setting clock : Wed Dec 31 19:00:11 EST 1969 [ OK ]
Activating swap partitions: [ OK ]
Setting hostname 192.168.0.30: [ OK ]
Finding module dependencies:
[ OK ]
Checking filesystems
Checking all file systems.
[ OK ]
Mounting local filesystems: [ OK ]
Enabling swap space: [ OK ]
INIT: Entering runlevel: 3
Entering non-interactive startup
Starting system logger: [ OK ]
Starting kernel logger: [ OK ]
Starting xinetd: [ OK ]
192 login: root
Last login: Wed Dec 31 19:00:41 on ttyS0
bash-2.04#
##################################################
# Image download and run over ethernet interface
# Linux-2.4.4 + Root filesystem mounted from RAM (pMulti)
##############################
U-Boot 0.2.2 (Jan 19 2003 - 11:08:39)
CPU: XPC860xxZPnnB at 50 MHz: 4 kB I-Cache 4 kB D-Cache FEC present
*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
Board: ### No HW ID - assuming ELPT860
DRAM: 16 MB
FLASH: 512 kB
In: serial
Out: serial
Err: serial
Net: SCC ETHERNET
Type "run nfsboot" to mount root filesystem over NFS
Hit any key to stop autoboot: 0
LEOX_elpt860: run ramboot
ARP broadcast 1
TFTP from server 192.168.0.1; our IP address is 192.168.0.30
Filename '/home/leox/pMulti'.
Load address: 0x400000
Loading: #################################################################
#################################################################
#################################################################
#################################################################
#################################################################
########################################################
done
Bytes transferred = 1947816 (1db8a8 hex)
## Booting image at 00400000 ...
Image Name: linux-2.4.4-2002-03-21 Multiboot
Image Type: PowerPC Linux Multi-File Image (gzip compressed)
Data Size: 1947752 Bytes = 1902 kB = 1 MB
Load Address: 00000000
Entry Point: 00000000
Contents:
Image 0: 477230 Bytes = 466 kB = 0 MB
Image 1: 1470508 Bytes = 1436 kB = 1 MB
Verifying Checksum ... OK
Uncompressing Multi-File Image ... OK
Loading Ramdisk to 00e44000, end 00fab02c ... OK
Linux version 2.4.4-rthal5 (leox@p5ak6650) (gcc version 2.95.3 20010315 (release/MontaVista)) #1 Wed Jul 3 10:23:53 CEST 2002
On node 0 totalpages: 4096
zone(0): 4096 pages.
zone(1): 0 pages.
zone(2): 0 pages.
Kernel command line: root=/dev/ram rw
rtsched version <20010618.1050.24>
Decrementer Frequency: 3125000
Warning: real time clock seems stuck!
Calibrating delay loop... 49.76 BogoMIPS
Memory: 13280k available (928k kernel code, 384k data, 44k init, 0k highmem)
Dentry-cache hash table entries: 2048 (order: 2, 16384 bytes)
Buffer-cache hash table entries: 1024 (order: 0, 4096 bytes)
Page-cache hash table entries: 4096 (order: 2, 16384 bytes)
Inode-cache hash table entries: 1024 (order: 1, 8192 bytes)
POSIX conformance testing by UNIFIX
Linux NET4.0 for Linux 2.4
Based upon Swansea University Computer Society NET3.039
Starting kswapd v1.8
CPM UART driver version 0.03
ttyS0 on SMC1 at 0x0280, BRG1
block: queued sectors max/low 8741kB/2913kB, 64 slots per queue
RAMDISK driver initialized: 16 RAM disks of 4096K size 1024 blocksize
eth0: CPM ENET Version 0.2 on SCC1, 00:03:ca:00:64:df
RAMDISK: Compressed image found at block 0
Freeing initrd memory: 1436k freed
NET4: Linux TCP/IP 1.0 for NET4.0
IP Protocols: ICMP, UDP, TCP
IP: routing cache hash table of 512 buckets, 4Kbytes
TCP: Hash tables configured (established 1024 bind 1024)
IP-Config: Incomplete network configuration information.
NET4: Unix domain sockets 1.0/SMP for Linux NET4.0.
VFS: Mounted root (ext2 filesystem).
Freeing unused kernel memory: 44k in<69>
init started: BusyBox v0.60.2 (2002.07.01-12:06+0000) multi-call Configuring hostname
Configuring lo...
Configuring eth0...
Configuring Gateway...
Please press Enter to activate this console.
ELPT860 login: root
Password:
Welcome to Linux-2.4.4 for ELPT CPU board (MPC860T @ 50MHz)
a8888b.
d888888b.
8P"YP"Y88
_ _ 8|o||o|88
| | |_| 8' .88
| | _ ____ _ _ _ _ 8`._.' Y8.
| | | | _ \| | | |\ \/ / d/ `8b.
| |___ | | | | | |_| |/ \ .dP . Y8b.
|_____||_|_| |_|\____|\_/\_/ d8:' " `::88b.
d8" `Y88b
:8P ' :888
8a. : _a88P
._/"Yaa_ : .| 88P|
\ YP" `| 8P `.
/ \._____.d| .'
`--..__)888888P`._.'
login[21]: root login on `ttyS0'
BusyBox v0.60.3 (2002.07.20-10:39+0000) Built-in shell (ash)
Enter 'help' for a list of built-in commands.
root@ELPT860:~ #

View File

@@ -0,0 +1,36 @@
#######################################################################
#
# Copyright (C) 2000, 2001, 2002, 2003
# The LEOX team <team@leox.org>, http://www.leox.org
#
# LEOX.org is about the development of free hardware and software resources
# for system on chip.
#
# Description: U-Boot port on the LEOX's ELPT860 CPU board
# ~~~~~~~~~~~
#
#######################################################################
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
#######################################################################
#
# ELPT860 board
#
TEXT_BASE = 0x02000000
#TEXT_BASE = 0x00FB0000

View File

@@ -0,0 +1,399 @@
/*
**=====================================================================
**
** Copyright (C) 2000, 2001, 2002, 2003
** The LEOX team <team@leox.org>, http://www.leox.org
**
** LEOX.org is about the development of free hardware and software resources
** for system on chip.
**
** Description: U-Boot port on the LEOX's ELPT860 CPU board
** ~~~~~~~~~~~
**
**=====================================================================
**
** This program is free software; you can redistribute it and/or
** modify it under the terms of the GNU General Public License as
** published by the Free Software Foundation; either version 2 of
** the License, or (at your option) any later version.
**
** This program is distributed in the hope that it will be useful,
** but WITHOUT ANY WARRANTY; without even the implied warranty of
** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
** GNU General Public License for more details.
**
** You should have received a copy of the GNU General Public License
** along with this program; if not, write to the Free Software
** Foundation, Inc., 59 Temple Place, Suite 330, Boston,
** MA 02111-1307 USA
**
**=====================================================================
*/
/*
** Note 1: In this file, you have to provide the following functions:
** ------
** int board_pre_init(void)
** int checkboard(void)
** long int initdram(int board_type)
** called from 'board_init_f()' into 'common/board.c'
**
** void reset_phy(void)
** called from 'board_init_r()' into 'common/board.c'
*/
#include <common.h>
#include <mpc8xx.h>
/* ------------------------------------------------------------------------- */
static long int dram_size (long int, long int *, long int);
/* ------------------------------------------------------------------------- */
#define _NOT_USED_ 0xFFFFFFFF
const uint init_sdram_table[] =
{
/*
* Single Read. (Offset 0 in UPMA RAM)
*/
0x0FFCCC04, 0xFFFFFC04, 0x0FFC3C04, 0xFFFFFC04,
0xFFFFFC04, /* last */
/*
* SDRAM Initialization (offset 5 in UPMA RAM)
*
* This is no UPM entry point. The following definition uses
* the remaining space to establish an initialization
* sequence, which is executed by a RUN command.
*
*/
0xFFFFFC04, 0xFFFFFC04, 0x0FFC3C04, /* last */
/*
* Burst Read. (Offset 8 in UPMA RAM)
*/
0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04,
0x0FFC3C04, 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04,
0xFFFFFC04, 0x0FFC3C04, 0xFFFFFC04, 0xFFFFFC04,
0xFFFFFC04, 0xFFFFFC04, 0x0FFC3C04, 0xFFFFFC04, /* last */
/*
* Single Write. (Offset 18 in UPMA RAM)
*/
0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04, 0x0FFC3C04,
0xFFFFFC04, 0xFFFFFC04, 0x0FFFFC04, 0xFFFFFC04, /* last */
/*
* Burst Write. (Offset 20 in UPMA RAM)
*/
0x0FFC3C04, 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04,
0xFFFFFC04, 0x0FFC3C04, 0xFFFFFC04, 0xFFFFFC04,
0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC34, 0x0FAC0C34,
0xFFFFFC05, 0xFFFFFC04, 0x0FFCFC04, 0xFFFFFC05, /* last */
};
const uint sdram_table[] =
{
/*
* Single Read. (Offset 0 in UPMA RAM)
*/
0x0F0FFC24, 0x0F0CFC04, 0xFF0FFC04, 0x00AF3C04,
0xFF0FFC00, /* last */
/*
* SDRAM Initialization (offset 5 in UPMA RAM)
*
* This is no UPM entry point. The following definition uses
* the remaining space to establish an initialization
* sequence, which is executed by a RUN command.
*
*/
0x0FFCCC04, 0xFFAFFC05, 0xFFAFFC05, /* last */
/*
* Burst Read. (Offset 8 in UPMA RAM)
*/
0x0F0FFC24, 0x0F0CFC04, 0xFF0FFC04, 0x00AF3C04,
0xF00FFC00, 0xF00FFC00, 0xF00FFC00, 0xFF0FFC00,
0x0FFCCC04, 0xFFAFFC05, 0xFFAFFC04, 0xFFAFFC04,
0xFFAFFC04, 0xFFAFFC04, 0xFFAFFC04, 0xFFAFFC04, /* last */
/*
* Single Write. (Offset 18 in UPMA RAM)
*/
0x0F0FFC24, 0x0F0CFC04, 0xFF0FFC04, 0x00AF0C00,
0xFF0FFC04, 0x0FFCCC04, 0xFFAFFC05, /* last */
_NOT_USED_,
/*
* Burst Write. (Offset 20 in UPMA RAM)
*/
0x0F0FFC24, 0x0F0CFC04, 0xFF0FFC00, 0x00AF0C00,
0xF00FFC00, 0xF00FFC00, 0xF00FFC04, 0x0FFCCC04,
0xFFAFFC04, 0xFFAFFC05, 0xFFAFFC04, 0xFFAFFC04,
0xFFAFFC04, 0xFFAFFC04, 0xFFAFFC04, 0xFFAFFC04, /* last */
/*
* Refresh (Offset 30 in UPMA RAM)
*/
0x0FFC3C04, 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04,
0xFFFFFC05, 0xFFFFFC04, 0xFFFFFC05, _NOT_USED_,
0xFFAFFC04, 0xFFAFFC04, 0xFFAFFC04, 0xFFAFFC04, /* last */
/*
* Exception. (Offset 3c in UPMA RAM)
*/
0x0FFFFC34, 0x0FAC0C34, 0xFFFFFC05, 0xFFAFFC04, /* last */
};
/* ------------------------------------------------------------------------- */
#define CFG_PC4 0x0800
#define CFG_DS1 CFG_PC4
/*
* Very early board init code (fpga boot, etc.)
*/
int
board_pre_init (void)
{
volatile immap_t *immr = (immap_t *) CFG_IMMR;
/*
* Light up the red led on ELPT860 pcb (DS1) (PCDAT)
*/
immr->im_ioport.iop_pcdat &= ~CFG_DS1; /* PCDAT (DS1 = 0) */
immr->im_ioport.iop_pcpar &= ~CFG_DS1; /* PCPAR (0=general purpose I/O) */
immr->im_ioport.iop_pcdir |= CFG_DS1; /* PCDIR (I/O: 0=input, 1=output) */
return ( 0 ); /* success */
}
/*
* Check Board Identity:
*
* Test ELPT860 ID string
*
* Return 1 if no second DRAM bank, otherwise returns 0
*/
int
checkboard (void)
{
unsigned char *s = getenv("serial#");
if ( !s || strncmp(s, "ELPT860", 7) )
printf ("### No HW ID - assuming ELPT860\n");
return ( 0 ); /* success */
}
/* ------------------------------------------------------------------------- */
long int
initdram (int board_type)
{
volatile immap_t *immap = (immap_t *)CFG_IMMR;
volatile memctl8xx_t *memctl = &immap->im_memctl;
long int size8, size9;
long int size_b0 = 0;
/*
* This sequence initializes SDRAM chips on ELPT860 board
*/
upmconfig(UPMA, (uint *)init_sdram_table,
sizeof(init_sdram_table)/sizeof(uint));
memctl->memc_mptpr = 0x0200;
memctl->memc_mamr = 0x18002111;
memctl->memc_mar = 0x00000088;
memctl->memc_mcr = 0x80002000; /* CS1: SDRAM bank 0 */
upmconfig(UPMA, (uint *)sdram_table,
sizeof(sdram_table)/sizeof(uint));
/*
* Preliminary prescaler for refresh (depends on number of
* banks): This value is selected for four cycles every 62.4 us
* with two SDRAM banks or four cycles every 31.2 us with one
* bank. It will be adjusted after memory sizing.
*/
memctl->memc_mptpr = CFG_MPTPR_2BK_8K;
/*
* The following value is used as an address (i.e. opcode) for
* the LOAD MODE REGISTER COMMAND during SDRAM initialisation. If
* the port size is 32bit the SDRAM does NOT "see" the lower two
* address lines, i.e. mar=0x00000088 -> opcode=0x00000022 for
* MICRON SDRAMs:
* -> 0 00 010 0 010
* | | | | +- Burst Length = 4
* | | | +----- Burst Type = Sequential
* | | +------- CAS Latency = 2
* | +----------- Operating Mode = Standard
* +-------------- Write Burst Mode = Programmed Burst Length
*/
memctl->memc_mar = 0x00000088;
/*
* Map controller banks 2 and 3 to the SDRAM banks 2 and 3 at
* preliminary addresses - these have to be modified after the
* SDRAM size has been determined.
*/
memctl->memc_or1 = CFG_OR1_PRELIM;
memctl->memc_br1 = CFG_BR1_PRELIM;
memctl->memc_mamr = CFG_MAMR_8COL & (~(MAMR_PTAE)); /* no refresh yet */
udelay (200);
/* perform SDRAM initializsation sequence */
memctl->memc_mcr = 0x80002105; /* CS1: SDRAM bank 0 */
udelay (1);
memctl->memc_mcr = 0x80002230; /* CS1: SDRAM bank 0 - execute twice */
udelay (1);
memctl->memc_mamr |= MAMR_PTAE; /* enable refresh */
udelay (1000);
/*
* Check Bank 0 Memory Size for re-configuration
*
* try 8 column mode
*/
size8 = dram_size (CFG_MAMR_8COL,
(ulong *) SDRAM_BASE1_PRELIM,
SDRAM_MAX_SIZE);
udelay (1000);
/*
* try 9 column mode
*/
size9 = dram_size (CFG_MAMR_9COL,
(ulong *) SDRAM_BASE1_PRELIM,
SDRAM_MAX_SIZE);
if ( size8 < size9 ) /* leave configuration at 9 columns */
{
size_b0 = size9;
/* debug ("SDRAM Bank 0 in 9 column mode: %ld MB\n", size >> 20); */
}
else /* back to 8 columns */
{
size_b0 = size8;
memctl->memc_mamr = CFG_MAMR_8COL;
udelay (500);
/* debug ("SDRAM Bank 0 in 8 column mode: %ld MB\n", size >> 20); */
}
udelay (1000);
/*
* Adjust refresh rate depending on SDRAM type, both banks
* For types > 128 MBit leave it at the current (fast) rate
*/
if ( size_b0 < 0x02000000 )
{
/* reduce to 15.6 us (62.4 us / quad) */
memctl->memc_mptpr = CFG_MPTPR_2BK_4K;
udelay (1000);
}
/*
* Final mapping: map bigger bank first
*/
memctl->memc_or1 = ((-size_b0) & 0xFFFF0000) | CFG_OR_TIMING_SDRAM;
memctl->memc_br1 = (CFG_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA | BR_V;
{
unsigned long reg;
/* adjust refresh rate depending on SDRAM type, one bank */
reg = memctl->memc_mptpr;
reg >>= 1; /* reduce to CFG_MPTPR_1BK_8K / _4K */
memctl->memc_mptpr = reg;
}
udelay(10000);
return (size_b0);
}
/* ------------------------------------------------------------------------- */
/*
* Check memory range for valid RAM. A simple memory test determines
* the actually available RAM size between addresses `base' and
* `base + maxsize'. Some (not all) hardware errors are detected:
* - short between address lines
* - short between data lines
*/
static long int
dram_size (long int mamr_value,
long int *base,
long int maxsize)
{
volatile immap_t *immap = (immap_t *)CFG_IMMR;
volatile memctl8xx_t *memctl = &immap->im_memctl;
volatile long int *addr;
ulong cnt, val;
ulong save[32]; /* to make test non-destructive */
unsigned char i = 0;
memctl->memc_mamr = mamr_value;
for (cnt = maxsize/sizeof(long); cnt > 0; cnt >>= 1)
{
addr = base + cnt; /* pointer arith! */
save[i++] = *addr;
*addr = ~cnt;
}
/* write 0 to base address */
addr = base;
save[i] = *addr;
*addr = 0;
/* check at base address */
if ( (val = *addr) != 0 )
{
*addr = save[i];
return (0);
}
for (cnt = 1; cnt <= maxsize/sizeof(long); cnt <<= 1)
{
addr = base + cnt; /* pointer arith! */
val = *addr;
*addr = save[--i];
if ( val != (~cnt) )
{
return (cnt * sizeof(long));
}
}
return (maxsize);
}
/* ------------------------------------------------------------------------- */
#define CFG_PA1 0x4000
#define CFG_PA2 0x2000
#define CFG_LBKs (CFG_PA2 | CFG_PA1)
void
reset_phy (void)
{
volatile immap_t *immr = (immap_t *) CFG_IMMR;
/*
* Ensure LBK LXT901 ethernet 1 & 2 = 0 ... for normal loopback in effect
* and no AUI loopback
*/
immr->im_ioport.iop_padat &= ~CFG_LBKs; /* PADAT (LBK eth 1&2 = 0) */
immr->im_ioport.iop_papar &= ~CFG_LBKs; /* PAPAR (0=general purpose I/O) */
immr->im_ioport.iop_padir |= CFG_LBKs; /* PADIR (I/O: 0=input, 1=output) */
}

615
board/LEOX/elpt860/flash.c Normal file
View File

@@ -0,0 +1,615 @@
/*
**=====================================================================
**
** Copyright (C) 2000, 2001, 2002, 2003
** The LEOX team <team@leox.org>, http://www.leox.org
**
** LEOX.org is about the development of free hardware and software resources
** for system on chip.
**
** Description: U-Boot port on the LEOX's ELPT860 CPU board
** ~~~~~~~~~~~
**
**=====================================================================
**
** This program is free software; you can redistribute it and/or
** modify it under the terms of the GNU General Public License as
** published by the Free Software Foundation; either version 2 of
** the License, or (at your option) any later version.
**
** This program is distributed in the hope that it will be useful,
** but WITHOUT ANY WARRANTY; without even the implied warranty of
** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
** GNU General Public License for more details.
**
** You should have received a copy of the GNU General Public License
** along with this program; if not, write to the Free Software
** Foundation, Inc., 59 Temple Place, Suite 330, Boston,
** MA 02111-1307 USA
**
**=====================================================================
*/
/*
** Note 1: In this file, you have to provide the following variable:
** ------
** flash_info_t flash_info[CFG_MAX_FLASH_BANKS]
** 'flash_info_t' structure is defined into 'include/flash.h'
** and defined as extern into 'common/cmd_flash.c'
**
** Note 2: In this file, you have to provide the following functions:
** ------
** unsigned long flash_init(void)
** called from 'board_init_r()' into 'common/board.c'
**
** void flash_print_info(flash_info_t *info)
** called from 'do_flinfo()' into 'common/cmd_flash.c'
**
** int flash_erase(flash_info_t *info,
** int s_first,
** int s_last)
** called from 'do_flerase()' & 'flash_sect_erase()' into 'common/cmd_flash.c'
**
** int write_buff (flash_info_t *info,
** uchar *src,
** ulong addr,
** ulong cnt)
** called from 'flash_write()' into 'common/cmd_flash.c'
*/
#include <common.h>
#include <mpc8xx.h>
#ifndef CFG_ENV_ADDR
# define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET)
#endif
flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
/*-----------------------------------------------------------------------
* Internal Functions
*/
static void flash_get_offsets (ulong base, flash_info_t *info);
static ulong flash_get_size (volatile unsigned char *addr, flash_info_t *info);
static int write_word (flash_info_t *info, ulong dest, ulong data);
static int write_byte (flash_info_t *info, ulong dest, uchar data);
/*-----------------------------------------------------------------------
*/
unsigned long
flash_init (void)
{
volatile immap_t *immap = (immap_t *)CFG_IMMR;
volatile memctl8xx_t *memctl = &immap->im_memctl;
unsigned long size_b0;
int i;
/* Init: no FLASHes known */
for (i=0; i<CFG_MAX_FLASH_BANKS; ++i)
{
flash_info[i].flash_id = FLASH_UNKNOWN;
}
/* Static FLASH Bank configuration here - FIXME XXX */
size_b0 = flash_get_size ((volatile unsigned char *)FLASH_BASE0_PRELIM,
&flash_info[0]);
if ( flash_info[0].flash_id == FLASH_UNKNOWN )
{
printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
size_b0, size_b0<<20);
}
/* Remap FLASH according to real size */
memctl->memc_or0 = CFG_OR_TIMING_FLASH | (-size_b0 & OR_AM_MSK);
memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) | BR_MS_GPCM | BR_PS_8 | BR_V;
/* Re-do sizing to get full correct info */
size_b0 = flash_get_size ((volatile unsigned char *)CFG_FLASH_BASE,
&flash_info[0]);
flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]);
#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
/* monitor protection ON by default */
flash_protect (FLAG_PROTECT_SET,
CFG_MONITOR_BASE,
CFG_MONITOR_BASE + monitor_flash_len-1,
&flash_info[0]);
#endif
#ifdef CFG_ENV_IS_IN_FLASH
/* ENV protection ON by default */
flash_protect(FLAG_PROTECT_SET,
CFG_ENV_ADDR,
CFG_ENV_ADDR + CFG_ENV_SIZE-1,
&flash_info[0]);
#endif
flash_info[0].size = size_b0;
return (size_b0);
}
/*-----------------------------------------------------------------------
*/
static void
flash_get_offsets (ulong base,
flash_info_t *info)
{
int i;
#define SECTOR_64KB 0x00010000
/* set up sector start adress table */
for (i = 0; i < info->sector_count; i++)
{
info->start[i] = base + (i * SECTOR_64KB);
}
}
/*-----------------------------------------------------------------------
*/
void
flash_print_info (flash_info_t *info)
{
int i;
if ( info->flash_id == FLASH_UNKNOWN )
{
printf ("missing or unknown FLASH type\n");
return;
}
switch ( info->flash_id & FLASH_VENDMASK )
{
case FLASH_MAN_AMD: printf ("AMD "); break;
case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
case FLASH_MAN_STM: printf ("STM (Thomson) "); break;
default: printf ("Unknown Vendor "); break;
}
switch ( info->flash_id & FLASH_TYPEMASK )
{
case FLASH_AM040: printf ("AM29F040 (4 Mbits)\n");
break;
default: printf ("Unknown Chip Type\n");
break;
}
printf (" Size: %ld KB in %d Sectors\n",
info->size >> 10, info->sector_count);
printf (" Sector Start Addresses:");
for (i=0; i<info->sector_count; ++i)
{
if ((i % 5) == 0)
printf ("\n ");
printf (" %08lX%s",
info->start[i],
info->protect[i] ? " (RO)" : " "
);
}
printf ("\n");
return;
}
/*-----------------------------------------------------------------------
*/
/*-----------------------------------------------------------------------
*/
/*
* The following code cannot be run from FLASH!
*/
static ulong
flash_get_size (volatile unsigned char *addr,
flash_info_t *info)
{
short i;
uchar value;
ulong base = (ulong)addr;
/* Write auto select command: read Manufacturer ID */
addr[0x0555] = 0xAA;
addr[0x02AA] = 0x55;
addr[0x0555] = 0x90;
value = addr[0];
switch ( value )
{
/* case AMD_MANUFACT: */
case 0x01:
info->flash_id = FLASH_MAN_AMD;
break;
/* case FUJ_MANUFACT: */
case 0x04:
info->flash_id = FLASH_MAN_FUJ;
break;
/* case STM_MANUFACT: */
case 0x20:
info->flash_id = FLASH_MAN_STM;
break;
default:
info->flash_id = FLASH_UNKNOWN;
info->sector_count = 0;
info->size = 0;
return (0); /* no or unknown flash */
}
value = addr[1]; /* device ID */
switch ( value )
{
case STM_ID_F040B:
case AMD_ID_F040B:
info->flash_id += FLASH_AM040; /* 4 Mbits = 512k * 8 */
info->sector_count = 8;
info->size = 0x00080000;
break;
default:
info->flash_id = FLASH_UNKNOWN;
return (0); /* => no or unknown flash */
}
/* set up sector start adress table */
for (i = 0; i < info->sector_count; i++)
{
info->start[i] = base + (i * 0x00010000);
}
/* check for protected sectors */
for (i = 0; i < info->sector_count; i++)
{
/* read sector protection at sector address, (A7 .. A0) = 0x02 */
/* D0 = 1 if protected */
addr = (volatile unsigned char *)(info->start[i]);
info->protect[i] = addr[2] & 1;
}
/*
* Prevent writes to uninitialized FLASH.
*/
if ( info->flash_id != FLASH_UNKNOWN )
{
addr = (volatile unsigned char *)info->start[0];
*addr = 0xF0; /* reset bank */
}
return (info->size);
}
/*-----------------------------------------------------------------------
*/
int
flash_erase (flash_info_t *info,
int s_first,
int s_last)
{
volatile unsigned char *addr = (volatile unsigned char *)(info->start[0]);
int flag, prot, sect, l_sect;
ulong start, now, last;
if ( (s_first < 0) || (s_first > s_last) )
{
if ( info->flash_id == FLASH_UNKNOWN )
{
printf ("- missing\n");
}
else
{
printf ("- no sectors to erase\n");
}
return ( 1 );
}
if ( (info->flash_id == FLASH_UNKNOWN) ||
(info->flash_id > FLASH_AMD_COMP) )
{
printf ("Can't erase unknown flash type %08lx - aborted\n",
info->flash_id);
return ( 1 );
}
prot = 0;
for (sect=s_first; sect<=s_last; ++sect)
{
if ( info->protect[sect] )
{
prot++;
}
}
if ( prot )
{
printf ("- Warning: %d protected sectors will not be erased!\n", prot);
}
else
{
printf ("\n");
}
l_sect = -1;
/* Disable interrupts which might cause a timeout here */
flag = disable_interrupts();
addr[0x0555] = 0xAA;
addr[0x02AA] = 0x55;
addr[0x0555] = 0x80;
addr[0x0555] = 0xAA;
addr[0x02AA] = 0x55;
/* Start erase on unprotected sectors */
for (sect = s_first; sect<=s_last; sect++)
{
if (info->protect[sect] == 0) /* not protected */
{
addr = (volatile unsigned char *)(info->start[sect]);
addr[0] = 0x30;
l_sect = sect;
}
}
/* re-enable interrupts if necessary */
if ( flag )
enable_interrupts();
/* wait at least 80us - let's wait 1 ms */
udelay (1000);
/*
* We wait for the last triggered sector
*/
if ( l_sect < 0 )
goto DONE;
start = get_timer (0);
last = start;
addr = (volatile unsigned char *)(info->start[l_sect]);
while ( (addr[0] & 0x80) != 0x80 )
{
if ( (now = get_timer(start)) > CFG_FLASH_ERASE_TOUT )
{
printf ("Timeout\n");
return ( 1 );
}
/* show that we're waiting */
if ( (now - last) > 1000 ) /* every second */
{
putc ('.');
last = now;
}
}
DONE:
/* reset to read mode */
addr = (volatile unsigned char *)info->start[0];
addr[0] = 0xF0; /* reset bank */
printf (" done\n");
return ( 0 );
}
/*-----------------------------------------------------------------------
* Copy memory to flash, returns:
* 0 - OK
* 1 - write timeout
* 2 - Flash not erased
*/
int
write_buff (flash_info_t *info,
uchar *src,
ulong addr,
ulong cnt)
{
ulong cp, wp, data;
uchar bdata;
int i, l, rc;
if ( (info->flash_id & FLASH_TYPEMASK) == FLASH_AM040 )
{
/* Width of the data bus: 8 bits */
wp = addr;
while ( cnt )
{
bdata = *src++;
if ( (rc = write_byte(info, wp, bdata)) != 0 )
{
return (rc);
}
++wp;
--cnt;
}
return ( 0 );
}
else
{
/* Width of the data bus: 32 bits */
wp = (addr & ~3); /* get lower word aligned address */
/*
* handle unaligned start bytes
*/
if ( (l = addr - wp) != 0 )
{
data = 0;
for (i=0, cp=wp; i<l; ++i, ++cp)
{
data = (data << 8) | (*(uchar *)cp);
}
for (; i<4 && cnt>0; ++i)
{
data = (data << 8) | *src++;
--cnt;
++cp;
}
for (; cnt==0 && i<4; ++i, ++cp)
{
data = (data << 8) | (*(uchar *)cp);
}
if ( (rc = write_word(info, wp, data)) != 0 )
{
return (rc);
}
wp += 4;
}
/*
* handle word aligned part
*/
while ( cnt >= 4 )
{
data = 0;
for (i=0; i<4; ++i)
{
data = (data << 8) | *src++;
}
if ( (rc = write_word(info, wp, data)) != 0 )
{
return (rc);
}
wp += 4;
cnt -= 4;
}
if ( cnt == 0 )
{
return (0);
}
/*
* handle unaligned tail bytes
*/
data = 0;
for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp)
{
data = (data << 8) | *src++;
--cnt;
}
for (; i<4; ++i, ++cp)
{
data = (data << 8) | (*(uchar *)cp);
}
return (write_word(info, wp, data));
}
}
/*-----------------------------------------------------------------------
* Write a word to Flash, returns:
* 0 - OK
* 1 - write timeout
* 2 - Flash not erased
*/
static int
write_word (flash_info_t *info,
ulong dest,
ulong data)
{
vu_long *addr = (vu_long*)(info->start[0]);
ulong start;
int flag;
/* Check if Flash is (sufficiently) erased */
if ( (*((vu_long *)dest) & data) != data )
{
return (2);
}
/* Disable interrupts which might cause a timeout here */
flag = disable_interrupts();
addr[0x0555] = 0x00AA00AA;
addr[0x02AA] = 0x00550055;
addr[0x0555] = 0x00A000A0;
*((vu_long *)dest) = data;
/* re-enable interrupts if necessary */
if ( flag )
enable_interrupts();
/* data polling for D7 */
start = get_timer (0);
while ( (*((vu_long *)dest) & 0x00800080) != (data & 0x00800080) )
{
if ( get_timer(start) > CFG_FLASH_WRITE_TOUT )
{
return (1);
}
}
return (0);
}
/*-----------------------------------------------------------------------
* Write a byte to Flash, returns:
* 0 - OK
* 1 - write timeout
* 2 - Flash not erased
*/
static int
write_byte (flash_info_t *info,
ulong dest,
uchar data)
{
volatile unsigned char *addr = (volatile unsigned char *)(info->start[0]);
ulong start;
int flag;
/* Check if Flash is (sufficiently) erased */
if ( (*((volatile unsigned char *)dest) & data) != data )
{
return (2);
}
/* Disable interrupts which might cause a timeout here */
flag = disable_interrupts();
addr[0x0555] = 0xAA;
addr[0x02AA] = 0x55;
addr[0x0555] = 0xA0;
*((volatile unsigned char *)dest) = data;
/* re-enable interrupts if necessary */
if ( flag )
enable_interrupts();
/* data polling for D7 */
start = get_timer (0);
while ( (*((volatile unsigned char *)dest) & 0x80) != (data & 0x80) )
{
if ( get_timer(start) > CFG_FLASH_WRITE_TOUT )
{
return (1);
}
}
return (0);
}
/*-----------------------------------------------------------------------
*/

View File

@@ -0,0 +1,151 @@
/*
**=====================================================================
**
** Copyright (C) 2000, 2001, 2002, 2003
** The LEOX team <team@leox.org>, http://www.leox.org
**
** LEOX.org is about the development of free hardware and software resources
** for system on chip.
**
** Description: U-Boot port on the LEOX's ELPT860 CPU board
** ~~~~~~~~~~~
**
**=====================================================================
**
** This program is free software; you can redistribute it and/or
** modify it under the terms of the GNU General Public License as
** published by the Free Software Foundation; either version 2 of
** the License, or (at your option) any later version.
**
** This program is distributed in the hope that it will be useful,
** but WITHOUT ANY WARRANTY; without even the implied warranty of
** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
** GNU General Public License for more details.
**
** You should have received a copy of the GNU General Public License
** along with this program; if not, write to the Free Software
** Foundation, Inc., 59 Temple Place, Suite 330, Boston,
** MA 02111-1307 USA
**
**=====================================================================
*/
OUTPUT_ARCH(powerpc)
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
cpu/mpc8xx/start.o (.text)
common/dlmalloc.o (.text)
lib_ppc/ppcstring.o (.text)
lib_generic/vsprintf.o (.text)
lib_generic/crc32.o (.text)
lib_generic/zlib.o (.text)
lib_generic/string.o (.text)
lib_ppc/cache.o (.text)
lib_ppc/extable.o (.text)
lib_ppc/time.o (.text)
lib_ppc/ticks.o (.text)
. = env_offset;
common/environment.o (.text)
*(.text)
*(.fixup)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
}
_end = . ;
PROVIDE (end = .);
}

View File

@@ -0,0 +1,139 @@
/*
**=====================================================================
**
** Copyright (C) 2000, 2001, 2002, 2003
** The LEOX team <team@leox.org>, http://www.leox.org
**
** LEOX.org is about the development of free hardware and software resources
** for system on chip.
**
** Description: U-Boot port on the LEOX's ELPT860 CPU board
** ~~~~~~~~~~~
**
**=====================================================================
**
** This program is free software; you can redistribute it and/or
** modify it under the terms of the GNU General Public License as
** published by the Free Software Foundation; either version 2 of
** the License, or (at your option) any later version.
**
** This program is distributed in the hope that it will be useful,
** but WITHOUT ANY WARRANTY; without even the implied warranty of
** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
** GNU General Public License for more details.
**
** You should have received a copy of the GNU General Public License
** along with this program; if not, write to the Free Software
** Foundation, Inc., 59 Temple Place, Suite 330, Boston,
** MA 02111-1307 USA
**
**=====================================================================
*/
OUTPUT_ARCH(powerpc)
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
cpu/mpc8xx/start.o (.text)
common/dlmalloc.o (.text)
lib_generic/vsprintf.o (.text)
lib_generic/crc32.o (.text)
. = env_offset;
common/environment.o (.text)
*(.text)
*(.fixup)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.rodata)
*(.rodata1)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x0FFF) & 0xFFFFF000;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(4096);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(4096);
__init_end = .;
__bss_start = .;
.bss :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
}
_end = . ;
PROVIDE (end = .);
}

View File

@@ -30,47 +30,47 @@
#include "via686.h"
__asm(" .globl send_kb \n
send_kb: \n
lis r9, 0xfe00 \n
\n
li r4, 0x10 # retries \n
mtctr r4 \n
\n
idle: \n
lbz r4, 0x64(r9) \n
andi. r4, r4, 0x02 \n
bne idle \n
\n
ready: \n
stb r3, 0x60(r9) \n
\n
check: \n
lbz r4, 0x64(r9) \n
andi. r4, r4, 0x01 \n
beq check \n
\n
lbz r4, 0x60(r9) \n
cmpwi r4, 0xfa \n
beq done \n
\n
bdnz idle \n
\n
li r3, 0 \n
blr \n
\n
done: \n
li r3, 1 \n
blr \n
\n
.globl test_kb \n
test_kb: \n
mflr r10 \n
li r3, 0xed \n
bl send_kb \n
li r3, 0x01 \n
bl send_kb \n
mtlr r10 \n
blr \n
send_kb: \n
lis r9, 0xfe00 \n
\n
li r4, 0x10 # retries \n
mtctr r4 \n
\n
idle: \n
lbz r4, 0x64(r9) \n
andi. r4, r4, 0x02 \n
bne idle \n
\n
ready: \n
stb r3, 0x60(r9) \n
\n
check: \n
lbz r4, 0x64(r9) \n
andi. r4, r4, 0x01 \n
beq check \n
\n
lbz r4, 0x60(r9) \n
cmpwi r4, 0xfa \n
beq done \n
\n
bdnz idle \n
\n
li r3, 0 \n
blr \n
\n
done: \n
li r3, 1 \n
blr \n
\n
.globl test_kb \n
test_kb: \n
mflr r10 \n
li r3, 0xed \n
bl send_kb \n
li r3, 0x01 \n
bl send_kb \n
mtlr r10 \n
blr \n
");
@@ -86,7 +86,6 @@ long initdram (int board_type)
}
void after_reloc (ulong dest_addr, gd_t *gd)
{
/* HJF: DECLARE_GLOBAL_DATA_PTR; */
@@ -107,7 +106,7 @@ int misc_init_r (void)
}
void pci_init (void)
void pci_init_board (void)
{
#ifndef CONFIG_RAMBOOT
articiaS_pci_init ();

View File

@@ -33,14 +33,14 @@ COBJS = $(BOARD).o articiaS.o flash.o serial.o smbus.o articiaS_pci.o \
AOBJS = board_asm_init.o memio.o
OBJS = $(COBJS) $(AOBJS)
OBJS = $(COBJS) $(AOBJS)
EMUDIR = ../bios_emulator/scitech/src/x86emu/
EMUOBJ = $(EMUDIR)decode.o $(EMUDIR)ops2.o $(EMUDIR)fpu.o $(EMUDIR)prim_ops.o \
$(EMUDIR)ops.o $(EMUDIR)sys.o
EMUSRC = $(EMUOBJ:.o=.c)
$(LIB): .depend $(OBJS) $(EMUSRC)
$(LIB): .depend $(OBJS) $(EMUSRC)
make libx86emu.a -C ../bios_emulator/scitech/src/x86emu -f makefile.uboot CROSS_COMPILE=$(CROSS_COMPILE)
-rm $(LIB)
$(AR) crv $@ $(OBJS) $(EMUOBJ)

View File

@@ -1,6 +1,6 @@
/*
* (C) Copyright 2002
* Hyperion Entertainment, ThomasF@hyperion-entertainment.com
* Hyperion Entertainment, ThomasF@hyperion-entertainment.com
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -572,7 +572,7 @@ long articiaS_ram_init (void)
if (banks[3].used)
burst_support = banks[3].burst_len;
/*
/*
** Mode register:
** Bits Use
** 0-2 Burst len

View File

@@ -99,14 +99,14 @@
#define XDBCR_HWTOXD (1<<0)
#define XDBCR_KBTOXD (1<<1)
#define XDBCR_RTCTOXD (1<<2)
#define XDBCR_SCALE_1_1 (0x0<<3)
#define XDBCR_SCALE_2_2 (0x1<<3)
#define XDBCR_SCALE_3_2 (0x2<<3)
#define XDBCR_SCALE_4_4 (0x3<<3)
#define XDBCR_SCALE_5_8 (0x4<<3)
#define XDBCR_SCALE_6_8 (0x5<<3)
#define XDBCR_SCALE_8_8 (0x6<<3)
#define XDBCR_SCALE_0_16 (0x7<<3)
#define XDBCR_SCALE_1_1 (0x0<<3)
#define XDBCR_SCALE_2_2 (0x1<<3)
#define XDBCR_SCALE_3_2 (0x2<<3)
#define XDBCR_SCALE_4_4 (0x3<<3)
#define XDBCR_SCALE_5_8 (0x4<<3)
#define XDBCR_SCALE_6_8 (0x5<<3)
#define XDBCR_SCALE_8_8 (0x6<<3)
#define XDBCR_SCALE_0_16 (0x7<<3)
#define XDBCR_XDPROM (1<<7)
@@ -134,7 +134,6 @@
#define ARTICIAS_ISAIO_PHYS 0xfe002000
/* Prototypes */
long articiaS_ram_init(void);
void articiaS_pci_init(void);

View File

@@ -123,14 +123,14 @@ struct pci_irq_fixup_table fixuptab [] =
{
{ 0, 0, 0, 0xff}, /* Articia S host bridge */
{ 0, 1, 0, 0xff}, /* Articia S AGP bridge */
// { 0, 6, 0, 0x05}, /* 3COM ethernet */
/* { 0, 6, 0, 0x05}, /###* 3COM ethernet */
{ 0, 7, 0, 0xff}, /* VIA southbridge */
{ 0, 7, 1, 0x0e}, /* IDE controller in legacy mode */
// { 0, 7, 2, 0x05}, /* First USB controller */
// { 0, 7, 3, 0x0c}, /* Second USB controller (shares interrupt with ethernet) */
/* { 0, 7, 2, 0x05}, /###* First USB controller */
/* { 0, 7, 3, 0x0c}, /###* Second USB controller (shares interrupt with ethernet) */
{ 0, 7, 4, 0xff}, /* ACPI Power Management */
// { 0, 7, 5, 0x08}, /* AC97 */
// { 0, 7, 6, 0x08}, /* MC97 */
/* { 0, 7, 5, 0x08}, /###* AC97 */
/* { 0, 7, 6, 0x08}, /###* MC97 */
{ 0xff, 0xff, 0xff, 0xff}
};
@@ -287,7 +287,7 @@ void articiaS_pci_init (void)
PRINTF("atriciaS_pci_init\n");
// Why aren't these relocated??
/* Why aren't these relocated?? */
for (i=0; config_table[i].config_device; i++)
{
switch((int)config_table[i].config_device)
@@ -335,7 +335,6 @@ void articiaS_pci_init (void)
PCI_REGION_IO);
articiaS_hose.region_count = 4;
pci_setup_indirect(&articiaS_hose, ARTICIAS_PCI_CFGADDR, ARTICIAS_PCI_CFGDATA);
@@ -410,8 +409,8 @@ pci_dev_t pci_hose_find_class(struct pci_controller *hose, int bus, short find_c
pci_hose_read_config_byte(hose, dev, 0x0B, &c1);
pci_hose_read_config_byte(hose, dev, 0x0A, &c2);
class = c1<<8 | c2;
//printf("At %02x:%02x:%02x: class %x\n",
// PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev), class);
/*printf("At %02x:%02x:%02x: class %x\n", */
/* PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev), class); */
if (class == find_class)
{
if (index == 0)
@@ -441,7 +440,7 @@ pci_dev_t pci_find_bridge_for_bus(struct pci_controller *hose, int busnr)
if (hose == NULL) hose = &articiaS_hose;
if (busnr < hose->first_busno || busnr > hose->last_busno) return PCI_ANY_ID; // Not in range
if (busnr < hose->first_busno || busnr > hose->last_busno) return PCI_ANY_ID; /* Not in range */
/*
* The bridge must be on a lower bus number
@@ -467,7 +466,7 @@ pci_dev_t pci_find_bridge_for_bus(struct pci_controller *hose, int busnr)
if (!PCI_FUNC(dev))
found_multi = header_type & 0x80;
if (header_type == 1) // Bridge device header
if (header_type == 1) /* Bridge device header */
{
pci_hose_read_config_byte(hose, dev, PCI_SECONDARY_BUS, &secondary_bus);
if ((int)secondary_bus == busnr) return dev;
@@ -512,7 +511,7 @@ int articiaS_init_vga (void)
PRINTF("Searching for class 0x%x on bus %d\n", classes[classnr], busnr);
/* Find the first of this class on this bus */
dev = pci_hose_find_class(&articiaS_hose, busnr, classes[classnr], 0);
if (dev != ~0)
if (dev != ~0)
{
PRINTF("Found VGA Card at %02x:%02x:%02x\n", PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev));
break;

View File

@@ -1,14 +1,13 @@
#include "macros.h"
#include "macros.h"
#define GLOBALINFO0 0x50
#define GLOBALINFO0 0x50
#define GLOBALINFO0_BO (1<<7)
#define GLOBALINFO2_B1ARBITER (1<<6)
#define HBUSACR0 0x5c
#define HBUSACR2_BURST (1<<0)
#define HBUSACR2_LAT (1<<1)
#define RECEIVER_HOLDING 0
#define TRANSMITTER_HOLDING 0
#define INTERRUPT_ENABLE 1
@@ -35,9 +34,9 @@
#define SUPERIO_1 ((7 << 3) | (0))
#define SUPERIO_2 ((7 << 3) | (1))
.globl board_asm_init
board_asm_init:
mflr r29
/* Set 'Must-set' register */
@@ -77,7 +76,7 @@ board_asm_init:
li r5, 0x47
bl pci_write_cfg_byte*/
/* Enable NVRAM for environment */
li r3, 0
li r4, 0
@@ -91,7 +90,7 @@ board_asm_init:
siowb 0x40, 0x08
siowb 0x41, 0x01
siowb 0x45, 0x80
siowb 0x46, 0x60
siowb 0x46, 0x60
siowb 0x47, 0x20
siowb 0x48, 0x01
siowb 0x4a, 0xc4
@@ -103,7 +102,7 @@ board_asm_init:
siowb 0x56, 0x99
siowb 0x57, 0x90
siowb 0x85, 0x01
/* Enable configuration mode for SuperIO */
li r3, 0
li r4, (7<<3)
@@ -128,7 +127,7 @@ board_asm_init:
ori r3, r3, 0x0c
outb 0x3f0, 0xe2
outbr 0x3f1, r3
/* Disable configuration mode */
li r3, 0
li r4, (7<<3)
@@ -145,7 +144,7 @@ board_asm_init:
mtlr r29
blr
.globl new_reset
.globl new_reset_end
new_reset:
@@ -153,5 +152,5 @@ new_reset:
oris r0, r0, 0xFFF0
mtlr r0
blr
new_reset_end:
new_reset_end:

View File

@@ -1,6 +1,5 @@
#include <common.h>
#include <command.h>
#include <cmd_boota.h>
#include "../disk/part_amiga.h"
#include <asm/cache.h>
@@ -121,3 +120,10 @@ int do_boota (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
return 0;
}
#if defined(CONFIG_AMIGAONEG3SE) && (CONFIG_COMMANDS & CFG_CMD_BSP)
cmd_tbl_t U_BOOT_CMD(BOOTA) = MK_CMD_ENTRY(
"boota", 3, 1, do_boota,
"boota - boot an Amiga kernel\n",
"address disk"
);
#endif /* _CMD_BOOTA_H */

View File

@@ -29,5 +29,4 @@ X86EMU = -I../bios_emulator/scitech/include -I../bios_emulator/scitech/src/x86e
TEXT_BASE = 0xfff00000
PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -Wa,-mregnames -DEASTEREGG $(X86EMU) -Dprintk=printf #-DDEBUG
PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -Wa,-mregnames -DEASTEREGG $(X86EMU) -Dprintk=printf #-DDEBUG

View File

@@ -36,45 +36,45 @@
/* 3Com Ethernet PCI definitions*/
// #define PCI_VENDOR_ID_3COM 0x10B7
/* #define PCI_VENDOR_ID_3COM 0x10B7 */
#define PCI_DEVICE_ID_3COM_3C905C 0x9200
/* 3Com Commands, top 5 bits are command and bottom 11 bits are parameters */
#define TotalReset (0<<11)
#define TotalReset (0<<11)
#define SelectWindow (1<<11)
#define StartCoax (2<<11)
#define RxDisable (3<<11)
#define RxEnable (4<<11)
#define RxDisable (3<<11)
#define RxEnable (4<<11)
#define RxReset (5<<11)
#define UpStall (6<<11)
#define UpStall (6<<11)
#define UpUnstall (6<<11)+1
#define DownStall (6<<11)+2
#define DownStall (6<<11)+2
#define DownUnstall (6<<11)+3
#define RxDiscard (8<<11)
#define TxEnable (9<<11)
#define TxDisable (10<<11)
#define TxDisable (10<<11)
#define TxReset (11<<11)
#define FakeIntr (12<<11)
#define AckIntr (13<<11)
#define FakeIntr (12<<11)
#define AckIntr (13<<11)
#define SetIntrEnb (14<<11)
#define SetStatusEnb (15<<11)
#define SetStatusEnb (15<<11)
#define SetRxFilter (16<<11)
#define SetRxThreshold (17<<11)
#define SetTxThreshold (18<<11)
#define SetTxThreshold (18<<11)
#define SetTxStart (19<<11)
#define StartDMAUp (20<<11)
#define StartDMADown (20<<11)+1
#define StatsEnable (21<<11)
#define StatsDisable (22<<11)
#define StatsDisable (22<<11)
#define StopCoax (23<<11)
#define SetFilterBit (25<<11)
/* The SetRxFilter command accepts the following classes */
#define RxStation 1
#define RxMulticast 2
#define RxBroadcast 4
#define RxStation 1
#define RxMulticast 2
#define RxBroadcast 4
#define RxProm 8
/* 3Com status word defnitions */
@@ -83,12 +83,12 @@
#define HostError 0x0002
#define TxComplete 0x0004
#define TxAvailable 0x0008
#define RxComplete 0x0010
#define RxComplete 0x0010
#define RxEarly 0x0020
#define IntReq 0x0040
#define StatsFull 0x0080
#define DMADone (1<<8)
#define DownComplete (1<<9)
#define DownComplete (1<<9)
#define UpComplete (1<<10)
#define DMAInProgress (1<<11) /* DMA controller is still busy.*/
#define CmdInProgress (1<<12) /* EL3_CMD is still busy.*/
@@ -114,31 +114,31 @@
/* EEPROM locations. */
#define PhysAddr01 0
#define PhysAddr01 0
#define PhysAddr23 1
#define PhysAddr45 2
#define PhysAddr45 2
#define ModelID 3
#define EtherLink3ID 7
#define IFXcvrIO 8
#define EtherLink3ID 7
#define IFXcvrIO 8
#define IRQLine 9
#define NodeAddr01 10
#define NodeAddr23 11
#define NodeAddr01 10
#define NodeAddr23 11
#define NodeAddr45 12
#define DriverTune 13
#define DriverTune 13
#define Checksum 15
/* Register window 1 offsets, the window used in normal operation */
#define TX_FIFO 0x10
#define RX_FIFO 0x10
#define TX_FIFO 0x10
#define RX_FIFO 0x10
#define RxErrors 0x14
#define RxStatus 0x18
#define Timer 0x1A
#define RxStatus 0x18
#define Timer 0x1A
#define TxStatus 0x1B
#define TxFree 0x1C /* Remaining free bytes in Tx buffer. */
/* Register Window 2 */
#define Wn2_ResetOptions 12
/* Register Window 3: MAC/config bits */
@@ -148,11 +148,11 @@
#define Wn3_Options 8
#define BFEXT(value, offset, bitcount) \
((((unsigned long)(value)) >> (offset)) & ((1 << (bitcount)) - 1))
((((unsigned long)(value)) >> (offset)) & ((1 << (bitcount)) - 1))
#define BFINS(lhs, rhs, offset, bitcount) \
(((lhs) & ~((((1 << (bitcount)) - 1)) << (offset))) | \
(((rhs) & ((1 << (bitcount)) - 1)) << (offset)))
(((lhs) & ~((((1 << (bitcount)) - 1)) << (offset))) | \
(((rhs) & ((1 << (bitcount)) - 1)) << (offset)))
#define RAM_SIZE(v) BFEXT(v, 0, 3)
#define RAM_WIDTH(v) BFEXT(v, 3, 1)
@@ -163,7 +163,7 @@
#define AUTOSELECT(v) BFEXT(v, 24, 1)
/* Register Window 4: Xcvr/media bits */
#define Wn4_FIFODiag 4
#define Wn4_NetDiag 6
#define Wn4_PhysicalMgmt 8
@@ -196,28 +196,28 @@
#define DN_COMPLETE 0x00010000 /* This packet has been downloaded */
struct rx_desc_3com {
u32 next; /* Last entry points to 0 */
u32 status; /* FSH -> Frame Start Header */
u32 addr; /* Up to 63 addr/len pairs possible */
u32 length; /* Set LAST_FRAG to indicate last pair */
u32 next; /* Last entry points to 0 */
u32 status; /* FSH -> Frame Start Header */
u32 addr; /* Up to 63 addr/len pairs possible */
u32 length; /* Set LAST_FRAG to indicate last pair */
};
/* Values for the Rx status entry. */
#define RxDComplete 0x00008000
#define RxDError 0x4000
#define IPChksumErr (1<<25)
#define TCPChksumErr (1<<26)
#define IPChksumErr (1<<25)
#define TCPChksumErr (1<<26)
#define UDPChksumErr (1<<27)
#define IPChksumValid (1<<29)
#define IPChksumValid (1<<29)
#define TCPChksumValid (1<<30)
#define UDPChksumValid (1<<31)
struct tx_desc_3com {
u32 next; /* Last entry points to 0 */
u32 status; /* bits 0:12 length, others see below */
u32 addr;
u32 length;
u32 next; /* Last entry points to 0 */
u32 status; /* bits 0:12 length, others see below */
u32 addr;
u32 length;
};
/* Values for the Tx status entry. */
@@ -232,9 +232,9 @@ struct tx_desc_3com {
/* XCVR Types */
#define XCVR_10baseT 0
#define XCVR_AUI 1
#define XCVR_AUI 1
#define XCVR_10baseTOnly 2
#define XCVR_10base2 3
#define XCVR_10base2 3
#define XCVR_100baseTx 4
#define XCVR_100baseFx 5
#define XCVR_MII 6
@@ -243,10 +243,10 @@ struct tx_desc_3com {
#define XCVR_Default 10 /* I don't think this is correct -> should have been 0x10 if Auto Negotiate */
struct descriptor { /* A generic descriptor. */
u32 next; /* Last entry points to 0 */
u32 status; /* FSH -> Frame Start Header */
u32 addr; /* Up to 63 addr/len pairs possible */
u32 length; /* Set LAST_FRAG to indicate last pair */
u32 next; /* Last entry points to 0 */
u32 status; /* FSH -> Frame Start Header */
u32 addr; /* Up to 63 addr/len pairs possible */
u32 length; /* Set LAST_FRAG to indicate last pair */
};
/* Misc. definitions */
@@ -338,7 +338,7 @@ static inline int ETH_STATUS(struct eth_device* dev)
static inline void ETH_CMD(struct eth_device* dev, int command)
{
*(volatile u16 *)io_to_phys(EL3_CMD + dev->iobase) = cpu_to_le16(command);
*(volatile u16 *)io_to_phys(EL3_CMD + dev->iobase) = cpu_to_le16(command);
__asm volatile ("eieio");
}
@@ -348,24 +348,24 @@ static inline void ETH_CMD(struct eth_device* dev, int command)
static int issue_and_wait(struct eth_device* dev, int command)
{
int i, status;
int i, status;
ETH_CMD(dev, command);
for (i = 0; i < 2000; i++) {
status = ETH_STATUS(dev);
//printf ("Issue: status 0x%4x.\n", status);
for (i = 0; i < 2000; i++) {
status = ETH_STATUS(dev);
/*printf ("Issue: status 0x%4x.\n", status); */
if (!(status & CmdInProgress))
return 1;
}
return 1;
}
/* OK, that didn't work. Do it the slow way. One second */
for (i = 0; i < 100000; i++) {
status = ETH_STATUS(dev);
//printf ("Issue: status 0x%4x.\n", status);
return 1;
udelay(10);
}
PRINTF("Ethernet command: 0x%4x did not complete! Status: 0x%4x\n", command, ETH_STATUS(dev) );
/* OK, that didn't work. Do it the slow way. One second */
for (i = 0; i < 100000; i++) {
status = ETH_STATUS(dev);
/*printf ("Issue: status 0x%4x.\n", status); */
return 1;
udelay(10);
}
PRINTF("Ethernet command: 0x%4x did not complete! Status: 0x%4x\n", command, ETH_STATUS(dev) );
return 0;
}
@@ -378,7 +378,7 @@ static int auto_negotiate(struct eth_device* dev)
EL3WINDOW(dev, 1);
// Wait for Auto negotiation to complete
/* Wait for Auto negotiation to complete */
for (i = 0; i <= 1000; i++)
{
if (ETH_INW(dev, 2) & 0x04)
@@ -391,7 +391,6 @@ static int auto_negotiate(struct eth_device* dev)
return 0;
}
}
return 1;
@@ -430,10 +429,10 @@ void eth_interrupt(struct eth_device *dev)
int eth_3com_initialize(bd_t *bis)
{
u32 eth_iobase = 0, status;
int card_number = 0, ret;
struct eth_device* dev;
pci_dev_t devno;
u32 eth_iobase = 0, status;
int card_number = 0, ret;
struct eth_device* dev;
pci_dev_t devno;
char *s;
s = getenv("3com_base");
@@ -453,10 +452,10 @@ int eth_3com_initialize(bd_t *bis)
}
ret = pci_read_config_dword(devno, PCI_BASE_ADDRESS_0, &eth_iobase);
eth_iobase &= ~0xf;
eth_iobase &= ~0xf;
PRINTF("eth: 3Com Found at Address: 0x%x\n", eth_iobase);
pci_write_config_dword(devno, PCI_COMMAND, PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
/* Check if I/O accesses and Bus Mastering are enabled */
@@ -481,28 +480,28 @@ int eth_3com_initialize(bd_t *bis)
goto Done;
}
dev = (struct eth_device*) malloc(sizeof(*dev)); //struct eth_device));
dev = (struct eth_device*) malloc(sizeof(*dev)); /*struct eth_device)); */
sprintf(dev->name, "3Com 3c920c#%d", card_number);
dev->iobase = eth_iobase;
dev->priv = (void*) devno;
dev->init = eth_3com_init;
dev->halt = eth_3com_halt;
dev->send = eth_3com_send;
dev->recv = eth_3com_recv;
sprintf(dev->name, "3Com 3c920c#%d", card_number);
dev->iobase = eth_iobase;
dev->priv = (void*) devno;
dev->init = eth_3com_init;
dev->halt = eth_3com_halt;
dev->send = eth_3com_send;
dev->recv = eth_3com_recv;
eth_register(dev);
eth_register(dev);
/* { */
/* char interrupt; */
/* devno = pci_find_device(PCI_VENDOR_ID_3COM, PCI_DEVICE_ID_3COM_3C905C, 0); */
/* pci_read_config_byte(devno, PCI_INTERRUPT_LINE, &interrupt); */
/* printf("Installing eth0 interrupt handler to %d\n", interrupt); */
/* irq_install_handler(interrupt, eth_interrupt, dev); */
/* } */
card_number++;
card_number++;
/* Set the latency timer for value */
s = getenv("3com_latency");
@@ -532,13 +531,13 @@ int eth_3com_initialize(bd_t *bis)
PRINTF ("Cannot allocate memory for RX_RING.....\n");
goto Done;
}
if (!(tx_ring = memalign(sizeof(struct tx_desc_3com) * NUM_TX_DESC, 16)))
{
PRINTF ("Cannot allocate memory for TX_RING.....\n");
goto Done;
}
Done:
return status;
}
@@ -552,7 +551,7 @@ static int eth_3com_init(struct eth_device* dev, bd_t *bis)
struct descriptor *ias_cmd;
/* Determine what type of network the machine is connected to */
/* presently drops the connect to 10Mbps */
/* presently drops the connect to 10Mbps */
if (!auto_negotiate(dev))
{
@@ -560,43 +559,43 @@ static int eth_3com_init(struct eth_device* dev, bd_t *bis)
goto Done;
}
issue_and_wait(dev, TxReset);
issue_and_wait(dev, RxReset|0x04);
issue_and_wait(dev, TxReset);
issue_and_wait(dev, RxReset|0x04);
/* Switch to register set 7 for normal use. */
EL3WINDOW(dev, 7);
/* Switch to register set 7 for normal use. */
EL3WINDOW(dev, 7);
/* Initialize Rx and Tx rings */
init_rx_ring(dev);
purge_tx_ring(dev);
ETH_CMD(dev, SetRxFilter | RxStation | RxBroadcast | RxProm);
ETH_CMD(dev, SetRxFilter | RxStation | RxBroadcast | RxProm);
issue_and_wait(dev,SetTxStart|0x07ff);
issue_and_wait(dev,SetTxStart|0x07ff);
/* Below sets which indication bits to be seen. */
/* Below sets which indication bits to be seen. */
status_enable = SetStatusEnb | HostError | DownComplete | UpComplete | (1<<6);
ETH_CMD(dev, status_enable);
status_enable = SetStatusEnb | HostError | DownComplete | UpComplete | (1<<6);
ETH_CMD(dev, status_enable);
/* Below sets no bits are to cause an interrupt since this is just polling */
intr_enable = SetIntrEnb;
// intr_enable = SetIntrEnb | (1<<9) | (1<<10) | (1<<6);
ETH_CMD(dev, intr_enable);
intr_enable = SetIntrEnb;
/* intr_enable = SetIntrEnb | (1<<9) | (1<<10) | (1<<6); */
ETH_CMD(dev, intr_enable);
ETH_OUTB(dev, 127, UpPoll);
/* Ack all pending events, and set active indicator mask */
/* Ack all pending events, and set active indicator mask */
ETH_CMD(dev, AckIntr | IntLatch | TxAvailable | RxEarly | IntReq);
ETH_CMD(dev, intr_enable);
ETH_CMD(dev, AckIntr | IntLatch | TxAvailable | RxEarly | IntReq);
ETH_CMD(dev, intr_enable);
/* Tell the adapter where the RX ring is located */
issue_and_wait(dev,UpStall); /* Stall and set the UplistPtr */
ETH_OUTL(dev, (u32)&rx_ring[rx_next], UpListPtr);
ETH_CMD(dev, RxEnable); /* Enable the receiver. */
ETH_CMD(dev, RxEnable); /* Enable the receiver. */
issue_and_wait(dev,UpUnstall);
/* Send the Individual Address Setup frame */
@@ -612,7 +611,7 @@ static int eth_3com_init(struct eth_device* dev, bd_t *bis)
/* Tell the adapter where the TX ring is located */
ETH_CMD(dev, TxEnable); /* Enable transmitter. */
ETH_CMD(dev, TxEnable); /* Enable transmitter. */
issue_and_wait(dev, DownStall); /* Stall and set the DownListPtr. */
ETH_OUTL(dev, (u32)&tx_ring[tx_cur], DownListPtr);
issue_and_wait(dev, DownUnstall);
@@ -627,13 +626,13 @@ static int eth_3com_init(struct eth_device* dev, bd_t *bis)
}
if (ETH_STATUS(dev) & DownComplete) /* If DownLoad Complete ACK the bit */
{
ETH_CMD(dev, AckIntr | DownComplete); /* acknowledge the indication bit */
issue_and_wait(dev, DownStall); /* stall and clear DownListPtr */
ETH_CMD(dev, AckIntr | DownComplete); /* acknowledge the indication bit */
issue_and_wait(dev, DownStall); /* stall and clear DownListPtr */
ETH_OUTL(dev, 0, DownListPtr);
issue_and_wait(dev, DownUnstall);
}
status = 1;
Done:
return status;
}
@@ -673,8 +672,8 @@ int eth_3com_send(struct eth_device* dev, volatile void *packet, int length)
}
if (ETH_STATUS(dev) & DownComplete) /* If DownLoad Complete ACK the bit */
{
ETH_CMD(dev, AckIntr | DownComplete); /* acknowledge the indication bit */
issue_and_wait(dev, DownStall); /* stall and clear DownListPtr */
ETH_CMD(dev, AckIntr | DownComplete); /* acknowledge the indication bit */
issue_and_wait(dev, DownStall); /* stall and clear DownListPtr */
ETH_OUTL(dev, 0, DownListPtr);
issue_and_wait(dev, DownUnstall);
}
@@ -710,15 +709,15 @@ int eth_3com_recv(struct eth_device* dev)
status = le32_to_cpu(rx_ring[rx_next].status); /* packet status */
while (status & (1<<15))
{
{
/* A packet has been received */
if (status & (1<<15))
if (status & (1<<15))
{
/* A valid frame received */
length = le32_to_cpu(rx_ring[rx_next].status) & 0x1fff; /* length is in bits 0 - 12 */
/* Pass the packet up to the protocol layers */
NetReceive((uchar *)le32_to_cpu(rx_ring[rx_next].addr), length);
@@ -748,7 +747,7 @@ Done:
void eth_3com_halt(struct eth_device* dev)
{
if (!(dev->iobase))
if (!(dev->iobase))
{
goto Done;
}
@@ -758,14 +757,14 @@ void eth_3com_halt(struct eth_device* dev)
issue_and_wait(dev, RxDisable);
issue_and_wait(dev, TxDisable);
// free(tx_ring); /* release memory allocated to the DPD and UPD rings */
// free(rx_ring);
/* free(tx_ring); /###* release memory allocated to the DPD and UPD rings */
/* free(rx_ring); */
Done:
return;
}
static void init_rx_ring(struct eth_device* dev)
static void init_rx_ring(struct eth_device* dev)
{
int i;
@@ -782,7 +781,7 @@ static void init_rx_ring(struct eth_device* dev)
rx_next = 0;
}
static void purge_tx_ring(struct eth_device* dev)
static void purge_tx_ring(struct eth_device* dev)
{
int i;
@@ -799,39 +798,39 @@ static void purge_tx_ring(struct eth_device* dev)
}
}
static void read_hw_addr(struct eth_device* dev, bd_t *bis)
static void read_hw_addr(struct eth_device* dev, bd_t *bis)
{
u8 hw_addr[ETH_ALEN];
unsigned int eeprom[0x40];
unsigned int checksum = 0;
int i, j, timer;
/* Read the station address from the EEPROM. */
/* Read the station address from the EEPROM. */
EL3WINDOW(dev, 0);
EL3WINDOW(dev, 0);
for (i = 0; i < 0x40; i++)
{
ETH_OUTW(dev, EEPROM_Read + i, Wn0EepromCmd);
/* Pause for at least 162 us. for the read to take place. */
for (timer = 10; timer >= 0; timer--)
ETH_OUTW(dev, EEPROM_Read + i, Wn0EepromCmd);
/* Pause for at least 162 us. for the read to take place. */
for (timer = 10; timer >= 0; timer--)
{
udelay(162);
if ((ETH_INW(dev, Wn0EepromCmd) & 0x8000) == 0)
break;
}
eeprom[i] = ETH_INW(dev, Wn0EepromData);
}
udelay(162);
if ((ETH_INW(dev, Wn0EepromCmd) & 0x8000) == 0)
break;
}
eeprom[i] = ETH_INW(dev, Wn0EepromData);
}
/* Checksum calculation. I'm not sure about this part and there seems to be a bug on the 3com side of things */
for (i = 0; i < 0x21; i++)
checksum ^= eeprom[i];
checksum = (checksum ^ (checksum >> 8)) & 0xff;
for (i = 0; i < 0x21; i++)
checksum ^= eeprom[i];
checksum = (checksum ^ (checksum >> 8)) & 0xff;
if (checksum != 0xbb)
printf(" *** INVALID EEPROM CHECKSUM %4.4x *** \n", checksum);
if (checksum != 0xbb)
printf(" *** INVALID EEPROM CHECKSUM %4.4x *** \n", checksum);
for (i = 0, j = 0; i < 3; i++)
for (i = 0, j = 0; i < 3; i++)
{
hw_addr[j++] = (u8)((eeprom[i+10] >> 8) & 0xff);
hw_addr[j++] = (u8)(eeprom[i+10] & 0xff);
@@ -839,9 +838,9 @@ static void read_hw_addr(struct eth_device* dev, bd_t *bis)
/* MAC Address is in window 2, write value from EEPROM to window 2 */
EL3WINDOW(dev, 2);
for (i = 0; i < 6; i++)
ETH_OUTB(dev, hw_addr[i], i);
EL3WINDOW(dev, 2);
for (i = 0; i < 6; i++)
ETH_OUTB(dev, hw_addr[i], i);
for (j = 0; j < ETH_ALEN; j+=2)
{
@@ -849,9 +848,9 @@ static void read_hw_addr(struct eth_device* dev, bd_t *bis)
hw_addr[j+1] = (u8)((ETH_INW(dev, j) >> 8) & 0xff);
}
for (i=0;i<ETH_ALEN;i++)
for (i=0;i<ETH_ALEN;i++)
{
if (hw_addr[i] != bis->bi_enetaddr[i])
if (hw_addr[i] != bis->bi_enetaddr[i])
{
/* printf("Warning: HW address don't match:\n"); */
/* printf("Address in 3Com Window 2 is " */
@@ -870,9 +869,9 @@ static void read_hw_addr(struct eth_device* dev, bd_t *bis)
bis->bi_enetaddr[4] == 0 && bis->bi_enetaddr[5] == 0)
{
sprintf(buffer, "%02X:%02X:%02X:%02X:%02X:%02X",
hw_addr[0], hw_addr[1], hw_addr[2],
hw_addr[3], hw_addr[4], hw_addr[5]);
sprintf(buffer, "%02X:%02X:%02X:%02X:%02X:%02X",
hw_addr[0], hw_addr[1], hw_addr[2],
hw_addr[3], hw_addr[4], hw_addr[5]);
setenv("ethaddr", buffer);
}
}
@@ -883,4 +882,3 @@ static void read_hw_addr(struct eth_device* dev, bd_t *bis)
Done:
return;
}

View File

@@ -27,11 +27,10 @@
#include <common.h>
#include <flash.h>
#include <asm/io.h>
#include "memio.h"
#include "memio.h"
/*---------------------------------------------------------------------*/
#undef DEBUG_FLASH
//#define DEBUG_FLASH
#ifdef DEBUG_FLASH
#define DEBUGF(fmt,args...) printf(fmt ,##args)
@@ -68,7 +67,7 @@ static void flash_to_mem(void)
unsigned char x;
flash_xd_nest --;
if (flash_xd_nest == 0)
{
DEBUGF("Flash on memory bus\n");
@@ -120,7 +119,7 @@ unsigned long flash_init (void)
/* monitor protection ON by default */
flash_protect(FLAG_PROTECT_SET,
CFG_MONITOR_BASE,
CFG_MONITOR_BASE + CFG_MONITOR_LEN - 1,
CFG_MONITOR_BASE + monitor_flash_len - 1,
&flash_info[0]);
#endif
@@ -327,7 +326,7 @@ static int flash_get_offsets (ulong base, flash_info_t *info)
/* set sector offsets for uniform sector type */
for (i = 0; i < info->sector_count; i++) {
info->start[i] = base + i * info->size /
info->sector_count;
info->sector_count;
}
break;
default:
@@ -478,7 +477,7 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
}
if ((rc = write_word(info, wp, data)) != 0) {
flash_to_mem();
flash_to_mem();
return (rc);
}
wp += 4;
@@ -493,7 +492,7 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
data = (data << 8) | *src++;
}
if ((rc = write_word(info, wp, data)) != 0) {
flash_to_mem();
flash_to_mem();
return (rc);
}
wp += 4;
@@ -582,7 +581,7 @@ static int write_word (flash_info_t *info, ulong dest, ulong data)
*/
static void flash_reset (ulong addr)
{
flash_to_xd();
flash_to_xd();
out8(addr, 0xF0); /* reset bank */
iobarrier_rw();
flash_to_mem();
@@ -633,10 +632,10 @@ void flash_print_info (flash_info_t *info)
info->size / 0x100000, info->sector_count);
} else if (info->size % 0x400 == 0) {
printf (" Size: %ld KB in %d Sectors\n",
info->size / 0x400, info->sector_count);
info->size / 0x400, info->sector_count);
} else {
printf (" Size: %ld B in %d Sectors\n",
info->size, info->sector_count);
info->size, info->sector_count);
}
printf (" Sector Start Addresses:");

View File

@@ -75,16 +75,16 @@ void i8259_init(void)
char dummy;
PRINTF("Initializing Interrupt controller\n");
/* init master interrupt controller */
out8(0x20, 0x11); //0x19); // was: 0x11); /* Start init sequence */
out8(0x20, 0x11); /* 0x19); /###* Start init sequence */
out8(0x21, 0x00); /* Vector base */
out8(0x21, 0x04); /* edge tiggered, Cascade (slave) on IRQ2 */
out8(0x21, 0x11); // was: 0x01); /* Select 8086 mode */
out8(0x21, 0x11); /* was: 0x01); /###* Select 8086 mode */
/* init slave interrupt controller */
out8(0xA0, 0x11); //0x19); // was: 0x11); /* Start init sequence */
out8(0xA0, 0x11); /* 0x19); /###* Start init sequence */
out8(0xA1, 0x08); /* Vector base */
out8(0xA1, 0x02); /* edge triggered, Cascade (slave) on IRQ2 */
out8(0xA1, 0x11); // was: 0x01); /* Select 8086 mode */
out8(0xA1, 0x11); /* was: 0x01); /###* Select 8086 mode */
/* always read ISR */
out8(0x20, 0x0B);

View File

@@ -73,7 +73,7 @@ get_msr(void)
static __inline__ void
set_msr(unsigned long msr)
{
asm volatile("mtmsr %0" : : "r" (msr));
asm volatile("mtmsr %0" : : "r" (msr));
}
static __inline__ unsigned long
@@ -89,7 +89,7 @@ get_dec(void)
static __inline__ void
set_dec(unsigned long val)
{
asm volatile("mtdec %0" : : "r" (val));
asm volatile("mtdec %0" : : "r" (val));
}
@@ -167,8 +167,8 @@ external_interrupt(struct pt_regs *regs)
int irq, unmask = 1;
irq = i8259_irq(); //i8259_get_irq(regs);
// printf("irq = %d, handler at %p ack=%d\n", irq, irq_handlers[irq].handler, *(volatile unsigned char *)0xFEF00000);
irq = i8259_irq(); /*i8259_get_irq(regs); */
/* printf("irq = %d, handler at %p ack=%d\n", irq, irq_handlers[irq].handler, *(volatile unsigned char *)0xFEF00000); */
i8259_mask_and_ack(irq);
if (irq_handlers[irq].handler != NULL)
@@ -264,5 +264,3 @@ do_irqinfo(cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
{
puts("IRQ related functions are unimplemented currently.\n");
}

View File

@@ -5,20 +5,20 @@
/*
** Load a long integer into a register
*/
.macro liw reg, value
lis \reg, \value@h
ori \reg, \reg, \value@l
.endm
.macro liw reg, value
lis \reg, \value@h
ori \reg, \reg, \value@l
.endm
/*
/*
** Generate config_addr request
** This macro expects the values in registers:
** r3 - bus
** r4 - devfn
** r5 - offset
*/
.macro config_addr
.macro config_addr
rlwinm r9, r5, 24, 0, 6
rlwinm r8, r4, 16, 0, 31
rlwinm r7, r3, 8, 0, 31
@@ -31,7 +31,7 @@
sync
.endm
/*
** Generate config_data address
*/
@@ -45,40 +45,40 @@
/*
** Write a byte value to an output port
*/
.macro outb port, value
lis r2, 0xfe00
li r0, \value
stb r0, \port(r2)
.endm
.macro outb port, value
lis r2, 0xfe00
li r0, \value
stb r0, \port(r2)
.endm
/*
** Write a register byte value to an output port
*/
.macro outbr port, value
lis r2, 0xfe00
stb \value, \port(r2)
.endm
.macro outbr port, value
lis r2, 0xfe00
stb \value, \port(r2)
.endm
/*
/*
** Read a byte value from a port into a specified register
*/
.macro inb reg, port
lis r2, 0xfe00
lbz \reg, \port(r2)
.endm
.macro inb reg, port
lis r2, 0xfe00
lbz \reg, \port(r2)
.endm
/*
** Write a byte to the SuperIO config area
*/
.macro siowb offset, value
li r3, 0
li r4, (7<<3)
li r5, \offset
li r6, \value
bl pci_write_cfg_byte
.endm
.macro siowb offset, value
li r3, 0
li r4, (7<<3)
li r5, \offset
li r6, \value
bl pci_write_cfg_byte
.endm
#endif

View File

@@ -1,9 +1,8 @@
#include "macros.h"
.globl pci_read_cfg_byte
pci_read_cfg_byte:
config_addr
config_data 3
@@ -12,11 +11,10 @@ pci_read_cfg_byte:
lbz r3, 0(r9)
blr
.globl pci_write_cfg_byte
pci_write_cfg_byte:
pci_write_cfg_byte:
config_addr
config_data 3
stb r6, 0(r9)
@@ -25,9 +23,8 @@ pci_write_cfg_byte:
blr
.globl pci_read_cfg_word
pci_read_cfg_word:
config_addr
config_data 2
@@ -37,9 +34,8 @@ pci_read_cfg_word:
blr
.globl pci_write_cfg_word
pci_write_cfg_word:
config_addr
config_data 2
@@ -48,10 +44,9 @@ pci_write_cfg_word:
sync
blr
.globl pci_read_cfg_long
pci_read_cfg_long:
config_addr
config_data 0
@@ -61,9 +56,8 @@ pci_read_cfg_long:
blr
.globl pci_write_cfg_long
pci_write_cfg_long:
config_addr
config_data 0
@@ -71,4 +65,3 @@ pci_write_cfg_long:
eieio
sync
blr

View File

@@ -2,7 +2,7 @@
* Memory mapped IO
*
* (C) Copyright 2002
* Hyperion Entertainment, ThomasF@hyperion-entertainment.com
* Hyperion Entertainment, ThomasF@hyperion-entertainment.com
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -15,9 +15,9 @@
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
*
*/
*/
#ifndef _MEMIO_H
#define _MEMIO_H
@@ -97,8 +97,8 @@ static inline void write_long_big(volatile uint32 *to, uint32 x)
#define CONFIG_ADDR(bus, devfn, offset) \
write_long_big((uint32 *)0xFEC00CF8, \
((offset & 0xFC)<<24) | (devfn << 16) \
| (bus<<8) | 0x80);
((offset & 0xFC)<<24) | (devfn << 16) \
| (bus<<8) | 0x80);
#define CONFIG_DATA(offset,mask) ((void *)(0xFEE00CFC+(offset & mask)))

View File

@@ -1,6 +1,6 @@
/*
* (C) Copyright 2002
* Thomas Frieden, Hyperion Entertainment
* Thomas Frieden, Hyperion Entertainment
* ThomasF@hyperion-entertainment.com
*
* See file CREDITS for list of people who contributed to this
@@ -34,4 +34,3 @@ void disable_nvram(void)
{
pci_write_cfg_byte(0, 0, 0x56, 0x0);
}

View File

@@ -1,7 +1,7 @@
/*
* (C) Copyright 2002
* John W. Linville, linville@tuxdriver.com
*
*
* Modified from code for support of MIP405 and PIP405 boards. Previous
* copyright follows.
*
@@ -48,7 +48,6 @@ void i8259_unmask_irq(unsigned int irq);
#undef KBG_DEBUG
//#define KBG_DEBUG
#ifdef KBG_DEBUG
#define PRINTF(fmt,args...) printf (fmt ,##args)
@@ -143,8 +142,6 @@ void i8259_unmask_irq(unsigned int irq);
#define KBD_BUFFER_LEN 0x20 /* size of the keyboardbuffer */
static volatile char kbd_buffer[KBD_BUFFER_LEN];
static volatile int in_pointer = 0;
static volatile int out_pointer = 0;
@@ -172,7 +169,7 @@ static unsigned char kbd_plain_xlate[] = {
'2', '3', '0', '.',0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, /* 0x50 - 0x5F */
'\r',0xff,0xff
};
static unsigned char kbd_shift_xlate[] = {
0xff,0x1b, '!', '@', '#', '$', '%', '^', '&', '*', '(', ')', '_', '+','\b','\t', /* 0x00 - 0x0f */
'Q', 'W', 'E', 'R', 'T', 'Y', 'U', 'I', 'O', 'P', '{', '}','\r',0xff, 'A', 'S', /* 0x10 - 0x1f */
@@ -194,7 +191,7 @@ static unsigned char kbd_ctrl_xlate[] = {
};
/******************************************************************
* Init
* Init
******************************************************************/
int isa_kbd_init(void)
@@ -252,7 +249,7 @@ int drv_isa_kbd_init (void)
error=console_assign(stdin,DEVNAME);
if(error==0)
return 1;
else
else
return error;
}
return 1;
@@ -261,7 +258,7 @@ int drv_isa_kbd_init (void)
}
/******************************************************************
* Queue handling
* Queue handling
******************************************************************/
/* puts character in the queue and sets up the in and out pointer */
void kbd_put_queue(char data)
@@ -287,7 +284,7 @@ int kbd_testc(void)
if(in_pointer==out_pointer)
return(0); /* no data */
else
return(1);
return(1);
}
/* gets the character from the queue */
int kbd_getc(void)
@@ -295,13 +292,13 @@ int kbd_getc(void)
char c;
while(in_pointer==out_pointer);
if((out_pointer+1)==KBD_BUFFER_LEN)
if((out_pointer+1)==KBD_BUFFER_LEN)
out_pointer=0;
else
out_pointer++;
c=kbd_buffer[out_pointer];
return (int)c;
}
@@ -324,7 +321,7 @@ void kbd_set_leds(void)
kbd_send_data(KBD_CMD_SET_LEDS);
kbd_send_data(leds);
}
void handle_keyboard_event(unsigned char scancode)
{
@@ -381,11 +378,11 @@ void handle_keyboard_event(unsigned char scancode)
console_changed = 1;
}
return;
case 0x2A:
case 0x2A:
case 0x36: /* shift pressed */
shift=1;
return; /* do nothing else */
case 0xAA:
case 0xAA:
case 0xB6: /* shift released */
shift=0;
return; /* do nothing else */
@@ -408,15 +405,15 @@ void handle_keyboard_event(unsigned char scancode)
case 0x3A: /* capslock pressed */
caps_lock=~caps_lock;
kbd_set_leds();
return;
return;
case 0x45: /* numlock pressed */
num_lock=~num_lock;
kbd_set_leds();
return;
return;
case 0xC6: /* scroll lock released */
case 0xC5: /* num lock released */
case 0xBA: /* caps lock released */
return; /* just swallow */
return; /* just swallow */
}
if((scancode&0x80)==0x80) /* key released */
return;
@@ -456,7 +453,7 @@ void handle_keyboard_event(unsigned char scancode)
PRINTF("unkown scancode %X\n",scancode);
return; /* swallow unknown codes */
}
kbd_put_queue(keycode);
PRINTF("%x\n",keycode);
}
@@ -494,30 +491,29 @@ unsigned char handle_kbd_event(void)
}
/******************************************************************************
* Lowlevel Part of keyboard section
*/
*/
unsigned char kbd_read_status(void)
{
return(in8(CFG_ISA_IO_BASE_ADDRESS + KDB_COMMAND_PORT));
}
}
unsigned char kbd_read_input(void)
{
return(in8(CFG_ISA_IO_BASE_ADDRESS + KDB_DATA_PORT));
}
}
void kbd_write_command(unsigned char cmd)
{
out8(CFG_ISA_IO_BASE_ADDRESS + KDB_COMMAND_PORT,cmd);
}
}
void kbd_write_output(unsigned char data)
{
out8(CFG_ISA_IO_BASE_ADDRESS + KDB_DATA_PORT, data);
}
}
int kbd_read_data(void)
{
int val;
@@ -537,7 +533,7 @@ int kbd_wait_for_input(void)
{
unsigned long timeout;
int val;
timeout = KBD_TIMEOUT;
val=kbd_read_data();
while(val < 0)
@@ -602,7 +598,7 @@ char * kbd_initialize(void)
* If the test is successful a x55 is placed in the input buffer.
*/
kbd_write_command_w(KBD_CCMD_SELF_TEST);
if (kbd_wait_for_input() != 0x55)
if (kbd_wait_for_input() != 0x55)
return "Kbd: failed self test";
/*
* Perform a keyboard interface test. This causes the controller
@@ -610,7 +606,7 @@ char * kbd_initialize(void)
* test are placed in the input buffer.
*/
kbd_write_command_w(KBD_CCMD_KBD_TEST);
if (kbd_wait_for_input() != 0x00)
if (kbd_wait_for_input() != 0x00)
return "Kbd: interface failed self test";
/*
* Enable the keyboard by allowing the keyboard clock to run.
@@ -628,7 +624,7 @@ char * kbd_initialize(void)
do {
kbd_write_output_w(KBD_CMD_RESET);
status = kbd_wait_for_input();
if (status == KBD_REPLY_ACK)
if (status == KBD_REPLY_ACK)
break;
if (status != KBD_REPLY_RESEND)
{
@@ -692,8 +688,3 @@ void kbd_interrupt(void)
{
handle_kbd_event();
}
/* eof */

View File

@@ -1,7 +1,7 @@
/*
* (C) Copyright 2002
* John W. Linville, linville@tuxdriver.com
*
*
* Modified from code for support of MIP405 and PIP405 boards. Previous
* copyright follows.
*
@@ -30,7 +30,7 @@
#ifndef _KBD_H_
#define _KBD_H_
extern int kbd_testc(void);
extern int kbd_getc(void);
extern void kbd_interrupt(void);

View File

@@ -2,7 +2,7 @@
* short type names
*
* (C) Copyright 2002
* Hyperion Entertainment, ThomasF@hyperion-entertainment.com
* Hyperion Entertainment, ThomasF@hyperion-entertainment.com
*
* See file CREDITS for list of people who contributed to this
* project.

View File

@@ -26,18 +26,18 @@ void sm_write_byte(uint8 writeme)
{
int i;
int level;
out_byte(0xA539, 0x00);
level = 0;
for (i=0; i<8; i++)
{
if ((writeme & 0x80) == (level<<7))
{
if ((writeme & 0x80) == (level<<7))
{
/* Bit did not change, rewrite strobe */
out_byte(0xA539, level | 0x02);
out_byte(0xA539, level);
out_byte(0xA539, level);
}
else
{
@@ -68,7 +68,7 @@ uint8 sm_read_byte(void)
}
return retme;
}
}
int sm_get_ack(void)
{
@@ -106,36 +106,36 @@ void sm_send_stop(void)
int sm_read_byte_from_device(uint8 addr, uint8 reg, uint8 *storage)
{
// S Addr Wr
/* S Addr Wr */
sm_write_mode();
sm_send_start();
sm_write_byte((addr<<1));
// [A]
/* [A] */
sm_read_mode();
if (sm_get_ack() == FALSE) return FALSE;
// Comm
/* Comm */
sm_write_mode();
sm_write_byte(reg);
// [A]
/* [A] */
sm_read_mode();
if (sm_get_ack() == FALSE) return FALSE;
// S Addr Rd
/* S Addr Rd */
sm_write_mode();
sm_send_start();
sm_write_byte((addr<<1)|1);
// [A]
/* [A] */
sm_read_mode();
if (sm_get_ack() == FALSE) return FALSE;
// [Data]
/* [Data] */
*storage = sm_read_byte();
// NA
/* NA */
sm_write_mode();
sm_write_nack();
sm_send_stop();
@@ -144,10 +144,10 @@ int sm_read_byte_from_device(uint8 addr, uint8 reg, uint8 *storage)
}
void sm_init(void)
{
{
/* Switch to PMC mode */
pci_write_cfg_byte(0, 0, REG_GROUP, (uint8)(REG_GROUP_SPECIAL|REG_GROUP_POWER));
/* Set GPIO Base */
pci_write_cfg_long(0, 0, 0x40, 0xa500);
@@ -155,12 +155,12 @@ void sm_init(void)
pci_write_cfg_byte(0, 0, 0x44, 0x11);
/* Set both GPIO 0 and 1 as output */
out_byte(0xA53A, 0x03);
out_byte(0xA53A, 0x03);
}
void sm_term(void)
{
{
/* Switch to normal mode */
pci_write_cfg_byte(0, 0, REG_GROUP, 0);
}
@@ -173,7 +173,7 @@ int sm_get_data(uint8 *DataArray, int dimm_socket)
#if 0
/* Switch to PMC mode */
pci_write_cfg_byte(0, 0, REG_GROUP, (uint8)(REG_GROUP_SPECIAL|REG_GROUP_POWER));
/* Set GPIO Base */
pci_write_cfg_long(0, 0, 0x40, 0xa500);
@@ -181,7 +181,7 @@ int sm_get_data(uint8 *DataArray, int dimm_socket)
pci_write_cfg_byte(0, 0, 0x44, 0x11);
/* Set both GPIO 0 and 1 as output */
out_byte(0xA53A, 0x03);
out_byte(0xA53A, 0x03);
#endif
sm_init();

View File

@@ -1,201 +1,198 @@
/*------------------------------------------------------*/
/* TERON Articia / SDRAM Init */
/*------------------------------------------------------*/
* XD_CTL = 0x81000000 (0x74)
* HBUS_ACC_CTL_0 &= 0xFFFFFDFF (0x5c)
/* host bus access ctl reg 2(5e) */
/* set - CPU read from memory data one clock after data is latched */
* GLOBL_INFO_0 |= 0x00004000 (0x50)
/* global info register 2 (52), AGP/PCI bus 1 arbiter is addressed in Articia S */
PCI_1_SB_CONFIG_0 |= 0x00000400 (0x80d0)
/* PCI1 side band config reg 2 (d2), enable read acces while write buffer not empty */
MEM_RAS_CTL_0 |= 0x3f000000 (0xcc)
&= 0x3fffffff
/* RAS park control reg 0(cc), park access enable is set */
HOST_RDBUF_CTL |= 0x10000000 (0x70)
&= 0x10ffffff
/* host read buffer control reg, enable prefetch for CPU read from DRAM control */
HBUS_ACC_CTL_0 |= 0x0100001f (0x5c)
&= 0xf1ffffff
/* host bus access control register, enable CPU address bus pipe control */
/* two outstanding requests, *** changed to 2 from 3 */
/* enable line merge write control for CPU write to system memory, PCI 1 */
/* and PCI 0 bus memory; enable page merge write control for write to */
/* PCI bus 0 & bus 1 memory */
SRAM_CTL |= 0x00004000 (0xc8)
&= 0xffbff7ff
/* DRAM detail timing control register 1 (ca), bit 3 set to 0 */
/* DRAM start access latency control - wait for one clock */
/* ff9f changed to ffbf */
DIM0_TIM_CTL_0 = 0x737d737d (0xc9)
/* DRAM timing control for dimm0 & dimm1; set wait one clock */
/* cycle for next data access */
DIM2_TIM_CTL_0 = 0x737d737d (0xca)
/* DRAM timing control for dimm2 & dimm3; set wait one clock */
/* cycle for next data access */
DIM0_BNK0_CTL_0 = BNK0_RAM_SIZ_128MB (0x90)
/* set dimm0 bank0 for 128 MB */
DIM0_BNK1_CTL_0 = BNK1_RAM_SIZ_128MB (0x94)
/* set dimm0 for bank1 */
DIM0_TIM_CTL_0 = 0xf3bf0000 (0xc9)
/* dimm0 timing control register; RAS - CAS latency - 4 clock */
/* CAS access latency - 3 wait; pre-charge latency - 3 wait */
/* pre-charge command period control - 5 clock; wait one clock */
/* cycle for next data access; read to write access latency control */
/* - 2 clock cycles */
DRAM_GBL_CTL_0 |= 0x00000100 (0xc0)
&= 0xffff01ff
/* memory global control register - support buffer sdram on bank 0 */
DRAM_ECC_CTL_0 |= 0x00260000 (0xc4)
&= 0xff26ffff
/* enable ECC; enable read, modify, write control */
DRAM_REF_CTL_0 = DRAM_REF_DATA (0xb8)
/* set DRAM refresh parameters *** changed to 00940100 */
nop
nop
nop
nop
nop
DRAM_ECC_CTL_0 |= 0x20243280 (0xc4)
/* turn off ecc */
/* for SDRAM bank 0 */
DRAM_ECC_CTL_0 |= 0x20243290 (0xc4) ?
/* for SDRAM bank 1 */
/* Additional Stuff...*/
GLOBL_CTRL |= 0x20000b00 (0x54)
PCI_0_SB_CONFIG |= 0x04100007 (0xd0)
/* PCI 0 Side band config reg*/
0x8000083c |= 0x00080000
/* Disable VGA decode on PCI Bus 1 */
/*End Additional Stuff..*/
/*--------------------------------------------------------------*/
/* TERON serial port initialization code */
/*--------------------------------------------------------------*/
0x84380080 |= 0x00030000
/* enable super IO configuration VIA chip Register 85 */
/* Enable super I/O config mode */
0xfe0003f0 = 0xe2
bl delay1
0xfe0003f1 = 0x0f
bl delay1
/* enable com1 & com2, parallel port disabled */
0xfe0003f0 = 0xe7
bl delay1
/* let's make com1 base as 0x3f8 */
0xfe0003f1 = 0xfe
bl delay1
0xfe0003f0 = 0xe8
bl delay1
/* let's make com2 base as 0x2f8 */
0xfe0003f1 = 0xbe
0x84380080 &= 0xfffdffff
/* closing super IO configuration VIA chip Register 85 */
/* -------------------------------*/
0xfe0003fb = 0x83
bl delay1
/*latch enable word length -8 bit */ /* set mslab bit */
0xfe0003f8 = 0x0c
bl delay1
/* set baud rate lsb for 9600 baud */
0xfe0003f9 = 0x0
bl delay1
/* set baud rate msb for 9600 baud */
0xfe0003fb = 0x03
bl delay1
/* reset mslab */
/*--------------------------------------------------------------*/
/* END TERON Serial Port Initialization Code */
/*--------------------------------------------------------------*/
/*--------------------------------------------------------------*/
/* END TERON Articia / SDRAM Initialization code */
/*--------------------------------------------------------------*/
Proposed from Documentation:
write dmem 0xfec00cf8 0x50000080
write dmem 0xfee00cfc 0xc0305411
Writes to index 0x50-0x53.
0x50: Global Information Register 0
0xC0 = Little Endian CPU, Sequential order Burst
0x51: Global Information Register 1
Read only, 0x30 = Provides PowerPC and X86 support
0x52: Global Information Register 2
0x05 = 64/128 bit CPU bus support
0x53: Global Information Register 3
0x80 = PCI Bus 0 grant active time is 1 clock after REQ# deasserted
write dmem 0xfec00cf8 0x5c000080
write dmem 0xfee00cfc 0xb300011F
write dmem 0xfec00cf8 0xc8000080
write dmem 0xfee00cfc 0x0020f100
write dmem 0xfec00cf8 0x90000080
write dmem 0xfee00cfc 0x007fe700
write dmem 0xfec00cf8 0x9400080
write dmem 0xfee00cfc 0x007fe700
write dmem 0xfec00cf8 0xb0000080
write dmem 0xfee00cfc 0x737d737d
write dmem 0xfec00cf8 0xb4000080
write dmem 0xfee00cfc 0x737d737d
write dmem 0xfec00cf8 0xc0000080
write dmem 0xfee00cfc 0x40005500
write dmem 0xfec00cf8 0xb8000080
write dmem 0xfee00cfc 0x00940100
write dmem 0xfec00cf8 0xc4000080
write dmem 0xfee00cfc 0x00003280
write dmem 0xfec00cf8 0xc4000080
write dmem 0xfee00cfc 0x00003290
/*------------------------------------------------------*/
/* TERON Articia / SDRAM Init */
/*------------------------------------------------------*/
* XD_CTL = 0x81000000 (0x74)
* HBUS_ACC_CTL_0 &= 0xFFFFFDFF (0x5c)
/* host bus access ctl reg 2(5e) */
/* set - CPU read from memory data one clock after data is latched */
* GLOBL_INFO_0 |= 0x00004000 (0x50)
/* global info register 2 (52), AGP/PCI bus 1 arbiter is addressed in Articia S */
PCI_1_SB_CONFIG_0 |= 0x00000400 (0x80d0)
/* PCI1 side band config reg 2 (d2), enable read acces while write buffer not empty */
MEM_RAS_CTL_0 |= 0x3f000000 (0xcc)
&= 0x3fffffff
/* RAS park control reg 0(cc), park access enable is set */
HOST_RDBUF_CTL |= 0x10000000 (0x70)
&= 0x10ffffff
/* host read buffer control reg, enable prefetch for CPU read from DRAM control */
HBUS_ACC_CTL_0 |= 0x0100001f (0x5c)
&= 0xf1ffffff
/* host bus access control register, enable CPU address bus pipe control */
/* two outstanding requests, *** changed to 2 from 3 */
/* enable line merge write control for CPU write to system memory, PCI 1 */
/* and PCI 0 bus memory; enable page merge write control for write to */
/* PCI bus 0 & bus 1 memory */
SRAM_CTL |= 0x00004000 (0xc8)
&= 0xffbff7ff
/* DRAM detail timing control register 1 (ca), bit 3 set to 0 */
/* DRAM start access latency control - wait for one clock */
/* ff9f changed to ffbf */
DIM0_TIM_CTL_0 = 0x737d737d (0xc9)
/* DRAM timing control for dimm0 & dimm1; set wait one clock */
/* cycle for next data access */
DIM2_TIM_CTL_0 = 0x737d737d (0xca)
/* DRAM timing control for dimm2 & dimm3; set wait one clock */
/* cycle for next data access */
DIM0_BNK0_CTL_0 = BNK0_RAM_SIZ_128MB (0x90)
/* set dimm0 bank0 for 128 MB */
DIM0_BNK1_CTL_0 = BNK1_RAM_SIZ_128MB (0x94)
/* set dimm0 for bank1 */
DIM0_TIM_CTL_0 = 0xf3bf0000 (0xc9)
/* dimm0 timing control register; RAS - CAS latency - 4 clock */
/* CAS access latency - 3 wait; pre-charge latency - 3 wait */
/* pre-charge command period control - 5 clock; wait one clock */
/* cycle for next data access; read to write access latency control */
/* - 2 clock cycles */
DRAM_GBL_CTL_0 |= 0x00000100 (0xc0)
&= 0xffff01ff
/* memory global control register - support buffer sdram on bank 0 */
DRAM_ECC_CTL_0 |= 0x00260000 (0xc4)
&= 0xff26ffff
/* enable ECC; enable read, modify, write control */
DRAM_REF_CTL_0 = DRAM_REF_DATA (0xb8)
/* set DRAM refresh parameters *** changed to 00940100 */
nop
nop
nop
nop
nop
DRAM_ECC_CTL_0 |= 0x20243280 (0xc4)
/* turn off ecc */
/* for SDRAM bank 0 */
DRAM_ECC_CTL_0 |= 0x20243290 (0xc4) ?
/* for SDRAM bank 1 */
/* Additional Stuff...*/
GLOBL_CTRL |= 0x20000b00 (0x54)
PCI_0_SB_CONFIG |= 0x04100007 (0xd0)
/* PCI 0 Side band config reg*/
0x8000083c |= 0x00080000
/* Disable VGA decode on PCI Bus 1 */
/*End Additional Stuff..*/
/*--------------------------------------------------------------*/
/* TERON serial port initialization code */
/*--------------------------------------------------------------*/
0x84380080 |= 0x00030000
/* enable super IO configuration VIA chip Register 85 */
/* Enable super I/O config mode */
0xfe0003f0 = 0xe2
bl delay1
0xfe0003f1 = 0x0f
bl delay1
/* enable com1 & com2, parallel port disabled */
0xfe0003f0 = 0xe7
bl delay1
/* let's make com1 base as 0x3f8 */
0xfe0003f1 = 0xfe
bl delay1
0xfe0003f0 = 0xe8
bl delay1
/* let's make com2 base as 0x2f8 */
0xfe0003f1 = 0xbe
0x84380080 &= 0xfffdffff
/* closing super IO configuration VIA chip Register 85 */
/* -------------------------------*/
0xfe0003fb = 0x83
bl delay1
/*latch enable word length -8 bit */ /* set mslab bit */
0xfe0003f8 = 0x0c
bl delay1
/* set baud rate lsb for 9600 baud */
0xfe0003f9 = 0x0
bl delay1
/* set baud rate msb for 9600 baud */
0xfe0003fb = 0x03
bl delay1
/* reset mslab */
/*--------------------------------------------------------------*/
/* END TERON Serial Port Initialization Code */
/*--------------------------------------------------------------*/
/*--------------------------------------------------------------*/
/* END TERON Articia / SDRAM Initialization code */
/*--------------------------------------------------------------*/
Proposed from Documentation:
write dmem 0xfec00cf8 0x50000080
write dmem 0xfee00cfc 0xc0305411
Writes to index 0x50-0x53.
0x50: Global Information Register 0
0xC0 = Little Endian CPU, Sequential order Burst
0x51: Global Information Register 1
Read only, 0x30 = Provides PowerPC and X86 support
0x52: Global Information Register 2
0x05 = 64/128 bit CPU bus support
0x53: Global Information Register 3
0x80 = PCI Bus 0 grant active time is 1 clock after REQ# deasserted
write dmem 0xfec00cf8 0x5c000080
write dmem 0xfee00cfc 0xb300011F
write dmem 0xfec00cf8 0xc8000080
write dmem 0xfee00cfc 0x0020f100
write dmem 0xfec00cf8 0x90000080
write dmem 0xfee00cfc 0x007fe700
write dmem 0xfec00cf8 0x9400080
write dmem 0xfee00cfc 0x007fe700
write dmem 0xfec00cf8 0xb0000080
write dmem 0xfee00cfc 0x737d737d
write dmem 0xfec00cf8 0xb4000080
write dmem 0xfee00cfc 0x737d737d
write dmem 0xfec00cf8 0xc0000080
write dmem 0xfee00cfc 0x40005500
write dmem 0xfec00cf8 0xb8000080
write dmem 0xfee00cfc 0x00940100
write dmem 0xfec00cf8 0xc4000080
write dmem 0xfee00cfc 0x00003280
write dmem 0xfec00cf8 0xc4000080
write dmem 0xfee00cfc 0x00003290

View File

@@ -63,7 +63,7 @@ SECTIONS
cpu/74xx_7xx/start.o (.text)
/* store the environment in a seperate sector in the boot flash */
/* . = env_offset; */
common/environment.o(.text)
common/environment.o(.text)
*(.text)
*(.fixup)
@@ -75,6 +75,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
@@ -86,7 +87,7 @@ SECTIONS
PROVIDE (erotext = .);
.reloc :
{
*(.got)
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
@@ -107,6 +108,11 @@ SECTIONS
_edata = .;
PROVIDE (edata = .);
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;

View File

@@ -83,7 +83,7 @@
#define USB_MAX_TEMP_INT_TD 32 /* number of temporary TDs for Interrupt transfers */
//#define USB_UHCI_DEBUG
/*#define USB_UHCI_DEBUG */
#ifdef USB_UHCI_DEBUG
#define USB_UHCI_PRINTF(fmt,args...) printf (fmt ,##args)
@@ -599,7 +599,7 @@ int usb_lowlevel_init(void)
printf("Error USB UHCI (%04X,%04X) not found\n",USB_UHCI_VEND_ID,USB_UHCI_DEV_ID);
return -1;
}
#if 1
s = getenv("usb_irq");
if (s)
@@ -1115,7 +1115,6 @@ static void usb_display_wValue(unsigned short wValue,unsigned short wIndex)
#endif
#ifdef USB_UHCI_DEBUG
static int usb_display_td(uhci_td_t *td)

View File

@@ -190,5 +190,3 @@ struct virt_root_hub {
#endif /* _USB_UHCI_H_ */

View File

@@ -211,18 +211,18 @@ void via_cfgfunc_via686(struct pci_controller *host, pci_dev_t dev, struct pci_c
__asm (" .globl via_calibrate_time_base \n"
"via_calibrate_time_base: \n"
" lis 9, 0xfe00 \n"
" li 0, 0x00 \n"
" lis 9, 0xfe00 \n"
" li 0, 0x00 \n"
" mttbu 0 \n"
" mttbl 0 \n"
"ctb_loop: \n"
" lbz 0, 0x61(9) \n"
" eieio \n"
" andi. 0, 0, 0x20 \n"
" beq ctb_loop \n"
"ctb_done: \n"
" mftb 3 \n"
" blr");
" lbz 0, 0x61(9) \n"
" eieio \n"
" andi. 0, 0, 0x20 \n"
" beq ctb_loop \n"
"ctb_done: \n"
" mftb 3 \n"
" blr");
extern unsigned long via_calibrate_time_base(void);

View File

@@ -1,6 +1,6 @@
/*
* (C) Copyright 2002
* Hyperion Entertainment, Hans-JoergF@hyperion-entertainment.com
* Hyperion Entertainment, Hans-JoergF@hyperion-entertainment.com
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -100,7 +100,7 @@ int drv_video_init(void)
video_inited = 1;
video_init();
memset (&vgadev, 0, sizeof(vgadev));
strcpy(vgadev.name, VIDEO_NAME);
vgadev.flags = DEV_FLAGS_OUTPUT | DEV_FLAGS_SYSTEM;
vgadev.putc = video_putc;
@@ -108,7 +108,7 @@ int drv_video_init(void)
vgadev.getc = NULL;
vgadev.tstc = NULL;
vgadev.start = video_start;
error = device_register (&vgadev);
if (error == 0)
@@ -129,11 +129,11 @@ int drv_video_init(void)
int video_init(void)
{
cursor_position = VIDEO_BASE; // Color text display base
cursor_position = VIDEO_BASE; /* Color text display base */
cursor_row = 0;
cursor_col = 0;
current_attr = video_get_attr(); // Currently selected value for attribute.
// video_test();
current_attr = video_get_attr(); /* Currently selected value for attribute. */
/* video_test(); */
video_set_color(current_attr);
return 0;
@@ -283,7 +283,7 @@ void video_bios_print_string(char *s, int x, int y, int attr, int count)
void video_draw_box(int style, int attr, char *title, int separate, int x, int y, int w, int h)
{
unsigned char *fb, *fb2;
unsigned char *fb, *fb2;
unsigned char *st = (style == SINGLE_BOX)?video_single_box : video_double_box;
unsigned char *ti = (style == SINGLE_BOX)?video_single_title : video_double_title;
int i;
@@ -324,11 +324,11 @@ void video_draw_box(int style, int attr, char *title, int separate, int x, int y
*fb = st[3];
*(fb+1) = attr; fb += 2*VIDEO_COLS;
*fb2 = st[4];
*fb2 = st[4];
*(fb2+1) = attr; fb2 += 2*VIDEO_COLS;
}
// Draw title
/* Draw title */
if (title)
{
if (separate == 0)
@@ -370,7 +370,7 @@ void video_draw_box(int style, int attr, char *title, int separate, int x, int y
fb += 2;
}
fb = video_addr(x+2, y+1);
while (*title)
{
*fb = *title;
@@ -414,7 +414,7 @@ void video_save_rect(int x, int y, int w, int h, void *save_area, int clearchar,
}
void video_restore_rect(int x, int y, int w, int h, void *save_area)
{
{
unsigned char *save = (unsigned char *)save_area;
unsigned char *fb = video_addr(x,y);
int i,j;
@@ -484,7 +484,7 @@ void video_banner(void)
int i;
char *s;
int maxdev;
if (video_inited == 0) return;
#ifdef EASTEREGG

View File

@@ -130,14 +130,14 @@ static void X86API int1A(int intno)
switch(M.x86.R_AX)
{
case 0xB101: // PCI Bios Present?
case 0xB101: /* PCI Bios Present? */
M.x86.R_AL = 0x00;
M.x86.R_EDX = 0x20494350;
M.x86.R_BX = 0x0210;
M.x86.R_CL = 3;
CLEAR_FLAG(F_CF);
break;
case 0xB102: // Find device
case 0xB102: /* Find device */
device = mypci_find_device(M.x86.R_DX, M.x86.R_CX, M.x86.R_SI);
if (device != -1)
{
@@ -151,52 +151,52 @@ static void X86API int1A(int intno)
}
CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF);
break;
case 0xB103: // Find PCI class code
case 0xB103: /* Find PCI class code */
M.x86.R_AH = PCIBIOS_DEVICE_NOT_FOUND;
//printf("Find by class not yet implmented");
/*printf("Find by class not yet implmented"); */
CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF);
break;
case 0xB108: // read config byte
case 0xB108: /* read config byte */
M.x86.R_CL = mypci_read_cfg_byte(M.x86.R_BH, M.x86.R_BL, M.x86.R_DI);
M.x86.R_AH = PCIBIOS_SUCCESSFUL;
CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF);
//printf("read_config_byte %x,%x,%x -> %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI,
// M.x86.R_CL);
/*printf("read_config_byte %x,%x,%x -> %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, */
/* M.x86.R_CL); */
break;
case 0xB109: // read config word
case 0xB109: /* read config word */
M.x86.R_CX = mypci_read_cfg_word(M.x86.R_BH, M.x86.R_BL, M.x86.R_DI);
M.x86.R_AH = PCIBIOS_SUCCESSFUL;
CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF);
//printf("read_config_word %x,%x,%x -> %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI,
// M.x86.R_CX);
/*printf("read_config_word %x,%x,%x -> %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, */
/* M.x86.R_CX); */
break;
case 0xB10A: // read config dword
case 0xB10A: /* read config dword */
M.x86.R_ECX = mypci_read_cfg_long(M.x86.R_BH, M.x86.R_BL, M.x86.R_DI);
M.x86.R_AH = PCIBIOS_SUCCESSFUL;
CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF);
//printf("read_config_long %x,%x,%x -> %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI,
// M.x86.R_ECX);
/*printf("read_config_long %x,%x,%x -> %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, */
/* M.x86.R_ECX); */
break;
case 0xB10B: // write config byte
case 0xB10B: /* write config byte */
mypci_write_cfg_byte(M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, M.x86.R_CL);
M.x86.R_AH = PCIBIOS_SUCCESSFUL;
CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF);
//printf("write_config_byte %x,%x,%x <- %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI,
// M.x86.R_CL);
/*printf("write_config_byte %x,%x,%x <- %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, */
/* M.x86.R_CL); */
break;
case 0xB10C: // write config word
case 0xB10C: /* write config word */
mypci_write_cfg_word(M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, M.x86.R_CX);
M.x86.R_AH = PCIBIOS_SUCCESSFUL;
CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF);
//printf("write_config_word %x,%x,%x <- %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI,
// M.x86.R_CX);
/*printf("write_config_word %x,%x,%x <- %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, */
/* M.x86.R_CX); */
break;
case 0xB10D: // write config dword
case 0xB10D: /* write config dword */
mypci_write_cfg_long(M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, M.x86.R_ECX);
M.x86.R_AH = PCIBIOS_SUCCESSFUL;
CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF);
//printf("write_config_long %x,%x,%x <- %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI,
// M.x86.R_ECX);
/*printf("write_config_long %x,%x,%x <- %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, */
/* M.x86.R_ECX); */
break;
default:
PRINTF("BIOS int %xh: Unknown function AX=%04xh\n", intno, M.x86.R_AX);
@@ -208,7 +208,7 @@ void bios_init(void)
{
int i;
X86EMU_intrFuncs bios_intr_tab[256];
for (i=0; i<256; i++)
{
write_long_little(M.mem_base+i*4, BIOS_SEG<<16);
@@ -221,7 +221,7 @@ void bios_init(void)
bios_intr_tab[0x15] = int15;
bios_intr_tab[0x6D] = int42;
X86EMU_setupIntrFuncs(bios_intr_tab);
video_init();
}
@@ -252,14 +252,14 @@ unsigned char setup_bw[] =
unsigned char * setup_modes[] =
{
setup_40x25, // mode 0: 40x25 bw text
setup_40x25, // mode 1: 40x25 col text
setup_80x25, // mode 2: 80x25 bw text
setup_80x25, // mode 3: 80x25 col text
setup_graphics, // mode 4: 320x200 col graphics
setup_graphics, // mode 5: 320x200 bw graphics
setup_graphics, // mode 6: 640x200 bw graphics
setup_bw // mode 7: 80x25 mono text
setup_40x25, /* mode 0: 40x25 bw text */
setup_40x25, /* mode 1: 40x25 col text */
setup_80x25, /* mode 2: 80x25 bw text */
setup_80x25, /* mode 3: 80x25 col text */
setup_graphics, /* mode 4: 320x200 col graphics */
setup_graphics, /* mode 5: 320x200 bw graphics */
setup_graphics, /* mode 6: 640x200 bw graphics */
setup_bw /* mode 7: 80x25 mono text */
};
unsigned int setup_cols[] =
@@ -280,13 +280,13 @@ unsigned int setup_bufsize[] =
void bios_set_mode(int mode)
{
int i;
unsigned char mode_set = setup_modesets[mode]; // Control register value
unsigned char *setup_regs = setup_modes[mode]; // Register 3D4 Array
unsigned char mode_set = setup_modesets[mode]; /* Control register value */
unsigned char *setup_regs = setup_modes[mode]; /* Register 3D4 Array */
// Switch video off
/* Switch video off */
out_byte(0x3D8, mode_set & 0x37);
// Set up parameters at 3D4h
/* Set up parameters at 3D4h */
for (i=0; i<16; i++)
{
out_byte(0x3D4, (unsigned char)i);
@@ -294,10 +294,10 @@ void bios_set_mode(int mode)
setup_regs++;
}
// Enable video
/* Enable video */
out_byte(0x3D8, mode_set);
// Set overscan
/* Set overscan */
if (mode == 6) out_byte(0x3D9, 0x3F);
else out_byte(0x3D9, 0x30);
}

View File

@@ -401,7 +401,7 @@ int find_image(u32 rom_address, u32 rom_size, void **image, u32 *image_size)
{
int i = 0;
unsigned char *rom = (unsigned char *)rom_address;
/* if (*rom != 0x55 || *(rom+1) != 0xAA) return 0; // No bios rom this is, yes. */
/* if (*rom != 0x55 || *(rom+1) != 0xAA) return 0; /* No bios rom this is, yes. */ */
for (;;)
{
@@ -479,7 +479,6 @@ void show_bat_mapping(void)
}
void remove_init_data(void)
{
char *s;
@@ -497,19 +496,19 @@ void remove_init_data(void)
}
else if (s)
{
if (strcmp(s, "dcache")==0)
{
dcache_enable();
}
else if (strcmp(s, "icache") == 0)
{
icache_enable();
}
else if (strcmp(s, "on")== 0 || strcmp(s, "both") == 0)
{
dcache_enable();
icache_enable();
}
if (strcmp(s, "dcache")==0)
{
dcache_enable();
}
else if (strcmp(s, "icache") == 0)
{
icache_enable();
}
else if (strcmp(s, "on")== 0 || strcmp(s, "both") == 0)
{
dcache_enable();
icache_enable();
}
}
/* show_bat_mapping();*/

View File

@@ -152,4 +152,3 @@ void PMAPI BE_exit(void);
#endif
#endif /* __BIOSEMU_H */

View File

@@ -201,9 +201,9 @@ keyboard), but the translated ASCII values may be different depending on
the country code pages in use.
NOTE: Scan codes in the event library are not really hardware scan codes,
but rather virtual scan codes as generated by a low level keyboard
interface driver. All virtual codes begin with scan code 0x60 and
range up from there.
but rather virtual scan codes as generated by a low level keyboard
interface driver. All virtual codes begin with scan code 0x60 and
range up from there.
HEADER:
event.h
@@ -496,38 +496,38 @@ event.h
MEMBERS:
which - Window identifier for message for use by high level window manager
code (i.e. MegaVision GUI or Windows API).
code (i.e. MegaVision GUI or Windows API).
what - Type of event that occurred. Will be one of the values defined by
the EVT_eventType enumeration.
the EVT_eventType enumeration.
when - Time that the event occurred in milliseconds since startup
where_x - X coordinate of the mouse cursor location at the time of the event
(in screen coordinates). For joystick events this represents
the position of the first joystick X axis.
(in screen coordinates). For joystick events this represents
the position of the first joystick X axis.
where_y - Y coordinate of the mouse cursor location at the time of the event
(in screen coordinates). For joystick events this represents
the position of the first joystick Y axis.
(in screen coordinates). For joystick events this represents
the position of the first joystick Y axis.
relative_x - Relative movement of the mouse cursor in the X direction (in
units of mickeys, or 1/200th of an inch). For joystick events
this represents the position of the second joystick X axis.
units of mickeys, or 1/200th of an inch). For joystick events
this represents the position of the second joystick X axis.
relative_y - Relative movement of the mouse cursor in the Y direction (in
units of mickeys, or 1/200th of an inch). For joystick events
this represents the position of the second joystick Y axis.
units of mickeys, or 1/200th of an inch). For joystick events
this represents the position of the second joystick Y axis.
message - Event specific message for the event. For use events this can be
any user specific information. For keyboard events this contains
the ASCII code in bits 0-7, the keyboard scan code in bits 8-15 and
the character repeat count in bits 16-30. You can use the
EVT_asciiCode, EVT_scanCode and EVT_repeatCount macros to extract
this information from the message field. For mouse events this
contains information about which button was pressed, and will be a
combination of the flags defined by the EVT_eventMouseMaskType
enumeration. For joystick events, this conatins information
about which buttons were pressed, and will be a combination of
the flags defined by the EVT_eventJoyMaskType enumeration.
any user specific information. For keyboard events this contains
the ASCII code in bits 0-7, the keyboard scan code in bits 8-15 and
the character repeat count in bits 16-30. You can use the
EVT_asciiCode, EVT_scanCode and EVT_repeatCount macros to extract
this information from the message field. For mouse events this
contains information about which button was pressed, and will be a
combination of the flags defined by the EVT_eventMouseMaskType
enumeration. For joystick events, this conatins information
about which buttons were pressed, and will be a combination of
the flags defined by the EVT_eventJoyMaskType enumeration.
modifiers - Contains additional information about the state of the keyboard
shift modifiers (Ctrl, Alt and Shift keys) when the event
occurred. For mouse events it will also contain the state of
the mouse buttons. Will be a combination of the values defined
by the EVT_eventModMaskType enumeration.
shift modifiers (Ctrl, Alt and Shift keys) when the event
occurred. For mouse events it will also contain the state of
the mouse buttons. Will be a combination of the values defined
by the EVT_eventModMaskType enumeration.
next - Internal use; do not use.
prev - Internal use; do not use.
****************************************************************************/
@@ -555,8 +555,8 @@ different code page translation table if you want to support keyboards
other than the US English keyboard (the default).
NOTE: Entries in code page tables *must* be in ascending order for the
scan codes as we do a binary search on the tables for the ASCII
code equivalents.
scan codes as we do a binary search on the tables for the ASCII
code equivalents.
HEADER:
event.h

View File

@@ -103,14 +103,14 @@ typedef enum {
typedef union {
struct {
uint Zero:2;
uint Register:6;
uint Function:3;
uint Device:5;
uint Bus:8;
uint Reserved:7;
uint Enable:1;
} p;
uint Zero:2;
uint Register:6;
uint Function:3;
uint Device:5;
uint Bus:8;
uint Reserved:7;
uint Enable:1;
} p;
ulong i;
} PCIslot;
@@ -194,9 +194,9 @@ typedef struct {
uchar SubordinateBus;
uchar SecondaryLatency;
struct {
ulong Base;
ulong Limit;
} Range[4];
ulong Base;
ulong Limit;
} Range[4];
uchar InterruptLine;
uchar InterruptPin;
ushort BridgeControl;
@@ -224,10 +224,10 @@ typedef struct {
uchar HeaderType;
uchar BIST;
union {
PCIType0Info type0;
PCIType1Info type1;
PCIType2Info type2;
} u;
PCIType0Info type0;
PCIType1Info type1;
PCIType2Info type2;
} u;
} PCIDeviceInfo;
/* PCI Capability header structure. All PCI capabilities have the
@@ -411,4 +411,3 @@ ulong _ASMAPI PCIBIOS_getEntry(void);
#endif
#endif /* __PCILIB_H */

View File

@@ -164,4 +164,3 @@ typedef enum {
#endif /* !__OS2__ */
#endif /* __PMHELP_H */

View File

@@ -73,4 +73,3 @@ PMHELP_CTL_CODE(GASETLOCALPATH ,0x002D),
PMHELP_CTL_CODE(GAGETEXPORTS ,0x002E),
PMHELP_CTL_CODE(GATHUNK ,0x002F),
PMHELP_CTL_CODE(SETNUCLEUSPATH ,0x0030),

View File

@@ -1146,4 +1146,3 @@ int PMAPI PM_int386x(int intno, PMREGS *in, PMREGS *out,PMSREGS *sregs);
#endif
#endif /* __PMAPI_H */

View File

@@ -191,4 +191,3 @@ PM_imports _VARAPI _PM_imports = {
NULL,
#endif
};

View File

@@ -80,7 +80,7 @@
#ifdef __GNUC__
#ifdef __cplusplus
// G++ currently fucks this up!
/* G++ currently fucks this up! */
#define __cdecl
#define __stdcall
#else
@@ -605,18 +605,18 @@ void _ASMAPI DebugVxD(void);
{ \
static ibool firstTime = true; \
if (firstTime) { \
firstTime = false; \
DebugInt(); \
} \
firstTime = false; \
DebugInt(); \
} \
}
#define DebugVxDOnce() \
{ \
static ibool firstTime = true; \
if (firstTime) { \
firstTime = false; \
DebugVxD(); \
} \
firstTime = false; \
DebugVxD(); \
} \
}
/* Macros for linux string compatibility functions */
@@ -636,10 +636,10 @@ void _ASMAPI DebugVxD(void);
/* Get rid of some helaciously annoying Visual C++ warnings! */
#if defined(_MSC_VER) && !defined(__MWERKS__) && !defined(__SC__)
#pragma warning(disable:4761) // integral size mismatch in argument; conversion supplied
#pragma warning(disable:4244) // conversion from 'unsigned short ' to 'unsigned char ', possible loss of data
#pragma warning(disable:4018) // '<' : signed/unsigned mismatch
#pragma warning(disable:4305) // 'initializing' : truncation from 'const double' to 'float'
#pragma warning(disable:4761) /* integral size mismatch in argument; conversion supplied */
#pragma warning(disable:4244) /* conversion from 'unsigned short ' to 'unsigned char ', possible loss of data */
#pragma warning(disable:4018) /* '<' : signed/unsigned mismatch */
#pragma warning(disable:4305) /* 'initializing' : truncation from 'const double' to 'float' */
#endif
/*---------------------------------------------------------------------------
@@ -674,29 +674,29 @@ void _CHK_defaultFail(int fatal,const char *msg,const char *cond,const char *fil
# define CHK(x) x
#if CHECKED > 1
# define CHECK(p) \
((p) ? (void)0 : DebugInt(), \
_CHK_fail(1,"Check failed: '%s', file %s, line %d\n", \
#p, __FILE__, __LINE__))
((p) ? (void)0 : DebugInt(), \
_CHK_fail(1,"Check failed: '%s', file %s, line %d\n", \
#p, __FILE__, __LINE__))
# define WARN(p) \
((p) ? (void)0 : DebugInt(), \
_CHK_fail(0,"Warning: '%s', file %s, line %d\n", \
#p, __FILE__, __LINE__))
((p) ? (void)0 : DebugInt(), \
_CHK_fail(0,"Warning: '%s', file %s, line %d\n", \
#p, __FILE__, __LINE__))
#else
# define CHECK(p) \
((p) ? (void)0 : \
_CHK_fail(1,"Check failed: '%s', file %s, line %d\n", \
#p, __FILE__, __LINE__))
((p) ? (void)0 : \
_CHK_fail(1,"Check failed: '%s', file %s, line %d\n", \
#p, __FILE__, __LINE__))
# define WARN(p) \
((p) ? (void)0 : \
_CHK_fail(0,"Warning: '%s', file %s, line %d\n", \
#p, __FILE__, __LINE__))
((p) ? (void)0 : \
_CHK_fail(0,"Warning: '%s', file %s, line %d\n", \
#p, __FILE__, __LINE__))
#endif
# define LOGFATAL(msg) \
_CHK_fail(1,"Fatal error: '%s', file %s, line %d\n", \
msg, __FILE__, __LINE__)
_CHK_fail(1,"Fatal error: '%s', file %s, line %d\n", \
msg, __FILE__, __LINE__)
# define LOGWARN(msg) \
_CHK_fail(0,"Warning: '%s', file %s, line %d\n", \
msg, __FILE__, __LINE__)
_CHK_fail(0,"Warning: '%s', file %s, line %d\n", \
msg, __FILE__, __LINE__)
#else
# define CHK(x)
# define CHECK(p) ((void)0)

View File

@@ -105,7 +105,7 @@ struct i386_special_regs {
u32 FLAGS;
};
/*
/*
* Segment registers here represent the 16 bit quantities
* CS, DS, ES, SS.
*/
@@ -183,8 +183,8 @@ struct i386_segment_regs {
#define F_ALWAYS_ON (0x0002) /* flag bits always on */
/*
* Define a mask for only those flag bits we will ever pass back
* (via PUSHF)
* Define a mask for only those flag bits we will ever pass back
* (via PUSHF)
*/
#define F_MSK (FB_CF|FB_PF|FB_AF|FB_ZF|FB_SF|FB_TF|FB_IF|FB_DF|FB_OF)
@@ -235,21 +235,21 @@ struct i386_segment_regs {
#define SYSMODE_HALTED 0x40000000
#define SYSMODE_SEGMASK (SYSMODE_SEG_DS_SS | \
SYSMODE_SEGOVR_CS | \
SYSMODE_SEGOVR_DS | \
SYSMODE_SEGOVR_ES | \
SYSMODE_SEGOVR_FS | \
SYSMODE_SEGOVR_GS | \
SYSMODE_SEGOVR_SS)
SYSMODE_SEGOVR_CS | \
SYSMODE_SEGOVR_DS | \
SYSMODE_SEGOVR_ES | \
SYSMODE_SEGOVR_FS | \
SYSMODE_SEGOVR_GS | \
SYSMODE_SEGOVR_SS)
#define SYSMODE_CLRMASK (SYSMODE_SEG_DS_SS | \
SYSMODE_SEGOVR_CS | \
SYSMODE_SEGOVR_DS | \
SYSMODE_SEGOVR_ES | \
SYSMODE_SEGOVR_FS | \
SYSMODE_SEGOVR_GS | \
SYSMODE_SEGOVR_SS | \
SYSMODE_PREFIX_DATA | \
SYSMODE_PREFIX_ADDR)
SYSMODE_SEGOVR_CS | \
SYSMODE_SEGOVR_DS | \
SYSMODE_SEGOVR_ES | \
SYSMODE_SEGOVR_FS | \
SYSMODE_SEGOVR_GS | \
SYSMODE_SEGOVR_SS | \
SYSMODE_PREFIX_DATA | \
SYSMODE_PREFIX_ADDR)
#define INTR_SYNCH 0x1
#define INTR_ASYNCH 0x2
@@ -266,8 +266,8 @@ typedef struct {
* Delayed flag set 3 bits (zero, signed, parity)
* reserved 6 bits
* interrupt # 8 bits instruction raised interrupt
* BIOS video segregs 4 bits
* Interrupt Pending 1 bits
* BIOS video segregs 4 bits
* Interrupt Pending 1 bits
* Extern interrupt 1 bits
* Halted 1 bits
*/
@@ -317,12 +317,12 @@ extern "C" { /* Use "C" linkage when in C++ mode */
extern X86EMU_sysEnv _X86EMU_env;
#define M _X86EMU_env
/*-------------------------- Function Prototypes --------------------------*/
/* Function to log information at runtime */
//void printk(const char *fmt, ...);
/*void printk(const char *fmt, ...); */
#ifdef __cplusplus
} /* End of "C" linkage for C++ */

View File

@@ -0,0 +1 @@
This file is just to ensure that the directory is created.

View File

@@ -0,0 +1 @@
This file is just to ensure that the directory is created.

View File

@@ -178,4 +178,3 @@ ASFLAGS += -d__SNAP__
# Include file dependencies
.INCLUDE .IGNORE: "makefile.dep"

View File

@@ -178,4 +178,3 @@ PMLIB := -lpm
# Define which file contains our rules
RULES_MAK := gcc_linux.mk

View File

@@ -133,4 +133,3 @@ PMLIB := -lpm
# Define which file contains our rules
RULES_MAK := gcc_win32.mk

View File

@@ -162,4 +162,3 @@ PMLIB := -lpm
# Define which file contains our rules
RULES_MAK := qnx4.mk

View File

@@ -44,5 +44,4 @@ PMLIB :=
%$L: ; $(LIB) $(LIBFLAGS) $@ $&
# Implicit rule for building an executable file
%$E: ; $(LD) $(LDFLAGS) -o $@ $& $(EXELIBS) $(PMLIB)
%$E: ; $(LD) $(LDFLAGS) -o $@ $& $(EXELIBS) $(PMLIB)

View File

@@ -91,4 +91,3 @@ LD := $(LDXX)
@$(ECHO) ld $@
@$(LD) $(LDFLAGS) -o $@ $& $(EXELIBS) $(PMLIB) -lm
.ENDIF

View File

@@ -88,4 +88,3 @@ LD := $(LDXX)
@$(ECHO) ld $@
@$(LD) $(LDFLAGS) -o $@ @$(mktmp $(&:s/\/\\) $(EXELIBS) $(PMLIB) -lm)
.ENDIF

View File

@@ -69,14 +69,14 @@ PMLIB :=
# Implicit rule for building an executable file using response file
.IF $(USE_OS2GUI)
%$E: ;
rclink $(LD) $(RC) $@ $(mktmp $(LDFLAGS) $(&:t"+\n":s/\/\\)\n$@\n$*.map\n$(EXELIBS) $(PMLIB)\n$*.def\n)
rclink $(LD) $(RC) $@ $(mktmp $(LDFLAGS) $(&:t"+\n":s/\/\\)\n$@\n$*.map\n$(EXELIBS) $(PMLIB)\n$*.def\n)
.IF $(LXLITE)
lxlite $@
lxlite $@
.ENDIF
.ELSE
%$E: ;
rclink $(LD) $(RC) $@ $(mktmp $(LDFLAGS) $(&:t"+\n":s/\/\\)\n$@\n$*.map\n$(EXELIBS) $(PMLIB)\n\n)
rclink $(LD) $(RC) $@ $(mktmp $(LDFLAGS) $(&:t"+\n":s/\/\\)\n$@\n$*.map\n$(EXELIBS) $(PMLIB)\n\n)
.IF $(LXLITE)
lxlite $@
lxlite $@
.ENDIF
.ENDIF

View File

@@ -66,14 +66,14 @@ PMLIB :=
# Implicit rule for building an executable file using response file
.IF $(USE_OS2GUI)
%$E: ;
rclink $(LD) $(RC) $@ $(mktmp $(LDFLAGS) $(&:t"+\n":s/\/\\)\n$@\n$*.map\n$(EXELIBS) $(PMLIB)\n$*.def\n)
rclink $(LD) $(RC) $@ $(mktmp $(LDFLAGS) $(&:t"+\n":s/\/\\)\n$@\n$*.map\n$(EXELIBS) $(PMLIB)\n$*.def\n)
.IF $(LXLITE)
lxlite $@
lxlite $@
.ENDIF
.ELSE
%$E: ;
rclink $(LD) $(RC) $@ $(mktmp $(LDFLAGS) $(&:t"+\n":s/\/\\)\n$@\n$*.map\n$(EXELIBS) $(PMLIB)\n\n)
rclink $(LD) $(RC) $@ $(mktmp $(LDFLAGS) $(&:t"+\n":s/\/\\)\n$@\n$*.map\n$(EXELIBS) $(PMLIB)\n\n)
.IF $(LXLITE)
lxlite $@
lxlite $@
.ENDIF
.ENDIF

View File

@@ -109,7 +109,7 @@ LDFLAGS += OP PRIV=1
@gcpp -DNASM_ASSEMBLER -D__WATCOMC__ -EP $(<:s,/,\) > $(*:s,/,\).asm
nasm @$(mktmp -f obj -o $@) $(*:s,/,\).asm
@$(RM) -S $(mktmp $(*:s,/,\).asm)
.ENDIF
.ENDIF
# Special target to build dllstart.asm using Borland TASM
dllstart.obj: dllstart.asm
@@ -126,26 +126,26 @@ dllstart.obj: dllstart.asm
@trimlib $(mktmp $(LDFLAGS) OP quiet SYS os2v2 dll\nN $@\nF $(&:t",\n":s/\/\\)\nLIBR $(EXELIBS:t",")) $*.lnk
rclink $(LD) $(RC) $@ $*.lnk
.IF $(LEAVE_LINKFILE)
.ELSE
.ELSE
@$(RM) -S $(mktmp *.lnk)
.ENDIF
.ENDIF
.ELIF $(USE_WIN32)
%$D: ;
@trimlib $(mktmp $(LDFLAGS) OP quiet SYS nt_dll\nN $@\nF $(&:t",\n":s/\/\\)\nLIBR $(PMLIB)$(DEFLIBS)$(EXELIBS:t",")) $*.lnk
rclink $(LD) $(RC) $@ $*.lnk
.IF $(LEAVE_LINKFILE)
.ELSE
.ELSE
@$(RM) -S $(mktmp *.lnk)
.ENDIF
.ENDIF
.ELSE
%$D: ;
@trimlib $(mktmp $(LDFLAGS) OP quiet SYS win386\nN $*.rex\nF $(&:t",\n":s/\/\\)\nLIBR $(EXELIBS:t",")) $*.lnk
rclink $(LD) $(RC) $@ $*.lnk
wbind $* -d -q -n
.IF $(LEAVE_LINKFILE)
.ELSE
.ELSE
@$(RM) -S $(mktmp *.lnk)
.ENDIF
.ENDIF
.ENDIF
.ENDIF
@@ -171,18 +171,18 @@ dllstart.obj: dllstart.asm
$(LD) $(LDFLAGS) @$*.lnk
x32fix $@
.IF $(LEAVE_LINKFILE)
.ELSE
.ELSE
@$(RM) -S $(mktmp *.lnk)
.ENDIF
.ENDIF
.ELIF $(USE_OS232)
.IF $(USE_OS2GUI)
%$E: ;
@trimlib $(mktmp $(LDFLAGS) OP quiet SYS os2v2_pm\nN $@\nF $(&:t",":s/\/\\)\nLIBR $(PMLIB)$(EXELIBS:t",")) $*.lnk
rclink $(LD) $(RC) $@ $*.lnk
.IF $(LEAVE_LINKFILE)
.ELSE
.ELSE
@$(RM) -S $(mktmp *.lnk)
.ENDIF
.ENDIF
.IF $(LXLITE)
lxlite $@
.ENDIF
@@ -191,9 +191,9 @@ dllstart.obj: dllstart.asm
@trimlib $(mktmp $(LDFLAGS) OP quiet SYS os2v2\nN $@\nF $(&:t",":s/\/\\)\nLIBR $(PMLIB)$(EXELIBS:t",")) $*.lnk
rclink $(LD) $(RC) $@ $*.lnk
.IF $(LEAVE_LINKFILE)
.ELSE
.ELSE
@$(RM) -S $(mktmp *.lnk)
.ENDIF
.ENDIF
.IF $(LXLITE)
lxlite $@
.ENDIF
@@ -203,43 +203,43 @@ dllstart.obj: dllstart.asm
@trimlib $(mktmp $(LDFLAGS) OP quiet SYS nt\nN $@\nF $(&:t",":s/\/\\)\nLIBR $(DEFLIBS)$(EXELIBS:t",")) $*.lnk
rclink $(LD) $(RC) $@ $*.lnk
.IF $(LEAVE_LINKFILE)
.ELSE
.ELSE
@$(RM) -S $(mktmp *.lnk)
.ENDIF
.ENDIF
.ELIF $(USE_WIN32)
.IF $(WIN32_GUI)
%$E: ;
@trimlib $(mktmp $(LDFLAGS) OP quiet SYS win95\nN $@\nF $(&:t",":s/\/\\)\nLIBR $(PMLIB)$(DEFLIBS)$(EXELIBS:t",")) $*.lnk
rclink $(LD) $(RC) $@ $*.lnk
.IF $(LEAVE_LINKFILE)
.ELSE
.ELSE
@$(RM) -S $(mktmp *.lnk)
.ENDIF
.ENDIF
.ELSE
%$E: ;
@trimlib $(mktmp $(LDFLAGS) OP quiet SYS nt\nN $@\nF $(&:t",":s/\/\\)\nLIBR $(PMLIB)$(DEFLIBS)$(EXELIBS:t",")) $*.lnk
rclink $(LD) $(RC) $@ $*.lnk
.IF $(LEAVE_LINKFILE)
.ELSE
.ELSE
@$(RM) -S $(mktmp *.lnk)
.ENDIF
.ENDIF
.ENDIF
.ELIF $(USE_WIN386)
%$E: ;
@trimlib $(mktmp $(LDFLAGS) OP quiet SYS win386\nN $*.rex\nF $(&:t",":s/\/\\)\nLIBR $(PMLIB)$(EXELIBS:t",")) $*.lnk
rclink $(LD) wbind $*.rex $*.lnk
.IF $(LEAVE_LINKFILE)
.ELSE
.ELSE
@$(RM) -S $(mktmp *.lnk)
.ENDIF
.ENDIF
.ELIF $(USE_TNT)
%$E: ;
@trimlib $(mktmp $(LDFLAGS) OP quiet\nN $@\nF $(&:t",":s/\/\\)\nLIBR dosx32.lib,tntapi.lib,$(PMLIB)$(EXELIBS:t",")) $*.lnk
$(LD) @$*.lnk
.IF $(LEAVE_LINKFILE)
.ELSE
.ELSE
@$(RM) -S $(mktmp *.lnk)
.ENDIF
.ENDIF
.IF $(DOSSTYLE)
@markphar $@
.ENDIF
@@ -250,16 +250,15 @@ dllstart.obj: dllstart.asm
$(LD) @$*.lnk
@attrib +s $*.exe
.IF $(LEAVE_LINKFILE)
.ELSE
.ELSE
@$(RM) -S $(mktmp *.lnk)
.ENDIF
.ENDIF
.ELSE
%$E: ;
@trimlib $(mktmp $(LDFLAGS) OP quiet\nN $@\nF $(&:t",":s/\/\\)\nLIBR $(PMLIB)$(EXELIBS:t",")) $*.lnk
$(LD) @$*.lnk
.IF $(LEAVE_LINKFILE)
.ELSE
.ELSE
@$(RM) -S $(mktmp *.lnk)
.ENDIF
.ENDIF
.ENDIF

View File

@@ -159,4 +159,3 @@ __.SILENT := $(.SILENT)
# We dont use TABS in our makefiles
.NOTABS := yes

View File

@@ -351,4 +351,3 @@ LIB_BASE_DIR := $(SCITECH_LIB)\lib\release
# Define which file contains our rules
RULES_MAK := wc32.mk

View File

@@ -77,20 +77,20 @@ u8 X86API BE_rdb(
u8 val = 0;
if (addr >= 0xC0000 && addr <= _BE_env.biosmem_limit) {
val = *(u8*)(_BE_env.biosmem_base + addr - 0xC0000);
}
val = *(u8*)(_BE_env.biosmem_base + addr - 0xC0000);
}
else if (addr >= 0xA0000 && addr <= 0xFFFFF) {
val = readb(_BE_env.busmem_base, addr - 0xA0000);
}
val = readb(_BE_env.busmem_base, addr - 0xA0000);
}
else if (addr > M.mem_size - 1) {
DB( printk("mem_read: address %#lx out of range!\n", addr);)
HALT_SYS();
}
HALT_SYS();
}
else {
val = *(u8*)(M.mem_base + addr);
}
val = *(u8*)(M.mem_base + addr);
}
DB( if (DEBUG_MEM())
printk("%#08x 1 -> %#x\n", addr, val);)
printk("%#08x 1 -> %#x\n", addr, val);)
return val;
}
@@ -112,42 +112,42 @@ u16 X86API BE_rdw(
if (addr >= 0xC0000 && addr <= _BE_env.biosmem_limit) {
#ifdef __BIG_ENDIAN__
if (addr & 0x1) {
addr -= 0xC0000;
val = ( *(u8*)(_BE_env.biosmem_base + addr) |
(*(u8*)(_BE_env.biosmem_base + addr + 1) << 8));
}
else
if (addr & 0x1) {
addr -= 0xC0000;
val = ( *(u8*)(_BE_env.biosmem_base + addr) |
(*(u8*)(_BE_env.biosmem_base + addr + 1) << 8));
}
else
#endif
val = *(u16*)(_BE_env.biosmem_base + addr - 0xC0000);
}
val = *(u16*)(_BE_env.biosmem_base + addr - 0xC0000);
}
else if (addr >= 0xA0000 && addr <= 0xFFFFF) {
#ifdef __BIG_ENDIAN__
if (addr & 0x1) {
addr -= 0xA0000;
val = ( readb(_BE_env.busmem_base, addr) |
(readb(_BE_env.busmem_base, addr + 1) << 8));
}
else
if (addr & 0x1) {
addr -= 0xA0000;
val = ( readb(_BE_env.busmem_base, addr) |
(readb(_BE_env.busmem_base, addr + 1) << 8));
}
else
#endif
val = readw(_BE_env.busmem_base, addr - 0xA0000);
}
val = readw(_BE_env.busmem_base, addr - 0xA0000);
}
else if (addr > M.mem_size - 2) {
DB( printk("mem_read: address %#lx out of range!\n", addr);)
HALT_SYS();
}
HALT_SYS();
}
else {
#ifdef __BIG_ENDIAN__
if (addr & 0x1) {
val = ( *(u8*)(M.mem_base + addr) |
(*(u8*)(M.mem_base + addr + 1) << 8));
}
else
if (addr & 0x1) {
val = ( *(u8*)(M.mem_base + addr) |
(*(u8*)(M.mem_base + addr + 1) << 8));
}
else
#endif
val = *(u16*)(M.mem_base + addr);
}
val = *(u16*)(M.mem_base + addr);
}
DB( if (DEBUG_MEM())
printk("%#08x 2 -> %#x\n", addr, val);)
printk("%#08x 2 -> %#x\n", addr, val);)
return val;
}
@@ -169,48 +169,48 @@ u32 X86API BE_rdl(
if (addr >= 0xC0000 && addr <= _BE_env.biosmem_limit) {
#ifdef __BIG_ENDIAN__
if (addr & 0x3) {
addr -= 0xC0000;
val = ( *(u8*)(_BE_env.biosmem_base + addr + 0) |
(*(u8*)(_BE_env.biosmem_base + addr + 1) << 8) |
(*(u8*)(_BE_env.biosmem_base + addr + 2) << 16) |
(*(u8*)(_BE_env.biosmem_base + addr + 3) << 24));
}
else
if (addr & 0x3) {
addr -= 0xC0000;
val = ( *(u8*)(_BE_env.biosmem_base + addr + 0) |
(*(u8*)(_BE_env.biosmem_base + addr + 1) << 8) |
(*(u8*)(_BE_env.biosmem_base + addr + 2) << 16) |
(*(u8*)(_BE_env.biosmem_base + addr + 3) << 24));
}
else
#endif
val = *(u32*)(_BE_env.biosmem_base + addr - 0xC0000);
}
val = *(u32*)(_BE_env.biosmem_base + addr - 0xC0000);
}
else if (addr >= 0xA0000 && addr <= 0xFFFFF) {
#ifdef __BIG_ENDIAN__
if (addr & 0x3) {
addr -= 0xA0000;
val = ( readb(_BE_env.busmem_base, addr) |
(readb(_BE_env.busmem_base, addr + 1) << 8) |
(readb(_BE_env.busmem_base, addr + 2) << 16) |
(readb(_BE_env.busmem_base, addr + 3) << 24));
}
else
if (addr & 0x3) {
addr -= 0xA0000;
val = ( readb(_BE_env.busmem_base, addr) |
(readb(_BE_env.busmem_base, addr + 1) << 8) |
(readb(_BE_env.busmem_base, addr + 2) << 16) |
(readb(_BE_env.busmem_base, addr + 3) << 24));
}
else
#endif
val = readl(_BE_env.busmem_base, addr - 0xA0000);
}
val = readl(_BE_env.busmem_base, addr - 0xA0000);
}
else if (addr > M.mem_size - 4) {
DB( printk("mem_read: address %#lx out of range!\n", addr);)
HALT_SYS();
}
HALT_SYS();
}
else {
#ifdef __BIG_ENDIAN__
if (addr & 0x3) {
val = ( *(u8*)(M.mem_base + addr + 0) |
(*(u8*)(M.mem_base + addr + 1) << 8) |
(*(u8*)(M.mem_base + addr + 2) << 16) |
(*(u8*)(M.mem_base + addr + 3) << 24));
}
else
if (addr & 0x3) {
val = ( *(u8*)(M.mem_base + addr + 0) |
(*(u8*)(M.mem_base + addr + 1) << 8) |
(*(u8*)(M.mem_base + addr + 2) << 16) |
(*(u8*)(M.mem_base + addr + 3) << 24));
}
else
#endif
val = *(u32*)(M.mem_base + addr);
}
val = *(u32*)(M.mem_base + addr);
}
DB( if (DEBUG_MEM())
printk("%#08x 4 -> %#x\n", addr, val);)
printk("%#08x 4 -> %#x\n", addr, val);)
return val;
}
@@ -228,20 +228,20 @@ void X86API BE_wrb(
u8 val)
{
DB( if (DEBUG_MEM())
printk("%#08x 1 <- %#x\n", addr, val);)
printk("%#08x 1 <- %#x\n", addr, val);)
if (addr >= 0xC0000 && addr <= _BE_env.biosmem_limit) {
*(u8*)(_BE_env.biosmem_base + addr - 0xC0000) = val;
}
*(u8*)(_BE_env.biosmem_base + addr - 0xC0000) = val;
}
else if (addr >= 0xA0000 && addr <= 0xFFFFF) {
writeb(val, _BE_env.busmem_base, addr - 0xA0000);
}
writeb(val, _BE_env.busmem_base, addr - 0xA0000);
}
else if (addr > M.mem_size-1) {
DB( printk("mem_write: address %#lx out of range!\n", addr);)
HALT_SYS();
}
HALT_SYS();
}
else {
*(u8*)(M.mem_base + addr) = val;
}
*(u8*)(M.mem_base + addr) = val;
}
}
/****************************************************************************
@@ -258,43 +258,43 @@ void X86API BE_wrw(
u16 val)
{
DB( if (DEBUG_MEM())
printk("%#08x 2 <- %#x\n", addr, val);)
printk("%#08x 2 <- %#x\n", addr, val);)
if (addr >= 0xC0000 && addr <= _BE_env.biosmem_limit) {
#ifdef __BIG_ENDIAN__
if (addr & 0x1) {
addr -= 0xC0000;
*(u8*)(_BE_env.biosmem_base + addr + 0) = (val >> 0) & 0xff;
*(u8*)(_BE_env.biosmem_base + addr + 1) = (val >> 8) & 0xff;
}
else
if (addr & 0x1) {
addr -= 0xC0000;
*(u8*)(_BE_env.biosmem_base + addr + 0) = (val >> 0) & 0xff;
*(u8*)(_BE_env.biosmem_base + addr + 1) = (val >> 8) & 0xff;
}
else
#endif
*(u16*)(_BE_env.biosmem_base + addr - 0xC0000) = val;
}
*(u16*)(_BE_env.biosmem_base + addr - 0xC0000) = val;
}
else if (addr >= 0xA0000 && addr <= 0xFFFFF) {
#ifdef __BIG_ENDIAN__
if (addr & 0x1) {
addr -= 0xA0000;
writeb(val >> 0, _BE_env.busmem_base, addr);
writeb(val >> 8, _BE_env.busmem_base, addr + 1);
}
else
if (addr & 0x1) {
addr -= 0xA0000;
writeb(val >> 0, _BE_env.busmem_base, addr);
writeb(val >> 8, _BE_env.busmem_base, addr + 1);
}
else
#endif
writew(val, _BE_env.busmem_base, addr - 0xA0000);
}
writew(val, _BE_env.busmem_base, addr - 0xA0000);
}
else if (addr > M.mem_size-2) {
DB( printk("mem_write: address %#lx out of range!\n", addr);)
HALT_SYS();
}
HALT_SYS();
}
else {
#ifdef __BIG_ENDIAN__
if (addr & 0x1) {
*(u8*)(M.mem_base + addr + 0) = (val >> 0) & 0xff;
*(u8*)(M.mem_base + addr + 1) = (val >> 8) & 0xff;
}
else
if (addr & 0x1) {
*(u8*)(M.mem_base + addr + 0) = (val >> 0) & 0xff;
*(u8*)(M.mem_base + addr + 1) = (val >> 8) & 0xff;
}
else
#endif
*(u16*)(M.mem_base + addr) = val;
}
*(u16*)(M.mem_base + addr) = val;
}
}
/****************************************************************************
@@ -311,49 +311,49 @@ void X86API BE_wrl(
u32 val)
{
DB( if (DEBUG_MEM())
printk("%#08x 4 <- %#x\n", addr, val);)
printk("%#08x 4 <- %#x\n", addr, val);)
if (addr >= 0xC0000 && addr <= _BE_env.biosmem_limit) {
#ifdef __BIG_ENDIAN__
if (addr & 0x1) {
addr -= 0xC0000;
*(u8*)(M.mem_base + addr + 0) = (val >> 0) & 0xff;
*(u8*)(M.mem_base + addr + 1) = (val >> 8) & 0xff;
*(u8*)(M.mem_base + addr + 2) = (val >> 16) & 0xff;
*(u8*)(M.mem_base + addr + 3) = (val >> 24) & 0xff;
}
else
if (addr & 0x1) {
addr -= 0xC0000;
*(u8*)(M.mem_base + addr + 0) = (val >> 0) & 0xff;
*(u8*)(M.mem_base + addr + 1) = (val >> 8) & 0xff;
*(u8*)(M.mem_base + addr + 2) = (val >> 16) & 0xff;
*(u8*)(M.mem_base + addr + 3) = (val >> 24) & 0xff;
}
else
#endif
*(u32*)(M.mem_base + addr - 0xC0000) = val;
}
*(u32*)(M.mem_base + addr - 0xC0000) = val;
}
else if (addr >= 0xA0000 && addr <= 0xFFFFF) {
#ifdef __BIG_ENDIAN__
if (addr & 0x3) {
addr -= 0xA0000;
writeb(val >> 0, _BE_env.busmem_base, addr);
writeb(val >> 8, _BE_env.busmem_base, addr + 1);
writeb(val >> 16, _BE_env.busmem_base, addr + 1);
writeb(val >> 24, _BE_env.busmem_base, addr + 1);
}
else
if (addr & 0x3) {
addr -= 0xA0000;
writeb(val >> 0, _BE_env.busmem_base, addr);
writeb(val >> 8, _BE_env.busmem_base, addr + 1);
writeb(val >> 16, _BE_env.busmem_base, addr + 1);
writeb(val >> 24, _BE_env.busmem_base, addr + 1);
}
else
#endif
writel(val, _BE_env.busmem_base, addr - 0xA0000);
}
writel(val, _BE_env.busmem_base, addr - 0xA0000);
}
else if (addr > M.mem_size-4) {
DB( printk("mem_write: address %#lx out of range!\n", addr);)
HALT_SYS();
}
HALT_SYS();
}
else {
#ifdef __BIG_ENDIAN__
if (addr & 0x1) {
*(u8*)(M.mem_base + addr + 0) = (val >> 0) & 0xff;
*(u8*)(M.mem_base + addr + 1) = (val >> 8) & 0xff;
*(u8*)(M.mem_base + addr + 2) = (val >> 16) & 0xff;
*(u8*)(M.mem_base + addr + 3) = (val >> 24) & 0xff;
}
else
if (addr & 0x1) {
*(u8*)(M.mem_base + addr + 0) = (val >> 0) & 0xff;
*(u8*)(M.mem_base + addr + 1) = (val >> 8) & 0xff;
*(u8*)(M.mem_base + addr + 2) = (val >> 16) & 0xff;
*(u8*)(M.mem_base + addr + 3) = (val >> 24) & 0xff;
}
else
#endif
*(u32*)(M.mem_base + addr) = val;
}
*(u32*)(M.mem_base + addr) = val;
}
}
/* Debug functions to do ISA/PCI bus port I/O */
@@ -365,7 +365,7 @@ u8 X86API BE_inb(int port)
{
u8 val = PM_inpb(port);
if (DEBUG_IO())
printk("%04X:%04X: inb.%04X -> %02X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
printk("%04X:%04X: inb.%04X -> %02X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
return val;
}
@@ -373,7 +373,7 @@ u16 X86API BE_inw(int port)
{
u16 val = PM_inpw(port);
if (DEBUG_IO())
printk("%04X:%04X: inw.%04X -> %04X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
printk("%04X:%04X: inw.%04X -> %04X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
return val;
}
@@ -381,28 +381,28 @@ u32 X86API BE_inl(int port)
{
u32 val = PM_inpd(port);
if (DEBUG_IO())
printk("%04X:%04X: inl.%04X -> %08X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
printk("%04X:%04X: inl.%04X -> %08X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
return val;
}
void X86API BE_outb(int port, u8 val)
{
if (DEBUG_IO())
printk("%04X:%04X: outb.%04X <- %02X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
printk("%04X:%04X: outb.%04X <- %02X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
PM_outpb(port,val);
}
void X86API BE_outw(int port, u16 val)
{
if (DEBUG_IO())
printk("%04X:%04X: outw.%04X <- %04X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
printk("%04X:%04X: outw.%04X <- %04X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
PM_outpw(port,val);
}
void X86API BE_outl(int port, u32 val)
{
if (DEBUG_IO())
printk("%04X:%04X: outl.%04X <- %08X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
printk("%04X:%04X: outl.%04X <- %08X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
PM_outpd(port,val);
}
#endif

View File

@@ -50,9 +50,9 @@ static void X86API undefined_intr(
int intno)
{
if (BE_rdw(intno * 4 + 2) == BIOS_SEG)
printk("biosEmu: undefined interrupt %xh called!\n",intno);
printk("biosEmu: undefined interrupt %xh called!\n",intno);
else
X86EMU_prepareForInt(intno);
X86EMU_prepareForInt(intno);
}
/****************************************************************************
@@ -68,26 +68,26 @@ static void X86API int42(
int intno)
{
if (M.x86.R_AH == 0x12 && M.x86.R_BL == 0x32) {
if (M.x86.R_AL == 0) {
/* Enable CPU accesses to video memory */
PM_outpb(0x3c2, PM_inpb(0x3cc) | (u8)0x02);
return;
}
else if (M.x86.R_AL == 1) {
/* Disable CPU accesses to video memory */
PM_outpb(0x3c2, PM_inpb(0x3cc) & (u8)~0x02);
return;
}
if (M.x86.R_AL == 0) {
/* Enable CPU accesses to video memory */
PM_outpb(0x3c2, PM_inpb(0x3cc) | (u8)0x02);
return;
}
else if (M.x86.R_AL == 1) {
/* Disable CPU accesses to video memory */
PM_outpb(0x3c2, PM_inpb(0x3cc) & (u8)~0x02);
return;
}
#ifdef DEBUG
else {
printk("biosEmu/bios.int42: unknown function AH=0x12, BL=0x32, AL=%#02x\n",M.x86.R_AL);
}
else {
printk("biosEmu/bios.int42: unknown function AH=0x12, BL=0x32, AL=%#02x\n",M.x86.R_AL);
}
#endif
}
}
#ifdef DEBUG
else {
printk("biosEmu/bios.int42: unknown function AH=%#02x, AL=%#02x, BL=%#02x\n",M.x86.R_AH, M.x86.R_AL, M.x86.R_BL);
}
printk("biosEmu/bios.int42: unknown function AH=%#02x, AL=%#02x, BL=%#02x\n",M.x86.R_AH, M.x86.R_AL, M.x86.R_BL);
}
#endif
}
@@ -106,9 +106,9 @@ static void X86API int10(
int intno)
{
if (BE_rdw(intno * 4 + 2) == BIOS_SEG)
int42(intno);
int42(intno);
else
X86EMU_prepareForInt(intno);
X86EMU_prepareForInt(intno);
}
/* Result codes returned by the PCI BIOS */
@@ -142,87 +142,87 @@ static void X86API int1A(
/* Fail if no PCI device information has been registered */
if (!_BE_env.vgaInfo.pciInfo)
return;
return;
pciSlot = (u16)(_BE_env.vgaInfo.pciInfo->slot.i >> 8);
switch (M.x86.R_AX) {
case 0xB101: /* PCI bios present? */
M.x86.R_AL = 0x00; /* no config space/special cycle generation support */
M.x86.R_EDX = 0x20494350; /* " ICP" */
M.x86.R_BX = 0x0210; /* Version 2.10 */
M.x86.R_CL = 0; /* Max bus number in system */
CLEAR_FLAG(F_CF);
break;
case 0xB102: /* Find PCI device */
M.x86.R_AH = DEVICE_NOT_FOUND;
if (M.x86.R_DX == _BE_env.vgaInfo.pciInfo->VendorID &&
M.x86.R_CX == _BE_env.vgaInfo.pciInfo->DeviceID &&
M.x86.R_SI == 0) {
M.x86.R_AH = SUCCESSFUL;
M.x86.R_BX = pciSlot;
}
CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
break;
case 0xB103: /* Find PCI class code */
M.x86.R_AH = DEVICE_NOT_FOUND;
if (M.x86.R_CL == _BE_env.vgaInfo.pciInfo->Interface &&
M.x86.R_CH == _BE_env.vgaInfo.pciInfo->SubClass &&
(u8)(M.x86.R_ECX >> 16) == _BE_env.vgaInfo.pciInfo->BaseClass) {
M.x86.R_AH = SUCCESSFUL;
M.x86.R_BX = pciSlot;
}
CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
break;
case 0xB108: /* Read configuration byte */
M.x86.R_AH = BAD_REGISTER_NUMBER;
if (M.x86.R_BX == pciSlot) {
M.x86.R_AH = SUCCESSFUL;
M.x86.R_CL = (u8)PCI_accessReg(M.x86.R_DI,0,PCI_READ_BYTE,_BE_env.vgaInfo.pciInfo);
}
CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
break;
case 0xB109: /* Read configuration word */
M.x86.R_AH = BAD_REGISTER_NUMBER;
if (M.x86.R_BX == pciSlot) {
M.x86.R_AH = SUCCESSFUL;
M.x86.R_CX = (u16)PCI_accessReg(M.x86.R_DI,0,PCI_READ_WORD,_BE_env.vgaInfo.pciInfo);
}
CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
break;
case 0xB10A: /* Read configuration dword */
M.x86.R_AH = BAD_REGISTER_NUMBER;
if (M.x86.R_BX == pciSlot) {
M.x86.R_AH = SUCCESSFUL;
M.x86.R_ECX = (u32)PCI_accessReg(M.x86.R_DI,0,PCI_READ_DWORD,_BE_env.vgaInfo.pciInfo);
}
CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
break;
case 0xB10B: /* Write configuration byte */
M.x86.R_AH = BAD_REGISTER_NUMBER;
if (M.x86.R_BX == pciSlot) {
M.x86.R_AH = SUCCESSFUL;
PCI_accessReg(M.x86.R_DI,M.x86.R_CL,PCI_WRITE_BYTE,_BE_env.vgaInfo.pciInfo);
}
CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
break;
case 0xB10C: /* Write configuration word */
M.x86.R_AH = BAD_REGISTER_NUMBER;
if (M.x86.R_BX == pciSlot) {
M.x86.R_AH = SUCCESSFUL;
PCI_accessReg(M.x86.R_DI,M.x86.R_CX,PCI_WRITE_WORD,_BE_env.vgaInfo.pciInfo);
}
CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
break;
case 0xB10D: /* Write configuration dword */
M.x86.R_AH = BAD_REGISTER_NUMBER;
if (M.x86.R_BX == pciSlot) {
M.x86.R_AH = SUCCESSFUL;
PCI_accessReg(M.x86.R_DI,M.x86.R_ECX,PCI_WRITE_DWORD,_BE_env.vgaInfo.pciInfo);
}
CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
break;
default:
printk("biosEmu/bios.int1a: unknown function AX=%#04x\n", M.x86.R_AX);
}
case 0xB101: /* PCI bios present? */
M.x86.R_AL = 0x00; /* no config space/special cycle generation support */
M.x86.R_EDX = 0x20494350; /* " ICP" */
M.x86.R_BX = 0x0210; /* Version 2.10 */
M.x86.R_CL = 0; /* Max bus number in system */
CLEAR_FLAG(F_CF);
break;
case 0xB102: /* Find PCI device */
M.x86.R_AH = DEVICE_NOT_FOUND;
if (M.x86.R_DX == _BE_env.vgaInfo.pciInfo->VendorID &&
M.x86.R_CX == _BE_env.vgaInfo.pciInfo->DeviceID &&
M.x86.R_SI == 0) {
M.x86.R_AH = SUCCESSFUL;
M.x86.R_BX = pciSlot;
}
CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
break;
case 0xB103: /* Find PCI class code */
M.x86.R_AH = DEVICE_NOT_FOUND;
if (M.x86.R_CL == _BE_env.vgaInfo.pciInfo->Interface &&
M.x86.R_CH == _BE_env.vgaInfo.pciInfo->SubClass &&
(u8)(M.x86.R_ECX >> 16) == _BE_env.vgaInfo.pciInfo->BaseClass) {
M.x86.R_AH = SUCCESSFUL;
M.x86.R_BX = pciSlot;
}
CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
break;
case 0xB108: /* Read configuration byte */
M.x86.R_AH = BAD_REGISTER_NUMBER;
if (M.x86.R_BX == pciSlot) {
M.x86.R_AH = SUCCESSFUL;
M.x86.R_CL = (u8)PCI_accessReg(M.x86.R_DI,0,PCI_READ_BYTE,_BE_env.vgaInfo.pciInfo);
}
CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
break;
case 0xB109: /* Read configuration word */
M.x86.R_AH = BAD_REGISTER_NUMBER;
if (M.x86.R_BX == pciSlot) {
M.x86.R_AH = SUCCESSFUL;
M.x86.R_CX = (u16)PCI_accessReg(M.x86.R_DI,0,PCI_READ_WORD,_BE_env.vgaInfo.pciInfo);
}
CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
break;
case 0xB10A: /* Read configuration dword */
M.x86.R_AH = BAD_REGISTER_NUMBER;
if (M.x86.R_BX == pciSlot) {
M.x86.R_AH = SUCCESSFUL;
M.x86.R_ECX = (u32)PCI_accessReg(M.x86.R_DI,0,PCI_READ_DWORD,_BE_env.vgaInfo.pciInfo);
}
CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
break;
case 0xB10B: /* Write configuration byte */
M.x86.R_AH = BAD_REGISTER_NUMBER;
if (M.x86.R_BX == pciSlot) {
M.x86.R_AH = SUCCESSFUL;
PCI_accessReg(M.x86.R_DI,M.x86.R_CL,PCI_WRITE_BYTE,_BE_env.vgaInfo.pciInfo);
}
CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
break;
case 0xB10C: /* Write configuration word */
M.x86.R_AH = BAD_REGISTER_NUMBER;
if (M.x86.R_BX == pciSlot) {
M.x86.R_AH = SUCCESSFUL;
PCI_accessReg(M.x86.R_DI,M.x86.R_CX,PCI_WRITE_WORD,_BE_env.vgaInfo.pciInfo);
}
CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
break;
case 0xB10D: /* Write configuration dword */
M.x86.R_AH = BAD_REGISTER_NUMBER;
if (M.x86.R_BX == pciSlot) {
M.x86.R_AH = SUCCESSFUL;
PCI_accessReg(M.x86.R_DI,M.x86.R_ECX,PCI_WRITE_DWORD,_BE_env.vgaInfo.pciInfo);
}
CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
break;
default:
printk("biosEmu/bios.int1a: unknown function AX=%#04x\n", M.x86.R_AX);
}
}
/****************************************************************************
@@ -240,9 +240,9 @@ void _BE_bios_init(
X86EMU_intrFuncs bios_intr_tab[256];
for (i = 0; i < 256; ++i) {
intrTab[i] = BIOS_SEG << 16;
bios_intr_tab[i] = undefined_intr;
}
intrTab[i] = BIOS_SEG << 16;
bios_intr_tab[i] = undefined_intr;
}
bios_intr_tab[0x10] = int10;
bios_intr_tab[0x1A] = int1A;
bios_intr_tab[0x42] = int42;

View File

@@ -100,9 +100,9 @@ ibool PMAPI BE_init(
#endif
memset(&M,0,sizeof(M));
if (memSize < 20480)
PM_fatalError("Emulator requires at least 20Kb of memory!\n");
PM_fatalError("Emulator requires at least 20Kb of memory!\n");
if ((M.mem_base = (unsigned long)malloc(memSize)) == NULL)
PM_fatalError("Out of memory!");
PM_fatalError("Out of memory!");
M.mem_size = memSize;
_BE_env.busmem_base = (ulong)PM_mapPhysicalAddr(0xA0000,0x5FFFF,true);
M.x86.debug = debugFlags;
@@ -144,15 +144,15 @@ void PMAPI BE_setVGA(
_BE_env.vgaInfo.pciInfo = info->pciInfo;
_BE_env.vgaInfo.BIOSImage = info->BIOSImage;
if (info->BIOSImage) {
_BE_env.biosmem_base = (ulong)info->BIOSImage;
_BE_env.biosmem_limit = 0xC0000 + info->BIOSImageLen-1;
}
_BE_env.biosmem_base = (ulong)info->BIOSImage;
_BE_env.biosmem_limit = 0xC0000 + info->BIOSImageLen-1;
}
else {
_BE_env.biosmem_base = _BE_env.busmem_base + 0x20000;
_BE_env.biosmem_limit = 0xC7FFF;
}
_BE_env.biosmem_base = _BE_env.busmem_base + 0x20000;
_BE_env.biosmem_limit = 0xC7FFF;
}
if (*((u32*)info->LowMem) == 0)
_BE_bios_init((u32*)info->LowMem);
_BE_bios_init((u32*)info->LowMem);
memcpy((u8*)M.mem_base,info->LowMem,sizeof(info->LowMem));
}
@@ -182,8 +182,8 @@ This function maps a real mode pointer in the emulator memory to a protected
mode pointer that can be used to directly access the memory.
NOTE: The memory is *always* in little endian format, son on non-x86
systems you will need to do endian translations to access this
memory.
systems you will need to do endian translations to access this
memory.
****************************************************************************/
void * PMAPI BE_mapRealPointer(
uint r_seg,
@@ -192,11 +192,11 @@ void * PMAPI BE_mapRealPointer(
u32 addr = ((u32)r_seg << 4) + r_off;
if (addr >= 0xC0000 && addr <= _BE_env.biosmem_limit) {
return (void*)(_BE_env.biosmem_base + addr - 0xC0000);
}
return (void*)(_BE_env.biosmem_base + addr - 0xC0000);
}
else if (addr >= 0xA0000 && addr <= 0xFFFFF) {
return (void*)(_BE_env.busmem_base + addr - 0xA0000);
}
return (void*)(_BE_env.busmem_base + addr - 0xA0000);
}
return (void*)(M.mem_base + addr);
}
@@ -213,8 +213,8 @@ and located at 15Kb into the start of the real mode memory (16Kb is where
we put the real mode code we execute for issuing interrupts).
NOTE: The memory is *always* in little endian format, son on non-x86
systems you will need to do endian translations to access this
memory.
systems you will need to do endian translations to access this
memory.
****************************************************************************/
void * PMAPI BE_getVESABuf(
uint *len,
@@ -416,28 +416,28 @@ BE_exports * _CEXPORT BE_initLibrary(
PM_imports *pmImp)
{
static BE_exports _BE_exports = {
sizeof(BE_exports),
BE_init,
BE_setVGA,
BE_getVGA,
BE_mapRealPointer,
BE_getVESABuf,
BE_callRealMode,
BE_int86,
BE_int86x,
NULL,
BE_exit,
};
sizeof(BE_exports),
BE_init,
BE_setVGA,
BE_getVGA,
BE_mapRealPointer,
BE_getVESABuf,
BE_callRealMode,
BE_int86,
BE_int86x,
NULL,
BE_exit,
};
int i,max;
ulong *p;
// Initialize all default imports to point to fatal error handler
// for upwards compatibility.
/* Initialize all default imports to point to fatal error handler */
/* for upwards compatibility. */
max = sizeof(_PM_imports)/sizeof(BE_initLibrary_t);
for (i = 0,p = (ulong*)&_PM_imports; i < max; i++)
*p++ = (ulong)_PM_fatalErrorHandler;
*p++ = (ulong)_PM_fatalErrorHandler;
// Now copy all our imported functions
/* Now copy all our imported functions */
memcpy(&_PM_imports,pmImp,MIN(sizeof(_PM_imports),pmImp->dwSize));
return &_BE_exports;
}

View File

@@ -112,16 +112,16 @@ static ulong PCI_findBIOSAddr(
int bar;
for (bar = 0x10; bar <= 0x14; bar++) {
base = PCI_readPCIRegL(bar,device) & ~0xFF;
if (!(base & 0x1)) {
PCI_writePCIRegL(bar,0xFFFFFFFF,device);
size = PCI_readPCIRegL(bar,device) & ~0xFF;
size = ~size+1;
PCI_writePCIRegL(bar,0,device);
if (size >= MAX_BIOSLEN)
return base;
}
}
base = PCI_readPCIRegL(bar,device) & ~0xFF;
if (!(base & 0x1)) {
PCI_writePCIRegL(bar,0xFFFFFFFF,device);
size = PCI_readPCIRegL(bar,device) & ~0xFF;
size = ~size+1;
PCI_writePCIRegL(bar,0,device);
if (size >= MAX_BIOSLEN)
return base;
}
}
return 0;
}
@@ -138,13 +138,13 @@ static void _PCI_fixupSecondaryBARs(void)
int i;
for (i = 0; i < NumDevices; i++) {
PCI_writePCIRegL(0x10,PCI[DeviceIndex[i]].BaseAddress10,i);
PCI_writePCIRegL(0x14,PCI[DeviceIndex[i]].BaseAddress14,i);
PCI_writePCIRegL(0x18,PCI[DeviceIndex[i]].BaseAddress18,i);
PCI_writePCIRegL(0x1C,PCI[DeviceIndex[i]].BaseAddress1C,i);
PCI_writePCIRegL(0x20,PCI[DeviceIndex[i]].BaseAddress20,i);
PCI_writePCIRegL(0x24,PCI[DeviceIndex[i]].BaseAddress24,i);
}
PCI_writePCIRegL(0x10,PCI[DeviceIndex[i]].BaseAddress10,i);
PCI_writePCIRegL(0x14,PCI[DeviceIndex[i]].BaseAddress14,i);
PCI_writePCIRegL(0x18,PCI[DeviceIndex[i]].BaseAddress18,i);
PCI_writePCIRegL(0x1C,PCI[DeviceIndex[i]].BaseAddress1C,i);
PCI_writePCIRegL(0x20,PCI[DeviceIndex[i]].BaseAddress20,i);
PCI_writePCIRegL(0x24,PCI[DeviceIndex[i]].BaseAddress24,i);
}
}
/****************************************************************************
@@ -165,29 +165,29 @@ static void PCI_doBIOSPOST(
RMREGS regs;
RMSREGS sregs;
// Determine the value to store in AX for BIOS POST
/* Determine the value to store in AX for BIOS POST */
regs.x.ax = (u16)(PCI[DeviceIndex[device]].slot.i >> 8);
if (useV86) {
// Post the BIOS using the PM functions (ie: v86 mode on Linux)
if (!PM_doBIOSPOST(regs.x.ax,BIOSPhysAddr,mappedBIOS,BIOSLen)) {
// If the PM function fails, this probably means are we are on
// DOS and can't re-map the real mode 0xC0000 region. In thise
// case if the device is the primary, we can use the real
// BIOS at 0xC0000 directly.
if (device == 0)
PM_doBIOSPOST(regs.x.ax,0xC0000,mappedBIOS,BIOSLen);
}
}
/* Post the BIOS using the PM functions (ie: v86 mode on Linux) */
if (!PM_doBIOSPOST(regs.x.ax,BIOSPhysAddr,mappedBIOS,BIOSLen)) {
/* If the PM function fails, this probably means are we are on */
/* DOS and can't re-map the real mode 0xC0000 region. In thise */
/* case if the device is the primary, we can use the real */
/* BIOS at 0xC0000 directly. */
if (device == 0)
PM_doBIOSPOST(regs.x.ax,0xC0000,mappedBIOS,BIOSLen);
}
}
else {
// Setup the X86 emulator for the VGA BIOS
BE_setVGA(&VGAInfo[device]);
/* Setup the X86 emulator for the VGA BIOS */
BE_setVGA(&VGAInfo[device]);
// Execute the BIOS POST code
BE_callRealMode(0xC000,0x0003,&regs,&sregs);
/* Execute the BIOS POST code */
BE_callRealMode(0xC000,0x0003,&regs,&sregs);
// Cleanup and exit
BE_getVGA(&VGAInfo[device]);
}
/* Cleanup and exit */
BE_getVGA(&VGAInfo[device]);
}
}
/****************************************************************************
@@ -206,113 +206,113 @@ static ibool PCI_postControllers(void)
char filename[_MAX_PATH];
FILE *f;
// Disable the primary display controller and AGP VGA pass-through
/* Disable the primary display controller and AGP VGA pass-through */
DISABLE_DEVICE(0);
if (AGPBridge)
DISABLE_AGP_VGA();
DISABLE_AGP_VGA();
// Now POST all the secondary controllers
/* Now POST all the secondary controllers */
for (device = 0; device < NumDevices; device++) {
// Skip the device if it is not enabled (probably an ISA device)
if (DeviceIndex[device] == -1)
continue;
/* Skip the device if it is not enabled (probably an ISA device) */
if (DeviceIndex[device] == -1)
continue;
// Enable secondary display controller. If the secondary controller
// is on the AGP bus, then enable VGA resources for the AGP device.
ENABLE_DEVICE(device);
if (AGPBridge && AGPBridge->SecondayBusNumber == PCI[DeviceIndex[device]].slot.p.Bus)
ENABLE_AGP_VGA();
/* Enable secondary display controller. If the secondary controller */
/* is on the AGP bus, then enable VGA resources for the AGP device. */
ENABLE_DEVICE(device);
if (AGPBridge && AGPBridge->SecondayBusNumber == PCI[DeviceIndex[device]].slot.p.Bus)
ENABLE_AGP_VGA();
// Check if the controller has already been POST'ed
if (VGA_NOT_ACTIVE()) {
// Find a viable place to map the secondary PCI BIOS image and map it
printk("Device %d not enabled, so attempting warm boot it\n", device);
/* Check if the controller has already been POST'ed */
if (VGA_NOT_ACTIVE()) {
/* Find a viable place to map the secondary PCI BIOS image and map it */
printk("Device %d not enabled, so attempting warm boot it\n", device);
// For AGP devices (and PCI devices that do have the ROM base
// address zero'ed out) we have to map the BIOS to a location
// that is passed by the AGP bridge to the bus. Some AGP devices
// have the ROM base address already set up for us, and some
// do not (we map to one of the existing BAR locations in
// this case).
mappedBIOS = NULL;
if (PCI[DeviceIndex[device]].ROMBaseAddress != 0)
mappedBIOSPhys = PCI[DeviceIndex[device]].ROMBaseAddress & ~0xF;
else
mappedBIOSPhys = PCI_findBIOSAddr(device);
printk("Mapping BIOS image to 0x%08X\n", mappedBIOSPhys);
mappedBIOS = PM_mapPhysicalAddr(mappedBIOSPhys,MAX_BIOSLEN-1,false);
PCI_writePCIRegL(0x30,mappedBIOSPhys | 0x1,device);
BIOSImageLen = mappedBIOS[2] * 512;
if ((copyOfBIOS = malloc(BIOSImageLen)) == NULL)
return false;
memcpy(copyOfBIOS,mappedBIOS,BIOSImageLen);
PM_freePhysicalAddr(mappedBIOS,MAX_BIOSLEN-1);
/* For AGP devices (and PCI devices that do have the ROM base */
/* address zero'ed out) we have to map the BIOS to a location */
/* that is passed by the AGP bridge to the bus. Some AGP devices */
/* have the ROM base address already set up for us, and some */
/* do not (we map to one of the existing BAR locations in */
/* this case). */
mappedBIOS = NULL;
if (PCI[DeviceIndex[device]].ROMBaseAddress != 0)
mappedBIOSPhys = PCI[DeviceIndex[device]].ROMBaseAddress & ~0xF;
else
mappedBIOSPhys = PCI_findBIOSAddr(device);
printk("Mapping BIOS image to 0x%08X\n", mappedBIOSPhys);
mappedBIOS = PM_mapPhysicalAddr(mappedBIOSPhys,MAX_BIOSLEN-1,false);
PCI_writePCIRegL(0x30,mappedBIOSPhys | 0x1,device);
BIOSImageLen = mappedBIOS[2] * 512;
if ((copyOfBIOS = malloc(BIOSImageLen)) == NULL)
return false;
memcpy(copyOfBIOS,mappedBIOS,BIOSImageLen);
PM_freePhysicalAddr(mappedBIOS,MAX_BIOSLEN-1);
// Allocate memory to store copy of BIOS from secondary controllers
VGAInfo[device].pciInfo = &PCI[DeviceIndex[device]];
VGAInfo[device].BIOSImage = copyOfBIOS;
VGAInfo[device].BIOSImageLen = BIOSImageLen;
/* Allocate memory to store copy of BIOS from secondary controllers */
VGAInfo[device].pciInfo = &PCI[DeviceIndex[device]];
VGAInfo[device].BIOSImage = copyOfBIOS;
VGAInfo[device].BIOSImageLen = BIOSImageLen;
// Restore device mappings
PCI_writePCIRegL(0x30,PCI[DeviceIndex[device]].ROMBaseAddress,device);
PCI_writePCIRegL(0x10,PCI[DeviceIndex[device]].BaseAddress10,device);
PCI_writePCIRegL(0x14,PCI[DeviceIndex[device]].BaseAddress14,device);
/* Restore device mappings */
PCI_writePCIRegL(0x30,PCI[DeviceIndex[device]].ROMBaseAddress,device);
PCI_writePCIRegL(0x10,PCI[DeviceIndex[device]].BaseAddress10,device);
PCI_writePCIRegL(0x14,PCI[DeviceIndex[device]].BaseAddress14,device);
// Now execute the BIOS POST for the device
if (copyOfBIOS[0] == 0x55 && copyOfBIOS[1] == 0xAA) {
printk("Executing BIOS POST for controller.\n");
PCI_doBIOSPOST(device,mappedBIOSPhys,copyOfBIOS,BIOSImageLen);
}
/* Now execute the BIOS POST for the device */
if (copyOfBIOS[0] == 0x55 && copyOfBIOS[1] == 0xAA) {
printk("Executing BIOS POST for controller.\n");
PCI_doBIOSPOST(device,mappedBIOSPhys,copyOfBIOS,BIOSImageLen);
}
// Reset the size of the BIOS image to the final size
VGAInfo[device].BIOSImageLen = FINAL_BIOSLEN;
/* Reset the size of the BIOS image to the final size */
VGAInfo[device].BIOSImageLen = FINAL_BIOSLEN;
// Save the BIOS and interrupt vector information to disk
sprintf(filename,"%s/bios.%02d",PM_getNucleusConfigPath(),device);
if ((f = fopen(filename,"wb")) != NULL) {
fwrite(copyOfBIOS,1,FINAL_BIOSLEN,f);
fwrite(VGAInfo[device].LowMem,1,sizeof(VGAInfo[device].LowMem),f);
fclose(f);
}
}
else {
// Allocate memory to store copy of BIOS from secondary controllers
if ((copyOfBIOS = malloc(FINAL_BIOSLEN)) == NULL)
return false;
VGAInfo[device].pciInfo = &PCI[DeviceIndex[device]];
VGAInfo[device].BIOSImage = copyOfBIOS;
VGAInfo[device].BIOSImageLen = FINAL_BIOSLEN;
/* Save the BIOS and interrupt vector information to disk */
sprintf(filename,"%s/bios.%02d",PM_getNucleusConfigPath(),device);
if ((f = fopen(filename,"wb")) != NULL) {
fwrite(copyOfBIOS,1,FINAL_BIOSLEN,f);
fwrite(VGAInfo[device].LowMem,1,sizeof(VGAInfo[device].LowMem),f);
fclose(f);
}
}
else {
/* Allocate memory to store copy of BIOS from secondary controllers */
if ((copyOfBIOS = malloc(FINAL_BIOSLEN)) == NULL)
return false;
VGAInfo[device].pciInfo = &PCI[DeviceIndex[device]];
VGAInfo[device].BIOSImage = copyOfBIOS;
VGAInfo[device].BIOSImageLen = FINAL_BIOSLEN;
// Load the BIOS and interrupt vector information from disk
sprintf(filename,"%s/bios.%02d",PM_getNucleusConfigPath(),device);
if ((f = fopen(filename,"rb")) != NULL) {
fread(copyOfBIOS,1,FINAL_BIOSLEN,f);
fread(VGAInfo[device].LowMem,1,sizeof(VGAInfo[device].LowMem),f);
fclose(f);
}
}
/* Load the BIOS and interrupt vector information from disk */
sprintf(filename,"%s/bios.%02d",PM_getNucleusConfigPath(),device);
if ((f = fopen(filename,"rb")) != NULL) {
fread(copyOfBIOS,1,FINAL_BIOSLEN,f);
fread(VGAInfo[device].LowMem,1,sizeof(VGAInfo[device].LowMem),f);
fclose(f);
}
}
// Fix up all the secondary PCI base address registers
// (restores them all from the values we read previously)
_PCI_fixupSecondaryBARs();
/* Fix up all the secondary PCI base address registers */
/* (restores them all from the values we read previously) */
_PCI_fixupSecondaryBARs();
// Disable the secondary controller and AGP VGA pass-through
DISABLE_DEVICE(device);
if (AGPBridge)
DISABLE_AGP_VGA();
}
/* Disable the secondary controller and AGP VGA pass-through */
DISABLE_DEVICE(device);
if (AGPBridge)
DISABLE_AGP_VGA();
}
// Reenable primary display controller and reset AGP bridge control
/* Reenable primary display controller and reset AGP bridge control */
if (AGPBridge)
RESTORE_AGP_VGA();
RESTORE_AGP_VGA();
ENABLE_DEVICE(0);
// Free physical BIOS image mapping
/* Free physical BIOS image mapping */
PM_freePhysicalAddr(mappedBIOS,MAX_BIOSLEN-1);
// Restore the X86 emulator BIOS info to primary controller
/* Restore the X86 emulator BIOS info to primary controller */
if (!useV86)
BE_setVGA(&VGAInfo[0]);
BE_setVGA(&VGAInfo[0]);
return true;
}
@@ -327,123 +327,123 @@ static void EnumeratePCI(void)
PCIBridgeInfo *info;
printk("Displaying enumeration of PCI bus (%d devices, %d display devices)\n",
NumPCI, NumDevices);
NumPCI, NumDevices);
for (index = 0; index < NumDevices; index++)
printk(" Display device %d is PCI device %d\n",index,DeviceIndex[index]);
printk(" Display device %d is PCI device %d\n",index,DeviceIndex[index]);
printk("\n");
printk("Bus Slot Fnc DeviceID SubSystem Rev Class IRQ Int Cmd\n");
for (i = 0; i < NumPCI; i++) {
printk("%2d %2d %2d %04X:%04X %04X:%04X %02X %02X:%02X %02X %02X %04X ",
PCI[i].slot.p.Bus,
PCI[i].slot.p.Device,
PCI[i].slot.p.Function,
PCI[i].VendorID,
PCI[i].DeviceID,
PCI[i].SubSystemVendorID,
PCI[i].SubSystemID,
PCI[i].RevID,
PCI[i].BaseClass,
PCI[i].SubClass,
PCI[i].InterruptLine,
PCI[i].InterruptPin,
PCI[i].Command);
for (index = 0; index < NumDevices; index++) {
if (DeviceIndex[index] == i)
break;
}
if (index < NumDevices)
printk("<- %d\n", index);
else
printk("\n");
}
printk("%2d %2d %2d %04X:%04X %04X:%04X %02X %02X:%02X %02X %02X %04X ",
PCI[i].slot.p.Bus,
PCI[i].slot.p.Device,
PCI[i].slot.p.Function,
PCI[i].VendorID,
PCI[i].DeviceID,
PCI[i].SubSystemVendorID,
PCI[i].SubSystemID,
PCI[i].RevID,
PCI[i].BaseClass,
PCI[i].SubClass,
PCI[i].InterruptLine,
PCI[i].InterruptPin,
PCI[i].Command);
for (index = 0; index < NumDevices; index++) {
if (DeviceIndex[index] == i)
break;
}
if (index < NumDevices)
printk("<- %d\n", index);
else
printk("\n");
}
printk("\n");
printk("DeviceID Stat Ifc Cch Lat Hdr BIST\n");
for (i = 0; i < NumPCI; i++) {
printk("%04X:%04X %04X %02X %02X %02X %02X %02X ",
PCI[i].VendorID,
PCI[i].DeviceID,
PCI[i].Status,
PCI[i].Interface,
PCI[i].CacheLineSize,
PCI[i].LatencyTimer,
PCI[i].HeaderType,
PCI[i].BIST);
for (index = 0; index < NumDevices; index++) {
if (DeviceIndex[index] == i)
break;
}
if (index < NumDevices)
printk("<- %d\n", index);
else
printk("\n");
}
printk("%04X:%04X %04X %02X %02X %02X %02X %02X ",
PCI[i].VendorID,
PCI[i].DeviceID,
PCI[i].Status,
PCI[i].Interface,
PCI[i].CacheLineSize,
PCI[i].LatencyTimer,
PCI[i].HeaderType,
PCI[i].BIST);
for (index = 0; index < NumDevices; index++) {
if (DeviceIndex[index] == i)
break;
}
if (index < NumDevices)
printk("<- %d\n", index);
else
printk("\n");
}
printk("\n");
printk("DeviceID Base10h Base14h Base18h Base1Ch Base20h Base24h ROMBase\n");
for (i = 0; i < NumPCI; i++) {
printk("%04X:%04X %08X %08X %08X %08X %08X %08X %08X ",
PCI[i].VendorID,
PCI[i].DeviceID,
PCI[i].BaseAddress10,
PCI[i].BaseAddress14,
PCI[i].BaseAddress18,
PCI[i].BaseAddress1C,
PCI[i].BaseAddress20,
PCI[i].BaseAddress24,
PCI[i].ROMBaseAddress);
for (index = 0; index < NumDevices; index++) {
if (DeviceIndex[index] == i)
break;
}
if (index < NumDevices)
printk("<- %d\n", index);
else
printk("\n");
}
printk("%04X:%04X %08X %08X %08X %08X %08X %08X %08X ",
PCI[i].VendorID,
PCI[i].DeviceID,
PCI[i].BaseAddress10,
PCI[i].BaseAddress14,
PCI[i].BaseAddress18,
PCI[i].BaseAddress1C,
PCI[i].BaseAddress20,
PCI[i].BaseAddress24,
PCI[i].ROMBaseAddress);
for (index = 0; index < NumDevices; index++) {
if (DeviceIndex[index] == i)
break;
}
if (index < NumDevices)
printk("<- %d\n", index);
else
printk("\n");
}
printk("\n");
printk("DeviceID BAR10Len BAR14Len BAR18Len BAR1CLen BAR20Len BAR24Len ROMLen\n");
for (i = 0; i < NumPCI; i++) {
printk("%04X:%04X %08X %08X %08X %08X %08X %08X %08X ",
PCI[i].VendorID,
PCI[i].DeviceID,
PCI[i].BaseAddress10Len,
PCI[i].BaseAddress14Len,
PCI[i].BaseAddress18Len,
PCI[i].BaseAddress1CLen,
PCI[i].BaseAddress20Len,
PCI[i].BaseAddress24Len,
PCI[i].ROMBaseAddressLen);
for (index = 0; index < NumDevices; index++) {
if (DeviceIndex[index] == i)
break;
}
if (index < NumDevices)
printk("<- %d\n", index);
else
printk("\n");
}
printk("%04X:%04X %08X %08X %08X %08X %08X %08X %08X ",
PCI[i].VendorID,
PCI[i].DeviceID,
PCI[i].BaseAddress10Len,
PCI[i].BaseAddress14Len,
PCI[i].BaseAddress18Len,
PCI[i].BaseAddress1CLen,
PCI[i].BaseAddress20Len,
PCI[i].BaseAddress24Len,
PCI[i].ROMBaseAddressLen);
for (index = 0; index < NumDevices; index++) {
if (DeviceIndex[index] == i)
break;
}
if (index < NumDevices)
printk("<- %d\n", index);
else
printk("\n");
}
printk("\n");
printk("Displaying enumeration of %d bridge devices\n",NumBridges);
printk("\n");
printk("DeviceID P# S# B# IOB IOL MemBase MemLimit PreBase PreLimit Ctrl\n");
for (i = 0; i < NumBridges; i++) {
info = (PCIBridgeInfo*)&PCI[BridgeIndex[i]];
printk("%04X:%04X %02X %02X %02X %04X %04X %08X %08X %08X %08X %04X\n",
info->VendorID,
info->DeviceID,
info->PrimaryBusNumber,
info->SecondayBusNumber,
info->SubordinateBusNumber,
((u16)info->IOBase << 8) & 0xF000,
info->IOLimit ?
((u16)info->IOLimit << 8) | 0xFFF : 0,
((u32)info->MemoryBase << 16) & 0xFFF00000,
info->MemoryLimit ?
((u32)info->MemoryLimit << 16) | 0xFFFFF : 0,
((u32)info->PrefetchableMemoryBase << 16) & 0xFFF00000,
info->PrefetchableMemoryLimit ?
((u32)info->PrefetchableMemoryLimit << 16) | 0xFFFFF : 0,
info->BridgeControl);
}
info = (PCIBridgeInfo*)&PCI[BridgeIndex[i]];
printk("%04X:%04X %02X %02X %02X %04X %04X %08X %08X %08X %08X %04X\n",
info->VendorID,
info->DeviceID,
info->PrimaryBusNumber,
info->SecondayBusNumber,
info->SubordinateBusNumber,
((u16)info->IOBase << 8) & 0xF000,
info->IOLimit ?
((u16)info->IOLimit << 8) | 0xFFF : 0,
((u32)info->MemoryBase << 16) & 0xFFF00000,
info->MemoryLimit ?
((u32)info->MemoryLimit << 16) | 0xFFFFF : 0,
((u32)info->PrefetchableMemoryBase << 16) & 0xFFF00000,
info->PrefetchableMemoryLimit ?
((u32)info->PrefetchableMemoryLimit << 16) | 0xFFFFF : 0,
info->BridgeControl);
}
printk("\n");
}
@@ -460,51 +460,51 @@ static int PCI_enumerateDevices(void)
int i,j;
PCIBridgeInfo *info;
// If this is the first time we have been called, enumerate all
// devices on the PCI bus.
/* If this is the first time we have been called, enumerate all */
/* devices on the PCI bus. */
if (NumPCI == -1) {
for (i = 0; i < MAX_PCI_DEVICES; i++)
PCI[i].dwSize = sizeof(PCI[i]);
if ((NumPCI = PCI_enumerate(PCI,MAX_PCI_DEVICES)) == 0)
return -1;
for (i = 0; i < MAX_PCI_DEVICES; i++)
PCI[i].dwSize = sizeof(PCI[i]);
if ((NumPCI = PCI_enumerate(PCI,MAX_PCI_DEVICES)) == 0)
return -1;
// Build a list of all PCI bridge devices
for (i = 0,NumBridges = 0,BridgeIndex[0] = -1; i < NumPCI; i++) {
if (PCI[i].BaseClass == PCI_BRIDGE_CLASS) {
if (NumBridges < MAX_PCI_DEVICES)
BridgeIndex[NumBridges++] = i;
}
}
/* Build a list of all PCI bridge devices */
for (i = 0,NumBridges = 0,BridgeIndex[0] = -1; i < NumPCI; i++) {
if (PCI[i].BaseClass == PCI_BRIDGE_CLASS) {
if (NumBridges < MAX_PCI_DEVICES)
BridgeIndex[NumBridges++] = i;
}
}
// Now build a list of all display class devices
for (i = 0,NumDevices = 1,DeviceIndex[0] = -1; i < NumPCI; i++) {
if (PCI_IS_DISPLAY_CLASS(&PCI[i])) {
if ((PCI[i].Command & 0x3) == 0x3) {
DeviceIndex[0] = i;
}
else {
if (NumDevices < MAX_PCI_DEVICES)
DeviceIndex[NumDevices++] = i;
}
if (PCI[i].slot.p.Bus != 0) {
// This device is on a different bus than the primary
// PCI bus, so it is probably an AGP device. Find the
// AGP bus device that controls that bus so we can
// control it.
for (j = 0; j < NumBridges; j++) {
info = (PCIBridgeInfo*)&PCI[BridgeIndex[j]];
if (info->SecondayBusNumber == PCI[i].slot.p.Bus) {
AGPBridge = info;
break;
}
}
}
}
}
/* Now build a list of all display class devices */
for (i = 0,NumDevices = 1,DeviceIndex[0] = -1; i < NumPCI; i++) {
if (PCI_IS_DISPLAY_CLASS(&PCI[i])) {
if ((PCI[i].Command & 0x3) == 0x3) {
DeviceIndex[0] = i;
}
else {
if (NumDevices < MAX_PCI_DEVICES)
DeviceIndex[NumDevices++] = i;
}
if (PCI[i].slot.p.Bus != 0) {
/* This device is on a different bus than the primary */
/* PCI bus, so it is probably an AGP device. Find the */
/* AGP bus device that controls that bus so we can */
/* control it. */
for (j = 0; j < NumBridges; j++) {
info = (PCIBridgeInfo*)&PCI[BridgeIndex[j]];
if (info->SecondayBusNumber == PCI[i].slot.p.Bus) {
AGPBridge = info;
break;
}
}
}
}
}
// Enumerate all PCI and bridge devices to log file
EnumeratePCI();
}
/* Enumerate all PCI and bridge devices to log file */
EnumeratePCI();
}
return NumDevices;
}
@@ -522,48 +522,48 @@ void printk(const char *fmt, ...)
int main(int argc,char *argv[])
{
while (argc > 1) {
if (stricmp(argv[1],"-usev86") == 0) {
useV86 = true;
}
else if (stricmp(argv[1],"-force") == 0) {
forcePost = true;
}
if (stricmp(argv[1],"-usev86") == 0) {
useV86 = true;
}
else if (stricmp(argv[1],"-force") == 0) {
forcePost = true;
}
#ifdef DEBUG
else if (stricmp(argv[1],"-decode") == 0) {
debugFlags |= DEBUG_DECODE_F;
}
else if (stricmp(argv[1],"-iotrace") == 0) {
debugFlags |= DEBUG_IO_TRACE_F;
}
else if (stricmp(argv[1],"-decode") == 0) {
debugFlags |= DEBUG_DECODE_F;
}
else if (stricmp(argv[1],"-iotrace") == 0) {
debugFlags |= DEBUG_IO_TRACE_F;
}
#endif
else {
printf("Usage: warmboot [-usev86] [-force] [-decode] [-iotrace]\n");
exit(-1);
}
argc--;
argv++;
}
else {
printf("Usage: warmboot [-usev86] [-force] [-decode] [-iotrace]\n");
exit(-1);
}
argc--;
argv++;
}
if ((logfile = fopen("warmboot.log","w")) == NULL)
exit(1);
exit(1);
PM_init();
if (!useV86) {
// Initialise the x86 BIOS emulator
BE_init(false,debugFlags,65536,&VGAInfo[0]);
}
/* Initialise the x86 BIOS emulator */
BE_init(false,debugFlags,65536,&VGAInfo[0]);
}
// Enumerate all devices (which POST's them at the same time)
/* Enumerate all devices (which POST's them at the same time) */
if (PCI_enumerateDevices() < 1) {
printk("No PCI display devices found!\n");
return -1;
}
printk("No PCI display devices found!\n");
return -1;
}
// Post all the display controller BIOS'es
/* Post all the display controller BIOS'es */
PCI_postControllers();
// Cleanup and exit the emulator
/* Cleanup and exit the emulator */
if (!useV86)
BE_exit();
BE_exit();
fclose(logfile);
return 0;
}

View File

@@ -70,7 +70,7 @@ Nucleus loader library.
ibool NAPI GA_TimerInit(void)
{
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
haveRDTSC = true;
haveRDTSC = true;
return true;
}
@@ -82,11 +82,11 @@ void NAPI GA_TimerRead(
GA_largeInteger *value)
{
if (haveRDTSC)
_GA_readTimeStamp(value);
_GA_readTimeStamp(value);
else {
struct timeval t;
gettimeofday(&t, NULL);
value->low = t.tv_sec*1000000 + t.tv_usec;
value->high = 0;
}
struct timeval t;
gettimeofday(&t, NULL);
value->low = t.tv_sec*1000000 + t.tv_usec;
value->high = 0;
}
}

View File

@@ -49,7 +49,7 @@ Nucleus loader library.
ibool NAPI GA_TimerInit(void)
{
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
return true;
return true;
return false;
}

View File

@@ -100,35 +100,35 @@ static ibool LoadDriver(void)
/* Check if we have already loaded the driver */
if (loaded)
return true;
return true;
PM_init();
_AA_exports.dwSize = sizeof(_AA_exports);
/* Open the BPD file */
if (!PM_findBPD(DLL_NAME,bpdpath))
return false;
return false;
strcpy(filename,bpdpath);
strcat(filename,DLL_NAME);
if ((hModBPD = PE_loadLibrary(filename,false)) == NULL)
return false;
return false;
if ((AA_initLibrary = (AA_initLibrary_t)PE_getProcAddress(hModBPD,"_AA_initLibrary")) == NULL)
return false;
return false;
bpdpath[strlen(bpdpath)-1] = 0;
if (strcmp(bpdpath,PM_getNucleusPath()) == 0)
strcpy(bpdpath,PM_getNucleusConfigPath());
strcpy(bpdpath,PM_getNucleusConfigPath());
else {
PM_backslash(bpdpath);
strcat(bpdpath,"config");
}
PM_backslash(bpdpath);
strcat(bpdpath,"config");
}
if ((aaExp = AA_initLibrary(bpdpath,filename,&_PM_imports,&_N_imports,&_AA_imports)) == NULL)
PM_fatalError("AA_initLibrary failed!\n");
PM_fatalError("AA_initLibrary failed!\n");
/* Initialize all default imports to point to fatal error handler
* for upwards compatibility, and copy the exported functions.
*/
max = sizeof(_AA_exports)/sizeof(AA_initLibrary_t);
for (i = 0,p = (ulong*)&_AA_exports; i < max; i++)
*p++ = (ulong)_AA_fatalErrorHandler;
*p++ = (ulong)_AA_fatalErrorHandler;
memcpy(&_AA_exports,aaExp,MIN(sizeof(_AA_exports),aaExp->dwSize));
loaded = true;
return true;
@@ -143,7 +143,7 @@ static ibool LoadDriver(void)
int NAPI AA_status(void)
{
if (!loaded)
return nDriverNotFound;
return nDriverNotFound;
return _AA_exports.AA_status();
}
@@ -152,7 +152,7 @@ const char * NAPI AA_errorMsg(
N_int32 status)
{
if (!loaded)
return "Unable to load Nucleus device driver!";
return "Unable to load Nucleus device driver!";
return _AA_exports.AA_errorMsg(status);
}
@@ -160,7 +160,7 @@ const char * NAPI AA_errorMsg(
int NAPI AA_getDaysLeft(void)
{
if (!LoadDriver())
return -1;
return -1;
return _AA_exports.AA_getDaysLeft();
}
@@ -168,7 +168,7 @@ int NAPI AA_getDaysLeft(void)
int NAPI AA_registerLicense(uchar *license)
{
if (!LoadDriver())
return 0;
return 0;
return _AA_exports.AA_registerLicense(license);
}
@@ -176,7 +176,7 @@ int NAPI AA_registerLicense(uchar *license)
int NAPI AA_enumerateDevices(void)
{
if (!LoadDriver())
return 0;
return 0;
return _AA_exports.AA_enumerateDevices();
}
@@ -184,7 +184,7 @@ int NAPI AA_enumerateDevices(void)
AA_devCtx * NAPI AA_loadDriver(N_int32 deviceIndex)
{
if (!LoadDriver())
return NULL;
return NULL;
return _AA_exports.AA_loadDriver(deviceIndex);
}
#endif
@@ -211,15 +211,15 @@ void NAPI _OS_delay(
LZTimerObject tm;
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) {
if (!inited) {
ZTimerInit();
inited = true;
}
LZTimerOnExt(&tm);
while (LZTimerLapExt(&tm) < microSeconds)
;
LZTimerOnExt(&tm);
}
if (!inited) {
ZTimerInit();
inited = true;
}
LZTimerOnExt(&tm);
while (LZTimerLapExt(&tm) < microSeconds)
;
LZTimerOnExt(&tm);
}
else
_OS_delay8253(microSeconds);
_OS_delay8253(microSeconds);
}

View File

@@ -72,7 +72,7 @@ Nucleus loader library.
ibool NAPI GA_TimerInit(void)
{
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
haveRDTSC = true;
haveRDTSC = true;
return true;
}
@@ -84,11 +84,11 @@ void NAPI GA_TimerRead(
GA_largeInteger *value)
{
if (haveRDTSC)
_GA_readTimeStamp(value);
_GA_readTimeStamp(value);
else {
struct timeval t;
gettimeofday(&t, NULL);
value->low = t.tv_sec*1000000 + t.tv_usec;
value->high = 0;
}
struct timeval t;
gettimeofday(&t, NULL);
value->low = t.tv_sec*1000000 + t.tv_usec;
value->high = 0;
}
}

View File

@@ -65,25 +65,25 @@ GA_sharedInfo * NAPI GA_getSharedInfo(
/* Open our helper device driver */
if (DosOpen(PMHELP_NAME,&hSDDHelp,&result,0,0,
FILE_OPEN, OPEN_SHARE_DENYNONE | OPEN_ACCESS_READWRITE,
NULL))
PM_fatalError("Unable to open SDDHELP$ helper device driver!");
FILE_OPEN, OPEN_SHARE_DENYNONE | OPEN_ACCESS_READWRITE,
NULL))
PM_fatalError("Unable to open SDDHELP$ helper device driver!");
outLen = sizeof(result);
DosDevIOCtl(hSDDHelp,PMHELP_IOCTL,PMHELP_GETSHAREDINFO,
NULL, 0, NULL,
&result, outLen, &outLen);
NULL, 0, NULL,
&result, outLen, &outLen);
DosClose(hSDDHelp);
if (result) {
/* We have found the shared Nucleus packet. Because not all processes
* map to SDDPMI.DLL, we need to ensure that we connect to this
* DLL so that it gets mapped into our address space (that is
* where the shared Nucleus packet is located). Simply doing a
* DosLoadModule on it is enough for this.
*/
HMODULE hModSDDPMI;
char buf[80];
DosLoadModule((PSZ)buf,sizeof(buf),(PSZ)"SDDPMI.DLL",&hModSDDPMI);
}
/* We have found the shared Nucleus packet. Because not all processes
* map to SDDPMI.DLL, we need to ensure that we connect to this
* DLL so that it gets mapped into our address space (that is
* where the shared Nucleus packet is located). Simply doing a
* DosLoadModule on it is enough for this.
*/
HMODULE hModSDDPMI;
char buf[80];
DosLoadModule((PSZ)buf,sizeof(buf),(PSZ)"SDDPMI.DLL",&hModSDDPMI);
}
return (GA_sharedInfo*)result;
}
@@ -106,7 +106,7 @@ Nucleus loader library.
ibool NAPI GA_TimerInit(void)
{
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
haveRDTSC = true;
haveRDTSC = true;
return true;
}
@@ -118,7 +118,7 @@ void NAPI GA_TimerRead(
GA_largeInteger *value)
{
if (haveRDTSC)
_GA_readTimeStamp(value);
_GA_readTimeStamp(value);
else
DosTmrQueryTime((QWORD*)value);
DosTmrQueryTime((QWORD*)value);
}

View File

@@ -72,7 +72,7 @@ Nucleus loader library.
ibool NAPI GA_TimerInit(void)
{
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
haveRDTSC = true;
haveRDTSC = true;
return true;
}
@@ -84,12 +84,12 @@ void NAPI GA_TimerRead(
GA_largeInteger *value)
{
if (haveRDTSC)
_GA_readTimeStamp(value);
_GA_readTimeStamp(value);
else {
struct timespec ts;
struct timespec ts;
clock_gettime(CLOCK_REALTIME, &ts);
value->low = (ts.tv_nsec / 1000 + ts.tv_sec * 1000000);
value->high = 0;
}
clock_gettime(CLOCK_REALTIME, &ts);
value->low = (ts.tv_nsec / 1000 + ts.tv_sec * 1000000);
value->high = 0;
}
}

View File

@@ -71,9 +71,9 @@ Nucleus loader library.
ibool NAPI GA_TimerInit(void)
{
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) {
haveRDTSC = true;
return true;
}
haveRDTSC = true;
return true;
}
return false;
}
@@ -85,5 +85,5 @@ void NAPI GA_TimerRead(
GA_largeInteger *value)
{
if (haveRDTSC)
_GA_readTimeStamp(value);
_GA_readTimeStamp(value);
}

View File

@@ -68,7 +68,7 @@ Nucleus loader library.
ibool NAPI GA_TimerInit(void)
{
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
return true;
return true;
return false;
}

View File

@@ -71,8 +71,8 @@ Nucleus loader library.
ibool NAPI GA_TimerInit(void)
{
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) {
haveRDTSC = true;
}
haveRDTSC = true;
}
return true;
}
@@ -84,7 +84,7 @@ void NAPI GA_TimerRead(
GA_largeInteger *value)
{
if (haveRDTSC)
_GA_readTimeStamp(value);
_GA_readTimeStamp(value);
else
VTD_Get_Real_Time(&value->high,&value->low);
VTD_Get_Real_Time(&value->high,&value->low);
}

View File

@@ -75,9 +75,9 @@ GA_sharedInfo * NAPI GA_getSharedInfo(
PM_init();
inBuf[0] = device;
if (DeviceIoControl(_PM_hDevice, PMHELP_GETSHAREDINFO32, inBuf, sizeof(inBuf),
outBuf, sizeof(outBuf), &count, NULL)) {
return (GA_sharedInfo*)outBuf[0];
}
outBuf, sizeof(outBuf), &count, NULL)) {
return (GA_sharedInfo*)outBuf[0];
}
return NULL;
}
@@ -102,16 +102,16 @@ static ibool NAPI _GA_softStereoInit(
GA_devCtx *dc)
{
if (_PM_hDevice) {
DWORD inBuf[1]; /* Buffer to send data to VxD */
DWORD outBuf[1]; /* Buffer to receive data from VxD */
DWORD count; /* Count of bytes returned from VxD */
DWORD inBuf[1]; /* Buffer to send data to VxD */
DWORD outBuf[1]; /* Buffer to receive data from VxD */
DWORD count; /* Count of bytes returned from VxD */
inBuf[0] = (ulong)dc;
if (DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOINIT32, inBuf, sizeof(inBuf),
outBuf, sizeof(outBuf), &count, NULL)) {
return outBuf[0];
}
}
inBuf[0] = (ulong)dc;
if (DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOINIT32, inBuf, sizeof(inBuf),
outBuf, sizeof(outBuf), &count, NULL)) {
return outBuf[0];
}
}
return false;
}
@@ -122,9 +122,9 @@ This function turns on software stereo mode, either directly or via the VxD.
static void NAPI _GA_softStereoOn(void)
{
if (_PM_hDevice) {
DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOON32, NULL, 0,
NULL, 0, NULL, NULL);
}
DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOON32, NULL, 0,
NULL, 0, NULL, NULL);
}
}
/****************************************************************************
@@ -137,14 +137,14 @@ static void NAPI _GA_softStereoScheduleFlip(
N_uint32 rightAddr)
{
if (_PM_hDevice) {
DWORD inBuf[2]; /* Buffer to send data to VxD */
DWORD count; /* Count of bytes returned from VxD */
DWORD inBuf[2]; /* Buffer to send data to VxD */
DWORD count; /* Count of bytes returned from VxD */
inBuf[0] = (ulong)leftAddr;
inBuf[1] = (ulong)rightAddr;
DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOFLIP32, inBuf, sizeof(inBuf),
NULL, 0, &count, NULL);
}
inBuf[0] = (ulong)leftAddr;
inBuf[1] = (ulong)rightAddr;
DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOFLIP32, inBuf, sizeof(inBuf),
NULL, 0, &count, NULL);
}
}
/****************************************************************************
@@ -154,14 +154,14 @@ This function turns off software stereo mode, either directly or via the VxD.
static N_int32 NAPI _GA_softStereoGetFlipStatus(void)
{
if (_PM_hDevice) {
DWORD outBuf[1]; /* Buffer to receive data from VxD */
DWORD count; /* Count of bytes returned from VxD */
DWORD outBuf[1]; /* Buffer to receive data from VxD */
DWORD count; /* Count of bytes returned from VxD */
if (DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOFLIPSTATUS32, NULL, 0,
outBuf, sizeof(outBuf), &count, NULL)) {
return outBuf[0];
}
}
if (DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOFLIPSTATUS32, NULL, 0,
outBuf, sizeof(outBuf), &count, NULL)) {
return outBuf[0];
}
}
return 0;
}
@@ -172,7 +172,7 @@ This function turns off software stereo mode, either directly or via the VxD.
static void NAPI _GA_softStereoWaitTillFlipped(void)
{
while (!_GA_softStereoGetFlipStatus())
;
;
}
/****************************************************************************
@@ -182,9 +182,9 @@ This function turns off software stereo mode, either directly or via the VxD.
static void NAPI _GA_softStereoOff(void)
{
if (_PM_hDevice) {
DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOOFF32, NULL, 0,
NULL, 0, NULL, NULL);
}
DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOOFF32, NULL, 0,
NULL, 0, NULL, NULL);
}
}
/****************************************************************************
@@ -195,9 +195,9 @@ the VxD.
static void NAPI _GA_softStereoExit(void)
{
if (_PM_hDevice) {
DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOEXIT32, NULL, 0,
NULL, 0, NULL, NULL);
}
DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOEXIT32, NULL, 0,
NULL, 0, NULL, NULL);
}
}
/****************************************************************************
@@ -217,14 +217,14 @@ static GA_devCtx * NAPI _GA_loadDriver(
N_int32 totalMemory = 0,oldIOPL;
if (deviceIndex >= GA_MAX_DEVICES)
PM_fatalError("DeviceIndex too large in GA_loadDriver!");
PM_fatalError("DeviceIndex too large in GA_loadDriver!");
PM_init();
inBuf[0] = deviceIndex;
if (DeviceIoControl(_PM_hDevice, PMHELP_GETMEMSIZE32,
inBuf, sizeof(inBuf), outBuf, sizeof(outBuf), NULL, NULL))
totalMemory = outBuf[0];
inBuf, sizeof(inBuf), outBuf, sizeof(outBuf), NULL, NULL))
totalMemory = outBuf[0];
if (totalMemory == 0)
totalMemory = 8192;
totalMemory = 8192;
_GA_exports.GA_forceMemSize(totalMemory,shared);
oldIOPL = PM_setIOPL(3);
dc = ORG_GA_loadDriver(deviceIndex,shared);
@@ -240,13 +240,13 @@ Nucleus loader library.
ibool NAPI GA_TimerInit(void)
{
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) {
haveRDTSC = true;
return true;
}
haveRDTSC = true;
return true;
}
else if (QueryPerformanceFrequency((LARGE_INTEGER*)&countFreq)) {
haveRDTSC = false;
return true;
}
haveRDTSC = false;
return true;
}
return false;
}
@@ -258,7 +258,7 @@ void NAPI GA_TimerRead(
GA_largeInteger *value)
{
if (haveRDTSC)
_GA_readTimeStamp(value);
_GA_readTimeStamp(value);
else
QueryPerformanceCounter((LARGE_INTEGER*)value);
QueryPerformanceCounter((LARGE_INTEGER*)value);
}

View File

@@ -88,31 +88,31 @@ static ibool LoadDriver(void)
/* Check if we have already loaded the driver */
if (loaded)
return true;
return true;
PM_init();
/* Open the BPD file */
if (!PM_findBPD(DLL_NAME,bpdpath))
return false;
return false;
strcpy(filename,bpdpath);
strcat(filename,DLL_NAME);
if ((hModBPD = PE_loadLibrary(filename,false)) == NULL)
return false;
return false;
if ((AGP_initLibrary = (AGP_initLibrary_t)PE_getProcAddress(hModBPD,"_AGP_initLibrary")) == NULL)
return false;
return false;
bpdpath[strlen(bpdpath)-1] = 0;
if (strcmp(bpdpath,PM_getNucleusPath()) == 0)
strcpy(bpdpath,PM_getNucleusConfigPath());
strcpy(bpdpath,PM_getNucleusConfigPath());
else {
PM_backslash(bpdpath);
strcat(bpdpath,"config");
}
PM_backslash(bpdpath);
strcat(bpdpath,"config");
}
if ((agpExp = AGP_initLibrary(bpdpath,filename,GA_getSystemPMImports(),&_N_imports,&_AGP_imports)) == NULL)
PM_fatalError("AGP_initLibrary failed!\n");
PM_fatalError("AGP_initLibrary failed!\n");
_AGP_exports.dwSize = sizeof(_AGP_exports);
max = sizeof(_AGP_exports)/sizeof(AGP_initLibrary_t);
for (i = 0,p = (ulong*)&_AGP_exports; i < max; i++)
*p++ = (ulong)_AGP_fatalErrorHandler;
*p++ = (ulong)_AGP_fatalErrorHandler;
memcpy(&_AGP_exports,agpExp,MIN(sizeof(_AGP_exports),agpExp->dwSize));
loaded = true;
return true;
@@ -127,7 +127,7 @@ static ibool LoadDriver(void)
int NAPI AGP_status(void)
{
if (!loaded)
return nDriverNotFound;
return nDriverNotFound;
return _AGP_exports.AGP_status();
}
@@ -136,7 +136,7 @@ const char * NAPI AGP_errorMsg(
N_int32 status)
{
if (!loaded)
return "Unable to load Nucleus device driver!";
return "Unable to load Nucleus device driver!";
return _AGP_exports.AGP_errorMsg(status);
}
@@ -144,7 +144,7 @@ const char * NAPI AGP_errorMsg(
AGP_devCtx * NAPI AGP_loadDriver(N_int32 deviceIndex)
{
if (!LoadDriver())
return NULL;
return NULL;
return _AGP_exports.AGP_loadDriver(deviceIndex);
}
@@ -153,7 +153,7 @@ void NAPI AGP_unloadDriver(
AGP_devCtx *dc)
{
if (loaded)
_AGP_exports.AGP_unloadDriver(dc);
_AGP_exports.AGP_unloadDriver(dc);
}
/* {secret} */
@@ -161,7 +161,7 @@ void NAPI AGP_getGlobalOptions(
AGP_globalOptions *options)
{
if (LoadDriver())
_AGP_exports.AGP_getGlobalOptions(options);
_AGP_exports.AGP_getGlobalOptions(options);
}
/* {secret} */
@@ -169,7 +169,7 @@ void NAPI AGP_setGlobalOptions(
AGP_globalOptions *options)
{
if (LoadDriver())
_AGP_exports.AGP_setGlobalOptions(options);
_AGP_exports.AGP_setGlobalOptions(options);
}
/* {secret} */
@@ -177,7 +177,7 @@ void NAPI AGP_saveGlobalOptions(
AGP_globalOptions *options)
{
if (loaded)
_AGP_exports.AGP_saveGlobalOptions(options);
_AGP_exports.AGP_saveGlobalOptions(options);
}
#endif
@@ -197,24 +197,23 @@ void NAPI _OS_delay(
if (!inited) {
#ifndef __WIN32_VXD__
// This has been causing problems in VxD's for some reason, so for now
// we avoid using it.
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) {
ZTimerInit();
haveRDTSC = true;
}
else
/* This has been causing problems in VxD's for some reason, so for now */
/* we avoid using it. */
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) {
ZTimerInit();
haveRDTSC = true;
}
else
#endif
haveRDTSC = false;
inited = true;
}
haveRDTSC = false;
inited = true;
}
if (haveRDTSC) {
LZTimerOnExt(&tm);
while (LZTimerLapExt(&tm) < microSeconds)
;
LZTimerOnExt(&tm);
}
LZTimerOnExt(&tm);
while (LZTimerLapExt(&tm) < microSeconds)
;
LZTimerOnExt(&tm);
}
else
_OS_delay8253(microSeconds);
_OS_delay8253(microSeconds);
}

View File

@@ -60,19 +60,19 @@ void _EXPORT CenterWindow(HWND hWndCenter, HWND parent, BOOL repaint)
CenterY = ((RectParent.bottom - RectParent.top) - Height) / 2;
if ((CenterX < 0) || (CenterY < 0)) {
/* The Center Window is smaller than the parent window. */
if (hWndParent != GetDesktopWindow()) {
/* If the parent window is not the desktop use the desktop size. */
CenterX = (GetSystemMetrics(SM_CXSCREEN) - Width) / 2;
CenterY = (GetSystemMetrics(SM_CYSCREEN) - Height) / 2;
}
CenterX = (CenterX < 0) ? 0: CenterX;
CenterY = (CenterY < 0) ? 0: CenterY;
}
/* The Center Window is smaller than the parent window. */
if (hWndParent != GetDesktopWindow()) {
/* If the parent window is not the desktop use the desktop size. */
CenterX = (GetSystemMetrics(SM_CXSCREEN) - Width) / 2;
CenterY = (GetSystemMetrics(SM_CYSCREEN) - Height) / 2;
}
CenterX = (CenterX < 0) ? 0: CenterX;
CenterY = (CenterY < 0) ? 0: CenterY;
}
else {
CenterX += RectParent.left;
CenterY += RectParent.top;
}
CenterX += RectParent.left;
CenterY += RectParent.top;
}
/* Copy the values into RectCenter */
RectCenter.left = CenterX;
@@ -82,8 +82,8 @@ void _EXPORT CenterWindow(HWND hWndCenter, HWND parent, BOOL repaint)
/* Move the window to the new location */
MoveWindow(hWndCenter, RectCenter.left, RectCenter.top,
(RectCenter.right - RectCenter.left),
(RectCenter.bottom - RectCenter.top), repaint);
(RectCenter.right - RectCenter.left),
(RectCenter.bottom - RectCenter.top), repaint);
}
void _EXPORT CenterLogo(HWND hWndLogo, HWND hWndParent, int CenterY)
@@ -117,7 +117,6 @@ void _EXPORT CenterLogo(HWND hWndLogo, HWND hWndParent, int CenterY)
/* Move the window to the new location */
MoveWindow(hWndLogo, RectCenter.left, RectCenter.top,
(RectCenter.right - RectCenter.left),
(RectCenter.bottom - RectCenter.top), false);
(RectCenter.right - RectCenter.left),
(RectCenter.bottom - RectCenter.top), false);
}

View File

@@ -106,49 +106,49 @@ int getcmdopt(
char *formatchar;
if (argc > nextargv) {
if (nextchar == NULL) {
nextchar = argv[nextargv]; /* Index next argument */
if (nextchar == NULL) {
nextargv++;
return ALLDONE; /* No more options */
}
if (IS_NOT_SWITCH_CHAR(*nextchar)) {
nextchar = NULL;
return PARAMETER; /* We have a parameter */
}
nextchar++; /* Move past switch operator */
if (IS_SWITCH_CHAR(*nextchar)) {
nextchar = NULL;
return INVALID; /* Ignore rest of line */
}
}
if ((ch = *(nextchar++)) == 0) {
nextchar = NULL;
return INVALID; /* No options on line */
}
if (nextchar == NULL) {
nextchar = argv[nextargv]; /* Index next argument */
if (nextchar == NULL) {
nextargv++;
return ALLDONE; /* No more options */
}
if (IS_NOT_SWITCH_CHAR(*nextchar)) {
nextchar = NULL;
return PARAMETER; /* We have a parameter */
}
nextchar++; /* Move past switch operator */
if (IS_SWITCH_CHAR(*nextchar)) {
nextchar = NULL;
return INVALID; /* Ignore rest of line */
}
}
if ((ch = *(nextchar++)) == 0) {
nextchar = NULL;
return INVALID; /* No options on line */
}
if (ch == ':' || (formatchar = strchr(format, ch)) == NULL)
return INVALID;
if (ch == ':' || (formatchar = strchr(format, ch)) == NULL)
return INVALID;
if (*(++formatchar) == ':') { /* Expect an argument after option */
nextargv++;
if (*nextchar == 0) {
if (argc <= nextargv)
return INVALID;
nextchar = argv[nextargv++];
}
*argument = nextchar;
nextchar = NULL;
}
else { /* We have a switch style option */
if (*nextchar == 0) {
nextargv++;
nextchar = NULL;
}
*argument = NULL;
}
return ch; /* return the option specifier */
}
if (*(++formatchar) == ':') { /* Expect an argument after option */
nextargv++;
if (*nextchar == 0) {
if (argc <= nextargv)
return INVALID;
nextchar = argv[nextargv++];
}
*argument = nextchar;
nextchar = NULL;
}
else { /* We have a switch style option */
if (*nextchar == 0) {
nextargv++;
nextchar = NULL;
}
*argument = NULL;
}
return ch; /* return the option specifier */
}
nextchar = NULL;
nextargv++;
return ALLDONE; /* no arguments on command line */
@@ -174,51 +174,51 @@ static int parse_option(
int num_read;
switch ((int)(optarr->type)) {
case OPT_INTEGER:
num_read = sscanf(argument,"%d",(int*)optarr->arg);
break;
case OPT_HEX:
num_read = sscanf(argument,"%x",(int*)optarr->arg);
break;
case OPT_OCTAL:
num_read = sscanf(argument,"%o",(int*)optarr->arg);
break;
case OPT_UNSIGNED:
num_read = sscanf(argument,"%u",(uint*)optarr->arg);
break;
case OPT_LINTEGER:
num_read = sscanf(argument,"%ld",(long*)optarr->arg);
break;
case OPT_LHEX:
num_read = sscanf(argument,"%lx",(long*)optarr->arg);
break;
case OPT_LOCTAL:
num_read = sscanf(argument,"%lo",(long*)optarr->arg);
break;
case OPT_LUNSIGNED:
num_read = sscanf(argument,"%lu",(ulong*)optarr->arg);
break;
case OPT_FLOAT:
num_read = sscanf(argument,"%f",(float*)optarr->arg);
break;
case OPT_DOUBLE:
num_read = sscanf(argument,"%lf",(double*)optarr->arg);
break;
case OPT_LDOUBLE:
num_read = sscanf(argument,"%Lf",(long double*)optarr->arg);
break;
case OPT_STRING:
num_read = 1; /* This always works */
*((char**)optarr->arg) = argument;
break;
default:
return INVALID;
}
case OPT_INTEGER:
num_read = sscanf(argument,"%d",(int*)optarr->arg);
break;
case OPT_HEX:
num_read = sscanf(argument,"%x",(int*)optarr->arg);
break;
case OPT_OCTAL:
num_read = sscanf(argument,"%o",(int*)optarr->arg);
break;
case OPT_UNSIGNED:
num_read = sscanf(argument,"%u",(uint*)optarr->arg);
break;
case OPT_LINTEGER:
num_read = sscanf(argument,"%ld",(long*)optarr->arg);
break;
case OPT_LHEX:
num_read = sscanf(argument,"%lx",(long*)optarr->arg);
break;
case OPT_LOCTAL:
num_read = sscanf(argument,"%lo",(long*)optarr->arg);
break;
case OPT_LUNSIGNED:
num_read = sscanf(argument,"%lu",(ulong*)optarr->arg);
break;
case OPT_FLOAT:
num_read = sscanf(argument,"%f",(float*)optarr->arg);
break;
case OPT_DOUBLE:
num_read = sscanf(argument,"%lf",(double*)optarr->arg);
break;
case OPT_LDOUBLE:
num_read = sscanf(argument,"%Lf",(long double*)optarr->arg);
break;
case OPT_STRING:
num_read = 1; /* This always works */
*((char**)optarr->arg) = argument;
break;
default:
return INVALID;
}
if (num_read == 0)
return INVALID;
return INVALID;
else
return ALLDONE;
return ALLDONE;
}
/****************************************************************************
@@ -261,8 +261,8 @@ int getargs(
int num_opt,
Option optarr[],
int (*do_param)(
char *param,
int num))
char *param,
int num))
{
int i,opt;
char *argument;
@@ -273,51 +273,51 @@ int getargs(
strcpy(cmdstr,"hH?");
for (i = 0,opt = 3; i < num_opt; i++,opt++) {
cmdstr[opt] = optarr[i].opt;
if (optarr[i].type != OPT_SWITCH) {
cmdstr[++opt] = ':';
}
}
cmdstr[opt] = optarr[i].opt;
if (optarr[i].type != OPT_SWITCH) {
cmdstr[++opt] = ':';
}
}
cmdstr[opt] = '\0';
for (;;) {
opt = getcmdopt(argc,argv,cmdstr,&argument);
switch (opt) {
case 'H':
case 'h':
case '?':
return HELP;
case ALLDONE:
return ALLDONE;
case INVALID:
return INVALID;
case PARAMETER:
if (do_param == NULL)
return INVALID;
if (do_param(argv[nextargv],param_num) == INVALID)
return INVALID;
nextargv++;
param_num++;
break;
default:
opt = getcmdopt(argc,argv,cmdstr,&argument);
switch (opt) {
case 'H':
case 'h':
case '?':
return HELP;
case ALLDONE:
return ALLDONE;
case INVALID:
return INVALID;
case PARAMETER:
if (do_param == NULL)
return INVALID;
if (do_param(argv[nextargv],param_num) == INVALID)
return INVALID;
nextargv++;
param_num++;
break;
default:
/* Search for the option in the option array. We are
* guaranteed to find it.
*/
/* Search for the option in the option array. We are
* guaranteed to find it.
*/
for (i = 0; i < num_opt; i++) {
if (optarr[i].opt == opt)
break;
}
if (optarr[i].type == OPT_SWITCH)
*((ibool*)optarr[i].arg) = true;
else {
if (parse_option(&optarr[i],argument) == INVALID)
return INVALID;
}
break;
}
}
for (i = 0; i < num_opt; i++) {
if (optarr[i].opt == opt)
break;
}
if (optarr[i].type == OPT_SWITCH)
*((ibool*)optarr[i].arg) = true;
else {
if (parse_option(&optarr[i],argument) == INVALID)
return INVALID;
}
break;
}
}
}
/****************************************************************************
@@ -340,11 +340,11 @@ void print_desc(
int i;
for (i = 0; i < num_opt; i++) {
if (optarr[i].type == OPT_SWITCH)
printf(" -%c %s\n",optarr[i].opt,optarr[i].desc);
else
printf(" -%c<arg> %s\n",optarr[i].opt,optarr[i].desc);
}
if (optarr[i].type == OPT_SWITCH)
printf(" -%c %s\n",optarr[i].opt,optarr[i].desc);
else
printf(" -%c<arg> %s\n",optarr[i].opt,optarr[i].desc);
}
}
/****************************************************************************
@@ -382,45 +382,45 @@ int parse_commandline(
argv[argc++] = filename;
cmdLine = strncpy(str, cmdLine, sizeof(str)-1);
while (*cmdLine) {
switch (*cmdLine) {
case '"' :
if (prevWord != NULL) {
if (inQuote) {
if (!noStrip)
*cmdLine = '\0';
argv [argc++] = prevWord;
prevWord = NULL;
}
else
noStrip = TRUE;
}
inQuote = !inQuote;
break;
case ' ' :
case '\t' :
if (!inQuote) {
if (prevWord != NULL) {
*cmdLine = '\0';
argv [argc++] = prevWord;
prevWord = NULL;
noStrip = FALSE;
}
}
break;
default :
if (prevWord == NULL)
prevWord = cmdLine;
break;
}
if (argc >= maxArgv - 1)
break;
cmdLine++;
}
switch (*cmdLine) {
case '"' :
if (prevWord != NULL) {
if (inQuote) {
if (!noStrip)
*cmdLine = '\0';
argv [argc++] = prevWord;
prevWord = NULL;
}
else
noStrip = TRUE;
}
inQuote = !inQuote;
break;
case ' ' :
case '\t' :
if (!inQuote) {
if (prevWord != NULL) {
*cmdLine = '\0';
argv [argc++] = prevWord;
prevWord = NULL;
noStrip = FALSE;
}
}
break;
default :
if (prevWord == NULL)
prevWord = cmdLine;
break;
}
if (argc >= maxArgv - 1)
break;
cmdLine++;
}
if ((prevWord != NULL || (inQuote && prevWord != NULL)) && argc < maxArgv - 1) {
*cmdLine = '\0';
argv [argc++] = prevWord;
}
*cmdLine = '\0';
argv [argc++] = prevWord;
}
argv[argc] = NULL;
/* Return updated parameters */

View File

@@ -70,10 +70,10 @@ library is used with the application local version of Nucleus.
****************************************************************************/
PM_imports * NAPI GA_getSystemPMImports(void)
{
// TODO: We may very well want to provide a system shared library
// that eports the PM functions required by the Nucleus library
// for BeOS here. That will eliminate fatal errors loading new
// drivers on BeOS!
/* TODO: We may very well want to provide a system shared library */
/* that eports the PM functions required by the Nucleus library */
/* for BeOS here. That will eliminate fatal errors loading new */
/* drivers on BeOS! */
return &_PM_imports;
}
@@ -124,7 +124,7 @@ Nucleus loader library.
ibool NAPI GA_TimerInit(void)
{
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
haveRDTSC = true;
haveRDTSC = true;
return true;
}
@@ -136,11 +136,11 @@ void NAPI GA_TimerRead(
GA_largeInteger *value)
{
if (haveRDTSC)
_GA_readTimeStamp(value);
_GA_readTimeStamp(value);
else {
struct timeval t;
gettimeofday(&t, NULL);
value->low = t.tv_sec*1000000 + t.tv_usec;
value->high = 0;
}
struct timeval t;
gettimeofday(&t, NULL);
value->low = t.tv_sec*1000000 + t.tv_usec;
value->high = 0;
}
}

View File

@@ -120,7 +120,7 @@ Nucleus loader library.
ibool NAPI GA_TimerInit(void)
{
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
return true;
return true;
return false;
}
@@ -133,4 +133,3 @@ void NAPI GA_TimerRead(
{
_GA_readTimeStamp(value);
}

View File

@@ -107,7 +107,7 @@ static ibool LoadDriver(
/* Check if we have already loaded the driver */
if (loaded)
return true;
return true;
PM_init();
/* First try to see if we can find the system wide shared exports
@@ -116,33 +116,33 @@ static ibool LoadDriver(
*/
__GA_exports.dwSize = sizeof(__GA_exports);
if (GA_getSharedExports(&__GA_exports,shared))
return loaded = true;
return loaded = true;
/* Open the BPD file */
if (!PM_findBPD(DLL_NAME,bpdpath))
return false;
return false;
strcpy(filename,bpdpath);
strcat(filename,DLL_NAME);
if ((hModBPD = PE_loadLibrary(filename,shared)) == NULL)
return false;
return false;
if ((GA_initLibrary = (GA_initLibrary_t)PE_getProcAddress(hModBPD,"_GA_initLibrary")) == NULL)
return false;
return false;
bpdpath[strlen(bpdpath)-1] = 0;
if (strcmp(bpdpath,PM_getNucleusPath()) == 0)
strcpy(bpdpath,PM_getNucleusConfigPath());
strcpy(bpdpath,PM_getNucleusConfigPath());
else {
PM_backslash(bpdpath);
strcat(bpdpath,"config");
}
PM_backslash(bpdpath);
strcat(bpdpath,"config");
}
if ((gaExp = GA_initLibrary(shared,bpdpath,filename,GA_getSystemPMImports(),&_N_imports,&_GA_imports)) == NULL)
PM_fatalError("GA_initLibrary failed!\n");
PM_fatalError("GA_initLibrary failed!\n");
/* Initialize all default imports to point to fatal error handler
* for upwards compatibility, and copy the exported functions.
*/
max = sizeof(__GA_exports)/sizeof(GA_initLibrary_t);
for (i = 0,p = (ulong*)&__GA_exports; i < max; i++)
*p++ = (ulong)_GA_fatalErrorHandler;
*p++ = (ulong)_GA_fatalErrorHandler;
memcpy(&__GA_exports,gaExp,MIN(sizeof(__GA_exports),gaExp->dwSize));
loaded = true;
return true;
@@ -157,7 +157,7 @@ static ibool LoadDriver(
int NAPI GA_status(void)
{
if (!loaded)
return nDriverNotFound;
return nDriverNotFound;
return __GA_exports.GA_status();
}
@@ -166,7 +166,7 @@ const char * NAPI GA_errorMsg(
N_int32 status)
{
if (!loaded)
return "Unable to load Nucleus device driver!";
return "Unable to load Nucleus device driver!";
return __GA_exports.GA_errorMsg(status);
}
@@ -174,7 +174,7 @@ const char * NAPI GA_errorMsg(
int NAPI GA_getDaysLeft(N_int32 shared)
{
if (!LoadDriver(shared))
return -1;
return -1;
return __GA_exports.GA_getDaysLeft(shared);
}
@@ -182,7 +182,7 @@ int NAPI GA_getDaysLeft(N_int32 shared)
int NAPI GA_registerLicense(uchar *license,N_int32 shared)
{
if (!LoadDriver(shared))
return 0;
return 0;
return __GA_exports.GA_registerLicense(license,shared);
}
@@ -190,7 +190,7 @@ int NAPI GA_registerLicense(uchar *license,N_int32 shared)
ibool NAPI GA_loadInGUI(N_int32 shared)
{
if (!LoadDriver(shared))
return false;
return false;
return __GA_exports.GA_loadInGUI(shared);
}
@@ -198,7 +198,7 @@ ibool NAPI GA_loadInGUI(N_int32 shared)
int NAPI GA_enumerateDevices(N_int32 shared)
{
if (!LoadDriver(shared))
return 0;
return 0;
return __GA_exports.GA_enumerateDevices(shared);
}
@@ -206,7 +206,7 @@ int NAPI GA_enumerateDevices(N_int32 shared)
GA_devCtx * NAPI GA_loadDriver(N_int32 deviceIndex,N_int32 shared)
{
if (!LoadDriver(shared))
return NULL;
return NULL;
return __GA_exports.GA_loadDriver(deviceIndex,shared);
}
@@ -216,7 +216,7 @@ void NAPI GA_getGlobalOptions(
ibool shared)
{
if (LoadDriver(shared))
__GA_exports.GA_getGlobalOptions(options,shared);
__GA_exports.GA_getGlobalOptions(options,shared);
}
/* {secret} */
@@ -226,7 +226,7 @@ PE_MODULE * NAPI GA_loadLibrary(
ibool shared)
{
if (!LoadDriver(shared))
return NULL;
return NULL;
return __GA_exports.GA_loadLibrary(szBPDName,size,shared);
}
@@ -236,7 +236,7 @@ GA_devCtx * NAPI GA_getCurrentDriver(
{
/* Bail for older drivers that didn't export this function! */
if (!__GA_exports.GA_getCurrentDriver)
return NULL;
return NULL;
return __GA_exports.GA_getCurrentDriver(deviceIndex);
}
@@ -246,7 +246,7 @@ REF2D_driver * NAPI GA_getCurrentRef2d(
{
/* Bail for older drivers that didn't export this function! */
if (!__GA_exports.GA_getCurrentRef2d)
return NULL;
return NULL;
return __GA_exports.GA_getCurrentRef2d(deviceIndex);
}
@@ -254,7 +254,7 @@ REF2D_driver * NAPI GA_getCurrentRef2d(
int NAPI GA_isOEMVersion(ibool shared)
{
if (!LoadDriver(shared))
return 0;
return 0;
return __GA_exports.GA_isOEMVersion(shared);
}
@@ -262,8 +262,7 @@ int NAPI GA_isOEMVersion(ibool shared)
N_uint32 * NAPI GA_getLicensedDevices(ibool shared)
{
if (!LoadDriver(shared))
return 0;
return 0;
return __GA_exports.GA_getLicensedDevices(shared);
}
#endif

View File

@@ -72,10 +72,10 @@ library is used with the application local version of Nucleus.
****************************************************************************/
PM_imports * NAPI GA_getSystemPMImports(void)
{
// TODO: We may very well want to provide a system shared library
// that eports the PM functions required by the Nucleus library
// for Linux here. That will eliminate fatal errors loading new
// drivers on Linux!
/* TODO: We may very well want to provide a system shared library */
/* that eports the PM functions required by the Nucleus library */
/* for Linux here. That will eliminate fatal errors loading new */
/* drivers on Linux! */
return &_PM_imports;
}
@@ -126,7 +126,7 @@ Nucleus loader library.
ibool NAPI GA_TimerInit(void)
{
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
haveRDTSC = true;
haveRDTSC = true;
return true;
}
@@ -138,11 +138,11 @@ void NAPI GA_TimerRead(
GA_largeInteger *value)
{
if (haveRDTSC)
_GA_readTimeStamp(value);
_GA_readTimeStamp(value);
else {
struct timeval t;
gettimeofday(&t, NULL);
value->low = t.tv_sec*1000000 + t.tv_usec;
value->high = 0;
}
struct timeval t;
gettimeofday(&t, NULL);
value->low = t.tv_sec*1000000 + t.tv_usec;
value->high = 0;
}
}

View File

@@ -117,8 +117,8 @@ Nucleus loader library.
ibool NAPI GA_TimerInit(void)
{
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) {
haveRDTSC = true;
}
haveRDTSC = true;
}
return true;
}
@@ -130,8 +130,7 @@ void NAPI GA_TimerRead(
GA_largeInteger *value)
{
if (haveRDTSC)
_GA_readTimeStamp(value);
_GA_readTimeStamp(value);
else
KeQuerySystemTime((LARGE_INTEGER*)value);
KeQuerySystemTime((LARGE_INTEGER*)value);
}

View File

@@ -83,11 +83,11 @@ static ulong CallSDDHelp(
* can't fail here.
*/
DosOpen(PMHELP_NAME,&hSDDHelp,&result[0],0,0,
FILE_OPEN, OPEN_SHARE_DENYNONE | OPEN_ACCESS_READWRITE,
NULL);
FILE_OPEN, OPEN_SHARE_DENYNONE | OPEN_ACCESS_READWRITE,
NULL);
DosDevIOCtl(hSDDHelp,PMHELP_IOCTL,func,
&parms, inLen = sizeof(parms), &inLen,
&result, outLen = sizeof(result), &outLen);
&parms, inLen = sizeof(parms), &inLen,
&result, outLen = sizeof(result), &outLen);
DosClose(hSDDHelp);
return result[0];
}
@@ -147,17 +147,17 @@ ibool NAPI GA_getSharedExports(
/* Initialise the PM library and connect to our runtime DLL's */
PM_init();
if (CallSDDHelp(PMHELP_GETSHAREDEXP) != 0) {
/* We have found the shared Nucleus exports. Because not all processes
* map to SDDPMI.DLL, we need to ensure that we connect to this
* DLL so that it gets mapped into our address space (that is
* where the shared Nucleus loader code is located). Simply doing a
* DosLoadModule on it is enough for this.
*/
DosLoadModule((PSZ)buf,sizeof(buf),(PSZ)"SDDPMI.DLL",&hModSDDPMI);
exp = (GA_exports*)result[0];
memcpy(gaExp,exp,MIN(gaExp->dwSize,exp->dwSize));
return true;
}
/* We have found the shared Nucleus exports. Because not all processes
* map to SDDPMI.DLL, we need to ensure that we connect to this
* DLL so that it gets mapped into our address space (that is
* where the shared Nucleus loader code is located). Simply doing a
* DosLoadModule on it is enough for this.
*/
DosLoadModule((PSZ)buf,sizeof(buf),(PSZ)"SDDPMI.DLL",&hModSDDPMI);
exp = (GA_exports*)result[0];
memcpy(gaExp,exp,MIN(gaExp->dwSize,exp->dwSize));
return true;
}
#endif
(void)shared;
return false;
@@ -197,7 +197,7 @@ Nucleus loader library.
ibool NAPI GA_TimerInit(void)
{
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
haveRDTSC = true;
haveRDTSC = true;
return true;
}
@@ -209,9 +209,9 @@ void NAPI GA_TimerRead(
GA_largeInteger *value)
{
if (haveRDTSC)
_GA_readTimeStamp(value);
_GA_readTimeStamp(value);
else
DosTmrQueryTime((QWORD*)value);
DosTmrQueryTime((QWORD*)value);
}
/****************************************************************************

View File

@@ -72,10 +72,10 @@ library is used with the application local version of Nucleus.
****************************************************************************/
PM_imports * NAPI GA_getSystemPMImports(void)
{
// TODO: We may very well want to provide a system shared library
// that eports the PM functions required by the Nucleus library
// for QNX here. That will eliminate fatal errors loading new
// drivers on QNX!
/* TODO: We may very well want to provide a system shared library */
/* that eports the PM functions required by the Nucleus library */
/* for QNX here. That will eliminate fatal errors loading new */
/* drivers on QNX! */
return &_PM_imports;
}
@@ -126,7 +126,7 @@ Nucleus loader library.
ibool NAPI GA_TimerInit(void)
{
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
haveRDTSC = true;
haveRDTSC = true;
return true;
}
@@ -138,12 +138,12 @@ void NAPI GA_TimerRead(
GA_largeInteger *value)
{
if (haveRDTSC)
_GA_readTimeStamp(value);
_GA_readTimeStamp(value);
else {
struct timespec ts;
struct timespec ts;
clock_gettime(CLOCK_REALTIME, &ts);
value->low = (ts.tv_nsec / 1000 + ts.tv_sec * 1000000);
value->high = 0;
}
clock_gettime(CLOCK_REALTIME, &ts);
value->low = (ts.tv_nsec / 1000 + ts.tv_sec * 1000000);
value->high = 0;
}
}

View File

@@ -121,9 +121,9 @@ Nucleus loader library.
ibool NAPI GA_TimerInit(void)
{
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) {
haveRDTSC = true;
return true;
}
haveRDTSC = true;
return true;
}
return false;
}
@@ -135,5 +135,5 @@ void NAPI GA_TimerRead(
GA_largeInteger *value)
{
if (haveRDTSC)
_GA_readTimeStamp(value);
_GA_readTimeStamp(value);
}

View File

@@ -118,7 +118,7 @@ Nucleus loader library.
ibool NAPI GA_TimerInit(void)
{
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
return true;
return true;
return false;
}

View File

@@ -117,8 +117,8 @@ Nucleus loader library.
ibool NAPI GA_TimerInit(void)
{
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) {
haveRDTSC = true;
}
haveRDTSC = true;
}
return true;
}
@@ -130,8 +130,7 @@ void NAPI GA_TimerRead(
GA_largeInteger *value)
{
if (haveRDTSC)
_GA_readTimeStamp(value);
_GA_readTimeStamp(value);
else
VTD_Get_Real_Time(&value->high,&value->low);
VTD_Get_Real_Time(&value->high,&value->low);
}

View File

@@ -67,16 +67,16 @@ static ibool LoadSharedDLL(void)
/* Check if we have already loaded the DLL */
if (hModDLL)
return true;
return true;
PM_init();
/* Open the DLL file */
if (!PM_findBPD(DLL_NAME,bpdpath))
return false;
return false;
strcpy(filename,bpdpath);
strcat(filename,DLL_NAME);
if ((hModDLL = LoadLibrary(filename)) == NULL)
return false;
return false;
return true;
}
@@ -103,10 +103,10 @@ void NAPI GA_setLocalPath(
PM_setLocalBPDPath(path);
if (_PM_hDevice != INVALID_HANDLE_VALUE) {
inBuf[0] = (DWORD)path;
DeviceIoControl(_PM_hDevice, PMHELP_GASETLOCALPATH32,
inBuf, sizeof(inBuf), outBuf, sizeof(outBuf), &outCnt, NULL);
}
inBuf[0] = (DWORD)path;
DeviceIoControl(_PM_hDevice, PMHELP_GASETLOCALPATH32,
inBuf, sizeof(inBuf), outBuf, sizeof(outBuf), &outCnt, NULL);
}
}
/****************************************************************************
@@ -126,18 +126,18 @@ PM_imports * NAPI GA_getSystemPMImports(void)
PM_imports * (NAPIP _GA_getSystemPMImports)(void);
if (LoadSharedDLL()) {
/* Note that Visual C++ build DLL's with only a single underscore in front
* of the exported name while Watcom C provides two of them. We check for
* both to allow working with either compiled DLL.
*/
if ((_GA_getSystemPMImports = (void*)GetProcAddress(hModDLL,"_GA_getSystemPMImports")) != NULL) {
if ((_GA_getSystemPMImports = (void*)GetProcAddress(hModDLL,"__GA_getSystemPMImports")) != NULL) {
pmImp = _GA_getSystemPMImports();
memcpy(&_PM_imports,pmImp,MIN(_PM_imports.dwSize,pmImp->dwSize));
return pmImp;
}
}
}
/* Note that Visual C++ build DLL's with only a single underscore in front
* of the exported name while Watcom C provides two of them. We check for
* both to allow working with either compiled DLL.
*/
if ((_GA_getSystemPMImports = (void*)GetProcAddress(hModDLL,"_GA_getSystemPMImports")) != NULL) {
if ((_GA_getSystemPMImports = (void*)GetProcAddress(hModDLL,"__GA_getSystemPMImports")) != NULL) {
pmImp = _GA_getSystemPMImports();
memcpy(&_PM_imports,pmImp,MIN(_PM_imports.dwSize,pmImp->dwSize));
return pmImp;
}
}
}
return &_PM_imports;
}
@@ -162,16 +162,16 @@ ibool NAPI GA_getSharedExports(
useRing0Driver = false;
if (shared) {
if (!LoadSharedDLL())
PM_fatalError("Unable to load " DLL_NAME "!");
if ((_GA_getSystemGAExports = (void*)GetProcAddress(hModDLL,"_GA_getSystemGAExports")) == NULL)
if ((_GA_getSystemGAExports = (void*)GetProcAddress(hModDLL,"__GA_getSystemGAExports")) == NULL)
PM_fatalError("Unable to load " DLL_NAME "!");
exp = _GA_getSystemGAExports();
memcpy(gaExp,exp,MIN(gaExp->dwSize,exp->dwSize));
useRing0Driver = true;
return true;
}
if (!LoadSharedDLL())
PM_fatalError("Unable to load " DLL_NAME "!");
if ((_GA_getSystemGAExports = (void*)GetProcAddress(hModDLL,"_GA_getSystemGAExports")) == NULL)
if ((_GA_getSystemGAExports = (void*)GetProcAddress(hModDLL,"__GA_getSystemGAExports")) == NULL)
PM_fatalError("Unable to load " DLL_NAME "!");
exp = _GA_getSystemGAExports();
memcpy(gaExp,exp,MIN(gaExp->dwSize,exp->dwSize));
useRing0Driver = true;
return true;
}
return false;
}
@@ -188,14 +188,14 @@ ibool NAPI GA_queryFunctions(
static ibool (NAPIP _GA_queryFunctions)(GA_devCtx *dc,N_uint32 id,void _FAR_ *funcs) = NULL;
if (useRing0Driver) {
// Call the version in nga_w32.dll if it is loaded
if (!_GA_queryFunctions) {
if ((_GA_queryFunctions = (void*)GetProcAddress(hModDLL,"_GA_queryFunctions")) == NULL)
if ((_GA_queryFunctions = (void*)GetProcAddress(hModDLL,"__GA_queryFunctions")) == NULL)
PM_fatalError("Unable to get exports from " DLL_NAME "!");
}
return _GA_queryFunctions(dc,id,funcs);
}
/* Call the version in nga_w32.dll if it is loaded */
if (!_GA_queryFunctions) {
if ((_GA_queryFunctions = (void*)GetProcAddress(hModDLL,"_GA_queryFunctions")) == NULL)
if ((_GA_queryFunctions = (void*)GetProcAddress(hModDLL,"__GA_queryFunctions")) == NULL)
PM_fatalError("Unable to get exports from " DLL_NAME "!");
}
return _GA_queryFunctions(dc,id,funcs);
}
return __GA_exports.GA_queryFunctions(dc,id,funcs);
}
@@ -211,14 +211,14 @@ ibool NAPI REF2D_queryFunctions(
static ibool (NAPIP _REF2D_queryFunctions)(REF2D_driver *ref2d,N_uint32 id,void _FAR_ *funcs) = NULL;
if (useRing0Driver) {
// Call the version in nga_w32.dll if it is loaded
if (!_REF2D_queryFunctions) {
if ((_REF2D_queryFunctions = (void*)GetProcAddress(hModDLL,"_REF2D_queryFunctions")) == NULL)
if ((_REF2D_queryFunctions = (void*)GetProcAddress(hModDLL,"__REF2D_queryFunctions")) == NULL)
PM_fatalError("Unable to get exports from " DLL_NAME "!");
}
return _REF2D_queryFunctions(ref2d,id,funcs);
}
/* Call the version in nga_w32.dll if it is loaded */
if (!_REF2D_queryFunctions) {
if ((_REF2D_queryFunctions = (void*)GetProcAddress(hModDLL,"_REF2D_queryFunctions")) == NULL)
if ((_REF2D_queryFunctions = (void*)GetProcAddress(hModDLL,"__REF2D_queryFunctions")) == NULL)
PM_fatalError("Unable to get exports from " DLL_NAME "!");
}
return _REF2D_queryFunctions(ref2d,id,funcs);
}
return __GA_exports.REF2D_queryFunctions(ref2d,id,funcs);
}
#endif
@@ -231,13 +231,13 @@ Nucleus loader library.
ibool NAPI GA_TimerInit(void)
{
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) {
haveRDTSC = true;
return true;
}
haveRDTSC = true;
return true;
}
else if (QueryPerformanceFrequency((LARGE_INTEGER*)&countFreq)) {
haveRDTSC = false;
return true;
}
haveRDTSC = false;
return true;
}
return false;
}
@@ -249,8 +249,7 @@ void NAPI GA_TimerRead(
GA_largeInteger *value)
{
if (haveRDTSC)
_GA_readTimeStamp(value);
_GA_readTimeStamp(value);
else
QueryPerformanceCounter((LARGE_INTEGER*)value);
QueryPerformanceCounter((LARGE_INTEGER*)value);
}

View File

@@ -107,9 +107,9 @@ static void GetInternalConstants(GTF_constants *c)
c->hSync = GC.hSync;
c->minVSyncBP = GC.minVSyncBP;
if (GC.k == 0)
c->k = 0.001;
c->k = 0.001;
else
c->k = GC.k;
c->k = GC.k;
c->m = (c->k / 256) * GC.m;
c->c = (GC.c - GC.j) * (c->k / 256) + GC.j;
c->j = GC.j;
@@ -165,89 +165,89 @@ void GTF_calcTimings(double hPixels,double vLines,double freq,
vFieldRate = vFreq;
interlace = 0;
if (wantInterlace)
dotClock *= 2;
dotClock *= 2;
/* Determine the lines for margins */
if (wantMargins) {
topMarginLines = round(c.margin / 100 * vLines);
botMarginLines = round(c.margin / 100 * vLines);
}
topMarginLines = round(c.margin / 100 * vLines);
botMarginLines = round(c.margin / 100 * vLines);
}
else {
topMarginLines = 0;
botMarginLines = 0;
}
topMarginLines = 0;
botMarginLines = 0;
}
if (type != GTF_lockPF) {
if (type == GTF_lockVF) {
/* Estimate the horizontal period */
hPeriodEst = ((1/vFieldRate) - (c.minVSyncBP/1000000)) /
(vLines + (2*topMarginLines) + c.minPorch + interlace) * 1000000;
if (type == GTF_lockVF) {
/* Estimate the horizontal period */
hPeriodEst = ((1/vFieldRate) - (c.minVSyncBP/1000000)) /
(vLines + (2*topMarginLines) + c.minPorch + interlace) * 1000000;
/* Find the number of lines in vSync + back porch */
vSyncBP = round(c.minVSyncBP / hPeriodEst);
}
else if (type == GTF_lockHF) {
/* Find the number of lines in vSync + back porch */
vSyncBP = round((c.minVSyncBP * hFreq) / 1000);
}
/* Find the number of lines in vSync + back porch */
vSyncBP = round(c.minVSyncBP / hPeriodEst);
}
else if (type == GTF_lockHF) {
/* Find the number of lines in vSync + back porch */
vSyncBP = round((c.minVSyncBP * hFreq) / 1000);
}
/* Find the number of lines in the V back porch alone */
vBackPorch = vSyncBP - c.vSyncRqd;
/* Find the number of lines in the V back porch alone */
vBackPorch = vSyncBP - c.vSyncRqd;
/* Find the total number of lines in the vertical period */
vTotalLines = vLines + topMarginLines + botMarginLines + vSyncBP
+ interlace + c.minPorch;
/* Find the total number of lines in the vertical period */
vTotalLines = vLines + topMarginLines + botMarginLines + vSyncBP
+ interlace + c.minPorch;
if (type == GTF_lockVF) {
/* Estimate the vertical frequency */
vFieldRateEst = 1000000 / (hPeriodEst * vTotalLines);
if (type == GTF_lockVF) {
/* Estimate the vertical frequency */
vFieldRateEst = 1000000 / (hPeriodEst * vTotalLines);
/* Find the actual horizontal period */
hPeriod = (hPeriodEst * vFieldRateEst) / vFieldRate;
/* Find the actual horizontal period */
hPeriod = (hPeriodEst * vFieldRateEst) / vFieldRate;
/* Find the actual vertical field frequency */
vFieldRate = 1000000 / (hPeriod * vTotalLines);
}
else if (type == GTF_lockHF) {
/* Find the actual vertical field frequency */
vFieldRate = (hFreq / vTotalLines) * 1000;
}
}
/* Find the actual vertical field frequency */
vFieldRate = 1000000 / (hPeriod * vTotalLines);
}
else if (type == GTF_lockHF) {
/* Find the actual vertical field frequency */
vFieldRate = (hFreq / vTotalLines) * 1000;
}
}
/* Find the number of pixels in the left and right margins */
if (wantMargins) {
leftMarginPixels = round(hPixels * c.margin) / (100 * c.cellGran);
rightMarginPixels = round(hPixels * c.margin) / (100 * c.cellGran);
}
leftMarginPixels = round(hPixels * c.margin) / (100 * c.cellGran);
rightMarginPixels = round(hPixels * c.margin) / (100 * c.cellGran);
}
else {
leftMarginPixels = 0;
rightMarginPixels = 0;
}
leftMarginPixels = 0;
rightMarginPixels = 0;
}
/* Find the total number of active pixels in image + margins */
hTotalActivePixels = hPixels + leftMarginPixels + rightMarginPixels;
if (type == GTF_lockVF) {
/* Find the ideal blanking duty cycle */
idealDutyCycle = c.c - ((c.m * hPeriod) / 1000);
}
/* Find the ideal blanking duty cycle */
idealDutyCycle = c.c - ((c.m * hPeriod) / 1000);
}
else if (type == GTF_lockHF) {
/* Find the ideal blanking duty cycle */
idealDutyCycle = c.c - (c.m / hFreq);
}
/* Find the ideal blanking duty cycle */
idealDutyCycle = c.c - (c.m / hFreq);
}
else if (type == GTF_lockPF) {
/* Find ideal horizontal period from blanking duty cycle formula */
idealHPeriod = (((c.c - 100) + (sqrt((pow(100-c.c,2)) +
(0.4 * c.m * (hTotalActivePixels + rightMarginPixels +
leftMarginPixels) / dotClock)))) / (2 * c.m)) * 1000;
/* Find ideal horizontal period from blanking duty cycle formula */
idealHPeriod = (((c.c - 100) + (sqrt((pow(100-c.c,2)) +
(0.4 * c.m * (hTotalActivePixels + rightMarginPixels +
leftMarginPixels) / dotClock)))) / (2 * c.m)) * 1000;
/* Find the ideal blanking duty cycle */
idealDutyCycle = c.c - ((c.m * idealHPeriod) / 1000);
}
/* Find the ideal blanking duty cycle */
idealDutyCycle = c.c - ((c.m * idealHPeriod) / 1000);
}
/* Find the number of pixels in blanking time */
hBlankPixels = round((hTotalActivePixels * idealDutyCycle) /
((100 - idealDutyCycle) * c.cellGran)) * c.cellGran;
((100 - idealDutyCycle) * c.cellGran)) * c.cellGran;
/* Find the total number of pixels */
hTotalPixels = hTotalActivePixels + hBlankPixels;
@@ -262,35 +262,35 @@ void GTF_calcTimings(double hPixels,double vLines,double freq,
hSyncBP = hBackPorch + hSyncWidth;
if (type == GTF_lockPF) {
/* Find the horizontal frequency */
hFreq = (dotClock / hTotalPixels) * 1000;
/* Find the horizontal frequency */
hFreq = (dotClock / hTotalPixels) * 1000;
/* Find the number of lines in vSync + back porch */
vSyncBP = round((c.minVSyncBP * hFreq) / 1000);
/* Find the number of lines in vSync + back porch */
vSyncBP = round((c.minVSyncBP * hFreq) / 1000);
/* Find the number of lines in the V back porch alone */
vBackPorch = vSyncBP - c.vSyncRqd;
/* Find the number of lines in the V back porch alone */
vBackPorch = vSyncBP - c.vSyncRqd;
/* Find the total number of lines in the vertical period */
vTotalLines = vLines + topMarginLines + botMarginLines + vSyncBP
+ interlace + c.minPorch;
/* Find the total number of lines in the vertical period */
vTotalLines = vLines + topMarginLines + botMarginLines + vSyncBP
+ interlace + c.minPorch;
/* Find the actual vertical field frequency */
vFieldRate = (hFreq / vTotalLines) * 1000;
}
/* Find the actual vertical field frequency */
vFieldRate = (hFreq / vTotalLines) * 1000;
}
else {
if (type == GTF_lockVF) {
/* Find the horizontal frequency */
hFreq = 1000 / hPeriod;
}
else if (type == GTF_lockHF) {
/* Find the horizontal frequency */
hPeriod = 1000 / hFreq;
}
if (type == GTF_lockVF) {
/* Find the horizontal frequency */
hFreq = 1000 / hPeriod;
}
else if (type == GTF_lockHF) {
/* Find the horizontal frequency */
hPeriod = 1000 / hFreq;
}
/* Find the pixel clock frequency */
dotClock = hTotalPixels / hPeriod;
}
/* Find the pixel clock frequency */
dotClock = hTotalPixels / hPeriod;
}
/* Return the computed frequencies */
t->vFreq = vFieldRate;
@@ -315,16 +315,16 @@ void GTF_calcTimings(double hPixels,double vLines,double freq,
t->v.vSyncWidth = (int)c.vSyncRqd;
t->v.vBackPorch = (int)vBackPorch;
if (wantInterlace) {
/* Halve the timings for interlaced modes */
t->v.vTotal /= 2;
t->v.vDisp /= 2;
t->v.vSyncStart /= 2;
t->v.vSyncEnd /= 2;
t->v.vFrontPorch /= 2;
t->v.vSyncWidth /= 2;
t->v.vBackPorch /= 2;
t->dotClock /= 2;
}
/* Halve the timings for interlaced modes */
t->v.vTotal /= 2;
t->v.vDisp /= 2;
t->v.vSyncStart /= 2;
t->v.vSyncEnd /= 2;
t->v.vFrontPorch /= 2;
t->v.vSyncWidth /= 2;
t->v.vBackPorch /= 2;
t->dotClock /= 2;
}
/* Mark as GTF timing using the sync polarities */
t->interlace = (wantInterlace) ? 'I' : 'N';
@@ -348,30 +348,30 @@ void main(int argc,char *argv[])
GTF_timings t;
if (argc != 5 && argc != 6) {
printf("Usage: GTFCALC <xPixels> <yPixels> <freq> [[Hz] [KHz] [MHz]] [I]\n");
printf("\n");
printf("where <xPixels> is the horizontal resolution of the mode, <yPixels> is the\n");
printf("vertical resolution of the mode. The <freq> value will be the frequency to\n");
printf("drive the calculations, and will be either the vertical frequency (in Hz)\n");
printf("the horizontal frequency (in KHz) or the dot clock (in MHz). To generate\n");
printf("timings for an interlaced mode, add 'I' to the end of the command line.\n");
printf("\n");
printf("For example to generate timings for 640x480 at 60Hz vertical:\n");
printf("\n");
printf(" GTFCALC 640 480 60 Hz\n");
printf("\n");
printf("For example to generate timings for 640x480 at 31.5KHz horizontal:\n");
printf("\n");
printf(" GTFCALC 640 480 31.5 KHz\n");
printf("\n");
printf("For example to generate timings for 640x480 with a 25.175Mhz dot clock:\n");
printf("\n");
printf(" GTFCALC 640 480 25.175 MHz\n");
printf("\n");
printf("GTFCALC will print a summary of the results found, and dump the CRTC\n");
printf("values to the UVCONFIG.CRT file in the format used by SciTech Display Doctor.\n");
exit(1);
}
printf("Usage: GTFCALC <xPixels> <yPixels> <freq> [[Hz] [KHz] [MHz]] [I]\n");
printf("\n");
printf("where <xPixels> is the horizontal resolution of the mode, <yPixels> is the\n");
printf("vertical resolution of the mode. The <freq> value will be the frequency to\n");
printf("drive the calculations, and will be either the vertical frequency (in Hz)\n");
printf("the horizontal frequency (in KHz) or the dot clock (in MHz). To generate\n");
printf("timings for an interlaced mode, add 'I' to the end of the command line.\n");
printf("\n");
printf("For example to generate timings for 640x480 at 60Hz vertical:\n");
printf("\n");
printf(" GTFCALC 640 480 60 Hz\n");
printf("\n");
printf("For example to generate timings for 640x480 at 31.5KHz horizontal:\n");
printf("\n");
printf(" GTFCALC 640 480 31.5 KHz\n");
printf("\n");
printf("For example to generate timings for 640x480 with a 25.175Mhz dot clock:\n");
printf("\n");
printf(" GTFCALC 640 480 25.175 MHz\n");
printf("\n");
printf("GTFCALC will print a summary of the results found, and dump the CRTC\n");
printf("values to the UVCONFIG.CRT file in the format used by SciTech Display Doctor.\n");
exit(1);
}
/* Get values from command line */
xPixels = atof(argv[1]);
@@ -381,33 +381,33 @@ void main(int argc,char *argv[])
/* Compute the CRTC timings */
if (toupper(argv[4][0]) == 'H')
GTF_calcTimings(xPixels,yPixels,freq,GTF_lockVF,false,interlace,&t);
GTF_calcTimings(xPixels,yPixels,freq,GTF_lockVF,false,interlace,&t);
else if (toupper(argv[4][0]) == 'K')
GTF_calcTimings(xPixels,yPixels,freq,GTF_lockHF,false,interlace,&t);
GTF_calcTimings(xPixels,yPixels,freq,GTF_lockHF,false,interlace,&t);
else if (toupper(argv[4][0]) == 'M')
GTF_calcTimings(xPixels,yPixels,freq,GTF_lockPF,false,interlace,&t);
GTF_calcTimings(xPixels,yPixels,freq,GTF_lockPF,false,interlace,&t);
else {
printf("Unknown command line!\n");
exit(1);
}
printf("Unknown command line!\n");
exit(1);
}
/* Dump summary info to standard output */
printf("CRTC values for %.0fx%.0f @ %.2f %s\n", xPixels, yPixels, freq, argv[4]);
printf("\n");
printf(" hTotal = %-4d vTotal = %-4d\n",
t.h.hTotal, t.v.vTotal);
t.h.hTotal, t.v.vTotal);
printf(" hDisp = %-4d vDisp = %-4d\n",
t.h.hDisp, t.v.vDisp);
t.h.hDisp, t.v.vDisp);
printf(" hSyncStart = %-4d vSyncStart = %-4d\n",
t.h.hSyncStart, t.v.vSyncStart);
t.h.hSyncStart, t.v.vSyncStart);
printf(" hSyncEnd = %-4d vSyncEnd = %-4d\n",
t.h.hSyncEnd, t.v.vSyncEnd);
t.h.hSyncEnd, t.v.vSyncEnd);
printf(" hFrontPorch = %-4d vFrontPorch = %-4d\n",
t.h.hFrontPorch, t.v.vFrontPorch);
t.h.hFrontPorch, t.v.vFrontPorch);
printf(" hSyncWidth = %-4d vSyncWidth = %-4d\n",
t.h.hSyncWidth, t.v.vSyncWidth);
t.h.hSyncWidth, t.v.vSyncWidth);
printf(" hBackPorch = %-4d vBackPorch = %-4d\n",
t.h.hBackPorch, t.v.vBackPorch);
t.h.hBackPorch, t.v.vBackPorch);
printf("\n");
printf(" Interlaced = %s\n", (t.interlace == 'I') ? "Yes" : "No");
printf(" H sync pol = %c\n", t.hSyncPol);
@@ -419,18 +419,18 @@ void main(int argc,char *argv[])
/* Dump to file in format used by SciTech Display Doctor */
if ((f = fopen("UVCONFIG.CRT","w")) != NULL) {
fprintf(f, "[%.0f %.0f]\n", xPixels, yPixels);
fprintf(f, "%d %d %d %d '%c' %s\n",
t.h.hTotal, t.h.hDisp,
t.h.hSyncStart, t.h.hSyncEnd,
t.hSyncPol, (t.interlace == 'I') ? "I" : "NI");
fprintf(f, "%d %d %d %d '%c'\n",
t.v.vTotal, t.v.vDisp,
t.v.vSyncStart, t.v.vSyncEnd,
t.vSyncPol);
fprintf(f, "%.2f\n", t.dotClock);
fclose(f);
}
fprintf(f, "[%.0f %.0f]\n", xPixels, yPixels);
fprintf(f, "%d %d %d %d '%c' %s\n",
t.h.hTotal, t.h.hDisp,
t.h.hSyncStart, t.h.hSyncEnd,
t.hSyncPol, (t.interlace == 'I') ? "I" : "NI");
fprintf(f, "%d %d %d %d '%c'\n",
t.v.vTotal, t.v.vDisp,
t.v.vSyncStart, t.v.vSyncEnd,
t.vSyncPol);
fprintf(f, "%.2f\n", t.dotClock);
fclose(f);
}
}
#endif /* TESTING */

View File

@@ -270,27 +270,27 @@ int _CDECL stub_open(const char *_path, int _oflag, unsigned _mode)
/* Find an empty file handle to use */
for (i = 3; i < MAX_FILES; i++) {
if (!openHandles[i])
break;
}
if (!openHandles[i])
break;
}
if (openHandles[i])
return -1;
return -1;
/* Find the open flags to use */
if (_oflag & ___O_TRUNC)
strcpy(mode,"w");
strcpy(mode,"w");
else if (_oflag & ___O_CREAT)
strcpy(mode,"a");
strcpy(mode,"a");
else
strcpy(mode,"r");
strcpy(mode,"r");
if (_oflag & ___O_BINARY)
strcat(mode,"b");
strcat(mode,"b");
if (_oflag & ___O_TEXT)
strcat(mode,"t");
strcat(mode,"t");
/* Open the file and store the file handle */
if ((openHandles[i] = fopen(_path,mode)) == NULL)
return -1;
return -1;
return i;
}
@@ -300,25 +300,25 @@ int _CDECL stub_access(const char *_path, int _amode)
int _CDECL stub_close(int _fildes)
{
if (_fildes >= 3 && openHandles[_fildes]) {
fclose(openHandles[_fildes]);
openHandles[_fildes] = NULL;
}
fclose(openHandles[_fildes]);
openHandles[_fildes] = NULL;
}
return 0;
}
off_t _CDECL stub_lseek(int _fildes, off_t _offset, int _whence)
{
if (_fildes >= 3) {
fseek(openHandles[_fildes],_offset,_whence);
return ftell(openHandles[_fildes]);
}
fseek(openHandles[_fildes],_offset,_whence);
return ftell(openHandles[_fildes]);
}
return 0;
}
size_t _CDECL stub_read(int _fildes, void *_buf, size_t _nbyte)
{
if (_fildes >= 3)
return fread(_buf,1,_nbyte,openHandles[_fildes]);
return fread(_buf,1,_nbyte,openHandles[_fildes]);
return 0;
}
@@ -327,18 +327,18 @@ int _CDECL stub_unlink(const char *_path)
WORD error;
if (initComplete) {
if (R0_DeleteFile((char*)_path,0,&error))
return 0;
return -1;
}
if (R0_DeleteFile((char*)_path,0,&error))
return 0;
return -1;
}
else
return i_remove(_path);
return i_remove(_path);
}
size_t _CDECL stub_write(int _fildes, const void *_buf, size_t _nbyte)
{
if (_fildes >= 3)
return fwrite(_buf,1,_nbyte,openHandles[_fildes]);
return fwrite(_buf,1,_nbyte,openHandles[_fildes]);
return _nbyte;
}
@@ -356,7 +356,7 @@ void _CDECL _OS_setfileattr(const char *filename,unsigned attrib)
{
WORD error;
if (initComplete)
R0_SetFileAttributes((char*)filename,attrib,&error);
R0_SetFileAttributes((char*)filename,attrib,&error);
}
/* Return the current date in days since 1/1/1980 */
@@ -380,59 +380,59 @@ int _CDECL stub_open(const char *_path, int _oflag, unsigned _mode)
/* Find an empty file handle to use */
for (i = 3; i < MAX_FILES; i++) {
if (!openHandles[i])
break;
}
if (!openHandles[i])
break;
}
if (openHandles[i])
return -1;
return -1;
/* Find the open flags to use */
if (_oflag & ___O_TRUNC)
strcpy(mode,"w");
strcpy(mode,"w");
else if (_oflag & ___O_CREAT)
strcpy(mode,"a");
strcpy(mode,"a");
else
strcpy(mode,"r");
strcpy(mode,"r");
if (_oflag & ___O_BINARY)
strcat(mode,"b");
strcat(mode,"b");
if (_oflag & ___O_TEXT)
strcat(mode,"t");
strcat(mode,"t");
/* Open the file and store the file handle */
if ((openHandles[i] = fopen(_path,mode)) == NULL)
return -1;
return -1;
return i;
}
int _CDECL stub_close(int _fildes)
{
if (_fildes >= 3 && openHandles[_fildes]) {
fclose(openHandles[_fildes]);
openHandles[_fildes] = NULL;
}
fclose(openHandles[_fildes]);
openHandles[_fildes] = NULL;
}
return 0;
}
off_t _CDECL stub_lseek(int _fildes, off_t _offset, int _whence)
{
if (_fildes >= 3) {
fseek(openHandles[_fildes],_offset,_whence);
return ftell(openHandles[_fildes]);
}
fseek(openHandles[_fildes],_offset,_whence);
return ftell(openHandles[_fildes]);
}
return 0;
}
size_t _CDECL stub_read(int _fildes, void *_buf, size_t _nbyte)
{
if (_fildes >= 3)
return fread(_buf,1,_nbyte,openHandles[_fildes]);
return fread(_buf,1,_nbyte,openHandles[_fildes]);
return 0;
}
size_t _CDECL stub_write(int _fildes, const void *_buf, size_t _nbyte)
{
if (_fildes >= 3)
return fwrite(_buf,1,_nbyte,openHandles[_fildes]);
return fwrite(_buf,1,_nbyte,openHandles[_fildes]);
return _nbyte;
}
@@ -444,7 +444,7 @@ int _CDECL stub_isatty(int _fildes)
int _CDECL stub_unlink(const char *_path)
{
// TODO: Implement this!
/* TODO: Implement this! */
return -1;
}
@@ -454,7 +454,7 @@ int _CDECL stub_remove(const char *_filename)
int _CDECL stub_rename(const char *_old, const char *_new)
{
// TODO: Implement this!
/* TODO: Implement this! */
return -1;
}
@@ -462,11 +462,11 @@ void _CDECL _OS_setfileattr(const char *filename,unsigned attrib)
{
uint _attr = 0;
if (attrib & __A_RDONLY)
_attr |= FILE_ATTRIBUTE_READONLY;
_attr |= FILE_ATTRIBUTE_READONLY;
if (attrib & __A_HIDDEN)
_attr |= FILE_ATTRIBUTE_HIDDEN;
_attr |= FILE_ATTRIBUTE_HIDDEN;
if (attrib & __A_SYSTEM)
_attr |= FILE_ATTRIBUTE_SYSTEM;
_attr |= FILE_ATTRIBUTE_SYSTEM;
PM_setFileAttr(filename,_attr);
}
@@ -506,7 +506,7 @@ void _CDECL _OS_setfileattr(const char *filename,unsigned attrib)
{
FILESTATUS3 s;
if (DosQueryPathInfo((PSZ)filename,FIL_STANDARD,(PVOID)&s,sizeof(s)))
return;
return;
s.attrFile = attrib;
DosSetPathInfo((PSZ)filename,FIL_STANDARD,(PVOID)&s,sizeof(s),0L);
}
@@ -528,25 +528,25 @@ int _CDECL stub_open(const char *_path, int _oflag, unsigned _mode)
/* Determine open flags */
if (_oflag & ___O_CREAT) {
if (_oflag & ___O_EXCL)
openflag = OPEN_ACTION_FAIL_IF_EXISTS | OPEN_ACTION_CREATE_IF_NEW;
else if (_oflag & ___O_TRUNC)
openflag = OPEN_ACTION_REPLACE_IF_EXISTS | OPEN_ACTION_CREATE_IF_NEW;
else
openflag = OPEN_ACTION_OPEN_IF_EXISTS | OPEN_ACTION_CREATE_IF_NEW;
}
if (_oflag & ___O_EXCL)
openflag = OPEN_ACTION_FAIL_IF_EXISTS | OPEN_ACTION_CREATE_IF_NEW;
else if (_oflag & ___O_TRUNC)
openflag = OPEN_ACTION_REPLACE_IF_EXISTS | OPEN_ACTION_CREATE_IF_NEW;
else
openflag = OPEN_ACTION_OPEN_IF_EXISTS | OPEN_ACTION_CREATE_IF_NEW;
}
else if (_oflag & ___O_TRUNC)
openflag = OPEN_ACTION_REPLACE_IF_EXISTS;
openflag = OPEN_ACTION_REPLACE_IF_EXISTS;
else
openflag = OPEN_ACTION_OPEN_IF_EXISTS;
openflag = OPEN_ACTION_OPEN_IF_EXISTS;
/* Determine open mode flags */
if (_oflag & ___O_RDONLY)
openmode = OPEN_ACCESS_READONLY | OPEN_SHARE_DENYNONE;
openmode = OPEN_ACCESS_READONLY | OPEN_SHARE_DENYNONE;
else if (_oflag & ___O_WRONLY)
openmode = OPEN_ACCESS_WRITEONLY | OPEN_SHARE_DENYWRITE;
openmode = OPEN_ACCESS_WRITEONLY | OPEN_SHARE_DENYWRITE;
else
openmode = OPEN_ACCESS_READWRITE | OPEN_SHARE_DENYWRITE;
openmode = OPEN_ACCESS_READWRITE | OPEN_SHARE_DENYWRITE;
/* Copy the path to a variable on the stack. We need to do this
* for OS/2 as when the drivers are loaded into shared kernel
@@ -555,14 +555,14 @@ int _CDECL stub_open(const char *_path, int _oflag, unsigned _mode)
*/
strcpy(path,_path);
if (DosOpen(path, &handle, &actiontaken, 0, FILE_NORMAL,
openflag, openmode, NULL) != NO_ERROR)
return -1;
openflag, openmode, NULL) != NO_ERROR)
return -1;
/* Handle append mode of operation */
if (_oflag & ___O_APPEND) {
if (DosSetFilePtr(handle, 0, FILE_END, &error) != NO_ERROR)
return -1;
}
if (DosSetFilePtr(handle, 0, FILE_END, &error) != NO_ERROR)
return -1;
}
return handle;
}
@@ -578,16 +578,16 @@ int _CDECL stub_access(const char *_path, int _amode)
*/
strcpy(path,_path);
if (DosQueryPathInfo(path, FIL_STANDARD, &fs, sizeof(fs)) != NO_ERROR)
return -1;
return -1;
if ((_amode & W_OK) && (fs.attrFile & FILE_READONLY))
return -1;
return -1;
return 0;
}
int _CDECL stub_close(int _fildes)
{
if (DosClose(_fildes) != NO_ERROR)
return -1;
return -1;
return 0;
}
@@ -596,17 +596,17 @@ off_t _CDECL stub_lseek(int _fildes, off_t _offset, int _whence)
ULONG cbActual, origin;
switch (_whence) {
case SEEK_CUR:
origin = FILE_CURRENT;
break;
case SEEK_END:
origin = FILE_END;
break;
default:
origin = FILE_BEGIN;
}
case SEEK_CUR:
origin = FILE_CURRENT;
break;
case SEEK_END:
origin = FILE_END;
break;
default:
origin = FILE_BEGIN;
}
if (DosSetFilePtr(_fildes, _offset, origin, &cbActual) != NO_ERROR)
return -1;
return -1;
return cbActual;
}
@@ -621,19 +621,19 @@ size_t _CDECL stub_read(int _fildes, void *_buf, size_t _nbyte)
* in kernel space and will cause DosRead to bail internally.
*/
while (_nbyte > BUF_SIZE) {
if (DosRead(_fildes, file_io_buf, BUF_SIZE, &cbRead) != NO_ERROR)
return -1;
cbActual += cbRead;
memcpy(p,file_io_buf,BUF_SIZE);
p += BUF_SIZE;
_nbyte -= BUF_SIZE;
}
if (DosRead(_fildes, file_io_buf, BUF_SIZE, &cbRead) != NO_ERROR)
return -1;
cbActual += cbRead;
memcpy(p,file_io_buf,BUF_SIZE);
p += BUF_SIZE;
_nbyte -= BUF_SIZE;
}
if (_nbyte) {
if (DosRead(_fildes, file_io_buf, _nbyte, &cbRead) != NO_ERROR)
return -1;
cbActual += cbRead;
memcpy(p,file_io_buf,_nbyte);
}
if (DosRead(_fildes, file_io_buf, _nbyte, &cbRead) != NO_ERROR)
return -1;
cbActual += cbRead;
memcpy(p,file_io_buf,_nbyte);
}
return cbActual;
}
@@ -648,19 +648,19 @@ size_t _CDECL stub_write(int _fildes, const void *_buf, size_t _nbyte)
* in kernel space and will cause DosWrite to bail internally.
*/
while (_nbyte > BUF_SIZE) {
memcpy(file_io_buf,p,BUF_SIZE);
if (DosWrite(_fildes, file_io_buf, BUF_SIZE, &cbWrite) != NO_ERROR)
return -1;
cbActual += cbWrite;
p += BUF_SIZE;
_nbyte -= BUF_SIZE;
}
memcpy(file_io_buf,p,BUF_SIZE);
if (DosWrite(_fildes, file_io_buf, BUF_SIZE, &cbWrite) != NO_ERROR)
return -1;
cbActual += cbWrite;
p += BUF_SIZE;
_nbyte -= BUF_SIZE;
}
if (_nbyte) {
memcpy(file_io_buf,p,_nbyte);
if (DosWrite(_fildes, file_io_buf, _nbyte, &cbWrite) != NO_ERROR)
return -1;
cbActual += cbWrite;
}
memcpy(file_io_buf,p,_nbyte);
if (DosWrite(_fildes, file_io_buf, _nbyte, &cbWrite) != NO_ERROR)
return -1;
cbActual += cbWrite;
}
return cbActual;
}
@@ -675,7 +675,7 @@ int _CDECL stub_unlink(const char *_path)
*/
strcpy(path,_path);
if (DosDelete(path) != NO_ERROR)
return -1;
return -1;
return 0;
}
@@ -684,7 +684,7 @@ int _CDECL stub_isatty(int _fildes)
ULONG htype, flags;
if (DosQueryHType(_fildes, &htype, &flags) != NO_ERROR)
return 0;
return 0;
return ((htype & 0xFF) == HANDTYPE_DEVICE);
}
@@ -700,7 +700,7 @@ int _CDECL stub_remove(const char *_path)
*/
strcpy(path,_path);
if (DosDelete(path) != NO_ERROR)
return -1;
return -1;
return 0;
}
@@ -717,7 +717,7 @@ int _CDECL stub_rename(const char *_old, const char *_new)
strcpy(old,_old);
strcpy(new,_new);
if (DosMove(old, new) != NO_ERROR)
return -1;
return -1;
return 0;
}
@@ -734,23 +734,23 @@ void _CDECL _OS_setfileattr(const char *filename,unsigned attrib)
int _CDECL stub_open(const char *_path, int _oflag, unsigned _mode)
{
int oflag_tab[] = {
___O_RDONLY, O_RDONLY,
___O_WRONLY, O_WRONLY,
___O_RDWR, O_RDWR,
___O_BINARY, O_BINARY,
___O_TEXT, O_TEXT,
___O_CREAT, O_CREAT,
___O_EXCL, O_EXCL,
___O_TRUNC, O_TRUNC,
___O_APPEND, O_APPEND,
};
___O_RDONLY, O_RDONLY,
___O_WRONLY, O_WRONLY,
___O_RDWR, O_RDWR,
___O_BINARY, O_BINARY,
___O_TEXT, O_TEXT,
___O_CREAT, O_CREAT,
___O_EXCL, O_EXCL,
___O_TRUNC, O_TRUNC,
___O_APPEND, O_APPEND,
};
int i,oflag = 0;
/* Translate the oflag's to the OS dependent versions */
for (i = 0; i < sizeof(oflag_tab) / sizeof(int); i += 2) {
if (_oflag & oflag_tab[i])
oflag |= oflag_tab[i+1];
}
if (_oflag & oflag_tab[i])
oflag |= oflag_tab[i+1];
}
return open(_path,oflag,_mode);
}
@@ -825,4 +825,3 @@ void * _CDECL stub_signal(int sig, void *handler)
return (void*)signal(sig,(__code_ptr)handler);
#endif
}

View File

@@ -79,35 +79,35 @@ static int PE_readHeader(
result = PE_invalidDLLImage;
fseek(f, startOffset, SEEK_SET);
if (fread(&exehdr, 1, sizeof(exehdr), f) != sizeof(exehdr))
return false;
return false;
if (exehdr.signature != 0x5A4D)
return false;
return false;
/* Now seek to the start of the PE header defined at offset 0x3C
* in the MS-DOS EXE header, and read the signature and check it.
*/
fseek(f, startOffset+0x3C, SEEK_SET);
if (fread(&offset, 1, sizeof(offset), f) != sizeof(offset))
return false;
return false;
fseek(f, startOffset+offset, SEEK_SET);
if (fread(&signature, 1, sizeof(signature), f) != sizeof(signature))
return false;
return false;
if (signature != 0x00004550)
return false;
return false;
/* Now read the PE file header and check that it is correct */
if (fread(filehdr, 1, sizeof(*filehdr), f) != sizeof(*filehdr))
return false;
return false;
if (filehdr->Machine != IMAGE_FILE_MACHINE_I386)
return false;
return false;
if (!(filehdr->Characteristics & IMAGE_FILE_32BIT_MACHINE))
return false;
return false;
if (!(filehdr->Characteristics & IMAGE_FILE_DLL))
return false;
return false;
if (fread(opthdr, 1, sizeof(*opthdr), f) != sizeof(*opthdr))
return false;
return false;
if (opthdr->Magic != 0x10B)
return false;
return false;
/* Success, so return true! */
return true;
@@ -138,15 +138,15 @@ ulong PEAPI PE_getFileSize(
/* Read the PE file headers from disk */
if (!PE_readHeader(f,startOffset,&filehdr,&opthdr))
return 0xFFFFFFFF;
return 0xFFFFFFFF;
/* Scan all the section headers summing up the total size */
size = opthdr.SizeOfHeaders;
for (i = 0; i < filehdr.NumberOfSections; i++) {
if (fread(&secthdr, 1, sizeof(secthdr), f) != sizeof(secthdr))
return 0xFFFFFFFF;
size += secthdr.SizeOfRawData;
}
if (fread(&secthdr, 1, sizeof(secthdr), f) != sizeof(secthdr))
return 0xFFFFFFFF;
size += secthdr.SizeOfRawData;
}
return size;
}
@@ -199,7 +199,7 @@ PE_MODULE * PEAPI PE_loadLibraryExt(
/* Read the PE file headers from disk */
if (!PE_readHeader(f,startOffset,&filehdr,&opthdr))
return NULL;
return NULL;
/* Scan all the section headers and find the necessary sections */
text_off = data_off = reloc_off = export_off = 0;
@@ -208,56 +208,56 @@ PE_MODULE * PEAPI PE_loadLibraryExt(
export_addr = export_size = export_end = 0;
reloc_size = 0;
for (i = 0; i < filehdr.NumberOfSections; i++) {
if (fread(&secthdr, 1, sizeof(secthdr), f) != sizeof(secthdr))
goto Error;
if (strcmp(secthdr.Name, ".edata") == 0 || strcmp(secthdr.Name, ".rdata") == 0) {
/* Exports section */
export_off = secthdr.PointerToRawData;
export_addr = secthdr.VirtualAddress;
export_size = secthdr.SizeOfRawData;
export_end = export_addr + export_size;
}
else if (strcmp(secthdr.Name, ".idata") == 0) {
/* Imports section, ignore */
}
else if (strcmp(secthdr.Name, ".reloc") == 0) {
/* Relocations section */
reloc_off = secthdr.PointerToRawData;
reloc_size = secthdr.SizeOfRawData;
}
else if (!text_off && secthdr.Characteristics & IMAGE_SCN_CNT_CODE) {
/* Code section */
text_off = secthdr.PointerToRawData;
text_addr = secthdr.VirtualAddress;
text_size = secthdr.SizeOfRawData;
}
else if (!data_off && secthdr.Characteristics & IMAGE_SCN_CNT_INITIALIZED_DATA) {
/* Data section */
data_off = secthdr.PointerToRawData;
data_addr = secthdr.VirtualAddress;
data_size = secthdr.SizeOfRawData;
data_end = data_addr + data_size;
}
}
if (fread(&secthdr, 1, sizeof(secthdr), f) != sizeof(secthdr))
goto Error;
if (strcmp(secthdr.Name, ".edata") == 0 || strcmp(secthdr.Name, ".rdata") == 0) {
/* Exports section */
export_off = secthdr.PointerToRawData;
export_addr = secthdr.VirtualAddress;
export_size = secthdr.SizeOfRawData;
export_end = export_addr + export_size;
}
else if (strcmp(secthdr.Name, ".idata") == 0) {
/* Imports section, ignore */
}
else if (strcmp(secthdr.Name, ".reloc") == 0) {
/* Relocations section */
reloc_off = secthdr.PointerToRawData;
reloc_size = secthdr.SizeOfRawData;
}
else if (!text_off && secthdr.Characteristics & IMAGE_SCN_CNT_CODE) {
/* Code section */
text_off = secthdr.PointerToRawData;
text_addr = secthdr.VirtualAddress;
text_size = secthdr.SizeOfRawData;
}
else if (!data_off && secthdr.Characteristics & IMAGE_SCN_CNT_INITIALIZED_DATA) {
/* Data section */
data_off = secthdr.PointerToRawData;
data_addr = secthdr.VirtualAddress;
data_size = secthdr.SizeOfRawData;
data_end = data_addr + data_size;
}
}
/* Check to make sure that we have all the sections we need */
if (!text_off || !data_off || !export_off || !reloc_off) {
result = PE_invalidDLLImage;
goto Error;
}
result = PE_invalidDLLImage;
goto Error;
}
/* Find the size of the image to load allocate memory for it */
image_size = MAX(export_end,data_end) - text_addr;
*size = sizeof(PE_MODULE) + image_size + 4096;
if (shared)
hMod = PM_mallocShared(*size);
hMod = PM_mallocShared(*size);
else
hMod = PM_malloc(*size);
hMod = PM_malloc(*size);
reloc = PM_malloc(reloc_size);
if (!hMod || !reloc) {
result = PE_outOfMemory;
goto Error;
}
result = PE_outOfMemory;
goto Error;
}
hMod->text = (uchar*)ROUND_4K((ulong)hMod + sizeof(PE_MODULE));
hMod->data = (uchar*)((ulong)hMod->text + (data_addr - text_addr));
@@ -272,48 +272,48 @@ PE_MODULE * PEAPI PE_loadLibraryExt(
result = PE_invalidDLLImage;
fseek(f, startOffset+text_off, SEEK_SET);
if (fread(hMod->text, 1, text_size, f) != text_size)
goto Error;
goto Error;
fseek(f, startOffset+data_off, SEEK_SET);
if (fread(hMod->data, 1, data_size, f) != data_size)
goto Error;
goto Error;
fseek(f, startOffset+export_off, SEEK_SET);
if (fread(hMod->export, 1, export_size, f) != export_size)
goto Error;
goto Error;
fseek(f, startOffset+reloc_off, SEEK_SET);
if (fread(reloc, 1, reloc_size, f) != reloc_size)
goto Error;
goto Error;
/* Now perform relocations on all sections in the image */
delta = (ulong)hMod->text - opthdr.ImageBase - text_addr;
baseReloc = (BASE_RELOCATION*)reloc;
for (;;) {
/* Check for termination condition */
if (!baseReloc->PageRVA || !baseReloc->BlockSize)
break;
/* Check for termination condition */
if (!baseReloc->PageRVA || !baseReloc->BlockSize)
break;
/* Do fixups */
pageOffset = baseReloc->PageRVA - hMod->textBase;
numFixups = (baseReloc->BlockSize - sizeof(BASE_RELOCATION)) / sizeof(ushort);
fixup = (ushort*)(baseReloc + 1);
for (i = 0; i < numFixups; i++) {
relocType = *fixup >> 12;
if (relocType) {
offset = pageOffset + (*fixup & 0x0FFF);
*(ulong*)(hMod->text + offset) += delta;
}
fixup++;
}
/* Do fixups */
pageOffset = baseReloc->PageRVA - hMod->textBase;
numFixups = (baseReloc->BlockSize - sizeof(BASE_RELOCATION)) / sizeof(ushort);
fixup = (ushort*)(baseReloc + 1);
for (i = 0; i < numFixups; i++) {
relocType = *fixup >> 12;
if (relocType) {
offset = pageOffset + (*fixup & 0x0FFF);
*(ulong*)(hMod->text + offset) += delta;
}
fixup++;
}
/* Move to next relocation block */
baseReloc = (BASE_RELOCATION*)((ulong)baseReloc + baseReloc->BlockSize);
}
/* Move to next relocation block */
baseReloc = (BASE_RELOCATION*)((ulong)baseReloc + baseReloc->BlockSize);
}
/* Initialise the C runtime library for the loaded DLL */
result = PE_unableToInitLibC;
if ((InitLibC = (InitLibC_t)PE_getProcAddress(hMod,"_InitLibC")) == NULL)
goto Error;
goto Error;
if (!InitLibC(&___imports,PM_getOSType()))
goto Error;
goto Error;
/* Clean up, close the file and return the loaded module handle */
PM_free(reloc);
@@ -322,9 +322,9 @@ PE_MODULE * PEAPI PE_loadLibraryExt(
Error:
if (shared)
PM_freeShared(hMod);
PM_freeShared(hMod);
else
PM_free(hMod);
PM_free(hMod);
PM_free(reloc);
return NULL;
}
@@ -360,53 +360,53 @@ PE_MODULE * PEAPI PE_loadLibrary(
#if (defined(__WINDOWS32__) || defined(__DRIVER__)) && defined(CHECKED)
if (!shared) {
PM_MODULE hInst;
InitLibC_t InitLibC;
PM_MODULE hInst;
InitLibC_t InitLibC;
/* For Win32 if are building checked libraries for debugging, we use
* the real Win32 DLL functions so that we can debug the resulting DLL
* files with the Win32 debuggers. Note that we can't do this if
* we need to load the files into a shared memory context.
*/
if ((hInst = PM_loadLibrary(szDLLName)) == NULL) {
result = PE_fileNotFound;
return NULL;
}
/* For Win32 if are building checked libraries for debugging, we use
* the real Win32 DLL functions so that we can debug the resulting DLL
* files with the Win32 debuggers. Note that we can't do this if
* we need to load the files into a shared memory context.
*/
if ((hInst = PM_loadLibrary(szDLLName)) == NULL) {
result = PE_fileNotFound;
return NULL;
}
/* Initialise the C runtime library for the loaded DLL */
result = PE_unableToInitLibC;
if ((InitLibC = (void*)PM_getProcAddress(hInst,"_InitLibC")) == NULL)
return NULL;
if (!InitLibC(&___imports,PM_getOSType()))
return NULL;
/* Initialise the C runtime library for the loaded DLL */
result = PE_unableToInitLibC;
if ((InitLibC = (void*)PM_getProcAddress(hInst,"_InitLibC")) == NULL)
return NULL;
if (!InitLibC(&___imports,PM_getOSType()))
return NULL;
/* Allocate the PE_MODULE structure */
if ((hMod = PM_malloc(sizeof(*hMod))) == NULL)
return NULL;
hMod->text = (void*)hInst;
hMod->shared = -1;
/* Allocate the PE_MODULE structure */
if ((hMod = PM_malloc(sizeof(*hMod))) == NULL)
return NULL;
hMod->text = (void*)hInst;
hMod->shared = -1;
/* DLL loaded successfully so return module handle */
result = PE_ok;
return hMod;
}
/* DLL loaded successfully so return module handle */
result = PE_ok;
return hMod;
}
else
#endif
{
FILE *f;
ulong size;
{
FILE *f;
ulong size;
/* Attempt to open the file on disk */
if (shared < 0)
shared = 0;
if ((f = fopen(szDLLName,"rb")) == NULL) {
result = PE_fileNotFound;
return NULL;
}
hMod = PE_loadLibraryExt(f,0,&size,shared);
fclose(f);
return hMod;
}
/* Attempt to open the file on disk */
if (shared < 0)
shared = 0;
if ((f = fopen(szDLLName,"rb")) == NULL) {
result = PE_fileNotFound;
return NULL;
}
hMod = PE_loadLibraryExt(f,0,&size,shared);
fclose(f);
return hMod;
}
}
/****************************************************************************
@@ -445,14 +445,14 @@ PE_MODULE * PEAPI PE_loadLibraryMGL(
*/
#if !defined(__WIN32_VXD__) && !defined(__NT_DRIVER__)
if (getenv("MGL_ROOT")) {
strcpy(path,getenv("MGL_ROOT"));
PM_backslash(path);
}
strcpy(path,getenv("MGL_ROOT"));
PM_backslash(path);
}
strcat(path,"drivers");
PM_backslash(path);
strcat(path,szDLLName);
if ((hMod = PE_loadLibrary(path,shared)) != NULL)
return hMod;
return hMod;
#endif
strcpy(path,"drivers");
PM_backslash(path);
@@ -488,39 +488,39 @@ void * PEAPI PE_getProcAddress(
{
#if (defined(__WINDOWS32__) || defined(__DRIVER__)) && defined(CHECKED)
if (hModule->shared == -1)
return (void*)PM_getProcAddress(hModule->text,szProcName);
return (void*)PM_getProcAddress(hModule->text,szProcName);
else
#endif
{
uint i;
EXPORT_DIRECTORY *exports;
ulong funcOffset;
ulong *AddressTable;
ulong *NameTable;
ushort *OrdinalTable;
char *name;
{
uint i;
EXPORT_DIRECTORY *exports;
ulong funcOffset;
ulong *AddressTable;
ulong *NameTable;
ushort *OrdinalTable;
char *name;
/* Find the address of the export tables from the export section */
if (!hModule)
return NULL;
exports = (EXPORT_DIRECTORY*)(hModule->export + hModule->exportDir);
AddressTable = (ulong*)(hModule->export + exports->AddressTableRVA - hModule->exportBase);
NameTable = (ulong*)(hModule->export + exports->NameTableRVA - hModule->exportBase);
OrdinalTable = (ushort*)(hModule->export + exports->OrdinalTableRVA - hModule->exportBase);
/* Find the address of the export tables from the export section */
if (!hModule)
return NULL;
exports = (EXPORT_DIRECTORY*)(hModule->export + hModule->exportDir);
AddressTable = (ulong*)(hModule->export + exports->AddressTableRVA - hModule->exportBase);
NameTable = (ulong*)(hModule->export + exports->NameTableRVA - hModule->exportBase);
OrdinalTable = (ushort*)(hModule->export + exports->OrdinalTableRVA - hModule->exportBase);
/* Search the export name table to find the function name */
for (i = 0; i < exports->NumberOfNamePointers; i++) {
name = (char*)(hModule->export + NameTable[i] - hModule->exportBase);
if (strcmp(name,szProcName) == 0)
break;
}
if (i == exports->NumberOfNamePointers)
return NULL;
funcOffset = AddressTable[OrdinalTable[i]];
if (!funcOffset)
return NULL;
return (void*)(hModule->text + funcOffset - hModule->textBase);
}
/* Search the export name table to find the function name */
for (i = 0; i < exports->NumberOfNamePointers; i++) {
name = (char*)(hModule->export + NameTable[i] - hModule->exportBase);
if (strcmp(name,szProcName) == 0)
break;
}
if (i == exports->NumberOfNamePointers)
return NULL;
funcOffset = AddressTable[OrdinalTable[i]];
if (!funcOffset)
return NULL;
return (void*)(hModule->text + funcOffset - hModule->textBase);
}
}
/****************************************************************************
@@ -546,25 +546,25 @@ void PEAPI PE_freeLibrary(
#if (defined(__WINDOWS32__) || defined(__DRIVER__)) && defined(CHECKED)
if (hModule->shared == -1) {
/* Run the C runtime library exit code on module unload */
if ((TerminateLibC = (TerminateLibC_t)PM_getProcAddress(hModule->text,"_TerminateLibC")) != NULL)
TerminateLibC();
PM_freeLibrary(hModule->text);
PM_free(hModule);
}
/* Run the C runtime library exit code on module unload */
if ((TerminateLibC = (TerminateLibC_t)PM_getProcAddress(hModule->text,"_TerminateLibC")) != NULL)
TerminateLibC();
PM_freeLibrary(hModule->text);
PM_free(hModule);
}
else
#endif
{
if (hModule) {
/* Run the C runtime library exit code on module unload */
if ((TerminateLibC = (TerminateLibC_t)PE_getProcAddress(hModule,"_TerminateLibC")) != NULL)
TerminateLibC();
if (hModule->shared)
PM_freeShared(hModule);
else
PM_free(hModule);
}
}
{
if (hModule) {
/* Run the C runtime library exit code on module unload */
if ((TerminateLibC = (TerminateLibC_t)PE_getProcAddress(hModule,"_TerminateLibC")) != NULL)
TerminateLibC();
if (hModule->shared)
PM_freeShared(hModule);
else
PM_free(hModule);
}
}
}
/****************************************************************************
@@ -584,4 +584,3 @@ int PEAPI PE_getError(void)
{
return result;
}

View File

@@ -73,10 +73,10 @@ void VBEAPI VBE_init(void)
****************************************************************************/
{
if (!state->VESABuf_ptr) {
/* Allocate a global buffer for communicating with the VESA VBE */
if ((state->VESABuf_ptr = PM_getVESABuf(&VESABuf_len, &state->VESABuf_rseg, &state->VESABuf_roff)) == NULL)
PM_fatalError("VESAVBE.C: Real mode memory allocation failed!");
}
/* Allocate a global buffer for communicating with the VESA VBE */
if ((state->VESABuf_ptr = PM_getVESABuf(&VESABuf_len, &state->VESABuf_rseg, &state->VESABuf_roff)) == NULL)
PM_fatalError("VESAVBE.C: Real mode memory allocation failed!");
}
}
void * VBEAPI VBE_getRMBuf(uint *len,uint *rseg,uint *roff)
@@ -129,7 +129,7 @@ void VBEAPI VBE_callESDI(RMREGS *regs, void *buffer, int size)
RMSREGS sregs;
if (!state->VESABuf_ptr)
PM_fatalError("You *MUST* call VBE_init() before you can call the VESAVBE.C module!");
PM_fatalError("You *MUST* call VBE_init() before you can call the VESAVBE.C module!");
sregs.es = (ushort)state->VESABuf_rseg;
regs->x.di = (ushort)state->VESABuf_roff;
memcpy(state->VESABuf_ptr, buffer, size);
@@ -157,7 +157,7 @@ static char *VBE_copyStrToLocal(char *p,char *realPtr,char *max)
v = PM_mapRealPointer((uint)((ulong)realPtr >> 16), (uint)((ulong)realPtr & 0xFFFF));
while (*v != 0 && p < max)
*p++ = *v++;
*p++ = *v++;
*p++ = 0;
return p;
}
@@ -178,7 +178,7 @@ static void VBE_copyShortToLocal(ushort *p,ushort *realPtr)
v = PM_mapRealPointer((uint)((ulong)realPtr >> 16),(uint)((ulong)realPtr & 0xFFFF));
while (*v != 0xFFFF)
*p++ = *v++;
*p++ = *v++;
*p = 0xFFFF;
}
#endif
@@ -200,26 +200,26 @@ int VBEAPI VBE_detectEXT(VBE_vgaInfo *vgaInfo,ibool forceUniVBE)
regs.x.ax = 0x4F00; /* Get SuperVGA information */
if (forceUniVBE) {
regs.x.bx = 0x1234;
regs.x.cx = 0x4321;
}
regs.x.bx = 0x1234;
regs.x.cx = 0x4321;
}
else {
regs.x.bx = 0;
regs.x.cx = 0;
}
regs.x.bx = 0;
regs.x.cx = 0;
}
strncpy(vgaInfo->VESASignature,"VBE2",4);
VBE_callESDI(&regs, vgaInfo, sizeof(*vgaInfo));
if (regs.x.ax != VBE_SUCCESS)
return 0;
return 0;
if (strncmp(vgaInfo->VESASignature,"VESA",4) != 0)
return 0;
return 0;
/* Check for bogus BIOSes that return a VBE version number that is
* not correct, and fix it up. We also check the OemVendorNamePtr for a
* valid value, and if it is invalid then we also reset to VBE 1.2.
*/
if (vgaInfo->VESAVersion >= 0x200 && vgaInfo->OemVendorNamePtr == 0)
vgaInfo->VESAVersion = 0x102;
vgaInfo->VESAVersion = 0x102;
#ifndef REALMODE
/* Relocate all the indirect information (mode tables, OEM strings
* etc) from the low 1Mb memory region into a static buffer in
@@ -227,23 +227,23 @@ int VBEAPI VBE_detectEXT(VBE_vgaInfo *vgaInfo,ibool forceUniVBE)
* from mapping the strings from real mode to protected mode.
*/
{
char *p,*p2;
char *p,*p2;
p2 = VBE_copyStrToLocal(localBuf,vgaInfo->OemStringPtr,MAX_LOCAL_BUF);
vgaInfo->OemStringPtr = localBuf;
if (vgaInfo->VESAVersion >= 0x200) {
p = VBE_copyStrToLocal(p2,vgaInfo->OemVendorNamePtr,MAX_LOCAL_BUF);
vgaInfo->OemVendorNamePtr = p2;
p2 = VBE_copyStrToLocal(p,vgaInfo->OemProductNamePtr,MAX_LOCAL_BUF);
vgaInfo->OemProductNamePtr = p;
p = VBE_copyStrToLocal(p2,vgaInfo->OemProductRevPtr,MAX_LOCAL_BUF);
vgaInfo->OemProductRevPtr = p2;
VBE_copyShortToLocal((ushort*)p,vgaInfo->VideoModePtr);
vgaInfo->VideoModePtr = (ushort*)p;
}
p = VBE_copyStrToLocal(p2,vgaInfo->OemVendorNamePtr,MAX_LOCAL_BUF);
vgaInfo->OemVendorNamePtr = p2;
p2 = VBE_copyStrToLocal(p,vgaInfo->OemProductNamePtr,MAX_LOCAL_BUF);
vgaInfo->OemProductNamePtr = p;
p = VBE_copyStrToLocal(p2,vgaInfo->OemProductRevPtr,MAX_LOCAL_BUF);
vgaInfo->OemProductRevPtr = p2;
VBE_copyShortToLocal((ushort*)p,vgaInfo->VideoModePtr);
vgaInfo->VideoModePtr = (ushort*)p;
}
else {
VBE_copyShortToLocal((ushort*)p2,vgaInfo->VideoModePtr);
vgaInfo->VideoModePtr = (ushort*)p2;
}
VBE_copyShortToLocal((ushort*)p2,vgaInfo->VideoModePtr);
vgaInfo->VideoModePtr = (ushort*)p2;
}
}
#endif
state->VBEMemory = vgaInfo->TotalMemory * 64;
@@ -253,17 +253,17 @@ int VBEAPI VBE_detectEXT(VBE_vgaInfo *vgaInfo,ibool forceUniVBE)
*/
haveRiva128 = false;
if (vgaInfo->VESAVersion >= 0x300 &&
(strstr(vgaInfo->OemStringPtr,"NVidia") != NULL ||
strstr(vgaInfo->OemStringPtr,"Riva") != NULL)) {
haveRiva128 = true;
}
(strstr(vgaInfo->OemStringPtr,"NVidia") != NULL ||
strstr(vgaInfo->OemStringPtr,"Riva") != NULL)) {
haveRiva128 = true;
}
/* Check for Matrox G400 cards which claim to be VBE 3.0
* compliant yet they don't implement the refresh rate control
* functions.
*/
if (vgaInfo->VESAVersion >= 0x300 && (strcmp(vgaInfo->OemProductNamePtr,"Matrox G400") == 0))
vgaInfo->VESAVersion = 0x200;
vgaInfo->VESAVersion = 0x200;
return (state->VBEVersion = vgaInfo->VESAVersion);
}
@@ -305,70 +305,70 @@ ibool VBEAPI VBE_getModeInfo(int mode,VBE_modeInfo *modeInfo)
regs.x.cx = (ushort)mode;
VBE_callESDI(&regs, modeInfo, sizeof(*modeInfo));
if (regs.x.ax != VBE_SUCCESS)
return false;
return false;
if ((modeInfo->ModeAttributes & vbeMdAvailable) == 0)
return false;
return false;
/* Map out triple buffer and stereo flags for NVidia Riva128
* chips.
*/
if (haveRiva128) {
modeInfo->ModeAttributes &= ~vbeMdTripleBuf;
modeInfo->ModeAttributes &= ~vbeMdStereo;
}
modeInfo->ModeAttributes &= ~vbeMdTripleBuf;
modeInfo->ModeAttributes &= ~vbeMdStereo;
}
/* Support old style RGB definitions for VBE 1.1 BIOSes */
bits = modeInfo->BitsPerPixel;
if (modeInfo->MemoryModel == vbeMemPK && bits > 8) {
modeInfo->MemoryModel = vbeMemRGB;
switch (bits) {
case 15:
modeInfo->RedMaskSize = 5;
modeInfo->RedFieldPosition = 10;
modeInfo->GreenMaskSize = 5;
modeInfo->GreenFieldPosition = 5;
modeInfo->BlueMaskSize = 5;
modeInfo->BlueFieldPosition = 0;
modeInfo->RsvdMaskSize = 1;
modeInfo->RsvdFieldPosition = 15;
break;
case 16:
modeInfo->RedMaskSize = 5;
modeInfo->RedFieldPosition = 11;
modeInfo->GreenMaskSize = 5;
modeInfo->GreenFieldPosition = 5;
modeInfo->BlueMaskSize = 5;
modeInfo->BlueFieldPosition = 0;
modeInfo->RsvdMaskSize = 0;
modeInfo->RsvdFieldPosition = 0;
break;
case 24:
modeInfo->RedMaskSize = 8;
modeInfo->RedFieldPosition = 16;
modeInfo->GreenMaskSize = 8;
modeInfo->GreenFieldPosition = 8;
modeInfo->BlueMaskSize = 8;
modeInfo->BlueFieldPosition = 0;
modeInfo->RsvdMaskSize = 0;
modeInfo->RsvdFieldPosition = 0;
break;
}
}
modeInfo->MemoryModel = vbeMemRGB;
switch (bits) {
case 15:
modeInfo->RedMaskSize = 5;
modeInfo->RedFieldPosition = 10;
modeInfo->GreenMaskSize = 5;
modeInfo->GreenFieldPosition = 5;
modeInfo->BlueMaskSize = 5;
modeInfo->BlueFieldPosition = 0;
modeInfo->RsvdMaskSize = 1;
modeInfo->RsvdFieldPosition = 15;
break;
case 16:
modeInfo->RedMaskSize = 5;
modeInfo->RedFieldPosition = 11;
modeInfo->GreenMaskSize = 5;
modeInfo->GreenFieldPosition = 5;
modeInfo->BlueMaskSize = 5;
modeInfo->BlueFieldPosition = 0;
modeInfo->RsvdMaskSize = 0;
modeInfo->RsvdFieldPosition = 0;
break;
case 24:
modeInfo->RedMaskSize = 8;
modeInfo->RedFieldPosition = 16;
modeInfo->GreenMaskSize = 8;
modeInfo->GreenFieldPosition = 8;
modeInfo->BlueMaskSize = 8;
modeInfo->BlueFieldPosition = 0;
modeInfo->RsvdMaskSize = 0;
modeInfo->RsvdFieldPosition = 0;
break;
}
}
/* Convert the 32k direct color modes of VBE 1.2+ BIOSes to
* be recognised as 15 bits per pixel modes.
*/
if (bits == 16 && modeInfo->RsvdMaskSize == 1)
modeInfo->BitsPerPixel = 15;
modeInfo->BitsPerPixel = 15;
/* Fix up bogus BIOS'es that report incorrect reserved pixel masks
* for 32K color modes. Quite a number of BIOS'es have this problem,
* and this affects our OS/2 drivers in VBE fallback mode.
*/
if (bits == 15 && (modeInfo->RsvdMaskSize != 1 || modeInfo->RsvdFieldPosition != 15)) {
modeInfo->RsvdMaskSize = 1;
modeInfo->RsvdFieldPosition = 15;
}
modeInfo->RsvdMaskSize = 1;
modeInfo->RsvdFieldPosition = 15;
}
return true;
}
@@ -391,20 +391,20 @@ long VBEAPI VBE_getPageSize(VBE_modeInfo *mi)
size = (long)mi->BytesPerScanLine * (long)mi->YResolution;
if (mi->BitsPerPixel == 4) {
/* We have a 16 color video mode, so round up the page size to
* 8k, 16k, 32k or 64k boundaries depending on how large it is.
*/
/* We have a 16 color video mode, so round up the page size to
* 8k, 16k, 32k or 64k boundaries depending on how large it is.
*/
size = (size + 0x1FFFL) & 0xFFFFE000L;
if (size != 0x2000) {
size = (size + 0x3FFFL) & 0xFFFFC000L;
if (size != 0x4000) {
size = (size + 0x7FFFL) & 0xFFFF8000L;
if (size != 0x8000)
size = (size + 0xFFFFL) & 0xFFFF0000L;
}
}
}
size = (size + 0x1FFFL) & 0xFFFFE000L;
if (size != 0x2000) {
size = (size + 0x3FFFL) & 0xFFFFC000L;
if (size != 0x4000) {
size = (size + 0x7FFFL) & 0xFFFF8000L;
if (size != 0x8000)
size = (size + 0xFFFFL) & 0xFFFF0000L;
}
}
}
else size = (size + 0xFFFFL) & 0xFFFF0000L;
return size;
}
@@ -425,26 +425,26 @@ ibool VBEAPI VBE_setVideoModeExt(int mode,VBE_CRTCInfo *crtc)
RMREGS regs;
if (state->VBEVersion < 0x200 && mode < 0x100) {
/* Some VBE implementations barf terribly if you try to set non-VBE
* video modes with the VBE set mode call. VBE 2.0 implementations
* must be able to handle this.
*/
regs.h.al = (ushort)mode;
regs.h.ah = 0;
PM_int86(0x10,&regs,&regs);
}
/* Some VBE implementations barf terribly if you try to set non-VBE
* video modes with the VBE set mode call. VBE 2.0 implementations
* must be able to handle this.
*/
regs.h.al = (ushort)mode;
regs.h.ah = 0;
PM_int86(0x10,&regs,&regs);
}
else {
if (state->VBEVersion < 0x300 && (mode & vbeRefreshCtrl))
return false;
regs.x.ax = 0x4F02;
regs.x.bx = (ushort)mode;
if ((mode & vbeRefreshCtrl) && crtc)
VBE_callESDI(&regs, crtc, sizeof(*crtc));
else
PM_int86(0x10,&regs,&regs);
if (regs.x.ax != VBE_SUCCESS)
return false;
}
if (state->VBEVersion < 0x300 && (mode & vbeRefreshCtrl))
return false;
regs.x.ax = 0x4F02;
regs.x.bx = (ushort)mode;
if ((mode & vbeRefreshCtrl) && crtc)
VBE_callESDI(&regs, crtc, sizeof(*crtc));
else
PM_int86(0x10,&regs,&regs);
if (regs.x.ax != VBE_SUCCESS)
return false;
}
return true;
}
@@ -475,7 +475,7 @@ int VBEAPI VBE_getVideoMode(void)
regs.x.ax = 0x4F03;
PM_int86(0x10,&regs,&regs);
if (regs.x.ax != VBE_SUCCESS)
return -1;
return -1;
return regs.x.bx;
}
@@ -515,7 +515,7 @@ int VBEAPI VBE_getBank(int window)
regs.h.bl = window;
PM_int86(0x10,&regs,&regs);
if (regs.x.ax != VBE_SUCCESS)
return -1;
return -1;
return regs.x.dx;
}
@@ -637,7 +637,7 @@ ibool VBEAPI VBE_setDisplayStart(int x,int y,ibool waitVRT)
regs.x.ax = 0x4F07;
if (waitVRT)
regs.x.bx = 0x80;
regs.x.bx = 0x80;
else regs.x.bx = 0x00;
regs.x.cx = x;
regs.x.dx = y;
@@ -685,12 +685,12 @@ ibool VBEAPI VBE_setDisplayStartAlt(ulong startAddr,ibool waitVRT)
RMREGS regs;
if (state->VBEVersion >= 0x300) {
regs.x.ax = 0x4F07;
regs.x.bx = waitVRT ? 0x82 : 0x02;
regs.e.ecx = startAddr;
PM_int86(0x10,&regs,&regs);
return regs.x.ax == VBE_SUCCESS;
}
regs.x.ax = 0x4F07;
regs.x.bx = waitVRT ? 0x82 : 0x02;
regs.e.ecx = startAddr;
PM_int86(0x10,&regs,&regs);
return regs.x.ax == VBE_SUCCESS;
}
return false;
}
@@ -712,12 +712,12 @@ int VBEAPI VBE_getDisplayStartStatus(void)
RMREGS regs;
if (state->VBEVersion >= 0x300) {
regs.x.ax = 0x4F07;
regs.x.bx = 0x0004;
PM_int86(0x10,&regs,&regs);
if (regs.x.ax == VBE_SUCCESS)
return (regs.x.cx != 0);
}
regs.x.ax = 0x4F07;
regs.x.bx = 0x0004;
PM_int86(0x10,&regs,&regs);
if (regs.x.ax == VBE_SUCCESS)
return (regs.x.cx != 0);
}
return -1;
}
@@ -738,11 +738,11 @@ ibool VBEAPI VBE_enableStereoMode(void)
RMREGS regs;
if (state->VBEVersion >= 0x300) {
regs.x.ax = 0x4F07;
regs.x.bx = 0x0005;
PM_int86(0x10,&regs,&regs);
return regs.x.ax == VBE_SUCCESS;
}
regs.x.ax = 0x4F07;
regs.x.bx = 0x0005;
PM_int86(0x10,&regs,&regs);
return regs.x.ax == VBE_SUCCESS;
}
return false;
}
@@ -762,11 +762,11 @@ ibool VBEAPI VBE_disableStereoMode(void)
RMREGS regs;
if (state->VBEVersion >= 0x300) {
regs.x.ax = 0x4F07;
regs.x.bx = 0x0006;
PM_int86(0x10,&regs,&regs);
return regs.x.ax == VBE_SUCCESS;
}
regs.x.ax = 0x4F07;
regs.x.bx = 0x0006;
PM_int86(0x10,&regs,&regs);
return regs.x.ax == VBE_SUCCESS;
}
return false;
}
@@ -793,13 +793,13 @@ ibool VBEAPI VBE_setStereoDisplayStart(ulong leftAddr,ulong rightAddr,
RMREGS regs;
if (state->VBEVersion >= 0x300) {
regs.x.ax = 0x4F07;
regs.x.bx = waitVRT ? 0x83 : 0x03;
regs.e.ecx = leftAddr;
regs.e.edx = rightAddr;
PM_int86(0x10,&regs,&regs);
return regs.x.ax == VBE_SUCCESS;
}
regs.x.ax = 0x4F07;
regs.x.bx = waitVRT ? 0x83 : 0x03;
regs.e.ecx = leftAddr;
regs.e.edx = rightAddr;
PM_int86(0x10,&regs,&regs);
return regs.x.ax == VBE_SUCCESS;
}
return false;
}
@@ -832,14 +832,14 @@ ulong VBEAPI VBE_getClosestClock(ushort mode,ulong pixelClock)
RMREGS regs;
if (state->VBEVersion >= 0x300) {
regs.x.ax = 0x4F0B;
regs.h.bl = 0x00;
regs.e.ecx = pixelClock;
regs.x.dx = mode;
PM_int86(0x10,&regs,&regs);
if (regs.x.ax == VBE_SUCCESS)
return regs.e.ecx;
}
regs.x.ax = 0x4F0B;
regs.h.bl = 0x00;
regs.e.ecx = pixelClock;
regs.x.dx = mode;
PM_int86(0x10,&regs,&regs);
if (regs.x.ax == VBE_SUCCESS)
return regs.e.ecx;
}
return -1;
}
@@ -875,7 +875,7 @@ int VBEAPI VBE_getDACWidth(void)
regs.h.bl = 0x01;
PM_int86(0x10,&regs,&regs);
if (regs.x.ax != VBE_SUCCESS)
return -1;
return -1;
return regs.h.bh;
}
@@ -927,11 +927,11 @@ void * VBEAPI VBE_getBankedPointer(VBE_modeInfo *modeInfo)
*/
ulong seg = (ushort)modeInfo->WinASegment;
if (seg != 0) {
if (seg == 0xA000)
return (void*)PM_getA0000Pointer();
else
return (void*)PM_mapPhysicalAddr(seg << 4,0xFFFF,true);
}
if (seg == 0xA000)
return (void*)PM_getA0000Pointer();
else
return (void*)PM_mapPhysicalAddr(seg << 4,0xFFFF,true);
}
return NULL;
}
@@ -956,14 +956,14 @@ void * VBEAPI VBE_getLinearPointer(VBE_modeInfo *modeInfo)
/* Search for an already mapped pointer */
for (i = 0; i < numPtrs; i++) {
if (physPtr[i] == modeInfo->PhysBasePtr)
return linPtr[i];
}
if (physPtr[i] == modeInfo->PhysBasePtr)
return linPtr[i];
}
if (numPtrs < MAX_LIN_PTRS) {
physPtr[numPtrs] = modeInfo->PhysBasePtr;
linPtr[numPtrs] = PM_mapPhysicalAddr(modeInfo->PhysBasePtr,(state->VBEMemory * 1024L)-1,true);
return linPtr[numPtrs++];
}
physPtr[numPtrs] = modeInfo->PhysBasePtr;
linPtr[numPtrs] = PM_mapPhysicalAddr(modeInfo->PhysBasePtr,(state->VBEMemory * 1024L)-1,true);
return linPtr[numPtrs++];
}
return NULL;
}
@@ -989,56 +989,56 @@ static void InitPMCode(void)
int pmLen;
if (!state->pmInfo && state->VBEVersion >= 0x200) {
regs.x.ax = 0x4F0A;
regs.x.bx = 0;
PM_int86x(0x10,&regs,&regs,&sregs);
if (regs.x.ax != VBE_SUCCESS)
return;
if (VBE_shared)
state->pmInfo = PM_mallocShared(regs.x.cx);
else
state->pmInfo = PM_malloc(regs.x.cx);
if (state->pmInfo == NULL)
return;
state->pmInfo32 = state->pmInfo;
pmLen = regs.x.cx;
regs.x.ax = 0x4F0A;
regs.x.bx = 0;
PM_int86x(0x10,&regs,&regs,&sregs);
if (regs.x.ax != VBE_SUCCESS)
return;
if (VBE_shared)
state->pmInfo = PM_mallocShared(regs.x.cx);
else
state->pmInfo = PM_malloc(regs.x.cx);
if (state->pmInfo == NULL)
return;
state->pmInfo32 = state->pmInfo;
pmLen = regs.x.cx;
/* Relocate the block into our local data segment */
code = PM_mapRealPointer(sregs.es,regs.x.di);
memcpy(state->pmInfo,code,pmLen);
/* Relocate the block into our local data segment */
code = PM_mapRealPointer(sregs.es,regs.x.di);
memcpy(state->pmInfo,code,pmLen);
/* Now do a sanity check on the information we recieve to ensure
* that is is correct. Some BIOS return totally bogus information
* in here (Matrox is one)! Under DOS this works OK, but under OS/2
* we are screwed.
*/
if (state->pmInfo->setWindow >= pmLen ||
state->pmInfo->setDisplayStart >= pmLen ||
state->pmInfo->setPalette >= pmLen ||
state->pmInfo->IOPrivInfo >= pmLen) {
if (VBE_shared)
PM_freeShared(state->pmInfo);
else
PM_free(state->pmInfo);
state->pmInfo32 = state->pmInfo = NULL;
return;
}
/* Now do a sanity check on the information we recieve to ensure
* that is is correct. Some BIOS return totally bogus information
* in here (Matrox is one)! Under DOS this works OK, but under OS/2
* we are screwed.
*/
if (state->pmInfo->setWindow >= pmLen ||
state->pmInfo->setDisplayStart >= pmLen ||
state->pmInfo->setPalette >= pmLen ||
state->pmInfo->IOPrivInfo >= pmLen) {
if (VBE_shared)
PM_freeShared(state->pmInfo);
else
PM_free(state->pmInfo);
state->pmInfo32 = state->pmInfo = NULL;
return;
}
/* Read the IO priveledge info and determine if we need to
* pass a selector to MMIO registers to the bank switch code.
* Since we no longer support selector allocation, we no longer
* support this mechanism so we disable the protected mode
* interface in this case.
*/
if (state->pmInfo->IOPrivInfo && !state->MMIOSel) {
ushort *p = (ushort*)((uchar*)state->pmInfo + state->pmInfo->IOPrivInfo);
while (*p != 0xFFFF)
p++;
p++;
if (*p != 0xFFFF)
VBE_freePMCode();
}
}
/* Read the IO priveledge info and determine if we need to
* pass a selector to MMIO registers to the bank switch code.
* Since we no longer support selector allocation, we no longer
* support this mechanism so we disable the protected mode
* interface in this case.
*/
if (state->pmInfo->IOPrivInfo && !state->MMIOSel) {
ushort *p = (ushort*)((uchar*)state->pmInfo + state->pmInfo->IOPrivInfo);
while (*p != 0xFFFF)
p++;
p++;
if (*p != 0xFFFF)
VBE_freePMCode();
}
}
}
void * VBEAPI VBE_getSetBank(void)
@@ -1050,10 +1050,10 @@ void * VBEAPI VBE_getSetBank(void)
****************************************************************************/
{
if (state->VBEVersion >= 0x200) {
InitPMCode();
if (state->pmInfo)
return (uchar*)state->pmInfo + state->pmInfo->setWindow;
}
InitPMCode();
if (state->pmInfo)
return (uchar*)state->pmInfo + state->pmInfo->setWindow;
}
return NULL;
}
@@ -1066,10 +1066,10 @@ void * VBEAPI VBE_getSetDisplayStart(void)
****************************************************************************/
{
if (state->VBEVersion >= 0x200) {
InitPMCode();
if (state->pmInfo)
return (uchar*)state->pmInfo + state->pmInfo->setDisplayStart;
}
InitPMCode();
if (state->pmInfo)
return (uchar*)state->pmInfo + state->pmInfo->setDisplayStart;
}
return NULL;
}
@@ -1082,10 +1082,10 @@ void * VBEAPI VBE_getSetPalette(void)
****************************************************************************/
{
if (state->VBEVersion >= 0x200) {
InitPMCode();
if (state->pmInfo)
return (uchar*)state->pmInfo + state->pmInfo->setPalette;
}
InitPMCode();
if (state->pmInfo)
return (uchar*)state->pmInfo + state->pmInfo->setPalette;
}
return NULL;
}
@@ -1104,13 +1104,13 @@ void VBEAPI VBE_freePMCode(void)
****************************************************************************/
{
if (state->pmInfo) {
if (VBE_shared)
PM_freeShared(state->pmInfo);
else
PM_free(state->pmInfo);
state->pmInfo = NULL;
state->pmInfo32 = NULL;
}
if (VBE_shared)
PM_freeShared(state->pmInfo);
else
PM_free(state->pmInfo);
state->pmInfo = NULL;
state->pmInfo32 = NULL;
}
}
void VBEAPI VBE_sharePMCode(void)
@@ -1183,31 +1183,31 @@ ibool VBEAPI VBE_getBankFunc32(int *codeLen,void **bankFunc,int dualBanks,
InitPMCode();
if (state->VBEVersion >= 0x200 && state->pmInfo32 && !state->MMIOSel) {
code = (uchar*)state->pmInfo32 + state->pmInfo32->setWindow;
if (state->pmInfo32->extensionSig == VBE20_EXT_SIG)
len = state->pmInfo32->setWindowLen-1;
else {
/* We are running on a system without the UniVBE 5.2 extension.
* We do as best we can by scanning through the code for the
* ret function to determine the length. This is not foolproof,
* but is the best we can do.
*/
p = code;
while (*p != 0xC3)
p++;
len = p - code;
}
if ((len + sizeof(VBE20A_bankFunc32_Start) + sizeof(VBE20_bankFunc32_End)) > sizeof(bankFunc32))
PM_fatalError("32-bit bank switch function too long!");
copy(p,bankFunc32,VBE20A_bankFunc32_Start);
memcpy(p,code,len);
p += len;
copy(p,p,VBE20_bankFunc32_End);
*codeLen = p - bankFunc32;
bankFunc32[VBE20_adjustOffset] = (uchar)bankAdjust;
*bankFunc = bankFunc32;
return true;
}
code = (uchar*)state->pmInfo32 + state->pmInfo32->setWindow;
if (state->pmInfo32->extensionSig == VBE20_EXT_SIG)
len = state->pmInfo32->setWindowLen-1;
else {
/* We are running on a system without the UniVBE 5.2 extension.
* We do as best we can by scanning through the code for the
* ret function to determine the length. This is not foolproof,
* but is the best we can do.
*/
p = code;
while (*p != 0xC3)
p++;
len = p - code;
}
if ((len + sizeof(VBE20A_bankFunc32_Start) + sizeof(VBE20_bankFunc32_End)) > sizeof(bankFunc32))
PM_fatalError("32-bit bank switch function too long!");
copy(p,bankFunc32,VBE20A_bankFunc32_Start);
memcpy(p,code,len);
p += len;
copy(p,p,VBE20_bankFunc32_End);
*codeLen = p - bankFunc32;
bankFunc32[VBE20_adjustOffset] = (uchar)bankAdjust;
*bankFunc = bankFunc32;
return true;
}
return false;
}

View File

@@ -64,8 +64,8 @@ Initialise the counter and return the frequency of the counter.
static void GetCounterFrequency(
CPU_largeInteger *freq)
{
// TODO: Return the frequency of the counter in here. You should try to
// normalise this value to be around 100,000 ticks per second.
/* TODO: Return the frequency of the counter in here. You should try to */
/* normalise this value to be around 100,000 ticks per second. */
freq->low = 1000000;
freq->high = 0;
}

View File

@@ -59,7 +59,7 @@ events.
****************************************************************************/
ulong _EVT_getTicks(void)
{
// TODO: Implement this for your OS!
/* TODO: Implement this for your OS! */
}
/****************************************************************************
@@ -68,36 +68,36 @@ Pumps all messages in the application message queue into our event queue.
****************************************************************************/
static void _EVT_pumpMessages(void)
{
// TODO: The purpose of this function is to read all keyboard and mouse
// events from the OS specific event queue, translate them and post
// them into the SciTech event queue.
//
// NOTE: There are a couple of important things that this function must
// take care of:
//
// 1. Support for KEYDOWN, KEYREPEAT and KEYUP is required.
//
// 2. Support for reading hardware scan code as well as ASCII
// translated values is required. Games use the scan codes rather
// than ASCII values. Scan codes go into the high order byte of the
// keyboard message field.
//
// 3. Support for at least reading mouse motion data (mickeys) from the
// mouse is required. Using the mickey values, we can then translate
// to mouse cursor coordinates scaled to the range of the current
// graphics display mode. Mouse values are scaled based on the
// global 'rangeX' and 'rangeY'.
//
// 4. Support for a timestamp for the events is required, which is
// defined as the number of milliseconds since some event (usually
// system startup). This is the timestamp when the event occurred
// (ie: at interrupt time) not when it was stuff into the SciTech
// event queue.
//
// 5. Support for mouse double click events. If the OS has a native
// mechanism to determine this, it should be used. Otherwise the
// time stamp information will be used by the generic event code
// to generate double click events.
/* TODO: The purpose of this function is to read all keyboard and mouse */
/* events from the OS specific event queue, translate them and post */
/* them into the SciTech event queue. */
/* */
/* NOTE: There are a couple of important things that this function must */
/* take care of: */
/* */
/* 1. Support for KEYDOWN, KEYREPEAT and KEYUP is required. */
/* */
/* 2. Support for reading hardware scan code as well as ASCII */
/* translated values is required. Games use the scan codes rather */
/* than ASCII values. Scan codes go into the high order byte of the */
/* keyboard message field. */
/* */
/* 3. Support for at least reading mouse motion data (mickeys) from the */
/* mouse is required. Using the mickey values, we can then translate */
/* to mouse cursor coordinates scaled to the range of the current */
/* graphics display mode. Mouse values are scaled based on the */
/* global 'rangeX' and 'rangeY'. */
/* */
/* 4. Support for a timestamp for the events is required, which is */
/* defined as the number of milliseconds since some event (usually */
/* system startup). This is the timestamp when the event occurred */
/* (ie: at interrupt time) not when it was stuff into the SciTech */
/* event queue. */
/* */
/* 5. Support for mouse double click events. If the OS has a native */
/* mechanism to determine this, it should be used. Otherwise the */
/* time stamp information will be used by the generic event code */
/* to generate double click events. */
}
/****************************************************************************
@@ -141,7 +141,7 @@ void EVTAPI EVT_init(
initEventQueue();
memset(keyUpMsg,0,sizeof(keyUpMsg));
// TODO: Do any OS specific initialisation here
/* TODO: Do any OS specific initialisation here */
/* Catch program termination signals so we can clean up properly */
signal(SIGABRT, _EVT_abort);
@@ -171,7 +171,7 @@ and this function can be used to resume it again later.
****************************************************************************/
void EVT_resume(void)
{
// Do nothing for non DOS systems
/* Do nothing for non DOS systems */
}
/****************************************************************************
@@ -181,7 +181,7 @@ de-install the event handling code.
****************************************************************************/
void EVT_suspend(void)
{
// Do nothing for non DOS systems
/* Do nothing for non DOS systems */
}
/****************************************************************************
@@ -195,5 +195,5 @@ void EVT_exit(void)
signal(SIGFPE, SIG_DFL);
signal(SIGINT, SIG_DFL);
// TODO: Do any OS specific cleanup in here
/* TODO: Do any OS specific cleanup in here */
}

View File

@@ -28,5 +28,5 @@
*
****************************************************************************/
// This is where you include OS specific headers for the event handling
// library.
/* This is where you include OS specific headers for the event handling */
/* library. */

View File

@@ -38,7 +38,7 @@
#include <stdlib.h>
#include <string.h>
// TODO: Include any BeOS specific headers here!
/* TODO: Include any BeOS specific headers here! */
/*--------------------------- Global variables ----------------------------*/
@@ -48,12 +48,12 @@ static void (PMAPIP fatalErrorCleanup)(void) = NULL;
void PMAPI PM_init(void)
{
// TODO: Do any initialisation in here. This includes getting IOPL
// access for the process calling PM_init. This will get called
// more than once.
/* TODO: Do any initialisation in here. This includes getting IOPL */
/* access for the process calling PM_init. This will get called */
/* more than once. */
// TODO: If you support the supplied MTRR register stuff (you need to
// be at ring 0 for this!), you should initialise it in here.
/* TODO: If you support the supplied MTRR register stuff (you need to */
/* be at ring 0 for this!), you should initialise it in here. */
/* MTRR_init(); */
}
@@ -68,9 +68,9 @@ void PMAPI PM_backslash(char *s)
{
uint pos = strlen(s);
if (s[pos-1] != '/') {
s[pos] = '/';
s[pos+1] = '\0';
}
s[pos] = '/';
s[pos+1] = '\0';
}
}
void PMAPI PM_setFatalErrorCleanup(
@@ -81,112 +81,112 @@ void PMAPI PM_setFatalErrorCleanup(
void PMAPI PM_fatalError(const char *msg)
{
// TODO: If you are running in a GUI environment without a console,
// this needs to be changed to bring up a fatal error message
// box and terminate the program.
/* TODO: If you are running in a GUI environment without a console, */
/* this needs to be changed to bring up a fatal error message */
/* box and terminate the program. */
if (fatalErrorCleanup)
fatalErrorCleanup();
fatalErrorCleanup();
fprintf(stderr,"%s\n", msg);
exit(1);
}
void * PMAPI PM_getVESABuf(uint *len,uint *rseg,uint *roff)
{
// No BIOS access for the BeOS
/* No BIOS access for the BeOS */
return NULL;
}
int PMAPI PM_kbhit(void)
{
// TODO: This function checks if a key is available to be read. This
// should be implemented, but is mostly used by the test programs
// these days.
/* TODO: This function checks if a key is available to be read. This */
/* should be implemented, but is mostly used by the test programs */
/* these days. */
return true;
}
int PMAPI PM_getch(void)
{
// TODO: This returns the ASCII code of the key pressed. This
// should be implemented, but is mostly used by the test programs
// these days.
/* TODO: This returns the ASCII code of the key pressed. This */
/* should be implemented, but is mostly used by the test programs */
/* these days. */
return 0xD;
}
int PMAPI PM_openConsole(void)
{
// TODO: Opens up a fullscreen console for graphics output. If your
// console does not have graphics/text modes, this can be left
// empty. The main purpose of this is to disable console switching
// when in graphics modes if you can switch away from fullscreen
// consoles (if you want to allow switching, this can be done
// elsewhere with a full save/restore state of the graphics mode).
/* TODO: Opens up a fullscreen console for graphics output. If your */
/* console does not have graphics/text modes, this can be left */
/* empty. The main purpose of this is to disable console switching */
/* when in graphics modes if you can switch away from fullscreen */
/* consoles (if you want to allow switching, this can be done */
/* elsewhere with a full save/restore state of the graphics mode). */
return 0;
}
int PMAPI PM_getConsoleStateSize(void)
{
// TODO: Returns the size of the console state buffer used to save the
// state of the console before going into graphics mode. This is
// used to restore the console back to normal when we are done.
/* TODO: Returns the size of the console state buffer used to save the */
/* state of the console before going into graphics mode. This is */
/* used to restore the console back to normal when we are done. */
return 1;
}
void PMAPI PM_saveConsoleState(void *stateBuf,int console_id)
{
// TODO: Saves the state of the console into the state buffer. This is
// used to restore the console back to normal when we are done.
// We will always restore 80x25 text mode after being in graphics
// mode, so if restoring text mode is all you need to do this can
// be left empty.
/* TODO: Saves the state of the console into the state buffer. This is */
/* used to restore the console back to normal when we are done. */
/* We will always restore 80x25 text mode after being in graphics */
/* mode, so if restoring text mode is all you need to do this can */
/* be left empty. */
}
void PMAPI PM_restoreConsoleState(const void *stateBuf,int console_id)
{
// TODO: Restore the state of the console from the state buffer. This is
// used to restore the console back to normal when we are done.
// We will always restore 80x25 text mode after being in graphics
// mode, so if restoring text mode is all you need to do this can
// be left empty.
/* TODO: Restore the state of the console from the state buffer. This is */
/* used to restore the console back to normal when we are done. */
/* We will always restore 80x25 text mode after being in graphics */
/* mode, so if restoring text mode is all you need to do this can */
/* be left empty. */
}
void PMAPI PM_closeConsole(int console_id)
{
// TODO: Close the console when we are done, going back to text mode.
/* TODO: Close the console when we are done, going back to text mode. */
}
void PM_setOSCursorLocation(int x,int y)
{
// TODO: Set the OS console cursor location to the new value. This is
// generally used for new OS ports (used mostly for DOS).
/* TODO: Set the OS console cursor location to the new value. This is */
/* generally used for new OS ports (used mostly for DOS). */
}
void PM_setOSScreenWidth(int width,int height)
{
// TODO: Set the OS console screen width. This is generally unused for
// new OS ports.
/* TODO: Set the OS console screen width. This is generally unused for */
/* new OS ports. */
}
ibool PMAPI PM_setRealTimeClockHandler(PM_intHandler ih, int frequency)
{
// TODO: Install a real time clock interrupt handler. Normally this
// will not be supported from most OS'es in user land, so an
// alternative mechanism is needed to enable software stereo.
// Hence leave this unimplemented unless you have a high priority
// mechanism to call the 32-bit callback when the real time clock
// interrupt fires.
/* TODO: Install a real time clock interrupt handler. Normally this */
/* will not be supported from most OS'es in user land, so an */
/* alternative mechanism is needed to enable software stereo. */
/* Hence leave this unimplemented unless you have a high priority */
/* mechanism to call the 32-bit callback when the real time clock */
/* interrupt fires. */
return false;
}
void PMAPI PM_setRealTimeClockFrequency(int frequency)
{
// TODO: Set the real time clock interrupt frequency. Used for stereo
// LC shutter glasses when doing software stereo. Usually sets
// the frequency to around 2048 Hz.
/* TODO: Set the real time clock interrupt frequency. Used for stereo */
/* LC shutter glasses when doing software stereo. Usually sets */
/* the frequency to around 2048 Hz. */
}
void PMAPI PM_restoreRealTimeClockHandler(void)
{
// TODO: Restores the real time clock handler.
/* TODO: Restores the real time clock handler. */
}
char * PMAPI PM_getCurrentPath(
@@ -219,8 +219,8 @@ const char * PMAPI PM_getNucleusConfigPath(void)
const char * PMAPI PM_getUniqueID(void)
{
// TODO: Return a unique ID for the machine. If a unique ID is not
// available, return the machine name.
/* TODO: Return a unique ID for the machine. If a unique ID is not */
/* available, return the machine name. */
static char buf[128];
gethostname(buf, 128);
return buf;
@@ -228,7 +228,7 @@ const char * PMAPI PM_getUniqueID(void)
const char * PMAPI PM_getMachineName(void)
{
// TODO: Return the network machine name for the machine.
/* TODO: Return the network machine name for the machine. */
static char buf[128];
gethostname(buf, 128);
return buf;
@@ -236,7 +236,7 @@ const char * PMAPI PM_getMachineName(void)
void * PMAPI PM_getBIOSPointer(void)
{
// No BIOS access on the BeOS
/* No BIOS access on the BeOS */
return NULL;
}
@@ -244,212 +244,212 @@ void * PMAPI PM_getA0000Pointer(void)
{
static void *bankPtr;
if (!bankPtr)
bankPtr = PM_mapPhysicalAddr(0xA0000,0xFFFF,true);
bankPtr = PM_mapPhysicalAddr(0xA0000,0xFFFF,true);
return bankPtr;
}
void * PMAPI PM_mapPhysicalAddr(ulong base,ulong limit,ibool isCached)
{
// TODO: This function maps a physical memory address to a linear
// address in the address space of the calling process.
/* TODO: This function maps a physical memory address to a linear */
/* address in the address space of the calling process. */
// NOTE: This function *must* be able to handle any phsyical base
// address, and hence you will have to handle rounding of
// the physical base address to a page boundary (ie: 4Kb on
// x86 CPU's) to be able to properly map in the memory
// region.
/* NOTE: This function *must* be able to handle any phsyical base */
/* address, and hence you will have to handle rounding of */
/* the physical base address to a page boundary (ie: 4Kb on */
/* x86 CPU's) to be able to properly map in the memory */
/* region. */
// NOTE: If possible the isCached bit should be used to ensure that
// the PCD (Page Cache Disable) and PWT (Page Write Through)
// bits are set to disable caching for a memory mapping used
// for MMIO register access. We also disable caching using
// the MTRR registers for Pentium Pro and later chipsets so if
// MTRR support is enabled for your OS then you can safely ignore
// the isCached flag and always enable caching in the page
// tables.
/* NOTE: If possible the isCached bit should be used to ensure that */
/* the PCD (Page Cache Disable) and PWT (Page Write Through) */
/* bits are set to disable caching for a memory mapping used */
/* for MMIO register access. We also disable caching using */
/* the MTRR registers for Pentium Pro and later chipsets so if */
/* MTRR support is enabled for your OS then you can safely ignore */
/* the isCached flag and always enable caching in the page */
/* tables. */
return NULL;
}
void PMAPI PM_freePhysicalAddr(void *ptr,ulong limit)
{
// TODO: This function will free a physical memory mapping previously
// allocated with PM_mapPhysicalAddr() if at all possible. If
// you can't free physical memory mappings, simply do nothing.
/* TODO: This function will free a physical memory mapping previously */
/* allocated with PM_mapPhysicalAddr() if at all possible. If */
/* you can't free physical memory mappings, simply do nothing. */
}
ulong PMAPI PM_getPhysicalAddr(void *p)
{
// TODO: This function should find the physical address of a linear
// address.
/* TODO: This function should find the physical address of a linear */
/* address. */
return 0xFFFFFFFFUL;
}
void PMAPI PM_sleep(ulong milliseconds)
{
// TODO: Put the process to sleep for milliseconds
/* TODO: Put the process to sleep for milliseconds */
}
int PMAPI PM_getCOMPort(int port)
{
// TODO: Re-code this to determine real values using the Plug and Play
// manager for the OS.
/* TODO: Re-code this to determine real values using the Plug and Play */
/* manager for the OS. */
switch (port) {
case 0: return 0x3F8;
case 1: return 0x2F8;
}
case 0: return 0x3F8;
case 1: return 0x2F8;
}
return 0;
}
int PMAPI PM_getLPTPort(int port)
{
// TODO: Re-code this to determine real values using the Plug and Play
// manager for the OS.
/* TODO: Re-code this to determine real values using the Plug and Play */
/* manager for the OS. */
switch (port) {
case 0: return 0x3BC;
case 1: return 0x378;
case 2: return 0x278;
}
case 0: return 0x3BC;
case 1: return 0x378;
case 2: return 0x278;
}
return 0;
}
void * PMAPI PM_mallocShared(long size)
{
// TODO: This is used to allocate memory that is shared between process
// that all access the common Nucleus drivers via a common display
// driver DLL. If your OS does not support shared memory (or if
// the display driver does not need to allocate shared memory
// for each process address space), this should just call PM_malloc.
/* TODO: This is used to allocate memory that is shared between process */
/* that all access the common Nucleus drivers via a common display */
/* driver DLL. If your OS does not support shared memory (or if */
/* the display driver does not need to allocate shared memory */
/* for each process address space), this should just call PM_malloc. */
return PM_malloc(size);
}
void PMAPI PM_freeShared(void *ptr)
{
// TODO: Free the shared memory block. This will be called in the context
// of the original calling process that allocated the shared
// memory with PM_mallocShared. Simply call free if you do not
// need this.
/* TODO: Free the shared memory block. This will be called in the context */
/* of the original calling process that allocated the shared */
/* memory with PM_mallocShared. Simply call free if you do not */
/* need this. */
PM_free(ptr);
}
void * PMAPI PM_mapToProcess(void *base,ulong limit)
{
// TODO: This function is used to map a physical memory mapping
// previously allocated with PM_mapPhysicalAddr into the
// address space of the calling process. If the memory mapping
// allocated by PM_mapPhysicalAddr is global to all processes,
// simply return the pointer.
/* TODO: This function is used to map a physical memory mapping */
/* previously allocated with PM_mapPhysicalAddr into the */
/* address space of the calling process. If the memory mapping */
/* allocated by PM_mapPhysicalAddr is global to all processes, */
/* simply return the pointer. */
return base;
}
void * PMAPI PM_mapRealPointer(uint r_seg,uint r_off)
{
// No BIOS access on the BeOS
/* No BIOS access on the BeOS */
return NULL;
}
void * PMAPI PM_allocRealSeg(uint size,uint *r_seg,uint *r_off)
{
// No BIOS access on the BeOS
/* No BIOS access on the BeOS */
return NULL;
}
void PMAPI PM_freeRealSeg(void *mem)
{
// No BIOS access on the BeOS
/* No BIOS access on the BeOS */
}
void PMAPI DPMI_int86(int intno, DPMI_regs *regs)
{
// No BIOS access on the BeOS
/* No BIOS access on the BeOS */
}
int PMAPI PM_int86(int intno, RMREGS *in, RMREGS *out)
{
// No BIOS access on the BeOS
/* No BIOS access on the BeOS */
return 0;
}
int PMAPI PM_int86x(int intno, RMREGS *in, RMREGS *out,
RMSREGS *sregs)
{
// No BIOS access on the BeOS
/* No BIOS access on the BeOS */
return 0;
}
void PMAPI PM_callRealMode(uint seg,uint off, RMREGS *in,
RMSREGS *sregs)
{
// No BIOS access on the BeOS
/* No BIOS access on the BeOS */
}
void PMAPI PM_availableMemory(ulong *physical,ulong *total)
{
// TODO: Report the amount of available memory, both the amount of
// physical memory left and the amount of virtual memory left.
// If the OS does not provide these services, report 0's.
/* TODO: Report the amount of available memory, both the amount of */
/* physical memory left and the amount of virtual memory left. */
/* If the OS does not provide these services, report 0's. */
*physical = *total = 0;
}
void * PMAPI PM_allocLockedMem(uint size,ulong *physAddr,ibool contiguous,ibool below16Meg)
{
// TODO: Allocate a block of locked, physical memory of the specified
// size. This is used for bus master operations. If this is not
// supported by the OS, return NULL and bus mastering will not
// be used.
/* TODO: Allocate a block of locked, physical memory of the specified */
/* size. This is used for bus master operations. If this is not */
/* supported by the OS, return NULL and bus mastering will not */
/* be used. */
return NULL;
}
void PMAPI PM_freeLockedMem(void *p,uint size,ibool contiguous)
{
// TODO: Free a memory block allocated with PM_allocLockedMem.
/* TODO: Free a memory block allocated with PM_allocLockedMem. */
}
void PMAPI PM_setBankA(int bank)
{
// No BIOS access on the BeOS
/* No BIOS access on the BeOS */
}
void PMAPI PM_setBankAB(int bank)
{
// No BIOS access on the BeOS
/* No BIOS access on the BeOS */
}
void PMAPI PM_setCRTStart(int x,int y,int waitVRT)
{
// No BIOS access on the BeOS
/* No BIOS access on the BeOS */
}
ibool PMAPI PM_enableWriteCombine(ulong base,ulong length,uint type)
{
// TODO: This function should enable Pentium Pro and Pentium II MTRR
// write combining for the passed in physical memory base address
// and length. Normally this is done via calls to an OS specific
// device driver as this can only be done at ring 0.
//
// NOTE: This is a *very* important function to implement! If you do
// not implement, graphics performance on the latest Intel chips
// will be severly impaired. For sample code that can be used
// directly in a ring 0 device driver, see the MSDOS implementation
// which includes assembler code to do this directly (if the
// program is running at ring 0).
/* TODO: This function should enable Pentium Pro and Pentium II MTRR */
/* write combining for the passed in physical memory base address */
/* and length. Normally this is done via calls to an OS specific */
/* device driver as this can only be done at ring 0. */
/* */
/* NOTE: This is a *very* important function to implement! If you do */
/* not implement, graphics performance on the latest Intel chips */
/* will be severly impaired. For sample code that can be used */
/* directly in a ring 0 device driver, see the MSDOS implementation */
/* which includes assembler code to do this directly (if the */
/* program is running at ring 0). */
return false;
}
ibool PMAPI PM_doBIOSPOST(ushort axVal,ulong BIOSPhysAddr,void *mappedBIOS)
{
// TODO: This function is used to run the BIOS POST code on a secondary
// controller to initialise it for use. This is not necessary
// for multi-controller operation, but it will make it a lot
// more convenicent for end users (otherwise they have to boot
// the system once with the secondary controller as primary, and
// then boot with both controllers installed).
//
// Even if you don't support full BIOS access, it would be
// adviseable to be able to POST the secondary controllers in the
// system using this function as a minimum requirement. Some
// graphics hardware has registers that contain values that only
// the BIOS knows about, which makes bring up a card from cold
// reset difficult if the BIOS has not POST'ed it.
/* TODO: This function is used to run the BIOS POST code on a secondary */
/* controller to initialise it for use. This is not necessary */
/* for multi-controller operation, but it will make it a lot */
/* more convenicent for end users (otherwise they have to boot */
/* the system once with the secondary controller as primary, and */
/* then boot with both controllers installed). */
/* */
/* Even if you don't support full BIOS access, it would be */
/* adviseable to be able to POST the secondary controllers in the */
/* system using this function as a minimum requirement. Some */
/* graphics hardware has registers that contain values that only */
/* the BIOS knows about, which makes bring up a card from cold */
/* reset difficult if the BIOS has not POST'ed it. */
return false;
}
@@ -506,7 +506,7 @@ ibool PMAPI PM_driveValid(
char drive)
{
if (drive == 3)
return true;
return true;
return false;
}
@@ -533,7 +533,7 @@ void PMAPI PM_setFileAttr(
const char *filename,
uint attrib)
{
// TODO: Set the file attributes for a file
/* TODO: Set the file attributes for a file */
(void)filename;
(void)attrib;
}

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