Commit Graph

77734 Commits

Author SHA1 Message Date
Tony Dinh
f99a169c19 arm: kirkwood: iConnect : Add Ethernet support
- Currently, CONFIG_RESET_PHY_R symbol is used in
arch/arm/mach-kirkwood/include/mach/config.h for all Kirkwood
boards with mv8831116 PHY, with each board defines the function
reset_phy(). Undefine it for this board.
- Add board_eth_init(), CONFIG_DM_ETH, and CONFIG_PHY_MARVELL
to bring up Ethernet.
- Miscellaneous changes: Move constants to .c file and remove header file
board/iomega/iconnect/iconnect.h. Add CONFIG_HUSH_PARSER, use BIT macro,
and cleanup comments.

Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-02-10 07:12:16 +01:00
Tony Dinh
fb9ed23c22 arm: kirkwood: Dreamplug : Use Marvell uclass mvgbe and PHY driver for Ethernet
The Globalscale Technologies Dreamplug board has the network chip
Marvell 88E1116R. Use uclass mvgbe and the compatible driver M88E1310
driver to bring up Ethernet.

- Currently, CONFIG_RESET_PHY_R symbol is used in
arch/arm/mach-kirkwood/include/mach/config.h for all Kirkwood
boards with mv8831116 PHY, with each board defines the function
reset_phy(). Undefine it for this board.
- Add board_eth_init() to use uclass mvgbe to bring up both network
port 0 and 1. And remove ad-hoc code.
- Enable CONFIG_PHY_MARVELL to properly configure the network.
- Add myself as maintainer (this board seems to be orphaned,
could not contact Jason Cooper using current email).
- Miscellaneous changes: Move constants to .c file and remove header file
board/Marvell/dreamplug/dreamplug.h, cleanup comments.

Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Pali Rohár <pali@kernel.org>
2022-02-10 07:12:16 +01:00
Tom Rini
8597032512 Merge branch '2022-02-08-Kconfig-updates'
- Assorted general code cleanups to make sure we use the right macros
  and use them correctly and buildman updates around kconfig.h itself.
- Convert some IDE and SCSI symbols to Kconfig.
- Convert CONFIG_REMAKE_ELF
- Introduce conversion deadline for DM_SCSI.
2022-02-09 09:29:07 -05:00
Tom Rini
cccc4ab86f configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py and update
scripts/pylint.base

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-02-09 09:28:58 -05:00
Simon Glass
bc39e41818 dm: scsi: Add a migration deadline for scsi
Very few boards remain to be migrated:

   am57xx_hs_evm_usb
   controlcenterdc
   highbank
   ls1021atsn_qspi
   ls1021atsn_sdcard
   ls1021atwr_sdcard_ifc_SECURE_BOOT
   ls1046ardb_sdcard_SECURE_BOOT
   ls1088ardb_sdcard_qspi_SECURE_BOOT
   omap5_uevm
   pg_wcom_expu1
   pg_wcom_seli8
   sandbox
   sandbox64
   sandbox_flattree
   sandbox_noinst
   sandbox_spl
   tools-only

Addd a migration deadline for a year out.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-02-09 09:16:48 -05:00
Simon Glass
edca8cf721 Convert CONFIG_SCSI_AHCI_PLAT et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SCSI_AHCI_PLAT
   CONFIG_SYS_SCSI_MAX_SCSI_ID
   CONFIG_SYS_SCSI_MAX_LUN
   CONFIG_SYS_SATA_MAX_DEVICE

Drop CONFIG_SCSI for everything except the sandbox build. We only need
one build for tests.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-02-09 09:16:48 -05:00
Simon Glass
ce30e3ff1e scsi: Drop CONFIG_SYS_SCSI_MAX_DEVICE
This is defined based on two other CONFIGs for all boards except sandbox
and durian.

For sandbox the value does not matter. For durian the value seems
excessive.

Drop the option completely, to simplify configuration and reduce the
number of things we need to convert to Kconfig.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-02-09 09:16:48 -05:00
Simon Glass
f73a756182 ahci: Make ahci drivers depend on AHCI
At present all ahci drivers depend on AHCI except for DWC_AHCI. But no
boards enable that without also enabling AHCI:

   /tools/moveconfig.py -f ~AHCI DWC_AHCI
   0 matches

Group them together and sort them in order by Kconfig name (except for
AHCI_MVEBU which uses a different naming convention).

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-02-09 09:16:48 -05:00
Simon Glass
e7b02781f5 sata: sata_sil: Only support BLK
No boards use this driver without CONFIG_BLK, so clean up the dead code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-02-09 09:16:48 -05:00
Simon Glass
6edb5dd388 sata: Rearrange Kconfig for SATA
Move the SATA options inside an 'if SATA' part, so they are grouped.

Fix the 'Complient' typo while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-02-09 09:16:48 -05:00
Simon Glass
580937bcd8 sata: Only support BLK
No boards currently use SATA without BLK:

   ./tools/moveconfig.py -f SATA ~BLK
   0 matches

Make SATA depend on BLK to avoid any future confusion. Drop the dead code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-02-09 09:16:48 -05:00
Simon Glass
e32ec06c9e sata: Drop Silicon Image SIL3114 SATA driver
This is not used in U-Boot and has not been converted to driver model.
Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-02-09 09:16:48 -05:00
Alper Nebi Yasak
a8c281d4b7 Convert CONFIG_REMAKE_ELF to Kconfig
This converts the following to Kconfig:
   CONFIG_REMAKE_ELF

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-02-09 09:16:47 -05:00
Simon Glass
4b4b1de85d Drop CONFIG_SYS_PIO_MODE
This option is not used in U-Boot. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-02-09 09:16:47 -05:00
Simon Glass
d2da54bfc4 Convert CONFIG_SYS_IDE_MAXBUS et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_IDE_MAXBUS
   CONFIG_SYS_IDE_MAXDEVICE
   CONFIG_SYS_ATA_BASE_ADDR
   CONFIG_SYS_ATA_STRIDE
   CONFIG_SYS_ATA_DATA_OFFSET
   CONFIG_SYS_ATA_REG_OFFSET
   CONFIG_SYS_ATA_ALT_OFFSET
   CONFIG_SYS_ATA_IDE0_OFFSET
   CONFIG_SYS_ATA_IDE1_OFFSET
   CONFIG_ATAPI
   CONFIG_IDE_RESET

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-02-09 09:16:47 -05:00
Simon Glass
e30be6e406 ide: Drop CONFIG_IDE_AHB
This is not used in U-Boot anymore. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-02-09 09:16:47 -05:00
Simon Glass
2b4806e481 buildman: Allow adjusting board config on the fly
Add a -a option to specify changes to the config before the build
commences. For example

   buildman -a ~CONFIG_CMDLINE

disables CONFIG_CMDLINE before doing the build.

This makes it easier to try things out as well as to write tests without
creating a new board or manually manging the .config file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-02-08 23:07:59 -05:00
Simon Glass
8ca0931a91 buildman: Provide a hint on how to debug thread crashes
If a thread crashes it is helpful to try the operation again with
threading disabled. Add a hint about that.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-02-08 23:07:59 -05:00
Simon Glass
19133b7184 buildman: Add helper functions for updating .config files
At present the only straightforward way to write tests that need a
slightly different configuration is to create a new board with its own
configuration. This is cumbersome.

It would be useful if buildman could adjust the configuration of a build
on the fly. In preparation for this, add a utility library which can
modify a .config file according to various parameters passed to it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-02-08 23:07:59 -05:00
Simon Glass
d10dc40283 buildman: Make use of test_util
Use test_util to run the tests, with the ability to select a single test
to run, if desired.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-02-08 23:07:59 -05:00
Simon Glass
433fa549e1 buildman: Add a flag to control the traceback
At present the full horror of the Python traceback is shown by default. It
is normally only useful for debugging. Turn it off by default and add a
--debug flag to enable it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-02-08 23:07:59 -05:00
Simon Glass
1d0f30e936 patman: Update test_util to run doc tests
At present this function does not run the doctests. Allow the caller to
pass these modules in as strings.

Update patman to use this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-02-08 23:07:59 -05:00
Simon Glass
ce3e75dc59 bloblist: Update to use conditional value
Use the new IF_ENABLED_INT() feature to avoid needing our own inline
function to handle this case. Tidy up the logic to ensure that the value
is only used when present. Update the 'expected' comment also.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-02-08 23:07:59 -05:00
Simon Glass
097ff01fb9 kconfig: Add support for conditional values
At present if an optional Kconfig value needs to be used it must be
bracketed by #ifdef. For example, with this Kconfig setup:

config WIBBLE
	bool "Support wibbles, the world needs more wibbles"

config WIBBLE_ADDR
	hex "Address of the wibble"
	depends on WIBBLE

then the following code must be used:

 #ifdef CONFIG_WIBBLE
 static void handle_wibble(void)
 {
 	int val = CONFIG_WIBBLE_ADDR;

	...
 }
 #endif

 static void init_machine()
 {
 ...
 #ifdef CONFIG_WIBBLE
	handle_wibble();
 #endif
 }

Add a new IF_ENABLED_INT() to help with this. So now it is possible to
write, without #ifdefs:

 static void handle_wibble(void)
 {
        int val = IF_ENABLED_INT(CONFIG_WIBBLE, CONFIG_WIBBLE_ADDR);

	...
 }

 static void init_machine()
 {
 ...
 if (IS_ENABLED(CONFIG_WIBBLE))
	handle_wibble();
 }

The value will be CONFIG_WIBBLE_ADDR if CONFIG_WIBBLE is defined and will
produce a build error if not.. This allows us to reduce the use of #ifdef
in the code, ensuring that the compiler still checks the code even if it
is not ultimately used for a particular build.

Add a CONFIG_IF_ENABLED_INT() version as well.

If an attempt is made to use a value that does not exist (i.e. when the
conditional is not enabled), an error about a non-existing function is
generated, e.g.:

common/bloblist.c:447: undefined reference to `invalid_use_of_IF_ENABLED_INT'

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-02-08 23:07:59 -05:00
Simon Glass
310bfa737f kconfig: Update IS_ENABLED() internals
The config_enabled() macro currently uses 0 as the default value. Update
it to allow any value, so we can pass it something else, such as a
non-existent function, to produce a build error if it is not defined.

Also tidy up the code style for IS_ENABLED() and drop the unnecessary
brackets (the value is a simple 0 or 1).

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-02-08 23:07:59 -05:00
Simon Glass
93cb515fe3 mmc: fsl: Use brackets around if()
At present the IS_ENABLED() macro has extra brackets, making it possible
to write:

   if IS_ENABLED(CONFIG_XXX)

but it is a bit confusing. Add the missing brackets.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-02-08 23:07:59 -05:00
Simon Glass
d67f9e35c4 mips: Avoid using config_enabled() directly
Use IS_ENABLED() instead, which is the correct macro for checking a CONFIG
option.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-02-08 23:07:59 -05:00
Simon Glass
5c86a8f7a1 imx: Don't define __ASSEMBLY__ in source files
This is supposed to be a build-system flag. Move it there so we can
define it before linux/kconfig.h is included.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-02-08 23:07:58 -05:00
Tom Rini
531c008945 Merge branch '2022-02-08-TI-platform-updates'
- J721S2 support, IPU support on DRA7, SIERRA PHY mulitlink
  configuration support, Nokia RX-51 DM_KEYBOARD conversion
2022-02-08 12:28:04 -05:00
Pali Rohár
f55d4978e1 Nokia RX-51: Convert to CONFIG_DM_KEYBOARD
Signed-off-by: Pali Rohár <pali@kernel.org>
2022-02-08 11:00:04 -05:00
Aswath Govindraju
5980925e2a include: configs: j721e_evm: Add support to boot ethfw core in j721e
Add configs to enable booting ethfw core in j721e

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2022-02-08 11:00:04 -05:00
Aswath Govindraju
a94d70ad37 arm: dts: k3-j721e: Add support for multilink PCIe + QSGMII
Add support for QSGMII multilink configuration.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2022-02-08 11:00:04 -05:00
Aswath Govindraju
68c6476146 phy: cadence: Sierra: Add support for skipping configuration
In some cases, a single SerDes instance can be shared between two different
processors, each using a separate link. In these cases, the SerDes
configuration is done in an earlier boot stage. Therefore, add support to
skip reconfiguring, if it is was already configured beforehand.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2022-02-08 11:00:04 -05:00
Swapnil Jakhade
fa294b274b phy: cadence: Sierra: Add PCIe + QSGMII PHY multilink configuration
Add register sequences for PCIe + QSGMII PHY multilink configuration.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2022-02-08 11:00:04 -05:00
Swapnil Jakhade
168fbf79db phy: cadence: Sierra: Add support for PHY multilink configurations
Add support for multilink configuration of Sierra PHY. Currently,
maximum two links are supported.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2022-02-08 11:00:03 -05:00
Swapnil Jakhade
960efc5edc phy: cadence: Sierra: Update single link PCIe register configuration
Add single link PCIe register configurations for no SSC and internal
SSC. Also, add missing PMA lane registers for external SSC.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2022-02-08 11:00:03 -05:00
Swapnil Jakhade
f0cb8096d9 phy: cadence: Sierra: Check PIPE mode PHY status to be ready for operation
PIPE phy status is used to communicate the completion of several PHY
functions. Check if PHY is ready for operation while configured for
PIPE mode during startup.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2022-02-08 11:00:03 -05:00
Swapnil Jakhade
48f29871f0 phy: cadence: Sierra: Check cmn_ready assertion during PHY power on
Check if PMA cmn_ready is set indicating the startup process is complete.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2022-02-08 11:00:03 -05:00
Swapnil Jakhade
990ce535eb phy: cadence: Sierra: Add PHY PCS common register configurations
Add PHY PCS common register configuration sequences for single link.
Update single link PCIe register sequence accordingly.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2022-02-08 11:00:03 -05:00
Swapnil Jakhade
445c8cf89b phy: cadence: Sierra: Rename some regmap variables to be in sync with Sierra documentation
No functional change. Rename some regmap variables as mentioned in Sierra
register description documentation.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2022-02-08 11:00:03 -05:00
Swapnil Jakhade
b6541d496f phy: cadence: Sierra: Add support to get SSC type from device tree.
Add support to get SSC type from DT.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2022-02-08 11:00:03 -05:00
Swapnil Jakhade
f74415a1ff dt-bindings: phy: cadence-sierra: Add binding to specify SSC mode
Add binding to specify Spread Spectrum Clocking mode used

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2022-02-08 11:00:03 -05:00
Swapnil Jakhade
14ed6703be phy: cadence: Sierra: Prepare driver to add support for multilink configurations
Sierra driver currently supports single link configurations only. Prepare
driver to support multilink multiprotocol configurations along with
different SSC modes.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2022-02-08 11:00:03 -05:00
Aswath Govindraju
3c1d89ff76 arm: dts: k3-j721e: Add support for PLL_CMNLC clocks in SerDes0
The PLL_CMNLC clocks are modelled as a child clock device of seirra. In the
function device_probe, the corresponding clocks are probed before calling
the device's probe. The PLL_CMNLC mux clock can only be created after the
device's probe. Therefore, move assigned-clocks and assigned-clock-parents
to the link nodes in U-Boot device tree file.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2022-02-08 11:00:03 -05:00
Aswath Govindraju
b361443154 board: ti: j721e: evm.c: Add support for probing SerDes0
Add support for probing, initializing and powering, SerDes0 instance.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2022-02-08 11:00:03 -05:00
Aswath Govindraju
ff0becea71 phy: ti: phy-j721e-wiz.c: Fix the condition for setting P_ENABLE_FORCE
Fix the condition for setting P_ENABLE_FORCE bit, by syncing with the
driver in kernel.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2022-02-08 11:00:03 -05:00
Aswath Govindraju
dd75927059 phy: cadence: Sierra: Model PLL_CMNLC and PLL_CMNLC1 as a clock
Sierra has two PLLs, PLL_CMNLC and PLL_CMNLC1 and each of these PLLs has
two inputs, plllc_refclk (input from pll0_refclk) and refrcv (input from
pll1_refclk). Model PLL_CMNLC and PLL_CMNLC1 as a clock so that it's
possible to select one of these two inputs from device tree.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2022-02-08 11:00:03 -05:00
Aswath Govindraju
6f46c7441a phy: cadence: Sierra: Add a UCLASS_PHY device for links
Add a driver of type UCLASS_PHY for each of the link nodes in the serdes
instance.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2022-02-08 11:00:03 -05:00
Kishon Vijay Abraham I
e7a2986ec7 phy: cadence: Sierra: Add missing clk_disable_unprepare() in .remove callback
Add missing clk_disable_unprepare() in cdns_sierra_phy_remove().

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2022-02-08 11:00:03 -05:00
Kishon Vijay Abraham I
8257437d0f phy: cadence: Sierra: Add array of input clocks in "struct cdns_sierra_phy"
Instead of having separate structure members for each input clock, add
an array for the input clocks within "struct cdns_sierra_phy". This is
in preparation for adding more input clocks required for supporting
additional clock combination.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2022-02-08 11:00:03 -05:00