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593 Commits

Author SHA1 Message Date
Wolfgang Denk
cd82919e6c Coding style cleanup, update CHANGELOG, prepare release
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-08-12 16:08:38 +02:00
Wolfgang Denk
17e900b8c0 MVBC_P: fix compile problem
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-08-12 14:54:04 +02:00
Wolfgang Denk
52b047ae48 MPC8272ADS: fix build error: 'bd_t' has no member named 'pci_clk'
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-08-12 12:10:11 +02:00
Wolfgang Denk
224f7a5679 Merge branch 'master' of /home/wd/git/u-boot/custodians 2008-08-12 11:47:54 +02:00
Wolfgang Denk
565ffbb9ee Merge branch 'master' of git://www.denx.de/git/u-boot-arm 2008-08-12 11:46:56 +02:00
Wolfgang Denk
c9c101c660 ads5121: fix compiler warnings (unused variables)
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-08-12 00:36:53 +02:00
Wolfgang Denk
b315ad8f0a Merge branch 'master' of git://git.denx.de/u-boot-nand-flash 2008-08-12 00:13:57 +02:00
Kumar Gala
902ca09246 85xx: Rename CONFIG_NR_CPUS to CONFIG_NUM_CPUS
Use CONFIG_NUM_CPUS to match existing define used by 86xx.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Jon Loeliger <jdl@freescale.com>
2008-08-12 00:09:29 +02:00
Kumar Gala
3216ca9692 Fix fallout from autostart revert
The autostart revert caused a bit of duplicated code as well as
code that was using images->autostart that needs to get removed so
we can build again.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-12 00:06:34 +02:00
Kumar Gala
3cf8a234b8 Fix compile error related to r8a66597-hcd & usb
When building the 8544DS board we get this error:

In file included from r8a66597-hcd.c:22:
u-boot/include/usb.h:190:2: error: #error USB Lowlevel not defined
make[1]: *** [r8a66597-hcd.o] Error 1

The cleanest fix is to only build r8a66597-hcd.c if CONFIG_USB_R8A66597_HCD
is set.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-12 00:00:03 +02:00
Becky Bruce
2d0daa0361 POWERPC 86xx: Move BAT setup code to C
This is needed because we will be possibly be locating
devices at physical addresses above 32bits, and the asm
preprocessing does not appear to deal with ULL constants
properly. We now call write_bat in lib_ppc/bat_rw.c.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
Acked-by: Jon Loeliger <jdl@freescale.com>
2008-08-11 23:53:59 +02:00
Becky Bruce
9de67149db POWERPC: Add synchronization to write_bat in lib_ppc/bat_rw.c
Perform sync/isync as required by the architecture.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
Acked-by: Jon Loeliger <jdl@freescale.com>
2008-08-11 23:52:49 +02:00
Becky Bruce
23f935c073 POWERPC: 86xx - add missing CONFIG_HIGH_BATS to sbc8641d config
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
Acked-by: Jon Loeliger <jdl@freescale.com>
2008-08-11 23:52:19 +02:00
Magnus Lilja
5276a3584d i.MX31: Fix mx31_gpio_mux() function and MUX_-macros.
Correct the mx31_gpio_mux() function to allow changing all i.MX31 IOMUX
contacts instead of only the first 256 ones as is the case prior to
this patch.

Add missing MUX_* macros and update board files to use the new macros.

Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
2008-08-11 23:33:57 +02:00
Magnus Lilja
b6b183c5b2 i.MX31: Fix IOMUX related typos
Correct the names of some IOMUX macros.

Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
2008-08-11 23:24:50 +02:00
Steve Sakoman
4d57b0fb29 OneNAND: Remove unused parameters to onenand_verify_page
The block and page parameters of onenand_verify_page() are not used. This causes a compiler error when CONFIG_MTD_ONENAND_VERIFY_WRITE is enabled.

Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
2008-08-11 15:07:46 -05:00
Stefan Roese
81c4dc3979 Merge branch 'master' of /home/stefan/git/u-boot/u-boot 2008-08-11 06:43:38 +02:00
Anatolij Gustschin
e84d568fa2 video: fix bug in cfb_console code
FILL_15BIT_555RGB macro extension for pixel swapping
by commit bed53753dd
introduced a bug in cfb_console:

Bitmaps with odd-numbered width won't be rendered
correctly and even U-Boot crashes are observed on
some platforms while repeated rendering of such
bitmaps with "bmp display". Also if a bitmap is
rendered to an odd-numbered x starting position,
the same problem occurs. This patch is an attempt
to fix it.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2008-08-11 00:24:58 +02:00
Anatolij Gustschin
d9015f6a50 video: fix bug in logo_plot
If logo_plot() should ever be called with x starting
position other than zero and for pixel depths greater
than 8bpp, logo colors distortion will be observed.
This patch fixes the issue.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2008-08-11 00:24:04 +02:00
Wolfgang Denk
406819ae94 MAINTAINERS: sort entries
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-08-11 00:17:52 +02:00
Roy Zang
cfc442d791 Add mpc7448hpc2 maintainer information
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
2008-08-11 00:14:58 +02:00
Gururaja Hebbar K R
a9fe0c3e7c common/cmd_load.c - Minor code & Coding Style cleanup
- os_data_header Variable is a carry over feature
   & unused. So removed all instance of this variable
 - Minor Code Style Update

Signed-off-by: Gururaja Hebbar <gururajakr@sanyo.co.in>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-08-11 00:13:27 +02:00
Magnus Lilja
0d28f34bbe Update the U-Boot wiki URL.
Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
2008-08-11 00:08:01 +02:00
dirk.behme@googlemail.com
aa5ffa16d7 OneNAND: Remove base address offset usage
While locally preparing some U-Boot patches for ARM based OMAP3 boards, some
using OneNAND and some using NAND, we found some differences in OneNAND and
NAND command address handling.

As this might confuse users (it already confused us), we like to align OneNAND
and NAND address handling.

The issue is that cmd_onenand.c subtracts the onenand base address from the
addresses you type into the u-boot command line so, unlike nand, you can't
use addresses relative to the start of the onenand part e.g. this won't work:

onenand read 82000000 280000 400000

you have to use:

onenand read 82000000 20280000 400000

Looking at recent git, the only board currently using OneNAND is Apollon, and
for this the OneNAND base address is 0 (apollon.h)

#define	CFG_ONENAND_BASE	0x00000000

so patch below won't break any existing boards and will align OneNAND and NAND
handling on boards where OneNAND base address is != 0.

Signed-off-by: Steve Sakoman <sakoman@gmail.com>
Signed-off-by: Manikandan Pillai <mani.pillai@ti.com>
Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
2008-08-10 22:45:04 +02:00
Kumar Gala
c11528083e mpc85xx: workaround old binutils bug
The recent change to move the .bss outside of the image gives older
binutils (ld from eldk4.1/binutils-2.16) some headache:

ppc_85xx-ld: u-boot: Not enough room for program headers (allocated 3, need 4)
ppc_85xx-ld: final link failed: Bad value

We workaround it by being explicit about the program headers and not
assigning the .bss to a program header.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-10 22:41:12 +02:00
Wolfgang Denk
0bf202ec58 Revert "[new uImage] Add autostart flag to bootm_headers structure"
This reverts commit f5614e7926.

The commit was based on a misunderstanding of the (documented)
meaning of the 'autostart' environment variable. It might cause
boards to hang if 'autostart' was used, with the potential to brick
them. Go back to the documented behaviour.

Conflicts:

	common/cmd_bootm.c
	common/image.c
	include/image.h

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-08-10 01:26:26 +02:00
Wolfgang Denk
dedec4cfc8 Merge branch 'master' of git://git.denx.de/u-boot-at91 2008-08-10 01:04:50 +02:00
Wolfgang Denk
61c5b8c64d Merge branch 'master' of git://git.denx.de/u-boot-sh 2008-08-10 01:04:17 +02:00
Wolfgang Denk
91eb5d663d Merge branch 'master' of git://git.denx.de/u-boot-usb 2008-08-10 01:02:27 +02:00
Wolfgang Denk
cd5b7d4a1e Merge branch 'master' of git://git.denx.de/u-boot-net 2008-08-10 01:01:41 +02:00
Wolfgang Denk
fe749f0cef Merge branch 'master' of git://git.denx.de/u-boot-mpc512x 2008-08-10 00:51:26 +02:00
Wolfgang Denk
29f8f58ff4 TQM8xx{L,M}: try to normalize config files for TQM8xx? based board
- enable CFI driver where this was forgotten
- enable mtdparts support
- adjust default environment
etc.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-08-09 23:17:32 +02:00
Peter Tyser
41266c9b5a FIT: Fix handling of images without ramdisks
boot_get_ramdisk() should not treat the case when a FIT image does
not contain a ramdisk as an error.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Michal Simek <monstr@monstr.eu>
2008-08-09 17:36:06 +02:00
Sergey Lapin
f77d92a3f5 DataFlash: AT45DB021 fix and AT45DB081 support
Fix for page size of AT45DB021. Also adding bigger AT45DB081
which comes with some newer boards.

Signed-off-by: Sergey Lapin <slapin@ossfans.org>
2008-08-09 00:15:06 +02:00
Nobuhiro Iwamatsu
ba9324451b sh: Update sh7763rdp config
Add sh_eth support to sh7763rdp.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
2008-08-09 01:06:29 +09:00
Wolfgang Denk
21f971ec26 TQM823L: re-enable logo support; update LCD_INFO text
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-08-08 16:43:01 +02:00
Wolfgang Denk
3b8d17f0f0 TQM8xxL: fix support for second flash bank
When switching the TQM8xxL modules to use the CFI flash driver,
support for the second flash bank was broken because the CFI driver
did not support dynamically sized banks. This gets fixed now.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-08-08 16:41:56 +02:00
Wolfgang Denk
2a112b234d CFI: allow for dynamically determined flash sizes and addresses
The CFI driver allowed only for static initializers in the
CFG_FLASH_BANKS_LIST definition, i. e. it did not allow to map
several flash banks contiguously if the bank sizes were not known in
advance, which kind of violates U-Boot's design philosophy.

(will be used for example by the TQM8xxL boards)

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-08-08 16:39:54 +02:00
Ben Warren
d9d78ee46d QE UEC: Fix compiler warnings
Moved static functions earlier in file so forward declarations are not needed.

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-08-07 23:26:35 -07:00
David Saada
d5d28fe4aa QE UEC: Add MII Commands
Add MII commands to the UEC driver. Note that once a UEC device is selected,
any device on its MDIO bus can be addressed.

Signed-off-by: David Saada <david.saada@ecitele.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-08-07 22:57:36 -07:00
Yoshihiro Shimoda
fd0f2f3796 usb: add support for R8A66597 usb controller
add support for Renesas R8A66597 usb controller.
This patch supports USB Host mode.

Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: Markus Klotzbuecher <mk@denx.de>
2008-08-07 17:37:36 +02:00
Hunter, Jon
1d10dcd041 Add support for OMAP5912 and OMAP16xx to usbdcore_omap1510.c
Add support to drivers/usb/usbdcore_omap1510.c for OMAP5912 and OMAP16xx devices.

Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Signed-off-by: Markus Klotzbuecher <mk@denx.de>
2008-08-07 17:32:10 +02:00
Steven A. Falco
eab1007334 ppc4xx: Sequoia has two UARTs in "4-pin" mode. Configure the GPIOs as per schematic.
The Sequoia board has two UARTs in "4-pin" mode. This patch modifies the GPIO
configuration to match the schematic, and also sets the SDR0_PFC1 register to
select the corresponding mode for the UARTs.

Signed-off-by: Steven A. Falco <sfalco@harris.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2008-08-07 12:06:18 +02:00
Kenneth Johansson
6689484ccd mpc5121: Move iopin features from board specific to common files.
And in the process eliminate some duplicate register defines.

Signed-off-by: Kenneth Johansson <kenneth@southpole.se>
2008-08-05 20:45:34 -06:00
John Rigby
ef11df6b66 mpc5121: squash some fdt fixup errors
On ADS5121 when booting linux the following errors are seen:
    Unable to update property /soc5121@80000000:bus-frequency, err=FDT_ERR_NOTFOUND
    Unable to update property /soc5121@80000000/ethernet@2800:local-mac-address, err=FDT_ERR_NOTFOUND
    Unable to update property /soc5121@80000000/ethernet@2800:address, err=FDT_ERR_NOTFOUND

This is caused by ft_cpu_setup trying to deal with
both old and new soc node naming.  This patch
fixes this by being smarter about what to
fixup.

Also do soc node fixups by compatible instead of by path.
A new board config called OF_SOC_COMPAT defined
to be "fsl,mpc5121-immr" replaces the old
OF_SOC node path that was defined to be "soc@80000000".

Old device trees still work, but the compatiblity
is conditional on CONFIG_OF_SUPPORT_OLD_DEVICE_TREES
which is on by default in include/configs/ads5121.h.

Signed-off-by: John Rigby <jrigby@freescale.com>
2008-08-05 19:58:21 -06:00
Markus Klotzbuecher
0f2b5d8ec0 Merge branch 'master' of git://www.denx.de/git/u-boot 2008-08-04 19:18:14 +02:00
Jean-Christophe PLAGNIOL-VILLARD
81091f58f0 drivers/serial: Move conditional compilation to Makefile for CONFIG_* macros
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-08-03 02:24:52 +02:00
Jean-Christophe PLAGNIOL-VILLARD
4cd7e6528f nios2/sysid: fix printf warning
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-08-03 02:24:46 +02:00
Jean-Christophe PLAGNIOL-VILLARD
66da6fa0e3 Fix remaining build issues with MPC8xx FADS boards.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-08-03 02:24:16 +02:00
Jean-Christophe PLAGNIOL-VILLARD
81d3f1fddd nios2: fix phys_addr_t and phys_size_t support
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-08-03 02:19:16 +02:00
Jean-Christophe PLAGNIOL-VILLARD
5fa62000db mvbc_p: Fix problem with '#if (CONFIG_CMD_KGDB)'
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-08-03 02:18:46 +02:00
Wolfgang Denk
9314a342e1 Merge branch 'master' of /home/wd/git/u-boot/master/ 2008-08-01 21:57:32 +02:00
Mark Jackson
1464eff77e Fix bitmap display for atmel lcd controller
The current lcd_display_bitmap() function does not work properly
for the Atmel LCD controller.

2 fixes need to be done:-

(a) when setting the colour map, use the lcd_setcolreg() function
    as provided by the Atmel driver
(b) the data is never actually written to the lcd framebuffer !!

Signed-off-by: Mark Jackson <mpfj@mimc.co.uk>
2008-08-01 12:42:50 +02:00
Jean-Christophe PLAGNIOL-VILLARD
2a433c66b1 qemu_mips: update README to follow qemu update about default machine
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-08-01 12:42:02 +02:00
TsiChung Liew
ac169d645f ColdFire: Fix compilation issue caused by a missing function
Implement usec2ticks() which is used by fsl_i2c.c in
lib_m68k/time.c

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-08-01 12:37:45 +02:00
TsiChung Liew
01ae85b58b Fix compilation error for TASREG
TASREG is ColdFire platform, the include ppc4xx.h in
board/esd/common/flash.c causes conflict.

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-08-01 12:35:35 +02:00
TsiChung Liew
35d3bd3cc3 Fix compilation error for MCF5275
Rename OBJ to COBJ in board/platform/Makefile

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-08-01 12:33:59 +02:00
TsiChung Liew
5c40548f01 Fix compile error caused by incorrect function return type
Rename int mii_init(void) to void mii_init(void) for idmr
ColdFire platform

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-08-01 12:33:10 +02:00
Wolfgang Denk
a58c78067c Fix build issues with MPC8xx FADS boards.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-08-01 12:06:22 +02:00
Wolfgang Denk
4b50cd12a3 Prepare v1.3.4-rc2: update CHANGELOG
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-31 17:54:03 +02:00
Wolfgang Denk
2bb6a1044f Merge branch 'master' of ssh://10.10.0.7/home/wd/git/u-boot/master 2008-07-31 17:50:37 +02:00
Mark Jackson
a48311557d Add gzipped logo support
The README file states that CONFIG_VIDEO_BMP_GZIP behaves as follows:

  If this option is set, additionally to standard BMP
  images, gzipped BMP images can be displayed via the
  splashscreen support or the bmp command.

However, the splashscreen function *only* supports standard BMP images.

This patch adds the documented gzip support.

Signed-off-by: Mark Jackson <mpfj@mimc.co.uk>
2008-07-31 17:48:50 +02:00
Mark Jackson
a5bcb01fbd Fix Atmel LCD controller endianess for AVR32 processors
The Atmel lcd controller is used on Atmel's AT91 (little endian) and
AVR32 (big endian) platforms.

As such, the controller can handle both big and little endian memory.

This patch fixes the driver for the AVR32 platform.

Signed-off-by: Mark Jackson <mpfj@mimc.co.uk>
2008-07-31 17:47:37 +02:00
Jean-Christophe PLAGNIOL-VILLARD
cdb8bd2fd3 apollon: fix build out of tree
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-07-31 17:46:44 +02:00
Guennadi Liakhovetski
2e752be39d Uncompressed images loaded to their start address shall set load_end too
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Acked-by: Bartlomiej Sieka <tur@semihalf.com>
2008-07-31 17:41:00 +02:00
Wolfgang Denk
c37207d7f5 Fix printf() format problems with configurable prompts
U-Boot allows for configurable prompt strings using the
CONFIG_AUTOBOOT_PROMPT resp. CONFIG_MENUPROMPT definitions. So far,
the assumption was that any such user defined problts would contain
exactly one "%d" format specifier. But some boards did not.

To allow for flexible boot prompts without adding too complex code we
now allow to specify the whole list of printf() arguments in the user
definition. This is powerful, but requires a responsible user who
really understands what he is doing, as he needs to know for exanple
which variables are available in the respective context.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-31 17:08:27 +02:00
Wolfgang Denk
5475412063 TQM85xx: fix typo introduce by commit ffbb5cb9
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-31 17:02:14 +02:00
Wolfgang Denk
0b4951d4cd mvbc_p board: fix most build warnings.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-31 15:27:01 +02:00
Wolfgang Denk
c4ec6db074 E1000: clean up CONFIG_E1000_FALLBACK_MAC handling
Avoid "integer constant is too large for 'long' type" warnings.
And simplify the code.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-31 13:57:20 +02:00
Wolfgang Denk
f7c602ac8b Merge branch 'master' of ssh://10.10.0.7/home/wd/git/u-boot/master 2008-07-31 12:30:40 +02:00
Matvejchikov Ilya
9196b44334 8260: Making the use of gd->pci_clk dependant on the CONFIG_PCI
Signed-off-by: Matvejchikov Ilya <matvejchikov@gmail.com>
2008-07-31 11:35:16 +02:00
Matvejchikov Ilya
6361ad4b59 PPC: Add pci_clk in the global_data for CPM2 processors
This patch adds pci_clk field to the global_data structure for the
processors which have CPM2 module in case the CONFIG_PCI is defined.

Signed-off-by: Matvejchikov Ilya <matvejchikov@gmail.com>
2008-07-31 11:34:49 +02:00
Kumar Gala
f0ff885ca6 mpc85xx: Update linker scripts for Freescale boards
* Move to using absolute addressing always.  Makes the scripts a bit more
  portable and common
* Moved .bss after the end of the image.  These allows us to have more
  room in the resulting binary image for code and data.
* Removed .text object files that aren't really needed
* Make sure _end is 4-byte aligned as the .bss init code expects this.
  (Its possible that the end of .bss isn't 4-byte aligned)

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-31 11:33:23 +02:00
Kumar Gala
57c219ad5d Fix compile warnings in dlmalloc
The origional code was using on odd reference to get to the first
real element in av_[].  The first two elements of the array are
not used for actual bins, but for house keeping.  If we are more
explicit about how use the first few elements we can get rid of the
warnings:

dlmalloc.c: In function 'malloc_extend_top':
dlmalloc.c:1971: warning: dereferencing type-punned pointer will break strict-aliasing rules
dlmalloc.c:1999: warning: dereferencing type-punned pointer will break strict-aliasing rules
dlmalloc.c:2029: warning: dereferencing type-punned pointer will break strict-aliasing rules
...

The logic of how this code came to be is:
	bin_at(0) = (char*)&(av_[2]) - 2*SIZE_SZ

SIZE_SZ is the size of pointer, and av_ is arry of pointers so:
	bin_at(0) = &(av_[0])

Going from there to bin_at(0)->fd or bin_at(0)->size should be straight forward.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-31 11:21:15 +02:00
Stefan Roese
3f9ae1a5d4 ppc4xx: Fix W7OLMG compile problems by adding missing LM75 defines
Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-31 10:44:59 +02:00
Stefan Roese
ebb86c4ecd cmd_bootm.c: Fix problem with '#if (CONFIG_CMD_USB)'
A recent patch used '#if (CONFIG_CMD_USB)' instead of
'#if defined(CONFIG_CMD_USB)'. This patch fixes this problem and makes
common/bootm.c compile again.

Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Markus Klotzbuecher <mk@denx.de>
2008-07-31 10:44:26 +02:00
Kyungmin Park
2cb9080427 Remove unused I2C at apollon board
There are no I2C devices on this board.

Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2008-07-31 10:35:43 +02:00
Wolfgang Denk
3c95960e52 at91rm9200dk, csb637: fix NAND related build problems
Tried fixing NAND support for the at91rm9200dk board; untested.
Disabled NAND support in the csb637 board config file.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-31 10:12:09 +02:00
Wolfgang Denk
695a29b768 Merge branch 'master' of /home/wd/git/u-boot/custodians 2008-07-31 09:02:41 +02:00
Wolfgang Denk
861931c30b Merge branch 'master' of git://git.denx.de/u-boot-avr32 2008-07-31 09:02:03 +02:00
Kumar Gala
09d318a8bb fsl_i2c: Use timebase timer functions instead of get_timer()
The current implementation of get_timer() is only really useful after we
have relocated u-boot to memory.  The i2c code is used before that as part
of the SPD DDR setup.

We actually have a bug when using the get_timer() code before relocation
because the .bss hasn't been setup and thus we could be reading/writing
a random location (probably in flash).

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-30 01:25:31 +02:00
Wolfgang Denk
1ca9950b46 Merge branch 'master' of git://git.denx.de/u-boot-mips 2008-07-30 01:24:07 +02:00
Frank Svendsbøe
4fc72a0d6c Adder8xx: Fix CFG_MONITOR_LEN
Due to increased space usage, U-Boot can no longer be stored in three sectors.
The current U-Boot use just over three flash sectors (197k), and U-Boot will
become corrupt after saving environment variables. This patch adds another 64k
to CFG_MONITOR_LEN.

Signed-off-by: Frank E. Svendsbøe <frank.svendsboe@gmail.com>
2008-07-30 01:21:20 +02:00
Kyungmin Park
a4c59ad4a2 Add OneNAND IPL related files to gitignore
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2008-07-30 01:12:35 +02:00
Rafal Jaworowski
8d87589e8e API: Teach the storage layer about SATA and MMC options.
Signed-off-by: Rafal Czubak <rcz@semihalf.com>
Acked-by: Rafal Jaworowski <raj@semihalf.com>
2008-07-30 01:01:28 +02:00
Rafal Jaworowski
6b73b754f7 API: Dump contents of sector 0 in the demo application.
Signed-off-by: Rafal Czubak <rcz@semihalf.com>
Acked-by: Rafal Jaworowski <raj@semihalf.com>
2008-07-30 01:00:36 +02:00
Rafal Jaworowski
13ca6305f2 API: Correct storage enumeration routine, other minor fixes in API storage area.
Signed-off-by: Rafal Czubak <rcz@semihalf.com>
Acked-by: Rafal Jaworowski <raj@semihalf.com>
2008-07-30 00:59:53 +02:00
Rafal Jaworowski
05c7fe0f04 API: Fix compilation warnings in api_examples/demo.c.
Signed-off-by: Rafal Czubak <rcz@semihalf.com>
2008-07-30 00:59:16 +02:00
Jean-Christophe PLAGNIOL-VILLARD
c14eefcc48 Fix more printf() format warnings
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-07-30 00:54:25 +02:00
Jean-Christophe PLAGNIOL-VILLARD
936897d4d1 Fix remaining CFG_CMD_ define, ifdef and comments
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-07-30 00:48:07 +02:00
Stefano Babic
5d1d00fb36 Add include for config.h in command.h.
Because the cmd_tbl_s structure depends on the configuration file, it
must be assured that config.h is included before the structure is
evaluated by the compiler. If this is not certain, it could happen
that the compiler generates structures of different size, depending
on the fact if the source file includes <config.h> before or after
<command.h>.

The effect is that u-boot crashes when tries to relocate the command
table (for ppc) or try to access to the command table for other
architectures.

The problem can happen on board-depending commands. All general
commands under /common are unaffected, because they include already
config.h before command.h.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2008-07-30 00:45:42 +02:00
Scott Wood
2dacb734ba NAND: $(obj)-qualify ecc.h in kilauea NAND boot Makefile.
This fixes building out-of-tree.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-07-30 00:37:08 +02:00
Heiko Schocher
36d59bd9da Fix warnings if compiling with IDE support.
cmd_ide.c:827: Warnung: weak declaration of `ide_outb' after first use results in unspecified behavior
cmd_ide.c:839: Warnung: weak declaration of `ide_inb' after first use results in unspecified behavior

Signed-off-by: Heiko Schocher <hs@denx.de>
2008-07-30 00:29:52 +02:00
Adrian Filipi
7610db17fd Removed support for the adsvix board.
Support for the adsvix was originally provided by Applied Data
Systems (ADS), inc., now EuroTech, Inc.
The board never shipped aside from some sample boards.

Signed-off-by: Adrian Filipi <adrian.filipi@eurotech.com>
2008-07-30 00:26:03 +02:00
Remy Bohmer
f96b44cef8 ARM: set GD_FLG_RELOC for boards skipping relocation to RAM
If CONFIG_SKIP_RELOCATE_UBOOT is set the flag GD_FLG_RELOC is usually
never set, because relocation to RAM is actually never done by U-boot
itself. However, several pieces of code check if this flag is set at
some time.

So, to make sure this flag is set on boards skipping relocation, this
is added to the initialisation of U-boot at a moment where it is safe
to do so.

Signed-off-by: Remy Bohmer <linux@bohmer.net>
2008-07-30 00:13:04 +02:00
Timur Tabi
e4dafff86f fsl-i2c: fix writes to data segment before relocation
Prevent i2c_init() in fsl_i2c.c from writing to the data segment before
relocation.  Commit d8c82db4 added the ability for i2c_init() to program the
I2C bus speed and save the value in i2c_bus_speed[], which is a global
variable.  It is an error to write to the data segment before relocation,
which is what i2c_init() does when it stores the bus speed in i2c_bus_speed[].

Signed-off-by: Timur Tabi <timur@freescale.com>
2008-07-30 00:10:13 +02:00
Wolfgang Ocker
dbd3238792 mips: Fix baudrate divisor computation on alchemy cpus
Use CFG_MIPS_TIMER_FREQ when computing the baudrate divisor
on alchemy cpus.

Signed-off-by: Wolfgang Ocker <weo@reccoware.de>
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
2008-07-30 00:40:54 +09:00
Haavard Skinnemoen
ba17540844 Merge branch 'format-warnings' of git://git.denx.de/u-boot-avr32 2008-07-24 12:42:31 +02:00
Haavard Skinnemoen
a229d291f3 spi flash: Fix printf() format warnings
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-07-23 16:15:01 +02:00
Haavard Skinnemoen
252a5e0738 atmel_mci: Fix printf() format warnings
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-07-23 16:15:01 +02:00
Haavard Skinnemoen
7f4b009f42 avr32: Fix printf() format warnings
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-07-23 16:15:01 +02:00
Haavard Skinnemoen
a79c3e8d9c avr32: asm/io.h needs asm/types.h
map_physmem() takes a phys_addr_t as parameter. This type is defined in
asm/types.h, so we need to include that file.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-07-23 10:52:19 +02:00
Markus Klotzbuecher
ab06bddb04 Merge branch 'master' of git://www.denx.de/git/u-boot 2008-07-21 12:37:56 +02:00
Michal Simek
1953d128fd microblaze: Fix printf() format issues
Signed-off-by: Michal Simek <monstr@monstr.eu>
2008-07-20 23:10:34 +02:00
Gururaja Hebbar K R
de2a07e534 Remove unused code from lib_arm/bootm.c
Signed-off-by: Gururaja Hebbar <gururajakr@sanyo.co.in>
2008-07-20 23:09:14 +02:00
Detlev Zundel
ffbb5cb942 tqm85xx: Demystify 'DK: !!!' comment
Signed-off-by: Detlev Zundel <dzu@denx.de>
2008-07-20 23:07:42 +02:00
Detlev Zundel
b2f44ba570 83xx/85xx/86xx: Add LTEDR local bus definitions
Signed-off-by: Detlev Zundel <dzu@denx.de>
2008-07-20 23:07:37 +02:00
Ricardo Ribalda Delgado
f13f64cf42 serial_xuartlite.c: fix compiler warnings
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
2008-07-20 23:04:52 +02:00
Stefan Roese
86446d3a5d POST: Add disable interrupts in some of the missing CPU POST tests
Some CPU POST tests did not disable the interrupts while running. This
seems to be necessary to protect this self modifying code.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-20 23:00:22 +02:00
Stefan Roese
97a3bf268d ide: Use CFG_64BIT_LBA instead of CFG_64BIT_STRTOUL
This is needed for boards that define CFG_64BIT_STRTOUL but don't define
CFG_64BIT_LBA.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-20 22:59:32 +02:00
Niklaus Giger
0043ac5502 POST PPC4xx/spr IVPR only if PPC440
The SPR IVPR register is only present (as far as I know) for
processors with a PPC440 core.

Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
Acked-by: Stefan Roese <sr@denx.de>
2008-07-20 22:58:46 +02:00
Wolfgang Denk
20a71d93d6 Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx 2008-07-20 22:55:32 +02:00
Stefan Roese
1092fbd647 ppc4xx: Enable 64bit printf format on 440/460 platforms
This patch defines CFG_64BIT_VSPRINTF and CFG_64BIT_STRTOUL for all
440/460 platforms. This may be needed since those platforms support
36bit physical address space.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-18 16:02:40 +02:00
Stefan Roese
66fe183b1d ppc4xx: Fix incorrect MODTx setup for some DIMM configurations
This patch fixes a problem with incorrect MODTx (On Die Termination)
setup for a configuration with multiple DIMM's and multiple ranks.
Without this change Katmai was unable to boot Linux with DDR2 frequency
>= 533MHz and mem>=3GB. With this patch Katmai successfully boots Linux
with DDR2 frequency = 640MHz and mem=4GB.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-18 15:57:23 +02:00
Sebastian Siewior
340ccb260f cfi_flash: fix flash on BE machines with CFG_WRITE_SWAPPED_DATA
This got broken by commits 93c56f212c
 [cfi_flash: support of long cmd in U-boot.]

That command needs to be in little endian format on BE machines
with CFG_WRITE_SWAPPED_DATA. Without this patch, the command 0xf0
gets saved on stack as 0x00 00 00 f0 and 0x00 gets written into
the cmdbuf in case portwidth = chipwidth = 8bit.

Cc: Alexey Korolev <akorolev@infradead.org>
Cc: Vasiliy Leonenko <vasiliy.leonenko@mail.ru>
Signed-off-by: Sebastian Siewior <bigeasy@linutronix.de>
2008-07-17 11:42:35 +02:00
Wolfgang Denk
699f051255 Prepare v1.3.4-rc1: Code cleanup, update CHANGELOG, sort Makefile
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-15 22:22:44 +02:00
Hugo Villeneuve
bcab74baa6 Round the serial port clock divisor value returned by calc_divisor()
Round the serial port clock divisor value returned by
calc_divisor()

Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
Acked-by: Gerald Van Baren <vanbaren@cideas.com>
2008-07-15 21:53:29 +02:00
Robin Getz
0328ef0edf Fix DHCP protocol so U-Boot does not respond too early
on the network with it's offered IP number; it should not reply until
after it has received a DHCP ACK message. Also ensures that U-Boot
does it's DHCPREQUEST as broadcast (per RFC 2131).

Signed-off-by: Robin Getz <rgetz@blackfin.uclinux.org>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-15 21:44:46 +02:00
Sebastian Siewior
7288f972fc cfi_flash: make the command u32 only
This got changed by commit 93c56f212c
[cfi_flash: support of long cmd in U-boot.]

Long is the wrong type because it will behave differently on 64bit
machines in a way that is probably not expected. u32 should be
enough.

Cc: Alexey Korolev <akorolev@infradead.org>
Cc: Vasiliy Leonenko <vasiliy.leonenko@mail.ru>
Signed-off-by: Sebastian Siewior <bigeasy@linutronix.de>
2008-07-15 21:42:04 +02:00
Jean-Christophe PLAGNIOL-VILLARD
31cfe57491 tools/gitignore: update to all generated files
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-07-15 21:40:21 +02:00
Wolfgang Denk
03849c13c6 Merge branch 'master' of git://git.denx.de/u-boot-mpc5xxx 2008-07-15 21:39:43 +02:00
Wolfgang Denk
508548371e Merge branch 'master' of git://git.denx.de/u-boot-mpc86xx 2008-07-15 21:39:07 +02:00
Wolfgang Denk
b5b7db9c87 Merge branch 'master' of git://git.denx.de/u-boot-sh 2008-07-15 21:38:21 +02:00
Wolfgang Denk
1d28d48e3d Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2008-07-15 21:37:23 +02:00
Andre Schwarz
5e0de0e216 mpc5xxx: Add MVBC_P board support
The MVBC_P is a MPC5200B based camera system with Intel Gigabit ethernet
controller (using e1000) and custom Altera Cyclone-II FPGA on PCI.

Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2008-07-15 10:12:58 -06:00
Timur Tabi
e2d31fb345 Update Freescale sys_eeprom.c to handle CCID formats
Update the sys_eeprom.c file to handle both NXID and CCID EEPROM formats.  The
NXID format replaces the older CCID format, but it's important to support both
since most boards out there still use the CCID format.  This change is in
preparation for using one file to handle both formats.  This will also unify
EEPROM support for all Freescale 85xx and 86xx boards.

Also update the 86xx board header files to use the standard CFG_I2C_EEPROM_ADDR
instead of ID_EEPROM_ADDR.

Signed-off-by: Timur Tabi <timur@freescale.com>
2008-07-15 10:59:27 -05:00
Nobuhiro Iwamatsu
d85f46a25c pci: sh: Add pci_skip_dev and pci_print_dev function
Add function of new PCI, pci_skip_dev and pci_print_dev.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2008-07-15 12:24:37 +09:00
Andy Fleming
1107014e83 Clean up INIT_RAM options
The L2_INIT_RAM option was unused, and recent changes to the TLB code
meant that the INIT_RAM TLBs weren't being cleared out.  In order to reduce
the amount of mapped space attached to nothing, we change things so the TLBs
get cleared.

Signed-off-by: Andy Fleming <afleming@freescale.com>
2008-07-14 20:29:07 -05:00
Andy Fleming
4524561820 Remove fake flash bank from 8544 DS
The fake flash bank was generating errors for anyone who didn't have a
PromJET hooked up to the board.  As that constitutes the vast majority of
users, we remove it.

Signed-off-by: Andy Fleming <afleming@freescale.com>
2008-07-14 20:26:57 -05:00
Kumar Gala
630d9bfcb5 MPC8544DS: Add ATI Video card support
Add support for using a PCIe ATI Video card on PCIe2.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-14 20:21:11 -05:00
Kumar Gala
7f9f4347cf 85xx: Add some L1/L2 SPR register definitions
Add new L1/L2 SPRs related to e500mc cache config and control.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-14 20:19:59 -05:00
Kumar Gala
e5852787f0 MPC8544DS: Report board id, board version and fpga version.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-14 20:15:22 -05:00
Kumar Gala
73f15a060f 85xx: Cleanup L2 cache size detection
The L2 size detection code was a bit confusing and we kept having to add
code to it to handle new processors.  Change the sense of detection so we
look for the older processors that aren't changing.

Also added support for 1M cache size on 8572.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-14 20:14:20 -05:00
Paul Gortmaker
c3ca7e5e00 sbc8560: enable CONFIG_OF_LIBFDT by default
Make the default build for the sbc8560 board be powerpc
capable with libfdt support.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
2008-07-14 20:08:52 -05:00
Andy Fleming
6b44a44ec2 Fix indentation for default boot environment variables
This was proposed by Paul Gortmaker in response to Wolfgang's comments on
similar #defines in sbc8560.h.

Signed-off-by: Andy Fleming <afleming@freescale.com>
2008-07-14 20:04:40 -05:00
Paul Gortmaker
37fef49910 sbc8560: add default fdt values
Add in the default fdt settings and the typical EXTRA_ENV
settings as borrowed from the mpc8560ads.  Fix a couple
of stale references to the mpc8560ads dating back to the
original clone/fork.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2008-07-14 20:00:41 -05:00
Paul Gortmaker
d04e76edf9 sbc8560: add in ft_board_setup()
Add in for the sbc8560, the ft_board_setup() routine, based on what is
in use for the Freescale MPC8560ADS board.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
2008-07-14 19:53:39 -05:00
Paul Gortmaker
c158bcaca3 sbc8560: define eth0 and eth1 instead of eth1 and eth2
The existing config doesn't define CONFIG_HAS_ETH0, and so the
fdt support doesn't update the zeros in the dtb local-mac with
real data from the u-boot env.  Since the existing config is
tailored to just two interfaces, get rid of the ETH2 definitions
at the same time.

Also don't include any end user specific data into the environment
by default -- things like MAC address, network parameters etc. need
to come from the end user.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2008-07-14 19:47:20 -05:00
Paul Gortmaker
0ec436d2f9 sbc8560: properly set cs0_bnds for 512MB
The sbc8560 board ships with 512MB of memory installed,
but the current cs0_bnds is hard coded for 256MB.  Set the
value based on CFG_SDRAM_SIZE.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
2008-07-14 19:35:03 -05:00
Paul Gortmaker
6de5bf2400 sbc8560: proper definitions for TSEC.
The definitions for the TSEC have become out of date.  There is no
longer any such options like "CONFIG_MPC85xx_TSEC1" or similar.
Update to match those of other boards, like the MPC8560ADS.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
2008-07-14 19:34:10 -05:00
Paul Gortmaker
71074abbe0 8xxx-fdt: set ns16550 clock from CFG_NS16550_CLK, not bi_busfreq
Some boards that have external 16550 UARTs don't have a direct
tie between bi_busfreq and the clock used for the UARTs.  Boards
that do have such a tie should set CFG_NS16550_CLK to be
get_bus_freq(0) -- which most of them do already.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
2008-07-14 18:56:51 -05:00
Andrew Klossner
24ef76f320 Change the temp map to ROM to align addresses to page size.
With a page size of BOOKE_PAGESZ_16M, both the real and effective
addresses must be multiples of 16MB.  The hardware silently truncates
them so the code happens to work.  This patch clarifies the situation
by establishing addresses that the hardware doesn't need to truncate.

Signed-off-by: Andrew Klossner <andrew@cesa.opbu.xerox.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2008-07-14 18:46:32 -05:00
Kim Phillips
06b4186c10 mpc85xx: use IS_E_PROCESSOR macro
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-07-14 17:01:34 -05:00
Kim Phillips
6b70ffb9d1 fdt: add crypto node handling for MPC8{3, 5}xxE processors
Delete the crypto node if not on an E-processor.  If on 8360 or 834x family,
check rev and up-rev crypto node (to SEC rev. 2.4 property values)
if on an 'EA' processor, e.g. MPC8349EA.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-07-14 17:01:29 -05:00
Hugo Villeneuve
85e5808e8e ARM DaVinci: Remove extern phy_t declaration by moving code to proper place
ARM DaVinci: Remove extern phy_t declaration by moving
code to proper place.

Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
2008-07-14 23:40:55 +02:00
Hugo Villeneuve
3a9e7ba2ac ARM DaVinci: Remove duplicate definitions of MACH_TYPE and prototype of i2c_init()
ARM DaVinci: Remove duplicate definitions of MACH_TYPE
and prototype of i2c_init().

Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
2008-07-14 23:40:55 +02:00
Kumar Gala
348753d416 Fix some more printf() format problems.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-14 23:01:01 +02:00
Wolfgang Denk
45b16d22c6 Fix coding style; make code better parsable by external tools
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-14 22:38:42 +02:00
Wolfgang Denk
b880cbf207 cpu/i386/serial.c: Fix syntax errors
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-14 21:19:08 +02:00
Wolfgang Denk
e2d45e6f4d elppc board: Coding style cleanup.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-14 20:41:35 +02:00
Wolfgang Denk
82b24a8a50 elppc board: fix syntax error.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-14 20:40:22 +02:00
Wolfgang Denk
0fe340585a EB+MCF-EV123 board: fix coding style (alingment)
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-14 20:38:26 +02:00
Wolfgang Denk
6841785a0b EB+MCF-EV123 board: fix syntx error
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-14 20:36:44 +02:00
Andy Fleming
ab5cda9f88 Remove LBC_CACHE_BASE from 8544 DS
The 8544 DS doesn't have any cacheable Local Bus memories set up.  By mapping
space for some anyway, we were allowing speculative loads into unmapped space,
which would cause an exception (annoying, even if ultimately harmless).
Removing LBC_CACHE_BASE, and using LBC_NONCACHE_BASE for the LBC LAW solves the
problem.

Signed-off-by: Andy Fleming <afleming@freescale.com>
2008-07-14 11:21:33 -05:00
Wolfgang Denk
d0ff51ba5d Code cleanup: fix old style assignment ambiguities like "=-" etc.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-14 15:19:07 +02:00
Wolfgang Denk
d7854223c5 AmigaOneG3SE: remove dead and incomplete files
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-14 15:10:53 +02:00
Wolfgang Denk
b64f190b7a Fix printf() format issues with sizeof_t types by using %zu
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-14 15:06:35 +02:00
Jean-Christophe PLAGNIOL-VILLARD
f354b73e16 vsprintf: add z and t options
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-07-14 14:36:52 +02:00
Wolfgang Denk
25dbe98abb Fix some more printf() format issues.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-13 23:07:35 +02:00
Wolfgang Denk
d5996dd555 Fix some more printf() format problems.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-13 19:51:00 +02:00
Wolfgang Denk
0f9d5f6d6e ADS5121: Fix (delete) incorrect ads5121_diu_init() prototype
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-13 19:48:26 +02:00
Anatolij Gustschin
322716a1d1 Fix bug in Lime video driver
We need to wait while drawing engine clears frame
buffer before any further software accesses to frame
buffer will be initiated. Otherwise software drawn
parts could be partially destroyed by the drawing
engine or even GDC chip freeze could occur (as
observed on socrates board).

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2008-07-13 16:55:59 +02:00
Jean-Christophe PLAGNIOL-VILLARD
0a5676befb Fix some more printf() format issues.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-07-13 16:55:00 +02:00
Michal Simek
18c8a28aad hwmon: rename CONFIG_DS1722 to CONFIG_DTT_DS1722
Signed-off-by: Michal Simek <monstr@monstr.eu>
Acked-by: Stefan Roese <sr@denx.de>
2008-07-13 15:35:02 +02:00
Michal Simek
6ecbb45bb0 hwmon: Cleaning hwmon devices
Clean Makefile
Move device specific values to driver for better reading

Signed-off-by: Michal Simek <monstr@monstr.eu>
Acked-by: Stefan Roese <sr@denx.de>
2008-07-13 15:26:18 +02:00
Michal Simek
c78fce699c FIS: repare incorrect return value with ramdisk handling
Microblaze and PowerPC use boot_get_ramdisk for loading
ramdisk to memory with checking return value.
Return 0 means success. Return 1 means failed.
Here is correspond part of code from bootm.c which check
return code.

ret = boot_get_ramdisk (argc, argv, images, IH_ARCH_PPC,
		&rd_data_start, &rd_data_end);
if (ret)
	goto error;

Signed-off-by: Michal Simek <monstr@monstr.eu>
2008-07-13 15:23:12 +02:00
Michal Simek
84a2c64a26 microblaze: Remove useless ancient headers
Signed-off-by: Michal Simek <monstr@monstr.eu>
2008-07-13 15:20:17 +02:00
Michal Simek
53ea981c31 microblaze: Clean uartlite driver
Redesign uartlite driver to in_be32 and out_be32 macros
Fix missing header in io.h

Signed-off-by: Michal Simek <monstr@monstr.eu>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
2008-07-13 15:19:35 +02:00
Marcel Ziswiler
dbf3dfb386 Enable passing of ATAGs required by latest Linux kernel. 2008-07-13 15:14:52 +02:00
Hugo Villeneuve
ef130d3093 Fix integer overflow warning in calc_divisor()
which happened when rounding the serial port clock divisor

Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
2008-07-13 15:13:31 +02:00
Marcel Ziswiler
6b760189d7 Fix build time warnings in function mmc_decode_csd()
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
2008-07-13 15:06:52 +02:00
Hugo Villeneuve
c15947d6ce ARM: Fix for broken compilation when defining CONFIG_CMD_ELF
caused by missing dcache status/enable/disable functions.

Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
2008-07-13 15:05:11 +02:00
Stefan Roese
068c1b77c8 ppc4xx: Remove redundant ft_board_setup() functions from some 4xx boards
This patch removes some ft_board_setup() functions from some 4xx boards.
This can be done since we now have a default weak implementation for this
in cpu/ppc4xx/fdt.c. Only board in need for a different/custom
implementation like canyonlands need their own version.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-13 15:04:11 +02:00
Wolfgang Denk
d39a089f8b Add last known maintainer for orphaned boards; reformat.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-13 14:58:16 +02:00
Haavard Skinnemoen
5c761d57bb Remove kharris@nexus-tech.net from MAINTAINERS
Mail to kharris@nexus-tech.net bounces because the user doesn't exist
anymore. You can't be a maintainer without a valid e-mail address, so
move all boards that used to be maintained by Kyle Harris to the
"orphaned" list.

Currently, only PowerPC has a list of orphaned boards, so this patch
creates one for ARM as well.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-07-13 14:47:46 +02:00
Wolfgang Denk
a0b4dc2063 Merge branch 'master' of /home/wd/git/u-boot/custodians 2008-07-13 14:45:06 +02:00
Wolfgang Denk
d8eb5cf9a7 Merge branch 'master' of git://git.denx.de/u-boot-mpc512x 2008-07-13 14:44:56 +02:00
Wolfgang Denk
c90d115913 Merge branch 'master' of /home/wd/git/u-boot/custodians 2008-07-13 14:44:12 +02:00
Wolfgang Denk
0740ac26f4 Merge branch 'master' of git://git.denx.de/u-boot-coldfire 2008-07-13 14:44:04 +02:00
Wolfgang Denk
dc42c7c080 Merge branch 'master' of /home/wd/git/u-boot/custodians 2008-07-13 14:43:57 +02:00
Wolfgang Denk
af577da586 Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx 2008-07-13 14:42:55 +02:00
Anatolij Gustschin
17bd170714 at91: Fix to enable using Teridian MII phy (78Q21x3) with at91sam9260
On the at91sam9260ep development board there is an EEPROM
connected to the TWI interface (PA23, PA24 Peripheral A
multiplexing), so we cannot use these pins as ETX2, ETX3.
This patch configures PA10, PA11 pins for ETX2, ETX3
instead of PA23, PA24 pins.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Manuel Sahm <Manuel.Sahm@feig.de>
2008-07-13 14:41:45 +02:00
Wolfgang Denk
a07351fdba Merge branch 'master' of git://git.denx.de/u-boot-at91 2008-07-13 14:40:30 +02:00
Kenneth Johansson
f889265753 fix DIU for small screens
The DIU_DIV register is 8 bit not 5 bit. This prevented large DIV values
so it was not possible to set a slow pixel clock and thus prevented
display on small screens.

Signed-off-by: Kenneth Johansson <kenneth@southpole.se>
Acked-by: John Rigby <jrigby@freescale.com>
2008-07-12 13:34:15 -06:00
John Rigby
b60b857387 ADS5121 cleanup compile warnings
board/ads5121/iopin.c
    Replace bit fields in struct iopin_t with a single
    field and intialize it via plain old macros.
    This fixes the type pun warnings and makes the code
    more readable.

board/ads5121/ads5121.c
    Add include iopin.h to ads5121.c for the iopin_initialize
    prototype.

    Add an extern void ads5121_diu_init(void)

Signed-off-by: John Rigby <jrigby@freescale.com>
2008-07-12 13:33:59 -06:00
Wolfgang Denk
bde6358762 Fix some more printf() format issues.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-11 22:56:11 +02:00
Wolfgang Denk
184f1b404a Fixed some out-of-tree build issues
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-11 22:55:31 +02:00
TsiChung Liew
47bf9c71ae ColdFire: Fix FB CS not setup properly for Mcf5282
Remove all CFG_CSn_RO in cpu/mcf52x2/cpu_init.c. If
CFG_CSn_RO is defined as 0, the chipselect will not
be assigned.

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-07-11 10:45:59 -06:00
TsiChung Liew
bc3ccb139f ColdFire: Fix incorrect define for mcf5227x and mcf5445x RTC
Rename CONFIG_MCFTMR to CONFIG_MCFRTC to include real time
clock module in cpu/<cf arch>/cpu_init.c

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-07-11 10:45:59 -06:00
TsiChung Liew
f94945b517 ColdFire: Fix incorrect board name in MAKEALL for M5253EVBE
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-07-11 10:45:58 -06:00
TsiChung Liew
0e0c4357d1 Fix compile error caused by missing timer function
Add #define CONFIG_MCFTMR in EB+MCF-EV123.h configuration file

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-07-11 10:45:58 -06:00
TsiChung Liew
c37ea03117 Fix compile error caused by incorrect function return type
Rename int mii_init(void) to void mii_init(void)

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-07-11 10:45:58 -06:00
TsiChung Liew
ab4860b255 ColdFire: Fix power up issue for MCF5235
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-07-11 10:45:58 -06:00
TsiChung Liew
dd08e97361 ColdFire: Fix compiling error for MCF5275
The compiling error was caused by missing a closed parentheses
in speed.c

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-07-11 10:45:58 -06:00
TsiChung Liew
94603c2fd4 ColdFire: Fix timer issue for MCF5272
The timer was assigned to wrong timer memory mapped which
caused udelay() and timer() not working properly.

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-07-11 10:45:57 -06:00
TsiChung Liew
3b1e8ac9b4 ColdFire: Change invalid JMP to BRA caught by new v4e toolchain
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
2008-07-11 10:45:57 -06:00
TsiChung Liew
8371dc2066 ColdFire: Add -got=single param for new linux v4e toolchains
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
2008-07-11 10:45:57 -06:00
TsiChung Liew
56d52615cd ColdFire: Fix code flash configuration for M547x/M548x boards
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
2008-07-11 10:45:57 -06:00
TsiChung Liew
6e37091afc ColdFire: Fix warning messages by passing correct data type in board.c
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-07-11 10:45:57 -06:00
TsiChung Liew
81cc32322a ColdFire: Fix UART baudrate formula
The formula "counter = (u32) (gd->bus_clk / gd->baudrate) / 32"
can generate the wrong divisor due to integer division truncation.
Round the calculated divisor value by adding 1/2 the baudrate
before dividing by the baudrate.

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Acked-by: Gerald Van Baren <vanbaren@cideas.com>
2008-07-11 10:45:56 -06:00
Stefan Roese
b578fb4714 ppc4xx: Fix include sequence in 4xx_pcie.c
This patch now moves common.h to the top of the inlcude list. This
is needed for boards with CONFIG_PHYS_64BIT set (e.g. katmai), so that
the phys_size_t/phys_addr_t are defined to the correct size in this
driver.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-11 15:07:23 +02:00
Wolfgang Denk
9b55a25369 Fix some more print() format errors.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-11 01:16:00 +02:00
Jean-Christophe PLAGNIOL-VILLARD
fdd70d1921 MAKEALL: remove duplicated at91 from ARM9 list and add LIST_at91 to arm
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-07-10 23:01:02 +02:00
Sergey Lapin
c6457e3b8b DataFlash AT45DB021 support
Some boards based on AT91SAM926X-EK use smaller DF chips to keep
bootstrap, u-boot and its environment, using NAND or other external
storage for kernel and rootfs. This patch adds support for
small 1024x263 chip.

Signed-off-by: Sergey Lapin <slapin@ossfans.org>
2008-07-10 22:50:28 +02:00
Kim Phillips
4109df6f75 silence misc printf formatting compiler warnings
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-07-10 22:12:09 +02:00
Wolfgang Denk
4b13860e74 Merge branch 'master' of git://git.denx.de/u-boot-mpc512x 2008-07-10 22:09:39 +02:00
Wolfgang Denk
79d14faf54 Merge branch 'master' of git://www.denx.de/git/u-boot-mpc86xx 2008-07-10 21:53:51 +02:00
Markus Klotzbücher
3d71c81a9b USB: shutdown USB before booting
This patch fixes a potentially serious issue related to USB which was
discouvered by Martin Krause <martin.krause@tqs.de> and fixed for
ARM920T. Martin wrote:

  Turn off USB to prevent the host controller from writing to the
  SDRAM while Linux is booting. This could happen, because the HCCA
  (Host Controller Communication Area) lies within the SDRAM and the
  host controller writes continously to this area (as busmaster!), for
  example to increase the HccaFrameNumber variable, which happens
  every 1 ms.

This is a slightly modified version of the patch in order to shutdown
USB when booting on all architectures.

Signed-off-by: Markus Klotzbuecher <mk@denx.de>
2008-07-10 21:47:44 +02:00
Martha Marx
f31c49db2a Configuration changes for ADS5121 Rev 3
ADS5121 Rev 3 board is now the default config

config targets are now

ads5121_config
    Rev 3 board with
	PCI
	M41T62 on board RTC
	512MB DRAM

ads5121_rev2_config
    Rev 2 board with
	No PCI
	256MB DRAM

Signed-off-by: Martha Marx <mmarx@silicontkx.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: John Rigby <jrigby@freescale.com>
2008-07-10 11:36:42 -06:00
Martha Marx
16bee7b0dc Consolidate ADS5121 IO Pin configuration
Consolidate ADS5121 IO Pin configuration to one file
board/ads5121/iopin.c.

Remove pin config from cpu/mpc512x/fec.c

Signed-off-by: Martha Marx <mmarx@silicontkx.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: John Rigby <jrigby@freescale.com>
2008-07-10 11:36:32 -06:00
Jon Loeliger
859f24350e Merge commit 'wd/master' 2008-07-10 12:05:32 -05:00
Christian Eggers
d4692b0ba8 Fix "usb part" command
Only print partition for selected device if user supplied the <dev>
arg with the "usb part [dev]" command.

Signed-off-by: Christian Eggers <ceggers@gmx.de>
Acked-by: Markus Klotzbuecher <mk@denx.de>
2008-07-10 10:53:04 -06:00
Harald Welte
cc83b27217 fix USB devices with multiple configurations
This patch fixes bugs in usbdcore*.c related to the use of devices
with multiple configurations.

The original code made mistakes about the meaning of configuration value and
configuration index, and the resulting off-by-one errors resulted in:

* SET_CONFIGURATION always selected the first configuration, no matter what
  wValue is being passed.
* GET_DESCRIPTOR/CONFIGURATION always returned the descriptor for the first
  configuration (index 0).

Signed-off-by: Harald Welte <laforge@openmoko.org>
Acked-by: Markus Klotzbuecher <mk@denx.de>
2008-07-10 10:53:04 -06:00
Markus Klotzbuecher
2624239558 Merge branch 'master' of git://www.denx.de/git/u-boot 2008-07-10 16:03:26 +02:00
Wolfgang Denk
e0320b1ebe Merge branch 'master' of ssh://10.10.0.7/home/wd/git/u-boot/master 2008-07-10 13:16:34 +02:00
Wolfgang Denk
06c53beae1 Fix some more print() format errors.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-10 13:16:09 +02:00
Christian Eggers
d4b5f3fa00 Fix "usb part" command
Only print partition for selected device if user supplied the <dev>
arg with the "usb part [dev]" command.

Signed-off-by: Christian Eggers <ceggers@gmx.de>
Acked-by: Markus Klotzbuecher <mk@denx.de>
2008-07-10 12:24:29 +02:00
Harald Welte
e73b5212e0 fix USB devices with multiple configurations
This patch fixes bugs in usbdcore*.c related to the use of devices
with multiple configurations.

The original code made mistakes about the meaning of configuration value and
configuration index, and the resulting off-by-one errors resulted in:

* SET_CONFIGURATION always selected the first configuration, no matter what
  wValue is being passed.
* GET_DESCRIPTOR/CONFIGURATION always returned the descriptor for the first
  configuration (index 0).

Signed-off-by: Harald Welte <laforge@openmoko.org>
Acked-by: Markus Klotzbuecher <mk@denx.de>
2008-07-10 11:51:52 +02:00
Wolfgang Denk
c4b81f3238 Merge branch 'master' of git://www.denx.de/git/u-boot-ppc4xx 2008-07-10 10:50:38 +02:00
Stefan Roese
e870690bdc MTD/NAND: Fix printf format warning in nand code
This patch fixes NAND related printf format warning. Those warnings are
now visible since patch dc4b0b38d4
[Fix printf errors.] by Andrew Klossner has been applied. Thanks, this is
really helpful.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-10 10:46:13 +02:00
Markus Klotzbuecher
794a592497 Merge branch 'master' of git://www.denx.de/git/u-boot 2008-07-10 10:26:07 +02:00
Stefan Roese
10943c9afa rtc: Fix printf format warning in m41t60.c
Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-10 10:17:33 +02:00
Stefan Roese
dc1da42f81 pci: Move PCI device configuration check into a separate weak function
This patch moves the check, if a device should be skipped in PCI PNP
configuration into the function pci_skip_dev(). This function is defined
as weak so that it can be overwritten by a platform specific one if
needed. The check if the device should get printed in the PCI summary upon
bootup (when CONFIG_PCI_SCAN_SHOW is defined) is moved to the function
pci_print_dev() which is also defined as weak too.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-10 10:10:32 +02:00
Stefan Roese
b002144e1d ppc4xx: Fix printf format warnings now visible with the updated format check
This patch fixes ppc4xx related printf format warning. Those warnings are
now visible since patch dc4b0b38d4
[Fix printf errors.] by Andrew Klossner has been applied. Thanks, this is
really helpful.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-10 09:58:06 +02:00
Stefan Roese
5d812b8b4a ppc4xx: Enable support for > 2GB SDRAM on AMCC Katmai
Newer PPC's like 440SPe, 460EX/GT can be equipped with more than 2GB of SDRAM.
To support such configurations, we "only" map the first 2GB via the TLB's. We
need some free virtual address space for the remaining peripherals like, SoC
devices, FLASH etc.

Note that ECC is currently not supported on configurations with more than 2GB
SDRAM. This is because we only map the first 2GB on such systems, and therefore
the ECC parity byte of the remaining area can't be written.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-10 09:14:01 +02:00
Larry Johnson
cf1c2ed91d ppc4xx: Remove implementation of testdram() from Korat board support
Signed-off-by: Larry Johnson <lrj@acm.org>
Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-10 09:10:48 +02:00
Larry Johnson
47ce4a28cc ppc4xx: Update and add FDT to Korat board support
Signed-off-by: Larry Johnson <lrj@acm.org>
Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-10 09:10:48 +02:00
Stefan Roese
ac5ba41c22 Merge branch 'master' of /home/stefan/git/u-boot/u-boot 2008-07-10 09:09:45 +02:00
Wolfgang Denk
4188f04918 Minor coding style cleanup; update CHANGELOG
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-10 01:13:30 +02:00
Wolfgang Denk
40234535ee Merge branch 'master' of git://www.denx.de/git/u-boot-nand-flash 2008-07-10 00:59:04 +02:00
Paul Gortmaker
8915f1189c e1000: add support for 82545GM 64bit PCI-X copper variant
This PCI-X e1000 variant works by just adding in the correct
PCI IDs in the appropriate places.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
2008-07-10 00:52:48 +02:00
Daniel Hellstrom
21ae6ca031 SPARC: Build error fix
(introduced by commit 391fd93ab2)

This patch makes SPARC targets build again. It is caused by
phys_addr_t and phys_size_t being defined in the wrong header
file. include/lmb.h need those typedefs to build.

Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
2008-07-10 00:51:16 +02:00
Marcel Ziswiler
11ccc33fa2 Many spelling fixes in README.
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
2008-07-10 00:50:05 +02:00
Marcel Ziswiler
dbab0691d2 Minor spelling fix in comment.
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
2008-07-10 00:49:37 +02:00
Hugo Villeneuve
89134ea1f6 Round the serial port clock divisor value returned by calc_divisor()
Round the serial port clock divisor value returned by
calc_divisor().

Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
Signed-off-by: John Roberts <john.roberts@pwav.com>
2008-07-10 00:48:31 +02:00
Scott Wood
9d2e3947b2 NAND: ifdef-protect most of nand.h when using legacy NAND.
Some macros such as NAND_CTL_SETALE conflict between current and legacy
NAND, being defined by the subsystem in the former case and the board
config file in the latter.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-07-09 17:47:52 -05:00
Hugo Villeneuve
2b1fa9d383 ARM: Fix for wrong patch version applied for Lyrtech SFF-SDR board (ARM926EJS)
ARM: Fix for incorrect version of patch applied when
adding support for the Lyrtech SFF-SDR board.

Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
Signed-off-by: Philip Balister, OpenSDR <philip@opensdr.com>
2008-07-10 00:42:59 +02:00
Kyungmin Park
47042b363e Remove useless print message at apollon
Remove useless print message at apollon

Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2008-07-10 00:40:58 +02:00
Andy Fleming
98874ff329 Fix LMB type issues
The LMB code now uses phys_addr_t and phys_size_t.  Also, there were a couple
of casting problems in the bootm code that called the LMB functions.

Signed-off-by: Andy Fleming <afleming@freescale.com>
2008-07-10 00:39:28 +02:00
Kumar Gala
da8693a91b Fix compiler warnings
gcc-4.3.x generates the following:

bootm.c: In function 'do_bootm_linux':
bootm.c:208: warning: cast from pointer to integer of different size
bootm.c:215: warning: cast from pointer to integer of different size

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-10 00:34:30 +02:00
Harald Welte
5bb12dbd7a Remove code duplication for setting the default environment
common/env_common.c (default_env): new function that resets the environment to
		    the default value
common/env_common.c (env_relocate): use default_env instead of own copy
common/env_nand.c (env_relocate_spec): use default_env instead of own copy
include/environment.h: added default_env prototype

Signed-off-by: Werner Almesberger <werner@openmoko.org>
Signed-off-by: Harald Welte <laforge@openmoko.org>
2008-07-10 00:28:20 +02:00
Marcel Ziswiler
99c2b434d3 NAND: Fix warning due to missing env_ptr casts to u_char * in env_nand.c.
The writeenv() and readenv() calls introduced by the recently added bad block
management for environment variables were missing casts therefore producing
compile time warnings.
While at it fixing some typo in a comment and indentation.

Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-07-09 17:24:47 -05:00
Scott Wood
3167c5386e NAND: Rename DEBUG to MTDDEBUG to avoid namespace pollution.
This is particularly problematic now that non-NAND-specific code is
including <nand.h>, and thus all debugging code is being compiled
regardless of whether it was requested, as reported by Scott McNutt
<smcnutt@psyent.com>.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-07-09 17:24:47 -05:00
Haavard Skinnemoen
c3bf1ad7ba mmc: Move atmel_mci driver into drivers/mmc
This makes it easier to use the driver on other platforms.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Acked-by: Jean-Chritophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-07-10 00:05:52 +02:00
Haavard Skinnemoen
d2d54ea449 avr32: Use CONFIG_ATMEL_MCI to select the atmel_mci driver
After we move the atmel_mci driver into drivers/mmc, we can't select
it with CONFIG_MMC anymore. Introduce a new symbol specifically for
this driver so that there's no ambiguity.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Acked-by: Jean-Chritophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-07-10 00:04:47 +02:00
Haavard Skinnemoen
5ce13051a4 Create drivers/mmc subdirectory
In order to consolidate more of the various MMC drivers around the
tree, we must first have a common place to put them.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Acked-by: Jean-Chritophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-07-10 00:02:36 +02:00
Joakim Tjernlund
b502611b51 Change env_get_char from a global function ptr to a function
This avoids an early global data reference.

Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
2008-07-09 23:59:30 +02:00
Matvejchikov Ilya
27269417ad Some copy-n-paste fixes in printf usage
Signed-off-by: Matvejchikov Ilya <matvejchikov@gmail.com>
2008-07-09 23:58:33 +02:00
Matvejchikov Ilya
0e6989b9fa FDT memory and pci node fixes for MPC8260ADS
Signed-off-by: Matvejchikov Ilya <matvejchikov@gmail.com>
2008-07-09 23:57:59 +02:00
Andrew Klossner
dc4b0b38d4 Fix printf errors.
The compiler will help find mismatches between printf formats and
arguments if you let it.  This patch adds the necessary attributes to
declarations in include/common.h, then begins to correct the resulting
compiler warnings.  Some of these were bugs, e.g., "$d" instead of
"%d" and incorrect arguments.  Others were just annoying, like
int-long mismatches on a system where both are 32 bits.  It's worth
fixing the annoying errors to catch the real ones.

Signed-off-by: Andrew Klossner <andrew@cesa.opbu.xerox.com>
2008-07-09 23:55:46 +02:00
Wolfgang Denk
a292d2265e Merge branch 'master' of git://www.denx.de/git/u-boot-mips 2008-07-09 23:24:23 +02:00
Wolfgang Denk
eee62c74cb Merge branch 'master' of git://www.denx.de/git/u-boot-cfi-flash 2008-07-09 23:23:39 +02:00
Wolfgang Denk
9692cab76f Merge branch 'master' of git://www.denx.de/git/u-boot-net 2008-07-09 23:22:54 +02:00
Wolfgang Denk
2caea1ebee Merge branch 'master' of git://www.denx.de/git/u-boot-sh 2008-07-09 23:09:36 +02:00
Becky Bruce
417faf285b Allow print_size to print in GB
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-07-09 22:50:20 +02:00
Jason McMullan
e7c374529c mips: When booting Linux images, add 'ethaddr' and 'eth1addr' to the environment
Add 'ethaddr' and 'eth1addr' to the Linux kernel environment if
they are set in the U-Boot environment.

Signed-off-by: Jason McMullan <mcmullan@netapp.com>
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
2008-07-08 22:31:31 +09:00
Stefan Roese
0192d7d56e jedec_flash: Fix AM29DL800BB device ID
As pointed out by Jerry Hicks, this patch corrects the device ID of
the Spansion AM29DL800BB NOR device. Verified against latest Spansion
datasheet (rev C4 from Dezember 2006).

Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-08 12:57:14 +02:00
Nobuhiro Iwamatsu
689c1b30ca sh: Fix compile error sh7763rdp board
Disable SH ether driver.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2008-07-08 12:04:20 +09:00
Nobuhiro Iwamatsu
9e23fe0560 sh: Fix SH-boards compile error
By Cleanup out-or-tree building for some boards (.depend)
(commit:c8a3b109f07f02342d097b30908965f7261d9f15)
because filse ware changed, some SH-boards have compile error.
I revised this problem.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2008-07-08 12:03:24 +09:00
Jason Jin
3473ab7372 Feed the watchdog in u-boot for 8610 board.
The watchdog on 8610 board is enabled by setting sw[6]
to on. Once enabled, the watchdog can not be disabled
by software. So feed the dog in u-boot is necessary for
normal operation.

Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2008-07-07 11:29:48 -05:00
Stefan Roese
7c6237b3e2 Merge branch 'master' of /home/stefan/git/u-boot/u-boot 2008-07-07 09:51:25 +02:00
Hugo Villeneuve
63676841ca Remove duplicate code in cpu/arm926ejs/davinci/lxt972.c.
Remove duplicate code in cpu/arm926ejs/davinci/lxt972.c.

Remove duplicate code in a if/else block in
cpu/arm926ejs/davinci/lxt972.c.
Fixed style issues.

Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-07-06 23:44:34 -07:00
Hugo Villeneuve
fec61431a0 Remove duplicate definitions in include/lxt971a.h.
Remove duplicate definitions in include/lxt971a.h.

Remove duplicate registers and bits definitions in
include/lxt971a.h for standard MII registers, and
use values in include/miiphy.h instead.

Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-07-06 23:44:34 -07:00
Nobuhiro Iwamatsu
9751ee0990 net: sh: Renesas SH7763 Ethernet device support
Renesas SH7763 has 2 channel Ethernet device.
This is 10/100/1000 Base support.
But this patch check 10/100 Base only.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-07-06 23:32:04 -07:00
Nobuhiro Iwamatsu
873d97aabc sh: Update Renesas R2DPlus board
New NOR Flash board support and remove old type flash board config.
And Remove network setting from config file.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2008-07-07 11:21:40 +09:00
Nobuhiro Iwamatsu
ec39d479d2 sh: Update Renesas R7780MP board
New NOR Flash board support and remove network setting from config file.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2008-07-07 11:21:40 +09:00
Nobuhiro Iwamatsu
c001cd604e sh: Update Renesas Migo-R board
Remove network setting from config file.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2008-07-07 11:21:40 +09:00
Nobuhiro Iwamatsu
f9599eca7c sh: Update Hitachi MS7722SE board
Remove network setting from config file.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2008-07-07 11:21:40 +09:00
Nobuhiro Iwamatsu
26209e48e8 sh: Cleanup source code of SH7763RDP
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2008-07-07 11:21:38 +09:00
Nobuhiro Iwamatsu
5cd5b2c96e sh: Cleanup source code of R2DPlus
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2008-07-07 11:21:38 +09:00
Nobuhiro Iwamatsu
4ec7e915cf sh: Cleanup source code of R7780MP
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2008-07-07 11:21:38 +09:00
Nobuhiro Iwamatsu
0955ef34c0 sh: Cleanup source code of MS7722SE
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2008-07-07 11:21:38 +09:00
Nobuhiro Iwamatsu
1d7b31d97b sh: Cleanup source code of MS7720SE
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2008-07-07 11:21:37 +09:00
Wolfgang Denk
c956717ab2 Merge branch 'master' of /home/wd/git/u-boot/custodians 2008-07-07 00:48:02 +02:00
Wolfgang Denk
4e0018f1cf Merge branch 'master' of git://www.denx.de/git/u-boot-at91 2008-07-07 00:47:58 +02:00
Wolfgang Denk
3ab4827cbe SH: fix out of tree building
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-07 00:45:03 +02:00
Wolfgang Denk
01981269c1 Merge branch 'master' of /home/wd/git/u-boot/custodians 2008-07-07 00:39:50 +02:00
Wolfgang Denk
b223017f08 Merge branch 'master' of git://www.denx.de/git/u-boot-avr32 2008-07-07 00:39:43 +02:00
Wolfgang Denk
b0f1c03607 Merge branch 'master' of /home/wd/git/u-boot/custodians 2008-07-07 00:33:07 +02:00
Wolfgang Denk
3070a9a3cb Merge branch 'master' of git://www.denx.de/git/u-boot-mpc83xx 2008-07-07 00:32:47 +02:00
Nobuhiro Iwamatsu
9047bfa1e7 net: smc911x: Fix typo
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
2008-07-07 00:31:27 +02:00
Andre Schwarz
5ed546fdd0 update mvBL-M7 board config
update mvBL-M7 config file to use UBOOT_VERSION and define
CONFIG_HIGH_BATS.

Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
2008-07-07 00:30:20 +02:00
Nobuhiro Iwamatsu
5cacc5d0ec net: fix compile problem in smc911x driver.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
2008-07-07 00:20:21 +02:00
Michal Simek
9fea65a6c4 ppc4xx: Rename CONFIG_XILINX_ML300 to CONFIG_XILINX_405
This change helps with better handling with others
Xilinx based platform.

Signed-off-by: Michal Simek <monstr@monstr.eu>
Acked-by: Stefan Roese <sr@denx.de>
2008-07-06 22:39:14 +02:00
Nobuhiro Iwamatsu
cbb6289569 net: ne2000: Move dev_addr variable from grobal to local.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-07-06 00:23:44 -07:00
Nobuhiro Iwamatsu
dd7e5fa5f8 net: ne2000: Fix compile error of NE2000
If enable DEBUG, can not compile ne2000 driver.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-07-06 00:23:44 -07:00
Ben Warren
dd35479a50 Add mechanisms for CPU and board-specific Ethernet initialization
This patch is the first step in cleaning up net/eth.c, by moving Ethernet
initialization to CPU or board-specific code.  Initial implementation is
only on the Freescale TSEC controller, but others will be added soon.

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-07-06 00:20:59 -07:00
Wolfgang Denk
7754f2be5d include/sha256.h: fix file permissions.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-06 01:21:46 +02:00
Wolfgang Denk
d86a0a6f7f Merge branch 'master' of ssh+git://mercury.denx.de/home/wd/git/u-boot/master
Conflicts:

	board/amirix/ap1000/serial.c
	board/exbitgen/exbitgen.c
	board/exbitgen/flash.c
	board/ml2/serial.c
	board/xilinx/ml300/serial.c

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-06 01:15:17 +02:00
Patrice Vilchez
d3bcdf838e [AT91SAM9] Fix NAND FLASH timings
Fix NAND FLASH timings for at91sam9x evaluation kits.

New timings are based on application note
"NAND Flash Support on AT91SAM9 Microcontrollers" available at
http://atmel.com/dyn/resources/prod_documents/doc6255.pdf

Signed-off-by: Patrice Vilchez <patice.vilchez@atmel.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Stelian Pop <stelian@popies.net>
2008-07-05 17:32:22 +02:00
Stelian Pop
19bd688484 Fix boot from NOR due to incorrect reset delay.
AT91 RSTC registers are battery-backuped, so their values
are not reset across power cycles. One of those registers,
the AT91_RSTC_MR register, is being modified by U-Boot, in
the ethernet initialisation routine, to generate a 500ms
user reset.

Unfortunately, this value is not being restored afterwards,
causing subsequent resets to also last for 500ms.

This long reset sequence causes problems (at least) in the
boot sequence from NOR: by the time the CPU tries to load
a program from the NOR flash, the latter is still in reset
and not yet available.

Additionaly, this patch fixes a bug in the original code which
caused the reset delay to last for 2s instead of 500ms.

Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-07-05 17:32:22 +02:00
Wolfgang Denk
f492dd636f Update CHANGELOG
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-04 20:11:49 +02:00
Wolfgang Denk
5e6e350fc4 CCM/SCM boards: fix out of tree building
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-04 20:07:35 +02:00
Wolfgang Denk
ab4c3a490d SCM board: fix build errors.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-03 23:22:27 +02:00
Wolfgang Denk
a566466f17 IAD210 board: fix ``"ALIGN" redefined'' warning.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-03 23:06:36 +02:00
Wolfgang Denk
ad75631479 CCM board: fix build errors.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-03 23:00:24 +02:00
Andre Schwarz
f16ed51702 update mvBL-M7 board config
update mvBL-M7 config file to use UBOOT_VERSION.

Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-07-03 15:43:21 -05:00
Wolfgang Denk
ced209c50e sacsng board: fix warnings "suggest explicit braces to avoid ambiguous 'else'"
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-03 22:39:21 +02:00
Wolfgang Denk
4ff170a818 Cleanup: fix "expected specifier-qualifier-list before 'phys_size_t'" errors
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-03 22:34:08 +02:00
Wolfgang Denk
730f298485 lmb: fix "implicit declaration of function 'lmb_free'" warning
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-03 22:04:17 +02:00
Wolfgang Denk
322ef5e28d Cleanup: remove redundant deleting on *~ files
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-02 23:53:23 +02:00
Wolfgang Denk
c8a3b109f0 Cleanup out-or-tree building for some boards (.depend)
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-02 23:49:18 +02:00
Wolfgang Denk
a30cc5a340 Cleanup: fix out-of-tree building for some boards
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-02 23:38:50 +02:00
Wolfgang Denk
461fa68d20 Cleanup: replace hard-wired $(AR) 'crv' settings by $(ARFLAGS)
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-02 23:00:14 +02:00
Detlev Zundel
5981ebd320 fdt: Fix typo in variable name.
Signed-off-by: Detlev Zundel <dzu@denx.de>
2008-07-02 16:49:52 +02:00
Gary Jennejohn
a7a5982cd0 Add logos for RRvision board
Signed-off-by: Gary Jennejohn <garyj@denx.de>
2008-07-02 16:36:35 +02:00
Esben Haabendal
ee4ae38342 mpc8260: add fdt_fixup_ethernet support
Add support for updating mac-address and local-mac-address in fdt for
all MPC8260 targets.

Signed-off-by: Esben Haabendal <eha@doredevelopment.dk>
2008-07-01 23:44:22 +02:00
Steven A. Falco
f6a69559d6 cmd_nvedit.c: clean up syntax highlighting
My text-editor (vim) has a bit of trouble syntax-highlighting the
cmd_nvedit.c file, because it apparently does not parse C
ifdef/else/endif. The following patch does not change the behavior of
the code at all, but does allow the editor to properly
syntax-highlight the file.

Signed-off-by: Steve Falco <sfalco@harris.com>
2008-07-01 23:06:53 +02:00
Steven A. Falco
75678c807a Make setenv() return status
Currently, the setenv function does not return an error code.
This patch allows to test for errors.

Signed-off-by: Steve Falco <sfalco@harris.com>
2008-07-01 23:03:14 +02:00
Kumar Gala
4928e97c85 PPC: Added fls, fls64, __ilog2_u64, and ffs64 to bitops
fls64, __ilog2_u64, ffs64 are variants that work on an u64,
and fls is used to implement them.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-01 21:47:12 +02:00
Magnus Lilja
83002a77cb i.MX31: Cleanup comments in lowlevel_init.S.
Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
2008-07-01 21:13:20 +02:00
Ben Warren
f8cc312bbe Move conditional compilation of MPC8XXX SPI driver to Makefile
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-07-01 21:02:11 +02:00
Juergen Kilb
d92ea21baf i.MX31: fixed CTRL-C detection
The Register URXD contains status information in bits [15..8].
With status bit 15 set, CTRL-C was reported as 0x8003 instead
of 0x03. Therefore CTRL-C was not detected.
To solve this, bits [15..8] were masked out now.

Signed-off-by: Juergen Kilb <J.Kilb@gmx.de>
Acked-by: Felix Radensky <felix@embedded-sol.com>
2008-07-01 20:54:04 +02:00
Stefan Roese
dd1c5523d6 ppc4xx: Fix 460EX/GT PCIe port initialization
This patch fixes a bug where the 460EX/GT PCIe UTLSET1 register was
configured incorrectly. Thanks to Olga Buchonina from AMCC for pointing
this out.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-01 17:03:19 +02:00
Jean-Christophe PLAGNIOL-VILLARD
b571afde02 add SHA256 support
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Francesco Albanese <Francesco.Albanese@swisscom.com>
2008-06-30 22:57:16 +02:00
Marian Balakowicz
3bab76a26e Delay FIT format check on sector based devices
Global FIT image operations like format check cannot be performed on
a first sector data, defer them to the point when whole FIT image was
uploaded to a system RAM.

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Partial ('cmd_nand' case) Acked-by: Grant Erickson <gerickson@nuovations.com>
NAND and DOC bits Acked-by: Scott Wood <scottwood@freescale.com>
2008-06-30 22:52:43 +02:00
Dave Liu
9810263afe sata: wait for device updating signature to host
The driver need wait for the device updating signature to host.
If we don't wait for it, the driver can not detect the device(disk)
when the system powers up.

Signed-off-by: Dave Liu <daveliu@freescale.com>
2008-06-30 22:13:47 +02:00
Detlev Zundel
a524e112b4 Merge branch 'master' of git://www.denx.de/git/u-boot-ppc4xx 2008-06-30 15:38:24 +02:00
Stefan Roese
745d8a0d3c ppc4xx: Fix 460EX errata with CPU lockup upon high AHB traffic
This patch implements a fix provided by AMCC so that the lockup upon
simultanious traffic on AHB USB OTG, USB 2.0 and SATA doesn't occur
anymore:

Set SDR0_AHB_CFG[A2P_INCR4] (bit 24) and clear SDR0_AHB_CFG[A2P_PROT2]
(bit 25) for a new 460EX errata regarding concurrent use of AHB USB OTG,
USB 2.0 host and SATA.

This errata is not officially available yet. I'll update the comment
to add the errata number later.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-06-30 15:20:41 +02:00
Stuart Wood
8b616edb11 serial_pl010.c: add watchdog support
Signed-off-by: Stuart Wood <stuart.wood@labxtechnologies.com>
2008-06-29 19:53:30 +02:00
Stuart Wood
86d3273e2b jffs2_1pass.c: add watchdog support
Signed-off-by: Stuart Wood <stuart.wood@labxtechnologies.com>
2008-06-29 19:51:12 +02:00
Sascha Laue
5744ddc663 Configure DSP POST; add watchdog reset to diag command
Signed-off-by: Sascha Laue <sascha.laue@liebherr.com>
2008-06-29 19:19:35 +02:00
Tor Krill
f135265178 Add sata sil3114 support
Signed-off-by: Tor Krill <tor@excito.com>
2008-06-29 12:42:18 +02:00
Wolfgang Denk
e093a24762 Coding Style Cleanup
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-06-28 23:34:37 +02:00
Wolfgang Denk
01db232dd7 Update CHANGELOG
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-06-28 23:16:01 +02:00
Hugo Villeneuve
c7f879ec2b ARM: Add support for Lyrtech SFF-SDR board (ARM926EJS)
This patch adds support for the Lyrtech SFF-SDR board,
based on the TI DaVinci architecture (ARM926EJS).

Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
Signed-off-by: Philip Balister <philip@balister.org>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-06-28 22:54:21 +02:00
Haavard Skinnemoen
341188b9cc MMC: Consolidate MMC/SD command definitions
This moves the MMC and SD Card command definitions from
include/asm/arch/mmc.h into include/mmc.h. These definitions are
given by the MMC and SD Card standards, not by any particular
architecture.

There's a lot more room for consolidation in the MMC drivers which
I'm hoping to get done eventually, but this patch is a start.

Compile-tested for all avr32 boards as well as lpc2292sodimm and
lubbock. This should cover all three mmc drivers in the tree.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-06-28 22:40:15 +02:00
Kyungmin Park
fa60edfc4c Use better Ethernet timings for apollon board
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2008-06-28 22:28:15 +02:00
Andy Fleming
41c5eaa725 Resize device tree to allow space for board changes and the chosen node
Current code requires that a compiled device tree have space added to the end to
leave room for extra nodes added by board code (and the chosen node).  This
requires that device tree creators anticipate how much space U-Boot will add to
the tree, which is absurd.  Ideally, the code would resize and/or relocate the
tree when it needed more space, but this would require a systemic change to the
fdt code, which is non-trivial.  Instead, we resize the tree inside
boot_relocate_fdt, reserving either the remainder of the bootmap (in the case
where the fdt is inside the bootmap), or adding CFG_FDT_PAD bytes to the size.

Signed-off-by: Andy Fleming <afleming@freescale.com>
2008-06-28 22:23:13 +02:00
Andy Fleming
7570a9941f Fix an underflow bug in __lmb_alloc_base
__lmb_alloc_base can underflow if it fails to find free space.  This was fixed
in linux with commit d9024df02ffe74d723d97d552f86de3b34beb8cc.  This patch
merely updates __lmb_alloc_base to resemble the current version in Linux.

Signed-off-by: Andy Fleming <afleming@freescale.com>
2008-06-28 22:22:05 +02:00
Andy Fleming
63796c4e61 Add lmb_free
lmb_free allows us to unreserve some memory so we can use lmb_alloc_base or
lmb_reserve to temporarily reserve some memory.

Signed-off-by: Andy Fleming <afleming@freescale.com>
2008-06-28 22:21:38 +02:00
Andy Fleming
4b03ac8b51 Add ALIGN() macro
ALIGN() returns the smallest aligned value greater than the passed
in address or size.  Taken from Linux.

Signed-off-by: Andy Fleming <afleming@freescale.com>
2008-06-28 22:20:29 +02:00
Stefan Roese
93262af85e ppc4xx: Fix compilation problems with phys_size_t
This patch includes <asm/types.h> before <asm/u-boot.h> in some 4xx
board specific files where it has been missing.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-06-28 14:08:38 +02:00
Haavard Skinnemoen
28eab0d773 Conditionally add -fno-stack-protector to CFLAGS
When compile-testing on powerpc, I get errors like this:

net/nfs.c:422: undefined reference to `__stack_chk_fail_local'

This seems to be because -fstack-protector is on by default, so
let's explicitly disable it on all architectures that support the
option.

The Ubuntu toolchain is affected by this problem, and according to
Mike Frysinger, Gentoo has been running with SSP enabled for years.
More and more distros are turning SSP on by default, so this problem
is likely to get worse in the future.

Also, powerpc just happens to be one of the arches I do
compile-testing on. There may be other arches affected by this too.

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2008-06-26 19:46:02 +02:00
Jean-Christophe PLAGNIOL-VILLARD
dfd3be881c pcmcia/ti_pci1410a: Move compile condition to the Makefile
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-06-26 17:04:25 +02:00
Jean-Christophe PLAGNIOL-VILLARD
72d5d5f7b5 pxa_pcmcia: Move compile condition to the Makefile
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-06-26 17:03:41 +02:00
Jean-Christophe PLAGNIOL-VILLARD
c9eff32881 marabun_pcmcia: Move compile condition to the Makefile
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-06-26 17:01:41 +02:00
Andre Schwarz
6a19c46cae fix non-working mvBL-M7
Add missing #define CONFIG_HIGH_BATS in mvBL-M7 board config file.

Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-06-25 17:04:37 -05:00
Andre Schwarz
846f1574dd fix system config overwrite @ MPC834x and MPC8313
During 83xx setup the "System I/O configuration register high" gets
overwritten with user defined value if CFG_SICRH is defined.

Regarding to the MPC834x manual (Table 5-28 reve.1) bits 28+29 of SICRH
must keep their reset value regardless of configuration.

On my board (using RGMII) those bits are set after reset - yet it's
unclear where they come from.

The patch keeps both bits on MPC834x and MPC8313.

Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-06-25 17:04:28 -05:00
Kim Phillips
4890246a2c mpc83xx: move CPU_TYPE_ENTRY over to processor.h
to avoid this:

cpu.c:47:1: warning: "CPU_TYPE_ENTRY" redefined
In file included from cpu.c:33:
/home/kim/git/u-boot/include/asm/processor.h:982:1: warning: this is the location of the previous definition

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-06-25 16:34:29 -05:00
Stefan Roese
aac7a5095b ppc4xx: Fix problem in gpio_config()
As pointed out by Guennadi Liakhovetski (thanks), pin2 is already shifted
left by one. So the additional shift is bogus.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-06-23 11:15:09 +02:00
Detlev Zundel
4077781231 fdt: Fix typo in variable name.
Signed-off-by: Detlev Zundel <dzu@denx.de>
2008-06-20 22:24:05 +02:00
Haavard Skinnemoen
5f723a3b98 avr32: Enable SPI flash support on ATNGW100
The ATNGW100 has 8MB DataFlash on board. Give users access to it through
the new SPI flash framework.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-06-20 12:46:48 +02:00
Haavard Skinnemoen
5605ef6b58 avr32: Fix SPI portmux initialization
Use the new GPIO manipulation functions to set up the chip select lines,
and make sure both busses use GPIO for chip select control.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-06-20 12:46:43 +02:00
Peter Ma
4688f9e34a avr32: Add GPIO manipulation functions
Adds GPIO manipulation functions for AVR32 AP7 platform.

Signed-off-by: Peter Ma <pma@mediamatech.com>
[haavard.skinnemoen@atmel.com: coding style fixup, slight simplification]
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-06-20 10:40:42 +02:00
Wolfgang Denk
914f58c576 Merge branch 'master' of git://www.denx.de/git/u-boot-cfi-flash 2008-06-19 22:58:36 +02:00
Wolfgang Denk
8115c6f9eb Merge branch 'master' of git://www.denx.de/git/u-boot-ppc4xx 2008-06-19 22:57:58 +02:00
Wolfgang Denk
51a6ca2c3a Merge branch 'master' of git://www.denx.de/git/u-boot-nand-flash 2008-06-19 22:57:06 +02:00
Wolfgang Grandegger
b4fe1a7109 MPC8360ERDK: adapt NAND interface for the re-written FSL NAND UPM driver
This patch is based on the following patch sent a few minutes ago:
"NAND FSL UPM: driver re-write using the hwcontrol callback"
It is untested, of course. Anton, could you please give it a try.

Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Acked-by: Anton Vorontsov <avorontsov@ru.mvista.com>
2008-06-19 22:54:45 +02:00
Anatolij Gustschin
96026d42fa Fix 4xx build issue
Building for 4xx doesn't work since commit 4dbdb768:

In file included from 4xx_pcie.c:28:
include/asm/processor.h:971: error: expected ')' before 'ver'
make[1]: *** [4xx_pcie.o] Error 1

This patch fixes the problem.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
2008-06-19 22:48:45 +02:00
Kumar Gala
a036b04436 MPC8610HPCD: Report board id, board version and fpga version.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-06-19 08:32:18 -05:00
Kumar Gala
7de8c21f14 MPC8641HPCN: Report board id, board version and fpga version.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-06-19 08:32:13 -05:00
Stefan Roese
fb8c061ea0 cfi-flash: Fix problem in flash_toggle(), busy was not detected reliably
This patch simplifies flash_toggle() (AMD commandset), which is used to
detect if a FLASH device is still busy with erase/program operations. On
800MHz Canyonlands/Glacier boards (460EX/GT) the current implementation
did not detect the busy state reliably, resulting in non erased sectors
etc. This patch now simplifies this function by "just" comparing the
complete data-word instead of ANDing it with the command-word (0x40)
before the compatison. It is done the same way in the Linux implementation
chip_ready() in cfi_cmdset_0002.c.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-06-19 15:08:17 +02:00
Philip Balister
9e4006bca3 NAND: Add missing declaration to non-redundant saveenv().
Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-06-16 12:25:58 -05:00
Wolfgang Grandegger
2cdb7f50ac MPC8360ERDK: adapt NAND interface for the re-written FSL NAND UPM driver
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Acked-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-06-12 11:24:27 -05:00
Stefan Roese
212ed90615 ppc4xx: Canyonlands: Disable the RTC M41T62 square wave output
This patch disables the square wave output of the M41T62 RTC used on
Canyonlands & Glacier. Here the explanation:

The serial real-time clock part used in the design is an
STMicro M41T62. This part has a full-time 32KHz square wave
output that is connected to the TmrClk input to the
processor. The default state for this square wave output is
enabled so the output runs continuously when the board is
powered normally and also from the battery. The TmrClk input
to the processor goes to ground when the power is removed
from the board/processor, and therefore the running square
wave output is driving ground which drains the battery quickly.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-06-12 15:50:31 +02:00
Andy Fleming
a94f22f08f Fix build issue with string.h and linux/string.h
This commit:
commit 338cc03846
Author: Wolfgang Denk <wd@denx.de>
Date:   Fri Jun 6 14:28:14 2008 +0200

    tools/mkimage: fix compiler warnings on some systems.

Broke building on some systems, because the host's string.h was interfering
with u-boot's linux/string.h.  It doesn't look like we need the u-boot one if
we're building for the host, so now we only include when building inside
u-boot.

Signed-off-by: Andy Fleming <afleming@freescale.com>
2008-06-12 08:51:35 +02:00
Becky Bruce
9973e3c614 Change initdram() return type to phys_size_t
This patch changes the return type of initdram() from long int to phys_size_t.
This is required for a couple of reasons: long int limits the amount of dram
to 2GB, and u-boot in general is moving over to phys_size_t to represent the
size of physical memory.  phys_size_t is defined as an unsigned long on almost
all current platforms.

This patch *only* changes the return type of the initdram function (in
include/common.h, as well as in each board's implementation of initdram).  It
does not actually modify the code inside the function on any of the platforms;
platforms which wish to support more than 2GB of DRAM will need to modify
their initdram() function code.

Build tested with MAKEALL for ppc, arm, mips, mips-el. Booted on powerpc
MPC8641HPCN.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-06-12 08:50:18 +02:00
Becky Bruce
391fd93ab2 Change lmb to use phys_size_t/phys_addr_t
This updates the lmb code to use phys_size_t
and phys_addr_t instead of unsigned long.  Other code
which interacts with this code, like getenv_bootm_size()
is also updated.

Booted on MPC8641HPCN, build-tested ppc, arm, mips.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-06-12 00:56:39 +02:00
Becky Bruce
61b09fc295 Change print_size to take phys_size_t
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-06-12 00:55:43 +02:00
Becky Bruce
b57ca3e128 Change bd/gd memsize/ram_size to be phys_size_t.
Currently, both are defined as an unsigned long, but
should be phys_size_t. This should result in no real change,
since phys_size_t is currently an unsigned long for all the
default configs.  Also add print_lnum to cmd_bdinfo to deal
with the potentially wider memsize.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-06-12 00:54:53 +02:00
Wolfgang Denk
b77cddc7b5 Merge branch 'master' of git://www.denx.de/git/u-boot-sh 2008-06-11 22:54:47 +02:00
Wolfgang Denk
1a5017601f Merge branch 'master' of git://www.denx.de/git/u-boot-mips 2008-06-11 22:48:09 +02:00
Wolfgang Denk
cdeb62e20d Merge branch 'master' of git://www.denx.de/git/u-boot-fdt 2008-06-11 22:30:47 +02:00
Wolfgang Denk
1859e42fbf Merge branch 'master' of git://www.denx.de/git/u-boot-cfi-flash 2008-06-11 22:24:46 +02:00
Wolfgang Denk
776488eb88 Merge branch 'master' of git://www.denx.de/git/u-boot-nand-flash 2008-06-11 22:23:09 +02:00
Wolfgang Denk
32d4e38eeb Merge branch 'master' of git://www.denx.de/git/u-boot-net 2008-06-11 22:17:42 +02:00
Wolfgang Denk
1730edf76c Merge branch 'master' of git://www.denx.de/git/u-boot-ppc4xx 2008-06-11 22:13:07 +02:00
Wolfgang Denk
5ea67393b8 Merge branch 'master' of git://www.denx.de/git/u-boot-mpc85xx
Conflicts:

	include/asm-ppc/fsl_lbc.h

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-06-11 21:33:16 +02:00
Wolfgang Denk
2395db4886 Merge branch 'master' of git://www.denx.de/git/u-boot-mpc83xx 2008-06-11 21:27:31 +02:00
Wolfgang Denk
3c6e979a94 Merge branch 'master' of git://www.denx.de/git/u-boot-mpc86xx 2008-06-11 21:23:16 +02:00
Kumar Gala
ba04f70109 FSL LAW: Add new interface to use the last free LAW
LAWs have the concept of priority so its useful to be able to allocate
the lowest (highest number) priority.  We will end up using this with the
new DDR code.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-06-11 01:53:09 -05:00
Kumar Gala
859a86a25c 85xx/86xx: Move to dynamic mgmt of LAWs
With the new LAW interface (set_next_law) we can move to letting the
system allocate which LAWs are used for what purpose.  This makes life
a bit easier going forward with the new DDR code.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Acked-by: Jon Loeliger <jdl@freescale.com>
Acked-by: Becky Bruce <becky.bruce@freescale.com>
2008-06-11 01:52:23 -05:00
Kumar Gala
f060054dad FSL LAW: Keep track of LAW allocations
Make it so we keep track of which LAWs have allocated and provide
a function (set_next_law) which can allocate a LAW for us if one is
free.

In the future we will move to doing more "dynamic" LAW allocation
since the majority of users dont really care about what LAW number
they are at.

Also, add CONFIG_MPC8540 or CONFIG_MPC8560 to those boards which needed them

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2008-06-11 01:50:53 -05:00
Kumar Gala
ddde74a159 85xx: remove dummy board_early_init_f
A number of board ports have empty version of board_early_init_f
for no reason since we control its via CONFIG_BOARD_EARLY_INIT_F.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-06-11 00:36:02 -05:00
Kumar Gala
81e56e9af0 MPC8544DS: Update config.h
* Enable flash progress
* remove CLEAR_LAW0 since we dont really use it

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-06-11 00:35:57 -05:00
Kumar Gala
978e81604c 85xx: Remove unused and unconfigured memory test code.
Remove unused and unconfigured DDR test code from FSL 85xx boards.
Besides, other common code exists.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-06-11 00:35:52 -05:00
Sergei Poselenov
a23cddde1a Socrates: Added FPGA base address update in FDT.
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
2008-06-11 00:30:34 -05:00
Sergei Poselenov
fd51b0e0e6 Socrates: NAND support added. Changed the U-Boot base address and
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
2008-06-11 00:30:29 -05:00
Sergei Poselenov
248ae5cfc8 NAND: Added support for 128-bit OOB, adapted
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
2008-06-11 00:30:22 -05:00
Sergei Poselenov
31ca020861 Socrates: added missed file with UPMA configuration data.
Signed-of-by: Sergei Poselenov <sposelenov@emcraft.com>
2008-06-11 00:30:14 -05:00
Sergei Poselenov
59abd15b43 Socrates: Added FPGA mapping. LAWs and TLBs cleanup.
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
2008-06-11 00:30:09 -05:00
Sergei Poselenov
740280e68c Added the upmconfig() function for 85xx.
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2008-06-11 00:29:29 -05:00
Sergei Poselenov
d39e68514f Socrates: config file cleanup.
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
2008-06-11 00:17:08 -05:00
Wolfgang Grandegger
e8cc3f04b1 TQM85xx: Change memory map to support Flash memory > 128 MiB
Some TQM85xx boards could be equipped with up to 1 GiB (NOR) Flash
memory. The current memory map only supports up to 128 MiB Flash.
This patch adds the configuration option CONFIG_TQM_BIGFLASH. If
set, up to 1 GiB flash is supported. To achieve this, the memory
map has to be adjusted in great parts (for example the CCSRBAR is
moved from 0xE0000000 to 0xA0000000).

If you want to boot Linux with CONFIG_TQM_BIGFLASH set, the new
memory map also has to be considered in the kernel (changed
CCSRBAR address, changed PCI IO base address, ...). Please use
an appropriate Flat Device Tree blob (tqm8548.dtb).

Signed-off-by: Martin Krause <martin.krause@tqs.de>
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
2008-06-11 00:05:14 -05:00
Wolfgang Grandegger
1c2deff22c TQM85xx: NAND support via local bus UPMB
This patch adds support for NAND FLASH on the TQM8548. It is disabled by
default and can be enabled for the TQM8548 modules. It is now based on
the re-written FSL NAND UPM driver. A patch has been posted earlier today
with the subject:

"NAND FSL UPM: driver re-write using the hwcontrol callback"

Note that the R/B pin is not supported by that module requiring to use
the specified maximum delay time.

Note: With NAND support enabled the size of the U-Boot image exceeds
256 KB and TEXT_BASE must therefore be set to 0xfff80000 in config.mk,
doubling the image size :-(.

Signed-off-by: Thomas Waehner <thomas.waehner@tqs.de>
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
2008-06-11 00:05:08 -05:00
Wolfgang Grandegger
b9e8078bb3 TQM8548: PCI express support
This patch adds support for PCI express cards. The board support
now uses common FSL PCI init code, for both, PCI and PCIe on all
TQM85xx modules.

Signed-off-by: Thomas Waehner <thomas.waehner@tqs.de>
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
2008-06-11 00:05:01 -05:00
Wolfgang Grandegger
1287e0c55a TQM8548: Basic support for the TQM8548 modules
This patch adds basic support for the TQM8548 module from TQ-Components
(http://www.tqc.de/) including DDR2 SDRAM initialisation and support for
eTSEC 3 and 4

Furthermore Flash buffer write has been enabled to speed up output to
the Flash by approx. a factor of 10.

Signed-off-by: Thomas Waehner <thomas.waehner@tqs.de>
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
2008-06-11 00:01:43 -05:00
Wolfgang Grandegger
2599135320 TQM85xx: Support for Flat Device Tree
This patch adds support for Linux kernels using the Flat Device Tree.
It also re-defines the default environment settings for booting Linux
with the FDT blob.

Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
2008-06-11 00:00:45 -05:00
Wolfgang Grandegger
d9ee843d54 TQM85xx: Support for Intel 82527 compatible CAN controller
This patch adds initialization of the UPMC RAM to support up to two
Intel 82527 compatible CAN controller on the TQM85xx modules.

Signed-off-by: Thomas Waehner <thomas.waehner@tqs.de>
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
2008-06-10 23:59:44 -05:00
Wolfgang Grandegger
518d5cfe72 TQM85xx: Bugfix in the SDRAM initialisation
The CS0_BNDS register is now set according to the detected
memory size.

Signed-off-by Martin Krause <martin.krause@tqs.de>
2008-06-10 23:58:58 -05:00
Wolfgang Grandegger
45dee2e620 TQM85xx: Fix chip select configuration for second FLASH bank
This patch fixes the re-calculation of the automatic chip select
configuration for boards with two populated FLASH banks.

Signed-off-by: Martin Krause <martin.krause@tqs.de>
2008-06-10 23:58:26 -05:00
Wolfgang Grandegger
46346f27cd TQM85xx: Support for Spansion 'N' type flashes added
The 'N' type Spansion flashes (S29GLxxxN series) have bigger sectors,
than the formerly used 'M' types (S29GLxxxM series), so the flash layout
needs to be changed -> new start address of the environment. The macro
definition CONFIG_TQM_FLASH_N_TYPE is undefined by default and must be
defined for boards with 'N' type flashes.

Signed-off-by: Martin Krause <martin.krause@tqs.de>
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
2008-06-10 23:57:43 -05:00
Wolfgang Grandegger
5d5bd838f7 TQM85xx: Fix CPM port pin configuration
Do not configure port pins PD30/PD31 as SCC1 TxD/RxD except for the TQM8560
board. On the other TQM85xx boards (TQM8541 and TQM8555) SCC1 is not used
as serial interface anyway. Worse, on some board variants configuring the
pins for SCC1 leads to short circuits (for example on the TQM8541-BG).

Signed-off-by: Martin Krause <martin.krause@tqs.de>
2008-06-10 23:53:03 -05:00
Wolfgang Grandegger
b99ba1679e TQM85xx: Various coding style fixes
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
2008-06-10 23:52:56 -05:00
Gerald Van Baren
ae9e97fa96 libfdt: Move the working_fdt pointer to cmd_fdt.c
The working_fdt pointer was declared in common/fdt_support.c but was
not used there.  Move it to common/cmd_fdt.c where it is used (it is
also used in lib_ppc/bootm.c).

Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
2008-06-10 22:23:23 -04:00
Kim Phillips
e489b9c078 fdt: unshadow global working fdt variable
differentiate with local variables of the same name by renaming the
global 'fdt' variable 'working_fdt'.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-06-10 22:23:17 -04:00
Andy Fleming
e1eb0e25d9 socrates: Fix PCI clk fix patch
The submitted patch seems to have been more up-to-date, but an older patch was
already in the repository.  This patch encompasses the differences

Taken entirely from Sergei Poselenov <sposelenov@emcraft.com>

Signed-off-by: Andy Fleming <afleming@freescale.com>
2008-06-10 18:49:34 -05:00
Wolfgang Grandegger
a75a57ef6e NAND FSL UPM: driver re-write using the hwcontrol callback
This is a re-write of the NAND FSL UPM driver using the more universal
hwcontrol callback (instead of the cmdfunc callback). Here is a brief
list of furher modifications:

- For the time being, the UPM setup writing the UPM array has been
  removed from the driver and must now be done by the board specific
  code.

- The bus width definition in "struct fsl_upm_nand" is now in bits to
  comply with the corresponding Linux driver and 8, 16 and 32 bit
  accesses are supported.

- chip->dev_read is only set if fun->dev_ready != NULL, which is
  required for boards not connecting the R/B pin.

- A few issue have been fixed with MxMR bit manipulation like in the
  corresponding Linux driver.

Note: I think the "io_addr" field of "struct fsl_upm" could be removed
      as well, because the address is already determined by
      "nand->IO_ADDR_[RW]", but I'm not 100% sure.

This patch has been tested on a TQM8548 modules with the NAND chip
Micron MT29F8G08FABWP.

This patch is based on the following patches posted to this list a few
minutes ago:

  PPC: add accessor macros to clear and set bits in one shot
  83xx/85xx/86xx: add more MxMR local bus definitions

Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Acked-by: Anton Vorontsov <avorontsov@ru.mvista.com>
2008-06-10 18:22:26 -05:00
Wolfgang Grandegger
6beecfbb54 MPC85xx: Beautify boot output of L2 cache configuration
The boot output is now aligned poperly with other boot output
lines, e.g.:

  FLASH: 128 MB
  L2:    512 KB enabled

Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
2008-06-10 18:22:26 -05:00
Wolfgang Grandegger
398415114f PPC: add accessor macros to clear and set bits in one shot
PPC: add accessor macros to clear and set bits in one shot

This patch adds macros from linux/include/asm-powerpc/io.h to clear and
set bits in one shot using the in_be32, out_be32, etc. accessor functions.
They are very handy to manipulate bits it I/O registers.

This patch is required for my forthcoming FSL NAND UPM driver re-write and
the support for the TQM8548 module.

Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
2008-06-10 18:22:26 -05:00
Wolfgang Grandegger
4677988c7e TQM: move TQM boards to board/tqc
Move all TQM board directories to the vendor specific directory "tqc"
for modules from TQ-Components GmbH (http://www.tqc.de).

Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
2008-06-10 18:22:26 -05:00
Wolfgang Grandegger
6fab2fe72c 83xx/85xx/86xx: add more MxMR local bus definitions
83xx/85xx/86xx: add more MxMR local bus definitions

This patch adds more macro definitions for the UPM Machine Mode Registers
They are copied from "include/mpc82xx.h" to simplify the merge of all 8xxx
common local bus definitions into include/asm-ppc/fsl_lbc.h. They are
required for my forthcoming FSL NAND UPM driver re-write and the support
for the TQM8548 module.

This patch is based on the following two patches from Anton Vorontsov:

http://www.mail-archive.com/u-boot-users@lists.sourceforge.net/msg06511.html
http://www.mail-archive.com/u-boot-users@lists.sourceforge.net/msg06587.html

I leave coding style violation fixes, code beautification and name
corrections to somebody else ;-(.

Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
2008-06-10 18:22:26 -05:00
Anton Vorontsov
c8c5fc266e 83xx/85xx: further localbus cleanups
Merge mpc85xx.h's LBC defines to fsl_lbc.h. Also, adopt ACS names
from mpc85xx.h, so ACS_0b10 renamed to ACS_DIV4, ACS_0b11 to ACS_DIV2.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
2008-06-10 18:22:25 -05:00
Anton Vorontsov
42dbd667c8 83xx/85xx/86xx: factor out Freescale Localbus defines out of mpc83xx.h
This patch moves Freescale Localbus defines out of mpc83xx.h, so we could
use it on MPC85xx and MPC86xx processors.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
2008-06-10 18:22:25 -05:00
Kumar Gala
730b2fcf6f 85xx: Add setting of cache props in the device tree.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-06-10 18:22:25 -05:00
Kumar Gala
4dbdb7681e 85xx: expose cpu identification
The current cpu identification code is used just to return the name
of the processor at boot.  There are some other locations that the name
is useful (device tree setup).  Expose the functionality to other bits
of code.

Also, drop the 'E' suffix and add it on by looking at the SVR version
when we print this out.  This is mainly to allow the most flexible use
of the name.  The device tree code tends to not care about the 'E' suffix.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-06-10 18:22:25 -05:00
Kim Phillips
2329fe113d mpc83xx: MVBLM7: minor build fixups
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-06-10 13:34:27 -05:00
Andre Schwarz
a1293e549b add MPC8343 based board mvBlueLYNX-M7 (board+make files)
Add MPC8343 based board mvBlueLYNX-M7.
It's a single board stereo camera system.
Please read doc/README.mvblm7 for details.

Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-06-10 13:07:58 -05:00
Andre Schwarz
c005b93925 add MPC8343 based board mvBlueLYNX-M7 (doc+config)
Add MPC8343 based board mvBlueLYNX-M7.
It's a single board stereo camera system.
Please read doc/README.mvblm7 for details.

Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-06-10 12:52:57 -05:00
Anton Vorontsov
f9023afbdf 83xx/85xx: further localbus cleanups
move the BRx_* and ORx_* left behind in mpc85xx.h 

The same is needed for mpc8xx.h and mpc8260.h (defines are almost
the same, just few differences which needs some attention though).

But the bad news for mpc8xx and mpc8260 is that there are a lot of users
of these defines. So this cleanup I'll leave for the "better times".

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-06-10 12:30:13 -05:00
Anton Vorontsov
bf30bb1f7c 83xx/85xx/86xx: factor out Freescale Localbus defines out of mpc83xx.h
This patch moves Freescale Localbus defines out of mpc83xx.h, so we could
use it on MPC85xx and MPC86xx processors.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-06-10 12:28:08 -05:00
Tor Krill
d82b4fc0ce Add missing CSCONFIG_BANK_BIT_3 define to mpc83xx.h
Signed-off-by: Tor Krill <tor@excito.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-06-10 12:19:04 -05:00
Shinya Kuribayashi
3b904ccb93 net: Conditional COBJS inclusion of network drivers
Replace COBJS-y with appropriate driver config names.

Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-06-09 23:21:05 -07:00
Gerald Van Baren
2fb698bf50 Use strncmp() for the fdt command
Cleaner than doing multiple conditionals on characters.

Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
2008-06-09 21:13:49 -04:00
Gerald Van Baren
47abe8ab29 The fdt boardsetup command criteria was not unique
It was checking just for "b", which is not unique with respect to the
"boot" command.  Change to check for "boa"[rdsetup].

Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
2008-06-09 21:13:44 -04:00
David Gibson
2f08bfa952 libfdt: Several cleanups to parameter checking
This patch makes a couple of small cleanups to parameter checking of
libfdt functions.

	- In several functions which take a node offset, we use an
idiom involving fdt_next_tag() first to check that we have indeed been
given a node offset.  This patch adds a helper function
_fdt_check_node_offset() to encapsulate this usage of fdt_next_tag().

	- In fdt_rw.c in several places we have the expanded version
of the RW_CHECK_HEADER() macro for no particular reason.  This patch
replaces those instances with an invocation of the macro; that's what
it's for.

	- In fdt_sw.c we rename the check_header_sw() function to
sw_check_header() to match the analgous function in fdt_rw.c, and we
provide an SW_CHECK_HEADER() wrapper macro as RW_CHECK_HEADER()
functions in fdt_rw.c

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2008-06-09 21:13:39 -04:00
Gerald Van Baren
fec6d9ee7c Remove the deprecated CONFIG_OF_FLAT_TREE
Use CONFIG_OF_LIBFDT instead to support flattened device trees.  It is
cleaner, has better functionality, and is better supported.

Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
2008-06-09 21:13:35 -04:00
Gerald Van Baren
62bcdda293 Change the stxxst to CONFIG_OF_LIBFDT
This was configured to use the deprecated CONFIG_OF_FLAT_TREE, change
to CONFIG_OF_LIBFDT.

WARNING: It appears that this board lost its ability to boot via a
flattened device tree prior to this changeset.

WARNING: This conversion was untested because I do not have a board to
test it on.

Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
2008-06-09 21:13:29 -04:00
Gerald Van Baren
589c04271d Convert mpc7448hpc2 to CONFIG_OF_LIBFDT
This was configured to use the deprecated CONFIG_OF_FLAT_TREE, change
to CONFIG_OF_LIBFDT.

WARNING: This conversion is untested because I do not have a board to
test it on.

NOTE: The FDT blob (DTS) must have an /aliases/ethernet0 and (optionally)
/aliases/ethernet1 property for the ethernet to work.

Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
2008-06-09 21:13:24 -04:00
Kumar Gala
ee1e35bede 85xx: Only use PORPLLSR[DDR_Ratio] on platforms that define it
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-06-09 13:31:20 -05:00
Becky Bruce
3b9519fc50 MPC85xx: Change traps.c to not reference non-addressable memory
Currently, END_OF_RAM is used by the trap code to determine if
we should attempt to access the stack pointer or not. However,
on systems with a lot of RAM, only a subset of the RAM is
guaranteed to be mapped in and accessible.  Change END_OF_RAM
to use get_effective_memsize() instead of using the raw ram
size out of the bd.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-06-09 13:31:20 -05:00
Nobuhiro Iwamatsu
7faddaecea sh: Renesas Solutions SH7763RDP board support
SH7763RDP has SCIF, NOR Flash, Ethernet, USB host, LCDC and MMC.
In this patch, support SCIF, NOR Flash, and Ethernet.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2008-06-09 14:23:19 +09:00
Nobuhiro Iwamatsu
60179098a9 sh: Add support Renesas SH7763
Renesas SH7763 has 3 SCIF, MMC, LCDC, Ethernet and other.
This patch supprts CPU register's header file.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2008-06-09 14:20:57 +09:00
Nobuhiro Iwamatsu
08c5fabe18 sh: SH7763 SCIF support
SH7763 has 3 SCIF channels. SCIF0 and 1 are same register constitution,
but only SCIF2 is different. This patch work all SCIF channel.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2008-06-09 14:20:55 +09:00
Ben Warren
e44f3ea4e8 Merge branch 'master' of git://git.denx.de/u-boot 2008-06-08 22:04:22 -07:00
Shinya Kuribayashi
79b51ff820 [MIPS] cpu/mips/Makefile: Split [CS]OBJS onto separate lines
Also get rid of some #ifdefs in *.c files.

Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
2008-06-07 20:51:59 +09:00
Shinya Kuribayashi
8bde63eb3f [MIPS] Rename Alchemy processor configs into CONFIG_SOC_*
CONFIG_SOC_AU1X00

  Common Alchemy Au1x00 stuff. All Alchemy processor based machines
  need to have this config as a system type specifier.

CONFIG_SOC_AU1000, CONFIG_SOC_AU1100, CONFIG_SOC_AU1200,
CONFIG_SOC_AU1500, CONFIG_SOC_AU1550

  Machine type specifiers. Each port should have one of aboves.

Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
2008-06-07 20:51:56 +09:00
Stuart Wood
cc49cadeeb env_nand.c: Added bad block management for environment variables
Modified to check for bad blocks and to skipping over them when
CFG_ENV_RANGE has been defined.
CFG_ENV_RANGE must be larger than CFG_ENV_SIZE and aligned to the NAND
flash block size.

Signed-off-by: Stuart Wood <stuart.wood@labxtechnologies.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-06-06 11:06:45 -05:00
Becky Bruce
279726bd00 MPC86xx: Change traps.c to not reference non-addressable memory
Currently, END_OF_RAM is used by the trap code to determine if
we should attempt to access the stack pointer or not. However,
on systems with a lot of RAM, only a subset of the RAM is
guaranteed to be mapped in and accessible.  Change END_OF_RAM
to use get_effective_memsize() instead of using the raw ram
size out of the bd to prevent us from trying to access
non-mapped memory.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-06-06 10:55:35 -05:00
Jon Loeliger
1a247ba7fa Merge commit 'wd/master' 2008-06-06 10:48:31 -05:00
Wolfgang Denk
338cc03846 tools/mkimage: fix compiler warnings on some systems.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-06-06 16:21:12 +02:00
Stefan Roese
b2815f7928 ppc4xx: Fix misspelled CONFIG_440SPE/440EPX/GRX config options
We use upper case letters for the AMCC processor defines (like
CONFIG_440SPE) in U-Boot. So the 440SPe is labeled CONFIG_440SPE and
not CONFIG_440SPe. This patch fixes the last misspelled config options.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-06-06 16:10:41 +02:00
Stefan Roese
72675dc6c0 ppc4xx: Unify AMCC's board config files (part 3/3)
This patch series unifies the AMCC eval board ports by introducing
a common include header for all AMCC eval boards:

include/configs/amcc-common.h

This header now includes all common configuration options/defines which
are removed from the board specific headers.

The reason for this is ease of maintenance and unified look and feel
of all AMCC boards.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-06-06 15:55:21 +02:00
Stefan Roese
490f204096 ppc4xx: Unify AMCC's board config files (part 2/3)
This patch series unifies the AMCC eval board ports by introducing
a common include header for all AMCC eval boards:

include/configs/amcc-common.h

This header now includes all common configuration options/defines which
are removed from the board specific headers.

The reason for this is ease of maintenance and unified look and feel
of all AMCC boards.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-06-06 15:55:03 +02:00
Stefan Roese
a8a11a9ed0 ppc4xx: Unify AMCC's board config files (part 1/3)
This patch series unifies the AMCC eval board ports by introducing
a common include header for all AMCC eval boards:

include/configs/amcc-common.h

This header now includes all common configuration options/defines which
are removed from the board specific headers.

The reason for this is ease of maintenance and unified look and feel
of all AMCC boards.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-06-06 15:54:31 +02:00
Remy Bohmer
0e38c938ed DM9000 fix status check fail 0x6d error for trizeps board
According to the Application Notes of the DM9000, only the 2 bits 0:1 of
the status byte need to be checked to identify a valid packet in the fifo

But, The several different Application Notes do not all speak the same
language on these bits. They do not disagree, but only 1 Application Note
noted explicitly that only these 2 bits need to be checked.
Even the datasheets do not mention anything about these 2 bits.

Because the old code, and the kernel check the whole byte, I left this piece
untouched.

However, I tested all board/DM9000[A|E|EP] devices with this 2 bit check, so
it should work.

Notice, that the 2nd iteration through this receive loop (when a 2nd packet is
in the fifo) is much shorter now, compared to the older U-boot driver code,
so that we can maybe run into a hardware condition now that was never seen
before, or maybe was seen very unfrequently.

Additionaly added a cleanup of a stack variable.

Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-06-05 23:47:28 -07:00
Shinya Kuribayashi
7daf2ebe91 [MIPS] Update <asm/addrspace.h> header
- Fix traditional KSEG names
- Replace PHYSADDR with CPHYSADDR

Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
2008-06-05 22:29:00 +09:00
Shinya Kuribayashi
f0d5a6f060 [MIPS] mips_config.mk: Misc fixes
- Kill redundant `-pipe' (this will be added by $(TOPDIR)/config.mk)
- Modify comments

Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
2008-06-05 22:29:00 +09:00
Shinya Kuribayashi
5f64d21c9a [MIPS] Kill unused <version.h> inclusions
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
2008-06-05 22:29:00 +09:00
Shinya Kuribayashi
a55d48174c [MIPS] lib_mips/time.c: Fix CP0 count register usage and timer routines
MIPS port has two problems in timer routines. One is now we assume CFG_HZ
equals to CP0 counter frequency, but this is wrong. CFG_HZ has to be 1000
in the U-Boot system.

The other is we don't have a proper time management counter like timestamp
other ARCHs have. We need the 32-bit millisecond clock counter.

This patch introduces timestamp and CYCLES_PER_JIFFY. timestamp is a
32-bit non-overflowing CFG_HZ counter, and CYCLES_PER_JIFFY is the number
of calculated CP0 counter cycles in a CFG_HZ.

STRATEGY:

* Fix improper CFG_HZ value to have 1000

* Use CFG_MIPS_TIMER_FREQ for timer counter frequency, instead.

* timer_init: initialize timestamp and set up the first timer expiration.
  Note that we don't need to initialize CP0 count/compare registers here
  as they have been already zeroed out on the system reset. Leave them as
  they are.

* get_timer: calculate how many timestamps have been passed, then return
  base-relative timestamp. Make sure we can easily count missed timestamps
  regardless of CP0 count/compare value.

* get_ticks: return the current timestamp, that is get_timer(0).

Most parts are from good old Linux v2.6.16 kernel.

v2:
- Remove FIXME comments as they turned out to be trivial.
- Use CP0 compare register as a global variable for expirelo.
- Kill a global variable 'cycles_per_jiffy'. Use #define CYCLES_PER_JIFFY
  instead.

Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
2008-06-05 22:29:00 +09:00
Shinya Kuribayashi
199e4f657c [MIPS] lib_mips/time.c: Fix udelay
What we have to do is just to wait for given micro-seconds. No need to
take into account current time, get_timer and CFG_HZ.

Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
2008-06-05 22:29:00 +09:00
Shinya Kuribayashi
c7e38e413a [MIPS] lib_mips/time.c: Replace CP0 access functions with existing macros
We already have many pre-defined CP0 access macros in <asm/mipsregs.h>.
This patch replaces mips_{compare,count}_set and mips_count_get with
existing macros.

Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
2008-06-05 22:28:59 +09:00
Remy Bohmer
6b52cfe16c Get rid of annoying/superfluous bad-checksum warning message
U-boot can complain a lot about 'checksum bad' when it is attached to the network.
It is annoying for ordinary users who start to doubt the network connection
in general when they see messages like this.

This is caused by the routine NetCksumOk() which cannot handle IP-headers longer
than 20 bytes. Those packages can be ignored anyway by U-boot, so we trash them
now before checking the checksum.

Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-06-04 23:51:26 -07:00
Remy Bohmer
d6ee5fa40c Fix order for reading rx-status registers in 32bit mode of DM9000
A last minute cleanup before submitting the DM9000A patch series yesterday introduced
a bug in reading the rx-status registers in 32bit mode only.
This patch repairs this.

Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-06-04 23:49:28 -07:00
Remy Bohmer
98291e2e68 DM9000: Some minor code cleanups
Some lines of the U-boot DM9000x driver are longer than 80 characters, or
need some other minor cleanup.

Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-06-04 23:47:32 -07:00
Remy Bohmer
850ba7555d DM9000: Make driver work properly for DM9000A
The DM9000A network controller does not work with the U-boot DM9000x driver.
Analysis showed that many incoming packets are lost.

The DM9000A Application Notes V1.20 (section 5.6.1) recommend that the poll to
check for a valid rx packet be done on the interrupt status register, not
directly by performing the dummy read and the rx status check as is currently
the case in the u-boot driver.

When the recommended poll is done as suggested the driver starts working
correctly on 10Mbit/HD, but on 100MBit/FD packets come in faster so that there
can be more than 1 package in the fifo at the same time.

The driver must perform the rx-status check in a loop and read and handle all
packages until there is no more left _after_ the interrupt RX flag is set.

This change has been tested with DM9000A, DM9000E, DM9000EP.

Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-06-04 23:47:31 -07:00
Remy Bohmer
fbcb7ece0e DM9000: Improve eth_reset() routine
According to the application notes of the DM9000 v1.22 chapter 5.2 bullet 2, the
reset procedure must be done twice to properly reset the DM9000 by means of software.
This errata is not needed anymore for the DM9000A, but it does not bother it.

This change has been tested with DM9000A, DM9000E, DM9000EP.

Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-06-04 23:47:31 -07:00
Remy Bohmer
acba31847f DM9000: improve eth_send() routine
The eth_send routine of the U-boot DM9000x driver does not match the
DM9000 or DM9000A application notes/programming guides.

This change improves the stability of the DM9000A network controller.

This change has been tested with DM9000A, DM9000E, DM9000EP.

Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-06-04 23:47:31 -07:00
Remy Bohmer
134e266253 DM9000: repair debug logging
It seems that the debugging code of the DM9000x driver in U-boot has not been
compiled for a long time, because it cannot compile...

Also rearranged some loglines to get more useful info while debugging.

Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-06-04 23:47:31 -07:00
Remy Bohmer
a101361bfe DM9000: Add data bus-width auto detection.
The U-boot DM9000x driver contains a compile time bus-width definition for
the databus connected to the network controller.

This compile check makes the code unclear, inflexible and is unneccessary.
It can be asked to the network controller what its bus-width is by reading bits
6 and 7 of the interrupt status register.

The linux kernel already uses a runtime mechanism to determine this bus-width,
so the implementation below looks somewhat like that implementation.

This change has been tested with DM9000A, DM9000E, DM9000EP.

Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-06-04 23:47:31 -07:00
Wolfgang Denk
8155efbd7a Merge branch 'master' of ssh://mercury/home/wd/git/u-boot/master 2008-06-05 01:12:30 +02:00
Stefan Roese
63a0afa0c3 ppc4xx: Fix problem with SDRAM init in bamboo NAND booting port
This patch fixes a problem spotted by Eugene O'Brian (thanks Eugene)
introduced by the commit:

ppc4xx/NAND_SPL: Consolidate 405 and 440 NAND booting code in start.S

With this patch SDRAM will get initialized again and booting from NAND
is working again.

Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Eugene O'Brien <eugene.obrien@advantechamt.com>
2008-06-04 21:34:12 +02:00
Wolfgang Denk
9ef1cbef1a Socrates: Fix PCI bus frequency report
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
2008-06-03 21:49:32 +02:00
Tor Krill
8ec6e332ea Fix incorrect switch for IF_TYPE in part.c
Use correct field in block_dev_desc_t when writing interface type in
dev_print. Error introduced in 574b3195.

Also added fix from Martin Krause

Signed-off-by: Tor Krill <tor@excito.com>
2008-06-03 21:46:39 +02:00
Andre Schwarz
b64b8a0bd3 Add size #defines for Altera Cyclone-II EP2C8 and EP2C20.
Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
2008-06-03 21:40:09 +02:00
Peter Tyser
35ef877f0a Additional fix to readline_into_buffer() with CONFIG_CMDLINE_EDITING before relocating
Removed unneeded command line history initialization.  Also, the original
code would access the 'initted' variable before relocation to SDRAM
which resulted in erratic behavior since the bss is not initialized when
executing from flash.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2008-06-03 21:33:27 +02:00
Grant Erickson
22f371b630 PPC4xx: Simplified post_word_{load, store}
This patch simplifies post_word_{load,store} by using the preprocessor
to eliminate redundant, copy-and-pasted code.

Signed-off-by: Grant Erickson <gerickson@nuovations.com>
2008-06-03 21:22:26 +02:00
Vasiliy Leoenenko
9c048b5234 cfi_flash: enable M18 flash chips family support.
Added new command set ID. Buffered write command processing is changed
in order to support M18 flash chips family.

Signed-off-by: Alexey Korolev <akorolev@infradead.org>
Signed-off-by: Vasiliy Leonenko <vasiliy.leonenko@mail.ru>
2008-06-03 21:02:34 +02:00
Vasiliy Leoenenko
93c56f212c cfi_flash: support of long cmd in U-boot.
Some NOR flash chips needs support of commands with length grether than max
value size of uchar. For example all M18 family chips use 0x1ff command in
buffered write mode as value of program loops count.

Signed-off-by: Alexey Korolev <akorolev@infradead.org>
Signed-off-by: Vasiliy Leonenko <vasiliy.leonenko@mail.ru>
2008-06-03 21:01:55 +02:00
Stefan Roese
4d91d1df2f DTT: Issue one-shot command on AD7414 (LM75 code) to read temp
On AD7414 the first value upon bootup is not read correctly.
This is most likely because of the 800ms update time of the
temp register in normal update mode. To get current values
each time we issue the "dtt" command including upon powerup
we switch into one-short mode.

This patch fixes the problem on AD7414 equipped boards (Sequoia,
Canyonlands etc), that temp value printed in the bootup log was
incorrect.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-06-03 21:00:00 +02:00
Matthias Fuchs
de5bfcf7b0 ppc4xx: Cleanup CPCI405 variant's config file
This patch removes some dead code from CPCI405 board's
config files. JFFS2 support is also removed. It's not used and
CPCI4052 does not build anymore without some size reduction.

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2008-06-03 20:36:59 +02:00
Kenneth Johansson
2918eb9d42 Remove shell variable UNDEF_SYM.
UNDEF_SYM is a shell variable in the main Makefile used to force the
linker to add all u-boot commands to the final image. It has no use here.

Signed-off-by: Kenneth Johansson <kenneth@southpole.se>
2008-06-03 20:36:18 +02:00
Haavard Skinnemoen
8c66497e06 Add support for environment in SPI flash
This is pretty incomplete...it doesn't handle reading the environment
before relocation, it doesn't support redundant environment, and it
doesn't support embedded environment. But apart from that, it does
seem to work.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-06-03 20:33:11 +02:00
Haavard Skinnemoen
b6368467e6 SPI Flash: Add "sf" command
This adds a new command, "sf" which can be used to manipulate SPI
flash. Currently, initialization, reading, writing and erasing is
supported.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-06-03 20:32:25 +02:00
Haavard Skinnemoen
d25ce7d24c SPI Flash subsystem
This adds a new SPI flash subsystem.

Currently, only AT45 DataFlash in non-power-of-two mode is supported,
but some preliminary support for other flash types is in place as
well.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-06-03 20:31:34 +02:00
Hans-Christian Egtvedt
60445cb5c3 atmel_spi: Driver for the Atmel SPI controller
This adds a driver for the SPI controller found on most AT91 and AVR32
chips, implementing the new SPI API.

Changed in v4:
  - Update to new API
  - Handle zero-length transfers appropriately. The user may send a
    zero-length SPI transfer with SPI_XFER_END set in order to
    deactivate the chip select after a series of transfers with chip
    select active. This is useful e.g. when polling the status
    register of DataFlash.

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2008-06-03 20:30:05 +02:00
Haavard Skinnemoen
d255bb0e78 SPI API improvements
This patch gets rid of the spi_chipsel table and adds a handful of new
functions that makes the SPI layer cleaner and more flexible.

Instead of the spi_chipsel table, each board that wants to use SPI
gets to implement three hooks:
  * spi_cs_activate(): Activates the chipselect for a given slave
  * spi_cs_deactivate(): Deactivates the chipselect for a given slave
  * spi_cs_is_valid(): Determines if the given bus/chipselect
    combination can be activated.

Not all drivers may need those extra functions however. If that's the
case, the board code may just leave them out (assuming they know what
the driver needs) or rely on the linker to strip them out (assuming
--gc-sections is being used.)

To set up communication parameters for a given slave, the driver needs
to call spi_setup_slave(). This returns a pointer to an opaque
spi_slave struct which must be passed as a parameter to subsequent SPI
calls. This struct can be freed by calling spi_free_slave(), but most
driver probably don't want to do this.

Before starting one or more SPI transfers, the driver must call
spi_claim_bus() to gain exclusive access to the SPI bus and initialize
the hardware. When all transfers are done, the driver must call
spi_release_bus() to make the bus available to others, and possibly
shut down the SPI controller hardware.

spi_xfer() behaves mostly the same as before, but it now takes a
spi_slave parameter instead of a spi_chipsel function pointer. It also
got a new parameter, flags, which is used to specify chip select
behaviour. This may be extended with other flags in the future.

This patch has been build-tested on all powerpc and arm boards
involved. I have not tested NIOS since I don't have a toolchain for it
installed, so I expect some breakage there even though I've tried
fixing up everything I could find by visual inspection.

I have run-time tested this on AVR32 ATNGW100 using the atmel_spi and
DataFlash drivers posted as a follow-up. I'd like some help testing
other boards that use the existing SPI API.

But most of all, I'd like some comments on the new API. Is this stuff
usable for everyone? If not, why?

Changed in v4:
  - Build fixes for various boards, drivers and commands
  - Provide common struct spi_slave definition that can be extended by
    drivers
  - Pass a struct spi_slave * to spi_cs_activate and spi_cs_deactivate
  - Make default bus and mode build-time configurable
  - Override default SPI bus ID and mode on mx32ads and imx31_litekit.

Changed in v3:
  - Add opaque struct spi_slave for controller-specific data associated
    with a slave.
  - Add spi_claim_bus() and spi_release_bus()
  - Add spi_free_slave()
  - spi_setup() is now called spi_setup_slave() and returns a
    struct spi_slave
  - soft_spi now supports four SPI modes (CPOL|CPHA)
  - Add bus parameter to spi_setup_slave()
  - Convert the new i.MX32 SPI driver
  - Convert the new MC13783 RTC driver

Changed in v2:
  - Convert the mpc8xxx_spi driver and the mpc8349emds board to the
    new API.

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Tested-by: Guennadi Liakhovetski <lg@denx.de>
2008-06-03 20:28:50 +02:00
Haavard Skinnemoen
289011207d Move definition of container_of() to common.h
AVR32 and AT91SAM9 both have their own identical definitions of
container_of() taken from the Linux kernel. Move it to common.h so
that all architectures can use it.

container_of() is already used by some drivers, and will be used
extensively by the new and improved SPI API.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-06-03 20:27:23 +02:00
Haavard Skinnemoen
110e006fe6 soft_i2c: Pull SDA high before reading
Spotted by Dean Capindale.

Systems that support open-drain GPIO properly are allowed provide an
empty I2C_TRISTATE define. However, this means that we need to be
careful not to drive SDA low when the slave is expected to respond.

This patch adds a missing I2C_SDA(1) to read_byte() required to
tristate the SDA line on systems that support open-drain GPIO.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-06-03 20:25:56 +02:00
Stefan Roese
3c1de1a6d3 ppc4xx: Remove implementations of testdram()
This patch removes the used testdram() implementations of the board
that are maintained by myself.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-06-03 20:22:24 +02:00
Stefan Roese
bbeff30cbd ppc4xx: Remove superfluous dram_init() call or replace it by initdram()
Historically the 405 U-Boot port had a dram_init() call in early init
stage. This function was still called from start.S and most of the time
coded in assembler. This is not needed anymore (since a long time) and
boards should implement the common initdram() function in C instead.

This patch now removed the dram_init() call from start.S and removes the
empty implementations that are scattered through most of the 405 board
ports. Some older board ports really implement this dram_init() though.
These are:

csb272
csb472
ERIC
EXBITGEN
W7OLMC
W7OLMG

I changed those boards to call this assembler dram_init() function now
from their board specific initdram() instead. This *should* work, but please
test again on those platforms. And it is perhaps a good idea that those
boards use some common 405 SDRAM initialization code from cpu/ppc4xx at
some time. So further patches welcome here.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-06-03 20:22:19 +02:00
Stefan Roese
192f90e272 ppc4xx: Use new 4xx SDRAM controller enable defines in common ECC code
Signed-off-by: Stefan Roese <sr@denx.de>
2008-06-03 20:22:13 +02:00
Stefan Roese
39b32be18c ppc4xx: Fix common ECC generation code for 440GP style platforms
This patch makes the common 4xx ECC code really usable on 440GP style
platforms.

Since the IBM DDR controller used on 440GP/GX/EP/GR is not register
compatible to the IBM DDR/2 controller used on 405EX/440SP/SPe/460EX/GT
we need to make some processor dependant defines used later on by the
driver.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-06-03 20:22:08 +02:00
Stefan Roese
ec724f883e ppc4xx: Change Kilauea to use the common DDR2 init function
This patch changes the kilauea and kilauea_nand (for NAND booting)
board port to not use a board specific DDR2 init routine anymore. Now
the common code from cpu/ppc4xx is used.

Thanks to Grant Erickson for all his basic work on this 405EX early
bootup.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-06-03 20:22:03 +02:00
Stefan Roese
17ceb069b8 ppc4xx: Consolidate PPC4xx SDRAM/DDR/DDR2 defines, part2
This patch now adds a new header file (asm-ppc/ppc4xx-sdram.h) for all
ppc4xx related SDRAM/DDR/DDR2 controller defines.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-06-03 20:21:58 +02:00
Stefan Roese
36ea16f6a0 ppc4xx: Consolidate PPC4xx SDRAM/DDR/DDR2 defines, part1
This patch removes all SDRAM related defines from the PPC4xx headers
ppc405.h and ppc440.h. This is needed since now some 405 PPC's use
the same SDRAM controller as 440 systems do (like 405EX and 440SP).

It also introduces new defines for the equipped SDRAM controller based on
which PPC variant is used. There new defines are:

used on 405GR/CR/EP and some Xilinx Virtex boards.

used on 440GP/GX/EP/GR.

used on 440EPx/GRx.

used on 405EX/r/440SP/SPe/460EX/GT.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-06-03 20:21:53 +02:00
Stefan Roese
64852d09e0 ppc4xx/NAND_SPL: Consolidate 405 and 440 NAND booting code in start.S
This patch consolidates the 405 and 440 parts of the NAND booting code
selected via CONFIG_NAND_SPL. Now common code is used to initialize the
SDRAM by calling initdram() and to "copy/relocate" to SDRAM/OCM/etc.
Only *after* running from this location, nand_boot() is called.

Please note that the initsdram() call is now moved from nand_boot.c
to start.S. I experienced problems with some boards like Kilauea
(405EX), which don't have internal SRAM (OCM) and relocation needs to
be done to SDRAM before the NAND controller can get accessed. When
initdram() is called later on in nand_boot(), this can lead to problems
with variables in the bss sections like nand_ecc_pos[].

Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Scott Wood <scottwood@freescale.com>
2008-06-03 20:21:49 +02:00
Grant Erickson
8a24c07ba5 ppc4xx: Enable Primordial Stack for 40x and Unify ECC Handling
This patch (Part 2 of 2):

* Rolls up a suite of changes to enable correct primordial stack and
  global data handling when the data cache is used for such a purpose
  for PPC40x-variants (i.e. CFG_INIT_DCACHE_CS).

* Related to the first, unifies DDR2 SDRAM and ECC initialization by
  eliminating redundant ECC initialization implementations and moving
  redundant SDRAM initialization out of board code into shared 4xx
  code.

* Enables MCSR visibility on the 405EX(r).

* Enables the use of the data cache for initial RAM on
  both AMCC's Kilauea and Makalu and removes a redundant
  CFG_POST_MEMORY flag from each board's CONFIG_POST value.

  - Removed, per Stefan Roese's request, defunct memory.c file for
    Makalu and rolled sdram_init from it into makalu.c.

With respect to the 4xx DDR initialization and ECC unification, there
is certainly more work that can and should be done (file renaming,
etc.). However, that can be handled at a later date on a second or
third pass. As it stands, this patch moves things forward in an
incremental yet positive way for those platforms that utilize this
code and the features associated with it.

Signed-off-by: Grant Erickson <gerickson@nuovations.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2008-06-03 20:21:20 +02:00
Grant Erickson
c821b5f120 ppc4xx: Enable Primordial Stack for 40x and Unify ECC Handling
This patch (Part 1 of 2):

* Rolls up a suite of changes to enable correct primordial stack and
  global data handling when the data cache is used for such a purpose
  for PPC40x-variants (i.e. CFG_INIT_DCACHE_CS).

* Related to the first, unifies DDR2 SDRAM and ECC initialization by
  eliminating redundant ECC initialization implementations and moving
  redundant SDRAM initialization out of board code into shared 4xx
  code.

* Enables MCSR visibility on the 405EX(r).

* Enables the use of the data cache for initial RAM on
  both AMCC's Kilauea and Makalu and removes a redundant
  CFG_POST_MEMORY flag from each board's CONFIG_POST value.

  - Removed, per Stefan Roese's request, defunct memory.c file for
    Makalu and rolled sdram_init from it into makalu.c.

With respect to the 4xx DDR initialization and ECC unification, there
is certainly more work that can and should be done (file renaming,
etc.). However, that can be handled at a later date on a second or
third pass. As it stands, this patch moves things forward in an
incremental yet positive way for those platforms that utilize this
code and the features associated with it.

Signed-off-by: Grant Erickson <gerickson@nuovations.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2008-06-03 20:20:50 +02:00
Grant Erickson
a439680019 PPC4xx: Simplified post_word_{load, store}
This patch simplifies post_word_{load,store} by using the preprocessor
to eliminate redundant, copy-and-pasted code.

Signed-off-by: Grant Erickson <gerickson@nuovations.com>
2008-06-03 20:20:01 +02:00
Stefan Roese
10a3367955 Merge branch 'master' of /home/stefan/git/u-boot/u-boot 2008-06-03 20:19:08 +02:00
Kumar Gala
f979690ee3 Fix warnings from gcc-4.3.0 build on a ppc host
* The cfi_flash.c memset fix actual allows the board to boot so there is
  a bit more going on here than just resolving warnings associated with
  uninitialized variables.

* include/asm/bitops.h:302: warning: '__swab32p' is static but used in
  inline function 'ext2_find_next_zero_bit' which is not static

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-06-03 19:52:52 +02:00
Becky Bruce
9b124a6834 MPC512x: Change traps.c to not reference non-addressable memory
Currently, END_OF_RAM is used by the trap code to determine if
we should attempt to access the stack pointer or not. However,
on systems with a lot of RAM, only a subset of the RAM is
guaranteed to be mapped in and accessible.  Change END_OF_RAM
to use get_effective_memsize() instead of using the raw ram
size out of the bd.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-06-03 19:47:14 +02:00
Kumar Gala
81673e9ae1 Make sure common.h is the first include.
If common.h isn't first we can get CONFIG_ options defined in the
board config file ignored.  This can cause an issue if any of those
config options impact the size of types of data structures
(eg CONFIG_PHYS_64BIT).

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-06-03 19:42:05 +02:00
Marian Balakowicz
95d449ad4d Avoid initrd and logbuffer area overlaps
Add logbuffer to reserved LMB areas to prevent initrd allocation
from overlaping with it.

Make sure to use correct logbuffer base address.

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-06-03 19:34:19 +02:00
Sascha Laue
6956d53d99 lwmon5: add memory-pattern-test to FPGA POST. 2008-06-03 19:30:07 +02:00
Becky Bruce
e34a0e911b PPC: 86xx Add bat registers to reginfo command
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-06-03 18:05:15 +02:00
Becky Bruce
d5b9b8cdb8 PPC: Add print_bats() to lib_ppc/bat_rw.c
This function prints the values of all the BAT register
pairs - I needed this for debug earlier this week; adding it to
lib_ppc so others can use it (and add it to reginfo commands
if so desired).

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-06-03 18:03:03 +02:00
Becky Bruce
c148f24c15 PPC: Change lib_ppc/bat_rw.c to use high bats
Currently, this code only deals with BATs 0-3, which makes
it useless on systems that support BATs 4-7.  Add the
support for these registers.

Signed-off-by: Becky Bruce <Becky.bruce@freescale.com>
2008-06-03 18:01:24 +02:00
Becky Bruce
31d8267224 PPC: Create and use CONFIG_HIGH_BATS
Change all code that conditionally operates on high bat
registers (that is, BATs 4-7) to look at CONFIG_HIGH_BATS
instead of the myriad ways this is done now.  Define the option
for every config for which high bats are supported (and
enabled by early boot, on parts where they're not always
enabled)

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-06-03 17:48:41 +02:00
Markus Klotzbuecher
f2aeecc320 Merge branch 'master' of git://www.denx.de/git/u-boot 2008-06-03 13:16:52 +02:00
Ben Warren
ea183432e7 Merge branch 'master' of git://www.denx.de/git/u-boot 2008-06-02 22:55:42 -07:00
Wolfgang Grandegger
aa3b8bf9c3 E1000: Add support for the 82541GI LF Intel Pro 1000 GT Desktop Adapter
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-06-02 22:39:20 -07:00
TsiChung Liew
ff36fbb2e7 ColdFire: Add 10 base ethernet support for mcf5445x
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-06-02 22:38:53 -07:00
Wolfgang Denk
912810eeca Merge remote branch 'u-boot-at91/for-1.3.4' 2008-06-03 00:24:36 +02:00
Wolfgang Denk
7a68389a23 Merge remote branch 'u-boot-avr32/master' 2008-06-03 00:19:57 +02:00
Wolfgang Denk
7feb4d38ff Merge remote branch 'u-boot-nand-flash/master' 2008-06-03 00:16:48 +02:00
Wolfgang Denk
e3d0d4ac0e Merge remote branch 'u-boot-mips/master' 2008-06-03 00:11:40 +02:00
Wolfgang Denk
9d2459f353 Merge remote branch 'u-boot-ppc4xx/master' 2008-06-02 23:28:39 +02:00
Jason McMullan
1a9fcc4b76 mips: Add an 'include/asm/errno.h', like all other architectures
All other u-boot architectures have an include/asm/errno.h, so
this change adds it to the mips include/asm-mips headers also.

Stolen from Linux 2.6.25.

Signed-off-by: Jason McMullan <mcmullan@netapp.com>
2008-05-30 00:53:38 +09:00
Shinya Kuribayashi
e2ad842662 [MIPS] <asm/mipsregs.h>: Update coprocessor register access macros
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
2008-05-30 00:53:38 +09:00
Shinya Kuribayashi
1a3adac81c [MIPS] <asm/mipsregs.h>: Update register / bit field definitions
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
2008-05-30 00:53:38 +09:00
Shinya Kuribayashi
bf462ae450 [MIPS] <asm/mipsregs.h>: CodinygStyle cleanups
No functional changes.

Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
2008-05-30 00:53:37 +09:00
Jason McMullan
89a1550ec6 mips: If CONFIG_CMD_SPI is defined, call spi_init()
The mips architecture currently does not call 'spi_init()' in the generic
board initialization routine is CONFIG_CMD_SPI is defined.

This patch rectifies that problem.

Signed-off-by: Jason McMullan <mcmullan@netapp.com>
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
2008-05-30 00:53:37 +09:00
Jason McMullan
e996bc339b [MIPS] lib_mips/board.c: Add nand_init
This patch adds the standard 'nand_init()' call to the mips generic
'board_init_r()' call, bringing MIPS in line with the other architectures.

Signed-off-by: Jason McMullan <mcmullan@netapp.com>
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
2008-05-30 00:53:37 +09:00
Scott Wood
d6ac2ed893 Remove prototypes of nand_init() in favor of including nand.h.
Likewise with onenand_init().

Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-05-28 11:06:29 -05:00
Scott Wood
229c56f07a Make onenand_uboot.h self-sufficient.
Don't assume types are provided by previously included headers.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-05-28 11:06:28 -05:00
Dirk Behme
9723bbb46a nand: Correct NAND erase percentage output
For NAND erase sizes smaller than one NAND erase block, erase
percentage output becomes grater than 100% e.g.

-- cut --
  > nand info
Device 0: NAND 64MiB 1,8V 8-bit, sector size 16 KiB
  > nand erase 0x100000 0x2000
NAND erase: device 0 offset 0x100000, size 0x2000
Erasing at 0x100000 -- 200% complete.
OK
  >
-- cut --

Correct this and give user a warning that more is erased than specified:

-- cut --
  > nand erase 0x100000 0x2000
NAND erase: device 0 offset 0x100000, size 0x2000
Warning: Erase size 0x00002000 smaller than one erase block 0x00004000
           Erasing 0x00004000 instead
Erasing at 0x100000 -- 100% complete.
OK
  >
-- cut --

Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
2008-05-28 11:06:27 -05:00
Stelian Pop
5922db6c09 Cleanup nand_info[] declaration.
The nand_info array is declared as extern in several .c files.
Those days, nand.h contains a reference to the array, so there is
no need to declare it elsewhere.

Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-05-28 11:06:25 -05:00
Scott Wood
135f0a7488 NAND: Provide a sane default for NAND_MAX_CHIPS.
This allows the header to be included regardless of whether a board's
config file provides NAND-related defininitions.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-05-28 11:06:24 -05:00
Haavard Skinnemoen
a8092c021d avr32: Fix theoretical race in udelay()
If the specified delay is very short, the cycle counter may go past the
"end" time we are waiting for before we get around to reading it.

Fix it by checking the different between the cycle count "now" and the
cycle count at the beginning. This will work as long as the delay
measured in number of cycles is below 2^31.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-05-27 15:27:31 +02:00
Haavard Skinnemoen
48ea623eae avr32: Compile atmel_mci.o conditionally
Remove #ifdef CONFIG_MMC from the source file and use conditional
compilation in the Makefile instead.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-05-27 15:27:31 +02:00
Haavard Skinnemoen
e92a5bf833 avr32: Fix wrong error flags in atmel_mci driver
Make sure we check for CRC errors when sending commands that use CRC
checking.

Reported-by: Gururaja Hebbar K R <gururajakr@sanyo.co.in>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-05-27 15:27:31 +02:00
Haavard Skinnemoen
7a96ddadd1 avr32: Fix two warnings in atmel_mci.c
The warnings are harmless but annoying. Let's fix them.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-05-27 15:27:31 +02:00
Haavard Skinnemoen
a23e277c4a avr32: Rework SDRAM initialization code
This cleans up the SDRAM initialization and related code a bit, and
allows faster booting.

  * Add definitions for EBI and internal SRAM to asm/arch/memory-map.h
  * Remove memory test from sdram_init() and make caller responsible
    for verifying the SDRAM and determining its size.
  * Remove base_address member from struct sdram_config (was sdram_info)
  * Add data_bits member to struct sdram_config and kill CFG_SDRAM_16BIT
  * Add support for a common STK1000 hack: 16MB SDRAM instead of 8.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-05-27 15:27:31 +02:00
Haavard Skinnemoen
95107b7c02 avr32: Do stricter stack checking in the exception handler
Don't do a stack dump if the stack pointer is outside the memory area
reserved for stack.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-05-27 15:27:30 +02:00
Haavard Skinnemoen
caf83ea888 avr32: Use the same entry point for reset and exception handling
Since the reset vector is always aligned to a very large boundary, we
can save a couple of KB worth of alignment padding by placing the
exception vectors at the same address.

Deciding which one it is is easy: If we're handling an exception, the
CPU is in Exception mode. If we're starting up after reset, the CPU is
in Supervisor mode. So this adds a very minimal overhead to the reset
path (only executed once) and the exception handling path (normally
never executed at all.)

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-05-27 15:27:30 +02:00
Haavard Skinnemoen
0c16eed218 avr32: Put memset in its own section
All C code is compiled with -ffunction-sections -fdata-sections.
Assembly functions should get their own sections as well so that
everything looks consistent.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-05-27 15:27:30 +02:00
Haavard Skinnemoen
3ace2527ba avr32: Rename pm_init() as clk_init() and make SoC-specific
pm_init() was always more about clock initialization than anything
else. Dealing with PLLs, clock gating and such is also inherently
SoC-specific, so move it into a SoC-specific directory.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-05-27 15:27:30 +02:00
Haavard Skinnemoen
4f5972c3b2 avr32: Use new-style Makefile for the at32ap platform
This makes it easier to avoid compiling certain files later.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-05-27 15:27:30 +02:00
Haavard Skinnemoen
a9b2bb78a1 avr32: Remove unused file cpu/at32ap/pm.c
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-05-27 15:27:30 +02:00
Haavard Skinnemoen
44453b25b0 avr32: Clean up the HMATRIX code
Rework the HMATRIX configuration interface so that it becomes easier
to configure the HMATRIX for boards with special needs, and add new
parts.

The HMATRIX header file has been split into a general,
chip-independent part with register definitions, etc. and a
chip-specific part with SFR bitfield definitions and master/slave
identifiers.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-05-27 15:27:29 +02:00
Haavard Skinnemoen
0a2e48792d avr32: Add support for the ATSTK1006 board
This is a replacement for ATSTK1002 with 64MB SDRAM and NAND flash on
board. It's currently in production and will be available soon.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-05-27 15:27:29 +02:00
Haavard Skinnemoen
781eb9a1e4 avr32: Get rid of the .flashprog section
The .flashprog section was only needed back when we were running
directly from flash, and it's even more useless on NGW100 since it
uses the CFI flash driver which never used this workaround in the
first place.

Remove it on STK1000 as well, and get rid of all the associated code and
annotations.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-05-27 15:27:29 +02:00
Haavard Skinnemoen
cdd42c0c7a avr32: Use correct condition around macb clock accessors
get_macb_pclk_rate() and get_macb_hclk_rate() should be available when
the chip has a MACB controller, not when it has a USART.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-05-27 15:27:29 +02:00
David Brownell
f793a35819 avr32: Disable the AP7000 internal watchdog on startup
This patch forces the watchdog off in all cases.  That will at least
get rid of the constant reboot cycle, though it won't let the watchdog
actually run in the new kernels:  its probe() comes up with a polite
warning.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-05-27 15:27:29 +02:00
David Brownell
55ac7a7490 avr32: stk1002 and ngw100 convergence
Make STK1002 and NGW100 boards act more alike:
  - STK boards can use as many arguments as NGW
  - STK boards don't need to manage FPGAs either
  - NGW commands should match STK ones

Also spell U-Boot right in prompts for STK1002 and NGW100.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
[haavard.skinnemoen@atmel.com: update STK100[34] as well]
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-05-27 15:27:29 +02:00
Sergei Poselenov
5e1882df6a Socrates: Fix PCI bus frequency report
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
2008-05-27 14:20:55 +02:00
Wolfgang Denk
1f1554841a Merge branch 'master' of /home/wd/git/u-boot/custodians
Conflicts:

	include/configs/socrates.h

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-05-27 12:56:01 +02:00
Sergei Poselenov
791e1dba8d Socrates: Added USB support.
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
2008-05-27 12:53:40 +02:00
Sergei Poselenov
5a904e5637 USB: add new configuration variable CONFIG_PCI_OHCI_DEVNO
In case of several PCI USB controllers on a board this variable
specifys which controller to use.
See doc/README.generic_usb_ohci for details.

Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
2008-05-27 12:53:34 +02:00
Sergei Poselenov
2f7468aeba Socrates: add support for DS75 Digital Thermo Sensor on I2C bus.
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
2008-05-27 12:51:25 +02:00
Sergei Poselenov
83e9d7a261 Socrates: Config file cleanup.
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
2008-05-27 12:51:00 +02:00
Jean-Christophe PLAGNIOL-VILLARD
602cac1389 MAKEALL: add at91 list
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-05-24 12:58:36 +02:00
Jean-Christophe PLAGNIOL-VILLARD
42fd5f87b1 Merging Stelian Pop AT91 patches
Merge branch 'testing-V2'

Conflicts:

	board/atmel/at91cap9adk/Makefile
                Fixing copyright
	board/atmel/at91sam9260ek/Makefile
                Fixing copyright
	board/atmel/at91sam9260ek/u-boot.lds
                Delete no more needed ld script

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-05-24 12:56:53 +02:00
Ron Madrid
290ef64368 Add Marvell 88E1118 support for TSEC
Signed-off-by: Ron Madrid <ron_madrid@sbcglobal.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-05-23 20:25:19 -07:00
Jens Gehrlein
557b377d8b smc911x: add 16 bit support
Signed-off-by: Jens Gehrlein <sew_s@tqs.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-05-22 23:10:01 -07:00
Christian Eggers
6324e5bec8 Fix endianess conversion in usb_ohci.c
Sorry, I forgot this line:

Signed-off-by: Christian Eggers <ceggers@gmx.de>

I think this must be swapped (result may be equal).
2008-05-22 17:56:46 +02:00
Christian Eggers
c918261c6d USB: replace old swap_ with proper endianess conversion macros
Signed-off-by: Christian Eggers <ceggers@gmx.de>
Signed-off-by: Markus Klotzbuecher <mk@denx.de>
2008-05-22 17:29:32 +02:00
Christian Eggers
fb63939b4f Fix endianess conversion in usb_ohci.c
Signed-off-by: Christian Eggers <ceggers@gmx.de>
Signed-off-by: Markus Klotzbuecher <mk@denx.de>
2008-05-22 17:14:17 +02:00
Sergei Poselenov
477434c63c USB: add support for multiple PCI OHCI controllers
Add new configuration variable CONFIG_PCI_OHCI_DEVNO.
In case of several PCI USB controllers on a board this variable
specifys which controller to use.

Also add USB support for sokrates board.

See doc/README.generic_usb_ohci for details.

Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
Signed-off-by: Markus Klotzbuecher <mk@denx.de>
2008-05-22 17:12:48 +02:00
Stefan Roese
97f7d27c8e Merge branch 'quad100hd' 2008-05-21 17:39:24 +02:00
Wolfgang Denk
2c8d41969b Merge branch 'master' of git://git.denx.de/u-boot-testing 2008-05-21 17:06:45 +02:00
Wolfgang Denk
ce6754df61 Fix some whitespace issues
introduced by 53677ef18 "Big white-space cleanup."

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-05-21 16:56:08 +02:00
Wolfgang Denk
0ad4770f8e Merge branch 'socrates' of /home/wd/git/u-boot/projects 2008-05-21 01:13:52 +02:00
Wolfgang Denk
eddc7c46c6 Merge branch 'lwmon5' of /home/wd/git/u-boot/projects 2008-05-21 01:13:39 +02:00
York Sun
4416603aeb Make ads5121 out-of-tree compiling safe
Reuse the existing DIU driver in board/freescale/common.

Signed-off-by: York Sun <yorksun@freescale.com>
2008-05-21 00:54:37 +02:00
York Sun
0e1bad47cd Adding DIU support for Freescale 5121ADS
Add DIU and cfb console support to FSL 5121ADS board.

Use #define CONFIG_VIDEO in config file to enable fb console.

Signed-off-by: York Sun <yorksun@freescale.com>
2008-05-21 00:54:36 +02:00
York Sun
a48ff68d23 Replace DPRINTF with debug
Remove DPRINTF macro and replace it with generic debug macro.

Signed-off-by: York Sun <yorksun@freescale.com>
2008-05-21 00:54:36 +02:00
York Sun
3b80c5f574 Move pixel clock setting to board file
The clock divider has different format in 5121 and 8610. This patch moves it to
board specific code.

Signed-off-by: York Sun <yorksun@freescale.com>
2008-05-21 00:54:36 +02:00
Wolfgang Denk
53677ef18e Big white-space cleanup.
This commit gets rid of a huge amount of silly white-space issues.
Especially, all sequences of SPACEs followed by TAB characters get
removed (unless they appear in print statements).

Also remove all embedded "vim:" and "vi:" statements which hide
indentation problems.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-05-21 00:14:08 +02:00
Sergei Poselenov
2f845dc2bd socrates: fix second TSEC configuration (it is actually TSEC3)
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
2008-05-20 23:27:52 +02:00
Sergei Poselenov
793670c3c0 Fixed reset for socrates
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
2008-05-20 23:27:50 +02:00
Sergei Poselenov
e18575d5f5 socrates: changes to support FDT
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-05-20 23:27:49 +02:00
Sergei Poselenov
5d108ac8f4 Initial support for "Socrates" board
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
2008-05-20 23:27:46 +02:00
Yuri Tikhonov
0e15ddd11f POST: replace the LOGBUFF_INITIALIZED flag in gd->post_log_word (1 << 31) with the GD_FLG_LOGINIT flag in gd->flags.
This way we become able to utilize the full post_log_word for POST
activities (overwise, POST ECC, which has 0x8000 ID, could be
erroneously treated as started in post_output_backlog() even if there
was actually no POST ECC run (because of OCM POST failure, for
example).

Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
2008-05-20 23:24:38 +02:00
Yuri Tikhonov
7845d49094 POST: mark OCM test as POST_STOP
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
2008-05-20 23:24:38 +02:00
Yuri Tikhonov
28a3850658 POST: add POST_STOP flag
Don't run futher tests in case of a test fails that is marked as
POST_STOP.

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
2008-05-20 23:24:37 +02:00
Yuri Tikhonov
a525145d81 POST: switch CFG_POST_OCM with CFG_POST_CODEC (workaround)
Switch the OCM testid with the codec one. The reason is that current
implementation requires the POST_ROM testid to fit into lower 16
bits, and the codec test will never run with POST_ROM hopefully.

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
2008-05-20 23:24:37 +02:00
Yuri Tikhonov
8b96c788d5 lwmon5: enable OCM post test on lwmon5 board
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
2008-05-20 23:24:37 +02:00
Yuri Tikhonov
6e8ec68226 POST: OCM test added.
Added OCM test to POST layer. This version runs before all other tests
but doesn't yet interrupt post sequence on failure.

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
2008-05-20 23:24:37 +02:00
Yuri Tikhonov
6891260bdd POST: typo fix
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
2008-05-20 23:22:52 +02:00
Hebbar
727f633346 common/usb.c: fix incorrect escape sequence
Signed off by: Gururaja Hebbar <gururajakr@sanyo.co.in>
2008-05-20 11:28:09 +02:00
York Sun
4ce1e23b5e Fix 8313ERDB board configuration
Change LCRR clock ratio from 2 to 4 to commodate VSC7385.
Correct TSEC1 vs TSEC2 assignment.
Define ETHADDR and ETH1ADDR always.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Timur Tabi <timur@freescale.com>
2008-05-19 23:04:24 +02:00
Jon Loeliger
2c289e320d mpc86xx: Removed unused and unconfigured memory test code.
Besides, other common code exists.

Signed-off-by: Jon Loeliger <jdl@freescale.com>
2008-05-19 09:47:25 -05:00
Gary Jennejohn
0c11935cd6 ppc4xx: QUAD100HD: Allow the environment to be put into flash.
After moving TEXT_BASE the value for CFG_ENV_ADDR was incorrect.  Also
use a redundant environment.

Signed-off-by: Gary Jennejohn <garyj@denx.de>
2008-05-14 14:02:42 +02:00
Stelian Pop
54694a9142 Cleanup nand_info[] declaration.
The nand_info array is declared as extern in several .c files.
Those days, nand.h contains a reference to the array, so there is
no need to declare it elsewhere.

Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-05-13 21:49:04 +02:00
Stelian Pop
67e3beb52c AT91: Cleanup unused config header file definitions.
CONFIG_ENV_OVERWRITE is commented out in the config header files,
so let's cleanup the files by removing the whole definition.

Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-05-10 11:49:11 +02:00
Stelian Pop
19883aede2 Support AT91CAP9 revC CPUs
The AT91CAP9 revC CPU has a few differences over the previous,
revB CPU which was distributed in small quantities only (revA was
an internal Atmel product only).

The revC silicon needs a special initialisation sequence to
switch from the internal (imprecise) RC oscillator to the
external 32k clock.

Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-05-10 11:45:03 +02:00
Stelian Pop
098b7b4b44 Use custom logo for Atmel boards
This patch adds a custom vendor logo for the Atmel AT91 boards.

Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-05-10 11:45:03 +02:00
Stelian Pop
761c70b80c AT91SAM9RLEK: hook up the ATMEL LCD driver
This patch makes the necessary adaptations (PIO configurations and
defines in config header file) to hook up the Atmel LCD driver to the
AT91SAM9RLEK board.

Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-05-10 11:45:02 +02:00
Stelian Pop
56a2479cd7 AT91SAM9263EK: hook up the ATMEL LCD driver
This patch makes the necessary adaptations (PIO configurations and
defines in config header file) to hook up the Atmel LCD driver to the
AT91SAM9263EK board.

Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-05-10 11:45:02 +02:00
Stelian Pop
820f2a9583 AT91SAM9261EK: hook up the ATMEL LCD driver
This patch makes the necessary adaptations (PIO configurations and
defines in config header file) to hook up the Atmel LCD driver to the
AT91SAM9261EK board.

Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-05-10 11:45:02 +02:00
Stelian Pop
c139b17d20 AT91CAP9ADK: hook up the ATMEL LCD driver
This patch makes the necessary adaptations (PIO configurations and
defines in config header file) to hook up the Atmel LCD driver to the
AT91CAP9ADK board.

Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-05-10 11:45:02 +02:00
Stelian Pop
39cf480484 Add ATMEL LCD driver
This patch adds support for the ATMEL LCDC driver which is used on some
AT91 and AVR platforms.

Is has been tested with the AT91CAP9ADK, AT91SAM9261EK, AT91SAM9263EK and
AT91SAM9RLEK boards. Adaptation for AVR32 should probably be easy.

Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-05-10 11:44:55 +02:00
Stelian Pop
2118ebb44d AT91SAM9RLEK support
This patch adds support for the AT91SAM9RL chip and the AT91SAM9RLEK
board.

Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-05-10 11:35:23 +02:00
Stelian Pop
8e429b3eee AT91SAM9263EK support
This patch adds support for the AT91SAM9263 chip and the AT91SAM9263EK
board.

Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-05-10 11:34:29 +02:00
Stelian Pop
d99a8ff66d AT91SAM9261EK support
This patch adds support for the AT91SAM9261 chip and the AT91SAM9261EK
board.

Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-05-10 11:32:08 +02:00
Stelian Pop
86c8c8a414 AT91SAM9260EK: Fix dataflash offsets in CONFIG_BOOTCOMMAND
This patch fixes the dataflash offsets used in CONFIG_BOOTCOMMAND
in order to cope with the changes in DataFlash partitionning scheme
(cset c3a60cb3).

Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-05-10 11:32:07 +02:00
Stelian Pop
96996ac25d AT91SAM9260EK: Normalize BOOTARGS
This patch adapts CONFIG_BOOTARGS to the chosen boot method (boot from
DataFlash or from NAND), and gives to Linux a fully specified mtdparts
variable.

Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-05-10 11:32:07 +02:00
Stelian Pop
79f0cb6e9c AT91SAM9260EK: Normalize SPI timings
This patch changes the SPI timings to closely match the ones
used by the Linux kernel and the Atmel's own bootstrap project.

Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-05-10 11:32:07 +02:00
Stelian Pop
c1212b2f5c AT91SAM9260EK: Handle 8 or 16 bit NAND
The Atmel boards can handle 8 or 16 bit NAND memories. This patch
makes the support configurable in the board config header file
(CFG_NAND_DBW_8 or CFG_NAND_DBW_16).

Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-05-10 11:32:07 +02:00
Stelian Pop
ab52640fc0 AT91CAP9ADK: Fix dataflash offsets in CONFIG_BOOTCOMMAND
This patch fixes the dataflash offsets used in CONFIG_BOOTCOMMAND
in order to cope with the changes in DataFlash partitionning scheme
(cset c3a60cb3).

Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-05-10 11:32:07 +02:00
Stelian Pop
3267508ec4 AT91CAP9ADK: Normalize BOOTARGS
This patch adapts CONFIG_BOOTARGS to the chosen boot method (boot from
DataFlash or from NAND), and gives to Linux a fully specified mtdparts
variable.

Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-05-10 11:32:07 +02:00
Stelian Pop
93da48b910 AT91CAP9ADK: Normalize SPI timings
This patch changes the SPI timings to closely match the ones
used by the Linux kernel and the Atmel's own bootstrap project.

Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-05-10 11:32:06 +02:00
Stelian Pop
1c90df3e14 AT91CAP9ADK: Handle 8 or 16 bit NAND
The Atmel boards can handle 8 or 16 bit NAND memories. This patch
makes the support configurable in the board config header file
(CFG_NAND_DBW_8 or CFG_NAND_DBW_16).

Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-05-10 11:32:06 +02:00
Stelian Pop
11b162bae0 Use a common u-boot.lds file across all AT91CAP9/AT91SAM9 platforms
All the AT91CAP9/AT91SAM9 boards have the same linker script. The patch
below avoids the duplication of u-boot.lds by putting the file in the
cpu directory instead of the board one.

Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-05-10 11:32:06 +02:00
Stelian Pop
d48abea4b8 Add proper copyright notices in Atmel boards Makefiles
The Makefiles for the AT91CAP9/AT91SAM9 boards have an incomplete
copyright notice. This patch adds the missing pieces.

Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-05-10 11:32:06 +02:00
Stelian Pop
e817a042ce Add copyright information in Atmel boards partition.c
When Ulf did the dataflash.c cleanup, he didn't add his copyright on
the new created files. This patch fixes the problem.

Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-05-10 11:32:06 +02:00
Stelian Pop
4f6c810106 Update origin and copyright information in arch-at91sam9 header files
When doing the AT91CAP9/AT91SAM9 port, a number of header files were
copied from the Linux kernel sources. This patch explicitly specifies
this origin for all the copied headers, and for those missing copyright
information, adds it.

Additionaly, the header file 'at91sam926x_mc.h' has been superceeded
in the latest kernel sources by 'at91sam9_smc.h'.

The copyright information has been confirmed by the AT91 Linux kernel
maintainer, Andrew Victor <avictor.za@gmail.com>.

Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-05-10 11:30:13 +02:00
Stelian Pop
567fb85217 Fix @ -> <at> substitution
When applying the AT91CAP9 patches upstream, something transformed
the '@' character into the ' <at> ' sequence.

The patch below restores the original form in all the places where
it has been modified (the AT91CAP9 files, the AT91SAM9260 files which
were copied from AT91CAP9, and a couple of other files where the
' <at> ' sequence was present).

Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-05-08 23:40:42 +02:00
Gary Jennejohn
73ccb3410a ppc4xx: Add the Harris QUAD100HD AMCC 405EP-based board
Signed-off-by: Gary Jennejohn <garyj@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2008-05-08 16:44:01 +02:00
2167 changed files with 50094 additions and 29139 deletions

7
.gitignore vendored
View File

@@ -26,6 +26,8 @@
/u-boot.ldr
/u-boot.ldr.hex
/u-boot.ldr.srec
/u-boot-onenand.bin
/u-boot-flexonenand.bin
#
# Generated files
@@ -46,3 +48,8 @@ series
# cscope files
cscope.*
# OneNAND IPL files
/onenand_ipl/onenand-ipl*
/onenand_ipl/board/*/onenand*
/onenand_ipl/board/*/*.S

6310
CHANGELOG

File diff suppressed because it is too large Load Diff

View File

@@ -424,6 +424,10 @@ N: Paolo Scaffardi
E: arsenio@tin.it
D: FADS823 configuration, MPC823 video support, I2C, wireless keyboard, lots more
N: Andre Schwarz
E: andre.schwarz@matrix-vision.de
D: Support for Matrix Vision boards (MVBLM7/MVBC_P)
N: Robert Schwebel
E: r.schwebel@pengutronix.de
D: Support for csb226, logodl and innokom boards (PXA2xx)
@@ -533,3 +537,8 @@ N: Timo Tuunainen
E: timo.tuunainen@sysart.fi
D: Support for Artila M-501 starter kit
W: http://www.sysart.fi/
N: Philip Balister
E: philip@opensdr.com
D: Port to Lyrtech SFFSDR development board.
W: www.opensdr.com

View File

@@ -186,7 +186,6 @@ Wolfgang Grandegger <wg@denx.de>
CCM MPC855
PN62 MPC8240
IPHASE4539 MPC8260
SCM MPC8260
@@ -204,6 +203,10 @@ Klaus Heydeck <heydeck@kieback-peter.de>
KUP4K MPC855
KUP4X MPC859
Gary Jennejohn <garyj@denx.de>
quad100hd PPC405EP
Murray Jensen <Murray.Jensen@csiro.au>
cogent_mpc8xx MPC8xx
@@ -236,6 +239,10 @@ The LEOX team <team@leox.org>
ELPT860 MPC860T
Guennadi Liakhovetski <g.liakhovetski@gmx.de>
linkstation MPC8241
Dave Liu <daveliu@freescale.com>
MPC8315ERDB MPC8315
@@ -367,6 +374,11 @@ Peter De Schrijver <p2@mind.be>
ML2 PPC4xx
Andre Schwarz <andre.schwarz@matrix-vision.de>
mvbc_p MPC5200
mvblm7 MPC8343
Timur Tabi <timur@freescale.com>
MPC8349E-mITX MPC8349
@@ -404,14 +416,14 @@ Stephen Williams <steve@icarus.com>
JSE PPC405GPr
Roy Zang <tie-fei.zang@freescale.com>
mpc7448hpc2 MPC7448
John Zhan <zhanz@sinovee.com>
svm_sc8xx MPC8xx
Guennadi Liakhovetski <g.liakhovetski@gmx.de>
linkstation MPC8241
-------------------------------------------------------------------------
Unknown / orphaned boards:
@@ -484,12 +496,6 @@ Kshitij Gupta <kshitij@ti.com>
omap1510inn ARM925T
omap1610inn ARM926EJS
Kyle Harris <kharris@nexus-tech.net>
lubbock xscale
cradle xscale
ixdp425 xscale
Gary Jennejohn <gj@denx.de>
smdk2400 ARM920T
@@ -521,12 +527,13 @@ Rolf Offermanns <rof@sysgo.de>
shannon SA1100
Kyungmin Park <kyungmin.park@samsung.com>
apollon ARM1136EJS
Peter Pearse <peter.pearse@arm.com>
integratorcp All current ARM supplied &
supported core modules
-see http://www.arm.com
/products/DevTools
/Hardware_Platforms.html
integratorcp All current ARM supplied & supported core modules
-see http://www.arm.com/products/DevTools/Hardware_Platforms.html
versatile ARM926EJ-S
versatile ARM926EJ-S
@@ -538,6 +545,9 @@ Stelian Pop <stelian.pop@leadtechdesign.com>
at91cap9adk ARM926EJS (AT91CAP9 SoC)
at91sam9260ek ARM926EJS (AT91SAM9260 SoC)
at91sam9261ek ARM926EJS (AT91SAM9261 SoC)
at91sam9263ek ARM926EJS (AT91SAM9263 SoC)
at91sam9rlek ARM926EJS (AT91SAM9RL SoC)
Stefan Roese <sr@denx.de>
@@ -550,6 +560,13 @@ Robert Schwebel <r.schwebel@pengutronix.de>
csb226 xscale
innokom xscale
Michael Schwingen <michael@schwingen.org>
actux1 xscale
actux2 xscale
actux3 xscale
actux4 xscale
Andrea Scian <andrea.scian@dave-tech.it>
B2 ARM7TDMI (S3C44B0X)
@@ -564,21 +581,19 @@ Richard Woodruff <r-woodruff2@ti.com>
omap2420h4 ARM1136EJS
Kyungmin Park <kyungmin.park@samsung.com>
apollon ARM1136EJS
Alex Z<>pke <azu@sysgo.de>
lart SA1100
dnp1110 SA1110
Michael Schwingen <michael@schwingen.org>
-------------------------------------------------------------------------
actux1 xscale
actux2 xscale
actux3 xscale
actux4 xscale
Unknown / orphaned boards:
Board CPU Last known maintainer / Comment
.........................................................................
cradle xscale Kyle Harris <kharris@nexus-tech.net> / dead address
ixdp425 xscale Kyle Harris <kharris@nexus-tech.net> / dead address
lubbock xscale Kyle Harris <kharris@nexus-tech.net> / dead address
#########################################################################
# x86 Systems: #
@@ -668,6 +683,10 @@ Matthias Fuchs <matthias.fuchs@esd-electronics.com>
TASREG MCF5249
Hayden Fraser <Hayden.Fraser@freescale.com>
M5253EVBE mcf52x2
TsiChung Liew <Tsi-Chung.Liew@freescale.com>
M52277EVB mcf5227x
@@ -678,10 +697,6 @@ TsiChung Liew <Tsi-Chung.Liew@freescale.com>
M5475EVB mcf547x_8x
M5485EVB mcf547x_8x
Hayden Fraser <Hayden.Fraser@freescale.com>
M5253EVBE mcf52x2
#########################################################################
# AVR32 Systems: #
# #
@@ -695,6 +710,7 @@ Haavard Skinnemoen <hskinnemoen@atmel.com>
ATSTK1002 AT32AP7000
ATSTK1003 AT32AP7001
ATSTK1004 AT32AP7002
ATSTK1006 AT32AP7000
ATNGW100 AT32AP7000
#########################################################################
@@ -704,12 +720,17 @@ Haavard Skinnemoen <hskinnemoen@atmel.com>
# Board CPU #
#########################################################################
Yusuke Goda <goda.yusuke@renesas.com>
MIGO-R SH7722
Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
MS7750SE SH7750
MS7722SE SH7722
R7780MP SH7780
R2DPlus SH7751R
SH7763RDP SH7763
Mark Jonas <mark.jonas@de.bosch.com>
@@ -719,10 +740,6 @@ Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
MS7720SE SH7720
Yusuke Goda <goda.yusuke@renesas.com>
MIGO-R SH7722
#########################################################################
# Blackfin Systems: #
# #

42
MAKEALL
View File

@@ -48,6 +48,7 @@ LIST_5xxx=" \
mecp5200 \
motionpro \
munices \
MVBC_P \
o2dnt \
pf5200 \
PM520 \
@@ -219,6 +220,7 @@ LIST_4xx=" \
PMC405 \
PMC440 \
PPChameleonEVB \
quad100hd \
rainier \
sbc405 \
sc3 \
@@ -330,6 +332,7 @@ LIST_83xx=" \
MPC8360ERDK_66 \
MPC837XEMDS \
MPC837XERDB \
MVBLM7 \
sbc8349 \
TQM834x \
"
@@ -354,10 +357,12 @@ LIST_85xx=" \
sbc8540 \
sbc8548 \
sbc8560 \
socrates \
stxgp3 \
stxssa \
TQM8540 \
TQM8541 \
TQM8548 \
TQM8555 \
TQM8560 \
"
@@ -457,10 +462,6 @@ LIST_ARM7=" \
#########################################################################
LIST_ARM9=" \
at91cap9adk \
at91rm9200dk \
at91sam9260ek \
cmc_pu2 \
ap920t \
ap922_XA10 \
ap926ejs \
@@ -471,11 +472,7 @@ LIST_ARM9=" \
cp926ejs \
cp946es \
cp966 \
csb637 \
kb9202 \
lpd7a400 \
m501sk \
mp2usb \
mx1ads \
mx1fs2 \
netstar \
@@ -496,6 +493,7 @@ LIST_ARM9=" \
voiceblue \
davinci_dvevm \
davinci_schmoogie \
davinci_sffsdr \
davinci_sonata \
"
@@ -519,12 +517,29 @@ LIST_ARM11=" \
mx31ads \
"
#########################################################################
## AT91 Systems
#########################################################################
LIST_at91=" \
at91cap9adk \
at91rm9200dk \
at91sam9260ek \
at91sam9261ek \
at91sam9263ek \
at91sam9rlek \
cmc_pu2 \
csb637 \
kb9202 \
mp2usb \
m501sk \
"
#########################################################################
## Xscale Systems
#########################################################################
LIST_pxa=" \
adsvix \
cerf250 \
cradle \
csb226 \
@@ -561,6 +576,7 @@ LIST_arm=" \
${LIST_ARM9} \
${LIST_ARM10} \
${LIST_ARM11} \
${LIST_at91} \
${LIST_pxa} \
${LIST_ixp} \
"
@@ -675,7 +691,7 @@ LIST_coldfire=" \
M52277EVB \
M5235EVB \
M5249EVB \
M5253EVB \
M5253EVBE \
M5271EVB \
M5272C3 \
M5275EVB \
@@ -696,6 +712,7 @@ LIST_avr32=" \
atstk1002 \
atstk1003 \
atstk1004 \
atstk1006 \
atngw100 \
"
@@ -722,9 +739,10 @@ LIST_sh3=" \
LIST_sh4=" \
ms7750se \
ms7722se \
Migo-R \
MigoR \
r7780mp \
r2dplus \
sh7763rdp \
"
LIST_sh=" \
@@ -764,7 +782,7 @@ build_target() {
for arg in $@
do
case "$arg" in
arm|SA|ARM7|ARM9|ARM10|ARM11|ixp|pxa \
arm|SA|ARM7|ARM9|ARM10|ARM11|at91|ixp|pxa \
|avr32 \
|blackfin \
|coldfire \

291
Makefile
View File

@@ -23,7 +23,7 @@
VERSION = 1
PATCHLEVEL = 3
SUBLEVEL = 3
SUBLEVEL = 4
EXTRAVERSION =
U_BOOT_VERSION = $(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)
VERSION_FILE = $(obj)include/version_autogenerated.h
@@ -220,10 +220,12 @@ LIBS += drivers/hwmon/libhwmon.a
LIBS += drivers/i2c/libi2c.a
LIBS += drivers/input/libinput.a
LIBS += drivers/misc/libmisc.a
LIBS += drivers/mmc/libmmc.a
LIBS += drivers/mtd/libmtd.a
LIBS += drivers/mtd/nand/libnand.a
LIBS += drivers/mtd/nand_legacy/libnand_legacy.a
LIBS += drivers/mtd/onenand/libonenand.a
LIBS += drivers/mtd/spi/libspi_flash.a
LIBS += drivers/net/libnet.a
LIBS += drivers/net/sk98lin/libsk98lin.a
LIBS += drivers/pci/libpci.a
@@ -344,10 +346,9 @@ $(U_BOOT_NAND): $(NAND_SPL) $(obj)u-boot.bin $(obj)include/autoconf.mk
cat $(obj)nand_spl/u-boot-spl-16k.bin $(obj)u-boot.bin > $(obj)u-boot-nand.bin
$(ONENAND_IPL): $(VERSION_FILE) $(obj)include/autoconf.mk
$(MAKE) -C $(obj)onenand_ipl/board/$(BOARDDIR) all
$(MAKE) -C onenand_ipl/board/$(BOARDDIR) all
$(U_BOOT_ONENAND): $(ONENAND_IPL) $(obj)u-boot.bin $(obj)include/autoconf.mk
$(MAKE) -C $(obj)onenand_ipl/board/$(BOARDDIR) all
cat $(obj)onenand_ipl/onenand-ipl-2k.bin $(obj)u-boot.bin > $(obj)u-boot-onenand.bin
cat $(obj)onenand_ipl/onenand-ipl-4k.bin $(obj)u-boot.bin > $(obj)u-boot-flexonenand.bin
@@ -386,10 +387,12 @@ TAG_SUBDIRS += drivers/hwmon
TAG_SUBDIRS += drivers/i2c
TAG_SUBDIRS += drivers/input
TAG_SUBDIRS += drivers/misc
TAG_SUBDIRS += drivers/mmc
TAG_SUBDIRS += drivers/mtd
TAG_SUBDIRS += drivers/mtd/nand
TAG_SUBDIRS += drivers/mtd/nand_legacy
TAG_SUBDIRS += drivers/mtd/onenand
TAG_SUBDIRS += drivers/mtd/spi
TAG_SUBDIRS += drivers/net
TAG_SUBDIRS += drivers/net/sk98lin
TAG_SUBDIRS += drivers/pci
@@ -484,11 +487,14 @@ PATI_config: unconfig
#########################################################################
aev_config: unconfig
@$(MKCONFIG) -a aev ppc mpc5xxx tqm5200
@$(MKCONFIG) -a aev ppc mpc5xxx tqm5200 tqc
BC3450_config: unconfig
@$(MKCONFIG) -a BC3450 ppc mpc5xxx bc3450
cm5200_config: unconfig
@$(MKCONFIG) -a cm5200 ppc mpc5xxx cm5200
cpci5200_config: unconfig
@$(MKCONFIG) -a cpci5200 ppc mpc5xxx cpci5200 esd
@@ -536,9 +542,6 @@ icecube_5100_config: unconfig
jupiter_config: unconfig
@$(MKCONFIG) jupiter ppc mpc5xxx jupiter
v38b_config: unconfig
@$(MKCONFIG) -a v38b ppc mpc5xxx v38b
inka4x0_config: unconfig
@$(MKCONFIG) inka4x0 ppc mpc5xxx inka4x0
@@ -613,9 +616,20 @@ prs200_highboot_DDR_config: unconfig
mecp5200_config: unconfig
@$(MKCONFIG) mecp5200 ppc mpc5xxx mecp5200 esd
motionpro_config: unconfig
@$(MKCONFIG) motionpro ppc mpc5xxx motionpro
munices_config: unconfig
@$(MKCONFIG) munices ppc mpc5xxx munices
MVBC_P_config: unconfig
@mkdir -p $(obj)include
@mkdir -p $(obj)board/mvbc_p
@ >$(obj)include/config.h
@[ -z "$(findstring MVBC_P,$@)" ] || \
{ echo "#define CONFIG_MVBC_P" >>$(obj)include/config.h; }
@$(MKCONFIG) -n $@ -a MVBC_P ppc mpc5xxx mvbc_p matrix_vision
o2dnt_config: unconfig
@$(MKCONFIG) o2dnt ppc mpc5xxx o2dnt
@@ -638,13 +652,10 @@ PM520_ROMBOOT_DDR_config: unconfig
@$(MKCONFIG) -a PM520 ppc mpc5xxx pm520
smmaco4_config: unconfig
@$(MKCONFIG) -a smmaco4 ppc mpc5xxx tqm5200
cm5200_config: unconfig
@$(MKCONFIG) -a cm5200 ppc mpc5xxx cm5200
@$(MKCONFIG) -a smmaco4 ppc mpc5xxx tqm5200 tqc
spieval_config: unconfig
@$(MKCONFIG) -a spieval ppc mpc5xxx tqm5200
@$(MKCONFIG) -a spieval ppc mpc5xxx tqm5200 tqc
TB5200_B_config \
TB5200_config: unconfig
@@ -653,7 +664,7 @@ TB5200_config: unconfig
{ echo "#define CONFIG_TQM5200_B" >>$(obj)include/config.h ; \
$(XECHO) "... with MPC5200B processor" ; \
}
@$(MKCONFIG) -n $@ -a TB5200 ppc mpc5xxx tqm5200
@$(MKCONFIG) -n $@ -a TB5200 ppc mpc5xxx tqm5200 tqc
MINI5200_config \
EVAL5200_config \
@@ -702,7 +713,7 @@ TQM5200_B_HIGHBOOT_config \
TQM5200_config \
TQM5200_STK100_config: unconfig
@mkdir -p $(obj)include
@mkdir -p $(obj)board/tqm5200
@mkdir -p $(obj)board/tqc/tqm5200
@[ -z "$(findstring cam5200,$@)" ] || \
{ echo "#define CONFIG_CAM5200" >>$(obj)include/config.h ; \
echo "#define CONFIG_TQM5200S" >>$(obj)include/config.h ; \
@@ -735,23 +746,24 @@ TQM5200_STK100_config: unconfig
@[ -z "$(findstring HIGHBOOT,$@)" ] || \
{ echo "TEXT_BASE = 0xFFF00000" >$(obj)board/tqm5200/config.tmp ; \
}
@$(MKCONFIG) -n $@ -a TQM5200 ppc mpc5xxx tqm5200
@$(MKCONFIG) -n $@ -a TQM5200 ppc mpc5xxx tqm5200 tqc
uc101_config: unconfig
@$(MKCONFIG) uc101 ppc mpc5xxx uc101
motionpro_config: unconfig
@$(MKCONFIG) motionpro ppc mpc5xxx motionpro
v38b_config: unconfig
@$(MKCONFIG) -a v38b ppc mpc5xxx v38b
#########################################################################
## MPC512x Systems
#########################################################################
ads5121_config \
ads5121_PCI_config \
ads5121_rev2_config \
: unconfig
@mkdir -p $(obj)include
@if [ "$(findstring _PCI_,$@)" ] ; then \
echo "#define CONFIG_PCI" >>$(obj)include/config.h ; \
$(XECHO) "... with PCI enabled" ; \
@if [ "$(findstring rev2,$@)" ] ; then \
echo "#define CONFIG_ADS5121_REV2 1" > $(obj)include/config.h; \
fi
@$(MKCONFIG) -a ads5121 ppc mpc512x ads5121
@@ -828,7 +840,7 @@ hermes_config : unconfig
@$(MKCONFIG) $(@:_config=) ppc mpc8xx hermes
HMI10_config : unconfig
@$(MKCONFIG) $(@:_config=) ppc mpc8xx tqm8xx
@$(MKCONFIG) $(@:_config=) ppc mpc8xx tqm8xx tqc
IAD210_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc mpc8xx IAD210 siemens
@@ -1057,7 +1069,7 @@ RRvision_LCD_config: unconfig
@$(MKCONFIG) -a RRvision ppc mpc8xx RRvision
SM850_config : unconfig
@$(MKCONFIG) $(@:_config=) ppc mpc8xx tqm8xx
@$(MKCONFIG) $(@:_config=) ppc mpc8xx tqm8xx tqc
spc1920_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc mpc8xx spc1920
@@ -1107,13 +1119,13 @@ virtlab2_config: unconfig
echo "#define CONFIG_NEC_NL6448BC20" >>$(obj)include/config.h ; \
$(XECHO) "... with LCD display" ; \
}
@$(MKCONFIG) -a $(call xtract_8xx,$@) ppc mpc8xx tqm8xx
@$(MKCONFIG) -a $(call xtract_8xx,$@) ppc mpc8xx tqm8xx tqc
TTTech_config: unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_LCD" >$(obj)include/config.h
@echo "#define CONFIG_SHARP_LQ104V7DS01" >>$(obj)include/config.h
@$(MKCONFIG) -a TQM823L ppc mpc8xx tqm8xx
@$(MKCONFIG) -a TQM823L ppc mpc8xx tqm8xx tqc
uc100_config : unconfig
@$(MKCONFIG) $(@:_config=) ppc mpc8xx uc100
@@ -1128,7 +1140,7 @@ wtk_config: unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_LCD" >$(obj)include/config.h
@echo "#define CONFIG_SHARP_LQ065T9DR51U" >>$(obj)include/config.h
@$(MKCONFIG) -a TQM823L ppc mpc8xx tqm8xx
@$(MKCONFIG) -a TQM823L ppc mpc8xx tqm8xx tqc
#########################################################################
## PPC4xx Systems
@@ -1216,6 +1228,9 @@ CATcenter_33_config: unconfig
}
@$(MKCONFIG) -a $(call xtract_4xx,$@) ppc ppc4xx PPChameleonEVB dave
CMS700_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx cms700 esd
CPCI2DP_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx cpci2dp esd
@@ -1391,9 +1406,15 @@ PPChameleonEVB_HI_33_config: unconfig
}
@$(MKCONFIG) -a $(call xtract_4xx,$@) ppc ppc4xx PPChameleonEVB dave
quad100hd_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx quad100hd
sbc405_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx sbc405
sc3_config:unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx sc3
sequoia_config \
rainier_config: unconfig
@mkdir -p $(obj)include
@@ -1412,9 +1433,6 @@ rainier_nand_config: unconfig
@echo "TEXT_BASE = 0x01000000" > $(obj)board/amcc/sequoia/config.tmp
@echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
sc3_config:unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx sc3
taihu_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx taihu amcc
@@ -1427,9 +1445,6 @@ VOH405_config: unconfig
VOM405_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx vom405 esd
CMS700_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx cms700 esd
W7OLMC_config \
W7OLMG_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx w7o
@@ -1779,10 +1794,10 @@ TQM8265_AA_config: unconfig
echo "#undef CONFIG_BUSMODE_60x" >>$(obj)include/config.h ; \
$(XECHO) "... without 60x Bus Mode" ; \
fi
@$(MKCONFIG) -a TQM8260 ppc mpc8260 tqm8260
@$(MKCONFIG) -a TQM8260 ppc mpc8260 tqm8260 tqc
TQM8272_config: unconfig
@$(MKCONFIG) TQM8272 ppc mpc8260 tqm8272
@$(MKCONFIG) TQM8272 ppc mpc8260 tqm8272 tqc
VoVPN-GW_66MHz_config \
VoVPN-GW_100MHz_config: unconfig
@@ -1854,9 +1869,6 @@ M5275EVB_config : unconfig
M5282EVB_config : unconfig
@$(MKCONFIG) $(@:_config=) m68k mcf52x2 m5282evb
TASREG_config : unconfig
@$(MKCONFIG) $(@:_config=) m68k mcf52x2 tasreg esd
M5329AFEE_config \
M5329BFEE_config : unconfig
@case "$@" in \
@@ -1976,6 +1988,9 @@ M5485HFE_config : unconfig
fi
@$(MKCONFIG) -a M5485EVB m68k mcf547x_8x m548xevb freescale
TASREG_config : unconfig
@$(MKCONFIG) $(@:_config=) m68k mcf52x2 tasreg esd
#########################################################################
## MPC83xx Systems
#########################################################################
@@ -2102,11 +2117,14 @@ MPC837XEMDS_HOST_config: unconfig
MPC837XERDB_config: unconfig
@$(MKCONFIG) -a MPC837XERDB ppc mpc83xx mpc837xerdb freescale
MVBLM7_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc mpc83xx mvblm7
sbc8349_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc mpc83xx sbc8349
TQM834x_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc mpc83xx tqm834x
@$(MKCONFIG) $(@:_config=) ppc mpc83xx tqm834x tqc
#########################################################################
@@ -2208,6 +2226,9 @@ sbc8560_66_config: unconfig
fi
@$(MKCONFIG) -a sbc8560 ppc mpc85xx sbc8560
socrates_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc mpc85xx socrates
stxgp3_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc mpc85xx stxgp3
@@ -2222,6 +2243,7 @@ stxssa_4M_config: unconfig
TQM8540_config \
TQM8541_config \
TQM8548_config \
TQM8555_config \
TQM8560_config: unconfig
@mkdir -p $(obj)include
@@ -2230,9 +2252,8 @@ TQM8560_config: unconfig
echo "#define CONFIG_MPC$${CTYPE}">>$(obj)include/config.h; \
echo "#define CONFIG_TQM$${CTYPE}">>$(obj)include/config.h; \
echo "#define CONFIG_HOSTNAME tqm$${CTYPE}">>$(obj)include/config.h; \
echo "#define CONFIG_BOARDNAME \"TQM$${CTYPE}\"">>$(obj)include/config.h; \
echo "#define CFG_BOOTFILE_PATH \"/tftpboot/tqm$${CTYPE}/uImage\"">>$(obj)include/config.h
@$(MKCONFIG) -a TQM85xx ppc mpc85xx tqm85xx
echo "#define CONFIG_BOARDNAME \"TQM$${CTYPE}\"">>$(obj)include/config.h;
@$(MKCONFIG) -a TQM85xx ppc mpc85xx tqm85xx tqc
#########################################################################
## MPC86xx Systems
@@ -2293,12 +2314,12 @@ PCIPPC2_config \
PCIPPC6_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc 74xx_7xx pcippc2
ZUMA_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc 74xx_7xx evb64260
ppmc7xx_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc 74xx_7xx ppmc7xx
ZUMA_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc 74xx_7xx evb64260
#========================================================================
# ARM
#========================================================================
@@ -2332,6 +2353,15 @@ shannon_config : unconfig
at91rm9200dk_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm920t at91rm9200dk atmel at91rm9200
at91sam9261ek_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs at91sam9261ek atmel at91sam9
at91sam9263ek_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs at91sam9263ek atmel at91sam9
at91sam9rlek_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs at91sam9rlek atmel at91sam9
cmc_pu2_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm920t cmc_pu2 NULL at91rm9200
@@ -2341,12 +2371,12 @@ csb637_config : unconfig
kb9202_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm920t kb9202 NULL at91rm9200
mp2usb_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm920t mp2usb NULL at91rm9200
m501sk_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm920t m501sk NULL at91rm9200
mp2usb_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm920t mp2usb NULL at91rm9200
#########################################################################
## Atmel ARM926EJ-S Systems
#########################################################################
@@ -2383,6 +2413,18 @@ cp922_XA10_config \
cp1026_config: unconfig
@board/integratorcp/split_by_variant.sh $@
davinci_dvevm_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs dv-evm davinci davinci
davinci_schmoogie_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs schmoogie davinci davinci
davinci_sffsdr_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs sffsdr davinci davinci
davinci_sonata_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs sonata davinci davinci
lpd7a400_config \
lpd7a404_config: unconfig
@$(MKCONFIG) $(@:_config=) arm lh7a40x lpd7a40x
@@ -2399,18 +2441,6 @@ netstar_config: unconfig
omap1510inn_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm925t omap1510inn
omap5912osk_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs omap5912osk NULL omap
davinci_dvevm_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs dv-evm davinci davinci
davinci_schmoogie_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs schmoogie davinci davinci
davinci_sonata_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs sonata davinci davinci
xtract_omap1610xxx = $(subst _cs0boot,,$(subst _cs3boot,,$(subst _cs_autoboot,,$(subst _config,,$1))))
omap1610inn_config \
@@ -2434,6 +2464,9 @@ omap1610h2_cs_autoboot_config: unconfig
fi;
@$(MKCONFIG) -a $(call xtract_omap1610xxx,$@) arm arm926ejs omap1610inn NULL omap
omap5912osk_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs omap5912osk NULL omap
xtract_omap730p2 = $(subst _cs0boot,,$(subst _cs3boot,, $(subst _config,,$1)))
omap730p2_config \
@@ -2495,9 +2528,16 @@ trab_old_config: unconfig
VCMA9_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm920t vcma9 mpl s3c24x0
#========================================================================
#########################################################################
# ARM supplied Versatile development boards
#========================================================================
#########################################################################
cm4008_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm920t cm4008 NULL ks8695
cm41xx_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm920t cm41xx NULL ks8695
versatile_config \
versatileab_config \
versatilepb_config : unconfig
@@ -2506,12 +2546,6 @@ versatilepb_config : unconfig
voiceblue_config: unconfig
@$(MKCONFIG) $(@:_config=) arm arm925t voiceblue
cm4008_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm920t cm4008 NULL ks8695
cm41xx_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm920t cm41xx NULL ks8695
#########################################################################
## S3C44B0 Systems
#########################################################################
@@ -2560,9 +2594,6 @@ actux3_config : unconfig
actux4_config : unconfig
@$(MKCONFIG) $(@:_config=) arm ixp actux4
adsvix_config : unconfig
@$(MKCONFIG) $(@:_config=) arm pxa adsvix
cerf250_config : unconfig
@$(MKCONFIG) $(@:_config=) arm pxa cerf250
@@ -2626,11 +2657,10 @@ zylonite_config :
#########################################################################
## ARM1136 Systems
#########################################################################
omap2420h4_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm1136 omap2420h4 NULL omap24xx
apollon_config : unconfig
@mkdir -p $(obj)include
@mkdir -p $(obj)onenand_ipl/board/apollon
@echo "#define CONFIG_ONENAND_U_BOOT" > $(obj)include/config.h
@$(MKCONFIG) $(@:_config=) arm arm1136 apollon NULL omap24xx
@echo "CONFIG_ONENAND_U_BOOT = y" >> $(obj)include/config.mk
@@ -2644,6 +2674,9 @@ imx31_phycore_config : unconfig
mx31ads_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm1136 mx31ads NULL mx31
omap2420h4_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm1136 omap2420h4 NULL omap24xx
#========================================================================
# i386
#========================================================================
@@ -2693,6 +2726,7 @@ tb0229_config: unconfig
#########################################################################
## MIPS32 AU1X00
#########################################################################
dbau1000_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_DBAU1000 1" >$(obj)include/config.h
@@ -2718,16 +2752,16 @@ dbau1550_el_config : unconfig
@echo "#define CONFIG_DBAU1550 1" >$(obj)include/config.h
@$(MKCONFIG) -a dbau1x00 mips mips dbau1x00
pb1000_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_PB1000 1" >$(obj)include/config.h
@$(MKCONFIG) -a pb1x00 mips mips pb1x00
gth2_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_GTH2 1" >$(obj)include/config.h
@$(MKCONFIG) -a gth2 mips mips gth2
pb1000_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_PB1000 1" >$(obj)include/config.h
@$(MKCONFIG) -a pb1x00 mips mips pb1x00
qemu_mips_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_QEMU_MIPS 1" >$(obj)include/config.h
@@ -2747,6 +2781,24 @@ purple_config : unconfig
## Nios32
#########################################################################
ADNPESC1_DNPEVA2_base_32_config \
ADNPESC1_base_32_config \
ADNPESC1_config: unconfig
@mkdir -p $(obj)include
@[ -z "$(findstring _DNPEVA2,$@)" ] || \
{ echo "#define CONFIG_DNPEVA2 1" >>$(obj)include/config.h ; \
$(XECHO) "... DNP/EVA2 configuration" ; \
}
@[ -z "$(findstring _base_32,$@)" ] || \
{ echo "#define CONFIG_NIOS_BASE_32 1" >>$(obj)include/config.h ; \
$(XECHO) "... NIOS 'base_32' configuration" ; \
}
@[ -z "$(findstring ADNPESC1_config,$@)" ] || \
{ echo "#define CONFIG_NIOS_BASE_32 1" >>$(obj)include/config.h ; \
$(XECHO) "... NIOS 'base_32' configuration (DEFAULT)" ; \
}
@$(MKCONFIG) -a ADNPESC1 nios nios adnpesc1 ssv
DK1C20_safe_32_config \
DK1C20_standard_32_config \
DK1C20_config: unconfig
@@ -2788,24 +2840,6 @@ DK1S10_config: unconfig
}
@$(MKCONFIG) -a DK1S10 nios nios dk1s10 altera
ADNPESC1_DNPEVA2_base_32_config \
ADNPESC1_base_32_config \
ADNPESC1_config: unconfig
@mkdir -p $(obj)include
@[ -z "$(findstring _DNPEVA2,$@)" ] || \
{ echo "#define CONFIG_DNPEVA2 1" >>$(obj)include/config.h ; \
$(XECHO) "... DNP/EVA2 configuration" ; \
}
@[ -z "$(findstring _base_32,$@)" ] || \
{ echo "#define CONFIG_NIOS_BASE_32 1" >>$(obj)include/config.h ; \
$(XECHO) "... NIOS 'base_32' configuration" ; \
}
@[ -z "$(findstring ADNPESC1_config,$@)" ] || \
{ echo "#define CONFIG_NIOS_BASE_32 1" >>$(obj)include/config.h ; \
$(XECHO) "... NIOS 'base_32' configuration (DEFAULT)" ; \
}
@$(MKCONFIG) -a ADNPESC1 nios nios adnpesc1 ssv
#########################################################################
## Nios-II
#########################################################################
@@ -2826,21 +2860,19 @@ PCI5441_config : unconfig
@$(MKCONFIG) PCI5441 nios2 nios2 pci5441 psyent
#========================================================================
# MicroBlaze
#========================================================================
#########################################################################
## Microblaze
#########################################################################
suzaku_config: unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_SUZAKU 1" > $(obj)include/config.h
@$(MKCONFIG) -a $(@:_config=) microblaze microblaze suzaku AtmarkTechno
#========================================================================
ml401_config: unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_ML401 1" > $(obj)include/config.h
@$(MKCONFIG) -a $(@:_config=) microblaze microblaze ml401 xilinx
suzaku_config: unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_SUZAKU 1" > $(obj)include/config.h
@$(MKCONFIG) -a $(@:_config=) microblaze microblaze suzaku AtmarkTechno
xupv2p_config: unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_XUPV2P 1" > $(obj)include/config.h
@@ -2863,9 +2895,9 @@ $(BFIN_BOARDS):
#========================================================================
# AVR32
#========================================================================
#########################################################################
## AT32AP70xx
#########################################################################
atngw100_config : unconfig
@$(MKCONFIG) $(@:_config=) avr32 at32ap atngw100 atmel at32ap700x
atstk1002_config : unconfig
@$(MKCONFIG) $(@:_config=) avr32 at32ap atstk1000 atmel at32ap700x
@@ -2876,54 +2908,65 @@ atstk1003_config : unconfig
atstk1004_config : unconfig
@$(MKCONFIG) $(@:_config=) avr32 at32ap atstk1000 atmel at32ap700x
atngw100_config : unconfig
@$(MKCONFIG) $(@:_config=) avr32 at32ap atngw100 atmel at32ap700x
atstk1006_config : unconfig
@$(MKCONFIG) $(@:_config=) avr32 at32ap atstk1000 atmel at32ap700x
#########################################################################
#########################################################################
#########################################################################
#========================================================================
# SH3 (SuperH)
#========================================================================
#########################################################################
## sh3 (Renesas SuperH)
#########################################################################
mpr2_config: unconfig
@ >include/config.h
@echo "#define CONFIG_MPR2 1" >> include/config.h
@mkdir -p $(obj)include
@echo "#define CONFIG_MPR2 1" > $(obj)include/config.h
@$(MKCONFIG) -a $(@:_config=) sh sh3 mpr2
ms7720se_config: unconfig
@echo "#define CONFIG_MS7720SE 1" > include/config.h
@mkdir -p $(obj)include
@echo "#define CONFIG_MS7720SE 1" > $(obj)include/config.h
@$(MKCONFIG) -a $(@:_config=) sh sh3 ms7720se
#########################################################################
## sh4 (Renesas SuperH)
#########################################################################
MigoR_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_MIGO_R 1" > $(obj)include/config.h
@./mkconfig -a $(@:_config=) sh sh4 MigoR
ms7750se_config: unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_MS7750SE 1" > $(obj)include/config.h
@$(MKCONFIG) -a $(@:_config=) sh sh4 ms7750se
ms7722se_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_MS7722SE 1" > $(obj)include/config.h
@$(MKCONFIG) -a $(@:_config=) sh sh4 ms7722se
MigoR_config : unconfig
@ >include/config.h
@echo "#define CONFIG_MIGO_R 1" >> include/config.h
@./mkconfig -a $(@:_config=) sh sh4 MigoR
r2dplus_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_R2DPLUS 1" > $(obj)include/config.h
@./mkconfig -a $(@:_config=) sh sh4 r2dplus
r7780mp_config: unconfig
@ >include/config.h
@echo "#define CONFIG_R7780MP 1" >> include/config.h
@mkdir -p $(obj)include
@echo "#define CONFIG_R7780MP 1" > $(obj)include/config.h
@./mkconfig -a $(@:_config=) sh sh4 r7780mp
r2dplus_config : unconfig
@ >include/config.h
@echo "#define CONFIG_R2DPLUS 1" >> include/config.h
@./mkconfig -a $(@:_config=) sh sh4 r2dplus
sh7763rdp_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_SH7763RDP 1" > $(obj)include/config.h
@./mkconfig -a $(@:_config=) sh sh4 sh7763rdp
#========================================================================
# SPARC
#========================================================================
#########################################################################
## LEON3
#########################################################################

169
README
View File

@@ -74,7 +74,7 @@ git://www.denx.de/git/u-boot.git ; you can browse it online at
http://www.denx.de/cgi-bin/gitweb.cgi?p=u-boot.git;a=summary
The "snapshot" links on this page allow you to download tarballs of
any version you might be interested in. Ofifcial releases are also
any version you might be interested in. Official releases are also
available for FTP download from the ftp://ftp.denx.de/pub/u-boot/
directory.
@@ -94,11 +94,11 @@ Where we come from:
* Provide extended interface to Linux boot loader
* S-Record download
* network boot
* PCMCIA / CompactFLash / ATA disk / SCSI ... boot
* PCMCIA / CompactFlash / ATA disk / SCSI ... boot
- create ARMBoot project (http://sourceforge.net/projects/armboot)
- add other CPU families (starting with ARM)
- create U-Boot project (http://sourceforge.net/projects/u-boot)
- current project page: see http://www.denx.de/wiki/UBoot
- current project page: see http://www.denx.de/wiki/U-Boot
Names and Spelling:
@@ -230,7 +230,7 @@ Example: For a TQM823L module type:
cd u-boot
make TQM823L_config
For the Cogent platform, you need to specify the cpu type as well;
For the Cogent platform, you need to specify the CPU type as well;
e.g. "make cogent_mpc8xx_config". And also configure the cogent
directory according to the instructions in cogent/README.
@@ -278,7 +278,7 @@ The following options need to be configured:
- Motherboard Options: (if CONFIG_CMA101 or CONFIG_CMA102 are defined)
Define one or more of
CONFIG_LCD_HEARTBEAT - update a character position on
the lcd display every second with
the LCD display every second with
a "rotator" |\-/|\-/
- Board flavour: (if CONFIG_MPC8260ADS is defined)
@@ -293,7 +293,7 @@ The following options need to be configured:
Define exactly one of
CONFIG_MPC8240, CONFIG_MPC8245
- 8xx CPU Options: (if using an MPC8xx cpu)
- 8xx CPU Options: (if using an MPC8xx CPU)
CONFIG_8xx_GCLK_FREQ - deprecated: CPU clock if
get_gclk_freq() cannot work
e.g. if there is no 32KHz
@@ -346,11 +346,11 @@ The following options need to be configured:
CONFIG_MEMSIZE_IN_BYTES [relevant for MIPS only]
When transfering memsize parameter to linux, some versions
When transferring memsize parameter to linux, some versions
expect it to be in bytes, others in MB.
Define CONFIG_MEMSIZE_IN_BYTES to make it in bytes.
CONFIG_OF_LIBFDT / CONFIG_OF_FLAT_TREE
CONFIG_OF_LIBFDT
New kernel versions are expecting firmware settings to be
passed using flattened device trees (based on open firmware
@@ -361,19 +361,13 @@ The following options need to be configured:
* Adds the "fdt" command
* The bootm command automatically updates the fdt
CONFIG_OF_FLAT_TREE
* Deprecated, see CONFIG_OF_LIBFDT
* Original ft_build.c-based support
* Automatically modifies the dft as part of the bootm command
* The environment variable "disable_of", when set,
disables this functionality.
OF_CPU - The proper name of the cpus node.
OF_SOC - The proper name of the soc node.
OF_TBCLK - The timebase frequency.
OF_STDOUT_PATH - The path to the console device
boards with QUICC Engines require OF_QE to set UCC mac addresses
boards with QUICC Engines require OF_QE to set UCC MAC
addresses
CONFIG_OF_BOARD_SETUP
@@ -382,7 +376,7 @@ The following options need to be configured:
CONFIG_OF_BOOT_CPU
This define fills in the correct boot cpu in the boot
This define fills in the correct boot CPU in the boot
param header, the default value is zero if undefined.
- Serial Ports:
@@ -452,7 +446,7 @@ The following options need to be configured:
linux_logo.h for logo.
Requires CONFIG_VIDEO_LOGO
CONFIG_CONSOLE_EXTRA_INFO
addional board info beside
additional board info beside
the logo
When CONFIG_CFB_CONSOLE is defined, video console is
@@ -522,7 +516,7 @@ The following options need to be configured:
The value of these goes into the environment as
"ramboot" and "nfsboot" respectively, and can be used
as a convenience, when switching between booting from
ram and nfs.
RAM and NFS.
- Pre-Boot Commands:
CONFIG_PREBOOT
@@ -742,11 +736,11 @@ The following options need to be configured:
Support for Intel 8254x gigabit chips.
CONFIG_E1000_FALLBACK_MAC
default MAC for empty eeprom after production.
default MAC for empty EEPROM after production.
CONFIG_EEPRO100
Support for Intel 82557/82559/82559ER chips.
Optional CONFIG_EEPRO100_SROM_WRITE enables eeprom
Optional CONFIG_EEPRO100_SROM_WRITE enables EEPROM
write routine for first time initialisation.
CONFIG_TULIP
@@ -786,6 +780,21 @@ The following options need to be configured:
Define this to use i/o functions instead of macros
(some hardware wont work with macros)
CONFIG_DRIVER_SMC911X
Support for SMSC's LAN911x and LAN921x chips
CONFIG_DRIVER_SMC911X_BASE
Define this to hold the physical address
of the device (I/O space)
CONFIG_DRIVER_SMC911X_32_BIT
Define this if data bus is 32 bits
CONFIG_DRIVER_SMC911X_16_BIT
Define this if data bus is 16 bits. If your processor
automatically converts one 32 bit word to two 16 bit
words you may also try CONFIG_DRIVER_SMC911X_32_BIT.
- USB Support:
At the moment only the UHCI host controller is
supported (PIP405, MIP405, MPC5200); define
@@ -810,7 +819,7 @@ The following options need to be configured:
Define the below if you wish to use the USB console.
Once firmware is rebuilt from a serial console issue the
command "setenv stdin usbtty; setenv stdout usbtty" and
attach your usb cable. The Unix command "dmesg" should print
attach your USB cable. The Unix command "dmesg" should print
it has found a new device. The environment variable usbtty
can be set to gserial or cdc_acm to enable your device to
appear to a USB host as a Linux gserial device or a
@@ -924,7 +933,7 @@ The following options need to be configured:
assumed.
For the CT69000 and SMI_LYNXEM drivers, videomode is
selected via environment 'videomode'. Two diferent ways
selected via environment 'videomode'. Two different ways
are possible:
- "videomode=num" 'num' is a standard LiLo mode numbers.
Following standard modes are supported (* is default):
@@ -961,6 +970,10 @@ The following options need to be configured:
display); also select one of the supported displays
by defining one of these:
CONFIG_ATMEL_LCD:
HITACHI TX09D70VM1CCA, 3.5", 240x320.
CONFIG_NEC_NL6448AC33:
NEC NL6448AC33-18. Active, color, single scan.
@@ -1043,7 +1056,7 @@ The following options need to be configured:
CONFIG_PHY_GIGE
If this option is set, support for speed/duplex
detection of Gigabit PHY is included.
detection of gigabit PHY is included.
CONFIG_PHY_RESET_DELAY
@@ -1062,15 +1075,15 @@ The following options need to be configured:
CONFIG_ETH2ADDR
CONFIG_ETH3ADDR
Define a default value for ethernet address to use
for the respective ethernet interface, in case this
Define a default value for Ethernet address to use
for the respective Ethernet interface, in case this
is not determined automatically.
- IP address:
CONFIG_IPADDR
Define a default value for the IP address to use for
the default ethernet interface, in case this is not
the default Ethernet interface, in case this is not
determined through e.g. bootp.
- Server IP address:
@@ -1084,7 +1097,7 @@ The following options need to be configured:
Defines whether you want to support multicast TFTP as per
rfc-2090; for example to work with atftp. Lets lots of targets
tftp down the same boot image concurrently. Note: the ethernet
tftp down the same boot image concurrently. Note: the Ethernet
driver in use must provide a function: mcast() to join/leave a
multicast group.
@@ -1172,7 +1185,7 @@ The following options need to be configured:
A printf format string which contains the ascii name of
the port. Normally is set to "eth%d" which sets
eth0 for the first ethernet, eth1 for the second etc.
eth0 for the first Ethernet, eth1 for the second etc.
CONFIG_CDP_CAPABILITIES
@@ -1221,7 +1234,7 @@ The following options need to be configured:
These enable I2C serial bus commands. Defining either of
(but not both of) CONFIG_HARD_I2C or CONFIG_SOFT_I2C will
include the appropriate I2C driver for the selected cpu.
include the appropriate I2C driver for the selected CPU.
This will allow you to use i2c commands at the u-boot
command line (as long as you set CONFIG_CMD_I2C in
@@ -1246,10 +1259,10 @@ The following options need to be configured:
In both cases you will need to define CFG_I2C_SPEED
to be the frequency (in Hz) at which you wish your i2c bus
to run and CFG_I2C_SLAVE to be the address of this node (ie
the cpu's i2c node address).
the CPU's i2c node address).
Now, the u-boot i2c code for the mpc8xx (cpu/mpc8xx/i2c.c)
sets the cpu up as a master node and so its address should
sets the CPU up as a master node and so its address should
therefore be cleared to 0 (See, eg, MPC823e User's Manual
p.16-473). So, set CFG_I2C_SLAVE to 0.
@@ -1468,17 +1481,17 @@ The following options need to be configured:
Maximum time to wait for the INIT_B line to deassert
after PROB_B has been deasserted during a Virtex II
FPGA configuration sequence. The default time is 500
mS.
ms.
CFG_FPGA_WAIT_BUSY
Maximum time to wait for BUSY to deassert during
Virtex II FPGA configuration. The default is 5 mS.
Virtex II FPGA configuration. The default is 5 ms.
CFG_FPGA_WAIT_CONFIG
Time to wait after FPGA configuration. The default is
200 mS.
200 ms.
- Configuration Management:
CONFIG_IDENT_STRING
@@ -1495,7 +1508,7 @@ The following options need to be configured:
protects these variables from casual modification by
the user. Once set, these variables are read-only,
and write or delete attempts are rejected. You can
change this behviour:
change this behaviour:
If CONFIG_ENV_OVERWRITE is #defined in your config
file, the write protection for vendor parameters is
@@ -1504,7 +1517,7 @@ The following options need to be configured:
Alternatively, if you #define _both_ CONFIG_ETHADDR
_and_ CONFIG_OVERWRITE_ETHADDR_ONCE, a default
ethernet address is installed in the environment,
Ethernet address is installed in the environment,
which can be changed exactly ONCE by the user. [The
serial# is unaffected by this, i. e. it remains
read-only.]
@@ -1548,7 +1561,7 @@ The following options need to be configured:
Define this variable to stop the system in case of a
fatal error, so that you have to reset it manually.
This is probably NOT a good idea for an embedded
system where you want to system to reboot
system where you want the system to reboot
automatically as fast as possible, but it may be
useful during development since you can try to debug
the conditions that lead to the situation.
@@ -1615,7 +1628,7 @@ The following options need to be configured:
- Commandline Editing and History:
CONFIG_CMDLINE_EDITING
Enable editiong and History functions for interactive
Enable editing and History functions for interactive
commandline input operations
- Default Environment:
@@ -1656,7 +1669,7 @@ The following options need to be configured:
Adding this option adds support for Xilinx SystemACE
chips attached via some sort of local bus. The address
of the chip must alsh be defined in the
of the chip must also be defined in the
CFG_SYSTEMACE_BASE macro. For example:
#define CONFIG_SYSTEMACE
@@ -1722,7 +1735,7 @@ Legacy uImage format:
-12 common/image.c Ramdisk data has bad checksum
11 common/image.c Ramdisk data has correct checksum
12 common/image.c Ramdisk verification complete, start loading
-13 common/image.c Wrong Image Type (not PPC Linux Ramdisk)
-13 common/image.c Wrong Image Type (not PPC Linux ramdisk)
13 common/image.c Start multifile image verification
14 common/image.c No initial ramdisk, no multifile, continue.
@@ -1788,7 +1801,7 @@ Legacy uImage format:
-80 common/cmd_net.c usage wrong
80 common/cmd_net.c before calling NetLoop()
-81 common/cmd_net.c some error in NetLoop() occured
-81 common/cmd_net.c some error in NetLoop() occurred
81 common/cmd_net.c NetLoop() back without error
-82 common/cmd_net.c size == 0 (File with size 0 loaded)
82 common/cmd_net.c trying automatic boot
@@ -1811,8 +1824,8 @@ FIT uImage format:
105 common/cmd_bootm.c Kernel subimage hash verification OK
-105 common/cmd_bootm.c Kernel subimage is for unsupported architecture
106 common/cmd_bootm.c Architecture check OK
-106 common/cmd_bootm.c Kernel subimage has wrong typea
107 common/cmd_bootm.c Kernel subimge type OK
-106 common/cmd_bootm.c Kernel subimage has wrong type
107 common/cmd_bootm.c Kernel subimage type OK
-107 common/cmd_bootm.c Can't get kernel subimage data/size
108 common/cmd_bootm.c Got kernel subimage data/size
-108 common/cmd_bootm.c Wrong image type (not legacy, FIT)
@@ -1825,7 +1838,7 @@ FIT uImage format:
120 common/image.c Start initial ramdisk verification
-120 common/image.c Ramdisk FIT image has incorrect format
121 common/image.c Ramdisk FIT image has correct format
122 common/image.c No Ramdisk subimage unit name, using configuration
122 common/image.c No ramdisk subimage unit name, using configuration
-122 common/image.c Can't get configuration for ramdisk subimage
123 common/image.c Ramdisk unit name specified
-124 common/image.c Can't get ramdisk subimage node offset
@@ -1839,13 +1852,13 @@ FIT uImage format:
129 common/image.c Can't get ramdisk load address
-129 common/image.c Got ramdisk load address
-130 common/cmd_doc.c Icorrect FIT image format
-130 common/cmd_doc.c Incorrect FIT image format
131 common/cmd_doc.c FIT image format OK
-140 common/cmd_ide.c Icorrect FIT image format
-140 common/cmd_ide.c Incorrect FIT image format
141 common/cmd_ide.c FIT image format OK
-150 common/cmd_nand.c Icorrect FIT image format
-150 common/cmd_nand.c Incorrect FIT image format
151 common/cmd_nand.c FIT image format OK
@@ -1854,7 +1867,7 @@ Modem Support:
[so far only for SMDK2400 and TRAB boards]
- Modem support endable:
- Modem support enable:
CONFIG_MODEM_SUPPORT
- RTS/CTS Flow control enable:
@@ -1870,11 +1883,11 @@ Modem Support:
There are common interrupt_init() and timer_interrupt()
for all PPC archs. interrupt_init() calls interrupt_init_cpu()
for cpu specific initialization. interrupt_init_cpu()
for CPU specific initialization. interrupt_init_cpu()
should set decrementer_count to appropriate value. If
cpu resets decrementer automatically after interrupt
CPU resets decrementer automatically after interrupt
(ppc4xx) it should set decrementer_count to zero.
timer_interrupt() calls timer_interrupt_cpu() for cpu
timer_interrupt() calls timer_interrupt_cpu() for CPU
specific handling. If board has watchdog / status_led
/ other_activity_monitor it works automatically from
general timer_interrupt().
@@ -1884,7 +1897,7 @@ Modem Support:
In the target system modem support is enabled when a
specific key (key combination) is pressed during
power-on. Otherwise U-Boot will boot normally
(autoboot). The key_pressed() fuction is called from
(autoboot). The key_pressed() function is called from
board_init(). Currently key_pressed() is a dummy
function, returning 1 and thus enabling modem
initialization.
@@ -1892,7 +1905,7 @@ Modem Support:
If there are no modem init strings in the
environment, U-Boot proceed to autoboot; the
previous output (banner, info printfs) will be
supressed, though.
suppressed, though.
See also: doc/README.Modem
@@ -1948,7 +1961,7 @@ Configuration Settings:
- CFG_MEM_TOP_HIDE (PPC only):
If CFG_MEM_TOP_HIDE is defined in the board config header,
this specified memory area will get subtracted from the top
(end) of ram and won't get "touched" at all by U-Boot. By
(end) of RAM and won't get "touched" at all by U-Boot. By
fixing up gd->ram_size the Linux kernel should gets passed
the now "corrected" memory size and won't touch it either.
This should work for arch/ppc and arch/powerpc. Only Linux
@@ -2043,8 +2056,8 @@ Configuration Settings:
The two-step approach is usually more reliable, since
you can check if the download worked before you erase
the flash, but in some situations (when sytem RAM is
too limited to allow for a tempory copy of the
the flash, but in some situations (when system RAM is
too limited to allow for a temporary copy of the
downloaded image) this option may be very useful.
- CFG_FLASH_CFI:
@@ -2074,11 +2087,11 @@ Configuration Settings:
column displays, 15 (3..1) for 40 column displays.
- CFG_RX_ETH_BUFFER:
Defines the number of ethernet receive buffers. On some
ethernet controllers it is recommended to set this value
Defines the number of Ethernet receive buffers. On some
Ethernet controllers it is recommended to set this value
to 8 or even higher (EEPRO100 or 405 EMAC), since all
buffers can be full shortly after enabling the interface
on high ethernet traffic.
on high Ethernet traffic.
Defaults to 4 if not defined.
The following definitions that deal with the placement and management
@@ -2146,7 +2159,7 @@ following configurations:
CFG_ENV_SIZE_REDUND
These settings describe a second storage area used to hold
a redundand copy of the environment data, so that there is
a redundant copy of the environment data, so that there is
a valid backup copy in case there is a power failure during
a "saveenv" operation.
@@ -2164,14 +2177,14 @@ accordingly!
- CFG_ENV_ADDR:
- CFG_ENV_SIZE:
These two #defines are used to determin the memory area you
These two #defines are used to determine the memory area you
want to use for environment. It is assumed that this memory
can just be read and written to, without any special
provision.
BE CAREFUL! The first access to the environment happens quite early
in U-Boot initalization (when we try to get the setting of for the
console baudrate). You *MUST* have mappend your NVRAM area then, or
console baudrate). You *MUST* have mapped your NVRAM area then, or
U-Boot will hang.
Please note that even with NVRAM we still use a copy of the
@@ -2320,14 +2333,14 @@ Low Level (hardware related) configuration options:
CFG_ISA_IO_STRIDE
defines the spacing between fdc chipset registers
defines the spacing between FDC chipset registers
(default value 1)
CFG_ISA_IO_OFFSET
defines the offset of register from address. It
depends on which part of the data bus is connected to
the fdc chipset. (default value 0)
the FDC chipset. (default value 0)
If CFG_ISA_IO_STRIDE CFG_ISA_IO_OFFSET and
CFG_FDC_DRIVE_NUMBER are undefined, they take their
@@ -2523,7 +2536,7 @@ Low Level (hardware related) configuration options:
Normally these variables MUST NOT be defined. The
only exception is when U-Boot is loaded (to RAM) by
some other boot loader or by a debugger which
performs these intializations itself.
performs these initializations itself.
Building the Software:
@@ -2558,7 +2571,7 @@ Note: for some board special configuration names may exist; check if
additional information is available from the board vendor; for
instance, the TQM823L systems are available without (standard)
or with LCD support. You can select such additional "features"
when chosing the configuration, i. e.
when choosing the configuration, i. e.
make TQM823L_config
- will configure for a plain TQM823L, i. e. no LCD support
@@ -2761,7 +2774,7 @@ Some configuration options can be set using Environment Variables:
for use by the bootm command. See also "bootm_size"
environment variable. Address defined by "bootm_low" is
also the base of the initial memory mapping for the Linux
kernel -- see the descripton of CFG_BOOTMAPSZ.
kernel -- see the description of CFG_BOOTMAPSZ.
bootm_size - Memory range available for image processing in the bootm
command can be restricted. This variable is given as
@@ -2868,7 +2881,7 @@ Some configuration options can be set using Environment Variables:
themselves.
npe_ucode - see CONFIG_IXP4XX_NPE_EXT_UCOD
if set load address for the npe microcode
if set load address for the NPE microcode
tftpsrcport - If this is set, the value is used for TFTP's
UDP source port.
@@ -2877,7 +2890,7 @@ Some configuration options can be set using Environment Variables:
destination port instead of the Well Know Port 69.
vlan - When set to a value < 4095 the traffic over
ethernet is encapsulated/received over 802.1q
Ethernet is encapsulated/received over 802.1q
VLAN tagged frames.
The following environment variables may be used and automatically
@@ -2955,14 +2968,14 @@ General rules:
executed anyway.
(2) If you execute several variables with one call to run (i. e.
calling run with a list af variables as arguments), any failing
calling run with a list of variables as arguments), any failing
command will cause "run" to terminate, i. e. the remaining
variables are not executed.
Note for Redundant Ethernet Interfaces:
=======================================
Some boards come with redundant ethernet interfaces; U-Boot supports
Some boards come with redundant Ethernet interfaces; U-Boot supports
such configurations and is capable of automatic selection of a
"working" interface when needed. MAC assignment works as follows:
@@ -3303,7 +3316,7 @@ parameters. You can check and modify this variable using the
Memory: 15208k available (700k kernel code, 444k data, 32k init) [c0000000,c1000000]
...
If you want to boot a Linux kernel with initial ram disk, you pass
If you want to boot a Linux kernel with initial RAM disk, you pass
the memory addresses of both the kernel and the initrd image (PPBCOOT
format!) to the "bootm" command:
@@ -3613,13 +3626,13 @@ locked as (mis-) used as memory, etc.
require any physical RAM backing up the cache. The cleverness
is that the cache is being used as a temporary supply of
necessary storage before the SDRAM controller is setup. It's
beyond the scope of this list to expain the details, but you
beyond the scope of this list to explain the details, but you
can see how this works by studying the cache architecture and
operation in the architecture and processor-specific manuals.
OCM is On Chip Memory, which I believe the 405GP has 4K. It
is another option for the system designer to use as an
initial stack/ram area prior to SDRAM being available. Either
initial stack/RAM area prior to SDRAM being available. Either
option should work for you. Using CS 4 should be fine if your
board designers haven't used it for something that would
cause you grief during the initial boot! It is frequently not
@@ -3644,7 +3657,7 @@ code for the initialization procedures:
* Initialized global data (data segment) is read-only. Do not attempt
to write it.
* Do not use any unitialized global data (or implicitely initialized
* Do not use any uninitialized global data (or implicitely initialized
as zero data - BSS segment) at all - this is undefined, initiali-
zation is performed later (when relocating to RAM).
@@ -3756,7 +3769,7 @@ System Initialization:
----------------------
In the reset configuration, U-Boot starts at the reset entry point
(on most PowerPC systens at address 0x00000100). Because of the reset
(on most PowerPC systems at address 0x00000100). Because of the reset
configuration for CS0# this is a mirror of the onboard Flash memory.
To be able to re-map memory U-Boot then jumps to its link address.
To be able to implement the initialization code in C, a (small!)
@@ -3890,7 +3903,7 @@ may be rejected, even when they contain important and valuable stuff.
Patches shall be sent to the u-boot-users mailing list.
Please see http://www.denx.de/wiki/UBoot/Patches for details.
Please see http://www.denx.de/wiki/U-Boot/Patches for details.
When you send a patch, please include the following information with
it:

View File

@@ -1,5 +1,5 @@
/*
* (C) Copyright 2007 Semihalf
* (C) Copyright 2007-2008 Semihalf
*
* Written by: Rafal Jaworowski <raj@semihalf.com>
*
@@ -46,14 +46,15 @@
#define ENUM_USB 1
#define ENUM_SCSI 2
#define ENUM_MMC 3
#define ENUM_MAX 4
#define ENUM_SATA 4
#define ENUM_MAX 5
struct stor_spec {
int max_dev;
int enum_started;
int enum_ended;
int type; /* "external" type: DT_STOR_{IDE,USB,etc} */
char name[4];
char *name;
};
static struct stor_spec specs[ENUM_MAX] = { { 0, 0, 0, 0, "" }, };
@@ -68,12 +69,19 @@ void dev_stor_init(void)
specs[ENUM_IDE].type = DEV_TYP_STOR | DT_STOR_IDE;
specs[ENUM_IDE].name = "ide";
#endif
#if defined(CONFIG_CMD_USB)
specs[ENUM_USB].max_dev = USB_MAX_STOR_DEV;
specs[ENUM_USB].enum_started = 0;
specs[ENUM_USB].enum_ended = 0;
specs[ENUM_USB].type = DEV_TYP_STOR | DT_STOR_USB;
specs[ENUM_USB].name = "usb";
#if defined(CONFIG_CMD_MMC)
specs[ENUM_MMC].max_dev = CFG_MMC_MAX_DEVICE;
specs[ENUM_MMC].enum_started = 0;
specs[ENUM_MMC].enum_ended = 0;
specs[ENUM_MMC].type = DEV_TYP_STOR | DT_STOR_MMC;
specs[ENUM_MMC].name = "mmc";
#endif
#if defined(CONFIG_CMD_SATA)
specs[ENUM_SATA].max_dev = CFG_SATA_MAX_DEVICE;
specs[ENUM_SATA].enum_started = 0;
specs[ENUM_SATA].enum_ended = 0;
specs[ENUM_SATA].type = DEV_TYP_STOR | DT_STOR_SATA;
specs[ENUM_SATA].name = "sata";
#endif
#if defined(CONFIG_CMD_SCSI)
specs[ENUM_SCSI].max_dev = CFG_SCSI_MAX_DEVICE;
@@ -82,6 +90,13 @@ void dev_stor_init(void)
specs[ENUM_SCSI].type = DEV_TYP_STOR | DT_STOR_SCSI;
specs[ENUM_SCSI].name = "scsi";
#endif
#if defined(CONFIG_CMD_USB) && defined(CONFIG_USB_STORAGE)
specs[ENUM_USB].max_dev = USB_MAX_STOR_DEV;
specs[ENUM_USB].enum_started = 0;
specs[ENUM_USB].enum_ended = 0;
specs[ENUM_USB].type = DEV_TYP_STOR | DT_STOR_USB;
specs[ENUM_USB].name = "usb";
#endif
}
/*
@@ -108,6 +123,9 @@ static int dev_stor_get(int type, int first, int *more, struct device_info *di)
if (first) {
di->cookie = (void *)get_dev(specs[type].name, 0);
if (di->cookie == NULL)
return 0;
else
found = 1;
} else {
@@ -123,6 +141,9 @@ static int dev_stor_get(int type, int first, int *more, struct device_info *di)
}
di->cookie = (void *)get_dev(specs[type].name, i);
if (di->cookie == NULL)
return 0;
else
found = 1;
/* provide hint if there are more devices in
@@ -360,7 +381,7 @@ lbasize_t dev_read_stor(void *cookie, void *buf, lbasize_t len, lbastart_t start
return 0;
if ((dd->block_read) == NULL) {
debugf("no block_read() for device 0x%08x\n");
debugf("no block_read() for device 0x%08x\n", cookie);
return 0;
}

View File

@@ -1,5 +1,5 @@
/*
* (C) Copyright 2007 Semihalf
* (C) Copyright 2007-2008 Semihalf
*
* Written by: Rafal Jaworowski <raj@semihalf.com>
*
@@ -31,13 +31,15 @@
#define errf(fmt, args...) do { printf("ERROR @ %s(): ", __func__); printf(fmt, ##args); } while (0)
void test_dump_si(struct sys_info *);
#define BUF_SZ 2048
#define WAIT_SECS 5
void test_dump_buf(void *, int);
void test_dump_di(int);
void test_dump_si(struct sys_info *);
void test_dump_sig(struct api_signature *);
char buf[2048];
#define WAIT_SECS 5
static char buf[BUF_SZ];
int main(int argc, char *argv[])
{
@@ -58,11 +60,12 @@ int main(int argc, char *argv[])
if (sig->version > API_SIG_VERSION)
return -3;
printf("API signature found @%x\n", sig);
printf("API signature found @%x\n", (unsigned int)sig);
test_dump_sig(sig);
printf("\n*** Consumer API test ***\n");
printf("syscall ptr 0x%08x@%08x\n", syscall_ptr, &syscall_ptr);
printf("syscall ptr 0x%08x@%08x\n", (unsigned int)syscall_ptr,
(unsigned int)&syscall_ptr);
/* console activities */
ub_putc('B');
@@ -125,11 +128,17 @@ int main(int argc, char *argv[])
if (i == devs_no)
printf("No storage devices available\n");
else {
memset(buf, 0, BUF_SZ);
if ((rv = ub_dev_open(i)) != 0)
errf("open device %d error %d\n", i, rv);
else if ((rv = ub_dev_read(i, &buf, 200, 20)) != 0)
else if ((rv = ub_dev_read(i, buf, 1, 0)) != 0)
errf("could not read from device %d, error %d\n", i, rv);
printf("Sector 0 dump (512B):\n");
test_dump_buf(buf, 512);
ub_dev_close(i);
}
@@ -180,7 +189,7 @@ void test_dump_sig(struct api_signature *sig)
printf("signature:\n");
printf(" version\t= %d\n", sig->version);
printf(" checksum\t= 0x%08x\n", sig->checksum);
printf(" sc entry\t= 0x%08x\n", sig->syscall);
printf(" sc entry\t= 0x%08x\n", (unsigned int)sig->syscall);
}
void test_dump_si(struct sys_info *si)
@@ -188,9 +197,9 @@ void test_dump_si(struct sys_info *si)
int i;
printf("sys info:\n");
printf(" clkbus\t= 0x%08x\n", si->clk_bus);
printf(" clkcpu\t= 0x%08x\n", si->clk_cpu);
printf(" bar\t\t= 0x%08x\n", si->bar);
printf(" clkbus\t= 0x%08x\n", (unsigned int)si->clk_bus);
printf(" clkcpu\t= 0x%08x\n", (unsigned int)si->clk_cpu);
printf(" bar\t\t= 0x%08x\n", (unsigned int)si->bar);
printf("---\n");
for (i = 0; i < si->mr_no; i++) {
@@ -222,18 +231,51 @@ static char * test_stor_typ(int type)
if (type & DT_STOR_IDE)
return "IDE";
if (type & DT_STOR_MMC)
return "MMC";
if (type & DT_STOR_SATA)
return "SATA";
if (type & DT_STOR_SCSI)
return "SCSI";
if (type & DT_STOR_USB)
return "USB";
if (type & DT_STOR_MMC);
return "MMC";
return "Unknown";
}
void test_dump_buf(void *buf, int len)
{
int i;
int line_counter = 0;
int sep_flag = 0;
int addr = 0;
printf("%07x:\t", addr);
for (i = 0; i < len; i++) {
if (line_counter++ > 15) {
line_counter = 0;
sep_flag = 0;
addr += 16;
i--;
printf("\n%07x:\t", addr);
continue;
}
if (sep_flag++ > 1) {
sep_flag = 1;
printf(" ");
}
printf("%02x", *((char *)buf++));
}
printf("\n");
}
void test_dump_di(int handle)
{
int i;
@@ -252,7 +294,7 @@ void test_dump_di(int handle)
} else if (di->type & DEV_TYP_STOR) {
printf(" type\t\t= %s\n", test_stor_typ(di->type));
printf(" blk size\t\t= %d\n", di->di_stor.block_size);
printf(" blk count\t\t= %d\n", di->di_stor.block_count);
printf(" blk size\t\t= %d\n", (unsigned int)di->di_stor.block_size);
printf(" blk count\t\t= %d\n", (unsigned int)di->di_stor.block_count);
}
}

View File

@@ -39,7 +39,7 @@ int checkboard (void)
return 0;
}
long int initdram (int board_type)
phys_size_t initdram (int board_type)
{
int size, i;
@@ -51,10 +51,9 @@ long int initdram (int board_type)
MCFSDRAMC_DACR0 = MCFSDRAMC_DACR_BASE (CFG_SDRAM_BASE0)
| MCFSDRAMC_DACR_CASL (1)
| MCFSDRAMC_DACR_CBM (3)
| MCFSDRAMC_DACR_PS_16);
| MCFSDRAMC_DACR_PS_16;
MCFSDRAMC_DMR0 = MCFSDRAMC_DMR_BAM_16M
| MCFSDRAMC_DMR_V;
MCFSDRAMC_DMR0 = MCFSDRAMC_DMR_BAM_16M | MCFSDRAMC_DMR_V;
MCFSDRAMC_DACR0 |= MCFSDRAMC_DACR_IP;
@@ -62,8 +61,8 @@ long int initdram (int board_type)
MCFSDRAMC_DACR0 |= MCFSDRAMC_DACR_RE;
for (i = 0; i < 2000; i++)
asm (" nop");
mbar_writeLong(MCFSDRAMC_DACR0, mbar_readLong(MCFSDRAMC_DACR0)
| MCFSDRAMC_DACR_IMRS);
mbar_writeLong (MCFSDRAMC_DACR0,
mbar_readLong (MCFSDRAMC_DACR0) | MCFSDRAMC_DACR_IMRS);
*(unsigned int *) (CFG_SDRAM_BASE0 + 0x220) = 0xA5A5;
size += CFG_SDRAM_SIZE * 1024 * 1024;
#endif
@@ -73,15 +72,16 @@ long int initdram (int board_type)
| MCFSDRAMC_DACR_CBM (3)
| MCFSDRAMC_DACR_PS_16;
MCFSDRAMC_DMR1 = MCFSDRAMC_DMR_BAM_16M
| MCFSDRAMC_DMR_V;
MCFSDRAMC_DMR1 = MCFSDRAMC_DMR_BAM_16M | MCFSDRAMC_DMR_V;
MCFSDRAMC_DACR1 |= MCFSDRAMC_DACR_IP;
*(unsigned short *) (CFG_SDRAM_BASE1) = 0xA5A5;
MCFSDRAMC_DACR1 |= MCFSDRAMC_DACR_RE;
for (i = 0; i < 2000; i++)
asm (" nop");
MCFSDRAMC_DACR1 |= MCFSDRAMC_DACR_IMRS;
*(unsigned int *) (CFG_SDRAM_BASE1 + 0x220) = 0xA5A5;
size += CFG_SDRAM_SIZE1 * 1024 * 1024;

View File

@@ -201,7 +201,7 @@ int mii_discover_phy(struct eth_device *dev)
}
#endif /* CFG_DISCOVER_PHY */
int mii_init(void) __attribute__((weak,alias("__mii_init")));
void mii_init(void) __attribute__((weak,alias("__mii_init")));
void __mii_init(void)
{

View File

@@ -35,7 +35,7 @@
** ------
** int board_early_init_f(void)
** int checkboard(void)
** long int initdram(int board_type)
** phys_size_t initdram(int board_type)
** called from 'board_init_f()' into 'common/board.c'
**
** void reset_phy(void)
@@ -179,7 +179,7 @@ int checkboard (void)
/* ------------------------------------------------------------------------- */
long int initdram (int board_type)
phys_size_t initdram (int board_type)
{
volatile immap_t *immap = (immap_t *) CFG_IMMR;
volatile memctl8xx_t *memctl = &immap->im_memctl;

View File

@@ -71,7 +71,7 @@ __asm__(" .globl send_kb \n "
" li r3, 0x01 \n "
" bl send_kb \n "
" mtlr r10 \n "
" blr "
" blr \n "
);
@@ -81,7 +81,7 @@ int checkboard (void)
return 0;
}
long initdram (int board_type)
phys_size_t initdram (int board_type)
{
return articiaS_ram_init ();
}

View File

@@ -379,14 +379,12 @@ static int auto_negotiate(struct eth_device* dev)
EL3WINDOW (dev, 1);
/* Wait for Auto negotiation to complete */
for (i = 0; i <= 1000; i++)
{
for (i = 0; i <= 1000; i++) {
if (ETH_INW (dev, 2) & 0x04)
break;
udelay (100);
if (i == 1000)
{
if (i == 1000) {
PRINTF ("Error: Auto negotiation failed\n");
return 0;
}
@@ -405,20 +403,17 @@ void eth_interrupt(struct eth_device *dev)
if (!(status & IntLatch))
return;
if (status & (1<<6))
{
if (status & (1 << 6)) {
ETH_CMD (dev, AckIntr | (1 << 6));
printf ("Acknowledged Interrupt command\n");
}
if (status & DownComplete)
{
if (status & DownComplete) {
ETH_CMD (dev, AckIntr | DownComplete);
printf ("Acknowledged DownComplete\n");
}
if (status & UpComplete)
{
if (status & UpComplete) {
ETH_CMD (dev, AckIntr | UpComplete);
printf ("Acknowledged UpComplete\n");
}
@@ -439,16 +434,18 @@ int eth_3com_initialize(bd_t *bis)
/* Find ethernet controller on the PCI bus */
if ((devno = pci_find_device(PCI_VENDOR_ID_3COM, PCI_DEVICE_ID_3COM_3C905C, 0)) < 0)
{
if ((devno =
pci_find_device (PCI_VENDOR_ID_3COM, PCI_DEVICE_ID_3COM_3C905C,
0)) < 0) {
PRINTF ("Error: Cannot find the ethernet device on the PCI bus\n");
goto Done;
}
if (s)
{
if (s) {
unsigned long base = atoi (s);
pci_write_config_dword(devno, PCI_BASE_ADDRESS_0, base | 0x01);
pci_write_config_dword (devno, PCI_BASE_ADDRESS_0,
base | 0x01);
}
ret = pci_read_config_dword (devno, PCI_BASE_ADDRESS_0, &eth_iobase);
@@ -456,26 +453,25 @@ int eth_3com_initialize(bd_t *bis)
PRINTF ("eth: 3Com Found at Address: 0x%x\n", eth_iobase);
pci_write_config_dword(devno, PCI_COMMAND, PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
pci_write_config_dword (devno, PCI_COMMAND,
PCI_COMMAND_IO | PCI_COMMAND_MEMORY |
PCI_COMMAND_MASTER);
/* Check if I/O accesses and Bus Mastering are enabled */
ret = pci_read_config_dword (devno, PCI_COMMAND, &status);
if (!(status & PCI_COMMAND_IO))
{
if (!(status & PCI_COMMAND_IO)) {
printf ("Error: Cannot enable IO access.\n");
goto Done;
}
if (!(status & PCI_COMMAND_MEMORY))
{
if (!(status & PCI_COMMAND_MEMORY)) {
printf ("Error: Cannot enable MEMORY access.\n");
goto Done;
}
if (!(status & PCI_COMMAND_MASTER))
{
if (!(status & PCI_COMMAND_MASTER)) {
printf ("Error: Cannot enable Bus Mastering.\n");
goto Done;
}
@@ -505,35 +501,31 @@ int eth_3com_initialize(bd_t *bis)
/* Set the latency timer for value */
s = getenv ("3com_latency");
if (s)
{
ret = pci_write_config_byte(devno, PCI_LATENCY_TIMER, (unsigned char)atoi(s));
}
else ret = pci_write_config_byte(devno, PCI_LATENCY_TIMER, 0x0a);
if (s) {
ret = pci_write_config_byte (devno, PCI_LATENCY_TIMER,
(unsigned char) atoi (s));
} else
ret = pci_write_config_byte (devno, PCI_LATENCY_TIMER, 0x0a);
read_hw_addr (dev, bis); /* get the MAC address from Window 2 */
/* Reset the ethernet controller */
PRINTF ("Issuing reset command....\n");
if (!issue_and_wait(dev, TotalReset))
{
if (!issue_and_wait (dev, TotalReset)) {
printf ("Error: Cannot reset ethernet controller.\n");
goto Done;
}
else
} else
PRINTF ("Ethernet controller reset.\n");
/* allocate memory for rx and tx rings */
if(!(rx_ring = memalign(sizeof(struct rx_desc_3com) * NUM_RX_DESC, 16)))
{
if (!(rx_ring = memalign (sizeof (struct rx_desc_3com) * NUM_RX_DESC, 16))) {
PRINTF ("Cannot allocate memory for RX_RING.....\n");
goto Done;
}
if (!(tx_ring = memalign(sizeof(struct tx_desc_3com) * NUM_TX_DESC, 16)))
{
if (!(tx_ring = memalign (sizeof (struct tx_desc_3com) * NUM_TX_DESC, 16))) {
PRINTF ("Cannot allocate memory for TX_RING.....\n");
goto Done;
}
@@ -553,8 +545,7 @@ static int eth_3com_init(struct eth_device* dev, bd_t *bis)
/* Determine what type of network the machine is connected to */
/* presently drops the connect to 10Mbps */
if (!auto_negotiate(dev))
{
if (!auto_negotiate (dev)) {
printf ("Error: Cannot determine network media.\n");
goto Done;
}
@@ -576,7 +567,9 @@ static int eth_3com_init(struct eth_device* dev, bd_t *bis)
/* Below sets which indication bits to be seen. */
status_enable = SetStatusEnb | HostError | DownComplete | UpComplete | (1<<6);
status_enable =
SetStatusEnb | HostError | DownComplete | UpComplete | (1 <<
6);
ETH_CMD (dev, status_enable);
/* Below sets no bits are to cause an interrupt since this is just polling */
@@ -615,24 +608,21 @@ static int eth_3com_init(struct eth_device* dev, bd_t *bis)
issue_and_wait (dev, DownStall); /* Stall and set the DownListPtr. */
ETH_OUTL (dev, (u32) & tx_ring[tx_cur], DownListPtr);
issue_and_wait (dev, DownUnstall);
for (i=0; !(ETH_STATUS(dev) & DownComplete); i++)
{
if (i >= TOUT_LOOP)
{
PRINTF("TX Ring status (Init): 0x%4x\n", le32_to_cpu(tx_ring[tx_cur].status));
for (i = 0; !(ETH_STATUS (dev) & DownComplete); i++) {
if (i >= TOUT_LOOP) {
PRINTF ("TX Ring status (Init): 0x%4x\n",
le32_to_cpu (tx_ring[tx_cur].status));
PRINTF ("ETH_STATUS: 0x%x\n", ETH_STATUS (dev));
goto Done;
}
}
if (ETH_STATUS(dev) & DownComplete) /* If DownLoad Complete ACK the bit */
{
if (ETH_STATUS (dev) & DownComplete) { /* If DownLoad Complete ACK the bit */
ETH_CMD (dev, AckIntr | DownComplete); /* acknowledge the indication bit */
issue_and_wait (dev, DownStall); /* stall and clear DownListPtr */
ETH_OUTL (dev, 0, DownListPtr);
issue_and_wait (dev, DownUnstall);
}
status = 1;
Done:
return status;
}
@@ -642,8 +632,7 @@ int eth_3com_send(struct eth_device* dev, volatile void *packet, int length)
int i, status = 0;
int tx_cur;
if (length <= 0)
{
if (length <= 0) {
PRINTF ("eth: bad packet size: %d\n", length);
goto Done;
}
@@ -662,16 +651,14 @@ int eth_3com_send(struct eth_device* dev, volatile void *packet, int length)
ETH_OUTL (dev, (u32) & tx_ring[tx_cur], DownListPtr);
issue_and_wait (dev, DownUnstall);
for (i=0; !(ETH_STATUS(dev) & DownComplete); i++)
{
if (i >= TOUT_LOOP)
{
PRINTF("TX Ring status (send): 0x%4x\n", le32_to_cpu(tx_ring[tx_cur].status));
for (i = 0; !(ETH_STATUS (dev) & DownComplete); i++) {
if (i >= TOUT_LOOP) {
PRINTF ("TX Ring status (send): 0x%4x\n",
le32_to_cpu (tx_ring[tx_cur].status));
goto Done;
}
}
if (ETH_STATUS(dev) & DownComplete) /* If DownLoad Complete ACK the bit */
{
if (ETH_STATUS (dev) & DownComplete) { /* If DownLoad Complete ACK the bit */
ETH_CMD (dev, AckIntr | DownComplete); /* acknowledge the indication bit */
issue_and_wait (dev, DownStall); /* stall and clear DownListPtr */
ETH_OUTL (dev, 0, DownListPtr);
@@ -689,8 +676,7 @@ uchar *ptr;
printf ("Printing packet of length %x.\n\n", length);
ptr = packet;
for (loop = 1; loop <= length; loop++)
{
for (loop = 1; loop <= length; loop++) {
printf ("%2x ", *ptr++);
if ((loop % 40) == 0)
printf ("\n");
@@ -708,26 +694,23 @@ int eth_3com_recv(struct eth_device* dev)
status = le32_to_cpu (rx_ring[rx_next].status); /* packet status */
while (status & (1<<15))
{
while (status & (1 << 15)) {
/* A packet has been received */
if (status & (1<<15))
{
if (status & (1 << 15)) {
/* A valid frame received */
length = le32_to_cpu (rx_ring[rx_next].status) & 0x1fff; /* length is in bits 0 - 12 */
/* Pass the packet up to the protocol layers */
NetReceive((uchar *)le32_to_cpu(rx_ring[rx_next].addr), length);
NetReceive ((uchar *)
le32_to_cpu (rx_ring[rx_next].addr),
length);
rx_ring[rx_next].status = 0; /* clear the status word */
ETH_CMD (dev, AckIntr | UpComplete);
issue_and_wait (dev, UpUnstall);
}
else
if (stat & HostError)
{
} else if (stat & HostError) {
/* There was an error */
printf ("Rx error status: 0x%4x\n", stat);
@@ -740,15 +723,13 @@ int eth_3com_recv(struct eth_device* dev)
stat = ETH_STATUS (dev); /* register status */
status = le32_to_cpu (rx_ring[rx_next].status); /* packet status */
}
Done:
return length;
}
void eth_3com_halt (struct eth_device *dev)
{
if (!(dev->iobase))
{
if (!(dev->iobase)) {
goto Done;
}
@@ -771,9 +752,10 @@ static void init_rx_ring(struct eth_device* dev)
PRINTF ("Initializing rx_ring. rx_buffer = %p\n", rx_buffer);
issue_and_wait (dev, UpStall);
for (i = 0; i < NUM_RX_DESC; i++)
{
rx_ring[i].next = cpu_to_le32(((u32) &rx_ring[(i+1) % NUM_RX_DESC]));
for (i = 0; i < NUM_RX_DESC; i++) {
rx_ring[i].next =
cpu_to_le32 (((u32) &
rx_ring[(i + 1) % NUM_RX_DESC]));
rx_ring[i].status = 0;
rx_ring[i].addr = cpu_to_le32 (((u32) & rx_buffer[i][0]));
rx_ring[i].length = cpu_to_le32 (PKTSIZE_ALIGN | LAST_FRAG);
@@ -789,8 +771,7 @@ static void purge_tx_ring(struct eth_device* dev)
tx_next = 0;
for (i = 0; i < NUM_TX_DESC; i++)
{
for (i = 0; i < NUM_TX_DESC; i++) {
tx_ring[i].next = 0;
tx_ring[i].status = 0;
tx_ring[i].addr = 0;
@@ -808,12 +789,10 @@ static void read_hw_addr(struct eth_device* dev, bd_t *bis)
/* Read the station address from the EEPROM. */
EL3WINDOW (dev, 0);
for (i = 0; i < 0x40; i++)
{
for (i = 0; i < 0x40; i++) {
ETH_OUTW (dev, EEPROM_Read + i, Wn0EepromCmd);
/* Pause for at least 162 us. for the read to take place. */
for (timer = 10; timer >= 0; timer--)
{
for (timer = 10; timer >= 0; timer--) {
udelay (162);
if ((ETH_INW (dev, Wn0EepromCmd) & 0x8000) == 0)
break;
@@ -828,10 +807,10 @@ static void read_hw_addr(struct eth_device* dev, bd_t *bis)
checksum = (checksum ^ (checksum >> 8)) & 0xff;
if (checksum != 0xbb)
printf(" *** INVALID EEPROM CHECKSUM %4.4x *** \n", checksum);
printf (" *** INVALID EEPROM CHECKSUM %4.4x *** \n",
checksum);
for (i = 0, j = 0; i < 3; i++)
{
for (i = 0, j = 0; i < 3; i++) {
hw_addr[j++] = (u8) ((eeprom[i + 10] >> 8) & 0xff);
hw_addr[j++] = (u8) (eeprom[i + 10] & 0xff);
}
@@ -842,16 +821,13 @@ static void read_hw_addr(struct eth_device* dev, bd_t *bis)
for (i = 0; i < 6; i++)
ETH_OUTB (dev, hw_addr[i], i);
for (j = 0; j < ETH_ALEN; j+=2)
{
for (j = 0; j < ETH_ALEN; j += 2) {
hw_addr[j] = (u8) (ETH_INW (dev, j) & 0xff);
hw_addr[j + 1] = (u8) ((ETH_INW (dev, j) >> 8) & 0xff);
}
for (i=0;i<ETH_ALEN;i++)
{
if (hw_addr[i] != bis->bi_enetaddr[i])
{
for (i = 0; i < ETH_ALEN; i++) {
if (hw_addr[i] != bis->bi_enetaddr[i]) {
/* printf("Warning: HW address don't match:\n"); */
/* printf("Address in 3Com Window 2 is " */
/* "%02X:%02X:%02X:%02X:%02X:%02X\n", */
@@ -864,12 +840,16 @@ static void read_hw_addr(struct eth_device* dev, bd_t *bis)
/* bis->bi_enetaddr[4], bis->bi_enetaddr[5]); */
/* goto Done; */
char buffer[256];
if (bis->bi_enetaddr[0] == 0 && bis->bi_enetaddr[1] == 0 &&
bis->bi_enetaddr[2] == 0 && bis->bi_enetaddr[3] == 0 &&
bis->bi_enetaddr[4] == 0 && bis->bi_enetaddr[5] == 0)
{
sprintf(buffer, "%02X:%02X:%02X:%02X:%02X:%02X",
if (bis->bi_enetaddr[0] == 0
&& bis->bi_enetaddr[1] == 0
&& bis->bi_enetaddr[2] == 0
&& bis->bi_enetaddr[3] == 0
&& bis->bi_enetaddr[4] == 0
&& bis->bi_enetaddr[5] == 0) {
sprintf (buffer,
"%02X:%02X:%02X:%02X:%02X:%02X",
hw_addr[0], hw_addr[1], hw_addr[2],
hw_addr[3], hw_addr[4], hw_addr[5]);
setenv ("ethaddr", buffer);
@@ -877,7 +857,8 @@ static void read_hw_addr(struct eth_device* dev, bd_t *bis)
}
}
for(i=0; i<ETH_ALEN; i++) dev->enetaddr[i] = hw_addr[i];
for (i = 0; i < ETH_ALEN; i++)
dev->enetaddr[i] = hw_addr[i];
Done:
return;

View File

@@ -197,17 +197,18 @@ static unsigned char kbd_ctrl_xlate[] = {
int isa_kbd_init (void)
{
char *result;
result = kbd_initialize ();
if (result != NULL)
{
if (result != NULL) {
result = kbd_initialize ();
}
if (result == NULL) {
printf ("AT Keyboard initialized\n");
irq_install_handler(KBD_INTERRUPT, (interrupt_handler_t *)kbd_interrupt, NULL);
irq_install_handler (KBD_INTERRUPT,
(interrupt_handler_t *) kbd_interrupt,
NULL);
return (1);
}
else {
} else {
printf ("%s\n", result);
return (-1);
}
@@ -301,7 +302,6 @@ int kbd_getc(void)
}
/* set LEDs */
void kbd_set_leds(void)
@@ -322,7 +322,6 @@ void kbd_set_leds(void)
kbd_send_data(leds);
}
void handle_keyboard_event (unsigned char scancode)
{
unsigned char keycode;
@@ -342,13 +341,13 @@ void handle_keyboard_event(unsigned char scancode)
((scancode) == 0x48) || /* arrow up */
((scancode) == 0x50) || /* arrow down */
((scancode) == 0x4b) || /* arrow left */
((scancode)==0x4d))) /* arrow right */
((scancode) == 0x4d)))
/* arrow right */
/* we swallow unknown e0 codes */
return;
}
/* special cntrl keys */
switch(scancode)
{
switch (scancode) {
case 0x48:
kbd_put_queue (27);
kbd_put_queue (91);
@@ -370,9 +369,9 @@ void handle_keyboard_event(unsigned char scancode)
kbd_put_queue ('C');
return;
case 0x58: /* F12 key */
if (ctrl == 1)
{
if (ctrl == 1) {
extern int console_changed;
setenv ("stdin", DEVNAME);
setenv ("stdout", "vga");
console_changed = 1;
@@ -476,10 +475,8 @@ unsigned char handle_kbd_event(void)
/* Error bytes must be ignored to make the
Synaptics touchpads compaq use work */
/* Ignore error bytes */
if (!(status & (KBD_STAT_GTO | KBD_STAT_PERR)))
{
if (status & KBD_STAT_MOUSE_OBF)
; /* not supported: handle_mouse_event(scancode); */
if (!(status & (KBD_STAT_GTO | KBD_STAT_PERR))) {
if (status & KBD_STAT_MOUSE_OBF); /* not supported: handle_mouse_event(scancode); */
else
handle_keyboard_event (scancode);
}
@@ -490,7 +487,6 @@ unsigned char handle_kbd_event(void)
return status;
}
/******************************************************************************
* Lowlevel Part of keyboard section
*/
@@ -536,8 +532,7 @@ int kbd_wait_for_input(void)
timeout = KBD_TIMEOUT;
val = kbd_read_data ();
while(val < 0)
{
while (val < 0) {
if (timeout-- == 0)
return -1;
udelay (1000);
@@ -553,6 +548,7 @@ int kb_wait(void)
do {
unsigned char status = handle_kbd_event ();
if (!(status & KBD_STAT_IBF))
return 0; /* ok */
udelay (1000);
@@ -578,6 +574,7 @@ void kbd_write_output_w(int data)
void kbd_send_data (unsigned char data)
{
unsigned char status;
i8259_mask_irq (KBD_INTERRUPT); /* disable interrupt */
kbd_write_output_w (data);
status = kbd_wait_for_input ();
@@ -626,8 +623,7 @@ char * kbd_initialize(void)
status = kbd_wait_for_input ();
if (status == KBD_REPLY_ACK)
break;
if (status != KBD_REPLY_RESEND)
{
if (status != KBD_REPLY_RESEND) {
PRINTF ("status: %X\n", status);
return "Kbd: reset failed, no ACK";
}
@@ -653,8 +649,7 @@ char * kbd_initialize(void)
kbd_write_command_w (KBD_CCMD_WRITE_MODE);
kbd_write_output_w (KBD_MODE_KBD_INT
| KBD_MODE_SYS
| KBD_MODE_DISABLE_MOUSE
| KBD_MODE_KCC);
| KBD_MODE_DISABLE_MOUSE | KBD_MODE_KCC);
/* AMCC powerpc portables need this to use scan-code set 1 -- Cort */
kbd_write_command_w (KBD_CCMD_READ_MODE);

View File

@@ -1,66 +0,0 @@
#include "menu.h"
#define SINGLE_BOX 0
#define DOUBLE_BOX 1
void video_draw_box(int style, int attr, char *title, int separate, int x, int y, int w, int h);
void video_draw_text(int x, int y, int attr, char *text);
void video_save_rect(int x, int y, int w, int h, void *save_area, int clearchar, int clearattr);
void video_restore_rect(int x, int y, int w, int h, void *save_area);
int video_rows(void);
int video_cols(void);
#define MAX_MENU_OPTIONS 200
typedef struct
{
int used; /* flag if this entry is used */
int entry_x; /* Character column of the menu entry */
int entry_y; /* Character line of the entry */
int option_x; /* Character colum of the option (entry is same) */
} option_data_t;
option_data_t odata[MAX_MENU_OPTIONS];
int normal_attr = 0x0F;
int select_attr = 0x2F;
int disabled_attr = 0x07;
menu_t *root_menu;
int menu_init (menu_t *root)
{
char *s;
int i;
s = getenv("menu_normal");
if (s) normal_attr = atoi(s);
s = getenv("menu_select");
if (s) select_attr = atoi(s);
s = getenv("menu_disabled");
if (s) disabled_attr = atoi(s);
for (i=0; i<MAX_MENU_OPTIONS; i++) odata[i].used = 0;
root_menu = root;
}
option_data_t *menu_alloc_odata(void)
{
int i;
for (int i=0; i<MAX_MENU_OPTIONS; i++)
{
if (odata[i].used == 0) return &odata[i];
}
return NULL;
}
void menu_free_odata(option_data_t *odata)
{
odata->used = 0;
}
void menu_layout (menu_t *menu)
{

View File

@@ -1,174 +0,0 @@
#ifndef MENU_H
#define MENU_H
/* A single menu */
typedef void (*menu_finish_callback)(struct menu_s *menu);
typedef struct menu_s
{
char *name; /* Menu name */
int num_options; /* Number of options in this menu */
int flags; /* Various flags - see below */
int option_align; /* Aligns options to a field width of this much characters if != 0 */
struct menu_option_s **options; /* Pointer to this menu's options */
menu_finish_callback callback; /* Called when the menu closes */
} menu_t;
/*
* type: Type of the option (see below)
* name: Name to display for this option
* help: Optional help string
* id : optional id number
* sys : pointer for system-specific data, init to NULL and don't touch
*/
#define OPTION_PREAMBLE \
int type; \
char *name; \
char *help; \
int id; \
void *sys; \
/*
* Menu option types.
* There are a number of different layouts for menu options depending
* on their types. Currently there are the following possibilities:
*
* Submenu:
* This entry links to a new menu.
*
* Boolean:
* A simple on/off toggle entry. Booleans can be either yes/no, 0/1 or on/off.
* Optionally, this entry can enable/disable a set of other options. An example would
* be to enable/disable on-board USB, and if enabled give access to further options like
* irq settings, base address etc.
*
* Text:
* A single line/limited number of characters text entry box. Text can be restricted
* to a certain charset (digits/hex digits/all/custom). Result is also available as an
* int if numeric.
*
* Selection:
* One-of-many type of selection entry. User may choose on of a set of strings, which
* maps to a specific value for the variable.
*
* Routine:
* Selecting this calls an entry-specific routine. This can be used for saving contents etc.
*
* Custom:
* Display and behaviour of this entry is defined by a set of callbacks.
*/
#define MENU_SUBMENU_TYPE 0
typedef struct menu_submenu_s
{
OPTION_PREAMBLE
menu_t * submenu; /* Pointer to the submenu */
} menu_submenu_t;
#define MENU_BOOLEAN_TYPE 1
typedef struct menu_boolean_s
{
OPTION_PREAMBLE
char *variable; /* Name of the variable to getenv()/setenv() */
int subtype; /* Subtype (on/off, 0/1, yes/no, enable/disable), see below */
int mutex; /* Bit mask of options to enable/disable. Bit 0 is the option
immediately following this one, bit 1 is the next one etc.
bit 7 = 0 means to disable when this option is off,
bit 7 = 1 means to disable when this option is on.
An option is disabled when the type field's upper bit is set */
} menu_boolean_t;
/* BOOLEAN Menu flags */
#define MENU_BOOLEAN_ONOFF 0x01
#define MENU_BOOLEAN_01 0x02
#define MENU_BOOLEAN_YESNO 0x03
#define MENU_BOOLEAN_ENDIS 0x04
#define MENU_BOOLEAN_TYPE_MASK 0x07
#define MENU_TEXT_TYPE 2
typedef struct menu_text_s
{
OPTION_PREAMBLE
char *variable; /* Name of the variable to getenv()/setenv() */
int maxchars; /* Max number of characters */
char *charset; /* Optional charset to use */
int flags; /* Flags - see below */
} menu_text_t;
/* TEXT entry menu flags */
#define MENU_TEXT_NUMERIC 0x01
#define MENU_TEXT_HEXADECIMAL 0x02
#define MENU_TEXT_FREE 0x03
#define MENU_TEXT_TYPE_MASK 0x07
#define MENU_SELECTION_TYPE 3
typedef struct menu_select_option_s
{
char *map_from; /* Map this variable contents ... */
char *map_to; /* ... to this menu text and vice versa */
} menu_select_option_t;
typedef struct menu_select_s
{
OPTION_PREAMBLE
int num_options; /* Number of mappings */
menu_select_option_t **options;
/* Option list array */
} menu_select_t;
#define MENU_ROUTINE_TYPE 4
typedef void (*menu_routine_callback)(struct menu_routine_s *);
typedef struct menu_routine_s
{
OPTION_PREAMBLE
menu_routine_callback callback;
/* routine to be called */
void *user_data; /* User data, don't care for system */
} menu_routine_t;
#define MENU_CUSTOM_TYPE 5
typedef void (*menu_custom_draw)(struct menu_custom_s *);
typedef void (*menu_custom_key)(struct menu_custom_s *, int);
typedef struct menu_custom_s
{
OPTION_PREAMBLE
menu_custom_draw drawfunc;
menu_custom_key keyfunc;
void *user_data;
} menu_custom_t;
/*
* The menu option superstructure
*/
typedef struct menu_option_s
{
union
{
menu_submenu_t m_sub_menu;
menu_boolean_t m_boolean;
menu_text_t m_text;
menu_select_t m_select;
menu_routine_t m_routine;
};
} menu_option_t;
/* Init the menu system. Returns <0 on error */
int menu_init(menu_t *root);
/* Execute a single menu. Returns <0 on error */
int menu_do(menu_t *menu);
#endif

View File

@@ -1728,7 +1728,7 @@ long int dram_size (long int *base, long int maxsize)
/* ppcboot interface function to SDRAM init - this is where all the
* controlling logic happens */
long int initdram (int board_type)
phys_size_t initdram (int board_type)
{
int s0 = 0, s1 = 0;
int checkbank[4] = {[0 ... 3] = 0 };

View File

@@ -1737,7 +1737,7 @@ long int dram_size (long int *base, long int maxsize)
/* ppcboot interface function to SDRAM init - this is where all the
* controlling logic happens */
long int initdram (int board_type)
phys_size_t initdram (int board_type)
{
int s0 = 0, s1 = 0;
int checkbank[4] = {[0 ... 3] = 0 };

View File

@@ -24,25 +24,29 @@
include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a
LIB = $(obj)lib$(BOARD).a
OBJS := migo_r.o
COBJS := migo_r.o
SOBJS := lowlevel_init.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
SOBJS := $(addprefix $(obj),$(SOBJS))
$(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS) $(SOBJS)
$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak .depend
rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
$(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
-include .depend
sinclude $(obj).depend
#########################################################################

View File

@@ -165,7 +165,7 @@ void rpxclassic_init (void)
/* ------------------------------------------------------------------------- */
long int initdram (int board_type)
phys_size_t initdram (int board_type)
{
volatile immap_t *immap = (immap_t *) CFG_IMMR;
volatile memctl8xx_t *memctl = &immap->im_memctl;

View File

@@ -102,7 +102,7 @@ int checkboard (void)
/* ------------------------------------------------------------------------- */
long int initdram (int board_type)
phys_size_t initdram (int board_type)
{
volatile immap_t *immap = (immap_t *) CFG_IMMR;
volatile memctl8xx_t *memctl = &immap->im_memctl;

View File

@@ -104,7 +104,7 @@ int checkboard (void)
/* ------------------------------------------------------------------------- */
long int initdram (int board_type)
phys_size_t initdram (int board_type)
{
volatile immap_t *immap = (immap_t *)CFG_IMMR;
volatile memctl8xx_t *memctl = &immap->im_memctl;

View File

@@ -178,8 +178,8 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info)
value = addr[0] ;
switch (value & 0x00FF00FF) {
case AMD_MANUFACT: /* AMD_MANUFACT=0x00010001 in flash.h. */
info->flash_id = FLASH_MAN_AMD; /* FLASH_MAN_AMD=0x00000000 in flash.h.*/
case AMD_MANUFACT: /* AMD_MANUFACT =0x00010001 in flash.h */
info->flash_id = FLASH_MAN_AMD; /* FLASH_MAN_AMD=0x00000000 in flash.h */
break;
case FUJ_MANUFACT:
info->flash_id = FLASH_MAN_FUJ;

View File

@@ -110,7 +110,7 @@ int checkboard (void)
/* ------------------------------------------------------------------------- */
long int initdram (int board_type)
phys_size_t initdram (int board_type)
{
volatile immap_t *immap = (immap_t *) CFG_IMMR;
volatile memctl8xx_t *memctl = &immap->im_memctl;

View File

@@ -38,7 +38,7 @@ int checkboard (void)
}
long int initdram (int board_type)
phys_size_t initdram (int board_type)
{
long size;
long new_bank0_end;

View File

@@ -38,7 +38,7 @@ clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak .depend
rm -f $(LIB) core *.bak $(obj).depend
#########################################################################

View File

@@ -38,7 +38,7 @@ clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak .depend
rm -f $(LIB) core *.bak $(obj).depend
#########################################################################

View File

@@ -38,7 +38,7 @@ clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak .depend
rm -f $(LIB) core *.bak $(obj).depend
#########################################################################

View File

@@ -38,7 +38,7 @@ clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak .depend
rm -f $(LIB) core *.bak $(obj).depend
#########################################################################

View File

@@ -41,7 +41,7 @@ clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak .depend
rm -f $(LIB) core *.bak $(obj).depend
#########################################################################

View File

@@ -65,7 +65,7 @@ static uint sdram_table[] = {
0xfffffc27, 0xfffffc04, 0xfffffc04, 0xfffffc04
};
long int initdram (int board_type)
phys_size_t initdram (int board_type)
{
long int msize;
volatile immap_t *immap = (volatile immap_t *)CFG_IMMR;

View File

@@ -23,9 +23,14 @@
include $(TOPDIR)/config.mk
$(shell mkdir -p $(OBJTREE)/board/freescale/common)
LIB = $(obj)lib$(BOARD).a
COBJS-y := $(BOARD).o
COBJS-${CONFIG_FSL_DIU_FB} += ads5121_diu.o
COBJS-${CONFIG_FSL_DIU_FB} += ../freescale/common/fsl_diu_fb.o
COBJS-${CONFIG_FSL_DIU_FB} += ../freescale/common/fsl_logo_bmp.o
COBJS-$(CONFIG_PCI) += pci.o
COBJS := $(COBJS-y)
@@ -40,7 +45,7 @@ clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak .depend
rm -f $(LIB) core *.bak $(obj).depend
#########################################################################

7
board/ads5121/README Normal file
View File

@@ -0,0 +1,7 @@
To configure for the current (Rev 3.x) ADS5121
make ads5121_config
This will automatically include PCI, the Real Time CLock, add backup flash
ability and set the correct frequency and memory configuration.
To configure for the older Rev 2 ADS5121 type (this will not have PCI)
make ads5121_rev2_config

View File

@@ -26,6 +26,9 @@
#include <asm/bitops.h>
#include <command.h>
#include <fdt_support.h>
#ifdef CONFIG_MISC_INIT_R
#include <i2c.h>
#endif
/* Clocks in use */
#define SCCR1_CLOCKS_EN (CLOCK_SCCR1_CFG_EN | \
@@ -39,6 +42,7 @@
#define SCCR2_CLOCKS_EN (CLOCK_SCCR2_MEM_EN | \
CLOCK_SCCR2_SPDIF_EN | \
CLOCK_SCCR2_DIU_EN | \
CLOCK_SCCR2_I2C_EN)
#define CSAW_START(start) ((start) & 0xFFFF0000)
@@ -73,8 +77,21 @@ int board_early_init_f (void)
* Without this the flash identification routine fails, as it needs to issue
* write commands in order to establish the device ID.
*/
*((volatile u8 *)(CFG_CPLD_BASE + 0x08)) = 0xC1;
#ifdef CONFIG_ADS5121_REV2
*((volatile u8 *)(CFG_CPLD_BASE + 0x08)) = 0xC1;
#else
if (*((u8 *)(CFG_CPLD_BASE + 0x08)) & 0x04) {
*((volatile u8 *)(CFG_CPLD_BASE + 0x08)) = 0xC1;
} else {
/* running from Backup flash */
*((volatile u8 *)(CFG_CPLD_BASE + 0x08)) = 0x32;
}
#endif
/*
* Configure Flash Speed
*/
*((volatile u32 *)(CFG_IMMR + LPC_OFFSET + CS0_CONFIG)) = CFG_CS0_CFG;
/*
* Enable clocks
*/
@@ -84,7 +101,7 @@ int board_early_init_f (void)
return 0;
}
long int initdram (int board_type)
phys_size_t initdram (int board_type)
{
u32 msize = 0;
@@ -105,7 +122,7 @@ long int fixed_sdram (void)
u32 i;
/* Initialize IO Control */
im->io_ctrl.regs[MEM_IDX] = IOCTRL_MUX_DDR;
im->io_ctrl.regs[IOCTL_MEM/4] = IOCTRL_MUX_DDR;
/* Initialize DDR Local Window */
im->sysconf.ddrlaw.bar = CFG_DDR_BASE & 0xFFFFF000;
@@ -186,21 +203,101 @@ long int fixed_sdram (void)
return msize;
}
int misc_init_r(void)
{
u8 tmp_val;
extern int ads5121_diu_init(void);
/* Using this for DIU init before the driver in linux takes over
* Enable the TFP410 Encoder (I2C address 0x38)
*/
i2c_set_bus_num(2);
tmp_val = 0xBF;
i2c_write(0x38, 0x08, 1, &tmp_val, sizeof(tmp_val));
/* Verify if enabled */
tmp_val = 0;
i2c_read(0x38, 0x08, 1, &tmp_val, sizeof(tmp_val));
debug("DVI Encoder Read: 0x%02lx\n", tmp_val);
tmp_val = 0x10;
i2c_write(0x38, 0x0A, 1, &tmp_val, sizeof(tmp_val));
/* Verify if enabled */
tmp_val = 0;
i2c_read(0x38, 0x0A, 1, &tmp_val, sizeof(tmp_val));
debug("DVI Encoder Read: 0x%02lx\n", tmp_val);
#ifdef CONFIG_FSL_DIU_FB
#if !(defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE))
ads5121_diu_init();
#endif
#endif
return 0;
}
static iopin_t ioregs_init[] = {
/* FUNC1=FEC_RX_DV Sets Next 3 to FEC pads */
{
IOCTL_SPDIF_TXCLK, 3, 0,
IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
},
/* Set highest Slew on 9 PATA pins */
{
IOCTL_PATA_CE1, 9, 1,
IO_PIN_FMUX(0) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
},
/* FUNC1=FEC_COL Sets Next 15 to FEC pads */
{
IOCTL_PSC0_0, 15, 0,
IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
},
/* FUNC1=SPDIF_TXCLK */
{
IOCTL_LPC_CS1, 1, 0,
IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
IO_PIN_PUE(0) | IO_PIN_ST(1) | IO_PIN_DS(3)
},
/* FUNC2=SPDIF_TX and sets Next pin to SPDIF_RX */
{
IOCTL_I2C1_SCL, 2, 0,
IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
IO_PIN_PUE(0) | IO_PIN_ST(1) | IO_PIN_DS(3)
},
/* FUNC2=DIU CLK */
{
IOCTL_PSC6_0, 1, 0,
IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
IO_PIN_PUE(0) | IO_PIN_ST(1) | IO_PIN_DS(3)
},
/* FUNC2=DIU_HSYNC */
{
IOCTL_PSC6_1, 1, 0,
IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
},
/* FUNC2=DIUVSYNC Sets Next 26 to DIU Pads */
{
IOCTL_PSC6_4, 26, 0,
IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
}
};
int checkboard (void)
{
ushort brd_rev = *(vu_short *) (CFG_CPLD_BASE + 0x00);
uchar cpld_rev = *(vu_char *) (CFG_CPLD_BASE + 0x02);
volatile immap_t *im = (immap_t *) CFG_IMMR;
volatile unsigned long *reg;
int i;
printf ("Board: ADS5121 rev. 0x%04x (CPLD rev. 0x%02x)\n",
brd_rev, cpld_rev);
/* initialize function mux & slew rate IO inter alia on IO Pins */
iopin_initialize(ioregs_init, sizeof(ioregs_init) / sizeof(ioregs_init[0]));
/* change the slew rate on all pata pins to max */
reg = (unsigned long *) &(im->io_ctrl.regs[PATA_CE1_IDX]);
for (i = 0; i < 9; i++)
reg[i] |= 0x00000003;
return 0;
}

165
board/ads5121/ads5121_diu.c Normal file
View File

@@ -0,0 +1,165 @@
/*
* Copyright 2008 Freescale Semiconductor, Inc.
* York Sun <yorksun@freescale.com>
*
* FSL DIU Framebuffer driver
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <command.h>
#include <asm/io.h>
#ifdef CONFIG_FSL_DIU_FB
#include "../freescale/common/pixis.h"
#include "../freescale/common/fsl_diu_fb.h"
#if defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE)
#include <devices.h>
#include <video_fb.h>
#endif
extern unsigned int FSL_Logo_BMP[];
static int xres, yres;
void diu_set_pixel_clock(unsigned int pixclock)
{
volatile immap_t *immap = (immap_t *)CFG_IMMR;
volatile clk512x_t *clk = &immap->clk;
volatile unsigned int *clkdvdr = &clk->scfr[0];
unsigned long speed_ccb, temp, pixval;
speed_ccb = get_bus_freq(0) * 4;
temp = 1000000000/pixclock;
temp *= 1000;
pixval = speed_ccb / temp;
debug("DIU pixval = %lu\n", pixval);
/* Modify PXCLK in GUTS CLKDVDR */
debug("DIU: Current value of CLKDVDR = 0x%08x\n", *clkdvdr);
temp = *clkdvdr & 0xFFFFFF00;
*clkdvdr = temp | (pixval & 0xFF);
debug("DIU: Modified value of CLKDVDR = 0x%08x\n", *clkdvdr);
}
int ads5121_diu_init(void)
{
unsigned int pixel_format;
xres = 1024;
yres = 768;
pixel_format = 0x88883316;
return fsl_diu_init(xres, pixel_format, 0,
(unsigned char *)FSL_Logo_BMP);
}
int ads5121diu_init_show_bmp(cmd_tbl_t *cmdtp,
int flag, int argc, char *argv[])
{
unsigned int addr;
if (argc < 2) {
printf("Usage:\n%s\n", cmdtp->usage);
return 1;
}
if (!strncmp(argv[1], "init", 4)) {
#if defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE)
fsl_diu_clear_screen();
drv_video_init();
#else
return ads5121_diu_init();
#endif
} else {
addr = simple_strtoul(argv[1], NULL, 16);
fsl_diu_clear_screen();
fsl_diu_display_bmp((unsigned char *)addr, 0, 0, 0);
}
return 0;
}
U_BOOT_CMD(
diufb, CFG_MAXARGS, 1, ads5121diu_init_show_bmp,
"diufb init | addr - Init or Display BMP file\n",
"init\n - initialize DIU\n"
"addr\n - display bmp at address 'addr'\n"
);
#if defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE)
/*
* The Graphic Device
*/
GraphicDevice ctfb;
void *video_hw_init(void)
{
GraphicDevice *pGD = (GraphicDevice *) &ctfb;
struct fb_info *info;
if (ads5121_diu_init() < 0)
return;
/* fill in Graphic device struct */
sprintf(pGD->modeIdent, "%dx%dx%d %ldkHz %ldHz",
xres, yres, 32, 64, 60);
pGD->frameAdrs = (unsigned int)fsl_fb_open(&info);
pGD->winSizeX = xres;
pGD->winSizeY = yres - info->logo_height;
pGD->plnSizeX = pGD->winSizeX;
pGD->plnSizeY = pGD->winSizeY;
pGD->gdfBytesPP = 4;
pGD->gdfIndex = GDF_32BIT_X888RGB;
pGD->isaBase = 0;
pGD->pciBase = 0;
pGD->memSize = info->screen_size - info->logo_size;
/* Cursor Start Address */
pGD->dprBase = 0;
pGD->vprBase = 0;
pGD->cprBase = 0;
return (void *)pGD;
}
/**
* Set the LUT
*
* @index: color number
* @r: red
* @b: blue
* @g: green
*/
void video_set_lut
(unsigned int index, unsigned char r, unsigned char g, unsigned char b)
{
return;
}
#endif /* defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE) */
#endif /* CONFIG_FSL_DIU_FB */

View File

@@ -1,75 +0,0 @@
/*
* (C) Copyright 2004
* Robert Whaley, Applied Data Systems, Inc. rwhaley@applieddata.net
*
* (C) Copyright 2002
* Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
*
* (C) Copyright 2002
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
* Marius Groeger <mgroeger@sysgo.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
DECLARE_GLOBAL_DATA_PTR;
/* ------------------------------------------------------------------------- */
/*
* Miscelaneous platform dependent initialisations
*/
int board_init (void)
{
/* memory and cpu-speed are setup before relocation */
/* so we do _nothing_ here */
/* arch number of ADSVIX-Board */
gd->bd->bi_arch_number = 620;
/* adress of boot parameters */
gd->bd->bi_boot_params = 0xa000003c;
return 0;
}
int board_late_init(void)
{
setenv("stdout", "serial");
setenv("stderr", "serial");
return 0;
}
int dram_init (void)
{
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE;
gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
gd->bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE;
return 0;
}

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@@ -1 +0,0 @@
TEXT_BASE = 0xa1700000

View File

@@ -1,466 +0,0 @@
/*
* This was originally from the Lubbock u-boot port.
*
* Most of this taken from Redboot hal_platform_setup.h with cleanup
*
* NOTE: I haven't clean this up considerably, just enough to get it
* running. See hal_platform_setup.h for the source. See
* board/cradle/lowlevel_init.S for another PXA250 setup that is
* much cleaner.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <config.h>
#include <version.h>
#include <asm/arch/pxa-regs.h>
/* wait for coprocessor write complete */
.macro CPWAIT reg
mrc p15,0,\reg,c2,c0,0
mov \reg,\reg
sub pc,pc,#4
.endm
/*
* Memory setup
*/
.globl lowlevel_init
lowlevel_init:
/* Set up GPIO pins first ----------------------------------------- */
ldr r0, =GPSR0
ldr r1, =CFG_GPSR0_VAL
str r1, [r0]
ldr r0, =GPSR1
ldr r1, =CFG_GPSR1_VAL
str r1, [r0]
ldr r0, =GPSR2
ldr r1, =CFG_GPSR2_VAL
str r1, [r0]
ldr r0, =GPSR3
ldr r1, =CFG_GPSR3_VAL
str r1, [r0]
ldr r0, =GPCR0
ldr r1, =CFG_GPCR0_VAL
str r1, [r0]
ldr r0, =GPCR1
ldr r1, =CFG_GPCR1_VAL
str r1, [r0]
ldr r0, =GPCR2
ldr r1, =CFG_GPCR2_VAL
str r1, [r0]
ldr r0, =GPCR3
ldr r1, =CFG_GPCR3_VAL
str r1, [r0]
ldr r0, =GPDR0
ldr r1, =CFG_GPDR0_VAL
str r1, [r0]
ldr r0, =GPDR1
ldr r1, =CFG_GPDR1_VAL
str r1, [r0]
ldr r0, =GPDR2
ldr r1, =CFG_GPDR2_VAL
str r1, [r0]
ldr r0, =GPDR3
ldr r1, =CFG_GPDR3_VAL
str r1, [r0]
ldr r0, =GAFR0_L
ldr r1, =CFG_GAFR0_L_VAL
str r1, [r0]
ldr r0, =GAFR0_U
ldr r1, =CFG_GAFR0_U_VAL
str r1, [r0]
ldr r0, =GAFR1_L
ldr r1, =CFG_GAFR1_L_VAL
str r1, [r0]
ldr r0, =GAFR1_U
ldr r1, =CFG_GAFR1_U_VAL
str r1, [r0]
ldr r0, =GAFR2_L
ldr r1, =CFG_GAFR2_L_VAL
str r1, [r0]
ldr r0, =GAFR2_U
ldr r1, =CFG_GAFR2_U_VAL
str r1, [r0]
ldr r0, =GAFR3_L
ldr r1, =CFG_GAFR3_L_VAL
str r1, [r0]
ldr r0, =GAFR3_U
ldr r1, =CFG_GAFR3_U_VAL
str r1, [r0]
ldr r0, =PSSR /* enable GPIO pins */
ldr r1, =CFG_PSSR_VAL
str r1, [r0]
/* ---------------------------------------------------------------- */
/* Enable memory interface */
/* */
/* The sequence below is based on the recommended init steps */
/* detailed in the Intel PXA250 Operating Systems Developers Guide, */
/* Chapter 10. */
/* ---------------------------------------------------------------- */
/* ---------------------------------------------------------------- */
/* Step 1: Wait for at least 200 microsedonds to allow internal */
/* clocks to settle. Only necessary after hard reset... */
/* FIXME: can be optimized later */
/* ---------------------------------------------------------------- */
ldr r3, =OSCR /* reset the OS Timer Count to zero */
mov r2, #0
str r2, [r3]
ldr r4, =0x300 /* really 0x2E1 is about 200usec, */
/* so 0x300 should be plenty */
1:
ldr r2, [r3]
cmp r4, r2
bgt 1b
mem_init:
ldr r1, =MEMC_BASE /* get memory controller base addr. */
/* ---------------------------------------------------------------- */
/* Step 2a: Initialize Asynchronous static memory controller */
/* ---------------------------------------------------------------- */
/* MSC registers: timing, bus width, mem type */
/* MSC0: nCS(0,1) */
ldr r2, =CFG_MSC0_VAL
str r2, [r1, #MSC0_OFFSET]
ldr r2, [r1, #MSC0_OFFSET] /* read back to ensure */
/* that data latches */
/* MSC1: nCS(2,3) */
ldr r2, =CFG_MSC1_VAL
str r2, [r1, #MSC1_OFFSET]
ldr r2, [r1, #MSC1_OFFSET]
/* MSC2: nCS(4,5) */
ldr r2, =CFG_MSC2_VAL
str r2, [r1, #MSC2_OFFSET]
ldr r2, [r1, #MSC2_OFFSET]
/* ---------------------------------------------------------------- */
/* Step 2b: Initialize Card Interface */
/* ---------------------------------------------------------------- */
/* MECR: Memory Expansion Card Register */
ldr r2, =CFG_MECR_VAL
str r2, [r1, #MECR_OFFSET]
ldr r2, [r1, #MECR_OFFSET]
/* MCMEM0: Card Interface slot 0 timing */
ldr r2, =CFG_MCMEM0_VAL
str r2, [r1, #MCMEM0_OFFSET]
ldr r2, [r1, #MCMEM0_OFFSET]
/* MCMEM1: Card Interface slot 1 timing */
ldr r2, =CFG_MCMEM1_VAL
str r2, [r1, #MCMEM1_OFFSET]
ldr r2, [r1, #MCMEM1_OFFSET]
/* MCATT0: Card Interface Attribute Space Timing, slot 0 */
ldr r2, =CFG_MCATT0_VAL
str r2, [r1, #MCATT0_OFFSET]
ldr r2, [r1, #MCATT0_OFFSET]
/* MCATT1: Card Interface Attribute Space Timing, slot 1 */
ldr r2, =CFG_MCATT1_VAL
str r2, [r1, #MCATT1_OFFSET]
ldr r2, [r1, #MCATT1_OFFSET]
/* MCIO0: Card Interface I/O Space Timing, slot 0 */
ldr r2, =CFG_MCIO0_VAL
str r2, [r1, #MCIO0_OFFSET]
ldr r2, [r1, #MCIO0_OFFSET]
/* MCIO1: Card Interface I/O Space Timing, slot 1 */
ldr r2, =CFG_MCIO1_VAL
str r2, [r1, #MCIO1_OFFSET]
ldr r2, [r1, #MCIO1_OFFSET]
/* ---------------------------------------------------------------- */
/* Step 2c: Write FLYCNFG FIXME: what's that??? */
/* ---------------------------------------------------------------- */
ldr r2, =CFG_FLYCNFG_VAL
str r2, [r1, #FLYCNFG_OFFSET]
str r2, [r1, #FLYCNFG_OFFSET]
/* ---------------------------------------------------------------- */
/* Step 2d: Initialize Timing for Sync Memory (SDCLK0) */
/* ---------------------------------------------------------------- */
/* Before accessing MDREFR we need a valid DRI field, so we set */
/* this to power on defaults + DRI field. */
ldr r4, [r1, #MDREFR_OFFSET]
ldr r2, =0xFFF
bic r4, r4, r2
ldr r3, =CFG_MDREFR_VAL
and r3, r3, r2
orr r4, r4, r3
str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */
orr r4, r4, #MDREFR_K0RUN
orr r4, r4, #MDREFR_K0DB4
orr r4, r4, #MDREFR_K0FREE
orr r4, r4, #MDREFR_K0DB2
orr r4, r4, #MDREFR_K1DB2
bic r4, r4, #MDREFR_K1FREE
bic r4, r4, #MDREFR_K2FREE
str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */
ldr r4, [r1, #MDREFR_OFFSET]
/* Note: preserve the mdrefr value in r4 */
/* ---------------------------------------------------------------- */
/* Step 3: Initialize Synchronous Static Memory (Flash/Peripherals) */
/* ---------------------------------------------------------------- */
/* Initialize SXCNFG register. Assert the enable bits */
/* Write SXMRS to cause an MRS command to all enabled banks of */
/* synchronous static memory. Note that SXLCR need not be written */
/* at this time. */
ldr r2, =CFG_SXCNFG_VAL
str r2, [r1, #SXCNFG_OFFSET]
/* ---------------------------------------------------------------- */
/* Step 4: Initialize SDRAM */
/* ---------------------------------------------------------------- */
bic r4, r4, #(MDREFR_K2FREE |MDREFR_K1FREE | MDREFR_K0FREE)
orr r4, r4, #MDREFR_K1RUN
bic r4, r4, #MDREFR_K2DB2
str r4, [r1, #MDREFR_OFFSET]
ldr r4, [r1, #MDREFR_OFFSET]
bic r4, r4, #MDREFR_SLFRSH
str r4, [r1, #MDREFR_OFFSET]
ldr r4, [r1, #MDREFR_OFFSET]
orr r4, r4, #MDREFR_E1PIN
str r4, [r1, #MDREFR_OFFSET]
ldr r4, [r1, #MDREFR_OFFSET]
nop
nop
/* Step 4d: write MDCNFG with MDCNFG:DEx deasserted (set to 0), to */
/* configure but not enable each SDRAM partition pair. */
ldr r4, =CFG_MDCNFG_VAL
bic r4, r4, #(MDCNFG_DE0|MDCNFG_DE1)
bic r4, r4, #(MDCNFG_DE2|MDCNFG_DE3)
str r4, [r1, #MDCNFG_OFFSET] /* write back MDCNFG */
ldr r4, [r1, #MDCNFG_OFFSET]
/* Step 4e: Wait for the clock to the SDRAMs to stabilize, */
/* 100..200 <20>sec. */
ldr r3, =OSCR /* reset the OS Timer Count to zero */
mov r2, #0
str r2, [r3]
ldr r4, =0x300 /* really 0x2E1 is about 200usec, */
/* so 0x300 should be plenty */
1:
ldr r2, [r3]
cmp r4, r2
bgt 1b
/* Step 4f: Trigger a number (usually 8) refresh cycles by */
/* attempting non-burst read or write accesses to disabled */
/* SDRAM, as commonly specified in the power up sequence */
/* documented in SDRAM data sheets. The address(es) used */
/* for this purpose must not be cacheable. */
ldr r3, =CFG_DRAM_BASE
str r2, [r3]
str r2, [r3]
str r2, [r3]
str r2, [r3]
str r2, [r3]
str r2, [r3]
str r2, [r3]
str r2, [r3]
/* Step 4g: Write MDCNFG with enable bits asserted */
/* (MDCNFG:DEx set to 1). */
ldr r3, [r1, #MDCNFG_OFFSET]
mov r4, r3
orr r3, r3, #MDCNFG_DE0
str r3, [r1, #MDCNFG_OFFSET]
mov r0, r3
/* Step 4h: Write MDMRS. */
ldr r2, =CFG_MDMRS_VAL
str r2, [r1, #MDMRS_OFFSET]
/* enable APD */
ldr r3, [r1, #MDREFR_OFFSET]
orr r3, r3, #MDREFR_APD
str r3, [r1, #MDREFR_OFFSET]
/* We are finished with Intel's memory controller initialisation */
setvoltage:
mov r10, lr
bl initPXAvoltage /* In case the board is rebooting with a */
mov lr, r10 /* low voltage raise it up to a good one. */
wakeup:
/* Are we waking from sleep? */
ldr r0, =RCSR
ldr r1, [r0]
and r1, r1, #(RCSR_GPR | RCSR_SMR | RCSR_WDR | RCSR_HWR)
str r1, [r0]
teq r1, #RCSR_SMR
bne initirqs
ldr r0, =PSSR
mov r1, #PSSR_PH
str r1, [r0]
/* if so, resume at PSPR */
ldr r0, =PSPR
ldr r1, [r0]
mov pc, r1
/* ---------------------------------------------------------------- */
/* Disable (mask) all interrupts at interrupt controller */
/* ---------------------------------------------------------------- */
initirqs:
mov r1, #0 /* clear int. level register (IRQ, not FIQ) */
ldr r2, =ICLR
str r1, [r2]
ldr r2, =ICMR /* mask all interrupts at the controller */
str r1, [r2]
/* ---------------------------------------------------------------- */
/* Clock initialisation */
/* ---------------------------------------------------------------- */
initclks:
/* Disable the peripheral clocks, and set the core clock frequency */
/* Turn Off on-chip peripheral clocks (except for memory) */
/* for re-configuration. */
ldr r1, =CKEN
ldr r2, =CFG_CKEN
str r2, [r1]
/* ... and write the core clock config register */
ldr r2, =CFG_CCCR
ldr r1, =CCCR
str r2, [r1]
/* Turn on turbo mode */
mrc p14, 0, r2, c6, c0, 0
orr r2, r2, #0xB /* Turbo, Fast-Bus, Freq change**/
mcr p14, 0, r2, c6, c0, 0
/* Re-write MDREFR */
ldr r1, =MEMC_BASE
ldr r2, [r1, #MDREFR_OFFSET]
str r2, [r1, #MDREFR_OFFSET]
#ifdef RTC
/* enable the 32Khz oscillator for RTC and PowerManager */
ldr r1, =OSCC
mov r2, #OSCC_OON
str r2, [r1]
/* NOTE: spin here until OSCC.OOK get set, meaning the PLL */
/* has settled. */
60:
ldr r2, [r1]
ands r2, r2, #1
beq 60b
#else
#error "RTC not defined"
#endif
/* Interrupt init: Mask all interrupts */
ldr r0, =ICMR /* enable no sources */
mov r1, #0
str r1, [r0]
/* FIXME */
#ifdef NODEBUG
/*Disable software and data breakpoints */
mov r0,#0
mcr p15,0,r0,c14,c8,0 /* ibcr0 */
mcr p15,0,r0,c14,c9,0 /* ibcr1 */
mcr p15,0,r0,c14,c4,0 /* dbcon */
/*Enable all debug functionality */
mov r0,#0x80000000
mcr p14,0,r0,c10,c0,0 /* dcsr */
#endif
/* ---------------------------------------------------------------- */
/* End lowlevel_init */
/* ---------------------------------------------------------------- */
endlowlevel_init:
mov pc, lr

View File

@@ -1,67 +0,0 @@
/*
* (C) Copyright 2004
* Robert Whaley, Applied Data Systems, Inc. rwhaley@applieddata.net
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <asm/arch/pxa-regs.h>
void pcmcia_power_on(void)
{
#if 0
if (!(GPLR(20) & GPIO_bit(20))) { /* 3.3V */
GPCR(81) = GPIO_bit(81);
GPSR(82) = GPIO_bit(82);
}
else if (!(GPLR(21) & GPIO_bit(21))) { /* 5.0V */
GPCR(81) = GPIO_bit(81);
GPCR(82) = GPIO_bit(82);
}
#else
#warning "Board will only supply 5V, wait for next HW spin for selectable power"
/* 5.0V */
GPCR(81) = GPIO_bit(81);
GPCR(82) = GPIO_bit(82);
#endif
udelay(300000);
/* reset the card */
GPSR(52) = GPIO_bit(52);
/* enable PCMCIA */
GPCR(83) = GPIO_bit(83);
/* clear reset */
udelay(10);
GPCR(52) = GPIO_bit(52);
udelay(20000);
}
void pcmcia_power_off(void)
{
/* 0V */
GPSR(81) = GPIO_bit(81);
GPSR(82) = GPIO_bit(82);
/* disable PCMCIA */
GPSR(83) = GPIO_bit(83);
}

View File

@@ -1,230 +0,0 @@
/*
* (C) Copyright 2004
* Robert Whaley, Applied Data Systems, Inc. rwhaley@applieddata.net
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <asm/arch/pxa-regs.h>
#define LTC1663_ADDR 0x20
#define LTC1663_SY 0x01 /* Sync ACK */
#define LTC1663_SD 0x04 /* shutdown */
#define LTC1663_BG 0x04 /* Internal Voltage Ref */
#define VOLT_1_55 18 /* DAC value for 1.55V */
.global initPXAvoltage
@ Set the voltage to 1.55V early in the boot process so we can run
@ at a high clock speed and boot quickly. Note that this is necessary
@ because the reset button does not reset the CPU voltage, so if the
@ voltage was low (say 0.85V) then the CPU would crash without this
@ routine
@ This routine clobbers r0-r4
initializei2c:
ldr r2, =CKEN
ldr r3, [r2]
orr r3, r3, #CKEN15_PWRI2C
str r3, [r2]
ldr r2, =PCFR
ldr r3, [r2]
orr r3, r3, #PCFR_PI2C_EN
str r3, [r2]
/* delay for about 250msec
*/
ldr r3, =OSCR
mov r2, #0
str r2, [r3]
ldr r1, =0xC0000
1:
ldr r2, [r3]
cmp r1, r2
bgt 1b
ldr r0, =PWRICR
ldr r1, [r0]
bic r1, r1, #(ICR_MA | ICR_START | ICR_STOP)
str r1, [r0]
orr r1, r1, #ICR_UR
str r1, [r0]
ldr r2, =PWRISR
ldr r3, =0x7ff
str r3, [r2]
bic r1, r1, #ICR_UR
str r1, [r0]
mov r1, #(ICR_GCD | ICR_SCLE)
str r1, [r0]
orr r1, r1, #ICR_IUE
str r1, [r0]
orr r1, r1, #ICR_FM
str r1, [r0]
/* delay for about 1msec
*/
ldr r3, =OSCR
mov r2, #0
str r2, [r3]
ldr r1, =0xC00
1:
ldr r2, [r3]
cmp r1, r2
bgt 1b
mov pc, lr
sendbytei2c:
ldr r3, =PWRIDBR
str r0, [r3]
ldr r3, =PWRICR
ldr r0, [r3]
orr r0, r0, r1
bic r0, r0, r2
str r0, [r3]
orr r0, r0, #ICR_TB
str r0, [r3]
mov r2, #0x100000
waitfortxemptyi2c:
ldr r0, =PWRISR
ldr r1, [r0]
/* take it from the top if we don't get empty after a while */
subs r2, r2, #1
moveq lr, r4
beq initPXAvoltage
tst r1, #ISR_ITE
beq waitfortxemptyi2c
orr r1, r1, #ISR_ITE
str r1, [r0]
mov pc, lr
initPXAvoltage:
mov r4, lr
bl setleds
bl initializei2c
bl setleds
/* now send the real message to set the correct voltage */
ldr r0, =LTC1663_ADDR
mov r0, r0, LSL #1
mov r1, #ICR_START
ldr r2, =(ICR_STOP | ICR_ALDIE | ICR_ACKNAK)
bl sendbytei2c
bl setleds
mov r0, #LTC1663_BG
mov r1, #0
mov r2, #(ICR_STOP | ICR_START)
bl sendbytei2c
bl setleds
ldr r0, =VOLT_1_55
and r0, r0, #0xff
mov r1, #0
mov r2, #(ICR_STOP | ICR_START)
bl sendbytei2c
bl setleds
ldr r0, =VOLT_1_55
mov r0, r0, ASR #8
and r0, r0, #0xff
mov r1, #ICR_STOP
mov r2, #ICR_START
bl sendbytei2c
bl setleds
@ delay a little for the volatage to stablize
ldr r3, =OSCR
mov r2, #0
str r2, [r3]
ldr r1, =0xC0
1:
ldr r2, [r3]
cmp r1, r2
bgt 1b
mov pc, r4
setleds:
mov pc, lr
ldr r5, =0x40e00058
ldr r3, [r5]
bic r3, r3, #0x3
str r3, [r5]
ldr r5, =0x40e0000c
ldr r3, [r5]
orr r3, r3, #0x00010000
str r3, [r5]
@ inner loop
mov r0, #0x2
1:
ldr r5, =0x40e00018
mov r3, #0x00010000
str r3, [r5]
@ outer loop
mov r3, #0x00F00000
2:
subs r3, r3, #1
bne 2b
ldr r5, =0x40e00024
mov r3, #0x00010000
str r3, [r5]
@ outer loop
mov r3, #0x00F00000
3:
subs r3, r3, #1
bne 3b
subs r0, r0, #1
bne 1b
mov pc, lr

View File

@@ -38,7 +38,7 @@ clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak .depend
rm -f $(LIB) core *.bak $(obj).depend
#########################################################################

View File

@@ -131,7 +131,7 @@ void setupBat (ulong size)
mtspr (DBAT7U, batu);
}
long int initdram (int board_type)
phys_size_t initdram (int board_type)
{
ulong size;

View File

@@ -670,7 +670,7 @@ static int write_data (flash_info_t * info, ulong dest, FPW data)
/* Check if Flash is (sufficiently) erased */
if ((*addr & data) != data) {
printf ("not erased at %08lx (%lx)\n", (ulong) addr, *addr);
printf ("not erased at %08lx (%lx)\n", (ulong)addr, (ulong)*addr);
return (2);
}
/* Disable interrupts which might cause a timeout here */
@@ -712,7 +712,7 @@ static int write_data_block (flash_info_t * info, ulong src, ulong dest)
for (i = 0; i < WR_BLOCK; i++)
if ((*dstaddr++ & 0xff) != 0xff) {
printf ("not erased at %08lx (%lx)\n",
(ulong) dstaddr, *dstaddr);
(ulong)dstaddr, (ulong)*dstaddr);
return (2);
}

View File

@@ -39,7 +39,7 @@ clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak .depend
rm -f $(LIB) core *.bak $(obj).depend
#########################################################################

View File

@@ -50,7 +50,7 @@ int checkboard (void)
return 0;
}
long int initdram (int board_type)
phys_size_t initdram (int board_type)
{
return (0);
}

View File

@@ -39,7 +39,7 @@ clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak .depend
rm -f $(LIB) core *.bak $(obj).depend
#########################################################################

View File

@@ -54,7 +54,7 @@ int checkboard (void)
return 0;
}
long int initdram (int board_type)
phys_size_t initdram (int board_type)
{
return (0);
}

View File

@@ -43,7 +43,7 @@ clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak .depend
rm -f $(LIB) core *.bak $(obj).depend
#########################################################################

View File

@@ -34,7 +34,7 @@ int checkboard (void)
return 0;
}
long int initdram (int board_type)
phys_size_t initdram (int board_type)
{
return (0);
}

View File

@@ -43,7 +43,7 @@ clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak .depend
rm -f $(LIB) core *.bak $(obj).depend
#########################################################################

View File

@@ -34,7 +34,7 @@ int checkboard (void)
return 0;
}
long int initdram (int board_type)
phys_size_t initdram (int board_type)
{
return (0);
}

View File

@@ -43,7 +43,7 @@ clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak .depend
rm -f $(LIB) core *.bak $(obj).depend
#########################################################################

View File

@@ -29,7 +29,7 @@ int checkboard (void)
return 0;
}
long int initdram (int board_type)
phys_size_t initdram (int board_type)
{
return (0);
}

View File

@@ -39,7 +39,7 @@ clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak .depend *~
rm -f $(LIB) core *.bak $(obj).depend
#########################################################################

View File

@@ -33,14 +33,6 @@
extern void board_pll_init_f(void);
/*
* sdram_init - Dummy implementation for start.S, spd_sdram used on this board!
*/
void sdram_init(void)
{
return;
}
#if !defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL)
static void cram_bcr_write(u32 wr_val)
{
@@ -67,7 +59,7 @@ static void cram_bcr_write(u32 wr_val)
}
#endif
long int initdram(int board_type)
phys_size_t initdram(int board_type)
{
#if defined(CONFIG_NAND_SPL)
u32 reg;
@@ -116,10 +108,3 @@ long int initdram(int board_type)
return (CFG_MBYTES_RAM << 20);
}
#ifndef CONFIG_NAND_SPL
int testdram(void)
{
return (0);
}
#endif

View File

@@ -39,7 +39,7 @@ clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak .depend
rm -f $(LIB) core *.bak $(obj).depend
#########################################################################

View File

@@ -453,7 +453,7 @@ int checkboard(void)
}
long int initdram (int board_type)
phys_size_t initdram (int board_type)
{
#if !(defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL))
long dram_size;
@@ -466,73 +466,6 @@ long int initdram (int board_type)
#endif
}
#if defined(CFG_DRAM_TEST)
int testdram(void)
{
unsigned long *mem = (unsigned long *)0;
const unsigned long kend = (1024 / sizeof(unsigned long));
unsigned long k, n, *p32, ctr;
const unsigned long bend = CFG_MBYTES_SDRAM * 1024 * 1024;
mtmsr(0);
for (k = 0; k < CFG_MBYTES_SDRAM*1024;
++k, mem += (1024 / sizeof(unsigned long))) {
if ((k & 1023) == 0) {
printf("%3d MB\r", k / 1024);
}
memset(mem, 0xaaaaaaaa, 1024);
for (n = 0; n < kend; ++n) {
if (mem[n] != 0xaaaaaaaa) {
printf("SDRAM test fails at: %08x\n",
(uint) & mem[n]);
return 1;
}
}
memset(mem, 0x55555555, 1024);
for (n = 0; n < kend; ++n) {
if (mem[n] != 0x55555555) {
printf("SDRAM test fails at: %08x\n",
(uint) & mem[n]);
return 1;
}
}
}
/*
* Perform a sequence test to ensure that all
* memory locations are uniquely addressable
*/
ctr = 0;
p32 = 0;
while ((unsigned long)p32 != bend) {
if (0 == ((unsigned long)p32 & ((1<<20)-1)))
printf("Writing %3d MB\r", (unsigned long)p32 >> 20);
*p32++ = ctr++;
}
ctr = 0;
p32 = 0;
while ((unsigned long)p32 != bend) {
if (0 == ((unsigned long)p32 & ((1<<20)-1)))
printf("Verifying %3d MB\r", (unsigned long)p32 >> 20);
if (*p32 != ctr) {
printf("SDRAM test fails at: %08x\n", p32);
return 1;
}
ctr++;
p32++;
}
printf("SDRAM test passes\n");
return 0;
}
#endif
/*************************************************************************
* pci_pre_init
*

View File

@@ -38,7 +38,7 @@ clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak .depend
rm -f $(LIB) core *.bak $(obj).depend
#########################################################################

View File

@@ -66,30 +66,14 @@ int checkboard(void)
return (0);
}
/*
* sdram_init - Dummy implementation for start.S, spd_sdram used on this board!
*/
void sdram_init(void)
{
return;
}
/* -------------------------------------------------------------------------
initdram(int board_type) reads EEPROM via I2c. EEPROM contains all of
the necessary info for SDRAM controller configuration
------------------------------------------------------------------------- */
long int initdram(int board_type)
phys_size_t initdram(int board_type)
{
long int ret;
ret = spd_sdram();
return ret;
}
int testdram(void)
{
/* TODO: XXX XXX XXX */
printf("test: xxx MB - ok\n");
return (0);
}

View File

@@ -40,7 +40,7 @@ clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak .depend
rm -f $(LIB) core *.bak $(obj).depend
#########################################################################

View File

@@ -22,6 +22,7 @@
#include <ppc440.h>
#include <libfdt.h>
#include <fdt_support.h>
#include <i2c.h>
#include <asm/processor.h>
#include <asm/io.h>
#include <asm/mmu.h>
@@ -205,50 +206,12 @@ u32 ddr_clktr(u32 default_val) {
* I2C SPD DIMM autodetection/calibration doesn't fit into the 4k of boot
* code.
*/
long int initdram(int board_type)
phys_size_t initdram(int board_type)
{
return CFG_MBYTES_SDRAM << 20;
}
#endif
#if defined(CFG_DRAM_TEST)
int testdram(void)
{
unsigned long *mem = (unsigned long *)0;
const unsigned long kend = (1024 / sizeof(unsigned long));
unsigned long k, n;
mtmsr(0);
for (k = 0; k < CFG_KBYTES_SDRAM;
++k, mem += (1024 / sizeof(unsigned long))) {
if ((k & 1023) == 0) {
printf("%3d MB\r", k / 1024);
}
memset(mem, 0xaaaaaaaa, 1024);
for (n = 0; n < kend; ++n) {
if (mem[n] != 0xaaaaaaaa) {
printf("SDRAM test fails at: %08x\n",
(uint) & mem[n]);
return 1;
}
}
memset(mem, 0x55555555, 1024);
for (n = 0; n < kend; ++n) {
if (mem[n] != 0x55555555) {
printf("SDRAM test fails at: %08x\n",
(uint) & mem[n]);
return 1;
}
}
}
printf("SDRAM test passes\n");
return 0;
}
#endif
/*
* pci_target_init
*
@@ -431,6 +394,7 @@ int misc_init_r(void)
u32 sdr0_srst1 = 0;
u32 eth_cfg;
u32 pvr = get_pvr();
u8 val;
/*
* Set EMAC mode/configuration (GMII, SGMII, RGMII...).
@@ -458,6 +422,15 @@ int misc_init_r(void)
sdr0_srst1 &= ~SDR0_SRST1_AHB;
mtsdr(SDR0_SRST1, sdr0_srst1);
/*
* RTC/M41T62:
* Disable square wave output: Batterie will be drained
* quickly, when this output is not disabled
*/
val = i2c_reg_read(CFG_I2C_RTC_ADDR, 0xa);
val &= ~0x40;
i2c_reg_write(CFG_I2C_RTC_ADDR, 0xa, val);
return 0;
}

View File

@@ -39,7 +39,7 @@ clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak .depend
rm -f $(LIB) core *.bak $(obj).depend
#########################################################################

View File

@@ -104,7 +104,7 @@ int checkboard(void)
return (0);
}
long int initdram(int board_type)
phys_size_t initdram(int board_type)
{
long dram_size = 0;
@@ -116,36 +116,6 @@ long int initdram(int board_type)
return dram_size;
}
#if defined(CFG_DRAM_TEST)
int testdram(void)
{
uint *pstart = (uint *) 0x00000000;
uint *pend = (uint *) 0x08000000;
uint *p;
for (p = pstart; p < pend; p++)
*p = 0xaaaaaaaa;
for (p = pstart; p < pend; p++) {
if (*p != 0xaaaaaaaa) {
printf("SDRAM test fails at: %08x\n", (uint) p);
return 1;
}
}
for (p = pstart; p < pend; p++)
*p = 0x55555555;
for (p = pstart; p < pend; p++) {
if (*p != 0x55555555) {
printf("SDRAM test fails at: %08x\n", (uint) p);
return 1;
}
}
return 0;
}
#endif
#if !defined(CONFIG_SPD_EEPROM)
/*************************************************************************
* fixed sdram init -- doesn't use serial presence detect.

View File

@@ -39,7 +39,7 @@ clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak .depend *~
rm -f $(LIB) core *.bak $(obj).depend
#########################################################################

View File

@@ -176,7 +176,7 @@ static int do_bootstrap(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
#endif
}
#ifdef DEBUG
printf(" pin strap0 to write in i2c = %x\n", data);
printf(" pin strap0 to write in i2c = %lx\n", data);
#endif /* DEBUG */
if (i2c_write(chip, 0, 1, (uchar *)&data, 4) != 0)
@@ -201,7 +201,7 @@ static int do_bootstrap(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
data |= 0x05A50000;
#ifdef DEBUG
printf(" pin strap1 to write in i2c = %x\n", data);
printf(" pin strap1 to write in i2c = %lx\n", data);
#endif /* DEBUG */
udelay(1000);

View File

@@ -258,36 +258,6 @@ u32 ddr_clktr(u32 default_val) {
return (SDRAM_CLKTR_CLKP_90_DEG_ADV);
}
#if defined(CFG_DRAM_TEST)
int testdram (void)
{
uint *pstart = (uint *) 0x00000000;
uint *pend = (uint *) 0x08000000;
uint *p;
for (p = pstart; p < pend; p++)
*p = 0xaaaaaaaa;
for (p = pstart; p < pend; p++) {
if (*p != 0xaaaaaaaa) {
printf ("SDRAM test fails at: %08x\n", (uint) p);
return 1;
}
}
for (p = pstart; p < pend; p++)
*p = 0x55555555;
for (p = pstart; p < pend; p++) {
if (*p != 0x55555555) {
printf ("SDRAM test fails at: %08x\n", (uint) p);
return 1;
}
}
return 0;
}
#endif
/*************************************************************************
* pci_pre_init
*
@@ -547,24 +517,3 @@ int post_hotkeys_pressed(void)
return (ctrlc());
}
#endif
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
void ft_board_setup(void *blob, bd_t *bd)
{
u32 val[4];
int rc;
ft_cpu_setup(blob, bd);
/* Fixup NOR mapping */
val[0] = 0; /* chip select number */
val[1] = 0; /* always 0 */
val[2] = gd->bd->bi_flashstart;
val[3] = gd->bd->bi_flashsize;
rc = fdt_find_and_setprop(blob, "/plb/opb/ebc", "ranges",
val, sizeof(val), 1);
if (rc)
printf("Unable to update property NOR mapping, err=%s\n",
fdt_strerror(rc));
}
#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */

View File

@@ -25,8 +25,7 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).a
COBJS = $(BOARD).o cmd_pll.o memory.o
SOBJS = init.o
COBJS = $(BOARD).o cmd_pll.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
@@ -38,7 +37,7 @@ clean:
rm -f $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak .depend *~
rm -f $(LIB) core *.bak $(obj).depend
#########################################################################

View File

@@ -1,154 +0,0 @@
/*
* (C) Copyright 2007-2008
* Stefan Roese, DENX Software Engineering, sr@denx.de.
*
* Based on code provided from UDTech and AMCC
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <config.h>
#include <ppc4xx.h>
#include <ppc_asm.tmpl>
#include <ppc_defs.h>
#define mtsdram_as(reg, value) \
addi r4,0,reg ; \
mtdcr memcfga,r4 ; \
addis r4,0,value@h ; \
ori r4,r4,value@l ; \
mtdcr memcfgd,r4 ;
.globl ext_bus_cntlr_init
ext_bus_cntlr_init:
#if !defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL)
/*
* DDR2 setup
*/
/* Following the DDR Core Manual, here is the initialization */
/* Step 1 */
/* Step 2 */
/* Step 3 */
/* base=00000000, size=256MByte (6), mode=7 (n*10*8) */
mtsdram_as(SDRAM_MB0CF, 0x00006701);
/* SET SDRAM_MB1CF - Not enabled */
mtsdram_as(SDRAM_MB1CF, 0x00000000);
/* SET SDRAM_MB2CF - Not enabled */
mtsdram_as(SDRAM_MB2CF, 0x00000000);
/* SET SDRAM_MB3CF - Not enabled */
mtsdram_as(SDRAM_MB3CF, 0x00000000);
/* SDRAM_CLKTR: Adv Addr clock by 180 deg */
mtsdram_as(SDRAM_CLKTR, 0x80000000);
/* Refresh Time register (0x30) Refresh every 7.8125uS */
mtsdram_as(SDRAM_RTR, 0x06180000);
/* SDRAM_SDTR1 */
mtsdram_as(SDRAM_SDTR1, 0x80201000);
/* SDRAM_SDTR2 */
mtsdram_as(SDRAM_SDTR2, 0x32204232);
/* SDRAM_SDTR3 */
mtsdram_as(SDRAM_SDTR3, 0x080b0d1a);
mtsdram_as(SDRAM_MMODE, 0x00000442);
mtsdram_as(SDRAM_MEMODE, 0x00000404);
/* SDRAM0_MCOPT1 (0X20) No ECC Gen */
mtsdram_as(SDRAM_MCOPT1, 0x04322000);
/* NOP */
mtsdram_as(SDRAM_INITPLR0, 0xa8380000);
/* precharge 3 DDR clock cycle */
mtsdram_as(SDRAM_INITPLR1, 0x81900400);
/* EMR2 twr = 2tck */
mtsdram_as(SDRAM_INITPLR2, 0x81020000);
/* EMR3 twr = 2tck */
mtsdram_as(SDRAM_INITPLR3, 0x81030000);
/* EMR DLL ENABLE twr = 2tck */
mtsdram_as(SDRAM_INITPLR4, 0x81010404);
/* MR w/ DLL reset
* Note: 5 is CL. May need to be changed
*/
mtsdram_as(SDRAM_INITPLR5, 0x81000542);
/* precharge 3 DDR clock cycle */
mtsdram_as(SDRAM_INITPLR6, 0x81900400);
/* Auto-refresh trfc = 26tck */
mtsdram_as(SDRAM_INITPLR7, 0x8D080000);
/* Auto-refresh trfc = 26tck */
mtsdram_as(SDRAM_INITPLR8, 0x8D080000);
/* Auto-refresh */
mtsdram_as(SDRAM_INITPLR9, 0x8D080000);
/* Auto-refresh */
mtsdram_as(SDRAM_INITPLR10, 0x8D080000);
/* MRS - normal operation; wait 2 cycle (set wait to tMRD) */
mtsdram_as(SDRAM_INITPLR11, 0x81000442);
mtsdram_as(SDRAM_INITPLR12, 0x81010780);
mtsdram_as(SDRAM_INITPLR13, 0x81010400);
mtsdram_as(SDRAM_INITPLR14, 0x00000000);
mtsdram_as(SDRAM_INITPLR15, 0x00000000);
/* SET MCIF0_CODT Die Termination On */
mtsdram_as(SDRAM_CODT, 0x0080f837);
mtsdram_as(SDRAM_MODT0, 0x01800000);
mtsdram_as(SDRAM_MODT1, 0x00000000);
mtsdram_as(SDRAM_WRDTR, 0x00000000);
/* SDRAM0_MCOPT2 (0X21) Start initialization */
mtsdram_as(SDRAM_MCOPT2, 0x20000000);
/* Step 5 */
lis r3,0x1 /* 400000 = wait 100ms */
mtctr r3
pll_wait:
bdnz pll_wait
/* Step 6 */
/* SDRAM_DLCR */
mtsdram_as(SDRAM_DLCR, 0x030000a5);
/* SDRAM_RDCC */
mtsdram_as(SDRAM_RDCC, 0x40000000);
/* SDRAM_RQDC */
mtsdram_as(SDRAM_RQDC, 0x80000038);
/* SDRAM_RFDC */
mtsdram_as(SDRAM_RFDC, 0x00000209);
/* Enable memory controller */
mtsdram_as(SDRAM_MCOPT2, 0x28000000);
#endif /* #ifndef CONFIG_NAND_U_BOOT */
blr

View File

@@ -374,24 +374,3 @@ int post_hotkeys_pressed(void)
return 0; /* No hotkeys supported */
}
#endif /* CONFIG_POST */
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
void ft_board_setup(void *blob, bd_t *bd)
{
u32 val[4];
int rc;
ft_cpu_setup(blob, bd);
/* Fixup NOR mapping */
val[0] = 0; /* chip select number */
val[1] = 0; /* always 0 */
val[2] = gd->bd->bi_flashstart;
val[3] = gd->bd->bi_flashsize;
rc = fdt_find_and_setprop(blob, "/plb/opb/ebc", "ranges",
val, sizeof(val), 1);
if (rc)
printf("Unable to update property NOR mapping, err=%s\n",
fdt_strerror(rc));
}
#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */

View File

@@ -1,79 +0,0 @@
/*
* (C) Copyright 2007
* Stefan Roese, DENX Software Engineering, sr@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <asm/processor.h>
#include <i2c.h>
void sdram_init(void)
{
return;
}
long int initdram(int board_type)
{
return (CFG_MBYTES_SDRAM << 20);
}
#if defined(CFG_DRAM_TEST)
int testdram (void)
{
printf ("testdram\n");
#if defined (CONFIG_NAND_U_BOOT)
return 0;
#endif
uint *pstart = (uint *) 0x00000000;
uint *pend = (uint *) 0x00001000;
uint *p;
for (p = pstart; p < pend; p++) {
*p = 0xaaaaaaaa;
}
for (p = pstart; p < pend; p++) {
if (*p != 0xaaaaaaaa) {
#if !defined (CONFIG_NAND_SPL)
printf ("SDRAM test fails at: %08x\n", (uint) p);
#endif
return 1;
}
}
for (p = pstart; p < pend; p++) {
*p = 0x55555555;
}
for (p = pstart; p < pend; p++) {
if (*p != 0x55555555) {
#if !defined (CONFIG_NAND_SPL)
printf ("SDRAM test fails at: %08x\n", (uint) p);
#endif
return 1;
}
}
#if !defined (CONFIG_NAND_SPL)
printf ("SDRAM test passed!!!\n");
#endif
return 0;
}
#endif

View File

@@ -39,7 +39,7 @@ clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak .depend
rm -f $(LIB) core *.bak $(obj).depend
#########################################################################

View File

@@ -125,50 +125,6 @@ u32 ddr_clktr(u32 default_val) {
return (SDRAM_CLKTR_CLKP_180_DEG_ADV);
}
/*************************************************************************
* int testdram()
*
************************************************************************/
#if defined(CFG_DRAM_TEST)
int testdram(void)
{
unsigned long *mem = (unsigned long *) 0;
const unsigned long kend = (1024 / sizeof(unsigned long));
unsigned long k, n;
mtmsr(0);
for (k = 0; k < CFG_KBYTES_SDRAM;
++k, mem += (1024 / sizeof(unsigned long))) {
if ((k & 1023) == 0) {
printf("%3d MB\r", k / 1024);
}
memset(mem, 0xaaaaaaaa, 1024);
for (n = 0; n < kend; ++n) {
if (mem[n] != 0xaaaaaaaa) {
printf("SDRAM test fails at: %08x\n",
(uint) & mem[n]);
return 1;
}
}
memset(mem, 0x55555555, 1024);
for (n = 0; n < kend; ++n) {
if (mem[n] != 0x55555555) {
printf("SDRAM test fails at: %08x\n",
(uint) & mem[n]);
return 1;
}
}
}
printf("SDRAM test passes\n");
return 0;
}
#endif
/*************************************************************************
* pci_pre_init
*

View File

@@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).a
COBJS = $(BOARD).o cmd_pll.o memory.o
COBJS = $(BOARD).o cmd_pll.o
SOBJS = init.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
@@ -38,7 +38,7 @@ clean:
rm -f $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak .depend *~
rm -f $(LIB) core *.bak $(obj).depend
#########################################################################

View File

@@ -1,8 +1,11 @@
/*
* Copyright (c) 2008 Nuovation System Designs, LLC
* Grant Erickson <gerickson@nuovations.com>
*
* (C) Copyright 2007-2008
* Stefan Roese, DENX Software Engineering, sr@denx.de.
*
* Based on code provided from Senao and AMCC
* Originally based on code provided from Senao and AMCC
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -23,126 +26,6 @@
* MA 02111-1307 USA
*/
#include <config.h>
#include <ppc4xx.h>
#include <ppc_asm.tmpl>
#include <ppc_defs.h>
#define mtsdram_as(reg, value) \
addi r4,0,reg ; \
mtdcr memcfga,r4 ; \
addis r4,0,value@h ; \
ori r4,r4,value@l ; \
mtdcr memcfgd,r4 ;
.globl ext_bus_cntlr_init
ext_bus_cntlr_init:
/*
* DDR2 setup
*/
/* Following the DDR Core Manual, here is the initialization */
/* Step 1 */
/* Step 2 */
/* Step 3 */
/* base=00000000, size=128MByte (5), mode=2 (n*10*4) */
mtsdram_as(SDRAM_MB0CF, 0x00005201);
/* base=08000000, size=128MByte (5), mode=2 (n*10*4) */
mtsdram_as(SDRAM_MB1CF, (0x08000000 >> 3) | 0x5201);
/* SDRAM_CLKTR: Adv Addr clock by 180 deg */
mtsdram_as(SDRAM_CLKTR,0x80000000);
/* Refresh Time register (0x30) Refresh every 7.8125uS */
mtsdram_as(SDRAM_RTR, 0x06180000);
/* SDRAM_SDTR1 */
mtsdram_as(SDRAM_SDTR1, 0x80201000);
/* SDRAM_SDTR2 */
mtsdram_as(SDRAM_SDTR2, 0x32204232);
/* SDRAM_SDTR3 */
mtsdram_as(SDRAM_SDTR3, 0x080b0d1a);
mtsdram_as(SDRAM_MMODE, 0x00000442);
mtsdram_as(SDRAM_MEMODE, 0x00000404);
/* SDRAM0_MCOPT1 (0X20) No ECC Gen */
mtsdram_as(SDRAM_MCOPT1, 0x04322000);
/* NOP */
mtsdram_as(SDRAM_INITPLR0, 0xa8380000);
/* precharge 3 DDR clock cycle */
mtsdram_as(SDRAM_INITPLR1, 0x81900400);
/* EMR2 twr = 2tck */
mtsdram_as(SDRAM_INITPLR2, 0x81020000);
/* EMR3 twr = 2tck */
mtsdram_as(SDRAM_INITPLR3, 0x81030000);
/* EMR DLL ENABLE twr = 2tck */
mtsdram_as(SDRAM_INITPLR4, 0x81010404);
/* MR w/ DLL reset
* Note: 5 is CL. May need to be changed
*/
mtsdram_as(SDRAM_INITPLR5, 0x81000542);
/* precharge 3 DDR clock cycle */
mtsdram_as(SDRAM_INITPLR6, 0x81900400);
/* Auto-refresh trfc = 26tck */
mtsdram_as(SDRAM_INITPLR7, 0x8D080000);
/* Auto-refresh trfc = 26tck */
mtsdram_as(SDRAM_INITPLR8, 0x8D080000);
/* Auto-refresh */
mtsdram_as(SDRAM_INITPLR9, 0x8D080000);
/* Auto-refresh */
mtsdram_as(SDRAM_INITPLR10, 0x8D080000);
/* MRS - normal operation; wait 2 cycle (set wait to tMRD) */
mtsdram_as(SDRAM_INITPLR11, 0x81000442);
mtsdram_as(SDRAM_INITPLR12, 0x81010780);
mtsdram_as(SDRAM_INITPLR13, 0x81010400);
mtsdram_as(SDRAM_INITPLR14, 0x00000000);
mtsdram_as(SDRAM_INITPLR15, 0x00000000);
/* SET MCIF0_CODT Die Termination On */
mtsdram_as(SDRAM_CODT, 0x0080f837);
mtsdram_as(SDRAM_MODT0, 0x01800000);
#if 0 /* test-only: not sure if 0 is ok when 2nd bank is used */
mtsdram_as(SDRAM_MODT1, 0x00000000);
#endif
mtsdram_as(SDRAM_WRDTR, 0x00000000);
/* SDRAM0_MCOPT2 (0X21) Start initialization */
mtsdram_as(SDRAM_MCOPT2, 0x20000000);
/* Step 5 */
lis r3,0x1 /* 400000 = wait 100ms */
mtctr r3
pll_wait:
bdnz pll_wait
/* Step 6 */
/* SDRAM_DLCR */
mtsdram_as(SDRAM_DLCR, 0x030000a5);
/* SDRAM_RDCC */
mtsdram_as(SDRAM_RDCC, 0x40000000);
/* SDRAM_RQDC */
mtsdram_as(SDRAM_RQDC, 0x80000038);
/* SDRAM_RFDC */
mtsdram_as(SDRAM_RFDC, 0x00000209);
/* Enable memory controller */
mtsdram_as(SDRAM_MCOPT2, 0x28000000);
blr

View File

@@ -330,24 +330,3 @@ int post_hotkeys_pressed(void)
return 0; /* No hotkeys supported */
}
#endif /* CONFIG_POST */
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
void ft_board_setup(void *blob, bd_t *bd)
{
u32 val[4];
int rc;
ft_cpu_setup(blob, bd);
/* Fixup NOR mapping */
val[0] = 0; /* chip select number */
val[1] = 0; /* always 0 */
val[2] = gd->bd->bi_flashstart;
val[3] = gd->bd->bi_flashsize;
rc = fdt_find_and_setprop(blob, "/plb/opb/ebc", "ranges",
val, sizeof(val), 1);
if (rc)
printf("Unable to update property NOR mapping, err=%s\n",
fdt_strerror(rc));
}
#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */

View File

@@ -1,188 +0,0 @@
/*
* (C) Copyright 2007
* Stefan Roese, DENX Software Engineering, sr@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <asm/processor.h>
void sdram_init(void)
{
return;
}
long int initdram(int board_type)
{
/*
* Same as on Kilauea, Makalu generates exception 0x200
* (machine check) after trap_init() in board_init_f,
* when SDRAM is initialized here (late) and d-cache is
* used earlier as INIT_RAM.
* So for now, initialize DDR2 in init.S very early and
* also use it for INIT_RAM. Then this exception doesn't
* occur.
*/
#if 0
u32 val;
/* base=00000000, size=128MByte (5), mode=2 (n*10*4) */
mtsdram(SDRAM_MB0CF, 0x00005201);
/* SET SDRAM_MB1CF - Not enabled */
mtsdram(SDRAM_MB1CF, 0x00000000);
/* SET SDRAM_MB2CF - Not enabled */
mtsdram(SDRAM_MB2CF, 0x00000000);
/* SET SDRAM_MB3CF - Not enabled */
mtsdram(SDRAM_MB3CF, 0x00000000);
/* SDRAM_CLKTR: Adv Addr clock by 90 deg */
mtsdram(SDRAM_CLKTR, 0x80000000);
/* Refresh Time register (0x30) Refresh every 7.8125uS */
mtsdram(SDRAM_RTR, 0x06180000);
/* SDRAM_SDTR1 */
mtsdram(SDRAM_SDTR1, 0x80201000);
/* SDRAM_SDTR2 */
mtsdram(SDRAM_SDTR2, 0x32204232);
/* SDRAM_SDTR3 */
mtsdram(SDRAM_SDTR3, 0x080b0d1a);
mtsdram(SDRAM_MMODE, 0x00000442);
mtsdram(SDRAM_MEMODE, 0x00000404);
/* SDRAM0_MCOPT1 (0X20) No ECC Gen */
mtsdram(SDRAM_MCOPT1, 0x04322000);
/* NOP */
mtsdram(SDRAM_INITPLR0, 0xa8380000);
/* precharge 3 DDR clock cycle */
mtsdram(SDRAM_INITPLR1, 0x81900400);
/* EMR2 twr = 2tck */
mtsdram(SDRAM_INITPLR2, 0x81020000);
/* EMR3 twr = 2tck */
mtsdram(SDRAM_INITPLR3, 0x81030000);
/* EMR DLL ENABLE twr = 2tck */
mtsdram(SDRAM_INITPLR4, 0x81010404);
/* MR w/ DLL reset
* Note: 5 is CL. May need to be changed
*/
mtsdram(SDRAM_INITPLR5, 0x81000542);
/* precharge 3 DDR clock cycle */
mtsdram(SDRAM_INITPLR6, 0x81900400);
/* Auto-refresh trfc = 26tck */
mtsdram(SDRAM_INITPLR7, 0x8D080000);
/* Auto-refresh trfc = 26tck */
mtsdram(SDRAM_INITPLR8, 0x8D080000);
/* Auto-refresh */
mtsdram(SDRAM_INITPLR9, 0x8D080000);
/* Auto-refresh */
mtsdram(SDRAM_INITPLR10, 0x8D080000);
/* MRS - normal operation; wait 2 cycle (set wait to tMRD) */
mtsdram(SDRAM_INITPLR11, 0x81000442);
mtsdram(SDRAM_INITPLR12, 0x81010780);
mtsdram(SDRAM_INITPLR13, 0x81010400);
mtsdram(SDRAM_INITPLR14, 0x00000000);
mtsdram(SDRAM_INITPLR15, 0x00000000);
/* SET MCIF0_CODT Die Termination On */
mtsdram(SDRAM_CODT, 0x0080f837);
mtsdram(SDRAM_MODT0, 0x01800000);
mtsdram(SDRAM_MODT1, 0x00000000);
mtsdram(SDRAM_WRDTR, 0x00000000);
/* SDRAM0_MCOPT2 (0X21) Start initialization */
mtsdram(SDRAM_MCOPT2, 0x20000000);
/* Step 5 */
do {
mfsdram(SDRAM_MCSTAT, val);
} while ((val & SDRAM_MCSTAT_MIC_COMP) != SDRAM_MCSTAT_MIC_COMP);
/* Step 6 */
/* SDRAM_DLCR */
mtsdram(SDRAM_DLCR, 0x030000a5);
/* SDRAM_RDCC */
mtsdram(SDRAM_RDCC, 0x40000000);
/* SDRAM_RQDC */
mtsdram(SDRAM_RQDC, 0x80000038);
/* SDRAM_RFDC */
mtsdram(SDRAM_RFDC, 0x00000209);
/* Enable memory controller */
mfsdram(SDRAM_MCOPT2, val);
val |= SDRAM_MCOPT2_DCEN_ENABLE;
mtsdram(SDRAM_MCOPT2, val);
#endif
return (CFG_MBYTES_SDRAM << 20);
}
#if defined(CFG_DRAM_TEST)
int testdram (void)
{
printf ("testdram\n");
#if defined (CONFIG_NAND_U_BOOT)
return 0;
#endif
uint *pstart = (uint *) 0x00000000;
uint *pend = (uint *) 0x00001000;
uint *p;
for (p = pstart; p < pend; p++) {
*p = 0xaaaaaaaa;
}
for (p = pstart; p < pend; p++) {
if (*p != 0xaaaaaaaa) {
#if !defined (CONFIG_NAND_SPL)
printf ("SDRAM test fails at: %08x\n", (uint) p);
#endif
return 1;
}
}
for (p = pstart; p < pend; p++) {
*p = 0x55555555;
}
for (p = pstart; p < pend; p++) {
if (*p != 0x55555555) {
#if !defined (CONFIG_NAND_SPL)
printf ("SDRAM test fails at: %08x\n", (uint) p);
#endif
return 1;
}
}
#if !defined (CONFIG_NAND_SPL)
printf ("SDRAM test passed!!!\n");
#endif
return 0;
}
#endif

View File

@@ -39,7 +39,7 @@ clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak .depend *~
rm -f $(LIB) core *.bak $(obj).depend
#########################################################################

View File

@@ -201,7 +201,7 @@ int checkboard (void)
}
long int initdram (int board_type)
phys_size_t initdram (int board_type)
{
long dram_size = 0;
@@ -214,36 +214,6 @@ long int initdram (int board_type)
}
#if defined(CFG_DRAM_TEST)
int testdram (void)
{
uint *pstart = (uint *) 0x00000000;
uint *pend = (uint *) 0x08000000;
uint *p;
for (p = pstart; p < pend; p++)
*p = 0xaaaaaaaa;
for (p = pstart; p < pend; p++) {
if (*p != 0xaaaaaaaa) {
printf ("SDRAM test fails at: %08x\n", (uint) p);
return 1;
}
}
for (p = pstart; p < pend; p++)
*p = 0x55555555;
for (p = pstart; p < pend; p++) {
if (*p != 0x55555555) {
printf ("SDRAM test fails at: %08x\n", (uint) p);
return 1;
}
}
return 0;
}
#endif
#if !defined(CONFIG_SPD_EEPROM)
/*************************************************************************
* fixed sdram init -- doesn't use serial presence detect.

View File

@@ -39,7 +39,7 @@ clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak .depend
rm -f $(LIB) core *.bak $(obj).depend
#########################################################################

View File

@@ -28,6 +28,10 @@ sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
ifndef TEXT_BASE
TEXT_BASE = 0xFFFA0000
#
# When defining CONFIG_VIDEO, TEXT_BASE needs to be 0xFFF80000
# TEXT_BASE = 0xFFF80000
#
endif
PLATFORM_CPPFLAGS += -DCONFIG_440=1

View File

@@ -52,7 +52,7 @@ extern void denali_core_search_data_eye(void);
* initdram -- 440EPx's DDR controller is a DENALI Core
*
************************************************************************/
long int initdram (int board_type)
phys_size_t initdram (int board_type)
{
#if !defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL)
#if !defined(CONFIG_NAND_SPL)

View File

@@ -93,6 +93,11 @@ int board_early_init_f(void)
#ifdef CONFIG_I2C_MULTI_BUS
sdr0_pfc1 |= ((sdr0_pfc1 & ~SDR0_PFC1_SIS_MASK) | SDR0_PFC1_SIS_IIC1_SEL);
#endif
/* Two UARTs, so we need 4-pin mode. Also, we want CTS/RTS mode. */
sdr0_pfc1 = (sdr0_pfc1 & ~SDR0_PFC1_U0IM_MASK) | SDR0_PFC1_U0IM_4PINS;
sdr0_pfc1 = (sdr0_pfc1 & ~SDR0_PFC1_U0ME_MASK) | SDR0_PFC1_U0ME_CTS_RTS;
sdr0_pfc1 = (sdr0_pfc1 & ~SDR0_PFC1_U1ME_MASK) | SDR0_PFC1_U1ME_CTS_RTS;
mfsdr(SDR0_PFC2, sdr0_pfc2);
sdr0_pfc2 = (sdr0_pfc2 & ~SDR0_PFC2_SELECT_MASK) |
SDR0_PFC2_SELECT_CONFIG_4;
@@ -329,44 +334,6 @@ int checkboard(void)
return (0);
}
#if defined(CFG_DRAM_TEST)
int testdram(void)
{
unsigned long *mem = (unsigned long *)0;
const unsigned long kend = (1024 / sizeof(unsigned long));
unsigned long k, n;
mtmsr(0);
for (k = 0; k < CFG_MBYTES_SDRAM;
++k, mem += (1024 / sizeof(unsigned long))) {
if ((k & 1023) == 0) {
printf("%3d MB\r", k / 1024);
}
memset(mem, 0xaaaaaaaa, 1024);
for (n = 0; n < kend; ++n) {
if (mem[n] != 0xaaaaaaaa) {
printf("SDRAM test fails at: %08x\n",
(uint) & mem[n]);
return 1;
}
}
memset(mem, 0x55555555, 1024);
for (n = 0; n < kend; ++n) {
if (mem[n] != 0x55555555) {
printf("SDRAM test fails at: %08x\n",
(uint) & mem[n]);
return 1;
}
}
}
printf("SDRAM test passes\n");
return 0;
}
#endif
#if defined(CONFIG_PCI) && defined(CONFIG_PCI_PNP)
/*
* Assign interrupts to PCI devices.
@@ -547,24 +514,3 @@ int post_hotkeys_pressed(void)
return 0; /* No hotkeys supported */
}
#endif /* CONFIG_POST */
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
void ft_board_setup(void *blob, bd_t *bd)
{
u32 val[4];
int rc;
ft_cpu_setup(blob, bd);
/* Fixup NOR mapping */
val[0] = 0; /* chip select number */
val[1] = 0; /* always 0 */
val[2] = gd->bd->bi_flashstart;
val[3] = gd->bd->bi_flashsize;
rc = fdt_find_and_setprop(blob, "/plb/opb/ebc", "ranges",
val, sizeof(val), 1);
if (rc)
printf("Unable to update property NOR mapping, err=%s\n",
fdt_strerror(rc));
}
#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */

View File

@@ -37,7 +37,7 @@ clean:
rm -f $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak .depend
rm -f $(LIB) core *.bak $(obj).depend
#########################################################################

View File

@@ -78,10 +78,10 @@ int checkboard(void)
}
/*************************************************************************
* long int initdram
* phys_size_t initdram
*
************************************************************************/
long int initdram(int board)
phys_size_t initdram(int board)
{
return CFG_SDRAM_SIZE_PER_BANK * CFG_SDRAM_BANKS; /* 128Mbytes */
}
@@ -165,16 +165,20 @@ unsigned char spi_read(void)
return (unsigned char)gpio_read_in_bit(SPI_DIN_GPIO15);
}
void taihu_spi_chipsel(int cs)
int spi_cs_is_valid(unsigned int bus, unsigned int cs)
{
gpio_write_bit(SPI_CS_GPIO0, cs);
return bus == 0 && cs == 0;
}
spi_chipsel_type spi_chipsel[]= {
taihu_spi_chipsel
};
void spi_cs_activate(struct spi_slave *slave)
{
gpio_write_bit(SPI_CS_GPIO0, 1);
}
int spi_chipsel_cnt = sizeof(spi_chipsel) / sizeof(spi_chipsel[0]);
void spi_cs_deactivate(struct spi_slave *slave)
{
gpio_write_bit(SPI_CS_GPIO0, 0);
}
#ifdef CONFIG_PCI
static unsigned char int_lines[32] = {
@@ -196,45 +200,3 @@ int pci_pre_init(struct pci_controller *hose)
return 1;
}
#endif /* CONFIG_PCI */
#ifdef CFG_DRAM_TEST
int testdram(void)
{
unsigned long *mem = (unsigned long *)0;
const unsigned long kend = (1024 / sizeof(unsigned long));
unsigned long k, n;
unsigned long msr;
unsigned long total_kbytes = CFG_SDRAM_SIZE_PER_BANK * CFG_SDRAM_BANKS / 1024;
msr = mfmsr();
mtmsr(msr & ~(MSR_EE));
for (k = 0; k < total_kbytes ;
++k, mem += (1024 / sizeof(unsigned long))) {
if ((k & 1023) == 0)
printf("%3d MB\r", k / 1024);
memset(mem, 0xaaaaaaaa, 1024);
for (n = 0; n < kend; ++n) {
if (mem[n] != 0xaaaaaaaa) {
printf("SDRAM test fails at: %08x\n",
(uint) & mem[n]);
return 1;
}
}
memset(mem, 0x55555555, 1024);
for (n = 0; n < kend; ++n) {
if (mem[n] != 0x55555555) {
printf("SDRAM test fails at: %08x\n",
(uint) & mem[n]);
return 1;
}
}
}
printf("SDRAM test passes\n");
mtmsr(msr);
return 0;
}
#endif /* CFG_DRAM_TEST */

View File

@@ -39,7 +39,7 @@ clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak .depend
rm -f $(LIB) core *.bak $(obj).depend
#########################################################################

View File

@@ -34,59 +34,59 @@ void show_reset_reg(void)
/* read clock regsiter */
printf("===== Display reset and initialize register Start =========\n");
mfcpr(clk_pllc,reg);
printf("cpr_pllc = %#010x\n",reg);
printf("cpr_pllc = %#010lx\n",reg);
mfcpr(clk_plld,reg);
printf("cpr_plld = %#010x\n",reg);
printf("cpr_plld = %#010lx\n",reg);
mfcpr(clk_primad,reg);
printf("cpr_primad = %#010x\n",reg);
printf("cpr_primad = %#010lx\n",reg);
mfcpr(clk_primbd,reg);
printf("cpr_primbd = %#010x\n",reg);
printf("cpr_primbd = %#010lx\n",reg);
mfcpr(clk_opbd,reg);
printf("cpr_opbd = %#010x\n",reg);
printf("cpr_opbd = %#010lx\n",reg);
mfcpr(clk_perd,reg);
printf("cpr_perd = %#010x\n",reg);
printf("cpr_perd = %#010lx\n",reg);
mfcpr(clk_mald,reg);
printf("cpr_mald = %#010x\n",reg);
printf("cpr_mald = %#010lx\n",reg);
/* read sdr register */
mfsdr(sdr_ebc,reg);
printf("sdr_ebc = %#010x\n",reg);
printf("sdr_ebc = %#010lx\n",reg);
mfsdr(sdr_cp440,reg);
printf("sdr_cp440 = %#010x\n",reg);
printf("sdr_cp440 = %#010lx\n",reg);
mfsdr(sdr_xcr,reg);
printf("sdr_xcr = %#010x\n",reg);
printf("sdr_xcr = %#010lx\n",reg);
mfsdr(sdr_xpllc,reg);
printf("sdr_xpllc = %#010x\n",reg);
printf("sdr_xpllc = %#010lx\n",reg);
mfsdr(sdr_xplld,reg);
printf("sdr_xplld = %#010x\n",reg);
printf("sdr_xplld = %#010lx\n",reg);
mfsdr(sdr_pfc0,reg);
printf("sdr_pfc0 = %#010x\n",reg);
printf("sdr_pfc0 = %#010lx\n",reg);
mfsdr(sdr_pfc1,reg);
printf("sdr_pfc1 = %#010x\n",reg);
printf("sdr_pfc1 = %#010lx\n",reg);
mfsdr(sdr_cust0,reg);
printf("sdr_cust0 = %#010x\n",reg);
printf("sdr_cust0 = %#010lx\n",reg);
mfsdr(sdr_cust1,reg);
printf("sdr_cust1 = %#010x\n",reg);
printf("sdr_cust1 = %#010lx\n",reg);
mfsdr(sdr_uart0,reg);
printf("sdr_uart0 = %#010x\n",reg);
printf("sdr_uart0 = %#010lx\n",reg);
mfsdr(sdr_uart1,reg);
printf("sdr_uart1 = %#010x\n",reg);
printf("sdr_uart1 = %#010lx\n",reg);
printf("===== Display reset and initialize register End =========\n");
}
@@ -97,13 +97,13 @@ void show_xbridge_info(void)
printf("PCI-X chip control registers\n");
mfsdr(sdr_xcr, reg);
printf("sdr_xcr = %#010x\n", reg);
printf("sdr_xcr = %#010lx\n", reg);
mfsdr(sdr_xpllc, reg);
printf("sdr_xpllc = %#010x\n", reg);
printf("sdr_xpllc = %#010lx\n", reg);
mfsdr(sdr_xplld, reg);
printf("sdr_xplld = %#010x\n", reg);
printf("sdr_xplld = %#010lx\n", reg);
printf("PCI-X Bridge Configure registers\n");
printf("PCIX0_VENDID = %#06x\n", in16r(PCIX0_VENDID));
@@ -116,49 +116,49 @@ void show_xbridge_info(void)
printf("PCIX0_HDTYPE = %#04x\n", in8(PCIX0_HDTYPE));
printf("PCIX0_BIST = %#04x\n", in8(PCIX0_BIST));
printf("PCIX0_BAR0 = %#010x\n", in32r(PCIX0_BAR0));
printf("PCIX0_BAR1 = %#010x\n", in32r(PCIX0_BAR1));
printf("PCIX0_BAR2 = %#010x\n", in32r(PCIX0_BAR2));
printf("PCIX0_BAR3 = %#010x\n", in32r(PCIX0_BAR3));
printf("PCIX0_BAR4 = %#010x\n", in32r(PCIX0_BAR4));
printf("PCIX0_BAR5 = %#010x\n", in32r(PCIX0_BAR5));
printf("PCIX0_BAR0 = %#010lx\n", in32r(PCIX0_BAR0));
printf("PCIX0_BAR1 = %#010lx\n", in32r(PCIX0_BAR1));
printf("PCIX0_BAR2 = %#010lx\n", in32r(PCIX0_BAR2));
printf("PCIX0_BAR3 = %#010lx\n", in32r(PCIX0_BAR3));
printf("PCIX0_BAR4 = %#010lx\n", in32r(PCIX0_BAR4));
printf("PCIX0_BAR5 = %#010lx\n", in32r(PCIX0_BAR5));
printf("PCIX0_CISPTR = %#010x\n", in32r(PCIX0_CISPTR));
printf("PCIX0_CISPTR = %#010lx\n", in32r(PCIX0_CISPTR));
printf("PCIX0_SBSSYSVID = %#010x\n", in16r(PCIX0_SBSYSVID));
printf("PCIX0_SBSSYSID = %#010x\n", in16r(PCIX0_SBSYSID));
printf("PCIX0_EROMBA = %#010x\n", in32r(PCIX0_EROMBA));
printf("PCIX0_EROMBA = %#010lx\n", in32r(PCIX0_EROMBA));
printf("PCIX0_CAP = %#04x\n", in8(PCIX0_CAP));
printf("PCIX0_INTLN = %#04x\n", in8(PCIX0_INTLN));
printf("PCIX0_INTPN = %#04x\n", in8(PCIX0_INTPN));
printf("PCIX0_MINGNT = %#04x\n", in8(PCIX0_MINGNT));
printf("PCIX0_MAXLTNCY = %#04x\n", in8(PCIX0_MAXLTNCY));
printf("PCIX0_BRDGOPT1 = %#010x\n", in32r(PCIX0_BRDGOPT1));
printf("PCIX0_BRDGOPT2 = %#010x\n", in32r(PCIX0_BRDGOPT2));
printf("PCIX0_BRDGOPT1 = %#010lx\n", in32r(PCIX0_BRDGOPT1));
printf("PCIX0_BRDGOPT2 = %#010lx\n", in32r(PCIX0_BRDGOPT2));
printf("PCIX0_POM0LAL = %#010x\n", in32r(PCIX0_POM0LAL));
printf("PCIX0_POM0LAH = %#010x\n", in32r(PCIX0_POM0LAH));
printf("PCIX0_POM0SA = %#010x\n", in32r(PCIX0_POM0SA));
printf("PCIX0_POM0PCILAL = %#010x\n", in32r(PCIX0_POM0PCIAL));
printf("PCIX0_POM0PCILAH = %#010x\n", in32r(PCIX0_POM0PCIAH));
printf("PCIX0_POM1LAL = %#010x\n", in32r(PCIX0_POM1LAL));
printf("PCIX0_POM1LAH = %#010x\n", in32r(PCIX0_POM1LAH));
printf("PCIX0_POM1SA = %#010x\n", in32r(PCIX0_POM1SA));
printf("PCIX0_POM1PCILAL = %#010x\n", in32r(PCIX0_POM1PCIAL));
printf("PCIX0_POM1PCILAH = %#010x\n", in32r(PCIX0_POM1PCIAH));
printf("PCIX0_POM2SA = %#010x\n", in32r(PCIX0_POM2SA));
printf("PCIX0_POM0LAL = %#010lx\n", in32r(PCIX0_POM0LAL));
printf("PCIX0_POM0LAH = %#010lx\n", in32r(PCIX0_POM0LAH));
printf("PCIX0_POM0SA = %#010lx\n", in32r(PCIX0_POM0SA));
printf("PCIX0_POM0PCILAL = %#010lx\n", in32r(PCIX0_POM0PCIAL));
printf("PCIX0_POM0PCILAH = %#010lx\n", in32r(PCIX0_POM0PCIAH));
printf("PCIX0_POM1LAL = %#010lx\n", in32r(PCIX0_POM1LAL));
printf("PCIX0_POM1LAH = %#010lx\n", in32r(PCIX0_POM1LAH));
printf("PCIX0_POM1SA = %#010lx\n", in32r(PCIX0_POM1SA));
printf("PCIX0_POM1PCILAL = %#010lx\n", in32r(PCIX0_POM1PCIAL));
printf("PCIX0_POM1PCILAH = %#010lx\n", in32r(PCIX0_POM1PCIAH));
printf("PCIX0_POM2SA = %#010lx\n", in32r(PCIX0_POM2SA));
printf("PCIX0_PIM0SA = %#010x\n", in32r(PCIX0_PIM0SA));
printf("PCIX0_PIM0LAL = %#010x\n", in32r(PCIX0_PIM0LAL));
printf("PCIX0_PIM0LAH = %#010x\n", in32r(PCIX0_PIM0LAH));
printf("PCIX0_PIM1SA = %#010x\n", in32r(PCIX0_PIM1SA));
printf("PCIX0_PIM1LAL = %#010x\n", in32r(PCIX0_PIM1LAL));
printf("PCIX0_PIM1LAH = %#010x\n", in32r(PCIX0_PIM1LAH));
printf("PCIX0_PIM2SA = %#010x\n", in32r(PCIX0_PIM1SA));
printf("PCIX0_PIM2LAL = %#010x\n", in32r(PCIX0_PIM1LAL));
printf("PCIX0_PIM2LAH = %#010x\n", in32r(PCIX0_PIM1LAH));
printf("PCIX0_PIM0SA = %#010lx\n", in32r(PCIX0_PIM0SA));
printf("PCIX0_PIM0LAL = %#010lx\n", in32r(PCIX0_PIM0LAL));
printf("PCIX0_PIM0LAH = %#010lx\n", in32r(PCIX0_PIM0LAH));
printf("PCIX0_PIM1SA = %#010lx\n", in32r(PCIX0_PIM1SA));
printf("PCIX0_PIM1LAL = %#010lx\n", in32r(PCIX0_PIM1LAL));
printf("PCIX0_PIM1LAH = %#010lx\n", in32r(PCIX0_PIM1LAH));
printf("PCIX0_PIM2SA = %#010lx\n", in32r(PCIX0_PIM1SA));
printf("PCIX0_PIM2LAL = %#010lx\n", in32r(PCIX0_PIM1LAL));
printf("PCIX0_PIM2LAH = %#010lx\n", in32r(PCIX0_PIM1LAH));
printf("PCIX0_XSTS = %#010x\n", in32r(PCIX0_STS));
printf("PCIX0_XSTS = %#010lx\n", in32r(PCIX0_STS));
}
int do_show_xbridge_info(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])

View File

@@ -196,36 +196,6 @@ int checkboard (void)
return (0);
}
#if defined(CFG_DRAM_TEST)
int testdram (void)
{
uint *pstart = (uint *) 0x04000000;
uint *pend = (uint *) 0x0fc00000;
uint *p;
for (p = pstart; p < pend; p++)
*p = 0xaaaaaaaa;
for (p = pstart; p < pend; p++) {
if (*p != 0xaaaaaaaa) {
printf ("SDRAM test fails at: %08x\n", (uint) p);
return 1;
}
}
for (p = pstart; p < pend; p++)
*p = 0x55555555;
for (p = pstart; p < pend; p++) {
if (*p != 0x55555555) {
printf ("SDRAM test fails at: %08x\n", (uint) p);
return 1;
}
}
return 0;
}
#endif
/*************************************************************************
* pci_pre_init
*

View File

@@ -38,7 +38,7 @@ clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak .depend
rm -f $(LIB) core *.bak $(obj).depend
#########################################################################

View File

@@ -85,27 +85,11 @@ int checkboard(void)
return (0);
}
/*
* sdram_init - Dummy implementation for start.S, spd_sdram used on this board!
*/
void sdram_init(void)
{
return;
}
/*
* initdram(int board_type) reads EEPROM via I2c. EEPROM contains all of
* the necessary info for SDRAM controller configuration
*/
long int initdram(int board_type)
phys_size_t initdram(int board_type)
{
return spd_sdram();
}
int testdram(void)
{
/* TODO: XXX XXX XXX */
printf("test: xxx MB - ok\n");
return (0);
}

View File

@@ -39,7 +39,7 @@ clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak .depend
rm -f $(LIB) core *.bak $(obj).depend
#########################################################################

View File

@@ -200,7 +200,7 @@ int checkboard(void)
}
/*************************************************************************
* sdram_init -- doesn't use serial presence detect.
* initdram -- doesn't use serial presence detect.
*
* Assumes: 256 MB, ECC, non-registered
* PLB @ 133 MHz
@@ -281,7 +281,7 @@ void sdram_tr1_set(int ram_address, int* tr1_value)
*tr1_value = (first_good + last_bad) / 2;
}
void sdram_init(void)
phys_size_t initdram(int board)
{
register uint reg;
int tr1_bank1, tr1_bank2;
@@ -328,56 +328,10 @@ void sdram_init(void)
sdram_tr1_set(0x00000000, &tr1_bank1);
sdram_tr1_set(0x08000000, &tr1_bank2);
mtsdram(mem_tr1, (((tr1_bank1+tr1_bank2)/2) | 0x80800800));
}
/*************************************************************************
* long int initdram
*
************************************************************************/
long int initdram(int board)
{
sdram_init();
return CFG_SDRAM_BANKS * (CFG_KBYTES_SDRAM * 1024); /* return bytes */
}
#if defined(CFG_DRAM_TEST)
int testdram(void)
{
unsigned long *mem = (unsigned long *)0;
const unsigned long kend = (1024 / sizeof(unsigned long));
unsigned long k, n;
mtmsr(0);
for (k = 0; k < CFG_KBYTES_SDRAM;
++k, mem += (1024 / sizeof(unsigned long))) {
if ((k & 1023) == 0) {
printf("%3d MB\r", k / 1024);
}
memset(mem, 0xaaaaaaaa, 1024);
for (n = 0; n < kend; ++n) {
if (mem[n] != 0xaaaaaaaa) {
printf("SDRAM test fails at: %08x\n",
(uint) & mem[n]);
return 1;
}
}
memset(mem, 0x55555555, 1024);
for (n = 0; n < kend; ++n) {
if (mem[n] != 0x55555555) {
printf("SDRAM test fails at: %08x\n",
(uint) & mem[n]);
return 1;
}
}
}
printf("SDRAM test passes\n");
return 0;
}
#endif
/*************************************************************************
* pci_pre_init
*
@@ -556,24 +510,3 @@ void board_reset(void)
/* give reset to BCSR */
*(unsigned char *)(CFG_BCSR_BASE | 0x06) = 0x09;
}
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
void ft_board_setup(void *blob, bd_t *bd)
{
u32 val[4];
int rc;
ft_cpu_setup(blob, bd);
/* Fixup NOR mapping */
val[0] = 0; /* chip select number */
val[1] = 0; /* always 0 */
val[2] = gd->bd->bi_flashstart;
val[3] = gd->bd->bi_flashsize;
rc = fdt_find_and_setprop(blob, "/plb/opb/ebc", "ranges",
val, sizeof(val), 1);
if (rc)
printf("Unable to update property NOR mapping, err=%s\n",
fdt_strerror(rc));
}
#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */

View File

@@ -39,7 +39,7 @@ clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak .depend *~
rm -f $(LIB) core *.bak $(obj).depend
#########################################################################

View File

@@ -586,36 +586,6 @@ u32 ddr_clktr(u32 default_val) {
return default_val;
}
#if defined(CFG_DRAM_TEST)
int testdram (void)
{
uint *pstart = (uint *) 0x00000000;
uint *pend = (uint *) 0x08000000;
uint *p;
for (p = pstart; p < pend; p++)
*p = 0xaaaaaaaa;
for (p = pstart; p < pend; p++) {
if (*p != 0xaaaaaaaa) {
printf ("SDRAM test fails at: %08x\n", (uint) p);
return 1;
}
}
for (p = pstart; p < pend; p++)
*p = 0x55555555;
for (p = pstart; p < pend; p++) {
if (*p != 0x55555555) {
printf ("SDRAM test fails at: %08x\n", (uint) p);
return 1;
}
}
return 0;
}
#endif
/*************************************************************************
* pci_pre_init
*

View File

@@ -39,7 +39,7 @@ clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak .depend
rm -f $(LIB) core *.bak $(obj).depend
#########################################################################

View File

@@ -133,7 +133,7 @@ int checkboard (void)
}
long int initdram (int board_type)
phys_size_t initdram (int board_type)
{
char *s = getenv ("dramsize");

View File

@@ -28,7 +28,3 @@
.globl ext_bus_cntlr_init
ext_bus_cntlr_init:
blr
.globl sdram_init
sdram_init:
blr

View File

@@ -19,9 +19,9 @@
*
*/
#include <common.h>
#include <asm/u-boot.h>
#include <asm/processor.h>
#include <common.h>
#include <command.h>
#include <config.h>

View File

@@ -39,7 +39,7 @@ clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak .depend
rm -f $(LIB) core *.bak $(obj).depend
#########################################################################

View File

@@ -153,10 +153,8 @@ void ether_init(void)
do {
__raw_writew(0x1, LAN_RESET_REGISTER);
udelay(100);
if (cnt == 0) {
printf("1. eth reset err\n");
if (cnt == 0)
goto eth_reset_err_out;
}
--cnt;
} while (__raw_readw(LAN_RESET_REGISTER) != 0x1);
@@ -165,10 +163,8 @@ void ether_init(void)
do {
__raw_writew(0x0, LAN_RESET_REGISTER);
udelay(100);
if (cnt == 0) {
printf("2. eth reset err\n");
if (cnt == 0)
goto eth_reset_err_out;
}
--cnt;
} while (__raw_readw(LAN_RESET_REGISTER) != 0x0000);
udelay(1000);

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