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|
|
567fb85217 | ||
|
|
73ccb3410a |
7
.gitignore
vendored
7
.gitignore
vendored
@@ -26,6 +26,8 @@
|
|||||||
/u-boot.ldr
|
/u-boot.ldr
|
||||||
/u-boot.ldr.hex
|
/u-boot.ldr.hex
|
||||||
/u-boot.ldr.srec
|
/u-boot.ldr.srec
|
||||||
|
/u-boot-onenand.bin
|
||||||
|
/u-boot-flexonenand.bin
|
||||||
|
|
||||||
#
|
#
|
||||||
# Generated files
|
# Generated files
|
||||||
@@ -46,3 +48,8 @@ series
|
|||||||
|
|
||||||
# cscope files
|
# cscope files
|
||||||
cscope.*
|
cscope.*
|
||||||
|
|
||||||
|
# OneNAND IPL files
|
||||||
|
/onenand_ipl/onenand-ipl*
|
||||||
|
/onenand_ipl/board/*/onenand*
|
||||||
|
/onenand_ipl/board/*/*.S
|
||||||
|
|||||||
9
CREDITS
9
CREDITS
@@ -424,6 +424,10 @@ N: Paolo Scaffardi
|
|||||||
E: arsenio@tin.it
|
E: arsenio@tin.it
|
||||||
D: FADS823 configuration, MPC823 video support, I2C, wireless keyboard, lots more
|
D: FADS823 configuration, MPC823 video support, I2C, wireless keyboard, lots more
|
||||||
|
|
||||||
|
N: Andre Schwarz
|
||||||
|
E: andre.schwarz@matrix-vision.de
|
||||||
|
D: Support for Matrix Vision boards (MVBLM7/MVBC_P)
|
||||||
|
|
||||||
N: Robert Schwebel
|
N: Robert Schwebel
|
||||||
E: r.schwebel@pengutronix.de
|
E: r.schwebel@pengutronix.de
|
||||||
D: Support for csb226, logodl and innokom boards (PXA2xx)
|
D: Support for csb226, logodl and innokom boards (PXA2xx)
|
||||||
@@ -533,3 +537,8 @@ N: Timo Tuunainen
|
|||||||
E: timo.tuunainen@sysart.fi
|
E: timo.tuunainen@sysart.fi
|
||||||
D: Support for Artila M-501 starter kit
|
D: Support for Artila M-501 starter kit
|
||||||
W: http://www.sysart.fi/
|
W: http://www.sysart.fi/
|
||||||
|
|
||||||
|
N: Philip Balister
|
||||||
|
E: philip@opensdr.com
|
||||||
|
D: Port to Lyrtech SFFSDR development board.
|
||||||
|
W: www.opensdr.com
|
||||||
|
|||||||
745
MAINTAINERS
745
MAINTAINERS
File diff suppressed because it is too large
Load Diff
42
MAKEALL
42
MAKEALL
@@ -48,6 +48,7 @@ LIST_5xxx=" \
|
|||||||
mecp5200 \
|
mecp5200 \
|
||||||
motionpro \
|
motionpro \
|
||||||
munices \
|
munices \
|
||||||
|
MVBC_P \
|
||||||
o2dnt \
|
o2dnt \
|
||||||
pf5200 \
|
pf5200 \
|
||||||
PM520 \
|
PM520 \
|
||||||
@@ -219,6 +220,7 @@ LIST_4xx=" \
|
|||||||
PMC405 \
|
PMC405 \
|
||||||
PMC440 \
|
PMC440 \
|
||||||
PPChameleonEVB \
|
PPChameleonEVB \
|
||||||
|
quad100hd \
|
||||||
rainier \
|
rainier \
|
||||||
sbc405 \
|
sbc405 \
|
||||||
sc3 \
|
sc3 \
|
||||||
@@ -330,6 +332,7 @@ LIST_83xx=" \
|
|||||||
MPC8360ERDK_66 \
|
MPC8360ERDK_66 \
|
||||||
MPC837XEMDS \
|
MPC837XEMDS \
|
||||||
MPC837XERDB \
|
MPC837XERDB \
|
||||||
|
MVBLM7 \
|
||||||
sbc8349 \
|
sbc8349 \
|
||||||
TQM834x \
|
TQM834x \
|
||||||
"
|
"
|
||||||
@@ -354,10 +357,12 @@ LIST_85xx=" \
|
|||||||
sbc8540 \
|
sbc8540 \
|
||||||
sbc8548 \
|
sbc8548 \
|
||||||
sbc8560 \
|
sbc8560 \
|
||||||
|
socrates \
|
||||||
stxgp3 \
|
stxgp3 \
|
||||||
stxssa \
|
stxssa \
|
||||||
TQM8540 \
|
TQM8540 \
|
||||||
TQM8541 \
|
TQM8541 \
|
||||||
|
TQM8548 \
|
||||||
TQM8555 \
|
TQM8555 \
|
||||||
TQM8560 \
|
TQM8560 \
|
||||||
"
|
"
|
||||||
@@ -457,10 +462,6 @@ LIST_ARM7=" \
|
|||||||
#########################################################################
|
#########################################################################
|
||||||
|
|
||||||
LIST_ARM9=" \
|
LIST_ARM9=" \
|
||||||
at91cap9adk \
|
|
||||||
at91rm9200dk \
|
|
||||||
at91sam9260ek \
|
|
||||||
cmc_pu2 \
|
|
||||||
ap920t \
|
ap920t \
|
||||||
ap922_XA10 \
|
ap922_XA10 \
|
||||||
ap926ejs \
|
ap926ejs \
|
||||||
@@ -471,11 +472,7 @@ LIST_ARM9=" \
|
|||||||
cp926ejs \
|
cp926ejs \
|
||||||
cp946es \
|
cp946es \
|
||||||
cp966 \
|
cp966 \
|
||||||
csb637 \
|
|
||||||
kb9202 \
|
|
||||||
lpd7a400 \
|
lpd7a400 \
|
||||||
m501sk \
|
|
||||||
mp2usb \
|
|
||||||
mx1ads \
|
mx1ads \
|
||||||
mx1fs2 \
|
mx1fs2 \
|
||||||
netstar \
|
netstar \
|
||||||
@@ -496,6 +493,7 @@ LIST_ARM9=" \
|
|||||||
voiceblue \
|
voiceblue \
|
||||||
davinci_dvevm \
|
davinci_dvevm \
|
||||||
davinci_schmoogie \
|
davinci_schmoogie \
|
||||||
|
davinci_sffsdr \
|
||||||
davinci_sonata \
|
davinci_sonata \
|
||||||
"
|
"
|
||||||
|
|
||||||
@@ -519,12 +517,29 @@ LIST_ARM11=" \
|
|||||||
mx31ads \
|
mx31ads \
|
||||||
"
|
"
|
||||||
|
|
||||||
|
#########################################################################
|
||||||
|
## AT91 Systems
|
||||||
|
#########################################################################
|
||||||
|
|
||||||
|
LIST_at91=" \
|
||||||
|
at91cap9adk \
|
||||||
|
at91rm9200dk \
|
||||||
|
at91sam9260ek \
|
||||||
|
at91sam9261ek \
|
||||||
|
at91sam9263ek \
|
||||||
|
at91sam9rlek \
|
||||||
|
cmc_pu2 \
|
||||||
|
csb637 \
|
||||||
|
kb9202 \
|
||||||
|
mp2usb \
|
||||||
|
m501sk \
|
||||||
|
"
|
||||||
|
|
||||||
#########################################################################
|
#########################################################################
|
||||||
## Xscale Systems
|
## Xscale Systems
|
||||||
#########################################################################
|
#########################################################################
|
||||||
|
|
||||||
LIST_pxa=" \
|
LIST_pxa=" \
|
||||||
adsvix \
|
|
||||||
cerf250 \
|
cerf250 \
|
||||||
cradle \
|
cradle \
|
||||||
csb226 \
|
csb226 \
|
||||||
@@ -561,6 +576,7 @@ LIST_arm=" \
|
|||||||
${LIST_ARM9} \
|
${LIST_ARM9} \
|
||||||
${LIST_ARM10} \
|
${LIST_ARM10} \
|
||||||
${LIST_ARM11} \
|
${LIST_ARM11} \
|
||||||
|
${LIST_at91} \
|
||||||
${LIST_pxa} \
|
${LIST_pxa} \
|
||||||
${LIST_ixp} \
|
${LIST_ixp} \
|
||||||
"
|
"
|
||||||
@@ -675,7 +691,7 @@ LIST_coldfire=" \
|
|||||||
M52277EVB \
|
M52277EVB \
|
||||||
M5235EVB \
|
M5235EVB \
|
||||||
M5249EVB \
|
M5249EVB \
|
||||||
M5253EVB \
|
M5253EVBE \
|
||||||
M5271EVB \
|
M5271EVB \
|
||||||
M5272C3 \
|
M5272C3 \
|
||||||
M5275EVB \
|
M5275EVB \
|
||||||
@@ -696,6 +712,7 @@ LIST_avr32=" \
|
|||||||
atstk1002 \
|
atstk1002 \
|
||||||
atstk1003 \
|
atstk1003 \
|
||||||
atstk1004 \
|
atstk1004 \
|
||||||
|
atstk1006 \
|
||||||
atngw100 \
|
atngw100 \
|
||||||
"
|
"
|
||||||
|
|
||||||
@@ -722,9 +739,10 @@ LIST_sh3=" \
|
|||||||
LIST_sh4=" \
|
LIST_sh4=" \
|
||||||
ms7750se \
|
ms7750se \
|
||||||
ms7722se \
|
ms7722se \
|
||||||
Migo-R \
|
MigoR \
|
||||||
r7780mp \
|
r7780mp \
|
||||||
r2dplus \
|
r2dplus \
|
||||||
|
sh7763rdp \
|
||||||
"
|
"
|
||||||
|
|
||||||
LIST_sh=" \
|
LIST_sh=" \
|
||||||
@@ -764,7 +782,7 @@ build_target() {
|
|||||||
for arg in $@
|
for arg in $@
|
||||||
do
|
do
|
||||||
case "$arg" in
|
case "$arg" in
|
||||||
arm|SA|ARM7|ARM9|ARM10|ARM11|ixp|pxa \
|
arm|SA|ARM7|ARM9|ARM10|ARM11|at91|ixp|pxa \
|
||||||
|avr32 \
|
|avr32 \
|
||||||
|blackfin \
|
|blackfin \
|
||||||
|coldfire \
|
|coldfire \
|
||||||
|
|||||||
295
Makefile
295
Makefile
@@ -23,7 +23,7 @@
|
|||||||
|
|
||||||
VERSION = 1
|
VERSION = 1
|
||||||
PATCHLEVEL = 3
|
PATCHLEVEL = 3
|
||||||
SUBLEVEL = 3
|
SUBLEVEL = 4
|
||||||
EXTRAVERSION =
|
EXTRAVERSION =
|
||||||
U_BOOT_VERSION = $(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)
|
U_BOOT_VERSION = $(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)
|
||||||
VERSION_FILE = $(obj)include/version_autogenerated.h
|
VERSION_FILE = $(obj)include/version_autogenerated.h
|
||||||
@@ -220,10 +220,12 @@ LIBS += drivers/hwmon/libhwmon.a
|
|||||||
LIBS += drivers/i2c/libi2c.a
|
LIBS += drivers/i2c/libi2c.a
|
||||||
LIBS += drivers/input/libinput.a
|
LIBS += drivers/input/libinput.a
|
||||||
LIBS += drivers/misc/libmisc.a
|
LIBS += drivers/misc/libmisc.a
|
||||||
|
LIBS += drivers/mmc/libmmc.a
|
||||||
LIBS += drivers/mtd/libmtd.a
|
LIBS += drivers/mtd/libmtd.a
|
||||||
LIBS += drivers/mtd/nand/libnand.a
|
LIBS += drivers/mtd/nand/libnand.a
|
||||||
LIBS += drivers/mtd/nand_legacy/libnand_legacy.a
|
LIBS += drivers/mtd/nand_legacy/libnand_legacy.a
|
||||||
LIBS += drivers/mtd/onenand/libonenand.a
|
LIBS += drivers/mtd/onenand/libonenand.a
|
||||||
|
LIBS += drivers/mtd/spi/libspi_flash.a
|
||||||
LIBS += drivers/net/libnet.a
|
LIBS += drivers/net/libnet.a
|
||||||
LIBS += drivers/net/sk98lin/libsk98lin.a
|
LIBS += drivers/net/sk98lin/libsk98lin.a
|
||||||
LIBS += drivers/pci/libpci.a
|
LIBS += drivers/pci/libpci.a
|
||||||
@@ -344,10 +346,9 @@ $(U_BOOT_NAND): $(NAND_SPL) $(obj)u-boot.bin $(obj)include/autoconf.mk
|
|||||||
cat $(obj)nand_spl/u-boot-spl-16k.bin $(obj)u-boot.bin > $(obj)u-boot-nand.bin
|
cat $(obj)nand_spl/u-boot-spl-16k.bin $(obj)u-boot.bin > $(obj)u-boot-nand.bin
|
||||||
|
|
||||||
$(ONENAND_IPL): $(VERSION_FILE) $(obj)include/autoconf.mk
|
$(ONENAND_IPL): $(VERSION_FILE) $(obj)include/autoconf.mk
|
||||||
$(MAKE) -C $(obj)onenand_ipl/board/$(BOARDDIR) all
|
$(MAKE) -C onenand_ipl/board/$(BOARDDIR) all
|
||||||
|
|
||||||
$(U_BOOT_ONENAND): $(ONENAND_IPL) $(obj)u-boot.bin $(obj)include/autoconf.mk
|
$(U_BOOT_ONENAND): $(ONENAND_IPL) $(obj)u-boot.bin $(obj)include/autoconf.mk
|
||||||
$(MAKE) -C $(obj)onenand_ipl/board/$(BOARDDIR) all
|
|
||||||
cat $(obj)onenand_ipl/onenand-ipl-2k.bin $(obj)u-boot.bin > $(obj)u-boot-onenand.bin
|
cat $(obj)onenand_ipl/onenand-ipl-2k.bin $(obj)u-boot.bin > $(obj)u-boot-onenand.bin
|
||||||
cat $(obj)onenand_ipl/onenand-ipl-4k.bin $(obj)u-boot.bin > $(obj)u-boot-flexonenand.bin
|
cat $(obj)onenand_ipl/onenand-ipl-4k.bin $(obj)u-boot.bin > $(obj)u-boot-flexonenand.bin
|
||||||
|
|
||||||
@@ -386,10 +387,12 @@ TAG_SUBDIRS += drivers/hwmon
|
|||||||
TAG_SUBDIRS += drivers/i2c
|
TAG_SUBDIRS += drivers/i2c
|
||||||
TAG_SUBDIRS += drivers/input
|
TAG_SUBDIRS += drivers/input
|
||||||
TAG_SUBDIRS += drivers/misc
|
TAG_SUBDIRS += drivers/misc
|
||||||
|
TAG_SUBDIRS += drivers/mmc
|
||||||
TAG_SUBDIRS += drivers/mtd
|
TAG_SUBDIRS += drivers/mtd
|
||||||
TAG_SUBDIRS += drivers/mtd/nand
|
TAG_SUBDIRS += drivers/mtd/nand
|
||||||
TAG_SUBDIRS += drivers/mtd/nand_legacy
|
TAG_SUBDIRS += drivers/mtd/nand_legacy
|
||||||
TAG_SUBDIRS += drivers/mtd/onenand
|
TAG_SUBDIRS += drivers/mtd/onenand
|
||||||
|
TAG_SUBDIRS += drivers/mtd/spi
|
||||||
TAG_SUBDIRS += drivers/net
|
TAG_SUBDIRS += drivers/net
|
||||||
TAG_SUBDIRS += drivers/net/sk98lin
|
TAG_SUBDIRS += drivers/net/sk98lin
|
||||||
TAG_SUBDIRS += drivers/pci
|
TAG_SUBDIRS += drivers/pci
|
||||||
@@ -484,11 +487,14 @@ PATI_config: unconfig
|
|||||||
#########################################################################
|
#########################################################################
|
||||||
|
|
||||||
aev_config: unconfig
|
aev_config: unconfig
|
||||||
@$(MKCONFIG) -a aev ppc mpc5xxx tqm5200
|
@$(MKCONFIG) -a aev ppc mpc5xxx tqm5200 tqc
|
||||||
|
|
||||||
BC3450_config: unconfig
|
BC3450_config: unconfig
|
||||||
@$(MKCONFIG) -a BC3450 ppc mpc5xxx bc3450
|
@$(MKCONFIG) -a BC3450 ppc mpc5xxx bc3450
|
||||||
|
|
||||||
|
cm5200_config: unconfig
|
||||||
|
@$(MKCONFIG) -a cm5200 ppc mpc5xxx cm5200
|
||||||
|
|
||||||
cpci5200_config: unconfig
|
cpci5200_config: unconfig
|
||||||
@$(MKCONFIG) -a cpci5200 ppc mpc5xxx cpci5200 esd
|
@$(MKCONFIG) -a cpci5200 ppc mpc5xxx cpci5200 esd
|
||||||
|
|
||||||
@@ -536,9 +542,6 @@ icecube_5100_config: unconfig
|
|||||||
jupiter_config: unconfig
|
jupiter_config: unconfig
|
||||||
@$(MKCONFIG) jupiter ppc mpc5xxx jupiter
|
@$(MKCONFIG) jupiter ppc mpc5xxx jupiter
|
||||||
|
|
||||||
v38b_config: unconfig
|
|
||||||
@$(MKCONFIG) -a v38b ppc mpc5xxx v38b
|
|
||||||
|
|
||||||
inka4x0_config: unconfig
|
inka4x0_config: unconfig
|
||||||
@$(MKCONFIG) inka4x0 ppc mpc5xxx inka4x0
|
@$(MKCONFIG) inka4x0 ppc mpc5xxx inka4x0
|
||||||
|
|
||||||
@@ -613,9 +616,20 @@ prs200_highboot_DDR_config: unconfig
|
|||||||
mecp5200_config: unconfig
|
mecp5200_config: unconfig
|
||||||
@$(MKCONFIG) mecp5200 ppc mpc5xxx mecp5200 esd
|
@$(MKCONFIG) mecp5200 ppc mpc5xxx mecp5200 esd
|
||||||
|
|
||||||
|
motionpro_config: unconfig
|
||||||
|
@$(MKCONFIG) motionpro ppc mpc5xxx motionpro
|
||||||
|
|
||||||
munices_config: unconfig
|
munices_config: unconfig
|
||||||
@$(MKCONFIG) munices ppc mpc5xxx munices
|
@$(MKCONFIG) munices ppc mpc5xxx munices
|
||||||
|
|
||||||
|
MVBC_P_config: unconfig
|
||||||
|
@mkdir -p $(obj)include
|
||||||
|
@mkdir -p $(obj)board/mvbc_p
|
||||||
|
@ >$(obj)include/config.h
|
||||||
|
@[ -z "$(findstring MVBC_P,$@)" ] || \
|
||||||
|
{ echo "#define CONFIG_MVBC_P" >>$(obj)include/config.h; }
|
||||||
|
@$(MKCONFIG) -n $@ -a MVBC_P ppc mpc5xxx mvbc_p matrix_vision
|
||||||
|
|
||||||
o2dnt_config: unconfig
|
o2dnt_config: unconfig
|
||||||
@$(MKCONFIG) o2dnt ppc mpc5xxx o2dnt
|
@$(MKCONFIG) o2dnt ppc mpc5xxx o2dnt
|
||||||
|
|
||||||
@@ -638,13 +652,10 @@ PM520_ROMBOOT_DDR_config: unconfig
|
|||||||
@$(MKCONFIG) -a PM520 ppc mpc5xxx pm520
|
@$(MKCONFIG) -a PM520 ppc mpc5xxx pm520
|
||||||
|
|
||||||
smmaco4_config: unconfig
|
smmaco4_config: unconfig
|
||||||
@$(MKCONFIG) -a smmaco4 ppc mpc5xxx tqm5200
|
@$(MKCONFIG) -a smmaco4 ppc mpc5xxx tqm5200 tqc
|
||||||
|
|
||||||
cm5200_config: unconfig
|
|
||||||
@$(MKCONFIG) -a cm5200 ppc mpc5xxx cm5200
|
|
||||||
|
|
||||||
spieval_config: unconfig
|
spieval_config: unconfig
|
||||||
@$(MKCONFIG) -a spieval ppc mpc5xxx tqm5200
|
@$(MKCONFIG) -a spieval ppc mpc5xxx tqm5200 tqc
|
||||||
|
|
||||||
TB5200_B_config \
|
TB5200_B_config \
|
||||||
TB5200_config: unconfig
|
TB5200_config: unconfig
|
||||||
@@ -653,7 +664,7 @@ TB5200_config: unconfig
|
|||||||
{ echo "#define CONFIG_TQM5200_B" >>$(obj)include/config.h ; \
|
{ echo "#define CONFIG_TQM5200_B" >>$(obj)include/config.h ; \
|
||||||
$(XECHO) "... with MPC5200B processor" ; \
|
$(XECHO) "... with MPC5200B processor" ; \
|
||||||
}
|
}
|
||||||
@$(MKCONFIG) -n $@ -a TB5200 ppc mpc5xxx tqm5200
|
@$(MKCONFIG) -n $@ -a TB5200 ppc mpc5xxx tqm5200 tqc
|
||||||
|
|
||||||
MINI5200_config \
|
MINI5200_config \
|
||||||
EVAL5200_config \
|
EVAL5200_config \
|
||||||
@@ -702,7 +713,7 @@ TQM5200_B_HIGHBOOT_config \
|
|||||||
TQM5200_config \
|
TQM5200_config \
|
||||||
TQM5200_STK100_config: unconfig
|
TQM5200_STK100_config: unconfig
|
||||||
@mkdir -p $(obj)include
|
@mkdir -p $(obj)include
|
||||||
@mkdir -p $(obj)board/tqm5200
|
@mkdir -p $(obj)board/tqc/tqm5200
|
||||||
@[ -z "$(findstring cam5200,$@)" ] || \
|
@[ -z "$(findstring cam5200,$@)" ] || \
|
||||||
{ echo "#define CONFIG_CAM5200" >>$(obj)include/config.h ; \
|
{ echo "#define CONFIG_CAM5200" >>$(obj)include/config.h ; \
|
||||||
echo "#define CONFIG_TQM5200S" >>$(obj)include/config.h ; \
|
echo "#define CONFIG_TQM5200S" >>$(obj)include/config.h ; \
|
||||||
@@ -735,23 +746,24 @@ TQM5200_STK100_config: unconfig
|
|||||||
@[ -z "$(findstring HIGHBOOT,$@)" ] || \
|
@[ -z "$(findstring HIGHBOOT,$@)" ] || \
|
||||||
{ echo "TEXT_BASE = 0xFFF00000" >$(obj)board/tqm5200/config.tmp ; \
|
{ echo "TEXT_BASE = 0xFFF00000" >$(obj)board/tqm5200/config.tmp ; \
|
||||||
}
|
}
|
||||||
@$(MKCONFIG) -n $@ -a TQM5200 ppc mpc5xxx tqm5200
|
@$(MKCONFIG) -n $@ -a TQM5200 ppc mpc5xxx tqm5200 tqc
|
||||||
|
|
||||||
uc101_config: unconfig
|
uc101_config: unconfig
|
||||||
@$(MKCONFIG) uc101 ppc mpc5xxx uc101
|
@$(MKCONFIG) uc101 ppc mpc5xxx uc101
|
||||||
motionpro_config: unconfig
|
|
||||||
@$(MKCONFIG) motionpro ppc mpc5xxx motionpro
|
|
||||||
|
|
||||||
|
v38b_config: unconfig
|
||||||
|
@$(MKCONFIG) -a v38b ppc mpc5xxx v38b
|
||||||
|
|
||||||
#########################################################################
|
#########################################################################
|
||||||
## MPC512x Systems
|
## MPC512x Systems
|
||||||
#########################################################################
|
#########################################################################
|
||||||
|
|
||||||
ads5121_config \
|
ads5121_config \
|
||||||
ads5121_PCI_config \
|
ads5121_rev2_config \
|
||||||
: unconfig
|
: unconfig
|
||||||
@mkdir -p $(obj)include
|
@mkdir -p $(obj)include
|
||||||
@if [ "$(findstring _PCI_,$@)" ] ; then \
|
@if [ "$(findstring rev2,$@)" ] ; then \
|
||||||
echo "#define CONFIG_PCI" >>$(obj)include/config.h ; \
|
echo "#define CONFIG_ADS5121_REV2 1" > $(obj)include/config.h; \
|
||||||
$(XECHO) "... with PCI enabled" ; \
|
|
||||||
fi
|
fi
|
||||||
@$(MKCONFIG) -a ads5121 ppc mpc512x ads5121
|
@$(MKCONFIG) -a ads5121 ppc mpc512x ads5121
|
||||||
|
|
||||||
@@ -828,7 +840,7 @@ hermes_config : unconfig
|
|||||||
@$(MKCONFIG) $(@:_config=) ppc mpc8xx hermes
|
@$(MKCONFIG) $(@:_config=) ppc mpc8xx hermes
|
||||||
|
|
||||||
HMI10_config : unconfig
|
HMI10_config : unconfig
|
||||||
@$(MKCONFIG) $(@:_config=) ppc mpc8xx tqm8xx
|
@$(MKCONFIG) $(@:_config=) ppc mpc8xx tqm8xx tqc
|
||||||
|
|
||||||
IAD210_config: unconfig
|
IAD210_config: unconfig
|
||||||
@$(MKCONFIG) $(@:_config=) ppc mpc8xx IAD210 siemens
|
@$(MKCONFIG) $(@:_config=) ppc mpc8xx IAD210 siemens
|
||||||
@@ -1057,7 +1069,7 @@ RRvision_LCD_config: unconfig
|
|||||||
@$(MKCONFIG) -a RRvision ppc mpc8xx RRvision
|
@$(MKCONFIG) -a RRvision ppc mpc8xx RRvision
|
||||||
|
|
||||||
SM850_config : unconfig
|
SM850_config : unconfig
|
||||||
@$(MKCONFIG) $(@:_config=) ppc mpc8xx tqm8xx
|
@$(MKCONFIG) $(@:_config=) ppc mpc8xx tqm8xx tqc
|
||||||
|
|
||||||
spc1920_config: unconfig
|
spc1920_config: unconfig
|
||||||
@$(MKCONFIG) $(@:_config=) ppc mpc8xx spc1920
|
@$(MKCONFIG) $(@:_config=) ppc mpc8xx spc1920
|
||||||
@@ -1107,13 +1119,13 @@ virtlab2_config: unconfig
|
|||||||
echo "#define CONFIG_NEC_NL6448BC20" >>$(obj)include/config.h ; \
|
echo "#define CONFIG_NEC_NL6448BC20" >>$(obj)include/config.h ; \
|
||||||
$(XECHO) "... with LCD display" ; \
|
$(XECHO) "... with LCD display" ; \
|
||||||
}
|
}
|
||||||
@$(MKCONFIG) -a $(call xtract_8xx,$@) ppc mpc8xx tqm8xx
|
@$(MKCONFIG) -a $(call xtract_8xx,$@) ppc mpc8xx tqm8xx tqc
|
||||||
|
|
||||||
TTTech_config: unconfig
|
TTTech_config: unconfig
|
||||||
@mkdir -p $(obj)include
|
@mkdir -p $(obj)include
|
||||||
@echo "#define CONFIG_LCD" >$(obj)include/config.h
|
@echo "#define CONFIG_LCD" >$(obj)include/config.h
|
||||||
@echo "#define CONFIG_SHARP_LQ104V7DS01" >>$(obj)include/config.h
|
@echo "#define CONFIG_SHARP_LQ104V7DS01" >>$(obj)include/config.h
|
||||||
@$(MKCONFIG) -a TQM823L ppc mpc8xx tqm8xx
|
@$(MKCONFIG) -a TQM823L ppc mpc8xx tqm8xx tqc
|
||||||
|
|
||||||
uc100_config : unconfig
|
uc100_config : unconfig
|
||||||
@$(MKCONFIG) $(@:_config=) ppc mpc8xx uc100
|
@$(MKCONFIG) $(@:_config=) ppc mpc8xx uc100
|
||||||
@@ -1128,7 +1140,7 @@ wtk_config: unconfig
|
|||||||
@mkdir -p $(obj)include
|
@mkdir -p $(obj)include
|
||||||
@echo "#define CONFIG_LCD" >$(obj)include/config.h
|
@echo "#define CONFIG_LCD" >$(obj)include/config.h
|
||||||
@echo "#define CONFIG_SHARP_LQ065T9DR51U" >>$(obj)include/config.h
|
@echo "#define CONFIG_SHARP_LQ065T9DR51U" >>$(obj)include/config.h
|
||||||
@$(MKCONFIG) -a TQM823L ppc mpc8xx tqm8xx
|
@$(MKCONFIG) -a TQM823L ppc mpc8xx tqm8xx tqc
|
||||||
|
|
||||||
#########################################################################
|
#########################################################################
|
||||||
## PPC4xx Systems
|
## PPC4xx Systems
|
||||||
@@ -1216,6 +1228,9 @@ CATcenter_33_config: unconfig
|
|||||||
}
|
}
|
||||||
@$(MKCONFIG) -a $(call xtract_4xx,$@) ppc ppc4xx PPChameleonEVB dave
|
@$(MKCONFIG) -a $(call xtract_4xx,$@) ppc ppc4xx PPChameleonEVB dave
|
||||||
|
|
||||||
|
CMS700_config: unconfig
|
||||||
|
@$(MKCONFIG) $(@:_config=) ppc ppc4xx cms700 esd
|
||||||
|
|
||||||
CPCI2DP_config: unconfig
|
CPCI2DP_config: unconfig
|
||||||
@$(MKCONFIG) $(@:_config=) ppc ppc4xx cpci2dp esd
|
@$(MKCONFIG) $(@:_config=) ppc ppc4xx cpci2dp esd
|
||||||
|
|
||||||
@@ -1391,9 +1406,15 @@ PPChameleonEVB_HI_33_config: unconfig
|
|||||||
}
|
}
|
||||||
@$(MKCONFIG) -a $(call xtract_4xx,$@) ppc ppc4xx PPChameleonEVB dave
|
@$(MKCONFIG) -a $(call xtract_4xx,$@) ppc ppc4xx PPChameleonEVB dave
|
||||||
|
|
||||||
|
quad100hd_config: unconfig
|
||||||
|
@$(MKCONFIG) $(@:_config=) ppc ppc4xx quad100hd
|
||||||
|
|
||||||
sbc405_config: unconfig
|
sbc405_config: unconfig
|
||||||
@$(MKCONFIG) $(@:_config=) ppc ppc4xx sbc405
|
@$(MKCONFIG) $(@:_config=) ppc ppc4xx sbc405
|
||||||
|
|
||||||
|
sc3_config:unconfig
|
||||||
|
@$(MKCONFIG) $(@:_config=) ppc ppc4xx sc3
|
||||||
|
|
||||||
sequoia_config \
|
sequoia_config \
|
||||||
rainier_config: unconfig
|
rainier_config: unconfig
|
||||||
@mkdir -p $(obj)include
|
@mkdir -p $(obj)include
|
||||||
@@ -1412,9 +1433,6 @@ rainier_nand_config: unconfig
|
|||||||
@echo "TEXT_BASE = 0x01000000" > $(obj)board/amcc/sequoia/config.tmp
|
@echo "TEXT_BASE = 0x01000000" > $(obj)board/amcc/sequoia/config.tmp
|
||||||
@echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
|
@echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
|
||||||
|
|
||||||
sc3_config:unconfig
|
|
||||||
@$(MKCONFIG) $(@:_config=) ppc ppc4xx sc3
|
|
||||||
|
|
||||||
taihu_config: unconfig
|
taihu_config: unconfig
|
||||||
@$(MKCONFIG) $(@:_config=) ppc ppc4xx taihu amcc
|
@$(MKCONFIG) $(@:_config=) ppc ppc4xx taihu amcc
|
||||||
|
|
||||||
@@ -1427,9 +1445,6 @@ VOH405_config: unconfig
|
|||||||
VOM405_config: unconfig
|
VOM405_config: unconfig
|
||||||
@$(MKCONFIG) $(@:_config=) ppc ppc4xx vom405 esd
|
@$(MKCONFIG) $(@:_config=) ppc ppc4xx vom405 esd
|
||||||
|
|
||||||
CMS700_config: unconfig
|
|
||||||
@$(MKCONFIG) $(@:_config=) ppc ppc4xx cms700 esd
|
|
||||||
|
|
||||||
W7OLMC_config \
|
W7OLMC_config \
|
||||||
W7OLMG_config: unconfig
|
W7OLMG_config: unconfig
|
||||||
@$(MKCONFIG) $(@:_config=) ppc ppc4xx w7o
|
@$(MKCONFIG) $(@:_config=) ppc ppc4xx w7o
|
||||||
@@ -1779,10 +1794,10 @@ TQM8265_AA_config: unconfig
|
|||||||
echo "#undef CONFIG_BUSMODE_60x" >>$(obj)include/config.h ; \
|
echo "#undef CONFIG_BUSMODE_60x" >>$(obj)include/config.h ; \
|
||||||
$(XECHO) "... without 60x Bus Mode" ; \
|
$(XECHO) "... without 60x Bus Mode" ; \
|
||||||
fi
|
fi
|
||||||
@$(MKCONFIG) -a TQM8260 ppc mpc8260 tqm8260
|
@$(MKCONFIG) -a TQM8260 ppc mpc8260 tqm8260 tqc
|
||||||
|
|
||||||
TQM8272_config: unconfig
|
TQM8272_config: unconfig
|
||||||
@$(MKCONFIG) TQM8272 ppc mpc8260 tqm8272
|
@$(MKCONFIG) TQM8272 ppc mpc8260 tqm8272 tqc
|
||||||
|
|
||||||
VoVPN-GW_66MHz_config \
|
VoVPN-GW_66MHz_config \
|
||||||
VoVPN-GW_100MHz_config: unconfig
|
VoVPN-GW_100MHz_config: unconfig
|
||||||
@@ -1854,9 +1869,6 @@ M5275EVB_config : unconfig
|
|||||||
M5282EVB_config : unconfig
|
M5282EVB_config : unconfig
|
||||||
@$(MKCONFIG) $(@:_config=) m68k mcf52x2 m5282evb
|
@$(MKCONFIG) $(@:_config=) m68k mcf52x2 m5282evb
|
||||||
|
|
||||||
TASREG_config : unconfig
|
|
||||||
@$(MKCONFIG) $(@:_config=) m68k mcf52x2 tasreg esd
|
|
||||||
|
|
||||||
M5329AFEE_config \
|
M5329AFEE_config \
|
||||||
M5329BFEE_config : unconfig
|
M5329BFEE_config : unconfig
|
||||||
@case "$@" in \
|
@case "$@" in \
|
||||||
@@ -1976,6 +1988,9 @@ M5485HFE_config : unconfig
|
|||||||
fi
|
fi
|
||||||
@$(MKCONFIG) -a M5485EVB m68k mcf547x_8x m548xevb freescale
|
@$(MKCONFIG) -a M5485EVB m68k mcf547x_8x m548xevb freescale
|
||||||
|
|
||||||
|
TASREG_config : unconfig
|
||||||
|
@$(MKCONFIG) $(@:_config=) m68k mcf52x2 tasreg esd
|
||||||
|
|
||||||
#########################################################################
|
#########################################################################
|
||||||
## MPC83xx Systems
|
## MPC83xx Systems
|
||||||
#########################################################################
|
#########################################################################
|
||||||
@@ -2102,11 +2117,14 @@ MPC837XEMDS_HOST_config: unconfig
|
|||||||
MPC837XERDB_config: unconfig
|
MPC837XERDB_config: unconfig
|
||||||
@$(MKCONFIG) -a MPC837XERDB ppc mpc83xx mpc837xerdb freescale
|
@$(MKCONFIG) -a MPC837XERDB ppc mpc83xx mpc837xerdb freescale
|
||||||
|
|
||||||
|
MVBLM7_config: unconfig
|
||||||
|
@$(MKCONFIG) $(@:_config=) ppc mpc83xx mvblm7
|
||||||
|
|
||||||
sbc8349_config: unconfig
|
sbc8349_config: unconfig
|
||||||
@$(MKCONFIG) $(@:_config=) ppc mpc83xx sbc8349
|
@$(MKCONFIG) $(@:_config=) ppc mpc83xx sbc8349
|
||||||
|
|
||||||
TQM834x_config: unconfig
|
TQM834x_config: unconfig
|
||||||
@$(MKCONFIG) $(@:_config=) ppc mpc83xx tqm834x
|
@$(MKCONFIG) $(@:_config=) ppc mpc83xx tqm834x tqc
|
||||||
|
|
||||||
|
|
||||||
#########################################################################
|
#########################################################################
|
||||||
@@ -2208,6 +2226,9 @@ sbc8560_66_config: unconfig
|
|||||||
fi
|
fi
|
||||||
@$(MKCONFIG) -a sbc8560 ppc mpc85xx sbc8560
|
@$(MKCONFIG) -a sbc8560 ppc mpc85xx sbc8560
|
||||||
|
|
||||||
|
socrates_config: unconfig
|
||||||
|
@$(MKCONFIG) $(@:_config=) ppc mpc85xx socrates
|
||||||
|
|
||||||
stxgp3_config: unconfig
|
stxgp3_config: unconfig
|
||||||
@$(MKCONFIG) $(@:_config=) ppc mpc85xx stxgp3
|
@$(MKCONFIG) $(@:_config=) ppc mpc85xx stxgp3
|
||||||
|
|
||||||
@@ -2222,6 +2243,7 @@ stxssa_4M_config: unconfig
|
|||||||
|
|
||||||
TQM8540_config \
|
TQM8540_config \
|
||||||
TQM8541_config \
|
TQM8541_config \
|
||||||
|
TQM8548_config \
|
||||||
TQM8555_config \
|
TQM8555_config \
|
||||||
TQM8560_config: unconfig
|
TQM8560_config: unconfig
|
||||||
@mkdir -p $(obj)include
|
@mkdir -p $(obj)include
|
||||||
@@ -2230,9 +2252,8 @@ TQM8560_config: unconfig
|
|||||||
echo "#define CONFIG_MPC$${CTYPE}">>$(obj)include/config.h; \
|
echo "#define CONFIG_MPC$${CTYPE}">>$(obj)include/config.h; \
|
||||||
echo "#define CONFIG_TQM$${CTYPE}">>$(obj)include/config.h; \
|
echo "#define CONFIG_TQM$${CTYPE}">>$(obj)include/config.h; \
|
||||||
echo "#define CONFIG_HOSTNAME tqm$${CTYPE}">>$(obj)include/config.h; \
|
echo "#define CONFIG_HOSTNAME tqm$${CTYPE}">>$(obj)include/config.h; \
|
||||||
echo "#define CONFIG_BOARDNAME \"TQM$${CTYPE}\"">>$(obj)include/config.h; \
|
echo "#define CONFIG_BOARDNAME \"TQM$${CTYPE}\"">>$(obj)include/config.h;
|
||||||
echo "#define CFG_BOOTFILE_PATH \"/tftpboot/tqm$${CTYPE}/uImage\"">>$(obj)include/config.h
|
@$(MKCONFIG) -a TQM85xx ppc mpc85xx tqm85xx tqc
|
||||||
@$(MKCONFIG) -a TQM85xx ppc mpc85xx tqm85xx
|
|
||||||
|
|
||||||
#########################################################################
|
#########################################################################
|
||||||
## MPC86xx Systems
|
## MPC86xx Systems
|
||||||
@@ -2293,12 +2314,12 @@ PCIPPC2_config \
|
|||||||
PCIPPC6_config: unconfig
|
PCIPPC6_config: unconfig
|
||||||
@$(MKCONFIG) $(@:_config=) ppc 74xx_7xx pcippc2
|
@$(MKCONFIG) $(@:_config=) ppc 74xx_7xx pcippc2
|
||||||
|
|
||||||
ZUMA_config: unconfig
|
|
||||||
@$(MKCONFIG) $(@:_config=) ppc 74xx_7xx evb64260
|
|
||||||
|
|
||||||
ppmc7xx_config: unconfig
|
ppmc7xx_config: unconfig
|
||||||
@$(MKCONFIG) $(@:_config=) ppc 74xx_7xx ppmc7xx
|
@$(MKCONFIG) $(@:_config=) ppc 74xx_7xx ppmc7xx
|
||||||
|
|
||||||
|
ZUMA_config: unconfig
|
||||||
|
@$(MKCONFIG) $(@:_config=) ppc 74xx_7xx evb64260
|
||||||
|
|
||||||
#========================================================================
|
#========================================================================
|
||||||
# ARM
|
# ARM
|
||||||
#========================================================================
|
#========================================================================
|
||||||
@@ -2332,6 +2353,15 @@ shannon_config : unconfig
|
|||||||
at91rm9200dk_config : unconfig
|
at91rm9200dk_config : unconfig
|
||||||
@$(MKCONFIG) $(@:_config=) arm arm920t at91rm9200dk atmel at91rm9200
|
@$(MKCONFIG) $(@:_config=) arm arm920t at91rm9200dk atmel at91rm9200
|
||||||
|
|
||||||
|
at91sam9261ek_config : unconfig
|
||||||
|
@$(MKCONFIG) $(@:_config=) arm arm926ejs at91sam9261ek atmel at91sam9
|
||||||
|
|
||||||
|
at91sam9263ek_config : unconfig
|
||||||
|
@$(MKCONFIG) $(@:_config=) arm arm926ejs at91sam9263ek atmel at91sam9
|
||||||
|
|
||||||
|
at91sam9rlek_config : unconfig
|
||||||
|
@$(MKCONFIG) $(@:_config=) arm arm926ejs at91sam9rlek atmel at91sam9
|
||||||
|
|
||||||
cmc_pu2_config : unconfig
|
cmc_pu2_config : unconfig
|
||||||
@$(MKCONFIG) $(@:_config=) arm arm920t cmc_pu2 NULL at91rm9200
|
@$(MKCONFIG) $(@:_config=) arm arm920t cmc_pu2 NULL at91rm9200
|
||||||
|
|
||||||
@@ -2341,12 +2371,12 @@ csb637_config : unconfig
|
|||||||
kb9202_config : unconfig
|
kb9202_config : unconfig
|
||||||
@$(MKCONFIG) $(@:_config=) arm arm920t kb9202 NULL at91rm9200
|
@$(MKCONFIG) $(@:_config=) arm arm920t kb9202 NULL at91rm9200
|
||||||
|
|
||||||
mp2usb_config : unconfig
|
|
||||||
@$(MKCONFIG) $(@:_config=) arm arm920t mp2usb NULL at91rm9200
|
|
||||||
|
|
||||||
m501sk_config : unconfig
|
m501sk_config : unconfig
|
||||||
@$(MKCONFIG) $(@:_config=) arm arm920t m501sk NULL at91rm9200
|
@$(MKCONFIG) $(@:_config=) arm arm920t m501sk NULL at91rm9200
|
||||||
|
|
||||||
|
mp2usb_config : unconfig
|
||||||
|
@$(MKCONFIG) $(@:_config=) arm arm920t mp2usb NULL at91rm9200
|
||||||
|
|
||||||
#########################################################################
|
#########################################################################
|
||||||
## Atmel ARM926EJ-S Systems
|
## Atmel ARM926EJ-S Systems
|
||||||
#########################################################################
|
#########################################################################
|
||||||
@@ -2383,6 +2413,18 @@ cp922_XA10_config \
|
|||||||
cp1026_config: unconfig
|
cp1026_config: unconfig
|
||||||
@board/integratorcp/split_by_variant.sh $@
|
@board/integratorcp/split_by_variant.sh $@
|
||||||
|
|
||||||
|
davinci_dvevm_config : unconfig
|
||||||
|
@$(MKCONFIG) $(@:_config=) arm arm926ejs dv-evm davinci davinci
|
||||||
|
|
||||||
|
davinci_schmoogie_config : unconfig
|
||||||
|
@$(MKCONFIG) $(@:_config=) arm arm926ejs schmoogie davinci davinci
|
||||||
|
|
||||||
|
davinci_sffsdr_config : unconfig
|
||||||
|
@$(MKCONFIG) $(@:_config=) arm arm926ejs sffsdr davinci davinci
|
||||||
|
|
||||||
|
davinci_sonata_config : unconfig
|
||||||
|
@$(MKCONFIG) $(@:_config=) arm arm926ejs sonata davinci davinci
|
||||||
|
|
||||||
lpd7a400_config \
|
lpd7a400_config \
|
||||||
lpd7a404_config: unconfig
|
lpd7a404_config: unconfig
|
||||||
@$(MKCONFIG) $(@:_config=) arm lh7a40x lpd7a40x
|
@$(MKCONFIG) $(@:_config=) arm lh7a40x lpd7a40x
|
||||||
@@ -2399,18 +2441,6 @@ netstar_config: unconfig
|
|||||||
omap1510inn_config : unconfig
|
omap1510inn_config : unconfig
|
||||||
@$(MKCONFIG) $(@:_config=) arm arm925t omap1510inn
|
@$(MKCONFIG) $(@:_config=) arm arm925t omap1510inn
|
||||||
|
|
||||||
omap5912osk_config : unconfig
|
|
||||||
@$(MKCONFIG) $(@:_config=) arm arm926ejs omap5912osk NULL omap
|
|
||||||
|
|
||||||
davinci_dvevm_config : unconfig
|
|
||||||
@$(MKCONFIG) $(@:_config=) arm arm926ejs dv-evm davinci davinci
|
|
||||||
|
|
||||||
davinci_schmoogie_config : unconfig
|
|
||||||
@$(MKCONFIG) $(@:_config=) arm arm926ejs schmoogie davinci davinci
|
|
||||||
|
|
||||||
davinci_sonata_config : unconfig
|
|
||||||
@$(MKCONFIG) $(@:_config=) arm arm926ejs sonata davinci davinci
|
|
||||||
|
|
||||||
xtract_omap1610xxx = $(subst _cs0boot,,$(subst _cs3boot,,$(subst _cs_autoboot,,$(subst _config,,$1))))
|
xtract_omap1610xxx = $(subst _cs0boot,,$(subst _cs3boot,,$(subst _cs_autoboot,,$(subst _config,,$1))))
|
||||||
|
|
||||||
omap1610inn_config \
|
omap1610inn_config \
|
||||||
@@ -2434,6 +2464,9 @@ omap1610h2_cs_autoboot_config: unconfig
|
|||||||
fi;
|
fi;
|
||||||
@$(MKCONFIG) -a $(call xtract_omap1610xxx,$@) arm arm926ejs omap1610inn NULL omap
|
@$(MKCONFIG) -a $(call xtract_omap1610xxx,$@) arm arm926ejs omap1610inn NULL omap
|
||||||
|
|
||||||
|
omap5912osk_config : unconfig
|
||||||
|
@$(MKCONFIG) $(@:_config=) arm arm926ejs omap5912osk NULL omap
|
||||||
|
|
||||||
xtract_omap730p2 = $(subst _cs0boot,,$(subst _cs3boot,, $(subst _config,,$1)))
|
xtract_omap730p2 = $(subst _cs0boot,,$(subst _cs3boot,, $(subst _config,,$1)))
|
||||||
|
|
||||||
omap730p2_config \
|
omap730p2_config \
|
||||||
@@ -2495,9 +2528,16 @@ trab_old_config: unconfig
|
|||||||
VCMA9_config : unconfig
|
VCMA9_config : unconfig
|
||||||
@$(MKCONFIG) $(@:_config=) arm arm920t vcma9 mpl s3c24x0
|
@$(MKCONFIG) $(@:_config=) arm arm920t vcma9 mpl s3c24x0
|
||||||
|
|
||||||
#========================================================================
|
#########################################################################
|
||||||
# ARM supplied Versatile development boards
|
# ARM supplied Versatile development boards
|
||||||
#========================================================================
|
#########################################################################
|
||||||
|
|
||||||
|
cm4008_config : unconfig
|
||||||
|
@$(MKCONFIG) $(@:_config=) arm arm920t cm4008 NULL ks8695
|
||||||
|
|
||||||
|
cm41xx_config : unconfig
|
||||||
|
@$(MKCONFIG) $(@:_config=) arm arm920t cm41xx NULL ks8695
|
||||||
|
|
||||||
versatile_config \
|
versatile_config \
|
||||||
versatileab_config \
|
versatileab_config \
|
||||||
versatilepb_config : unconfig
|
versatilepb_config : unconfig
|
||||||
@@ -2506,12 +2546,6 @@ versatilepb_config : unconfig
|
|||||||
voiceblue_config: unconfig
|
voiceblue_config: unconfig
|
||||||
@$(MKCONFIG) $(@:_config=) arm arm925t voiceblue
|
@$(MKCONFIG) $(@:_config=) arm arm925t voiceblue
|
||||||
|
|
||||||
cm4008_config : unconfig
|
|
||||||
@$(MKCONFIG) $(@:_config=) arm arm920t cm4008 NULL ks8695
|
|
||||||
|
|
||||||
cm41xx_config : unconfig
|
|
||||||
@$(MKCONFIG) $(@:_config=) arm arm920t cm41xx NULL ks8695
|
|
||||||
|
|
||||||
#########################################################################
|
#########################################################################
|
||||||
## S3C44B0 Systems
|
## S3C44B0 Systems
|
||||||
#########################################################################
|
#########################################################################
|
||||||
@@ -2560,9 +2594,6 @@ actux3_config : unconfig
|
|||||||
actux4_config : unconfig
|
actux4_config : unconfig
|
||||||
@$(MKCONFIG) $(@:_config=) arm ixp actux4
|
@$(MKCONFIG) $(@:_config=) arm ixp actux4
|
||||||
|
|
||||||
adsvix_config : unconfig
|
|
||||||
@$(MKCONFIG) $(@:_config=) arm pxa adsvix
|
|
||||||
|
|
||||||
cerf250_config : unconfig
|
cerf250_config : unconfig
|
||||||
@$(MKCONFIG) $(@:_config=) arm pxa cerf250
|
@$(MKCONFIG) $(@:_config=) arm pxa cerf250
|
||||||
|
|
||||||
@@ -2626,11 +2657,10 @@ zylonite_config :
|
|||||||
#########################################################################
|
#########################################################################
|
||||||
## ARM1136 Systems
|
## ARM1136 Systems
|
||||||
#########################################################################
|
#########################################################################
|
||||||
omap2420h4_config : unconfig
|
|
||||||
@$(MKCONFIG) $(@:_config=) arm arm1136 omap2420h4 NULL omap24xx
|
|
||||||
|
|
||||||
apollon_config : unconfig
|
apollon_config : unconfig
|
||||||
@mkdir -p $(obj)include
|
@mkdir -p $(obj)include
|
||||||
|
@mkdir -p $(obj)onenand_ipl/board/apollon
|
||||||
@echo "#define CONFIG_ONENAND_U_BOOT" > $(obj)include/config.h
|
@echo "#define CONFIG_ONENAND_U_BOOT" > $(obj)include/config.h
|
||||||
@$(MKCONFIG) $(@:_config=) arm arm1136 apollon NULL omap24xx
|
@$(MKCONFIG) $(@:_config=) arm arm1136 apollon NULL omap24xx
|
||||||
@echo "CONFIG_ONENAND_U_BOOT = y" >> $(obj)include/config.mk
|
@echo "CONFIG_ONENAND_U_BOOT = y" >> $(obj)include/config.mk
|
||||||
@@ -2644,6 +2674,9 @@ imx31_phycore_config : unconfig
|
|||||||
mx31ads_config : unconfig
|
mx31ads_config : unconfig
|
||||||
@$(MKCONFIG) $(@:_config=) arm arm1136 mx31ads NULL mx31
|
@$(MKCONFIG) $(@:_config=) arm arm1136 mx31ads NULL mx31
|
||||||
|
|
||||||
|
omap2420h4_config : unconfig
|
||||||
|
@$(MKCONFIG) $(@:_config=) arm arm1136 omap2420h4 NULL omap24xx
|
||||||
|
|
||||||
#========================================================================
|
#========================================================================
|
||||||
# i386
|
# i386
|
||||||
#========================================================================
|
#========================================================================
|
||||||
@@ -2693,6 +2726,7 @@ tb0229_config: unconfig
|
|||||||
#########################################################################
|
#########################################################################
|
||||||
## MIPS32 AU1X00
|
## MIPS32 AU1X00
|
||||||
#########################################################################
|
#########################################################################
|
||||||
|
|
||||||
dbau1000_config : unconfig
|
dbau1000_config : unconfig
|
||||||
@mkdir -p $(obj)include
|
@mkdir -p $(obj)include
|
||||||
@echo "#define CONFIG_DBAU1000 1" >$(obj)include/config.h
|
@echo "#define CONFIG_DBAU1000 1" >$(obj)include/config.h
|
||||||
@@ -2718,17 +2752,17 @@ dbau1550_el_config : unconfig
|
|||||||
@echo "#define CONFIG_DBAU1550 1" >$(obj)include/config.h
|
@echo "#define CONFIG_DBAU1550 1" >$(obj)include/config.h
|
||||||
@$(MKCONFIG) -a dbau1x00 mips mips dbau1x00
|
@$(MKCONFIG) -a dbau1x00 mips mips dbau1x00
|
||||||
|
|
||||||
|
gth2_config : unconfig
|
||||||
|
@mkdir -p $(obj)include
|
||||||
|
@echo "#define CONFIG_GTH2 1" >$(obj)include/config.h
|
||||||
|
@$(MKCONFIG) -a gth2 mips mips gth2
|
||||||
|
|
||||||
pb1000_config : unconfig
|
pb1000_config : unconfig
|
||||||
@mkdir -p $(obj)include
|
@mkdir -p $(obj)include
|
||||||
@echo "#define CONFIG_PB1000 1" >$(obj)include/config.h
|
@echo "#define CONFIG_PB1000 1" >$(obj)include/config.h
|
||||||
@$(MKCONFIG) -a pb1x00 mips mips pb1x00
|
@$(MKCONFIG) -a pb1x00 mips mips pb1x00
|
||||||
|
|
||||||
gth2_config: unconfig
|
qemu_mips_config : unconfig
|
||||||
@mkdir -p $(obj)include
|
|
||||||
@echo "#define CONFIG_GTH2 1" >$(obj)include/config.h
|
|
||||||
@$(MKCONFIG) -a gth2 mips mips gth2
|
|
||||||
|
|
||||||
qemu_mips_config: unconfig
|
|
||||||
@mkdir -p $(obj)include
|
@mkdir -p $(obj)include
|
||||||
@echo "#define CONFIG_QEMU_MIPS 1" >$(obj)include/config.h
|
@echo "#define CONFIG_QEMU_MIPS 1" >$(obj)include/config.h
|
||||||
@$(MKCONFIG) -a qemu-mips mips mips qemu-mips
|
@$(MKCONFIG) -a qemu-mips mips mips qemu-mips
|
||||||
@@ -2747,6 +2781,24 @@ purple_config : unconfig
|
|||||||
## Nios32
|
## Nios32
|
||||||
#########################################################################
|
#########################################################################
|
||||||
|
|
||||||
|
ADNPESC1_DNPEVA2_base_32_config \
|
||||||
|
ADNPESC1_base_32_config \
|
||||||
|
ADNPESC1_config: unconfig
|
||||||
|
@mkdir -p $(obj)include
|
||||||
|
@[ -z "$(findstring _DNPEVA2,$@)" ] || \
|
||||||
|
{ echo "#define CONFIG_DNPEVA2 1" >>$(obj)include/config.h ; \
|
||||||
|
$(XECHO) "... DNP/EVA2 configuration" ; \
|
||||||
|
}
|
||||||
|
@[ -z "$(findstring _base_32,$@)" ] || \
|
||||||
|
{ echo "#define CONFIG_NIOS_BASE_32 1" >>$(obj)include/config.h ; \
|
||||||
|
$(XECHO) "... NIOS 'base_32' configuration" ; \
|
||||||
|
}
|
||||||
|
@[ -z "$(findstring ADNPESC1_config,$@)" ] || \
|
||||||
|
{ echo "#define CONFIG_NIOS_BASE_32 1" >>$(obj)include/config.h ; \
|
||||||
|
$(XECHO) "... NIOS 'base_32' configuration (DEFAULT)" ; \
|
||||||
|
}
|
||||||
|
@$(MKCONFIG) -a ADNPESC1 nios nios adnpesc1 ssv
|
||||||
|
|
||||||
DK1C20_safe_32_config \
|
DK1C20_safe_32_config \
|
||||||
DK1C20_standard_32_config \
|
DK1C20_standard_32_config \
|
||||||
DK1C20_config: unconfig
|
DK1C20_config: unconfig
|
||||||
@@ -2788,24 +2840,6 @@ DK1S10_config: unconfig
|
|||||||
}
|
}
|
||||||
@$(MKCONFIG) -a DK1S10 nios nios dk1s10 altera
|
@$(MKCONFIG) -a DK1S10 nios nios dk1s10 altera
|
||||||
|
|
||||||
ADNPESC1_DNPEVA2_base_32_config \
|
|
||||||
ADNPESC1_base_32_config \
|
|
||||||
ADNPESC1_config: unconfig
|
|
||||||
@mkdir -p $(obj)include
|
|
||||||
@[ -z "$(findstring _DNPEVA2,$@)" ] || \
|
|
||||||
{ echo "#define CONFIG_DNPEVA2 1" >>$(obj)include/config.h ; \
|
|
||||||
$(XECHO) "... DNP/EVA2 configuration" ; \
|
|
||||||
}
|
|
||||||
@[ -z "$(findstring _base_32,$@)" ] || \
|
|
||||||
{ echo "#define CONFIG_NIOS_BASE_32 1" >>$(obj)include/config.h ; \
|
|
||||||
$(XECHO) "... NIOS 'base_32' configuration" ; \
|
|
||||||
}
|
|
||||||
@[ -z "$(findstring ADNPESC1_config,$@)" ] || \
|
|
||||||
{ echo "#define CONFIG_NIOS_BASE_32 1" >>$(obj)include/config.h ; \
|
|
||||||
$(XECHO) "... NIOS 'base_32' configuration (DEFAULT)" ; \
|
|
||||||
}
|
|
||||||
@$(MKCONFIG) -a ADNPESC1 nios nios adnpesc1 ssv
|
|
||||||
|
|
||||||
#########################################################################
|
#########################################################################
|
||||||
## Nios-II
|
## Nios-II
|
||||||
#########################################################################
|
#########################################################################
|
||||||
@@ -2826,21 +2860,19 @@ PCI5441_config : unconfig
|
|||||||
@$(MKCONFIG) PCI5441 nios2 nios2 pci5441 psyent
|
@$(MKCONFIG) PCI5441 nios2 nios2 pci5441 psyent
|
||||||
|
|
||||||
#========================================================================
|
#========================================================================
|
||||||
# MicroBlaze
|
|
||||||
#========================================================================
|
|
||||||
#########################################################################
|
|
||||||
## Microblaze
|
## Microblaze
|
||||||
#########################################################################
|
#========================================================================
|
||||||
suzaku_config: unconfig
|
|
||||||
@mkdir -p $(obj)include
|
|
||||||
@echo "#define CONFIG_SUZAKU 1" > $(obj)include/config.h
|
|
||||||
@$(MKCONFIG) -a $(@:_config=) microblaze microblaze suzaku AtmarkTechno
|
|
||||||
|
|
||||||
ml401_config: unconfig
|
ml401_config: unconfig
|
||||||
@mkdir -p $(obj)include
|
@mkdir -p $(obj)include
|
||||||
@echo "#define CONFIG_ML401 1" > $(obj)include/config.h
|
@echo "#define CONFIG_ML401 1" > $(obj)include/config.h
|
||||||
@$(MKCONFIG) -a $(@:_config=) microblaze microblaze ml401 xilinx
|
@$(MKCONFIG) -a $(@:_config=) microblaze microblaze ml401 xilinx
|
||||||
|
|
||||||
|
suzaku_config: unconfig
|
||||||
|
@mkdir -p $(obj)include
|
||||||
|
@echo "#define CONFIG_SUZAKU 1" > $(obj)include/config.h
|
||||||
|
@$(MKCONFIG) -a $(@:_config=) microblaze microblaze suzaku AtmarkTechno
|
||||||
|
|
||||||
xupv2p_config: unconfig
|
xupv2p_config: unconfig
|
||||||
@mkdir -p $(obj)include
|
@mkdir -p $(obj)include
|
||||||
@echo "#define CONFIG_XUPV2P 1" > $(obj)include/config.h
|
@echo "#define CONFIG_XUPV2P 1" > $(obj)include/config.h
|
||||||
@@ -2863,9 +2895,9 @@ $(BFIN_BOARDS):
|
|||||||
#========================================================================
|
#========================================================================
|
||||||
# AVR32
|
# AVR32
|
||||||
#========================================================================
|
#========================================================================
|
||||||
#########################################################################
|
|
||||||
## AT32AP70xx
|
atngw100_config : unconfig
|
||||||
#########################################################################
|
@$(MKCONFIG) $(@:_config=) avr32 at32ap atngw100 atmel at32ap700x
|
||||||
|
|
||||||
atstk1002_config : unconfig
|
atstk1002_config : unconfig
|
||||||
@$(MKCONFIG) $(@:_config=) avr32 at32ap atstk1000 atmel at32ap700x
|
@$(MKCONFIG) $(@:_config=) avr32 at32ap atstk1000 atmel at32ap700x
|
||||||
@@ -2876,54 +2908,65 @@ atstk1003_config : unconfig
|
|||||||
atstk1004_config : unconfig
|
atstk1004_config : unconfig
|
||||||
@$(MKCONFIG) $(@:_config=) avr32 at32ap atstk1000 atmel at32ap700x
|
@$(MKCONFIG) $(@:_config=) avr32 at32ap atstk1000 atmel at32ap700x
|
||||||
|
|
||||||
atngw100_config : unconfig
|
atstk1006_config : unconfig
|
||||||
@$(MKCONFIG) $(@:_config=) avr32 at32ap atngw100 atmel at32ap700x
|
@$(MKCONFIG) $(@:_config=) avr32 at32ap atstk1000 atmel at32ap700x
|
||||||
|
|
||||||
#########################################################################
|
#========================================================================
|
||||||
#########################################################################
|
# SH3 (SuperH)
|
||||||
#########################################################################
|
#========================================================================
|
||||||
|
|
||||||
#########################################################################
|
#########################################################################
|
||||||
## sh3 (Renesas SuperH)
|
## sh3 (Renesas SuperH)
|
||||||
#########################################################################
|
#########################################################################
|
||||||
|
|
||||||
mpr2_config: unconfig
|
mpr2_config: unconfig
|
||||||
@ >include/config.h
|
@mkdir -p $(obj)include
|
||||||
@echo "#define CONFIG_MPR2 1" >> include/config.h
|
@echo "#define CONFIG_MPR2 1" > $(obj)include/config.h
|
||||||
@$(MKCONFIG) -a $(@:_config=) sh sh3 mpr2
|
@$(MKCONFIG) -a $(@:_config=) sh sh3 mpr2
|
||||||
|
|
||||||
ms7720se_config: unconfig
|
ms7720se_config: unconfig
|
||||||
@echo "#define CONFIG_MS7720SE 1" > include/config.h
|
@mkdir -p $(obj)include
|
||||||
|
@echo "#define CONFIG_MS7720SE 1" > $(obj)include/config.h
|
||||||
@$(MKCONFIG) -a $(@:_config=) sh sh3 ms7720se
|
@$(MKCONFIG) -a $(@:_config=) sh sh3 ms7720se
|
||||||
|
|
||||||
#########################################################################
|
#########################################################################
|
||||||
## sh4 (Renesas SuperH)
|
## sh4 (Renesas SuperH)
|
||||||
#########################################################################
|
#########################################################################
|
||||||
|
|
||||||
|
MigoR_config : unconfig
|
||||||
|
@mkdir -p $(obj)include
|
||||||
|
@echo "#define CONFIG_MIGO_R 1" > $(obj)include/config.h
|
||||||
|
@./mkconfig -a $(@:_config=) sh sh4 MigoR
|
||||||
|
|
||||||
ms7750se_config: unconfig
|
ms7750se_config: unconfig
|
||||||
|
@mkdir -p $(obj)include
|
||||||
@echo "#define CONFIG_MS7750SE 1" > $(obj)include/config.h
|
@echo "#define CONFIG_MS7750SE 1" > $(obj)include/config.h
|
||||||
@$(MKCONFIG) -a $(@:_config=) sh sh4 ms7750se
|
@$(MKCONFIG) -a $(@:_config=) sh sh4 ms7750se
|
||||||
|
|
||||||
ms7722se_config : unconfig
|
ms7722se_config : unconfig
|
||||||
|
@mkdir -p $(obj)include
|
||||||
@echo "#define CONFIG_MS7722SE 1" > $(obj)include/config.h
|
@echo "#define CONFIG_MS7722SE 1" > $(obj)include/config.h
|
||||||
@$(MKCONFIG) -a $(@:_config=) sh sh4 ms7722se
|
@$(MKCONFIG) -a $(@:_config=) sh sh4 ms7722se
|
||||||
|
|
||||||
MigoR_config : unconfig
|
r2dplus_config : unconfig
|
||||||
@ >include/config.h
|
@mkdir -p $(obj)include
|
||||||
@echo "#define CONFIG_MIGO_R 1" >> include/config.h
|
@echo "#define CONFIG_R2DPLUS 1" > $(obj)include/config.h
|
||||||
@./mkconfig -a $(@:_config=) sh sh4 MigoR
|
@./mkconfig -a $(@:_config=) sh sh4 r2dplus
|
||||||
|
|
||||||
r7780mp_config: unconfig
|
r7780mp_config: unconfig
|
||||||
@ >include/config.h
|
@mkdir -p $(obj)include
|
||||||
@echo "#define CONFIG_R7780MP 1" >> include/config.h
|
@echo "#define CONFIG_R7780MP 1" > $(obj)include/config.h
|
||||||
@./mkconfig -a $(@:_config=) sh sh4 r7780mp
|
@./mkconfig -a $(@:_config=) sh sh4 r7780mp
|
||||||
|
|
||||||
r2dplus_config : unconfig
|
sh7763rdp_config : unconfig
|
||||||
@ >include/config.h
|
@mkdir -p $(obj)include
|
||||||
@echo "#define CONFIG_R2DPLUS 1" >> include/config.h
|
@echo "#define CONFIG_SH7763RDP 1" > $(obj)include/config.h
|
||||||
@./mkconfig -a $(@:_config=) sh sh4 r2dplus
|
@./mkconfig -a $(@:_config=) sh sh4 sh7763rdp
|
||||||
|
|
||||||
#========================================================================
|
#========================================================================
|
||||||
# SPARC
|
# SPARC
|
||||||
#========================================================================
|
#========================================================================
|
||||||
|
|
||||||
#########################################################################
|
#########################################################################
|
||||||
## LEON3
|
## LEON3
|
||||||
#########################################################################
|
#########################################################################
|
||||||
|
|||||||
173
README
173
README
@@ -74,7 +74,7 @@ git://www.denx.de/git/u-boot.git ; you can browse it online at
|
|||||||
http://www.denx.de/cgi-bin/gitweb.cgi?p=u-boot.git;a=summary
|
http://www.denx.de/cgi-bin/gitweb.cgi?p=u-boot.git;a=summary
|
||||||
|
|
||||||
The "snapshot" links on this page allow you to download tarballs of
|
The "snapshot" links on this page allow you to download tarballs of
|
||||||
any version you might be interested in. Ofifcial releases are also
|
any version you might be interested in. Official releases are also
|
||||||
available for FTP download from the ftp://ftp.denx.de/pub/u-boot/
|
available for FTP download from the ftp://ftp.denx.de/pub/u-boot/
|
||||||
directory.
|
directory.
|
||||||
|
|
||||||
@@ -94,11 +94,11 @@ Where we come from:
|
|||||||
* Provide extended interface to Linux boot loader
|
* Provide extended interface to Linux boot loader
|
||||||
* S-Record download
|
* S-Record download
|
||||||
* network boot
|
* network boot
|
||||||
* PCMCIA / CompactFLash / ATA disk / SCSI ... boot
|
* PCMCIA / CompactFlash / ATA disk / SCSI ... boot
|
||||||
- create ARMBoot project (http://sourceforge.net/projects/armboot)
|
- create ARMBoot project (http://sourceforge.net/projects/armboot)
|
||||||
- add other CPU families (starting with ARM)
|
- add other CPU families (starting with ARM)
|
||||||
- create U-Boot project (http://sourceforge.net/projects/u-boot)
|
- create U-Boot project (http://sourceforge.net/projects/u-boot)
|
||||||
- current project page: see http://www.denx.de/wiki/UBoot
|
- current project page: see http://www.denx.de/wiki/U-Boot
|
||||||
|
|
||||||
|
|
||||||
Names and Spelling:
|
Names and Spelling:
|
||||||
@@ -230,7 +230,7 @@ Example: For a TQM823L module type:
|
|||||||
cd u-boot
|
cd u-boot
|
||||||
make TQM823L_config
|
make TQM823L_config
|
||||||
|
|
||||||
For the Cogent platform, you need to specify the cpu type as well;
|
For the Cogent platform, you need to specify the CPU type as well;
|
||||||
e.g. "make cogent_mpc8xx_config". And also configure the cogent
|
e.g. "make cogent_mpc8xx_config". And also configure the cogent
|
||||||
directory according to the instructions in cogent/README.
|
directory according to the instructions in cogent/README.
|
||||||
|
|
||||||
@@ -278,7 +278,7 @@ The following options need to be configured:
|
|||||||
- Motherboard Options: (if CONFIG_CMA101 or CONFIG_CMA102 are defined)
|
- Motherboard Options: (if CONFIG_CMA101 or CONFIG_CMA102 are defined)
|
||||||
Define one or more of
|
Define one or more of
|
||||||
CONFIG_LCD_HEARTBEAT - update a character position on
|
CONFIG_LCD_HEARTBEAT - update a character position on
|
||||||
the lcd display every second with
|
the LCD display every second with
|
||||||
a "rotator" |\-/|\-/
|
a "rotator" |\-/|\-/
|
||||||
|
|
||||||
- Board flavour: (if CONFIG_MPC8260ADS is defined)
|
- Board flavour: (if CONFIG_MPC8260ADS is defined)
|
||||||
@@ -293,7 +293,7 @@ The following options need to be configured:
|
|||||||
Define exactly one of
|
Define exactly one of
|
||||||
CONFIG_MPC8240, CONFIG_MPC8245
|
CONFIG_MPC8240, CONFIG_MPC8245
|
||||||
|
|
||||||
- 8xx CPU Options: (if using an MPC8xx cpu)
|
- 8xx CPU Options: (if using an MPC8xx CPU)
|
||||||
CONFIG_8xx_GCLK_FREQ - deprecated: CPU clock if
|
CONFIG_8xx_GCLK_FREQ - deprecated: CPU clock if
|
||||||
get_gclk_freq() cannot work
|
get_gclk_freq() cannot work
|
||||||
e.g. if there is no 32KHz
|
e.g. if there is no 32KHz
|
||||||
@@ -346,11 +346,11 @@ The following options need to be configured:
|
|||||||
|
|
||||||
CONFIG_MEMSIZE_IN_BYTES [relevant for MIPS only]
|
CONFIG_MEMSIZE_IN_BYTES [relevant for MIPS only]
|
||||||
|
|
||||||
When transfering memsize parameter to linux, some versions
|
When transferring memsize parameter to linux, some versions
|
||||||
expect it to be in bytes, others in MB.
|
expect it to be in bytes, others in MB.
|
||||||
Define CONFIG_MEMSIZE_IN_BYTES to make it in bytes.
|
Define CONFIG_MEMSIZE_IN_BYTES to make it in bytes.
|
||||||
|
|
||||||
CONFIG_OF_LIBFDT / CONFIG_OF_FLAT_TREE
|
CONFIG_OF_LIBFDT
|
||||||
|
|
||||||
New kernel versions are expecting firmware settings to be
|
New kernel versions are expecting firmware settings to be
|
||||||
passed using flattened device trees (based on open firmware
|
passed using flattened device trees (based on open firmware
|
||||||
@@ -361,19 +361,13 @@ The following options need to be configured:
|
|||||||
* Adds the "fdt" command
|
* Adds the "fdt" command
|
||||||
* The bootm command automatically updates the fdt
|
* The bootm command automatically updates the fdt
|
||||||
|
|
||||||
CONFIG_OF_FLAT_TREE
|
|
||||||
* Deprecated, see CONFIG_OF_LIBFDT
|
|
||||||
* Original ft_build.c-based support
|
|
||||||
* Automatically modifies the dft as part of the bootm command
|
|
||||||
* The environment variable "disable_of", when set,
|
|
||||||
disables this functionality.
|
|
||||||
|
|
||||||
OF_CPU - The proper name of the cpus node.
|
OF_CPU - The proper name of the cpus node.
|
||||||
OF_SOC - The proper name of the soc node.
|
OF_SOC - The proper name of the soc node.
|
||||||
OF_TBCLK - The timebase frequency.
|
OF_TBCLK - The timebase frequency.
|
||||||
OF_STDOUT_PATH - The path to the console device
|
OF_STDOUT_PATH - The path to the console device
|
||||||
|
|
||||||
boards with QUICC Engines require OF_QE to set UCC mac addresses
|
boards with QUICC Engines require OF_QE to set UCC MAC
|
||||||
|
addresses
|
||||||
|
|
||||||
CONFIG_OF_BOARD_SETUP
|
CONFIG_OF_BOARD_SETUP
|
||||||
|
|
||||||
@@ -382,7 +376,7 @@ The following options need to be configured:
|
|||||||
|
|
||||||
CONFIG_OF_BOOT_CPU
|
CONFIG_OF_BOOT_CPU
|
||||||
|
|
||||||
This define fills in the correct boot cpu in the boot
|
This define fills in the correct boot CPU in the boot
|
||||||
param header, the default value is zero if undefined.
|
param header, the default value is zero if undefined.
|
||||||
|
|
||||||
- Serial Ports:
|
- Serial Ports:
|
||||||
@@ -452,7 +446,7 @@ The following options need to be configured:
|
|||||||
linux_logo.h for logo.
|
linux_logo.h for logo.
|
||||||
Requires CONFIG_VIDEO_LOGO
|
Requires CONFIG_VIDEO_LOGO
|
||||||
CONFIG_CONSOLE_EXTRA_INFO
|
CONFIG_CONSOLE_EXTRA_INFO
|
||||||
addional board info beside
|
additional board info beside
|
||||||
the logo
|
the logo
|
||||||
|
|
||||||
When CONFIG_CFB_CONSOLE is defined, video console is
|
When CONFIG_CFB_CONSOLE is defined, video console is
|
||||||
@@ -522,7 +516,7 @@ The following options need to be configured:
|
|||||||
The value of these goes into the environment as
|
The value of these goes into the environment as
|
||||||
"ramboot" and "nfsboot" respectively, and can be used
|
"ramboot" and "nfsboot" respectively, and can be used
|
||||||
as a convenience, when switching between booting from
|
as a convenience, when switching between booting from
|
||||||
ram and nfs.
|
RAM and NFS.
|
||||||
|
|
||||||
- Pre-Boot Commands:
|
- Pre-Boot Commands:
|
||||||
CONFIG_PREBOOT
|
CONFIG_PREBOOT
|
||||||
@@ -742,11 +736,11 @@ The following options need to be configured:
|
|||||||
Support for Intel 8254x gigabit chips.
|
Support for Intel 8254x gigabit chips.
|
||||||
|
|
||||||
CONFIG_E1000_FALLBACK_MAC
|
CONFIG_E1000_FALLBACK_MAC
|
||||||
default MAC for empty eeprom after production.
|
default MAC for empty EEPROM after production.
|
||||||
|
|
||||||
CONFIG_EEPRO100
|
CONFIG_EEPRO100
|
||||||
Support for Intel 82557/82559/82559ER chips.
|
Support for Intel 82557/82559/82559ER chips.
|
||||||
Optional CONFIG_EEPRO100_SROM_WRITE enables eeprom
|
Optional CONFIG_EEPRO100_SROM_WRITE enables EEPROM
|
||||||
write routine for first time initialisation.
|
write routine for first time initialisation.
|
||||||
|
|
||||||
CONFIG_TULIP
|
CONFIG_TULIP
|
||||||
@@ -786,6 +780,21 @@ The following options need to be configured:
|
|||||||
Define this to use i/o functions instead of macros
|
Define this to use i/o functions instead of macros
|
||||||
(some hardware wont work with macros)
|
(some hardware wont work with macros)
|
||||||
|
|
||||||
|
CONFIG_DRIVER_SMC911X
|
||||||
|
Support for SMSC's LAN911x and LAN921x chips
|
||||||
|
|
||||||
|
CONFIG_DRIVER_SMC911X_BASE
|
||||||
|
Define this to hold the physical address
|
||||||
|
of the device (I/O space)
|
||||||
|
|
||||||
|
CONFIG_DRIVER_SMC911X_32_BIT
|
||||||
|
Define this if data bus is 32 bits
|
||||||
|
|
||||||
|
CONFIG_DRIVER_SMC911X_16_BIT
|
||||||
|
Define this if data bus is 16 bits. If your processor
|
||||||
|
automatically converts one 32 bit word to two 16 bit
|
||||||
|
words you may also try CONFIG_DRIVER_SMC911X_32_BIT.
|
||||||
|
|
||||||
- USB Support:
|
- USB Support:
|
||||||
At the moment only the UHCI host controller is
|
At the moment only the UHCI host controller is
|
||||||
supported (PIP405, MIP405, MPC5200); define
|
supported (PIP405, MIP405, MPC5200); define
|
||||||
@@ -810,7 +819,7 @@ The following options need to be configured:
|
|||||||
Define the below if you wish to use the USB console.
|
Define the below if you wish to use the USB console.
|
||||||
Once firmware is rebuilt from a serial console issue the
|
Once firmware is rebuilt from a serial console issue the
|
||||||
command "setenv stdin usbtty; setenv stdout usbtty" and
|
command "setenv stdin usbtty; setenv stdout usbtty" and
|
||||||
attach your usb cable. The Unix command "dmesg" should print
|
attach your USB cable. The Unix command "dmesg" should print
|
||||||
it has found a new device. The environment variable usbtty
|
it has found a new device. The environment variable usbtty
|
||||||
can be set to gserial or cdc_acm to enable your device to
|
can be set to gserial or cdc_acm to enable your device to
|
||||||
appear to a USB host as a Linux gserial device or a
|
appear to a USB host as a Linux gserial device or a
|
||||||
@@ -924,7 +933,7 @@ The following options need to be configured:
|
|||||||
assumed.
|
assumed.
|
||||||
|
|
||||||
For the CT69000 and SMI_LYNXEM drivers, videomode is
|
For the CT69000 and SMI_LYNXEM drivers, videomode is
|
||||||
selected via environment 'videomode'. Two diferent ways
|
selected via environment 'videomode'. Two different ways
|
||||||
are possible:
|
are possible:
|
||||||
- "videomode=num" 'num' is a standard LiLo mode numbers.
|
- "videomode=num" 'num' is a standard LiLo mode numbers.
|
||||||
Following standard modes are supported (* is default):
|
Following standard modes are supported (* is default):
|
||||||
@@ -961,6 +970,10 @@ The following options need to be configured:
|
|||||||
display); also select one of the supported displays
|
display); also select one of the supported displays
|
||||||
by defining one of these:
|
by defining one of these:
|
||||||
|
|
||||||
|
CONFIG_ATMEL_LCD:
|
||||||
|
|
||||||
|
HITACHI TX09D70VM1CCA, 3.5", 240x320.
|
||||||
|
|
||||||
CONFIG_NEC_NL6448AC33:
|
CONFIG_NEC_NL6448AC33:
|
||||||
|
|
||||||
NEC NL6448AC33-18. Active, color, single scan.
|
NEC NL6448AC33-18. Active, color, single scan.
|
||||||
@@ -1043,7 +1056,7 @@ The following options need to be configured:
|
|||||||
CONFIG_PHY_GIGE
|
CONFIG_PHY_GIGE
|
||||||
|
|
||||||
If this option is set, support for speed/duplex
|
If this option is set, support for speed/duplex
|
||||||
detection of Gigabit PHY is included.
|
detection of gigabit PHY is included.
|
||||||
|
|
||||||
CONFIG_PHY_RESET_DELAY
|
CONFIG_PHY_RESET_DELAY
|
||||||
|
|
||||||
@@ -1062,21 +1075,21 @@ The following options need to be configured:
|
|||||||
CONFIG_ETH2ADDR
|
CONFIG_ETH2ADDR
|
||||||
CONFIG_ETH3ADDR
|
CONFIG_ETH3ADDR
|
||||||
|
|
||||||
Define a default value for ethernet address to use
|
Define a default value for Ethernet address to use
|
||||||
for the respective ethernet interface, in case this
|
for the respective Ethernet interface, in case this
|
||||||
is not determined automatically.
|
is not determined automatically.
|
||||||
|
|
||||||
- IP address:
|
- IP address:
|
||||||
CONFIG_IPADDR
|
CONFIG_IPADDR
|
||||||
|
|
||||||
Define a default value for the IP address to use for
|
Define a default value for the IP address to use for
|
||||||
the default ethernet interface, in case this is not
|
the default Ethernet interface, in case this is not
|
||||||
determined through e.g. bootp.
|
determined through e.g. bootp.
|
||||||
|
|
||||||
- Server IP address:
|
- Server IP address:
|
||||||
CONFIG_SERVERIP
|
CONFIG_SERVERIP
|
||||||
|
|
||||||
Defines a default value for theIP address of a TFTP
|
Defines a default value for the IP address of a TFTP
|
||||||
server to contact when using the "tftboot" command.
|
server to contact when using the "tftboot" command.
|
||||||
|
|
||||||
- Multicast TFTP Mode:
|
- Multicast TFTP Mode:
|
||||||
@@ -1084,7 +1097,7 @@ The following options need to be configured:
|
|||||||
|
|
||||||
Defines whether you want to support multicast TFTP as per
|
Defines whether you want to support multicast TFTP as per
|
||||||
rfc-2090; for example to work with atftp. Lets lots of targets
|
rfc-2090; for example to work with atftp. Lets lots of targets
|
||||||
tftp down the same boot image concurrently. Note: the ethernet
|
tftp down the same boot image concurrently. Note: the Ethernet
|
||||||
driver in use must provide a function: mcast() to join/leave a
|
driver in use must provide a function: mcast() to join/leave a
|
||||||
multicast group.
|
multicast group.
|
||||||
|
|
||||||
@@ -1172,7 +1185,7 @@ The following options need to be configured:
|
|||||||
|
|
||||||
A printf format string which contains the ascii name of
|
A printf format string which contains the ascii name of
|
||||||
the port. Normally is set to "eth%d" which sets
|
the port. Normally is set to "eth%d" which sets
|
||||||
eth0 for the first ethernet, eth1 for the second etc.
|
eth0 for the first Ethernet, eth1 for the second etc.
|
||||||
|
|
||||||
CONFIG_CDP_CAPABILITIES
|
CONFIG_CDP_CAPABILITIES
|
||||||
|
|
||||||
@@ -1221,7 +1234,7 @@ The following options need to be configured:
|
|||||||
|
|
||||||
These enable I2C serial bus commands. Defining either of
|
These enable I2C serial bus commands. Defining either of
|
||||||
(but not both of) CONFIG_HARD_I2C or CONFIG_SOFT_I2C will
|
(but not both of) CONFIG_HARD_I2C or CONFIG_SOFT_I2C will
|
||||||
include the appropriate I2C driver for the selected cpu.
|
include the appropriate I2C driver for the selected CPU.
|
||||||
|
|
||||||
This will allow you to use i2c commands at the u-boot
|
This will allow you to use i2c commands at the u-boot
|
||||||
command line (as long as you set CONFIG_CMD_I2C in
|
command line (as long as you set CONFIG_CMD_I2C in
|
||||||
@@ -1246,10 +1259,10 @@ The following options need to be configured:
|
|||||||
In both cases you will need to define CFG_I2C_SPEED
|
In both cases you will need to define CFG_I2C_SPEED
|
||||||
to be the frequency (in Hz) at which you wish your i2c bus
|
to be the frequency (in Hz) at which you wish your i2c bus
|
||||||
to run and CFG_I2C_SLAVE to be the address of this node (ie
|
to run and CFG_I2C_SLAVE to be the address of this node (ie
|
||||||
the cpu's i2c node address).
|
the CPU's i2c node address).
|
||||||
|
|
||||||
Now, the u-boot i2c code for the mpc8xx (cpu/mpc8xx/i2c.c)
|
Now, the u-boot i2c code for the mpc8xx (cpu/mpc8xx/i2c.c)
|
||||||
sets the cpu up as a master node and so its address should
|
sets the CPU up as a master node and so its address should
|
||||||
therefore be cleared to 0 (See, eg, MPC823e User's Manual
|
therefore be cleared to 0 (See, eg, MPC823e User's Manual
|
||||||
p.16-473). So, set CFG_I2C_SLAVE to 0.
|
p.16-473). So, set CFG_I2C_SLAVE to 0.
|
||||||
|
|
||||||
@@ -1468,17 +1481,17 @@ The following options need to be configured:
|
|||||||
Maximum time to wait for the INIT_B line to deassert
|
Maximum time to wait for the INIT_B line to deassert
|
||||||
after PROB_B has been deasserted during a Virtex II
|
after PROB_B has been deasserted during a Virtex II
|
||||||
FPGA configuration sequence. The default time is 500
|
FPGA configuration sequence. The default time is 500
|
||||||
mS.
|
ms.
|
||||||
|
|
||||||
CFG_FPGA_WAIT_BUSY
|
CFG_FPGA_WAIT_BUSY
|
||||||
|
|
||||||
Maximum time to wait for BUSY to deassert during
|
Maximum time to wait for BUSY to deassert during
|
||||||
Virtex II FPGA configuration. The default is 5 mS.
|
Virtex II FPGA configuration. The default is 5 ms.
|
||||||
|
|
||||||
CFG_FPGA_WAIT_CONFIG
|
CFG_FPGA_WAIT_CONFIG
|
||||||
|
|
||||||
Time to wait after FPGA configuration. The default is
|
Time to wait after FPGA configuration. The default is
|
||||||
200 mS.
|
200 ms.
|
||||||
|
|
||||||
- Configuration Management:
|
- Configuration Management:
|
||||||
CONFIG_IDENT_STRING
|
CONFIG_IDENT_STRING
|
||||||
@@ -1495,7 +1508,7 @@ The following options need to be configured:
|
|||||||
protects these variables from casual modification by
|
protects these variables from casual modification by
|
||||||
the user. Once set, these variables are read-only,
|
the user. Once set, these variables are read-only,
|
||||||
and write or delete attempts are rejected. You can
|
and write or delete attempts are rejected. You can
|
||||||
change this behviour:
|
change this behaviour:
|
||||||
|
|
||||||
If CONFIG_ENV_OVERWRITE is #defined in your config
|
If CONFIG_ENV_OVERWRITE is #defined in your config
|
||||||
file, the write protection for vendor parameters is
|
file, the write protection for vendor parameters is
|
||||||
@@ -1504,7 +1517,7 @@ The following options need to be configured:
|
|||||||
|
|
||||||
Alternatively, if you #define _both_ CONFIG_ETHADDR
|
Alternatively, if you #define _both_ CONFIG_ETHADDR
|
||||||
_and_ CONFIG_OVERWRITE_ETHADDR_ONCE, a default
|
_and_ CONFIG_OVERWRITE_ETHADDR_ONCE, a default
|
||||||
ethernet address is installed in the environment,
|
Ethernet address is installed in the environment,
|
||||||
which can be changed exactly ONCE by the user. [The
|
which can be changed exactly ONCE by the user. [The
|
||||||
serial# is unaffected by this, i. e. it remains
|
serial# is unaffected by this, i. e. it remains
|
||||||
read-only.]
|
read-only.]
|
||||||
@@ -1548,7 +1561,7 @@ The following options need to be configured:
|
|||||||
Define this variable to stop the system in case of a
|
Define this variable to stop the system in case of a
|
||||||
fatal error, so that you have to reset it manually.
|
fatal error, so that you have to reset it manually.
|
||||||
This is probably NOT a good idea for an embedded
|
This is probably NOT a good idea for an embedded
|
||||||
system where you want to system to reboot
|
system where you want the system to reboot
|
||||||
automatically as fast as possible, but it may be
|
automatically as fast as possible, but it may be
|
||||||
useful during development since you can try to debug
|
useful during development since you can try to debug
|
||||||
the conditions that lead to the situation.
|
the conditions that lead to the situation.
|
||||||
@@ -1615,7 +1628,7 @@ The following options need to be configured:
|
|||||||
- Commandline Editing and History:
|
- Commandline Editing and History:
|
||||||
CONFIG_CMDLINE_EDITING
|
CONFIG_CMDLINE_EDITING
|
||||||
|
|
||||||
Enable editiong and History functions for interactive
|
Enable editing and History functions for interactive
|
||||||
commandline input operations
|
commandline input operations
|
||||||
|
|
||||||
- Default Environment:
|
- Default Environment:
|
||||||
@@ -1656,7 +1669,7 @@ The following options need to be configured:
|
|||||||
|
|
||||||
Adding this option adds support for Xilinx SystemACE
|
Adding this option adds support for Xilinx SystemACE
|
||||||
chips attached via some sort of local bus. The address
|
chips attached via some sort of local bus. The address
|
||||||
of the chip must alsh be defined in the
|
of the chip must also be defined in the
|
||||||
CFG_SYSTEMACE_BASE macro. For example:
|
CFG_SYSTEMACE_BASE macro. For example:
|
||||||
|
|
||||||
#define CONFIG_SYSTEMACE
|
#define CONFIG_SYSTEMACE
|
||||||
@@ -1722,7 +1735,7 @@ Legacy uImage format:
|
|||||||
-12 common/image.c Ramdisk data has bad checksum
|
-12 common/image.c Ramdisk data has bad checksum
|
||||||
11 common/image.c Ramdisk data has correct checksum
|
11 common/image.c Ramdisk data has correct checksum
|
||||||
12 common/image.c Ramdisk verification complete, start loading
|
12 common/image.c Ramdisk verification complete, start loading
|
||||||
-13 common/image.c Wrong Image Type (not PPC Linux Ramdisk)
|
-13 common/image.c Wrong Image Type (not PPC Linux ramdisk)
|
||||||
13 common/image.c Start multifile image verification
|
13 common/image.c Start multifile image verification
|
||||||
14 common/image.c No initial ramdisk, no multifile, continue.
|
14 common/image.c No initial ramdisk, no multifile, continue.
|
||||||
|
|
||||||
@@ -1782,13 +1795,13 @@ Legacy uImage format:
|
|||||||
|
|
||||||
-60 common/env_common.c Environment has a bad CRC, using default
|
-60 common/env_common.c Environment has a bad CRC, using default
|
||||||
|
|
||||||
64 net/eth.c starting with Ethernetconfiguration.
|
64 net/eth.c starting with Ethernet configuration.
|
||||||
-64 net/eth.c no Ethernet found.
|
-64 net/eth.c no Ethernet found.
|
||||||
65 net/eth.c Ethernet found.
|
65 net/eth.c Ethernet found.
|
||||||
|
|
||||||
-80 common/cmd_net.c usage wrong
|
-80 common/cmd_net.c usage wrong
|
||||||
80 common/cmd_net.c before calling NetLoop()
|
80 common/cmd_net.c before calling NetLoop()
|
||||||
-81 common/cmd_net.c some error in NetLoop() occured
|
-81 common/cmd_net.c some error in NetLoop() occurred
|
||||||
81 common/cmd_net.c NetLoop() back without error
|
81 common/cmd_net.c NetLoop() back without error
|
||||||
-82 common/cmd_net.c size == 0 (File with size 0 loaded)
|
-82 common/cmd_net.c size == 0 (File with size 0 loaded)
|
||||||
82 common/cmd_net.c trying automatic boot
|
82 common/cmd_net.c trying automatic boot
|
||||||
@@ -1811,8 +1824,8 @@ FIT uImage format:
|
|||||||
105 common/cmd_bootm.c Kernel subimage hash verification OK
|
105 common/cmd_bootm.c Kernel subimage hash verification OK
|
||||||
-105 common/cmd_bootm.c Kernel subimage is for unsupported architecture
|
-105 common/cmd_bootm.c Kernel subimage is for unsupported architecture
|
||||||
106 common/cmd_bootm.c Architecture check OK
|
106 common/cmd_bootm.c Architecture check OK
|
||||||
-106 common/cmd_bootm.c Kernel subimage has wrong typea
|
-106 common/cmd_bootm.c Kernel subimage has wrong type
|
||||||
107 common/cmd_bootm.c Kernel subimge type OK
|
107 common/cmd_bootm.c Kernel subimage type OK
|
||||||
-107 common/cmd_bootm.c Can't get kernel subimage data/size
|
-107 common/cmd_bootm.c Can't get kernel subimage data/size
|
||||||
108 common/cmd_bootm.c Got kernel subimage data/size
|
108 common/cmd_bootm.c Got kernel subimage data/size
|
||||||
-108 common/cmd_bootm.c Wrong image type (not legacy, FIT)
|
-108 common/cmd_bootm.c Wrong image type (not legacy, FIT)
|
||||||
@@ -1825,7 +1838,7 @@ FIT uImage format:
|
|||||||
120 common/image.c Start initial ramdisk verification
|
120 common/image.c Start initial ramdisk verification
|
||||||
-120 common/image.c Ramdisk FIT image has incorrect format
|
-120 common/image.c Ramdisk FIT image has incorrect format
|
||||||
121 common/image.c Ramdisk FIT image has correct format
|
121 common/image.c Ramdisk FIT image has correct format
|
||||||
122 common/image.c No Ramdisk subimage unit name, using configuration
|
122 common/image.c No ramdisk subimage unit name, using configuration
|
||||||
-122 common/image.c Can't get configuration for ramdisk subimage
|
-122 common/image.c Can't get configuration for ramdisk subimage
|
||||||
123 common/image.c Ramdisk unit name specified
|
123 common/image.c Ramdisk unit name specified
|
||||||
-124 common/image.c Can't get ramdisk subimage node offset
|
-124 common/image.c Can't get ramdisk subimage node offset
|
||||||
@@ -1839,13 +1852,13 @@ FIT uImage format:
|
|||||||
129 common/image.c Can't get ramdisk load address
|
129 common/image.c Can't get ramdisk load address
|
||||||
-129 common/image.c Got ramdisk load address
|
-129 common/image.c Got ramdisk load address
|
||||||
|
|
||||||
-130 common/cmd_doc.c Icorrect FIT image format
|
-130 common/cmd_doc.c Incorrect FIT image format
|
||||||
131 common/cmd_doc.c FIT image format OK
|
131 common/cmd_doc.c FIT image format OK
|
||||||
|
|
||||||
-140 common/cmd_ide.c Icorrect FIT image format
|
-140 common/cmd_ide.c Incorrect FIT image format
|
||||||
141 common/cmd_ide.c FIT image format OK
|
141 common/cmd_ide.c FIT image format OK
|
||||||
|
|
||||||
-150 common/cmd_nand.c Icorrect FIT image format
|
-150 common/cmd_nand.c Incorrect FIT image format
|
||||||
151 common/cmd_nand.c FIT image format OK
|
151 common/cmd_nand.c FIT image format OK
|
||||||
|
|
||||||
|
|
||||||
@@ -1854,7 +1867,7 @@ Modem Support:
|
|||||||
|
|
||||||
[so far only for SMDK2400 and TRAB boards]
|
[so far only for SMDK2400 and TRAB boards]
|
||||||
|
|
||||||
- Modem support endable:
|
- Modem support enable:
|
||||||
CONFIG_MODEM_SUPPORT
|
CONFIG_MODEM_SUPPORT
|
||||||
|
|
||||||
- RTS/CTS Flow control enable:
|
- RTS/CTS Flow control enable:
|
||||||
@@ -1870,11 +1883,11 @@ Modem Support:
|
|||||||
|
|
||||||
There are common interrupt_init() and timer_interrupt()
|
There are common interrupt_init() and timer_interrupt()
|
||||||
for all PPC archs. interrupt_init() calls interrupt_init_cpu()
|
for all PPC archs. interrupt_init() calls interrupt_init_cpu()
|
||||||
for cpu specific initialization. interrupt_init_cpu()
|
for CPU specific initialization. interrupt_init_cpu()
|
||||||
should set decrementer_count to appropriate value. If
|
should set decrementer_count to appropriate value. If
|
||||||
cpu resets decrementer automatically after interrupt
|
CPU resets decrementer automatically after interrupt
|
||||||
(ppc4xx) it should set decrementer_count to zero.
|
(ppc4xx) it should set decrementer_count to zero.
|
||||||
timer_interrupt() calls timer_interrupt_cpu() for cpu
|
timer_interrupt() calls timer_interrupt_cpu() for CPU
|
||||||
specific handling. If board has watchdog / status_led
|
specific handling. If board has watchdog / status_led
|
||||||
/ other_activity_monitor it works automatically from
|
/ other_activity_monitor it works automatically from
|
||||||
general timer_interrupt().
|
general timer_interrupt().
|
||||||
@@ -1884,7 +1897,7 @@ Modem Support:
|
|||||||
In the target system modem support is enabled when a
|
In the target system modem support is enabled when a
|
||||||
specific key (key combination) is pressed during
|
specific key (key combination) is pressed during
|
||||||
power-on. Otherwise U-Boot will boot normally
|
power-on. Otherwise U-Boot will boot normally
|
||||||
(autoboot). The key_pressed() fuction is called from
|
(autoboot). The key_pressed() function is called from
|
||||||
board_init(). Currently key_pressed() is a dummy
|
board_init(). Currently key_pressed() is a dummy
|
||||||
function, returning 1 and thus enabling modem
|
function, returning 1 and thus enabling modem
|
||||||
initialization.
|
initialization.
|
||||||
@@ -1892,7 +1905,7 @@ Modem Support:
|
|||||||
If there are no modem init strings in the
|
If there are no modem init strings in the
|
||||||
environment, U-Boot proceed to autoboot; the
|
environment, U-Boot proceed to autoboot; the
|
||||||
previous output (banner, info printfs) will be
|
previous output (banner, info printfs) will be
|
||||||
supressed, though.
|
suppressed, though.
|
||||||
|
|
||||||
See also: doc/README.Modem
|
See also: doc/README.Modem
|
||||||
|
|
||||||
@@ -1948,7 +1961,7 @@ Configuration Settings:
|
|||||||
- CFG_MEM_TOP_HIDE (PPC only):
|
- CFG_MEM_TOP_HIDE (PPC only):
|
||||||
If CFG_MEM_TOP_HIDE is defined in the board config header,
|
If CFG_MEM_TOP_HIDE is defined in the board config header,
|
||||||
this specified memory area will get subtracted from the top
|
this specified memory area will get subtracted from the top
|
||||||
(end) of ram and won't get "touched" at all by U-Boot. By
|
(end) of RAM and won't get "touched" at all by U-Boot. By
|
||||||
fixing up gd->ram_size the Linux kernel should gets passed
|
fixing up gd->ram_size the Linux kernel should gets passed
|
||||||
the now "corrected" memory size and won't touch it either.
|
the now "corrected" memory size and won't touch it either.
|
||||||
This should work for arch/ppc and arch/powerpc. Only Linux
|
This should work for arch/ppc and arch/powerpc. Only Linux
|
||||||
@@ -2043,8 +2056,8 @@ Configuration Settings:
|
|||||||
|
|
||||||
The two-step approach is usually more reliable, since
|
The two-step approach is usually more reliable, since
|
||||||
you can check if the download worked before you erase
|
you can check if the download worked before you erase
|
||||||
the flash, but in some situations (when sytem RAM is
|
the flash, but in some situations (when system RAM is
|
||||||
too limited to allow for a tempory copy of the
|
too limited to allow for a temporary copy of the
|
||||||
downloaded image) this option may be very useful.
|
downloaded image) this option may be very useful.
|
||||||
|
|
||||||
- CFG_FLASH_CFI:
|
- CFG_FLASH_CFI:
|
||||||
@@ -2074,11 +2087,11 @@ Configuration Settings:
|
|||||||
column displays, 15 (3..1) for 40 column displays.
|
column displays, 15 (3..1) for 40 column displays.
|
||||||
|
|
||||||
- CFG_RX_ETH_BUFFER:
|
- CFG_RX_ETH_BUFFER:
|
||||||
Defines the number of ethernet receive buffers. On some
|
Defines the number of Ethernet receive buffers. On some
|
||||||
ethernet controllers it is recommended to set this value
|
Ethernet controllers it is recommended to set this value
|
||||||
to 8 or even higher (EEPRO100 or 405 EMAC), since all
|
to 8 or even higher (EEPRO100 or 405 EMAC), since all
|
||||||
buffers can be full shortly after enabling the interface
|
buffers can be full shortly after enabling the interface
|
||||||
on high ethernet traffic.
|
on high Ethernet traffic.
|
||||||
Defaults to 4 if not defined.
|
Defaults to 4 if not defined.
|
||||||
|
|
||||||
The following definitions that deal with the placement and management
|
The following definitions that deal with the placement and management
|
||||||
@@ -2146,7 +2159,7 @@ following configurations:
|
|||||||
CFG_ENV_SIZE_REDUND
|
CFG_ENV_SIZE_REDUND
|
||||||
|
|
||||||
These settings describe a second storage area used to hold
|
These settings describe a second storage area used to hold
|
||||||
a redundand copy of the environment data, so that there is
|
a redundant copy of the environment data, so that there is
|
||||||
a valid backup copy in case there is a power failure during
|
a valid backup copy in case there is a power failure during
|
||||||
a "saveenv" operation.
|
a "saveenv" operation.
|
||||||
|
|
||||||
@@ -2164,14 +2177,14 @@ accordingly!
|
|||||||
- CFG_ENV_ADDR:
|
- CFG_ENV_ADDR:
|
||||||
- CFG_ENV_SIZE:
|
- CFG_ENV_SIZE:
|
||||||
|
|
||||||
These two #defines are used to determin the memory area you
|
These two #defines are used to determine the memory area you
|
||||||
want to use for environment. It is assumed that this memory
|
want to use for environment. It is assumed that this memory
|
||||||
can just be read and written to, without any special
|
can just be read and written to, without any special
|
||||||
provision.
|
provision.
|
||||||
|
|
||||||
BE CAREFUL! The first access to the environment happens quite early
|
BE CAREFUL! The first access to the environment happens quite early
|
||||||
in U-Boot initalization (when we try to get the setting of for the
|
in U-Boot initalization (when we try to get the setting of for the
|
||||||
console baudrate). You *MUST* have mappend your NVRAM area then, or
|
console baudrate). You *MUST* have mapped your NVRAM area then, or
|
||||||
U-Boot will hang.
|
U-Boot will hang.
|
||||||
|
|
||||||
Please note that even with NVRAM we still use a copy of the
|
Please note that even with NVRAM we still use a copy of the
|
||||||
@@ -2320,14 +2333,14 @@ Low Level (hardware related) configuration options:
|
|||||||
|
|
||||||
CFG_ISA_IO_STRIDE
|
CFG_ISA_IO_STRIDE
|
||||||
|
|
||||||
defines the spacing between fdc chipset registers
|
defines the spacing between FDC chipset registers
|
||||||
(default value 1)
|
(default value 1)
|
||||||
|
|
||||||
CFG_ISA_IO_OFFSET
|
CFG_ISA_IO_OFFSET
|
||||||
|
|
||||||
defines the offset of register from address. It
|
defines the offset of register from address. It
|
||||||
depends on which part of the data bus is connected to
|
depends on which part of the data bus is connected to
|
||||||
the fdc chipset. (default value 0)
|
the FDC chipset. (default value 0)
|
||||||
|
|
||||||
If CFG_ISA_IO_STRIDE CFG_ISA_IO_OFFSET and
|
If CFG_ISA_IO_STRIDE CFG_ISA_IO_OFFSET and
|
||||||
CFG_FDC_DRIVE_NUMBER are undefined, they take their
|
CFG_FDC_DRIVE_NUMBER are undefined, they take their
|
||||||
@@ -2523,7 +2536,7 @@ Low Level (hardware related) configuration options:
|
|||||||
Normally these variables MUST NOT be defined. The
|
Normally these variables MUST NOT be defined. The
|
||||||
only exception is when U-Boot is loaded (to RAM) by
|
only exception is when U-Boot is loaded (to RAM) by
|
||||||
some other boot loader or by a debugger which
|
some other boot loader or by a debugger which
|
||||||
performs these intializations itself.
|
performs these initializations itself.
|
||||||
|
|
||||||
|
|
||||||
Building the Software:
|
Building the Software:
|
||||||
@@ -2558,7 +2571,7 @@ Note: for some board special configuration names may exist; check if
|
|||||||
additional information is available from the board vendor; for
|
additional information is available from the board vendor; for
|
||||||
instance, the TQM823L systems are available without (standard)
|
instance, the TQM823L systems are available without (standard)
|
||||||
or with LCD support. You can select such additional "features"
|
or with LCD support. You can select such additional "features"
|
||||||
when chosing the configuration, i. e.
|
when choosing the configuration, i. e.
|
||||||
|
|
||||||
make TQM823L_config
|
make TQM823L_config
|
||||||
- will configure for a plain TQM823L, i. e. no LCD support
|
- will configure for a plain TQM823L, i. e. no LCD support
|
||||||
@@ -2761,7 +2774,7 @@ Some configuration options can be set using Environment Variables:
|
|||||||
for use by the bootm command. See also "bootm_size"
|
for use by the bootm command. See also "bootm_size"
|
||||||
environment variable. Address defined by "bootm_low" is
|
environment variable. Address defined by "bootm_low" is
|
||||||
also the base of the initial memory mapping for the Linux
|
also the base of the initial memory mapping for the Linux
|
||||||
kernel -- see the descripton of CFG_BOOTMAPSZ.
|
kernel -- see the description of CFG_BOOTMAPSZ.
|
||||||
|
|
||||||
bootm_size - Memory range available for image processing in the bootm
|
bootm_size - Memory range available for image processing in the bootm
|
||||||
command can be restricted. This variable is given as
|
command can be restricted. This variable is given as
|
||||||
@@ -2868,7 +2881,7 @@ Some configuration options can be set using Environment Variables:
|
|||||||
themselves.
|
themselves.
|
||||||
|
|
||||||
npe_ucode - see CONFIG_IXP4XX_NPE_EXT_UCOD
|
npe_ucode - see CONFIG_IXP4XX_NPE_EXT_UCOD
|
||||||
if set load address for the npe microcode
|
if set load address for the NPE microcode
|
||||||
|
|
||||||
tftpsrcport - If this is set, the value is used for TFTP's
|
tftpsrcport - If this is set, the value is used for TFTP's
|
||||||
UDP source port.
|
UDP source port.
|
||||||
@@ -2877,7 +2890,7 @@ Some configuration options can be set using Environment Variables:
|
|||||||
destination port instead of the Well Know Port 69.
|
destination port instead of the Well Know Port 69.
|
||||||
|
|
||||||
vlan - When set to a value < 4095 the traffic over
|
vlan - When set to a value < 4095 the traffic over
|
||||||
ethernet is encapsulated/received over 802.1q
|
Ethernet is encapsulated/received over 802.1q
|
||||||
VLAN tagged frames.
|
VLAN tagged frames.
|
||||||
|
|
||||||
The following environment variables may be used and automatically
|
The following environment variables may be used and automatically
|
||||||
@@ -2955,14 +2968,14 @@ General rules:
|
|||||||
executed anyway.
|
executed anyway.
|
||||||
|
|
||||||
(2) If you execute several variables with one call to run (i. e.
|
(2) If you execute several variables with one call to run (i. e.
|
||||||
calling run with a list af variables as arguments), any failing
|
calling run with a list of variables as arguments), any failing
|
||||||
command will cause "run" to terminate, i. e. the remaining
|
command will cause "run" to terminate, i. e. the remaining
|
||||||
variables are not executed.
|
variables are not executed.
|
||||||
|
|
||||||
Note for Redundant Ethernet Interfaces:
|
Note for Redundant Ethernet Interfaces:
|
||||||
=======================================
|
=======================================
|
||||||
|
|
||||||
Some boards come with redundant ethernet interfaces; U-Boot supports
|
Some boards come with redundant Ethernet interfaces; U-Boot supports
|
||||||
such configurations and is capable of automatic selection of a
|
such configurations and is capable of automatic selection of a
|
||||||
"working" interface when needed. MAC assignment works as follows:
|
"working" interface when needed. MAC assignment works as follows:
|
||||||
|
|
||||||
@@ -3303,7 +3316,7 @@ parameters. You can check and modify this variable using the
|
|||||||
Memory: 15208k available (700k kernel code, 444k data, 32k init) [c0000000,c1000000]
|
Memory: 15208k available (700k kernel code, 444k data, 32k init) [c0000000,c1000000]
|
||||||
...
|
...
|
||||||
|
|
||||||
If you want to boot a Linux kernel with initial ram disk, you pass
|
If you want to boot a Linux kernel with initial RAM disk, you pass
|
||||||
the memory addresses of both the kernel and the initrd image (PPBCOOT
|
the memory addresses of both the kernel and the initrd image (PPBCOOT
|
||||||
format!) to the "bootm" command:
|
format!) to the "bootm" command:
|
||||||
|
|
||||||
@@ -3613,13 +3626,13 @@ locked as (mis-) used as memory, etc.
|
|||||||
require any physical RAM backing up the cache. The cleverness
|
require any physical RAM backing up the cache. The cleverness
|
||||||
is that the cache is being used as a temporary supply of
|
is that the cache is being used as a temporary supply of
|
||||||
necessary storage before the SDRAM controller is setup. It's
|
necessary storage before the SDRAM controller is setup. It's
|
||||||
beyond the scope of this list to expain the details, but you
|
beyond the scope of this list to explain the details, but you
|
||||||
can see how this works by studying the cache architecture and
|
can see how this works by studying the cache architecture and
|
||||||
operation in the architecture and processor-specific manuals.
|
operation in the architecture and processor-specific manuals.
|
||||||
|
|
||||||
OCM is On Chip Memory, which I believe the 405GP has 4K. It
|
OCM is On Chip Memory, which I believe the 405GP has 4K. It
|
||||||
is another option for the system designer to use as an
|
is another option for the system designer to use as an
|
||||||
initial stack/ram area prior to SDRAM being available. Either
|
initial stack/RAM area prior to SDRAM being available. Either
|
||||||
option should work for you. Using CS 4 should be fine if your
|
option should work for you. Using CS 4 should be fine if your
|
||||||
board designers haven't used it for something that would
|
board designers haven't used it for something that would
|
||||||
cause you grief during the initial boot! It is frequently not
|
cause you grief during the initial boot! It is frequently not
|
||||||
@@ -3644,7 +3657,7 @@ code for the initialization procedures:
|
|||||||
* Initialized global data (data segment) is read-only. Do not attempt
|
* Initialized global data (data segment) is read-only. Do not attempt
|
||||||
to write it.
|
to write it.
|
||||||
|
|
||||||
* Do not use any unitialized global data (or implicitely initialized
|
* Do not use any uninitialized global data (or implicitely initialized
|
||||||
as zero data - BSS segment) at all - this is undefined, initiali-
|
as zero data - BSS segment) at all - this is undefined, initiali-
|
||||||
zation is performed later (when relocating to RAM).
|
zation is performed later (when relocating to RAM).
|
||||||
|
|
||||||
@@ -3756,7 +3769,7 @@ System Initialization:
|
|||||||
----------------------
|
----------------------
|
||||||
|
|
||||||
In the reset configuration, U-Boot starts at the reset entry point
|
In the reset configuration, U-Boot starts at the reset entry point
|
||||||
(on most PowerPC systens at address 0x00000100). Because of the reset
|
(on most PowerPC systems at address 0x00000100). Because of the reset
|
||||||
configuration for CS0# this is a mirror of the onboard Flash memory.
|
configuration for CS0# this is a mirror of the onboard Flash memory.
|
||||||
To be able to re-map memory U-Boot then jumps to its link address.
|
To be able to re-map memory U-Boot then jumps to its link address.
|
||||||
To be able to implement the initialization code in C, a (small!)
|
To be able to implement the initialization code in C, a (small!)
|
||||||
@@ -3890,7 +3903,7 @@ may be rejected, even when they contain important and valuable stuff.
|
|||||||
|
|
||||||
Patches shall be sent to the u-boot-users mailing list.
|
Patches shall be sent to the u-boot-users mailing list.
|
||||||
|
|
||||||
Please see http://www.denx.de/wiki/UBoot/Patches for details.
|
Please see http://www.denx.de/wiki/U-Boot/Patches for details.
|
||||||
|
|
||||||
When you send a patch, please include the following information with
|
When you send a patch, please include the following information with
|
||||||
it:
|
it:
|
||||||
|
|||||||
@@ -1,5 +1,5 @@
|
|||||||
/*
|
/*
|
||||||
* (C) Copyright 2007 Semihalf
|
* (C) Copyright 2007-2008 Semihalf
|
||||||
*
|
*
|
||||||
* Written by: Rafal Jaworowski <raj@semihalf.com>
|
* Written by: Rafal Jaworowski <raj@semihalf.com>
|
||||||
*
|
*
|
||||||
@@ -46,14 +46,15 @@
|
|||||||
#define ENUM_USB 1
|
#define ENUM_USB 1
|
||||||
#define ENUM_SCSI 2
|
#define ENUM_SCSI 2
|
||||||
#define ENUM_MMC 3
|
#define ENUM_MMC 3
|
||||||
#define ENUM_MAX 4
|
#define ENUM_SATA 4
|
||||||
|
#define ENUM_MAX 5
|
||||||
|
|
||||||
struct stor_spec {
|
struct stor_spec {
|
||||||
int max_dev;
|
int max_dev;
|
||||||
int enum_started;
|
int enum_started;
|
||||||
int enum_ended;
|
int enum_ended;
|
||||||
int type; /* "external" type: DT_STOR_{IDE,USB,etc} */
|
int type; /* "external" type: DT_STOR_{IDE,USB,etc} */
|
||||||
char name[4];
|
char *name;
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct stor_spec specs[ENUM_MAX] = { { 0, 0, 0, 0, "" }, };
|
static struct stor_spec specs[ENUM_MAX] = { { 0, 0, 0, 0, "" }, };
|
||||||
@@ -68,12 +69,19 @@ void dev_stor_init(void)
|
|||||||
specs[ENUM_IDE].type = DEV_TYP_STOR | DT_STOR_IDE;
|
specs[ENUM_IDE].type = DEV_TYP_STOR | DT_STOR_IDE;
|
||||||
specs[ENUM_IDE].name = "ide";
|
specs[ENUM_IDE].name = "ide";
|
||||||
#endif
|
#endif
|
||||||
#if defined(CONFIG_CMD_USB)
|
#if defined(CONFIG_CMD_MMC)
|
||||||
specs[ENUM_USB].max_dev = USB_MAX_STOR_DEV;
|
specs[ENUM_MMC].max_dev = CFG_MMC_MAX_DEVICE;
|
||||||
specs[ENUM_USB].enum_started = 0;
|
specs[ENUM_MMC].enum_started = 0;
|
||||||
specs[ENUM_USB].enum_ended = 0;
|
specs[ENUM_MMC].enum_ended = 0;
|
||||||
specs[ENUM_USB].type = DEV_TYP_STOR | DT_STOR_USB;
|
specs[ENUM_MMC].type = DEV_TYP_STOR | DT_STOR_MMC;
|
||||||
specs[ENUM_USB].name = "usb";
|
specs[ENUM_MMC].name = "mmc";
|
||||||
|
#endif
|
||||||
|
#if defined(CONFIG_CMD_SATA)
|
||||||
|
specs[ENUM_SATA].max_dev = CFG_SATA_MAX_DEVICE;
|
||||||
|
specs[ENUM_SATA].enum_started = 0;
|
||||||
|
specs[ENUM_SATA].enum_ended = 0;
|
||||||
|
specs[ENUM_SATA].type = DEV_TYP_STOR | DT_STOR_SATA;
|
||||||
|
specs[ENUM_SATA].name = "sata";
|
||||||
#endif
|
#endif
|
||||||
#if defined(CONFIG_CMD_SCSI)
|
#if defined(CONFIG_CMD_SCSI)
|
||||||
specs[ENUM_SCSI].max_dev = CFG_SCSI_MAX_DEVICE;
|
specs[ENUM_SCSI].max_dev = CFG_SCSI_MAX_DEVICE;
|
||||||
@@ -82,6 +90,13 @@ void dev_stor_init(void)
|
|||||||
specs[ENUM_SCSI].type = DEV_TYP_STOR | DT_STOR_SCSI;
|
specs[ENUM_SCSI].type = DEV_TYP_STOR | DT_STOR_SCSI;
|
||||||
specs[ENUM_SCSI].name = "scsi";
|
specs[ENUM_SCSI].name = "scsi";
|
||||||
#endif
|
#endif
|
||||||
|
#if defined(CONFIG_CMD_USB) && defined(CONFIG_USB_STORAGE)
|
||||||
|
specs[ENUM_USB].max_dev = USB_MAX_STOR_DEV;
|
||||||
|
specs[ENUM_USB].enum_started = 0;
|
||||||
|
specs[ENUM_USB].enum_ended = 0;
|
||||||
|
specs[ENUM_USB].type = DEV_TYP_STOR | DT_STOR_USB;
|
||||||
|
specs[ENUM_USB].name = "usb";
|
||||||
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
@@ -108,7 +123,10 @@ static int dev_stor_get(int type, int first, int *more, struct device_info *di)
|
|||||||
|
|
||||||
if (first) {
|
if (first) {
|
||||||
di->cookie = (void *)get_dev(specs[type].name, 0);
|
di->cookie = (void *)get_dev(specs[type].name, 0);
|
||||||
found = 1;
|
if (di->cookie == NULL)
|
||||||
|
return 0;
|
||||||
|
else
|
||||||
|
found = 1;
|
||||||
|
|
||||||
} else {
|
} else {
|
||||||
for (i = 0; i < specs[type].max_dev; i++)
|
for (i = 0; i < specs[type].max_dev; i++)
|
||||||
@@ -123,7 +141,10 @@ static int dev_stor_get(int type, int first, int *more, struct device_info *di)
|
|||||||
}
|
}
|
||||||
|
|
||||||
di->cookie = (void *)get_dev(specs[type].name, i);
|
di->cookie = (void *)get_dev(specs[type].name, i);
|
||||||
found = 1;
|
if (di->cookie == NULL)
|
||||||
|
return 0;
|
||||||
|
else
|
||||||
|
found = 1;
|
||||||
|
|
||||||
/* provide hint if there are more devices in
|
/* provide hint if there are more devices in
|
||||||
* this group to enumerate */
|
* this group to enumerate */
|
||||||
@@ -360,7 +381,7 @@ lbasize_t dev_read_stor(void *cookie, void *buf, lbasize_t len, lbastart_t start
|
|||||||
return 0;
|
return 0;
|
||||||
|
|
||||||
if ((dd->block_read) == NULL) {
|
if ((dd->block_read) == NULL) {
|
||||||
debugf("no block_read() for device 0x%08x\n");
|
debugf("no block_read() for device 0x%08x\n", cookie);
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -1,5 +1,5 @@
|
|||||||
/*
|
/*
|
||||||
* (C) Copyright 2007 Semihalf
|
* (C) Copyright 2007-2008 Semihalf
|
||||||
*
|
*
|
||||||
* Written by: Rafal Jaworowski <raj@semihalf.com>
|
* Written by: Rafal Jaworowski <raj@semihalf.com>
|
||||||
*
|
*
|
||||||
@@ -31,13 +31,15 @@
|
|||||||
|
|
||||||
#define errf(fmt, args...) do { printf("ERROR @ %s(): ", __func__); printf(fmt, ##args); } while (0)
|
#define errf(fmt, args...) do { printf("ERROR @ %s(): ", __func__); printf(fmt, ##args); } while (0)
|
||||||
|
|
||||||
void test_dump_si(struct sys_info *);
|
#define BUF_SZ 2048
|
||||||
|
#define WAIT_SECS 5
|
||||||
|
|
||||||
|
void test_dump_buf(void *, int);
|
||||||
void test_dump_di(int);
|
void test_dump_di(int);
|
||||||
|
void test_dump_si(struct sys_info *);
|
||||||
void test_dump_sig(struct api_signature *);
|
void test_dump_sig(struct api_signature *);
|
||||||
|
|
||||||
char buf[2048];
|
static char buf[BUF_SZ];
|
||||||
|
|
||||||
#define WAIT_SECS 5
|
|
||||||
|
|
||||||
int main(int argc, char *argv[])
|
int main(int argc, char *argv[])
|
||||||
{
|
{
|
||||||
@@ -58,11 +60,12 @@ int main(int argc, char *argv[])
|
|||||||
if (sig->version > API_SIG_VERSION)
|
if (sig->version > API_SIG_VERSION)
|
||||||
return -3;
|
return -3;
|
||||||
|
|
||||||
printf("API signature found @%x\n", sig);
|
printf("API signature found @%x\n", (unsigned int)sig);
|
||||||
test_dump_sig(sig);
|
test_dump_sig(sig);
|
||||||
|
|
||||||
printf("\n*** Consumer API test ***\n");
|
printf("\n*** Consumer API test ***\n");
|
||||||
printf("syscall ptr 0x%08x@%08x\n", syscall_ptr, &syscall_ptr);
|
printf("syscall ptr 0x%08x@%08x\n", (unsigned int)syscall_ptr,
|
||||||
|
(unsigned int)&syscall_ptr);
|
||||||
|
|
||||||
/* console activities */
|
/* console activities */
|
||||||
ub_putc('B');
|
ub_putc('B');
|
||||||
@@ -125,11 +128,17 @@ int main(int argc, char *argv[])
|
|||||||
if (i == devs_no)
|
if (i == devs_no)
|
||||||
printf("No storage devices available\n");
|
printf("No storage devices available\n");
|
||||||
else {
|
else {
|
||||||
|
memset(buf, 0, BUF_SZ);
|
||||||
|
|
||||||
if ((rv = ub_dev_open(i)) != 0)
|
if ((rv = ub_dev_open(i)) != 0)
|
||||||
errf("open device %d error %d\n", i, rv);
|
errf("open device %d error %d\n", i, rv);
|
||||||
else if ((rv = ub_dev_read(i, &buf, 200, 20)) != 0)
|
|
||||||
|
else if ((rv = ub_dev_read(i, buf, 1, 0)) != 0)
|
||||||
errf("could not read from device %d, error %d\n", i, rv);
|
errf("could not read from device %d, error %d\n", i, rv);
|
||||||
|
|
||||||
|
printf("Sector 0 dump (512B):\n");
|
||||||
|
test_dump_buf(buf, 512);
|
||||||
|
|
||||||
ub_dev_close(i);
|
ub_dev_close(i);
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -180,7 +189,7 @@ void test_dump_sig(struct api_signature *sig)
|
|||||||
printf("signature:\n");
|
printf("signature:\n");
|
||||||
printf(" version\t= %d\n", sig->version);
|
printf(" version\t= %d\n", sig->version);
|
||||||
printf(" checksum\t= 0x%08x\n", sig->checksum);
|
printf(" checksum\t= 0x%08x\n", sig->checksum);
|
||||||
printf(" sc entry\t= 0x%08x\n", sig->syscall);
|
printf(" sc entry\t= 0x%08x\n", (unsigned int)sig->syscall);
|
||||||
}
|
}
|
||||||
|
|
||||||
void test_dump_si(struct sys_info *si)
|
void test_dump_si(struct sys_info *si)
|
||||||
@@ -188,9 +197,9 @@ void test_dump_si(struct sys_info *si)
|
|||||||
int i;
|
int i;
|
||||||
|
|
||||||
printf("sys info:\n");
|
printf("sys info:\n");
|
||||||
printf(" clkbus\t= 0x%08x\n", si->clk_bus);
|
printf(" clkbus\t= 0x%08x\n", (unsigned int)si->clk_bus);
|
||||||
printf(" clkcpu\t= 0x%08x\n", si->clk_cpu);
|
printf(" clkcpu\t= 0x%08x\n", (unsigned int)si->clk_cpu);
|
||||||
printf(" bar\t\t= 0x%08x\n", si->bar);
|
printf(" bar\t\t= 0x%08x\n", (unsigned int)si->bar);
|
||||||
|
|
||||||
printf("---\n");
|
printf("---\n");
|
||||||
for (i = 0; i < si->mr_no; i++) {
|
for (i = 0; i < si->mr_no; i++) {
|
||||||
@@ -217,23 +226,56 @@ void test_dump_si(struct sys_info *si)
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
static char * test_stor_typ(int type)
|
static char *test_stor_typ(int type)
|
||||||
{
|
{
|
||||||
if (type & DT_STOR_IDE)
|
if (type & DT_STOR_IDE)
|
||||||
return "IDE";
|
return "IDE";
|
||||||
|
|
||||||
|
if (type & DT_STOR_MMC)
|
||||||
|
return "MMC";
|
||||||
|
|
||||||
|
if (type & DT_STOR_SATA)
|
||||||
|
return "SATA";
|
||||||
|
|
||||||
if (type & DT_STOR_SCSI)
|
if (type & DT_STOR_SCSI)
|
||||||
return "SCSI";
|
return "SCSI";
|
||||||
|
|
||||||
if (type & DT_STOR_USB)
|
if (type & DT_STOR_USB)
|
||||||
return "USB";
|
return "USB";
|
||||||
|
|
||||||
if (type & DT_STOR_MMC);
|
|
||||||
return "MMC";
|
|
||||||
|
|
||||||
return "Unknown";
|
return "Unknown";
|
||||||
}
|
}
|
||||||
|
|
||||||
|
void test_dump_buf(void *buf, int len)
|
||||||
|
{
|
||||||
|
int i;
|
||||||
|
int line_counter = 0;
|
||||||
|
int sep_flag = 0;
|
||||||
|
int addr = 0;
|
||||||
|
|
||||||
|
printf("%07x:\t", addr);
|
||||||
|
|
||||||
|
for (i = 0; i < len; i++) {
|
||||||
|
if (line_counter++ > 15) {
|
||||||
|
line_counter = 0;
|
||||||
|
sep_flag = 0;
|
||||||
|
addr += 16;
|
||||||
|
i--;
|
||||||
|
printf("\n%07x:\t", addr);
|
||||||
|
continue;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (sep_flag++ > 1) {
|
||||||
|
sep_flag = 1;
|
||||||
|
printf(" ");
|
||||||
|
}
|
||||||
|
|
||||||
|
printf("%02x", *((char *)buf++));
|
||||||
|
}
|
||||||
|
|
||||||
|
printf("\n");
|
||||||
|
}
|
||||||
|
|
||||||
void test_dump_di(int handle)
|
void test_dump_di(int handle)
|
||||||
{
|
{
|
||||||
int i;
|
int i;
|
||||||
@@ -252,7 +294,7 @@ void test_dump_di(int handle)
|
|||||||
|
|
||||||
} else if (di->type & DEV_TYP_STOR) {
|
} else if (di->type & DEV_TYP_STOR) {
|
||||||
printf(" type\t\t= %s\n", test_stor_typ(di->type));
|
printf(" type\t\t= %s\n", test_stor_typ(di->type));
|
||||||
printf(" blk size\t\t= %d\n", di->di_stor.block_size);
|
printf(" blk size\t\t= %d\n", (unsigned int)di->di_stor.block_size);
|
||||||
printf(" blk count\t\t= %d\n", di->di_stor.block_count);
|
printf(" blk count\t\t= %d\n", (unsigned int)di->di_stor.block_count);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -39,53 +39,53 @@ int checkboard (void)
|
|||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
long int initdram (int board_type)
|
phys_size_t initdram (int board_type)
|
||||||
{
|
{
|
||||||
int size,i;
|
int size, i;
|
||||||
|
|
||||||
size = 0;
|
size = 0;
|
||||||
MCFSDRAMC_DCR = MCFSDRAMC_DCR_RTIM_6
|
MCFSDRAMC_DCR = MCFSDRAMC_DCR_RTIM_6
|
||||||
| MCFSDRAMC_DCR_RC((15 * CFG_CLK)>>4);
|
| MCFSDRAMC_DCR_RC ((15 * CFG_CLK) >> 4);
|
||||||
#ifdef CFG_SDRAM_BASE0
|
#ifdef CFG_SDRAM_BASE0
|
||||||
|
|
||||||
MCFSDRAMC_DACR0 = MCFSDRAMC_DACR_BASE(CFG_SDRAM_BASE0)
|
MCFSDRAMC_DACR0 = MCFSDRAMC_DACR_BASE (CFG_SDRAM_BASE0)
|
||||||
| MCFSDRAMC_DACR_CASL(1)
|
| MCFSDRAMC_DACR_CASL (1)
|
||||||
| MCFSDRAMC_DACR_CBM(3)
|
| MCFSDRAMC_DACR_CBM (3)
|
||||||
| MCFSDRAMC_DACR_PS_16);
|
| MCFSDRAMC_DACR_PS_16;
|
||||||
|
|
||||||
MCFSDRAMC_DMR0 = MCFSDRAMC_DMR_BAM_16M
|
MCFSDRAMC_DMR0 = MCFSDRAMC_DMR_BAM_16M | MCFSDRAMC_DMR_V;
|
||||||
| MCFSDRAMC_DMR_V;
|
|
||||||
|
|
||||||
MCFSDRAMC_DACR0 |= MCFSDRAMC_DACR_IP;
|
MCFSDRAMC_DACR0 |= MCFSDRAMC_DACR_IP;
|
||||||
|
|
||||||
*(unsigned short *)(CFG_SDRAM_BASE0) = 0xA5A5;
|
*(unsigned short *) (CFG_SDRAM_BASE0) = 0xA5A5;
|
||||||
MCFSDRAMC_DACR0 |= MCFSDRAMC_DACR_RE;
|
MCFSDRAMC_DACR0 |= MCFSDRAMC_DACR_RE;
|
||||||
for (i=0; i < 2000; i++)
|
for (i = 0; i < 2000; i++)
|
||||||
asm(" nop");
|
asm (" nop");
|
||||||
mbar_writeLong(MCFSDRAMC_DACR0, mbar_readLong(MCFSDRAMC_DACR0)
|
mbar_writeLong (MCFSDRAMC_DACR0,
|
||||||
| MCFSDRAMC_DACR_IMRS);
|
mbar_readLong (MCFSDRAMC_DACR0) | MCFSDRAMC_DACR_IMRS);
|
||||||
*(unsigned int *)(CFG_SDRAM_BASE0 + 0x220) = 0xA5A5;
|
*(unsigned int *) (CFG_SDRAM_BASE0 + 0x220) = 0xA5A5;
|
||||||
size += CFG_SDRAM_SIZE * 1024 * 1024;
|
size += CFG_SDRAM_SIZE * 1024 * 1024;
|
||||||
#endif
|
#endif
|
||||||
#ifdef CFG_SDRAM_BASE1
|
#ifdef CFG_SDRAM_BASE1
|
||||||
MCFSDRAMC_DACR1 = MCFSDRAMC_DACR_BASE(CFG_SDRAM_BASE1)
|
MCFSDRAMC_DACR1 = MCFSDRAMC_DACR_BASE (CFG_SDRAM_BASE1)
|
||||||
| MCFSDRAMC_DACR_CASL(1)
|
| MCFSDRAMC_DACR_CASL (1)
|
||||||
| MCFSDRAMC_DACR_CBM(3)
|
| MCFSDRAMC_DACR_CBM (3)
|
||||||
| MCFSDRAMC_DACR_PS_16;
|
| MCFSDRAMC_DACR_PS_16;
|
||||||
|
|
||||||
MCFSDRAMC_DMR1 = MCFSDRAMC_DMR_BAM_16M
|
MCFSDRAMC_DMR1 = MCFSDRAMC_DMR_BAM_16M | MCFSDRAMC_DMR_V;
|
||||||
| MCFSDRAMC_DMR_V;
|
|
||||||
|
|
||||||
MCFSDRAMC_DACR1 |= MCFSDRAMC_DACR_IP;
|
MCFSDRAMC_DACR1 |= MCFSDRAMC_DACR_IP;
|
||||||
|
|
||||||
*(unsigned short *)(CFG_SDRAM_BASE1) = 0xA5A5;
|
*(unsigned short *) (CFG_SDRAM_BASE1) = 0xA5A5;
|
||||||
MCFSDRAMC_DACR1 |= MCFSDRAMC_DACR_RE;
|
MCFSDRAMC_DACR1 |= MCFSDRAMC_DACR_RE;
|
||||||
for (i=0; i < 2000; i++)
|
|
||||||
asm(" nop");
|
for (i = 0; i < 2000; i++)
|
||||||
MCFSDRAMC_DACR1 |= MCFSDRAMC_DACR_IMRS;
|
asm (" nop");
|
||||||
*(unsigned int *)(CFG_SDRAM_BASE1 + 0x220) = 0xA5A5;
|
|
||||||
size += CFG_SDRAM_SIZE1 * 1024 * 1024;
|
MCFSDRAMC_DACR1 |= MCFSDRAMC_DACR_IMRS;
|
||||||
#endif
|
*(unsigned int *) (CFG_SDRAM_BASE1 + 0x220) = 0xA5A5;
|
||||||
|
size += CFG_SDRAM_SIZE1 * 1024 * 1024;
|
||||||
|
#endif
|
||||||
return size;
|
return size;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -173,7 +173,7 @@ int cfm_flash_write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cn
|
|||||||
dest = cmf_backdoor_address(addr);
|
dest = cmf_backdoor_address(addr);
|
||||||
while ((cnt>=4) && (rc == ERR_OK))
|
while ((cnt>=4) && (rc == ERR_OK))
|
||||||
{
|
{
|
||||||
data =*((volatile u32 *) src);
|
data = *((volatile u32 *) src);
|
||||||
*(volatile u32*) dest = data;
|
*(volatile u32*) dest = data;
|
||||||
MCFCFM_CMD = MCFCFM_CMD_PGM;
|
MCFCFM_CMD = MCFCFM_CMD_PGM;
|
||||||
MCFCFM_USTAT = MCFCFM_USTAT_CBEIF;
|
MCFCFM_USTAT = MCFCFM_USTAT_CBEIF;
|
||||||
|
|||||||
@@ -348,7 +348,7 @@ int amd_flash_write_buff(flash_info_t * info, uchar * src, ulong addr, ulong cnt
|
|||||||
dest = addr;
|
dest = addr;
|
||||||
while ((cnt>=2) && (rc == ERR_OK))
|
while ((cnt>=2) && (rc == ERR_OK))
|
||||||
{
|
{
|
||||||
data =*((volatile u16 *) src);
|
data = *((volatile u16 *) src);
|
||||||
rc=amd_write_word (info,dest,data);
|
rc=amd_write_word (info,dest,data);
|
||||||
src +=2;
|
src +=2;
|
||||||
dest +=2;
|
dest +=2;
|
||||||
|
|||||||
@@ -201,7 +201,7 @@ int mii_discover_phy(struct eth_device *dev)
|
|||||||
}
|
}
|
||||||
#endif /* CFG_DISCOVER_PHY */
|
#endif /* CFG_DISCOVER_PHY */
|
||||||
|
|
||||||
int mii_init(void) __attribute__((weak,alias("__mii_init")));
|
void mii_init(void) __attribute__((weak,alias("__mii_init")));
|
||||||
|
|
||||||
void __mii_init(void)
|
void __mii_init(void)
|
||||||
{
|
{
|
||||||
|
|||||||
@@ -35,7 +35,7 @@
|
|||||||
** ------
|
** ------
|
||||||
** int board_early_init_f(void)
|
** int board_early_init_f(void)
|
||||||
** int checkboard(void)
|
** int checkboard(void)
|
||||||
** long int initdram(int board_type)
|
** phys_size_t initdram(int board_type)
|
||||||
** called from 'board_init_f()' into 'common/board.c'
|
** called from 'board_init_f()' into 'common/board.c'
|
||||||
**
|
**
|
||||||
** void reset_phy(void)
|
** void reset_phy(void)
|
||||||
@@ -179,7 +179,7 @@ int checkboard (void)
|
|||||||
|
|
||||||
/* ------------------------------------------------------------------------- */
|
/* ------------------------------------------------------------------------- */
|
||||||
|
|
||||||
long int initdram (int board_type)
|
phys_size_t initdram (int board_type)
|
||||||
{
|
{
|
||||||
volatile immap_t *immap = (immap_t *) CFG_IMMR;
|
volatile immap_t *immap = (immap_t *) CFG_IMMR;
|
||||||
volatile memctl8xx_t *memctl = &immap->im_memctl;
|
volatile memctl8xx_t *memctl = &immap->im_memctl;
|
||||||
|
|||||||
@@ -14,7 +14,7 @@
|
|||||||
*
|
*
|
||||||
* This program is distributed in the hope that it will be useful,
|
* This program is distributed in the hope that it will be useful,
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
* GNU General Public License for more details.
|
* GNU General Public License for more details.
|
||||||
*
|
*
|
||||||
* You should have received a copy of the GNU General Public License
|
* You should have received a copy of the GNU General Public License
|
||||||
@@ -30,48 +30,48 @@
|
|||||||
#include "memio.h"
|
#include "memio.h"
|
||||||
#include "via686.h"
|
#include "via686.h"
|
||||||
|
|
||||||
__asm__(" .globl send_kb \n "
|
__asm__(" .globl send_kb \n "
|
||||||
"send_kb: \n "
|
"send_kb: \n "
|
||||||
" lis r9, 0xfe00 \n "
|
" lis r9, 0xfe00 \n "
|
||||||
" \n "
|
" \n "
|
||||||
" li r4, 0x10 # retries \n "
|
" li r4, 0x10 # retries \n "
|
||||||
" mtctr r4 \n "
|
" mtctr r4 \n "
|
||||||
" \n "
|
" \n "
|
||||||
"idle: \n "
|
"idle: \n "
|
||||||
" lbz r4, 0x64(r9) \n "
|
" lbz r4, 0x64(r9) \n "
|
||||||
" andi. r4, r4, 0x02 \n "
|
" andi. r4, r4, 0x02 \n "
|
||||||
" bne idle \n "
|
" bne idle \n "
|
||||||
|
|
||||||
"ready: \n "
|
"ready: \n "
|
||||||
" stb r3, 0x60(r9) \n "
|
" stb r3, 0x60(r9) \n "
|
||||||
" \n "
|
" \n "
|
||||||
"check: \n "
|
"check: \n "
|
||||||
" lbz r4, 0x64(r9) \n "
|
" lbz r4, 0x64(r9) \n "
|
||||||
" andi. r4, r4, 0x01 \n "
|
" andi. r4, r4, 0x01 \n "
|
||||||
" beq check \n "
|
" beq check \n "
|
||||||
" \n "
|
" \n "
|
||||||
" lbz r4, 0x60(r9) \n "
|
" lbz r4, 0x60(r9) \n "
|
||||||
" cmpwi r4, 0xfa \n "
|
" cmpwi r4, 0xfa \n "
|
||||||
" beq done \n "
|
" beq done \n "
|
||||||
|
|
||||||
" bdnz idle \n "
|
" bdnz idle \n "
|
||||||
|
|
||||||
" li r3, 0 \n "
|
" li r3, 0 \n "
|
||||||
" blr \n "
|
" blr \n "
|
||||||
|
|
||||||
"done: \n "
|
"done: \n "
|
||||||
" li r3, 1 \n "
|
" li r3, 1 \n "
|
||||||
" blr \n "
|
" blr \n "
|
||||||
|
|
||||||
".globl test_kb \n "
|
".globl test_kb \n "
|
||||||
"test_kb: \n "
|
"test_kb: \n "
|
||||||
" mflr r10 \n "
|
" mflr r10 \n "
|
||||||
" li r3, 0xed \n "
|
" li r3, 0xed \n "
|
||||||
" bl send_kb \n "
|
" bl send_kb \n "
|
||||||
" li r3, 0x01 \n "
|
" li r3, 0x01 \n "
|
||||||
" bl send_kb \n "
|
" bl send_kb \n "
|
||||||
" mtlr r10 \n "
|
" mtlr r10 \n "
|
||||||
" blr "
|
" blr \n "
|
||||||
);
|
);
|
||||||
|
|
||||||
|
|
||||||
@@ -81,7 +81,7 @@ int checkboard (void)
|
|||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
long initdram (int board_type)
|
phys_size_t initdram (int board_type)
|
||||||
{
|
{
|
||||||
return articiaS_ram_init ();
|
return articiaS_ram_init ();
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -90,8 +90,8 @@
|
|||||||
#define DMADone (1<<8)
|
#define DMADone (1<<8)
|
||||||
#define DownComplete (1<<9)
|
#define DownComplete (1<<9)
|
||||||
#define UpComplete (1<<10)
|
#define UpComplete (1<<10)
|
||||||
#define DMAInProgress (1<<11) /* DMA controller is still busy.*/
|
#define DMAInProgress (1<<11) /* DMA controller is still busy.*/
|
||||||
#define CmdInProgress (1<<12) /* EL3_CMD is still busy.*/
|
#define CmdInProgress (1<<12) /* EL3_CMD is still busy.*/
|
||||||
|
|
||||||
/* Polling Registers */
|
/* Polling Registers */
|
||||||
|
|
||||||
@@ -100,17 +100,17 @@
|
|||||||
|
|
||||||
/* Register window 0 offets */
|
/* Register window 0 offets */
|
||||||
|
|
||||||
#define Wn0EepromCmd 10 /* Window 0: EEPROM command register. */
|
#define Wn0EepromCmd 10 /* Window 0: EEPROM command register. */
|
||||||
#define Wn0EepromData 12 /* Window 0: EEPROM results register. */
|
#define Wn0EepromData 12 /* Window 0: EEPROM results register. */
|
||||||
#define IntrStatus 0x0E /* Valid in all windows. */
|
#define IntrStatus 0x0E /* Valid in all windows. */
|
||||||
|
|
||||||
/* Register window 0 EEPROM bits */
|
/* Register window 0 EEPROM bits */
|
||||||
|
|
||||||
#define EEPROM_Read 0x80
|
#define EEPROM_Read 0x80
|
||||||
#define EEPROM_WRITE 0x40
|
#define EEPROM_WRITE 0x40
|
||||||
#define EEPROM_ERASE 0xC0
|
#define EEPROM_ERASE 0xC0
|
||||||
#define EEPROM_EWENB 0x30 /* Enable erasing/writing for 10 msec. */
|
#define EEPROM_EWENB 0x30 /* Enable erasing/writing for 10 msec. */
|
||||||
#define EEPROM_EWDIS 0x00 /* Disable EWENB before 10 msec timeout. */
|
#define EEPROM_EWDIS 0x00 /* Disable EWENB before 10 msec timeout. */
|
||||||
|
|
||||||
/* EEPROM locations. */
|
/* EEPROM locations. */
|
||||||
|
|
||||||
@@ -135,7 +135,7 @@
|
|||||||
#define RxStatus 0x18
|
#define RxStatus 0x18
|
||||||
#define Timer 0x1A
|
#define Timer 0x1A
|
||||||
#define TxStatus 0x1B
|
#define TxStatus 0x1B
|
||||||
#define TxFree 0x1C /* Remaining free bytes in Tx buffer. */
|
#define TxFree 0x1C /* Remaining free bytes in Tx buffer. */
|
||||||
|
|
||||||
/* Register Window 2 */
|
/* Register Window 2 */
|
||||||
|
|
||||||
@@ -143,23 +143,23 @@
|
|||||||
|
|
||||||
/* Register Window 3: MAC/config bits */
|
/* Register Window 3: MAC/config bits */
|
||||||
|
|
||||||
#define Wn3_Config 0 /* Internal Configuration */
|
#define Wn3_Config 0 /* Internal Configuration */
|
||||||
#define Wn3_MAC_Ctrl 6
|
#define Wn3_MAC_Ctrl 6
|
||||||
#define Wn3_Options 8
|
#define Wn3_Options 8
|
||||||
|
|
||||||
#define BFEXT(value, offset, bitcount) \
|
#define BFEXT(value, offset, bitcount) \
|
||||||
((((unsigned long)(value)) >> (offset)) & ((1 << (bitcount)) - 1))
|
((((unsigned long)(value)) >> (offset)) & ((1 << (bitcount)) - 1))
|
||||||
|
|
||||||
#define BFINS(lhs, rhs, offset, bitcount) \
|
#define BFINS(lhs, rhs, offset, bitcount) \
|
||||||
(((lhs) & ~((((1 << (bitcount)) - 1)) << (offset))) | \
|
(((lhs) & ~((((1 << (bitcount)) - 1)) << (offset))) | \
|
||||||
(((rhs) & ((1 << (bitcount)) - 1)) << (offset)))
|
(((rhs) & ((1 << (bitcount)) - 1)) << (offset)))
|
||||||
|
|
||||||
#define RAM_SIZE(v) BFEXT(v, 0, 3)
|
#define RAM_SIZE(v) BFEXT(v, 0, 3)
|
||||||
#define RAM_WIDTH(v) BFEXT(v, 3, 1)
|
#define RAM_WIDTH(v) BFEXT(v, 3, 1)
|
||||||
#define RAM_SPEED(v) BFEXT(v, 4, 2)
|
#define RAM_SPEED(v) BFEXT(v, 4, 2)
|
||||||
#define ROM_SIZE(v) BFEXT(v, 6, 2)
|
#define ROM_SIZE(v) BFEXT(v, 6, 2)
|
||||||
#define RAM_SPLIT(v) BFEXT(v, 16, 2)
|
#define RAM_SPLIT(v) BFEXT(v, 16, 2)
|
||||||
#define XCVR(v) BFEXT(v, 20, 4)
|
#define XCVR(v) BFEXT(v, 20, 4)
|
||||||
#define AUTOSELECT(v) BFEXT(v, 24, 1)
|
#define AUTOSELECT(v) BFEXT(v, 24, 1)
|
||||||
|
|
||||||
/* Register Window 4: Xcvr/media bits */
|
/* Register Window 4: Xcvr/media bits */
|
||||||
@@ -186,20 +186,20 @@
|
|||||||
#define DownListPtr 0x24
|
#define DownListPtr 0x24
|
||||||
#define FragAddr 0x28
|
#define FragAddr 0x28
|
||||||
#define FragLen 0x2c
|
#define FragLen 0x2c
|
||||||
#define TxFreeThreshold 0x2f
|
#define TxFreeThreshold 0x2f
|
||||||
#define UpPktStatus 0x30
|
#define UpPktStatus 0x30
|
||||||
#define UpListPtr 0x38
|
#define UpListPtr 0x38
|
||||||
|
|
||||||
/* The Rx and Tx descriptor lists. */
|
/* The Rx and Tx descriptor lists. */
|
||||||
|
|
||||||
#define LAST_FRAG 0x80000000 /* Last Addr/Len pair in descriptor. */
|
#define LAST_FRAG 0x80000000 /* Last Addr/Len pair in descriptor. */
|
||||||
#define DN_COMPLETE 0x00010000 /* This packet has been downloaded */
|
#define DN_COMPLETE 0x00010000 /* This packet has been downloaded */
|
||||||
|
|
||||||
struct rx_desc_3com {
|
struct rx_desc_3com {
|
||||||
u32 next; /* Last entry points to 0 */
|
u32 next; /* Last entry points to 0 */
|
||||||
u32 status; /* FSH -> Frame Start Header */
|
u32 status; /* FSH -> Frame Start Header */
|
||||||
u32 addr; /* Up to 63 addr/len pairs possible */
|
u32 addr; /* Up to 63 addr/len pairs possible */
|
||||||
u32 length; /* Set LAST_FRAG to indicate last pair */
|
u32 length; /* Set LAST_FRAG to indicate last pair */
|
||||||
};
|
};
|
||||||
|
|
||||||
/* Values for the Rx status entry. */
|
/* Values for the Rx status entry. */
|
||||||
@@ -214,8 +214,8 @@ struct rx_desc_3com {
|
|||||||
#define UDPChksumValid (1<<31)
|
#define UDPChksumValid (1<<31)
|
||||||
|
|
||||||
struct tx_desc_3com {
|
struct tx_desc_3com {
|
||||||
u32 next; /* Last entry points to 0 */
|
u32 next; /* Last entry points to 0 */
|
||||||
u32 status; /* bits 0:12 length, others see below */
|
u32 status; /* bits 0:12 length, others see below */
|
||||||
u32 addr;
|
u32 addr;
|
||||||
u32 length;
|
u32 length;
|
||||||
};
|
};
|
||||||
@@ -227,7 +227,7 @@ struct tx_desc_3com {
|
|||||||
#define AddIPChksum 0x02000000
|
#define AddIPChksum 0x02000000
|
||||||
#define AddTCPChksum 0x04000000
|
#define AddTCPChksum 0x04000000
|
||||||
#define AddUDPChksum 0x08000000
|
#define AddUDPChksum 0x08000000
|
||||||
#define TxIntrUploaded 0x80000000 /* IRQ when in FIFO, but maybe not sent. */
|
#define TxIntrUploaded 0x80000000 /* IRQ when in FIFO, but maybe not sent. */
|
||||||
|
|
||||||
/* XCVR Types */
|
/* XCVR Types */
|
||||||
|
|
||||||
@@ -240,19 +240,19 @@ struct tx_desc_3com {
|
|||||||
#define XCVR_MII 6
|
#define XCVR_MII 6
|
||||||
#define XCVR_NWAY 8
|
#define XCVR_NWAY 8
|
||||||
#define XCVR_ExtMII 9
|
#define XCVR_ExtMII 9
|
||||||
#define XCVR_Default 10 /* I don't think this is correct -> should have been 0x10 if Auto Negotiate */
|
#define XCVR_Default 10 /* I don't think this is correct -> should have been 0x10 if Auto Negotiate */
|
||||||
|
|
||||||
struct descriptor { /* A generic descriptor. */
|
struct descriptor { /* A generic descriptor. */
|
||||||
u32 next; /* Last entry points to 0 */
|
u32 next; /* Last entry points to 0 */
|
||||||
u32 status; /* FSH -> Frame Start Header */
|
u32 status; /* FSH -> Frame Start Header */
|
||||||
u32 addr; /* Up to 63 addr/len pairs possible */
|
u32 addr; /* Up to 63 addr/len pairs possible */
|
||||||
u32 length; /* Set LAST_FRAG to indicate last pair */
|
u32 length; /* Set LAST_FRAG to indicate last pair */
|
||||||
};
|
};
|
||||||
|
|
||||||
/* Misc. definitions */
|
/* Misc. definitions */
|
||||||
|
|
||||||
#define NUM_RX_DESC PKTBUFSRX * 10
|
#define NUM_RX_DESC PKTBUFSRX * 10
|
||||||
#define NUM_TX_DESC 1 /* Number of TX descriptors */
|
#define NUM_TX_DESC 1 /* Number of TX descriptors */
|
||||||
|
|
||||||
#define TOUT_LOOP 1000000
|
#define TOUT_LOOP 1000000
|
||||||
|
|
||||||
@@ -266,17 +266,17 @@ struct descriptor { /* A generic descriptor. */
|
|||||||
#undef ETH_DEBUG
|
#undef ETH_DEBUG
|
||||||
|
|
||||||
#ifdef ETH_DEBUG
|
#ifdef ETH_DEBUG
|
||||||
#define PRINTF(fmt,args...) printf (fmt ,##args)
|
#define PRINTF(fmt,args...) printf (fmt ,##args)
|
||||||
#else
|
#else
|
||||||
#define PRINTF(fmt,args...)
|
#define PRINTF(fmt,args...)
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
||||||
static struct rx_desc_3com *rx_ring; /* RX descriptor ring */
|
static struct rx_desc_3com *rx_ring; /* RX descriptor ring */
|
||||||
static struct tx_desc_3com *tx_ring; /* TX descriptor ring */
|
static struct tx_desc_3com *tx_ring; /* TX descriptor ring */
|
||||||
static u8 rx_buffer[NUM_RX_DESC][PKTSIZE_ALIGN]; /* storage for the incoming messages */
|
static u8 rx_buffer[NUM_RX_DESC][PKTSIZE_ALIGN];/* storage for the incoming messages */
|
||||||
static int rx_next = 0; /* RX descriptor ring pointer */
|
static int rx_next = 0; /* RX descriptor ring pointer */
|
||||||
static int tx_next = 0; /* TX descriptor ring pointer */
|
static int tx_next = 0; /* TX descriptor ring pointer */
|
||||||
static int tx_threshold;
|
static int tx_threshold;
|
||||||
|
|
||||||
static void init_rx_ring(struct eth_device* dev);
|
static void init_rx_ring(struct eth_device* dev);
|
||||||
@@ -369,171 +369,163 @@ static int issue_and_wait(struct eth_device* dev, int command)
|
|||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Determine network media type and set up 3com accordingly */
|
/* Determine network media type and set up 3com accordingly */
|
||||||
/* I think I'm going to start with something known first like 10baseT */
|
/* I think I'm going to start with something known first like 10baseT */
|
||||||
|
|
||||||
static int auto_negotiate(struct eth_device* dev)
|
static int auto_negotiate (struct eth_device *dev)
|
||||||
{
|
{
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
EL3WINDOW(dev, 1);
|
EL3WINDOW (dev, 1);
|
||||||
|
|
||||||
/* Wait for Auto negotiation to complete */
|
/* Wait for Auto negotiation to complete */
|
||||||
for (i = 0; i <= 1000; i++)
|
for (i = 0; i <= 1000; i++) {
|
||||||
{
|
if (ETH_INW (dev, 2) & 0x04)
|
||||||
if (ETH_INW(dev, 2) & 0x04)
|
break;
|
||||||
break;
|
udelay (100);
|
||||||
udelay(100);
|
|
||||||
|
|
||||||
if (i == 1000)
|
if (i == 1000) {
|
||||||
{
|
PRINTF ("Error: Auto negotiation failed\n");
|
||||||
PRINTF("Error: Auto negotiation failed\n");
|
return 0;
|
||||||
return 0;
|
}
|
||||||
}
|
}
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
return 1;
|
return 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
void eth_interrupt(struct eth_device *dev)
|
void eth_interrupt (struct eth_device *dev)
|
||||||
{
|
{
|
||||||
u16 status = ETH_STATUS(dev);
|
u16 status = ETH_STATUS (dev);
|
||||||
|
|
||||||
printf("eth0: status = 0x%04x\n", status);
|
printf ("eth0: status = 0x%04x\n", status);
|
||||||
|
|
||||||
if (!(status & IntLatch))
|
if (!(status & IntLatch))
|
||||||
return;
|
return;
|
||||||
|
|
||||||
if (status & (1<<6))
|
if (status & (1 << 6)) {
|
||||||
{
|
ETH_CMD (dev, AckIntr | (1 << 6));
|
||||||
ETH_CMD(dev, AckIntr | (1<<6));
|
printf ("Acknowledged Interrupt command\n");
|
||||||
printf("Acknowledged Interrupt command\n");
|
}
|
||||||
}
|
|
||||||
|
|
||||||
if (status & DownComplete)
|
if (status & DownComplete) {
|
||||||
{
|
ETH_CMD (dev, AckIntr | DownComplete);
|
||||||
ETH_CMD(dev, AckIntr | DownComplete);
|
printf ("Acknowledged DownComplete\n");
|
||||||
printf("Acknowledged DownComplete\n");
|
}
|
||||||
}
|
|
||||||
|
|
||||||
if (status & UpComplete)
|
if (status & UpComplete) {
|
||||||
{
|
ETH_CMD (dev, AckIntr | UpComplete);
|
||||||
ETH_CMD(dev, AckIntr | UpComplete);
|
printf ("Acknowledged UpComplete\n");
|
||||||
printf("Acknowledged UpComplete\n");
|
}
|
||||||
}
|
|
||||||
|
|
||||||
ETH_CMD(dev, AckIntr | IntLatch);
|
ETH_CMD (dev, AckIntr | IntLatch);
|
||||||
printf("Acknowledged IntLatch\n");
|
printf ("Acknowledged IntLatch\n");
|
||||||
}
|
}
|
||||||
|
|
||||||
int eth_3com_initialize(bd_t *bis)
|
int eth_3com_initialize (bd_t * bis)
|
||||||
{
|
{
|
||||||
u32 eth_iobase = 0, status;
|
u32 eth_iobase = 0, status;
|
||||||
int card_number = 0, ret;
|
int card_number = 0, ret;
|
||||||
struct eth_device* dev;
|
struct eth_device *dev;
|
||||||
pci_dev_t devno;
|
pci_dev_t devno;
|
||||||
char *s;
|
char *s;
|
||||||
|
|
||||||
s = getenv("3com_base");
|
s = getenv ("3com_base");
|
||||||
|
|
||||||
/* Find ethernet controller on the PCI bus */
|
/* Find ethernet controller on the PCI bus */
|
||||||
|
|
||||||
if ((devno = pci_find_device(PCI_VENDOR_ID_3COM, PCI_DEVICE_ID_3COM_3C905C, 0)) < 0)
|
if ((devno =
|
||||||
{
|
pci_find_device (PCI_VENDOR_ID_3COM, PCI_DEVICE_ID_3COM_3C905C,
|
||||||
PRINTF("Error: Cannot find the ethernet device on the PCI bus\n");
|
0)) < 0) {
|
||||||
|
PRINTF ("Error: Cannot find the ethernet device on the PCI bus\n");
|
||||||
goto Done;
|
goto Done;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (s)
|
if (s) {
|
||||||
{
|
unsigned long base = atoi (s);
|
||||||
unsigned long base = atoi(s);
|
|
||||||
pci_write_config_dword(devno, PCI_BASE_ADDRESS_0, base | 0x01);
|
pci_write_config_dword (devno, PCI_BASE_ADDRESS_0,
|
||||||
|
base | 0x01);
|
||||||
}
|
}
|
||||||
|
|
||||||
ret = pci_read_config_dword(devno, PCI_BASE_ADDRESS_0, ð_iobase);
|
ret = pci_read_config_dword (devno, PCI_BASE_ADDRESS_0, ð_iobase);
|
||||||
eth_iobase &= ~0xf;
|
eth_iobase &= ~0xf;
|
||||||
|
|
||||||
PRINTF("eth: 3Com Found at Address: 0x%x\n", eth_iobase);
|
PRINTF ("eth: 3Com Found at Address: 0x%x\n", eth_iobase);
|
||||||
|
|
||||||
pci_write_config_dword(devno, PCI_COMMAND, PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
|
pci_write_config_dword (devno, PCI_COMMAND,
|
||||||
|
PCI_COMMAND_IO | PCI_COMMAND_MEMORY |
|
||||||
|
PCI_COMMAND_MASTER);
|
||||||
|
|
||||||
/* Check if I/O accesses and Bus Mastering are enabled */
|
/* Check if I/O accesses and Bus Mastering are enabled */
|
||||||
|
|
||||||
ret = pci_read_config_dword(devno, PCI_COMMAND, &status);
|
ret = pci_read_config_dword (devno, PCI_COMMAND, &status);
|
||||||
|
|
||||||
if (!(status & PCI_COMMAND_IO))
|
if (!(status & PCI_COMMAND_IO)) {
|
||||||
{
|
printf ("Error: Cannot enable IO access.\n");
|
||||||
printf("Error: Cannot enable IO access.\n");
|
|
||||||
goto Done;
|
goto Done;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (!(status & PCI_COMMAND_MEMORY))
|
if (!(status & PCI_COMMAND_MEMORY)) {
|
||||||
{
|
printf ("Error: Cannot enable MEMORY access.\n");
|
||||||
printf("Error: Cannot enable MEMORY access.\n");
|
|
||||||
goto Done;
|
goto Done;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (!(status & PCI_COMMAND_MASTER))
|
if (!(status & PCI_COMMAND_MASTER)) {
|
||||||
{
|
printf ("Error: Cannot enable Bus Mastering.\n");
|
||||||
printf("Error: Cannot enable Bus Mastering.\n");
|
|
||||||
goto Done;
|
goto Done;
|
||||||
}
|
}
|
||||||
|
|
||||||
dev = (struct eth_device*) malloc(sizeof(*dev)); /*struct eth_device)); */
|
dev = (struct eth_device *) malloc (sizeof (*dev)); /*struct eth_device)); */
|
||||||
|
|
||||||
sprintf(dev->name, "3Com 3c920c#%d", card_number);
|
sprintf (dev->name, "3Com 3c920c#%d", card_number);
|
||||||
dev->iobase = eth_iobase;
|
dev->iobase = eth_iobase;
|
||||||
dev->priv = (void*) devno;
|
dev->priv = (void *) devno;
|
||||||
dev->init = eth_3com_init;
|
dev->init = eth_3com_init;
|
||||||
dev->halt = eth_3com_halt;
|
dev->halt = eth_3com_halt;
|
||||||
dev->send = eth_3com_send;
|
dev->send = eth_3com_send;
|
||||||
dev->recv = eth_3com_recv;
|
dev->recv = eth_3com_recv;
|
||||||
|
|
||||||
eth_register(dev);
|
eth_register (dev);
|
||||||
|
|
||||||
/* { */
|
/* { */
|
||||||
/* char interrupt; */
|
/* char interrupt; */
|
||||||
/* devno = pci_find_device(PCI_VENDOR_ID_3COM, PCI_DEVICE_ID_3COM_3C905C, 0); */
|
/* devno = pci_find_device(PCI_VENDOR_ID_3COM, PCI_DEVICE_ID_3COM_3C905C, 0); */
|
||||||
/* pci_read_config_byte(devno, PCI_INTERRUPT_LINE, &interrupt); */
|
/* pci_read_config_byte(devno, PCI_INTERRUPT_LINE, &interrupt); */
|
||||||
|
|
||||||
/* printf("Installing eth0 interrupt handler to %d\n", interrupt); */
|
/* printf("Installing eth0 interrupt handler to %d\n", interrupt); */
|
||||||
/* irq_install_handler(interrupt, eth_interrupt, dev); */
|
/* irq_install_handler(interrupt, eth_interrupt, dev); */
|
||||||
/* } */
|
/* } */
|
||||||
|
|
||||||
card_number++;
|
card_number++;
|
||||||
|
|
||||||
/* Set the latency timer for value */
|
/* Set the latency timer for value */
|
||||||
s = getenv("3com_latency");
|
s = getenv ("3com_latency");
|
||||||
if (s)
|
if (s) {
|
||||||
{
|
ret = pci_write_config_byte (devno, PCI_LATENCY_TIMER,
|
||||||
ret = pci_write_config_byte(devno, PCI_LATENCY_TIMER, (unsigned char)atoi(s));
|
(unsigned char) atoi (s));
|
||||||
}
|
} else
|
||||||
else ret = pci_write_config_byte(devno, PCI_LATENCY_TIMER, 0x0a);
|
ret = pci_write_config_byte (devno, PCI_LATENCY_TIMER, 0x0a);
|
||||||
|
|
||||||
read_hw_addr(dev, bis); /* get the MAC address from Window 2*/
|
read_hw_addr (dev, bis); /* get the MAC address from Window 2 */
|
||||||
|
|
||||||
/* Reset the ethernet controller */
|
/* Reset the ethernet controller */
|
||||||
|
|
||||||
PRINTF ("Issuing reset command....\n");
|
PRINTF ("Issuing reset command....\n");
|
||||||
if (!issue_and_wait(dev, TotalReset))
|
if (!issue_and_wait (dev, TotalReset)) {
|
||||||
{
|
printf ("Error: Cannot reset ethernet controller.\n");
|
||||||
printf("Error: Cannot reset ethernet controller.\n");
|
|
||||||
goto Done;
|
goto Done;
|
||||||
}
|
} else
|
||||||
else
|
|
||||||
PRINTF ("Ethernet controller reset.\n");
|
PRINTF ("Ethernet controller reset.\n");
|
||||||
|
|
||||||
/* allocate memory for rx and tx rings */
|
/* allocate memory for rx and tx rings */
|
||||||
|
|
||||||
if(!(rx_ring = memalign(sizeof(struct rx_desc_3com) * NUM_RX_DESC, 16)))
|
if (!(rx_ring = memalign (sizeof (struct rx_desc_3com) * NUM_RX_DESC, 16))) {
|
||||||
{
|
|
||||||
PRINTF ("Cannot allocate memory for RX_RING.....\n");
|
PRINTF ("Cannot allocate memory for RX_RING.....\n");
|
||||||
goto Done;
|
goto Done;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (!(tx_ring = memalign(sizeof(struct tx_desc_3com) * NUM_TX_DESC, 16)))
|
if (!(tx_ring = memalign (sizeof (struct tx_desc_3com) * NUM_TX_DESC, 16))) {
|
||||||
{
|
|
||||||
PRINTF ("Cannot allocate memory for TX_RING.....\n");
|
PRINTF ("Cannot allocate memory for TX_RING.....\n");
|
||||||
goto Done;
|
goto Done;
|
||||||
}
|
}
|
||||||
@@ -543,219 +535,208 @@ Done:
|
|||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
static int eth_3com_init(struct eth_device* dev, bd_t *bis)
|
static int eth_3com_init (struct eth_device *dev, bd_t * bis)
|
||||||
{
|
{
|
||||||
int i, status = 0;
|
int i, status = 0;
|
||||||
int tx_cur, loop;
|
int tx_cur, loop;
|
||||||
u16 status_enable, intr_enable;
|
u16 status_enable, intr_enable;
|
||||||
struct descriptor *ias_cmd;
|
struct descriptor *ias_cmd;
|
||||||
|
|
||||||
/* Determine what type of network the machine is connected to */
|
/* Determine what type of network the machine is connected to */
|
||||||
/* presently drops the connect to 10Mbps */
|
/* presently drops the connect to 10Mbps */
|
||||||
|
|
||||||
if (!auto_negotiate(dev))
|
if (!auto_negotiate (dev)) {
|
||||||
{
|
printf ("Error: Cannot determine network media.\n");
|
||||||
printf("Error: Cannot determine network media.\n");
|
|
||||||
goto Done;
|
goto Done;
|
||||||
}
|
}
|
||||||
|
|
||||||
issue_and_wait(dev, TxReset);
|
issue_and_wait (dev, TxReset);
|
||||||
issue_and_wait(dev, RxReset|0x04);
|
issue_and_wait (dev, RxReset | 0x04);
|
||||||
|
|
||||||
/* Switch to register set 7 for normal use. */
|
/* Switch to register set 7 for normal use. */
|
||||||
EL3WINDOW(dev, 7);
|
EL3WINDOW (dev, 7);
|
||||||
|
|
||||||
/* Initialize Rx and Tx rings */
|
/* Initialize Rx and Tx rings */
|
||||||
|
|
||||||
init_rx_ring(dev);
|
init_rx_ring (dev);
|
||||||
purge_tx_ring(dev);
|
purge_tx_ring (dev);
|
||||||
|
|
||||||
ETH_CMD(dev, SetRxFilter | RxStation | RxBroadcast | RxProm);
|
ETH_CMD (dev, SetRxFilter | RxStation | RxBroadcast | RxProm);
|
||||||
|
|
||||||
issue_and_wait(dev,SetTxStart|0x07ff);
|
issue_and_wait (dev, SetTxStart | 0x07ff);
|
||||||
|
|
||||||
/* Below sets which indication bits to be seen. */
|
/* Below sets which indication bits to be seen. */
|
||||||
|
|
||||||
status_enable = SetStatusEnb | HostError | DownComplete | UpComplete | (1<<6);
|
status_enable =
|
||||||
ETH_CMD(dev, status_enable);
|
SetStatusEnb | HostError | DownComplete | UpComplete | (1 <<
|
||||||
|
6);
|
||||||
|
ETH_CMD (dev, status_enable);
|
||||||
|
|
||||||
/* Below sets no bits are to cause an interrupt since this is just polling */
|
/* Below sets no bits are to cause an interrupt since this is just polling */
|
||||||
|
|
||||||
intr_enable = SetIntrEnb;
|
intr_enable = SetIntrEnb;
|
||||||
/* intr_enable = SetIntrEnb | (1<<9) | (1<<10) | (1<<6); */
|
/* intr_enable = SetIntrEnb | (1<<9) | (1<<10) | (1<<6); */
|
||||||
ETH_CMD(dev, intr_enable);
|
ETH_CMD (dev, intr_enable);
|
||||||
ETH_OUTB(dev, 127, UpPoll);
|
ETH_OUTB (dev, 127, UpPoll);
|
||||||
|
|
||||||
/* Ack all pending events, and set active indicator mask */
|
/* Ack all pending events, and set active indicator mask */
|
||||||
|
|
||||||
ETH_CMD(dev, AckIntr | IntLatch | TxAvailable | RxEarly | IntReq);
|
ETH_CMD (dev, AckIntr | IntLatch | TxAvailable | RxEarly | IntReq);
|
||||||
ETH_CMD(dev, intr_enable);
|
ETH_CMD (dev, intr_enable);
|
||||||
|
|
||||||
/* Tell the adapter where the RX ring is located */
|
/* Tell the adapter where the RX ring is located */
|
||||||
|
|
||||||
issue_and_wait(dev,UpStall); /* Stall and set the UplistPtr */
|
issue_and_wait (dev, UpStall); /* Stall and set the UplistPtr */
|
||||||
ETH_OUTL(dev, (u32)&rx_ring[rx_next], UpListPtr);
|
ETH_OUTL (dev, (u32) & rx_ring[rx_next], UpListPtr);
|
||||||
ETH_CMD(dev, RxEnable); /* Enable the receiver. */
|
ETH_CMD (dev, RxEnable); /* Enable the receiver. */
|
||||||
issue_and_wait(dev,UpUnstall);
|
issue_and_wait (dev, UpUnstall);
|
||||||
|
|
||||||
/* Send the Individual Address Setup frame */
|
/* Send the Individual Address Setup frame */
|
||||||
|
|
||||||
tx_cur = tx_next;
|
tx_cur = tx_next;
|
||||||
tx_next = ((tx_next+1) % NUM_TX_DESC);
|
tx_next = ((tx_next + 1) % NUM_TX_DESC);
|
||||||
|
|
||||||
ias_cmd = (struct descriptor *)&tx_ring[tx_cur];
|
ias_cmd = (struct descriptor *) &tx_ring[tx_cur];
|
||||||
ias_cmd->status = cpu_to_le32(1<<31); /* set DnIndicate bit. */
|
ias_cmd->status = cpu_to_le32 (1 << 31); /* set DnIndicate bit. */
|
||||||
ias_cmd->next = 0;
|
ias_cmd->next = 0;
|
||||||
ias_cmd->addr = cpu_to_le32((u32)&bis->bi_enetaddr[0]);
|
ias_cmd->addr = cpu_to_le32 ((u32) & bis->bi_enetaddr[0]);
|
||||||
ias_cmd->length = cpu_to_le32(6 | LAST_FRAG);
|
ias_cmd->length = cpu_to_le32 (6 | LAST_FRAG);
|
||||||
|
|
||||||
/* Tell the adapter where the TX ring is located */
|
/* Tell the adapter where the TX ring is located */
|
||||||
|
|
||||||
ETH_CMD(dev, TxEnable); /* Enable transmitter. */
|
ETH_CMD (dev, TxEnable); /* Enable transmitter. */
|
||||||
issue_and_wait(dev, DownStall); /* Stall and set the DownListPtr. */
|
issue_and_wait (dev, DownStall); /* Stall and set the DownListPtr. */
|
||||||
ETH_OUTL(dev, (u32)&tx_ring[tx_cur], DownListPtr);
|
ETH_OUTL (dev, (u32) & tx_ring[tx_cur], DownListPtr);
|
||||||
issue_and_wait(dev, DownUnstall);
|
issue_and_wait (dev, DownUnstall);
|
||||||
for (i=0; !(ETH_STATUS(dev) & DownComplete); i++)
|
for (i = 0; !(ETH_STATUS (dev) & DownComplete); i++) {
|
||||||
{
|
if (i >= TOUT_LOOP) {
|
||||||
if (i >= TOUT_LOOP)
|
PRINTF ("TX Ring status (Init): 0x%4x\n",
|
||||||
{
|
le32_to_cpu (tx_ring[tx_cur].status));
|
||||||
PRINTF("TX Ring status (Init): 0x%4x\n", le32_to_cpu(tx_ring[tx_cur].status));
|
PRINTF ("ETH_STATUS: 0x%x\n", ETH_STATUS (dev));
|
||||||
PRINTF("ETH_STATUS: 0x%x\n", ETH_STATUS(dev));
|
|
||||||
goto Done;
|
goto Done;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
if (ETH_STATUS(dev) & DownComplete) /* If DownLoad Complete ACK the bit */
|
if (ETH_STATUS (dev) & DownComplete) { /* If DownLoad Complete ACK the bit */
|
||||||
{
|
ETH_CMD (dev, AckIntr | DownComplete); /* acknowledge the indication bit */
|
||||||
ETH_CMD(dev, AckIntr | DownComplete); /* acknowledge the indication bit */
|
issue_and_wait (dev, DownStall); /* stall and clear DownListPtr */
|
||||||
issue_and_wait(dev, DownStall); /* stall and clear DownListPtr */
|
ETH_OUTL (dev, 0, DownListPtr);
|
||||||
ETH_OUTL(dev, 0, DownListPtr);
|
issue_and_wait (dev, DownUnstall);
|
||||||
issue_and_wait(dev, DownUnstall);
|
|
||||||
}
|
}
|
||||||
status = 1;
|
status = 1;
|
||||||
|
|
||||||
Done:
|
Done:
|
||||||
return status;
|
return status;
|
||||||
}
|
}
|
||||||
|
|
||||||
int eth_3com_send(struct eth_device* dev, volatile void *packet, int length)
|
int eth_3com_send (struct eth_device *dev, volatile void *packet, int length)
|
||||||
{
|
{
|
||||||
int i, status = 0;
|
int i, status = 0;
|
||||||
int tx_cur;
|
int tx_cur;
|
||||||
|
|
||||||
if (length <= 0)
|
if (length <= 0) {
|
||||||
{
|
PRINTF ("eth: bad packet size: %d\n", length);
|
||||||
PRINTF("eth: bad packet size: %d\n", length);
|
|
||||||
goto Done;
|
goto Done;
|
||||||
}
|
}
|
||||||
|
|
||||||
tx_cur = tx_next;
|
tx_cur = tx_next;
|
||||||
tx_next = (tx_next+1) % NUM_TX_DESC;
|
tx_next = (tx_next + 1) % NUM_TX_DESC;
|
||||||
|
|
||||||
tx_ring[tx_cur].status = cpu_to_le32(1<<31); /* set DnIndicate bit */
|
tx_ring[tx_cur].status = cpu_to_le32 (1 << 31); /* set DnIndicate bit */
|
||||||
tx_ring[tx_cur].next = 0;
|
tx_ring[tx_cur].next = 0;
|
||||||
tx_ring[tx_cur].addr = cpu_to_le32(((u32) packet));
|
tx_ring[tx_cur].addr = cpu_to_le32 (((u32) packet));
|
||||||
tx_ring[tx_cur].length = cpu_to_le32(length | LAST_FRAG);
|
tx_ring[tx_cur].length = cpu_to_le32 (length | LAST_FRAG);
|
||||||
|
|
||||||
/* Send the packet */
|
/* Send the packet */
|
||||||
|
|
||||||
issue_and_wait(dev, DownStall); /* stall and set the DownListPtr */
|
issue_and_wait (dev, DownStall); /* stall and set the DownListPtr */
|
||||||
ETH_OUTL(dev, (u32) &tx_ring[tx_cur], DownListPtr);
|
ETH_OUTL (dev, (u32) & tx_ring[tx_cur], DownListPtr);
|
||||||
issue_and_wait(dev, DownUnstall);
|
issue_and_wait (dev, DownUnstall);
|
||||||
|
|
||||||
for (i=0; !(ETH_STATUS(dev) & DownComplete); i++)
|
for (i = 0; !(ETH_STATUS (dev) & DownComplete); i++) {
|
||||||
{
|
if (i >= TOUT_LOOP) {
|
||||||
if (i >= TOUT_LOOP)
|
PRINTF ("TX Ring status (send): 0x%4x\n",
|
||||||
{
|
le32_to_cpu (tx_ring[tx_cur].status));
|
||||||
PRINTF("TX Ring status (send): 0x%4x\n", le32_to_cpu(tx_ring[tx_cur].status));
|
|
||||||
goto Done;
|
goto Done;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
if (ETH_STATUS(dev) & DownComplete) /* If DownLoad Complete ACK the bit */
|
if (ETH_STATUS (dev) & DownComplete) { /* If DownLoad Complete ACK the bit */
|
||||||
{
|
ETH_CMD (dev, AckIntr | DownComplete); /* acknowledge the indication bit */
|
||||||
ETH_CMD(dev, AckIntr | DownComplete); /* acknowledge the indication bit */
|
issue_and_wait (dev, DownStall); /* stall and clear DownListPtr */
|
||||||
issue_and_wait(dev, DownStall); /* stall and clear DownListPtr */
|
ETH_OUTL (dev, 0, DownListPtr);
|
||||||
ETH_OUTL(dev, 0, DownListPtr);
|
issue_and_wait (dev, DownUnstall);
|
||||||
issue_and_wait(dev, DownUnstall);
|
|
||||||
}
|
}
|
||||||
status=1;
|
status = 1;
|
||||||
Done:
|
Done:
|
||||||
return status;
|
return status;
|
||||||
}
|
}
|
||||||
|
|
||||||
void PrintPacket (uchar *packet, int length)
|
void PrintPacket (uchar * packet, int length)
|
||||||
{
|
{
|
||||||
int loop;
|
int loop;
|
||||||
uchar *ptr;
|
uchar *ptr;
|
||||||
|
|
||||||
printf ("Printing packet of length %x.\n\n", length);
|
printf ("Printing packet of length %x.\n\n", length);
|
||||||
ptr = packet;
|
ptr = packet;
|
||||||
for (loop = 1; loop <= length; loop++)
|
for (loop = 1; loop <= length; loop++) {
|
||||||
{
|
|
||||||
printf ("%2x ", *ptr++);
|
printf ("%2x ", *ptr++);
|
||||||
if ((loop % 40)== 0)
|
if ((loop % 40) == 0)
|
||||||
printf ("\n");
|
printf ("\n");
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
int eth_3com_recv(struct eth_device* dev)
|
int eth_3com_recv (struct eth_device *dev)
|
||||||
{
|
{
|
||||||
u16 stat = 0;
|
u16 stat = 0;
|
||||||
u32 status;
|
u32 status;
|
||||||
int rx_prev, length = 0;
|
int rx_prev, length = 0;
|
||||||
|
|
||||||
while (!(ETH_STATUS(dev) & UpComplete)) /* wait on receipt of packet */
|
while (!(ETH_STATUS (dev) & UpComplete)) /* wait on receipt of packet */
|
||||||
;
|
;
|
||||||
|
|
||||||
status = le32_to_cpu(rx_ring[rx_next].status); /* packet status */
|
status = le32_to_cpu (rx_ring[rx_next].status); /* packet status */
|
||||||
|
|
||||||
while (status & (1<<15))
|
while (status & (1 << 15)) {
|
||||||
{
|
|
||||||
/* A packet has been received */
|
/* A packet has been received */
|
||||||
|
|
||||||
if (status & (1<<15))
|
if (status & (1 << 15)) {
|
||||||
{
|
|
||||||
/* A valid frame received */
|
/* A valid frame received */
|
||||||
|
|
||||||
length = le32_to_cpu(rx_ring[rx_next].status) & 0x1fff; /* length is in bits 0 - 12 */
|
length = le32_to_cpu (rx_ring[rx_next].status) & 0x1fff; /* length is in bits 0 - 12 */
|
||||||
|
|
||||||
/* Pass the packet up to the protocol layers */
|
/* Pass the packet up to the protocol layers */
|
||||||
|
|
||||||
NetReceive((uchar *)le32_to_cpu(rx_ring[rx_next].addr), length);
|
NetReceive ((uchar *)
|
||||||
rx_ring[rx_next].status = 0; /* clear the status word */
|
le32_to_cpu (rx_ring[rx_next].addr),
|
||||||
ETH_CMD(dev, AckIntr | UpComplete);
|
length);
|
||||||
issue_and_wait(dev, UpUnstall);
|
rx_ring[rx_next].status = 0; /* clear the status word */
|
||||||
}
|
ETH_CMD (dev, AckIntr | UpComplete);
|
||||||
else
|
issue_and_wait (dev, UpUnstall);
|
||||||
if (stat & HostError)
|
} else if (stat & HostError) {
|
||||||
{
|
|
||||||
/* There was an error */
|
/* There was an error */
|
||||||
|
|
||||||
printf("Rx error status: 0x%4x\n", stat);
|
printf ("Rx error status: 0x%4x\n", stat);
|
||||||
init_rx_ring(dev);
|
init_rx_ring (dev);
|
||||||
goto Done;
|
goto Done;
|
||||||
}
|
}
|
||||||
|
|
||||||
rx_prev = rx_next;
|
rx_prev = rx_next;
|
||||||
rx_next = (rx_next + 1) % NUM_RX_DESC;
|
rx_next = (rx_next + 1) % NUM_RX_DESC;
|
||||||
stat = ETH_STATUS(dev); /* register status */
|
stat = ETH_STATUS (dev); /* register status */
|
||||||
status = le32_to_cpu(rx_ring[rx_next].status); /* packet status */
|
status = le32_to_cpu (rx_ring[rx_next].status); /* packet status */
|
||||||
}
|
}
|
||||||
|
|
||||||
Done:
|
Done:
|
||||||
return length;
|
return length;
|
||||||
}
|
}
|
||||||
|
|
||||||
void eth_3com_halt(struct eth_device* dev)
|
void eth_3com_halt (struct eth_device *dev)
|
||||||
{
|
{
|
||||||
if (!(dev->iobase))
|
if (!(dev->iobase)) {
|
||||||
{
|
|
||||||
goto Done;
|
goto Done;
|
||||||
}
|
}
|
||||||
|
|
||||||
issue_and_wait(dev, DownStall); /* shut down transmit and receive */
|
issue_and_wait (dev, DownStall); /* shut down transmit and receive */
|
||||||
issue_and_wait(dev, UpStall);
|
issue_and_wait (dev, UpStall);
|
||||||
issue_and_wait(dev, RxDisable);
|
issue_and_wait (dev, RxDisable);
|
||||||
issue_and_wait(dev, TxDisable);
|
issue_and_wait (dev, TxDisable);
|
||||||
|
|
||||||
/* free(tx_ring); /###* release memory allocated to the DPD and UPD rings */
|
/* free(tx_ring); /###* release memory allocated to the DPD and UPD rings */
|
||||||
/* free(rx_ring); */
|
/* free(rx_ring); */
|
||||||
@@ -764,41 +745,41 @@ Done:
|
|||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void init_rx_ring(struct eth_device* dev)
|
static void init_rx_ring (struct eth_device *dev)
|
||||||
{
|
{
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
PRINTF("Initializing rx_ring. rx_buffer = %p\n", rx_buffer);
|
PRINTF ("Initializing rx_ring. rx_buffer = %p\n", rx_buffer);
|
||||||
issue_and_wait(dev, UpStall);
|
issue_and_wait (dev, UpStall);
|
||||||
|
|
||||||
for (i = 0; i < NUM_RX_DESC; i++)
|
for (i = 0; i < NUM_RX_DESC; i++) {
|
||||||
{
|
rx_ring[i].next =
|
||||||
rx_ring[i].next = cpu_to_le32(((u32) &rx_ring[(i+1) % NUM_RX_DESC]));
|
cpu_to_le32 (((u32) &
|
||||||
rx_ring[i].status = 0;
|
rx_ring[(i + 1) % NUM_RX_DESC]));
|
||||||
rx_ring[i].addr = cpu_to_le32(((u32) &rx_buffer[i][0]));
|
rx_ring[i].status = 0;
|
||||||
rx_ring[i].length = cpu_to_le32(PKTSIZE_ALIGN | LAST_FRAG);
|
rx_ring[i].addr = cpu_to_le32 (((u32) & rx_buffer[i][0]));
|
||||||
|
rx_ring[i].length = cpu_to_le32 (PKTSIZE_ALIGN | LAST_FRAG);
|
||||||
}
|
}
|
||||||
rx_next = 0;
|
rx_next = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void purge_tx_ring(struct eth_device* dev)
|
static void purge_tx_ring (struct eth_device *dev)
|
||||||
{
|
{
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
PRINTF("Purging tx_ring.\n");
|
PRINTF ("Purging tx_ring.\n");
|
||||||
|
|
||||||
tx_next = 0;
|
tx_next = 0;
|
||||||
|
|
||||||
for (i = 0; i < NUM_TX_DESC; i++)
|
for (i = 0; i < NUM_TX_DESC; i++) {
|
||||||
{
|
tx_ring[i].next = 0;
|
||||||
tx_ring[i].next = 0;
|
tx_ring[i].status = 0;
|
||||||
tx_ring[i].status = 0;
|
tx_ring[i].addr = 0;
|
||||||
tx_ring[i].addr = 0;
|
tx_ring[i].length = 0;
|
||||||
tx_ring[i].length = 0;
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
static void read_hw_addr(struct eth_device* dev, bd_t *bis)
|
static void read_hw_addr (struct eth_device *dev, bd_t * bis)
|
||||||
{
|
{
|
||||||
u8 hw_addr[ETH_ALEN];
|
u8 hw_addr[ETH_ALEN];
|
||||||
unsigned int eeprom[0x40];
|
unsigned int eeprom[0x40];
|
||||||
@@ -807,77 +788,77 @@ static void read_hw_addr(struct eth_device* dev, bd_t *bis)
|
|||||||
|
|
||||||
/* Read the station address from the EEPROM. */
|
/* Read the station address from the EEPROM. */
|
||||||
|
|
||||||
EL3WINDOW(dev, 0);
|
EL3WINDOW (dev, 0);
|
||||||
for (i = 0; i < 0x40; i++)
|
for (i = 0; i < 0x40; i++) {
|
||||||
{
|
ETH_OUTW (dev, EEPROM_Read + i, Wn0EepromCmd);
|
||||||
ETH_OUTW(dev, EEPROM_Read + i, Wn0EepromCmd);
|
|
||||||
/* Pause for at least 162 us. for the read to take place. */
|
/* Pause for at least 162 us. for the read to take place. */
|
||||||
for (timer = 10; timer >= 0; timer--)
|
for (timer = 10; timer >= 0; timer--) {
|
||||||
{
|
udelay (162);
|
||||||
udelay(162);
|
if ((ETH_INW (dev, Wn0EepromCmd) & 0x8000) == 0)
|
||||||
if ((ETH_INW(dev, Wn0EepromCmd) & 0x8000) == 0)
|
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
eeprom[i] = ETH_INW(dev, Wn0EepromData);
|
eeprom[i] = ETH_INW (dev, Wn0EepromData);
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Checksum calculation. I'm not sure about this part and there seems to be a bug on the 3com side of things */
|
/* Checksum calculation. I'm not sure about this part and there seems to be a bug on the 3com side of things */
|
||||||
|
|
||||||
for (i = 0; i < 0x21; i++)
|
for (i = 0; i < 0x21; i++)
|
||||||
checksum ^= eeprom[i];
|
checksum ^= eeprom[i];
|
||||||
checksum = (checksum ^ (checksum >> 8)) & 0xff;
|
checksum = (checksum ^ (checksum >> 8)) & 0xff;
|
||||||
|
|
||||||
if (checksum != 0xbb)
|
if (checksum != 0xbb)
|
||||||
printf(" *** INVALID EEPROM CHECKSUM %4.4x *** \n", checksum);
|
printf (" *** INVALID EEPROM CHECKSUM %4.4x *** \n",
|
||||||
|
checksum);
|
||||||
|
|
||||||
for (i = 0, j = 0; i < 3; i++)
|
for (i = 0, j = 0; i < 3; i++) {
|
||||||
{
|
hw_addr[j++] = (u8) ((eeprom[i + 10] >> 8) & 0xff);
|
||||||
hw_addr[j++] = (u8)((eeprom[i+10] >> 8) & 0xff);
|
hw_addr[j++] = (u8) (eeprom[i + 10] & 0xff);
|
||||||
hw_addr[j++] = (u8)(eeprom[i+10] & 0xff);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/* MAC Address is in window 2, write value from EEPROM to window 2 */
|
/* MAC Address is in window 2, write value from EEPROM to window 2 */
|
||||||
|
|
||||||
EL3WINDOW(dev, 2);
|
EL3WINDOW (dev, 2);
|
||||||
for (i = 0; i < 6; i++)
|
for (i = 0; i < 6; i++)
|
||||||
ETH_OUTB(dev, hw_addr[i], i);
|
ETH_OUTB (dev, hw_addr[i], i);
|
||||||
|
|
||||||
for (j = 0; j < ETH_ALEN; j+=2)
|
for (j = 0; j < ETH_ALEN; j += 2) {
|
||||||
{
|
hw_addr[j] = (u8) (ETH_INW (dev, j) & 0xff);
|
||||||
hw_addr[j] = (u8)(ETH_INW(dev, j) & 0xff);
|
hw_addr[j + 1] = (u8) ((ETH_INW (dev, j) >> 8) & 0xff);
|
||||||
hw_addr[j+1] = (u8)((ETH_INW(dev, j) >> 8) & 0xff);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
for (i=0;i<ETH_ALEN;i++)
|
for (i = 0; i < ETH_ALEN; i++) {
|
||||||
{
|
if (hw_addr[i] != bis->bi_enetaddr[i]) {
|
||||||
if (hw_addr[i] != bis->bi_enetaddr[i])
|
/* printf("Warning: HW address don't match:\n"); */
|
||||||
{
|
/* printf("Address in 3Com Window 2 is " */
|
||||||
/* printf("Warning: HW address don't match:\n"); */
|
/* "%02X:%02X:%02X:%02X:%02X:%02X\n", */
|
||||||
/* printf("Address in 3Com Window 2 is " */
|
/* hw_addr[0], hw_addr[1], hw_addr[2], */
|
||||||
/* "%02X:%02X:%02X:%02X:%02X:%02X\n", */
|
/* hw_addr[3], hw_addr[4], hw_addr[5]); */
|
||||||
/* hw_addr[0], hw_addr[1], hw_addr[2], */
|
/* printf("Address used by U-Boot is " */
|
||||||
/* hw_addr[3], hw_addr[4], hw_addr[5]); */
|
/* "%02X:%02X:%02X:%02X:%02X:%02X\n", */
|
||||||
/* printf("Address used by U-Boot is " */
|
/* bis->bi_enetaddr[0], bis->bi_enetaddr[1], */
|
||||||
/* "%02X:%02X:%02X:%02X:%02X:%02X\n", */
|
/* bis->bi_enetaddr[2], bis->bi_enetaddr[3], */
|
||||||
/* bis->bi_enetaddr[0], bis->bi_enetaddr[1], */
|
/* bis->bi_enetaddr[4], bis->bi_enetaddr[5]); */
|
||||||
/* bis->bi_enetaddr[2], bis->bi_enetaddr[3], */
|
/* goto Done; */
|
||||||
/* bis->bi_enetaddr[4], bis->bi_enetaddr[5]); */
|
char buffer[256];
|
||||||
/* goto Done; */
|
|
||||||
char buffer[256];
|
|
||||||
if (bis->bi_enetaddr[0] == 0 && bis->bi_enetaddr[1] == 0 &&
|
|
||||||
bis->bi_enetaddr[2] == 0 && bis->bi_enetaddr[3] == 0 &&
|
|
||||||
bis->bi_enetaddr[4] == 0 && bis->bi_enetaddr[5] == 0)
|
|
||||||
{
|
|
||||||
|
|
||||||
sprintf(buffer, "%02X:%02X:%02X:%02X:%02X:%02X",
|
if (bis->bi_enetaddr[0] == 0
|
||||||
hw_addr[0], hw_addr[1], hw_addr[2],
|
&& bis->bi_enetaddr[1] == 0
|
||||||
hw_addr[3], hw_addr[4], hw_addr[5]);
|
&& bis->bi_enetaddr[2] == 0
|
||||||
setenv("ethaddr", buffer);
|
&& bis->bi_enetaddr[3] == 0
|
||||||
}
|
&& bis->bi_enetaddr[4] == 0
|
||||||
|
&& bis->bi_enetaddr[5] == 0) {
|
||||||
|
|
||||||
|
sprintf (buffer,
|
||||||
|
"%02X:%02X:%02X:%02X:%02X:%02X",
|
||||||
|
hw_addr[0], hw_addr[1], hw_addr[2],
|
||||||
|
hw_addr[3], hw_addr[4], hw_addr[5]);
|
||||||
|
setenv ("ethaddr", buffer);
|
||||||
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
for(i=0; i<ETH_ALEN; i++) dev->enetaddr[i] = hw_addr[i];
|
for (i = 0; i < ETH_ALEN; i++)
|
||||||
|
dev->enetaddr[i] = hw_addr[i];
|
||||||
|
|
||||||
Done:
|
Done:
|
||||||
return;
|
return;
|
||||||
|
|||||||
@@ -176,9 +176,9 @@ external_interrupt(struct pt_regs *regs)
|
|||||||
else {
|
else {
|
||||||
PRINTF ("\nBogus External Interrupt IRQ %d\n", irq);
|
PRINTF ("\nBogus External Interrupt IRQ %d\n", irq);
|
||||||
/*
|
/*
|
||||||
* turn off the bogus interrupt, otherwise it
|
* turn off the bogus interrupt, otherwise it
|
||||||
* might repeat forever
|
* might repeat forever
|
||||||
*/
|
*/
|
||||||
unmask = 0;
|
unmask = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -58,7 +58,7 @@ void i8259_unmask_irq(unsigned int irq);
|
|||||||
#define KBD_STAT_KOBF 0x01
|
#define KBD_STAT_KOBF 0x01
|
||||||
#define KBD_STAT_IBF 0x02
|
#define KBD_STAT_IBF 0x02
|
||||||
#define KBD_STAT_SYS 0x04
|
#define KBD_STAT_SYS 0x04
|
||||||
#define KBD_STAT_CD 0x08
|
#define KBD_STAT_CD 0x08
|
||||||
#define KBD_STAT_LOCK 0x10
|
#define KBD_STAT_LOCK 0x10
|
||||||
#define KBD_STAT_MOBF 0x20
|
#define KBD_STAT_MOBF 0x20
|
||||||
#define KBD_STAT_TI_OUT 0x40
|
#define KBD_STAT_TI_OUT 0x40
|
||||||
@@ -71,50 +71,50 @@ void i8259_unmask_irq(unsigned int irq);
|
|||||||
* Keyboard Controller Commands
|
* Keyboard Controller Commands
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#define KBD_CCMD_READ_MODE 0x20 /* Read mode bits */
|
#define KBD_CCMD_READ_MODE 0x20 /* Read mode bits */
|
||||||
#define KBD_CCMD_WRITE_MODE 0x60 /* Write mode bits */
|
#define KBD_CCMD_WRITE_MODE 0x60 /* Write mode bits */
|
||||||
#define KBD_CCMD_GET_VERSION 0xA1 /* Get controller version */
|
#define KBD_CCMD_GET_VERSION 0xA1 /* Get controller version */
|
||||||
#define KBD_CCMD_MOUSE_DISABLE 0xA7 /* Disable mouse interface */
|
#define KBD_CCMD_MOUSE_DISABLE 0xA7 /* Disable mouse interface */
|
||||||
#define KBD_CCMD_MOUSE_ENABLE 0xA8 /* Enable mouse interface */
|
#define KBD_CCMD_MOUSE_ENABLE 0xA8 /* Enable mouse interface */
|
||||||
#define KBD_CCMD_TEST_MOUSE 0xA9 /* Mouse interface test */
|
#define KBD_CCMD_TEST_MOUSE 0xA9 /* Mouse interface test */
|
||||||
#define KBD_CCMD_SELF_TEST 0xAA /* Controller self test */
|
#define KBD_CCMD_SELF_TEST 0xAA /* Controller self test */
|
||||||
#define KBD_CCMD_KBD_TEST 0xAB /* Keyboard interface test */
|
#define KBD_CCMD_KBD_TEST 0xAB /* Keyboard interface test */
|
||||||
#define KBD_CCMD_KBD_DISABLE 0xAD /* Keyboard interface disable */
|
#define KBD_CCMD_KBD_DISABLE 0xAD /* Keyboard interface disable */
|
||||||
#define KBD_CCMD_KBD_ENABLE 0xAE /* Keyboard interface enable */
|
#define KBD_CCMD_KBD_ENABLE 0xAE /* Keyboard interface enable */
|
||||||
#define KBD_CCMD_WRITE_AUX_OBUF 0xD3 /* Write to output buffer as if
|
#define KBD_CCMD_WRITE_AUX_OBUF 0xD3 /* Write to output buffer as if
|
||||||
initiated by the auxiliary device */
|
initiated by the auxiliary device */
|
||||||
#define KBD_CCMD_WRITE_MOUSE 0xD4 /* Write the following byte to the mouse */
|
#define KBD_CCMD_WRITE_MOUSE 0xD4 /* Write the following byte to the mouse */
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Keyboard Commands
|
* Keyboard Commands
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#define KBD_CMD_SET_LEDS 0xED /* Set keyboard leds */
|
#define KBD_CMD_SET_LEDS 0xED /* Set keyboard leds */
|
||||||
#define KBD_CMD_SET_RATE 0xF3 /* Set typematic rate */
|
#define KBD_CMD_SET_RATE 0xF3 /* Set typematic rate */
|
||||||
#define KBD_CMD_ENABLE 0xF4 /* Enable scanning */
|
#define KBD_CMD_ENABLE 0xF4 /* Enable scanning */
|
||||||
#define KBD_CMD_DISABLE 0xF5 /* Disable scanning */
|
#define KBD_CMD_DISABLE 0xF5 /* Disable scanning */
|
||||||
#define KBD_CMD_RESET 0xFF /* Reset */
|
#define KBD_CMD_RESET 0xFF /* Reset */
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Keyboard Replies
|
* Keyboard Replies
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#define KBD_REPLY_POR 0xAA /* Power on reset */
|
#define KBD_REPLY_POR 0xAA /* Power on reset */
|
||||||
#define KBD_REPLY_ACK 0xFA /* Command ACK */
|
#define KBD_REPLY_ACK 0xFA /* Command ACK */
|
||||||
#define KBD_REPLY_RESEND 0xFE /* Command NACK, send the cmd again */
|
#define KBD_REPLY_RESEND 0xFE /* Command NACK, send the cmd again */
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Status Register Bits
|
* Status Register Bits
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#define KBD_STAT_OBF 0x01 /* Keyboard output buffer full */
|
#define KBD_STAT_OBF 0x01 /* Keyboard output buffer full */
|
||||||
#define KBD_STAT_IBF 0x02 /* Keyboard input buffer full */
|
#define KBD_STAT_IBF 0x02 /* Keyboard input buffer full */
|
||||||
#define KBD_STAT_SELFTEST 0x04 /* Self test successful */
|
#define KBD_STAT_SELFTEST 0x04 /* Self test successful */
|
||||||
#define KBD_STAT_CMD 0x08 /* Last write was a command write (0=data) */
|
#define KBD_STAT_CMD 0x08 /* Last write was a command write (0=data) */
|
||||||
#define KBD_STAT_UNLOCKED 0x10 /* Zero if keyboard locked */
|
#define KBD_STAT_UNLOCKED 0x10 /* Zero if keyboard locked */
|
||||||
#define KBD_STAT_MOUSE_OBF 0x20 /* Mouse output buffer full */
|
#define KBD_STAT_MOUSE_OBF 0x20 /* Mouse output buffer full */
|
||||||
#define KBD_STAT_GTO 0x40 /* General receive/xmit timeout */
|
#define KBD_STAT_GTO 0x40 /* General receive/xmit timeout */
|
||||||
#define KBD_STAT_PERR 0x80 /* Parity error */
|
#define KBD_STAT_PERR 0x80 /* Parity error */
|
||||||
|
|
||||||
#define AUX_STAT_OBF (KBD_STAT_OBF | KBD_STAT_MOUSE_OBF)
|
#define AUX_STAT_OBF (KBD_STAT_OBF | KBD_STAT_MOUSE_OBF)
|
||||||
|
|
||||||
@@ -122,24 +122,24 @@ void i8259_unmask_irq(unsigned int irq);
|
|||||||
* Controller Mode Register Bits
|
* Controller Mode Register Bits
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#define KBD_MODE_KBD_INT 0x01 /* Keyboard data generate IRQ1 */
|
#define KBD_MODE_KBD_INT 0x01 /* Keyboard data generate IRQ1 */
|
||||||
#define KBD_MODE_MOUSE_INT 0x02 /* Mouse data generate IRQ12 */
|
#define KBD_MODE_MOUSE_INT 0x02 /* Mouse data generate IRQ12 */
|
||||||
#define KBD_MODE_SYS 0x04 /* The system flag (?) */
|
#define KBD_MODE_SYS 0x04 /* The system flag (?) */
|
||||||
#define KBD_MODE_NO_KEYLOCK 0x08 /* The keylock doesn't affect the keyboard if set */
|
#define KBD_MODE_NO_KEYLOCK 0x08 /* The keylock doesn't affect the keyboard if set */
|
||||||
#define KBD_MODE_DISABLE_KBD 0x10 /* Disable keyboard interface */
|
#define KBD_MODE_DISABLE_KBD 0x10 /* Disable keyboard interface */
|
||||||
#define KBD_MODE_DISABLE_MOUSE 0x20 /* Disable mouse interface */
|
#define KBD_MODE_DISABLE_MOUSE 0x20 /* Disable mouse interface */
|
||||||
#define KBD_MODE_KCC 0x40 /* Scan code conversion to PC format */
|
#define KBD_MODE_KCC 0x40 /* Scan code conversion to PC format */
|
||||||
#define KBD_MODE_RFU 0x80
|
#define KBD_MODE_RFU 0x80
|
||||||
|
|
||||||
|
|
||||||
#define KDB_DATA_PORT 0x60
|
#define KDB_DATA_PORT 0x60
|
||||||
#define KDB_COMMAND_PORT 0x64
|
#define KDB_COMMAND_PORT 0x64
|
||||||
|
|
||||||
#define LED_SCR 0x01 /* scroll lock led */
|
#define LED_SCR 0x01 /* scroll lock led */
|
||||||
#define LED_CAP 0x04 /* caps lock led */
|
#define LED_CAP 0x04 /* caps lock led */
|
||||||
#define LED_NUM 0x02 /* num lock led */
|
#define LED_NUM 0x02 /* num lock led */
|
||||||
|
|
||||||
#define KBD_BUFFER_LEN 0x20 /* size of the keyboardbuffer */
|
#define KBD_BUFFER_LEN 0x20 /* size of the keyboardbuffer */
|
||||||
|
|
||||||
|
|
||||||
static volatile char kbd_buffer[KBD_BUFFER_LEN];
|
static volatile char kbd_buffer[KBD_BUFFER_LEN];
|
||||||
@@ -194,21 +194,22 @@ static unsigned char kbd_ctrl_xlate[] = {
|
|||||||
* Init
|
* Init
|
||||||
******************************************************************/
|
******************************************************************/
|
||||||
|
|
||||||
int isa_kbd_init(void)
|
int isa_kbd_init (void)
|
||||||
{
|
{
|
||||||
char* result;
|
char *result;
|
||||||
result=kbd_initialize();
|
|
||||||
if (result != NULL)
|
result = kbd_initialize ();
|
||||||
{
|
if (result != NULL) {
|
||||||
result = kbd_initialize();
|
result = kbd_initialize ();
|
||||||
}
|
}
|
||||||
if(result==NULL) {
|
if (result == NULL) {
|
||||||
printf("AT Keyboard initialized\n");
|
printf ("AT Keyboard initialized\n");
|
||||||
irq_install_handler(KBD_INTERRUPT, (interrupt_handler_t *)kbd_interrupt, NULL);
|
irq_install_handler (KBD_INTERRUPT,
|
||||||
|
(interrupt_handler_t *) kbd_interrupt,
|
||||||
|
NULL);
|
||||||
return (1);
|
return (1);
|
||||||
}
|
} else {
|
||||||
else {
|
printf ("%s\n", result);
|
||||||
printf("%s\n",result);
|
|
||||||
return (-1);
|
return (-1);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -225,20 +226,20 @@ int overwrite_console (void)
|
|||||||
int drv_isa_kbd_init (void)
|
int drv_isa_kbd_init (void)
|
||||||
{
|
{
|
||||||
int error;
|
int error;
|
||||||
device_t kbddev ;
|
device_t kbddev ;
|
||||||
char *stdinname = getenv ("stdin");
|
char *stdinname = getenv ("stdin");
|
||||||
|
|
||||||
if(isa_kbd_init()==-1)
|
if(isa_kbd_init() == -1)
|
||||||
return -1;
|
return -1;
|
||||||
memset (&kbddev, 0, sizeof(kbddev));
|
memset (&kbddev, 0, sizeof(kbddev));
|
||||||
strcpy(kbddev.name, DEVNAME);
|
strcpy(kbddev.name, DEVNAME);
|
||||||
kbddev.flags = DEV_FLAGS_INPUT | DEV_FLAGS_SYSTEM;
|
kbddev.flags = DEV_FLAGS_INPUT | DEV_FLAGS_SYSTEM;
|
||||||
kbddev.putc = NULL ;
|
kbddev.putc = NULL ;
|
||||||
kbddev.puts = NULL ;
|
kbddev.puts = NULL ;
|
||||||
kbddev.getc = kbd_getc ;
|
kbddev.getc = kbd_getc ;
|
||||||
kbddev.tstc = kbd_testc ;
|
kbddev.tstc = kbd_testc ;
|
||||||
|
|
||||||
error = device_register (&kbddev);
|
error = device_register (&kbddev);
|
||||||
if(error==0) {
|
if(error==0) {
|
||||||
/* check if this is the standard input device */
|
/* check if this is the standard input device */
|
||||||
if(strcmp(stdinname,DEVNAME)==0) {
|
if(strcmp(stdinname,DEVNAME)==0) {
|
||||||
@@ -301,7 +302,6 @@ int kbd_getc(void)
|
|||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
/* set LEDs */
|
/* set LEDs */
|
||||||
|
|
||||||
void kbd_set_leds(void)
|
void kbd_set_leds(void)
|
||||||
@@ -322,140 +322,139 @@ void kbd_set_leds(void)
|
|||||||
kbd_send_data(leds);
|
kbd_send_data(leds);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
void handle_keyboard_event (unsigned char scancode)
|
||||||
void handle_keyboard_event(unsigned char scancode)
|
|
||||||
{
|
{
|
||||||
unsigned char keycode;
|
unsigned char keycode;
|
||||||
|
|
||||||
/* Convert scancode to keycode */
|
/* Convert scancode to keycode */
|
||||||
PRINTF("scancode %x\n",scancode);
|
PRINTF ("scancode %x\n", scancode);
|
||||||
if(scancode==0xe0) {
|
if (scancode == 0xe0) {
|
||||||
e0=1; /* special charakters */
|
e0 = 1; /* special charakters */
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
if(e0==1) {
|
if (e0 == 1) {
|
||||||
e0=0; /* delete flag */
|
e0 = 0; /* delete flag */
|
||||||
if(!( ((scancode&0x7F)==0x38)|| /* the right ctrl key */
|
if (!(((scancode & 0x7F) == 0x38) || /* the right ctrl key */
|
||||||
((scancode&0x7F)==0x1D)|| /* the right alt key */
|
((scancode & 0x7F) == 0x1D) || /* the right alt key */
|
||||||
((scancode&0x7F)==0x35)|| /* the right '/' key */
|
((scancode & 0x7F) == 0x35) || /* the right '/' key */
|
||||||
((scancode&0x7F)==0x1C)|| /* the right enter key */
|
((scancode & 0x7F) == 0x1C) || /* the right enter key */
|
||||||
((scancode)==0x48)|| /* arrow up */
|
((scancode) == 0x48) || /* arrow up */
|
||||||
((scancode)==0x50)|| /* arrow down */
|
((scancode) == 0x50) || /* arrow down */
|
||||||
((scancode)==0x4b)|| /* arrow left */
|
((scancode) == 0x4b) || /* arrow left */
|
||||||
((scancode)==0x4d))) /* arrow right */
|
((scancode) == 0x4d)))
|
||||||
|
/* arrow right */
|
||||||
/* we swallow unknown e0 codes */
|
/* we swallow unknown e0 codes */
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
/* special cntrl keys */
|
/* special cntrl keys */
|
||||||
switch(scancode)
|
switch (scancode) {
|
||||||
{
|
|
||||||
case 0x48:
|
case 0x48:
|
||||||
kbd_put_queue(27);
|
kbd_put_queue (27);
|
||||||
kbd_put_queue(91);
|
kbd_put_queue (91);
|
||||||
kbd_put_queue('A');
|
kbd_put_queue ('A');
|
||||||
return;
|
return;
|
||||||
case 0x50:
|
case 0x50:
|
||||||
kbd_put_queue(27);
|
kbd_put_queue (27);
|
||||||
kbd_put_queue(91);
|
kbd_put_queue (91);
|
||||||
kbd_put_queue('B');
|
kbd_put_queue ('B');
|
||||||
return;
|
return;
|
||||||
case 0x4b:
|
case 0x4b:
|
||||||
kbd_put_queue(27);
|
kbd_put_queue (27);
|
||||||
kbd_put_queue(91);
|
kbd_put_queue (91);
|
||||||
kbd_put_queue('D');
|
kbd_put_queue ('D');
|
||||||
return;
|
return;
|
||||||
case 0x4D:
|
case 0x4D:
|
||||||
kbd_put_queue(27);
|
kbd_put_queue (27);
|
||||||
kbd_put_queue(91);
|
kbd_put_queue (91);
|
||||||
kbd_put_queue('C');
|
kbd_put_queue ('C');
|
||||||
return;
|
return;
|
||||||
case 0x58: /* F12 key */
|
case 0x58: /* F12 key */
|
||||||
if (ctrl == 1)
|
if (ctrl == 1) {
|
||||||
{
|
extern int console_changed;
|
||||||
extern int console_changed;
|
|
||||||
setenv("stdin", DEVNAME);
|
setenv ("stdin", DEVNAME);
|
||||||
setenv("stdout", "vga");
|
setenv ("stdout", "vga");
|
||||||
console_changed = 1;
|
console_changed = 1;
|
||||||
}
|
}
|
||||||
return;
|
return;
|
||||||
case 0x2A:
|
case 0x2A:
|
||||||
case 0x36: /* shift pressed */
|
case 0x36: /* shift pressed */
|
||||||
shift=1;
|
shift = 1;
|
||||||
return; /* do nothing else */
|
return; /* do nothing else */
|
||||||
case 0xAA:
|
case 0xAA:
|
||||||
case 0xB6: /* shift released */
|
case 0xB6: /* shift released */
|
||||||
shift=0;
|
shift = 0;
|
||||||
return; /* do nothing else */
|
return; /* do nothing else */
|
||||||
case 0x38: /* alt pressed */
|
case 0x38: /* alt pressed */
|
||||||
alt=1;
|
alt = 1;
|
||||||
return; /* do nothing else */
|
return; /* do nothing else */
|
||||||
case 0xB8: /* alt released */
|
case 0xB8: /* alt released */
|
||||||
alt=0;
|
alt = 0;
|
||||||
return; /* do nothing else */
|
return; /* do nothing else */
|
||||||
case 0x1d: /* ctrl pressed */
|
case 0x1d: /* ctrl pressed */
|
||||||
ctrl=1;
|
ctrl = 1;
|
||||||
return; /* do nothing else */
|
return; /* do nothing else */
|
||||||
case 0x9d: /* ctrl released */
|
case 0x9d: /* ctrl released */
|
||||||
ctrl=0;
|
ctrl = 0;
|
||||||
return; /* do nothing else */
|
return; /* do nothing else */
|
||||||
case 0x46: /* scrollock pressed */
|
case 0x46: /* scrollock pressed */
|
||||||
scroll_lock=~scroll_lock;
|
scroll_lock = ~scroll_lock;
|
||||||
kbd_set_leds();
|
kbd_set_leds ();
|
||||||
return; /* do nothing else */
|
return; /* do nothing else */
|
||||||
case 0x3A: /* capslock pressed */
|
case 0x3A: /* capslock pressed */
|
||||||
caps_lock=~caps_lock;
|
caps_lock = ~caps_lock;
|
||||||
kbd_set_leds();
|
kbd_set_leds ();
|
||||||
return;
|
return;
|
||||||
case 0x45: /* numlock pressed */
|
case 0x45: /* numlock pressed */
|
||||||
num_lock=~num_lock;
|
num_lock = ~num_lock;
|
||||||
kbd_set_leds();
|
kbd_set_leds ();
|
||||||
return;
|
return;
|
||||||
case 0xC6: /* scroll lock released */
|
case 0xC6: /* scroll lock released */
|
||||||
case 0xC5: /* num lock released */
|
case 0xC5: /* num lock released */
|
||||||
case 0xBA: /* caps lock released */
|
case 0xBA: /* caps lock released */
|
||||||
return; /* just swallow */
|
return; /* just swallow */
|
||||||
}
|
}
|
||||||
if((scancode&0x80)==0x80) /* key released */
|
if ((scancode & 0x80) == 0x80) /* key released */
|
||||||
return;
|
return;
|
||||||
/* now, decide which table we need */
|
/* now, decide which table we need */
|
||||||
if(scancode > (sizeof(kbd_plain_xlate)/sizeof(kbd_plain_xlate[0]))) { /* scancode not in list */
|
if (scancode > (sizeof (kbd_plain_xlate) / sizeof (kbd_plain_xlate[0]))) { /* scancode not in list */
|
||||||
PRINTF("unkown scancode %X\n",scancode);
|
PRINTF ("unkown scancode %X\n", scancode);
|
||||||
return; /* swallow it */
|
return; /* swallow it */
|
||||||
}
|
}
|
||||||
/* setup plain code first */
|
/* setup plain code first */
|
||||||
keycode=kbd_plain_xlate[scancode];
|
keycode = kbd_plain_xlate[scancode];
|
||||||
if(caps_lock==1) { /* caps_lock is pressed, overwrite plain code */
|
if (caps_lock == 1) { /* caps_lock is pressed, overwrite plain code */
|
||||||
if(scancode > (sizeof(kbd_shift_xlate)/sizeof(kbd_shift_xlate[0]))) { /* scancode not in list */
|
if (scancode > (sizeof (kbd_shift_xlate) / sizeof (kbd_shift_xlate[0]))) { /* scancode not in list */
|
||||||
PRINTF("unkown caps-locked scancode %X\n",scancode);
|
PRINTF ("unkown caps-locked scancode %X\n", scancode);
|
||||||
return; /* swallow it */
|
return; /* swallow it */
|
||||||
}
|
}
|
||||||
keycode=kbd_shift_xlate[scancode];
|
keycode = kbd_shift_xlate[scancode];
|
||||||
if(keycode<'A') { /* we only want the alphas capital */
|
if (keycode < 'A') { /* we only want the alphas capital */
|
||||||
keycode=kbd_plain_xlate[scancode];
|
keycode = kbd_plain_xlate[scancode];
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
if(shift==1) { /* shift overwrites caps_lock */
|
if (shift == 1) { /* shift overwrites caps_lock */
|
||||||
if(scancode > (sizeof(kbd_shift_xlate)/sizeof(kbd_shift_xlate[0]))) { /* scancode not in list */
|
if (scancode > (sizeof (kbd_shift_xlate) / sizeof (kbd_shift_xlate[0]))) { /* scancode not in list */
|
||||||
PRINTF("unkown shifted scancode %X\n",scancode);
|
PRINTF ("unkown shifted scancode %X\n", scancode);
|
||||||
return; /* swallow it */
|
return; /* swallow it */
|
||||||
}
|
}
|
||||||
keycode=kbd_shift_xlate[scancode];
|
keycode = kbd_shift_xlate[scancode];
|
||||||
}
|
}
|
||||||
if(ctrl==1) { /* ctrl overwrites caps_lock and shift */
|
if (ctrl == 1) { /* ctrl overwrites caps_lock and shift */
|
||||||
if(scancode > (sizeof(kbd_ctrl_xlate)/sizeof(kbd_ctrl_xlate[0]))) { /* scancode not in list */
|
if (scancode > (sizeof (kbd_ctrl_xlate) / sizeof (kbd_ctrl_xlate[0]))) { /* scancode not in list */
|
||||||
PRINTF("unkown ctrl scancode %X\n",scancode);
|
PRINTF ("unkown ctrl scancode %X\n", scancode);
|
||||||
return; /* swallow it */
|
return; /* swallow it */
|
||||||
}
|
}
|
||||||
keycode=kbd_ctrl_xlate[scancode];
|
keycode = kbd_ctrl_xlate[scancode];
|
||||||
}
|
}
|
||||||
/* check if valid keycode */
|
/* check if valid keycode */
|
||||||
if(keycode==0xff) {
|
if (keycode == 0xff) {
|
||||||
PRINTF("unkown scancode %X\n",scancode);
|
PRINTF ("unkown scancode %X\n", scancode);
|
||||||
return; /* swallow unknown codes */
|
return; /* swallow unknown codes */
|
||||||
}
|
}
|
||||||
|
|
||||||
kbd_put_queue(keycode);
|
kbd_put_queue (keycode);
|
||||||
PRINTF("%x\n",keycode);
|
PRINTF ("%x\n", keycode);
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
@@ -463,34 +462,31 @@ void handle_keyboard_event(unsigned char scancode)
|
|||||||
* appropriate action.
|
* appropriate action.
|
||||||
*
|
*
|
||||||
*/
|
*/
|
||||||
unsigned char handle_kbd_event(void)
|
unsigned char handle_kbd_event (void)
|
||||||
{
|
{
|
||||||
unsigned char status = kbd_read_status();
|
unsigned char status = kbd_read_status ();
|
||||||
unsigned int work = 10000;
|
unsigned int work = 10000;
|
||||||
|
|
||||||
while ((--work > 0) && (status & KBD_STAT_OBF)) {
|
while ((--work > 0) && (status & KBD_STAT_OBF)) {
|
||||||
unsigned char scancode;
|
unsigned char scancode;
|
||||||
|
|
||||||
scancode = kbd_read_input();
|
scancode = kbd_read_input ();
|
||||||
|
|
||||||
/* Error bytes must be ignored to make the
|
/* Error bytes must be ignored to make the
|
||||||
Synaptics touchpads compaq use work */
|
Synaptics touchpads compaq use work */
|
||||||
/* Ignore error bytes */
|
/* Ignore error bytes */
|
||||||
if (!(status & (KBD_STAT_GTO | KBD_STAT_PERR)))
|
if (!(status & (KBD_STAT_GTO | KBD_STAT_PERR))) {
|
||||||
{
|
if (status & KBD_STAT_MOUSE_OBF); /* not supported: handle_mouse_event(scancode); */
|
||||||
if (status & KBD_STAT_MOUSE_OBF)
|
|
||||||
; /* not supported: handle_mouse_event(scancode); */
|
|
||||||
else
|
else
|
||||||
handle_keyboard_event(scancode);
|
handle_keyboard_event (scancode);
|
||||||
}
|
}
|
||||||
status = kbd_read_status();
|
status = kbd_read_status ();
|
||||||
}
|
}
|
||||||
if (!work)
|
if (!work)
|
||||||
PRINTF("pc_keyb: controller jammed (0x%02X).\n", status);
|
PRINTF ("pc_keyb: controller jammed (0x%02X).\n", status);
|
||||||
return status;
|
return status;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
/******************************************************************************
|
/******************************************************************************
|
||||||
* Lowlevel Part of keyboard section
|
* Lowlevel Part of keyboard section
|
||||||
*/
|
*/
|
||||||
@@ -519,7 +515,7 @@ int kbd_read_data(void)
|
|||||||
int val;
|
int val;
|
||||||
unsigned char status;
|
unsigned char status;
|
||||||
|
|
||||||
val=-1;
|
val = -1;
|
||||||
status = kbd_read_status();
|
status = kbd_read_status();
|
||||||
if (status & KBD_STAT_OBF) {
|
if (status & KBD_STAT_OBF) {
|
||||||
val = kbd_read_input();
|
val = kbd_read_input();
|
||||||
@@ -529,90 +525,91 @@ int kbd_read_data(void)
|
|||||||
return val;
|
return val;
|
||||||
}
|
}
|
||||||
|
|
||||||
int kbd_wait_for_input(void)
|
int kbd_wait_for_input (void)
|
||||||
{
|
{
|
||||||
unsigned long timeout;
|
unsigned long timeout;
|
||||||
int val;
|
int val;
|
||||||
|
|
||||||
timeout = KBD_TIMEOUT;
|
timeout = KBD_TIMEOUT;
|
||||||
val=kbd_read_data();
|
val = kbd_read_data ();
|
||||||
while(val < 0)
|
while (val < 0) {
|
||||||
{
|
if (timeout-- == 0)
|
||||||
if(timeout--==0)
|
|
||||||
return -1;
|
return -1;
|
||||||
udelay(1000);
|
udelay (1000);
|
||||||
val=kbd_read_data();
|
val = kbd_read_data ();
|
||||||
}
|
}
|
||||||
return val;
|
return val;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
int kb_wait(void)
|
int kb_wait (void)
|
||||||
{
|
{
|
||||||
unsigned long timeout = KBC_TIMEOUT * 10;
|
unsigned long timeout = KBC_TIMEOUT * 10;
|
||||||
|
|
||||||
do {
|
do {
|
||||||
unsigned char status = handle_kbd_event();
|
unsigned char status = handle_kbd_event ();
|
||||||
|
|
||||||
if (!(status & KBD_STAT_IBF))
|
if (!(status & KBD_STAT_IBF))
|
||||||
return 0; /* ok */
|
return 0; /* ok */
|
||||||
udelay(1000);
|
udelay (1000);
|
||||||
timeout--;
|
timeout--;
|
||||||
} while (timeout);
|
} while (timeout);
|
||||||
return 1;
|
return 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
void kbd_write_command_w(int data)
|
void kbd_write_command_w (int data)
|
||||||
{
|
{
|
||||||
if(kb_wait())
|
if (kb_wait ())
|
||||||
PRINTF("timeout in kbd_write_command_w\n");
|
PRINTF ("timeout in kbd_write_command_w\n");
|
||||||
kbd_write_command(data);
|
kbd_write_command (data);
|
||||||
}
|
}
|
||||||
|
|
||||||
void kbd_write_output_w(int data)
|
void kbd_write_output_w (int data)
|
||||||
{
|
{
|
||||||
if(kb_wait())
|
if (kb_wait ())
|
||||||
PRINTF("timeout in kbd_write_output_w\n");
|
PRINTF ("timeout in kbd_write_output_w\n");
|
||||||
kbd_write_output(data);
|
kbd_write_output (data);
|
||||||
}
|
}
|
||||||
|
|
||||||
void kbd_send_data(unsigned char data)
|
void kbd_send_data (unsigned char data)
|
||||||
{
|
{
|
||||||
unsigned char status;
|
unsigned char status;
|
||||||
i8259_mask_irq(KBD_INTERRUPT); /* disable interrupt */
|
|
||||||
kbd_write_output_w(data);
|
i8259_mask_irq (KBD_INTERRUPT); /* disable interrupt */
|
||||||
status = kbd_wait_for_input();
|
kbd_write_output_w (data);
|
||||||
|
status = kbd_wait_for_input ();
|
||||||
if (status == KBD_REPLY_ACK)
|
if (status == KBD_REPLY_ACK)
|
||||||
i8259_unmask_irq(KBD_INTERRUPT); /* enable interrupt */
|
i8259_unmask_irq (KBD_INTERRUPT); /* enable interrupt */
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
char * kbd_initialize(void)
|
char *kbd_initialize (void)
|
||||||
{
|
{
|
||||||
int status;
|
int status;
|
||||||
|
|
||||||
in_pointer = 0; /* delete in Buffer */
|
in_pointer = 0; /* delete in Buffer */
|
||||||
out_pointer = 0;
|
out_pointer = 0;
|
||||||
/*
|
/*
|
||||||
* Test the keyboard interface.
|
* Test the keyboard interface.
|
||||||
* This seems to be the only way to get it going.
|
* This seems to be the only way to get it going.
|
||||||
* If the test is successful a x55 is placed in the input buffer.
|
* If the test is successful a x55 is placed in the input buffer.
|
||||||
*/
|
*/
|
||||||
kbd_write_command_w(KBD_CCMD_SELF_TEST);
|
kbd_write_command_w (KBD_CCMD_SELF_TEST);
|
||||||
if (kbd_wait_for_input() != 0x55)
|
if (kbd_wait_for_input () != 0x55)
|
||||||
return "Kbd: failed self test";
|
return "Kbd: failed self test";
|
||||||
/*
|
/*
|
||||||
* Perform a keyboard interface test. This causes the controller
|
* Perform a keyboard interface test. This causes the controller
|
||||||
* to test the keyboard clock and data lines. The results of the
|
* to test the keyboard clock and data lines. The results of the
|
||||||
* test are placed in the input buffer.
|
* test are placed in the input buffer.
|
||||||
*/
|
*/
|
||||||
kbd_write_command_w(KBD_CCMD_KBD_TEST);
|
kbd_write_command_w (KBD_CCMD_KBD_TEST);
|
||||||
if (kbd_wait_for_input() != 0x00)
|
if (kbd_wait_for_input () != 0x00)
|
||||||
return "Kbd: interface failed self test";
|
return "Kbd: interface failed self test";
|
||||||
/*
|
/*
|
||||||
* Enable the keyboard by allowing the keyboard clock to run.
|
* Enable the keyboard by allowing the keyboard clock to run.
|
||||||
*/
|
*/
|
||||||
kbd_write_command_w(KBD_CCMD_KBD_ENABLE);
|
kbd_write_command_w (KBD_CCMD_KBD_ENABLE);
|
||||||
status = kbd_wait_for_input();
|
status = kbd_wait_for_input ();
|
||||||
/*
|
/*
|
||||||
* Reset keyboard. If the read times out
|
* Reset keyboard. If the read times out
|
||||||
* then the assumption is that no keyboard is
|
* then the assumption is that no keyboard is
|
||||||
@@ -622,17 +619,16 @@ char * kbd_initialize(void)
|
|||||||
* Set up to try again if the keyboard asks for RESEND.
|
* Set up to try again if the keyboard asks for RESEND.
|
||||||
*/
|
*/
|
||||||
do {
|
do {
|
||||||
kbd_write_output_w(KBD_CMD_RESET);
|
kbd_write_output_w (KBD_CMD_RESET);
|
||||||
status = kbd_wait_for_input();
|
status = kbd_wait_for_input ();
|
||||||
if (status == KBD_REPLY_ACK)
|
if (status == KBD_REPLY_ACK)
|
||||||
break;
|
break;
|
||||||
if (status != KBD_REPLY_RESEND)
|
if (status != KBD_REPLY_RESEND) {
|
||||||
{
|
PRINTF ("status: %X\n", status);
|
||||||
PRINTF("status: %X\n",status);
|
|
||||||
return "Kbd: reset failed, no ACK";
|
return "Kbd: reset failed, no ACK";
|
||||||
}
|
}
|
||||||
} while (1);
|
} while (1);
|
||||||
if (kbd_wait_for_input() != KBD_REPLY_POR)
|
if (kbd_wait_for_input () != KBD_REPLY_POR)
|
||||||
return "Kbd: reset failed, no POR";
|
return "Kbd: reset failed, no POR";
|
||||||
|
|
||||||
/*
|
/*
|
||||||
@@ -642,44 +638,43 @@ char * kbd_initialize(void)
|
|||||||
* Set up to try again if the keyboard asks for RESEND.
|
* Set up to try again if the keyboard asks for RESEND.
|
||||||
*/
|
*/
|
||||||
do {
|
do {
|
||||||
kbd_write_output_w(KBD_CMD_DISABLE);
|
kbd_write_output_w (KBD_CMD_DISABLE);
|
||||||
status = kbd_wait_for_input();
|
status = kbd_wait_for_input ();
|
||||||
if (status == KBD_REPLY_ACK)
|
if (status == KBD_REPLY_ACK)
|
||||||
break;
|
break;
|
||||||
if (status != KBD_REPLY_RESEND)
|
if (status != KBD_REPLY_RESEND)
|
||||||
return "Kbd: disable keyboard: no ACK";
|
return "Kbd: disable keyboard: no ACK";
|
||||||
} while (1);
|
} while (1);
|
||||||
|
|
||||||
kbd_write_command_w(KBD_CCMD_WRITE_MODE);
|
kbd_write_command_w (KBD_CCMD_WRITE_MODE);
|
||||||
kbd_write_output_w(KBD_MODE_KBD_INT
|
kbd_write_output_w (KBD_MODE_KBD_INT
|
||||||
| KBD_MODE_SYS
|
| KBD_MODE_SYS
|
||||||
| KBD_MODE_DISABLE_MOUSE
|
| KBD_MODE_DISABLE_MOUSE | KBD_MODE_KCC);
|
||||||
| KBD_MODE_KCC);
|
|
||||||
|
|
||||||
/* AMCC powerpc portables need this to use scan-code set 1 -- Cort */
|
/* AMCC powerpc portables need this to use scan-code set 1 -- Cort */
|
||||||
kbd_write_command_w(KBD_CCMD_READ_MODE);
|
kbd_write_command_w (KBD_CCMD_READ_MODE);
|
||||||
if (!(kbd_wait_for_input() & KBD_MODE_KCC)) {
|
if (!(kbd_wait_for_input () & KBD_MODE_KCC)) {
|
||||||
/*
|
/*
|
||||||
* If the controller does not support conversion,
|
* If the controller does not support conversion,
|
||||||
* Set the keyboard to scan-code set 1.
|
* Set the keyboard to scan-code set 1.
|
||||||
*/
|
*/
|
||||||
kbd_write_output_w(0xF0);
|
kbd_write_output_w (0xF0);
|
||||||
kbd_wait_for_input();
|
kbd_wait_for_input ();
|
||||||
kbd_write_output_w(0x01);
|
kbd_write_output_w (0x01);
|
||||||
kbd_wait_for_input();
|
kbd_wait_for_input ();
|
||||||
}
|
}
|
||||||
kbd_write_output_w(KBD_CMD_ENABLE);
|
kbd_write_output_w (KBD_CMD_ENABLE);
|
||||||
if (kbd_wait_for_input() != KBD_REPLY_ACK)
|
if (kbd_wait_for_input () != KBD_REPLY_ACK)
|
||||||
return "Kbd: enable keyboard: no ACK";
|
return "Kbd: enable keyboard: no ACK";
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Finally, set the typematic rate to maximum.
|
* Finally, set the typematic rate to maximum.
|
||||||
*/
|
*/
|
||||||
kbd_write_output_w(KBD_CMD_SET_RATE);
|
kbd_write_output_w (KBD_CMD_SET_RATE);
|
||||||
if (kbd_wait_for_input() != KBD_REPLY_ACK)
|
if (kbd_wait_for_input () != KBD_REPLY_ACK)
|
||||||
return "Kbd: Set rate: no ACK";
|
return "Kbd: Set rate: no ACK";
|
||||||
kbd_write_output_w(0x00);
|
kbd_write_output_w (0x00);
|
||||||
if (kbd_wait_for_input() != KBD_REPLY_ACK)
|
if (kbd_wait_for_input () != KBD_REPLY_ACK)
|
||||||
return "Kbd: Set rate: no ACK";
|
return "Kbd: Set rate: no ACK";
|
||||||
return NULL;
|
return NULL;
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -39,11 +39,11 @@
|
|||||||
|
|
||||||
DIM0_TIM_CTL_0 = 0x737d737d (0xc9)
|
DIM0_TIM_CTL_0 = 0x737d737d (0xc9)
|
||||||
/* DRAM timing control for dimm0 & dimm1; set wait one clock */
|
/* DRAM timing control for dimm0 & dimm1; set wait one clock */
|
||||||
/* cycle for next data access */
|
/* cycle for next data access */
|
||||||
|
|
||||||
DIM2_TIM_CTL_0 = 0x737d737d (0xca)
|
DIM2_TIM_CTL_0 = 0x737d737d (0xca)
|
||||||
/* DRAM timing control for dimm2 & dimm3; set wait one clock */
|
/* DRAM timing control for dimm2 & dimm3; set wait one clock */
|
||||||
/* cycle for next data access */
|
/* cycle for next data access */
|
||||||
|
|
||||||
DIM0_BNK0_CTL_0 = BNK0_RAM_SIZ_128MB (0x90)
|
DIM0_BNK0_CTL_0 = BNK0_RAM_SIZ_128MB (0x90)
|
||||||
/* set dimm0 bank0 for 128 MB */
|
/* set dimm0 bank0 for 128 MB */
|
||||||
|
|||||||
@@ -40,11 +40,11 @@ SECTIONS
|
|||||||
.dynsym : { *(.dynsym) }
|
.dynsym : { *(.dynsym) }
|
||||||
.dynstr : { *(.dynstr) }
|
.dynstr : { *(.dynstr) }
|
||||||
.rel.text : { *(.rel.text) }
|
.rel.text : { *(.rel.text) }
|
||||||
.rela.text : { *(.rela.text) }
|
.rela.text : { *(.rela.text) }
|
||||||
.rel.data : { *(.rel.data) }
|
.rel.data : { *(.rel.data) }
|
||||||
.rela.data : { *(.rela.data) }
|
.rela.data : { *(.rela.data) }
|
||||||
.rel.rodata : { *(.rel.rodata) }
|
.rel.rodata : { *(.rel.rodata) }
|
||||||
.rela.rodata : { *(.rela.rodata) }
|
.rela.rodata : { *(.rela.rodata) }
|
||||||
.rel.got : { *(.rel.got) }
|
.rel.got : { *(.rel.got) }
|
||||||
.rela.got : { *(.rela.got) }
|
.rela.got : { *(.rela.got) }
|
||||||
.rel.ctors : { *(.rel.ctors) }
|
.rel.ctors : { *(.rel.ctors) }
|
||||||
|
|||||||
@@ -518,11 +518,11 @@ void usb_check_int_chain(void)
|
|||||||
uhci_td_t *td,*prevtd;
|
uhci_td_t *td,*prevtd;
|
||||||
|
|
||||||
for(i=0;i<8;i++) {
|
for(i=0;i<8;i++) {
|
||||||
prevtd=&td_int[i]; /* the first previous td is the skeleton td */
|
prevtd = &td_int[i]; /* the first previous td is the skeleton td */
|
||||||
link=swap_32(td_int[i].link) & 0xfffffff0; /* next in chain */
|
link=swap_32(td_int[i].link) & 0xfffffff0; /* next in chain */
|
||||||
td=(uhci_td_t *)link; /* assign it */
|
td=(uhci_td_t *)link; /* assign it */
|
||||||
/* all interrupt TDs are finally linked to the td_int[0].
|
/* all interrupt TDs are finally linked to the td_int[0].
|
||||||
* so we process all until we find the td_int[0].
|
* so we process all until we find the td_int[0].
|
||||||
* if int0 chain points to a QH, we're also done
|
* if int0 chain points to a QH, we're also done
|
||||||
*/
|
*/
|
||||||
while(((i>0) && (link != (unsigned long)&td_int[0])) ||
|
while(((i>0) && (link != (unsigned long)&td_int[0])) ||
|
||||||
@@ -595,7 +595,7 @@ int usb_lowlevel_init(void)
|
|||||||
|
|
||||||
|
|
||||||
busdevfunc=pci_find_device(USB_UHCI_VEND_ID,USB_UHCI_DEV_ID,0); /* get PCI Device ID */
|
busdevfunc=pci_find_device(USB_UHCI_VEND_ID,USB_UHCI_DEV_ID,0); /* get PCI Device ID */
|
||||||
if(busdevfunc==-1) {
|
if(busdevfunc == -1) {
|
||||||
printf("Error USB UHCI (%04X,%04X) not found\n",USB_UHCI_VEND_ID,USB_UHCI_DEV_ID);
|
printf("Error USB UHCI (%04X,%04X) not found\n",USB_UHCI_VEND_ID,USB_UHCI_DEV_ID);
|
||||||
return -1;
|
return -1;
|
||||||
}
|
}
|
||||||
@@ -642,12 +642,12 @@ int usb_lowlevel_init(void)
|
|||||||
*/
|
*/
|
||||||
int usb_lowlevel_stop(void)
|
int usb_lowlevel_stop(void)
|
||||||
{
|
{
|
||||||
if(irqvec==-1)
|
if(irqvec == -1)
|
||||||
return 1;
|
return 1;
|
||||||
irq_free_handler(irqvec);
|
irq_free_handler(irqvec);
|
||||||
irq_free_handler(0);
|
irq_free_handler(0);
|
||||||
reset_hc();
|
reset_hc();
|
||||||
irqvec=-1;
|
irqvec = -1;
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -97,7 +97,7 @@ void via_isa_init(pci_dev_t dev, struct pci_config_table *table)
|
|||||||
pci_write_config_byte(dev, 0x80, 0);
|
pci_write_config_byte(dev, 0x80, 0);
|
||||||
pci_write_config_byte(dev, 0x85, 0x01);
|
pci_write_config_byte(dev, 0x85, 0x01);
|
||||||
|
|
||||||
/* pci_write_config_byte(dev, 0x77, 0x00); */
|
/* pci_write_config_byte(dev, 0x77, 0x00); */
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -212,7 +212,7 @@ void via_cfgfunc_via686(struct pci_controller *host, pci_dev_t dev, struct pci_c
|
|||||||
}
|
}
|
||||||
|
|
||||||
__asm (" .globl via_calibrate_time_base \n"
|
__asm (" .globl via_calibrate_time_base \n"
|
||||||
"via_calibrate_time_base: \n"
|
"via_calibrate_time_base: \n"
|
||||||
" lis 9, 0xfe00 \n"
|
" lis 9, 0xfe00 \n"
|
||||||
" li 0, 0x00 \n"
|
" li 0, 0x00 \n"
|
||||||
" mttbu 0 \n"
|
" mttbu 0 \n"
|
||||||
@@ -262,9 +262,9 @@ void ide_led(uchar led, uchar status)
|
|||||||
/* unsigned char c = in_byte(0x92); */
|
/* unsigned char c = in_byte(0x92); */
|
||||||
|
|
||||||
/* if (!status) */
|
/* if (!status) */
|
||||||
/* out_byte(0x92, c | 0xC0); */
|
/* out_byte(0x92, c | 0xC0); */
|
||||||
/* else */
|
/* else */
|
||||||
/* out_byte(0x92, c & ~0xC0); */
|
/* out_byte(0x92, c & ~0xC0); */
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|||||||
@@ -1,66 +0,0 @@
|
|||||||
#include "menu.h"
|
|
||||||
|
|
||||||
#define SINGLE_BOX 0
|
|
||||||
#define DOUBLE_BOX 1
|
|
||||||
|
|
||||||
void video_draw_box(int style, int attr, char *title, int separate, int x, int y, int w, int h);
|
|
||||||
void video_draw_text(int x, int y, int attr, char *text);
|
|
||||||
void video_save_rect(int x, int y, int w, int h, void *save_area, int clearchar, int clearattr);
|
|
||||||
void video_restore_rect(int x, int y, int w, int h, void *save_area);
|
|
||||||
int video_rows(void);
|
|
||||||
int video_cols(void);
|
|
||||||
|
|
||||||
#define MAX_MENU_OPTIONS 200
|
|
||||||
|
|
||||||
typedef struct
|
|
||||||
{
|
|
||||||
int used; /* flag if this entry is used */
|
|
||||||
int entry_x; /* Character column of the menu entry */
|
|
||||||
int entry_y; /* Character line of the entry */
|
|
||||||
int option_x; /* Character colum of the option (entry is same) */
|
|
||||||
} option_data_t;
|
|
||||||
|
|
||||||
option_data_t odata[MAX_MENU_OPTIONS];
|
|
||||||
|
|
||||||
int normal_attr = 0x0F;
|
|
||||||
int select_attr = 0x2F;
|
|
||||||
int disabled_attr = 0x07;
|
|
||||||
|
|
||||||
menu_t *root_menu;
|
|
||||||
|
|
||||||
int menu_init (menu_t *root)
|
|
||||||
{
|
|
||||||
char *s;
|
|
||||||
int i;
|
|
||||||
|
|
||||||
s = getenv("menu_normal");
|
|
||||||
if (s) normal_attr = atoi(s);
|
|
||||||
|
|
||||||
s = getenv("menu_select");
|
|
||||||
if (s) select_attr = atoi(s);
|
|
||||||
|
|
||||||
s = getenv("menu_disabled");
|
|
||||||
if (s) disabled_attr = atoi(s);
|
|
||||||
|
|
||||||
for (i=0; i<MAX_MENU_OPTIONS; i++) odata[i].used = 0;
|
|
||||||
|
|
||||||
root_menu = root;
|
|
||||||
}
|
|
||||||
|
|
||||||
option_data_t *menu_alloc_odata(void)
|
|
||||||
{
|
|
||||||
int i;
|
|
||||||
for (int i=0; i<MAX_MENU_OPTIONS; i++)
|
|
||||||
{
|
|
||||||
if (odata[i].used == 0) return &odata[i];
|
|
||||||
}
|
|
||||||
return NULL;
|
|
||||||
}
|
|
||||||
|
|
||||||
void menu_free_odata(option_data_t *odata)
|
|
||||||
{
|
|
||||||
odata->used = 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
void menu_layout (menu_t *menu)
|
|
||||||
{
|
|
||||||
@@ -1,174 +0,0 @@
|
|||||||
#ifndef MENU_H
|
|
||||||
#define MENU_H
|
|
||||||
|
|
||||||
/* A single menu */
|
|
||||||
typedef void (*menu_finish_callback)(struct menu_s *menu);
|
|
||||||
|
|
||||||
typedef struct menu_s
|
|
||||||
{
|
|
||||||
char *name; /* Menu name */
|
|
||||||
int num_options; /* Number of options in this menu */
|
|
||||||
int flags; /* Various flags - see below */
|
|
||||||
int option_align; /* Aligns options to a field width of this much characters if != 0 */
|
|
||||||
|
|
||||||
struct menu_option_s **options; /* Pointer to this menu's options */
|
|
||||||
menu_finish_callback callback; /* Called when the menu closes */
|
|
||||||
} menu_t;
|
|
||||||
|
|
||||||
/*
|
|
||||||
* type: Type of the option (see below)
|
|
||||||
* name: Name to display for this option
|
|
||||||
* help: Optional help string
|
|
||||||
* id : optional id number
|
|
||||||
* sys : pointer for system-specific data, init to NULL and don't touch
|
|
||||||
*/
|
|
||||||
|
|
||||||
#define OPTION_PREAMBLE \
|
|
||||||
int type; \
|
|
||||||
char *name; \
|
|
||||||
char *help; \
|
|
||||||
int id; \
|
|
||||||
void *sys; \
|
|
||||||
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Menu option types.
|
|
||||||
* There are a number of different layouts for menu options depending
|
|
||||||
* on their types. Currently there are the following possibilities:
|
|
||||||
*
|
|
||||||
* Submenu:
|
|
||||||
* This entry links to a new menu.
|
|
||||||
*
|
|
||||||
* Boolean:
|
|
||||||
* A simple on/off toggle entry. Booleans can be either yes/no, 0/1 or on/off.
|
|
||||||
* Optionally, this entry can enable/disable a set of other options. An example would
|
|
||||||
* be to enable/disable on-board USB, and if enabled give access to further options like
|
|
||||||
* irq settings, base address etc.
|
|
||||||
*
|
|
||||||
* Text:
|
|
||||||
* A single line/limited number of characters text entry box. Text can be restricted
|
|
||||||
* to a certain charset (digits/hex digits/all/custom). Result is also available as an
|
|
||||||
* int if numeric.
|
|
||||||
*
|
|
||||||
* Selection:
|
|
||||||
* One-of-many type of selection entry. User may choose on of a set of strings, which
|
|
||||||
* maps to a specific value for the variable.
|
|
||||||
*
|
|
||||||
* Routine:
|
|
||||||
* Selecting this calls an entry-specific routine. This can be used for saving contents etc.
|
|
||||||
*
|
|
||||||
* Custom:
|
|
||||||
* Display and behaviour of this entry is defined by a set of callbacks.
|
|
||||||
*/
|
|
||||||
|
|
||||||
#define MENU_SUBMENU_TYPE 0
|
|
||||||
typedef struct menu_submenu_s
|
|
||||||
{
|
|
||||||
OPTION_PREAMBLE
|
|
||||||
|
|
||||||
menu_t * submenu; /* Pointer to the submenu */
|
|
||||||
} menu_submenu_t;
|
|
||||||
|
|
||||||
#define MENU_BOOLEAN_TYPE 1
|
|
||||||
typedef struct menu_boolean_s
|
|
||||||
{
|
|
||||||
OPTION_PREAMBLE
|
|
||||||
|
|
||||||
char *variable; /* Name of the variable to getenv()/setenv() */
|
|
||||||
int subtype; /* Subtype (on/off, 0/1, yes/no, enable/disable), see below */
|
|
||||||
int mutex; /* Bit mask of options to enable/disable. Bit 0 is the option
|
|
||||||
immediately following this one, bit 1 is the next one etc.
|
|
||||||
bit 7 = 0 means to disable when this option is off,
|
|
||||||
bit 7 = 1 means to disable when this option is on.
|
|
||||||
An option is disabled when the type field's upper bit is set */
|
|
||||||
} menu_boolean_t;
|
|
||||||
|
|
||||||
/* BOOLEAN Menu flags */
|
|
||||||
#define MENU_BOOLEAN_ONOFF 0x01
|
|
||||||
#define MENU_BOOLEAN_01 0x02
|
|
||||||
#define MENU_BOOLEAN_YESNO 0x03
|
|
||||||
#define MENU_BOOLEAN_ENDIS 0x04
|
|
||||||
#define MENU_BOOLEAN_TYPE_MASK 0x07
|
|
||||||
|
|
||||||
|
|
||||||
#define MENU_TEXT_TYPE 2
|
|
||||||
typedef struct menu_text_s
|
|
||||||
{
|
|
||||||
OPTION_PREAMBLE
|
|
||||||
|
|
||||||
char *variable; /* Name of the variable to getenv()/setenv() */
|
|
||||||
int maxchars; /* Max number of characters */
|
|
||||||
char *charset; /* Optional charset to use */
|
|
||||||
int flags; /* Flags - see below */
|
|
||||||
} menu_text_t;
|
|
||||||
|
|
||||||
/* TEXT entry menu flags */
|
|
||||||
#define MENU_TEXT_NUMERIC 0x01
|
|
||||||
#define MENU_TEXT_HEXADECIMAL 0x02
|
|
||||||
#define MENU_TEXT_FREE 0x03
|
|
||||||
#define MENU_TEXT_TYPE_MASK 0x07
|
|
||||||
|
|
||||||
|
|
||||||
#define MENU_SELECTION_TYPE 3
|
|
||||||
typedef struct menu_select_option_s
|
|
||||||
{
|
|
||||||
char *map_from; /* Map this variable contents ... */
|
|
||||||
char *map_to; /* ... to this menu text and vice versa */
|
|
||||||
} menu_select_option_t;
|
|
||||||
|
|
||||||
typedef struct menu_select_s
|
|
||||||
{
|
|
||||||
OPTION_PREAMBLE
|
|
||||||
|
|
||||||
int num_options; /* Number of mappings */
|
|
||||||
menu_select_option_t **options;
|
|
||||||
/* Option list array */
|
|
||||||
} menu_select_t;
|
|
||||||
|
|
||||||
|
|
||||||
#define MENU_ROUTINE_TYPE 4
|
|
||||||
typedef void (*menu_routine_callback)(struct menu_routine_s *);
|
|
||||||
|
|
||||||
typedef struct menu_routine_s
|
|
||||||
{
|
|
||||||
OPTION_PREAMBLE
|
|
||||||
menu_routine_callback callback;
|
|
||||||
/* routine to be called */
|
|
||||||
void *user_data; /* User data, don't care for system */
|
|
||||||
} menu_routine_t;
|
|
||||||
|
|
||||||
|
|
||||||
#define MENU_CUSTOM_TYPE 5
|
|
||||||
typedef void (*menu_custom_draw)(struct menu_custom_s *);
|
|
||||||
typedef void (*menu_custom_key)(struct menu_custom_s *, int);
|
|
||||||
|
|
||||||
typedef struct menu_custom_s
|
|
||||||
{
|
|
||||||
OPTION_PREAMBLE
|
|
||||||
menu_custom_draw drawfunc;
|
|
||||||
menu_custom_key keyfunc;
|
|
||||||
void *user_data;
|
|
||||||
} menu_custom_t;
|
|
||||||
|
|
||||||
/*
|
|
||||||
* The menu option superstructure
|
|
||||||
*/
|
|
||||||
typedef struct menu_option_s
|
|
||||||
{
|
|
||||||
union
|
|
||||||
{
|
|
||||||
menu_submenu_t m_sub_menu;
|
|
||||||
menu_boolean_t m_boolean;
|
|
||||||
menu_text_t m_text;
|
|
||||||
menu_select_t m_select;
|
|
||||||
menu_routine_t m_routine;
|
|
||||||
};
|
|
||||||
} menu_option_t;
|
|
||||||
|
|
||||||
/* Init the menu system. Returns <0 on error */
|
|
||||||
int menu_init(menu_t *root);
|
|
||||||
|
|
||||||
/* Execute a single menu. Returns <0 on error */
|
|
||||||
int menu_do(menu_t *menu);
|
|
||||||
|
|
||||||
#endif
|
|
||||||
@@ -56,7 +56,7 @@ in_flash:
|
|||||||
setup stack pointer (r1)
|
setup stack pointer (r1)
|
||||||
setup GOT
|
setup GOT
|
||||||
call cpu_init_f
|
call cpu_init_f
|
||||||
debug leds
|
debug leds
|
||||||
board_init_f: (common/board.c)
|
board_init_f: (common/board.c)
|
||||||
board_early_init_f:
|
board_early_init_f:
|
||||||
remap gt regs?
|
remap gt regs?
|
||||||
@@ -74,7 +74,7 @@ in_flash:
|
|||||||
dram_size()
|
dram_size()
|
||||||
setup PCI slave memory mappings
|
setup PCI slave memory mappings
|
||||||
setup SCS
|
setup SCS
|
||||||
setup monitor
|
setup monitor
|
||||||
alloc board info struct
|
alloc board info struct
|
||||||
init bd struct
|
init bd struct
|
||||||
relocate_code: (cpu/mpc7xxx/start.S)
|
relocate_code: (cpu/mpc7xxx/start.S)
|
||||||
|
|||||||
@@ -23,7 +23,7 @@
|
|||||||
|
|
||||||
/*
|
/*
|
||||||
* flash.c - flash support for the 512k, 8bit boot flash
|
* flash.c - flash support for the 512k, 8bit boot flash
|
||||||
and the 8MB 32bit extra flash on the DB64360
|
and the 8MB 32bit extra flash on the DB64360
|
||||||
* most of this file was based on the existing U-Boot
|
* most of this file was based on the existing U-Boot
|
||||||
* flash drivers.
|
* flash drivers.
|
||||||
*
|
*
|
||||||
|
|||||||
@@ -425,7 +425,7 @@ void mpsc_sdma_init (void)
|
|||||||
(MV64360_SDMA_WIN_ACCESS_FULL <<
|
(MV64360_SDMA_WIN_ACCESS_FULL <<
|
||||||
(MV64360_CUNIT_BASE_ADDR_WIN_0_BIT * 2)));
|
(MV64360_CUNIT_BASE_ADDR_WIN_0_BIT * 2)));
|
||||||
|
|
||||||
/* Setup MPSC internal address space base address */
|
/* Setup MPSC internal address space base address */
|
||||||
GT_REG_WRITE (CUNIT_INTERNAL_SPACE_BASE_ADDR_REG, CFG_GT_REGS);
|
GT_REG_WRITE (CUNIT_INTERNAL_SPACE_BASE_ADDR_REG, CFG_GT_REGS);
|
||||||
|
|
||||||
/* no high address remap*/
|
/* no high address remap*/
|
||||||
|
|||||||
@@ -67,9 +67,9 @@ extern int (*mpsc_test_char)(void);
|
|||||||
#define TX_STOP 0x00010000
|
#define TX_STOP 0x00010000
|
||||||
#define RX_ENABLE 0x00000080
|
#define RX_ENABLE 0x00000080
|
||||||
|
|
||||||
#define SDMA_RX_ABORT (1 << 15)
|
#define SDMA_RX_ABORT (1 << 15)
|
||||||
#define SDMA_TX_ABORT (1 << 31)
|
#define SDMA_TX_ABORT (1 << 31)
|
||||||
#define MPSC_TX_ABORT (1 << 7)
|
#define MPSC_TX_ABORT (1 << 7)
|
||||||
#define MPSC_RX_ABORT (1 << 23)
|
#define MPSC_RX_ABORT (1 << 23)
|
||||||
#define MPSC_ENTER_HUNT (1 << 31)
|
#define MPSC_ENTER_HUNT (1 << 31)
|
||||||
|
|
||||||
|
|||||||
@@ -1391,7 +1391,7 @@ u32 mv_get_internal_sram_base (void)
|
|||||||
* port_phy_addr).
|
* port_phy_addr).
|
||||||
*
|
*
|
||||||
* INPUT:
|
* INPUT:
|
||||||
* ETH_PORT_INFO *p_eth_port_ctrl Ethernet port control struct
|
* ETH_PORT_INFO *p_eth_port_ctrl Ethernet port control struct
|
||||||
*
|
*
|
||||||
* OUTPUT:
|
* OUTPUT:
|
||||||
* See description.
|
* See description.
|
||||||
@@ -1551,7 +1551,7 @@ static void eth_port_init (ETH_PORT_INFO * p_eth_port_ctrl)
|
|||||||
* ether_init_rx_desc_ring for Rx queues).
|
* ether_init_rx_desc_ring for Rx queues).
|
||||||
*
|
*
|
||||||
* INPUT:
|
* INPUT:
|
||||||
* ETH_PORT_INFO *p_eth_port_ctrl Ethernet port control struct
|
* ETH_PORT_INFO *p_eth_port_ctrl Ethernet port control struct
|
||||||
*
|
*
|
||||||
* OUTPUT:
|
* OUTPUT:
|
||||||
* Ethernet port is ready to receive and transmit.
|
* Ethernet port is ready to receive and transmit.
|
||||||
@@ -1641,7 +1641,7 @@ static bool eth_port_start (ETH_PORT_INFO * p_eth_port_ctrl)
|
|||||||
* INPUT:
|
* INPUT:
|
||||||
* ETH_PORT eth_port_num Port number.
|
* ETH_PORT eth_port_num Port number.
|
||||||
* char * p_addr Address to be set
|
* char * p_addr Address to be set
|
||||||
* ETH_QUEUE queue Rx queue number for this MAC address.
|
* ETH_QUEUE queue Rx queue number for this MAC address.
|
||||||
*
|
*
|
||||||
* OUTPUT:
|
* OUTPUT:
|
||||||
* Set MAC address low and high registers. also calls eth_port_uc_addr()
|
* Set MAC address low and high registers. also calls eth_port_uc_addr()
|
||||||
@@ -1679,10 +1679,10 @@ static void eth_port_uc_addr_set (ETH_PORT eth_port_num,
|
|||||||
* parameters.
|
* parameters.
|
||||||
*
|
*
|
||||||
* INPUT:
|
* INPUT:
|
||||||
* ETH_PORT eth_port_num Port number.
|
* ETH_PORT eth_port_num Port number.
|
||||||
* unsigned char uc_nibble Unicast MAC Address last nibble.
|
* unsigned char uc_nibble Unicast MAC Address last nibble.
|
||||||
* ETH_QUEUE queue Rx queue number for this MAC address.
|
* ETH_QUEUE queue Rx queue number for this MAC address.
|
||||||
* int option 0 = Add, 1 = remove address.
|
* int option 0 = Add, 1 = remove address.
|
||||||
*
|
*
|
||||||
* OUTPUT:
|
* OUTPUT:
|
||||||
* This function add/removes MAC addresses from the port unicast address
|
* This function add/removes MAC addresses from the port unicast address
|
||||||
@@ -1761,10 +1761,10 @@ static bool eth_port_uc_addr (ETH_PORT eth_port_num,
|
|||||||
* In this case, the function calculates the CRC-8bit value and calls
|
* In this case, the function calculates the CRC-8bit value and calls
|
||||||
* eth_port_omc_addr() routine to set the Other Multicast Table.
|
* eth_port_omc_addr() routine to set the Other Multicast Table.
|
||||||
* INPUT:
|
* INPUT:
|
||||||
* ETH_PORT eth_port_num Port number.
|
* ETH_PORT eth_port_num Port number.
|
||||||
* unsigned char *p_addr Unicast MAC Address.
|
* unsigned char *p_addr Unicast MAC Address.
|
||||||
* ETH_QUEUE queue Rx queue number for this MAC address.
|
* ETH_QUEUE queue Rx queue number for this MAC address.
|
||||||
* int option 0 = Add, 1 = remove address.
|
* int option 0 = Add, 1 = remove address.
|
||||||
*
|
*
|
||||||
* OUTPUT:
|
* OUTPUT:
|
||||||
* See description.
|
* See description.
|
||||||
@@ -1895,10 +1895,10 @@ static void eth_port_mc_addr (ETH_PORT eth_port_num,
|
|||||||
* according to the argument given.
|
* according to the argument given.
|
||||||
*
|
*
|
||||||
* INPUT:
|
* INPUT:
|
||||||
* ETH_PORT eth_port_num Port number.
|
* ETH_PORT eth_port_num Port number.
|
||||||
* unsigned char mc_byte Multicast addr last byte (MAC DA[7:0] bits).
|
* unsigned char mc_byte Multicast addr last byte (MAC DA[7:0] bits).
|
||||||
* ETH_QUEUE queue Rx queue number for this MAC address.
|
* ETH_QUEUE queue Rx queue number for this MAC address.
|
||||||
* int option 0 = Add, 1 = remove address.
|
* int option 0 = Add, 1 = remove address.
|
||||||
*
|
*
|
||||||
* OUTPUT:
|
* OUTPUT:
|
||||||
* See description.
|
* See description.
|
||||||
@@ -1959,10 +1959,10 @@ static bool eth_port_smc_addr (ETH_PORT eth_port_num,
|
|||||||
* CRC-8 argument given.
|
* CRC-8 argument given.
|
||||||
*
|
*
|
||||||
* INPUT:
|
* INPUT:
|
||||||
* ETH_PORT eth_port_num Port number.
|
* ETH_PORT eth_port_num Port number.
|
||||||
* unsigned char crc8 A CRC-8bit (Polynomial: x^8+x^2+x^1+1).
|
* unsigned char crc8 A CRC-8bit (Polynomial: x^8+x^2+x^1+1).
|
||||||
* ETH_QUEUE queue Rx queue number for this MAC address.
|
* ETH_QUEUE queue Rx queue number for this MAC address.
|
||||||
* int option 0 = Add, 1 = remove address.
|
* int option 0 = Add, 1 = remove address.
|
||||||
*
|
*
|
||||||
* OUTPUT:
|
* OUTPUT:
|
||||||
* See description.
|
* See description.
|
||||||
@@ -2203,7 +2203,7 @@ static bool ethernet_phy_reset (ETH_PORT eth_port_num)
|
|||||||
* eth_port_reset - Reset Ethernet port
|
* eth_port_reset - Reset Ethernet port
|
||||||
*
|
*
|
||||||
* DESCRIPTION:
|
* DESCRIPTION:
|
||||||
* This routine resets the chip by aborting any SDMA engine activity and
|
* This routine resets the chip by aborting any SDMA engine activity and
|
||||||
* clearing the MIB counters. The Receiver and the Transmit unit are in
|
* clearing the MIB counters. The Receiver and the Transmit unit are in
|
||||||
* idle state after this command is performed and the port is disabled.
|
* idle state after this command is performed and the port is disabled.
|
||||||
*
|
*
|
||||||
@@ -2556,9 +2556,9 @@ static void eth_set_access_control (ETH_PORT eth_port_num,
|
|||||||
*
|
*
|
||||||
* INPUT:
|
* INPUT:
|
||||||
* ETH_PORT_INFO *p_eth_port_ctrl Ethernet Port Control srtuct.
|
* ETH_PORT_INFO *p_eth_port_ctrl Ethernet Port Control srtuct.
|
||||||
* ETH_QUEUE rx_queue Number of Rx queue.
|
* ETH_QUEUE rx_queue Number of Rx queue.
|
||||||
* int rx_desc_num Number of Rx descriptors
|
* int rx_desc_num Number of Rx descriptors
|
||||||
* int rx_buff_size Size of Rx buffer
|
* int rx_buff_size Size of Rx buffer
|
||||||
* unsigned int rx_desc_base_addr Rx descriptors memory area base addr.
|
* unsigned int rx_desc_base_addr Rx descriptors memory area base addr.
|
||||||
* unsigned int rx_buff_base_addr Rx buffer memory area base addr.
|
* unsigned int rx_buff_base_addr Rx buffer memory area base addr.
|
||||||
*
|
*
|
||||||
@@ -2650,9 +2650,9 @@ static bool ether_init_rx_desc_ring (ETH_PORT_INFO * p_eth_port_ctrl,
|
|||||||
*
|
*
|
||||||
* INPUT:
|
* INPUT:
|
||||||
* ETH_PORT_INFO *p_eth_port_ctrl Ethernet Port Control srtuct.
|
* ETH_PORT_INFO *p_eth_port_ctrl Ethernet Port Control srtuct.
|
||||||
* ETH_QUEUE tx_queue Number of Tx queue.
|
* ETH_QUEUE tx_queue Number of Tx queue.
|
||||||
* int tx_desc_num Number of Tx descriptors
|
* int tx_desc_num Number of Tx descriptors
|
||||||
* int tx_buff_size Size of Tx buffer
|
* int tx_buff_size Size of Tx buffer
|
||||||
* unsigned int tx_desc_base_addr Tx descriptors memory area base addr.
|
* unsigned int tx_desc_base_addr Tx descriptors memory area base addr.
|
||||||
* unsigned int tx_buff_base_addr Tx buffer memory area base addr.
|
* unsigned int tx_buff_base_addr Tx buffer memory area base addr.
|
||||||
*
|
*
|
||||||
@@ -2745,7 +2745,7 @@ static bool ether_init_tx_desc_ring (ETH_PORT_INFO * p_eth_port_ctrl,
|
|||||||
*
|
*
|
||||||
* INPUT:
|
* INPUT:
|
||||||
* ETH_PORT_INFO *p_eth_port_ctrl Ethernet Port Control srtuct.
|
* ETH_PORT_INFO *p_eth_port_ctrl Ethernet Port Control srtuct.
|
||||||
* ETH_QUEUE tx_queue Number of Tx queue.
|
* ETH_QUEUE tx_queue Number of Tx queue.
|
||||||
* PKT_INFO *p_pkt_info User packet buffer.
|
* PKT_INFO *p_pkt_info User packet buffer.
|
||||||
*
|
*
|
||||||
* OUTPUT:
|
* OUTPUT:
|
||||||
@@ -2861,7 +2861,7 @@ static ETH_FUNC_RET_STATUS eth_port_send (ETH_PORT_INFO * p_eth_port_ctrl,
|
|||||||
*
|
*
|
||||||
* INPUT:
|
* INPUT:
|
||||||
* ETH_PORT_INFO *p_eth_port_ctrl Ethernet Port Control srtuct.
|
* ETH_PORT_INFO *p_eth_port_ctrl Ethernet Port Control srtuct.
|
||||||
* ETH_QUEUE tx_queue Number of Tx queue.
|
* ETH_QUEUE tx_queue Number of Tx queue.
|
||||||
* PKT_INFO *p_pkt_info User packet buffer.
|
* PKT_INFO *p_pkt_info User packet buffer.
|
||||||
*
|
*
|
||||||
* OUTPUT:
|
* OUTPUT:
|
||||||
@@ -2930,7 +2930,7 @@ static ETH_FUNC_RET_STATUS eth_tx_return_desc (ETH_PORT_INFO *
|
|||||||
* eth_port_receive - Get received information from Rx ring.
|
* eth_port_receive - Get received information from Rx ring.
|
||||||
*
|
*
|
||||||
* DESCRIPTION:
|
* DESCRIPTION:
|
||||||
* This routine returns the received data to the caller. There is no
|
* This routine returns the received data to the caller. There is no
|
||||||
* data copying during routine operation. All information is returned
|
* data copying during routine operation. All information is returned
|
||||||
* using pointer to packet information struct passed from the caller.
|
* using pointer to packet information struct passed from the caller.
|
||||||
* If the routine exhausts Rx ring resources then the resource error flag
|
* If the routine exhausts Rx ring resources then the resource error flag
|
||||||
@@ -2938,7 +2938,7 @@ static ETH_FUNC_RET_STATUS eth_tx_return_desc (ETH_PORT_INFO *
|
|||||||
*
|
*
|
||||||
* INPUT:
|
* INPUT:
|
||||||
* ETH_PORT_INFO *p_eth_port_ctrl Ethernet Port Control srtuct.
|
* ETH_PORT_INFO *p_eth_port_ctrl Ethernet Port Control srtuct.
|
||||||
* ETH_QUEUE rx_queue Number of Rx queue.
|
* ETH_QUEUE rx_queue Number of Rx queue.
|
||||||
* PKT_INFO *p_pkt_info User packet buffer.
|
* PKT_INFO *p_pkt_info User packet buffer.
|
||||||
*
|
*
|
||||||
* OUTPUT:
|
* OUTPUT:
|
||||||
@@ -2980,7 +2980,7 @@ static ETH_FUNC_RET_STATUS eth_port_receive (ETH_PORT_INFO * p_eth_port_ctrl,
|
|||||||
|
|
||||||
/* Nothing to receive... */
|
/* Nothing to receive... */
|
||||||
if (command_status & (ETH_BUFFER_OWNED_BY_DMA)) {
|
if (command_status & (ETH_BUFFER_OWNED_BY_DMA)) {
|
||||||
/* DP(printf("Rx: command_status: %08x\n", command_status)); */
|
/* DP(printf("Rx: command_status: %08x\n", command_status)); */
|
||||||
D_CACHE_FLUSH_LINE ((unsigned int) p_rx_curr_desc, 0);
|
D_CACHE_FLUSH_LINE ((unsigned int) p_rx_curr_desc, 0);
|
||||||
/* DP(printf("\nETH_END_OF_JOB ...\n"));*/
|
/* DP(printf("\nETH_END_OF_JOB ...\n"));*/
|
||||||
return ETH_END_OF_JOB;
|
return ETH_END_OF_JOB;
|
||||||
@@ -3019,7 +3019,7 @@ static ETH_FUNC_RET_STATUS eth_port_receive (ETH_PORT_INFO * p_eth_port_ctrl,
|
|||||||
*
|
*
|
||||||
* INPUT:
|
* INPUT:
|
||||||
* ETH_PORT_INFO *p_eth_port_ctrl Ethernet Port Control srtuct.
|
* ETH_PORT_INFO *p_eth_port_ctrl Ethernet Port Control srtuct.
|
||||||
* ETH_QUEUE rx_queue Number of Rx queue.
|
* ETH_QUEUE rx_queue Number of Rx queue.
|
||||||
* PKT_INFO *p_pkt_info Information on the returned buffer.
|
* PKT_INFO *p_pkt_info Information on the returned buffer.
|
||||||
*
|
*
|
||||||
* OUTPUT:
|
* OUTPUT:
|
||||||
|
|||||||
@@ -1728,7 +1728,7 @@ long int dram_size (long int *base, long int maxsize)
|
|||||||
|
|
||||||
/* ppcboot interface function to SDRAM init - this is where all the
|
/* ppcboot interface function to SDRAM init - this is where all the
|
||||||
* controlling logic happens */
|
* controlling logic happens */
|
||||||
long int initdram (int board_type)
|
phys_size_t initdram (int board_type)
|
||||||
{
|
{
|
||||||
int s0 = 0, s1 = 0;
|
int s0 = 0, s1 = 0;
|
||||||
int checkbank[4] = {[0 ... 3] = 0 };
|
int checkbank[4] = {[0 ... 3] = 0 };
|
||||||
|
|||||||
@@ -37,11 +37,11 @@ SECTIONS
|
|||||||
.dynsym : { *(.dynsym) }
|
.dynsym : { *(.dynsym) }
|
||||||
.dynstr : { *(.dynstr) }
|
.dynstr : { *(.dynstr) }
|
||||||
.rel.text : { *(.rel.text) }
|
.rel.text : { *(.rel.text) }
|
||||||
.rela.text : { *(.rela.text) }
|
.rela.text : { *(.rela.text) }
|
||||||
.rel.data : { *(.rel.data) }
|
.rel.data : { *(.rel.data) }
|
||||||
.rela.data : { *(.rela.data) }
|
.rela.data : { *(.rela.data) }
|
||||||
.rel.rodata : { *(.rel.rodata) }
|
.rel.rodata : { *(.rel.rodata) }
|
||||||
.rela.rodata : { *(.rela.rodata) }
|
.rela.rodata : { *(.rela.rodata) }
|
||||||
.rel.got : { *(.rel.got) }
|
.rel.got : { *(.rel.got) }
|
||||||
.rela.got : { *(.rela.got) }
|
.rela.got : { *(.rela.got) }
|
||||||
.rel.ctors : { *(.rel.ctors) }
|
.rel.ctors : { *(.rel.ctors) }
|
||||||
|
|||||||
@@ -425,7 +425,7 @@ void mpsc_sdma_init (void)
|
|||||||
(MV64460_SDMA_WIN_ACCESS_FULL <<
|
(MV64460_SDMA_WIN_ACCESS_FULL <<
|
||||||
(MV64460_CUNIT_BASE_ADDR_WIN_0_BIT * 2)));
|
(MV64460_CUNIT_BASE_ADDR_WIN_0_BIT * 2)));
|
||||||
|
|
||||||
/* Setup MPSC internal address space base address */
|
/* Setup MPSC internal address space base address */
|
||||||
GT_REG_WRITE (CUNIT_INTERNAL_SPACE_BASE_ADDR_REG, CFG_GT_REGS);
|
GT_REG_WRITE (CUNIT_INTERNAL_SPACE_BASE_ADDR_REG, CFG_GT_REGS);
|
||||||
|
|
||||||
/* no high address remap*/
|
/* no high address remap*/
|
||||||
|
|||||||
@@ -67,9 +67,9 @@ extern int (*mpsc_test_char)(void);
|
|||||||
#define TX_STOP 0x00010000
|
#define TX_STOP 0x00010000
|
||||||
#define RX_ENABLE 0x00000080
|
#define RX_ENABLE 0x00000080
|
||||||
|
|
||||||
#define SDMA_RX_ABORT (1 << 15)
|
#define SDMA_RX_ABORT (1 << 15)
|
||||||
#define SDMA_TX_ABORT (1 << 31)
|
#define SDMA_TX_ABORT (1 << 31)
|
||||||
#define MPSC_TX_ABORT (1 << 7)
|
#define MPSC_TX_ABORT (1 << 7)
|
||||||
#define MPSC_RX_ABORT (1 << 23)
|
#define MPSC_RX_ABORT (1 << 23)
|
||||||
#define MPSC_ENTER_HUNT (1 << 31)
|
#define MPSC_ENTER_HUNT (1 << 31)
|
||||||
|
|
||||||
|
|||||||
@@ -1390,7 +1390,7 @@ u32 mv_get_internal_sram_base (void)
|
|||||||
* port_phy_addr).
|
* port_phy_addr).
|
||||||
*
|
*
|
||||||
* INPUT:
|
* INPUT:
|
||||||
* ETH_PORT_INFO *p_eth_port_ctrl Ethernet port control struct
|
* ETH_PORT_INFO *p_eth_port_ctrl Ethernet port control struct
|
||||||
*
|
*
|
||||||
* OUTPUT:
|
* OUTPUT:
|
||||||
* See description.
|
* See description.
|
||||||
@@ -1550,7 +1550,7 @@ static void eth_port_init (ETH_PORT_INFO * p_eth_port_ctrl)
|
|||||||
* ether_init_rx_desc_ring for Rx queues).
|
* ether_init_rx_desc_ring for Rx queues).
|
||||||
*
|
*
|
||||||
* INPUT:
|
* INPUT:
|
||||||
* ETH_PORT_INFO *p_eth_port_ctrl Ethernet port control struct
|
* ETH_PORT_INFO *p_eth_port_ctrl Ethernet port control struct
|
||||||
*
|
*
|
||||||
* OUTPUT:
|
* OUTPUT:
|
||||||
* Ethernet port is ready to receive and transmit.
|
* Ethernet port is ready to receive and transmit.
|
||||||
@@ -1640,7 +1640,7 @@ static bool eth_port_start (ETH_PORT_INFO * p_eth_port_ctrl)
|
|||||||
* INPUT:
|
* INPUT:
|
||||||
* ETH_PORT eth_port_num Port number.
|
* ETH_PORT eth_port_num Port number.
|
||||||
* char * p_addr Address to be set
|
* char * p_addr Address to be set
|
||||||
* ETH_QUEUE queue Rx queue number for this MAC address.
|
* ETH_QUEUE queue Rx queue number for this MAC address.
|
||||||
*
|
*
|
||||||
* OUTPUT:
|
* OUTPUT:
|
||||||
* Set MAC address low and high registers. also calls eth_port_uc_addr()
|
* Set MAC address low and high registers. also calls eth_port_uc_addr()
|
||||||
@@ -1678,10 +1678,10 @@ static void eth_port_uc_addr_set (ETH_PORT eth_port_num,
|
|||||||
* parameters.
|
* parameters.
|
||||||
*
|
*
|
||||||
* INPUT:
|
* INPUT:
|
||||||
* ETH_PORT eth_port_num Port number.
|
* ETH_PORT eth_port_num Port number.
|
||||||
* unsigned char uc_nibble Unicast MAC Address last nibble.
|
* unsigned char uc_nibble Unicast MAC Address last nibble.
|
||||||
* ETH_QUEUE queue Rx queue number for this MAC address.
|
* ETH_QUEUE queue Rx queue number for this MAC address.
|
||||||
* int option 0 = Add, 1 = remove address.
|
* int option 0 = Add, 1 = remove address.
|
||||||
*
|
*
|
||||||
* OUTPUT:
|
* OUTPUT:
|
||||||
* This function add/removes MAC addresses from the port unicast address
|
* This function add/removes MAC addresses from the port unicast address
|
||||||
@@ -1760,10 +1760,10 @@ static bool eth_port_uc_addr (ETH_PORT eth_port_num,
|
|||||||
* In this case, the function calculates the CRC-8bit value and calls
|
* In this case, the function calculates the CRC-8bit value and calls
|
||||||
* eth_port_omc_addr() routine to set the Other Multicast Table.
|
* eth_port_omc_addr() routine to set the Other Multicast Table.
|
||||||
* INPUT:
|
* INPUT:
|
||||||
* ETH_PORT eth_port_num Port number.
|
* ETH_PORT eth_port_num Port number.
|
||||||
* unsigned char *p_addr Unicast MAC Address.
|
* unsigned char *p_addr Unicast MAC Address.
|
||||||
* ETH_QUEUE queue Rx queue number for this MAC address.
|
* ETH_QUEUE queue Rx queue number for this MAC address.
|
||||||
* int option 0 = Add, 1 = remove address.
|
* int option 0 = Add, 1 = remove address.
|
||||||
*
|
*
|
||||||
* OUTPUT:
|
* OUTPUT:
|
||||||
* See description.
|
* See description.
|
||||||
@@ -1894,10 +1894,10 @@ static void eth_port_mc_addr (ETH_PORT eth_port_num,
|
|||||||
* according to the argument given.
|
* according to the argument given.
|
||||||
*
|
*
|
||||||
* INPUT:
|
* INPUT:
|
||||||
* ETH_PORT eth_port_num Port number.
|
* ETH_PORT eth_port_num Port number.
|
||||||
* unsigned char mc_byte Multicast addr last byte (MAC DA[7:0] bits).
|
* unsigned char mc_byte Multicast addr last byte (MAC DA[7:0] bits).
|
||||||
* ETH_QUEUE queue Rx queue number for this MAC address.
|
* ETH_QUEUE queue Rx queue number for this MAC address.
|
||||||
* int option 0 = Add, 1 = remove address.
|
* int option 0 = Add, 1 = remove address.
|
||||||
*
|
*
|
||||||
* OUTPUT:
|
* OUTPUT:
|
||||||
* See description.
|
* See description.
|
||||||
@@ -1958,10 +1958,10 @@ static bool eth_port_smc_addr (ETH_PORT eth_port_num,
|
|||||||
* CRC-8 argument given.
|
* CRC-8 argument given.
|
||||||
*
|
*
|
||||||
* INPUT:
|
* INPUT:
|
||||||
* ETH_PORT eth_port_num Port number.
|
* ETH_PORT eth_port_num Port number.
|
||||||
* unsigned char crc8 A CRC-8bit (Polynomial: x^8+x^2+x^1+1).
|
* unsigned char crc8 A CRC-8bit (Polynomial: x^8+x^2+x^1+1).
|
||||||
* ETH_QUEUE queue Rx queue number for this MAC address.
|
* ETH_QUEUE queue Rx queue number for this MAC address.
|
||||||
* int option 0 = Add, 1 = remove address.
|
* int option 0 = Add, 1 = remove address.
|
||||||
*
|
*
|
||||||
* OUTPUT:
|
* OUTPUT:
|
||||||
* See description.
|
* See description.
|
||||||
@@ -2202,7 +2202,7 @@ static bool ethernet_phy_reset (ETH_PORT eth_port_num)
|
|||||||
* eth_port_reset - Reset Ethernet port
|
* eth_port_reset - Reset Ethernet port
|
||||||
*
|
*
|
||||||
* DESCRIPTION:
|
* DESCRIPTION:
|
||||||
* This routine resets the chip by aborting any SDMA engine activity and
|
* This routine resets the chip by aborting any SDMA engine activity and
|
||||||
* clearing the MIB counters. The Receiver and the Transmit unit are in
|
* clearing the MIB counters. The Receiver and the Transmit unit are in
|
||||||
* idle state after this command is performed and the port is disabled.
|
* idle state after this command is performed and the port is disabled.
|
||||||
*
|
*
|
||||||
@@ -2555,9 +2555,9 @@ static void eth_set_access_control (ETH_PORT eth_port_num,
|
|||||||
*
|
*
|
||||||
* INPUT:
|
* INPUT:
|
||||||
* ETH_PORT_INFO *p_eth_port_ctrl Ethernet Port Control srtuct.
|
* ETH_PORT_INFO *p_eth_port_ctrl Ethernet Port Control srtuct.
|
||||||
* ETH_QUEUE rx_queue Number of Rx queue.
|
* ETH_QUEUE rx_queue Number of Rx queue.
|
||||||
* int rx_desc_num Number of Rx descriptors
|
* int rx_desc_num Number of Rx descriptors
|
||||||
* int rx_buff_size Size of Rx buffer
|
* int rx_buff_size Size of Rx buffer
|
||||||
* unsigned int rx_desc_base_addr Rx descriptors memory area base addr.
|
* unsigned int rx_desc_base_addr Rx descriptors memory area base addr.
|
||||||
* unsigned int rx_buff_base_addr Rx buffer memory area base addr.
|
* unsigned int rx_buff_base_addr Rx buffer memory area base addr.
|
||||||
*
|
*
|
||||||
@@ -2649,9 +2649,9 @@ static bool ether_init_rx_desc_ring (ETH_PORT_INFO * p_eth_port_ctrl,
|
|||||||
*
|
*
|
||||||
* INPUT:
|
* INPUT:
|
||||||
* ETH_PORT_INFO *p_eth_port_ctrl Ethernet Port Control srtuct.
|
* ETH_PORT_INFO *p_eth_port_ctrl Ethernet Port Control srtuct.
|
||||||
* ETH_QUEUE tx_queue Number of Tx queue.
|
* ETH_QUEUE tx_queue Number of Tx queue.
|
||||||
* int tx_desc_num Number of Tx descriptors
|
* int tx_desc_num Number of Tx descriptors
|
||||||
* int tx_buff_size Size of Tx buffer
|
* int tx_buff_size Size of Tx buffer
|
||||||
* unsigned int tx_desc_base_addr Tx descriptors memory area base addr.
|
* unsigned int tx_desc_base_addr Tx descriptors memory area base addr.
|
||||||
* unsigned int tx_buff_base_addr Tx buffer memory area base addr.
|
* unsigned int tx_buff_base_addr Tx buffer memory area base addr.
|
||||||
*
|
*
|
||||||
@@ -2744,7 +2744,7 @@ static bool ether_init_tx_desc_ring (ETH_PORT_INFO * p_eth_port_ctrl,
|
|||||||
*
|
*
|
||||||
* INPUT:
|
* INPUT:
|
||||||
* ETH_PORT_INFO *p_eth_port_ctrl Ethernet Port Control srtuct.
|
* ETH_PORT_INFO *p_eth_port_ctrl Ethernet Port Control srtuct.
|
||||||
* ETH_QUEUE tx_queue Number of Tx queue.
|
* ETH_QUEUE tx_queue Number of Tx queue.
|
||||||
* PKT_INFO *p_pkt_info User packet buffer.
|
* PKT_INFO *p_pkt_info User packet buffer.
|
||||||
*
|
*
|
||||||
* OUTPUT:
|
* OUTPUT:
|
||||||
@@ -2860,7 +2860,7 @@ static ETH_FUNC_RET_STATUS eth_port_send (ETH_PORT_INFO * p_eth_port_ctrl,
|
|||||||
*
|
*
|
||||||
* INPUT:
|
* INPUT:
|
||||||
* ETH_PORT_INFO *p_eth_port_ctrl Ethernet Port Control srtuct.
|
* ETH_PORT_INFO *p_eth_port_ctrl Ethernet Port Control srtuct.
|
||||||
* ETH_QUEUE tx_queue Number of Tx queue.
|
* ETH_QUEUE tx_queue Number of Tx queue.
|
||||||
* PKT_INFO *p_pkt_info User packet buffer.
|
* PKT_INFO *p_pkt_info User packet buffer.
|
||||||
*
|
*
|
||||||
* OUTPUT:
|
* OUTPUT:
|
||||||
@@ -2929,7 +2929,7 @@ static ETH_FUNC_RET_STATUS eth_tx_return_desc (ETH_PORT_INFO *
|
|||||||
* eth_port_receive - Get received information from Rx ring.
|
* eth_port_receive - Get received information from Rx ring.
|
||||||
*
|
*
|
||||||
* DESCRIPTION:
|
* DESCRIPTION:
|
||||||
* This routine returns the received data to the caller. There is no
|
* This routine returns the received data to the caller. There is no
|
||||||
* data copying during routine operation. All information is returned
|
* data copying during routine operation. All information is returned
|
||||||
* using pointer to packet information struct passed from the caller.
|
* using pointer to packet information struct passed from the caller.
|
||||||
* If the routine exhausts Rx ring resources then the resource error flag
|
* If the routine exhausts Rx ring resources then the resource error flag
|
||||||
@@ -2937,7 +2937,7 @@ static ETH_FUNC_RET_STATUS eth_tx_return_desc (ETH_PORT_INFO *
|
|||||||
*
|
*
|
||||||
* INPUT:
|
* INPUT:
|
||||||
* ETH_PORT_INFO *p_eth_port_ctrl Ethernet Port Control srtuct.
|
* ETH_PORT_INFO *p_eth_port_ctrl Ethernet Port Control srtuct.
|
||||||
* ETH_QUEUE rx_queue Number of Rx queue.
|
* ETH_QUEUE rx_queue Number of Rx queue.
|
||||||
* PKT_INFO *p_pkt_info User packet buffer.
|
* PKT_INFO *p_pkt_info User packet buffer.
|
||||||
*
|
*
|
||||||
* OUTPUT:
|
* OUTPUT:
|
||||||
@@ -2979,7 +2979,7 @@ static ETH_FUNC_RET_STATUS eth_port_receive (ETH_PORT_INFO * p_eth_port_ctrl,
|
|||||||
|
|
||||||
/* Nothing to receive... */
|
/* Nothing to receive... */
|
||||||
if (command_status & (ETH_BUFFER_OWNED_BY_DMA)) {
|
if (command_status & (ETH_BUFFER_OWNED_BY_DMA)) {
|
||||||
/* DP(printf("Rx: command_status: %08x\n", command_status)); */
|
/* DP(printf("Rx: command_status: %08x\n", command_status)); */
|
||||||
D_CACHE_FLUSH_LINE ((unsigned int) p_rx_curr_desc, 0);
|
D_CACHE_FLUSH_LINE ((unsigned int) p_rx_curr_desc, 0);
|
||||||
/* DP(printf("\nETH_END_OF_JOB ...\n"));*/
|
/* DP(printf("\nETH_END_OF_JOB ...\n"));*/
|
||||||
return ETH_END_OF_JOB;
|
return ETH_END_OF_JOB;
|
||||||
@@ -3018,7 +3018,7 @@ static ETH_FUNC_RET_STATUS eth_port_receive (ETH_PORT_INFO * p_eth_port_ctrl,
|
|||||||
*
|
*
|
||||||
* INPUT:
|
* INPUT:
|
||||||
* ETH_PORT_INFO *p_eth_port_ctrl Ethernet Port Control srtuct.
|
* ETH_PORT_INFO *p_eth_port_ctrl Ethernet Port Control srtuct.
|
||||||
* ETH_QUEUE rx_queue Number of Rx queue.
|
* ETH_QUEUE rx_queue Number of Rx queue.
|
||||||
* PKT_INFO *p_pkt_info Information on the returned buffer.
|
* PKT_INFO *p_pkt_info Information on the returned buffer.
|
||||||
*
|
*
|
||||||
* OUTPUT:
|
* OUTPUT:
|
||||||
|
|||||||
@@ -1737,7 +1737,7 @@ long int dram_size (long int *base, long int maxsize)
|
|||||||
|
|
||||||
/* ppcboot interface function to SDRAM init - this is where all the
|
/* ppcboot interface function to SDRAM init - this is where all the
|
||||||
* controlling logic happens */
|
* controlling logic happens */
|
||||||
long int initdram (int board_type)
|
phys_size_t initdram (int board_type)
|
||||||
{
|
{
|
||||||
int s0 = 0, s1 = 0;
|
int s0 = 0, s1 = 0;
|
||||||
int checkbank[4] = {[0 ... 3] = 0 };
|
int checkbank[4] = {[0 ... 3] = 0 };
|
||||||
|
|||||||
@@ -37,11 +37,11 @@ SECTIONS
|
|||||||
.dynsym : { *(.dynsym) }
|
.dynsym : { *(.dynsym) }
|
||||||
.dynstr : { *(.dynstr) }
|
.dynstr : { *(.dynstr) }
|
||||||
.rel.text : { *(.rel.text) }
|
.rel.text : { *(.rel.text) }
|
||||||
.rela.text : { *(.rela.text) }
|
.rela.text : { *(.rela.text) }
|
||||||
.rel.data : { *(.rel.data) }
|
.rel.data : { *(.rel.data) }
|
||||||
.rela.data : { *(.rela.data) }
|
.rela.data : { *(.rela.data) }
|
||||||
.rel.rodata : { *(.rel.rodata) }
|
.rel.rodata : { *(.rel.rodata) }
|
||||||
.rela.rodata : { *(.rela.rodata) }
|
.rela.rodata : { *(.rela.rodata) }
|
||||||
.rel.got : { *(.rel.got) }
|
.rel.got : { *(.rel.got) }
|
||||||
.rela.got : { *(.rela.got) }
|
.rela.got : { *(.rela.got) }
|
||||||
.rel.ctors : { *(.rel.ctors) }
|
.rel.ctors : { *(.rel.ctors) }
|
||||||
|
|||||||
@@ -24,25 +24,29 @@
|
|||||||
|
|
||||||
include $(TOPDIR)/config.mk
|
include $(TOPDIR)/config.mk
|
||||||
|
|
||||||
LIB = lib$(BOARD).a
|
LIB = $(obj)lib$(BOARD).a
|
||||||
|
|
||||||
OBJS := migo_r.o
|
COBJS := migo_r.o
|
||||||
SOBJS := lowlevel_init.o
|
SOBJS := lowlevel_init.o
|
||||||
|
|
||||||
|
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
|
||||||
|
OBJS := $(addprefix $(obj),$(COBJS))
|
||||||
|
SOBJS := $(addprefix $(obj),$(SOBJS))
|
||||||
|
|
||||||
$(LIB): $(OBJS) $(SOBJS)
|
$(LIB): $(OBJS) $(SOBJS)
|
||||||
$(AR) crv $@ $(OBJS) $(SOBJS)
|
$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
|
||||||
|
|
||||||
clean:
|
clean:
|
||||||
rm -f $(SOBJS) $(OBJS)
|
rm -f $(SOBJS) $(OBJS)
|
||||||
|
|
||||||
distclean: clean
|
distclean: clean
|
||||||
rm -f $(LIB) core *.bak .depend
|
rm -f $(LIB) core *.bak $(obj).depend
|
||||||
|
|
||||||
#########################################################################
|
#########################################################################
|
||||||
|
|
||||||
.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
|
# defines $(obj).depend target
|
||||||
$(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
|
include $(SRCTREE)/rules.mk
|
||||||
|
|
||||||
-include .depend
|
sinclude $(obj).depend
|
||||||
|
|
||||||
#########################################################################
|
#########################################################################
|
||||||
|
|||||||
@@ -87,7 +87,7 @@ lowlevel_init:
|
|||||||
mov.w r0, @r1
|
mov.w r0, @r1
|
||||||
|
|
||||||
mov.l DLLFRQ_A, r1 ! 20080115
|
mov.l DLLFRQ_A, r1 ! 20080115
|
||||||
mov.l DLLFRQ_D, r0 ! 20080115
|
mov.l DLLFRQ_D, r0 ! 20080115
|
||||||
mov.l r0, @r1
|
mov.l r0, @r1
|
||||||
|
|
||||||
mov.l FRQCR_A, r1 ! 0xA4150000 Frequency control register
|
mov.l FRQCR_A, r1 ! 0xA4150000 Frequency control register
|
||||||
@@ -100,11 +100,11 @@ lowlevel_init:
|
|||||||
|
|
||||||
bsc_init:
|
bsc_init:
|
||||||
mov.l CMNCR_A, r1 ! CMNCR address -> R1
|
mov.l CMNCR_A, r1 ! CMNCR address -> R1
|
||||||
mov.l CMNCR_D, r0 ! CMNCR data -> R0
|
mov.l CMNCR_D, r0 ! CMNCR data -> R0
|
||||||
mov.l r0, @r1 ! CMNCR set
|
mov.l r0, @r1 ! CMNCR set
|
||||||
|
|
||||||
mov.l CS0BCR_A, r1 ! CS0BCR address -> R1
|
mov.l CS0BCR_A, r1 ! CS0BCR address -> R1
|
||||||
mov.l CS0BCR_D, r0 ! CS0BCR data -> R0
|
mov.l CS0BCR_D, r0 ! CS0BCR data -> R0
|
||||||
mov.l r0, @r1 ! CS0BCR set
|
mov.l r0, @r1 ! CS0BCR set
|
||||||
|
|
||||||
mov.l CS4BCR_A, r1 ! CS4BCR address -> R1
|
mov.l CS4BCR_A, r1 ! CS4BCR address -> R1
|
||||||
@@ -112,35 +112,35 @@ bsc_init:
|
|||||||
mov.l r0, @r1 ! CS4BCR set
|
mov.l r0, @r1 ! CS4BCR set
|
||||||
|
|
||||||
mov.l CS5ABCR_A, r1 ! CS5ABCR address -> R1
|
mov.l CS5ABCR_A, r1 ! CS5ABCR address -> R1
|
||||||
mov.l CS5ABCR_D, r0 ! CS5ABCR data -> R0
|
mov.l CS5ABCR_D, r0 ! CS5ABCR data -> R0
|
||||||
mov.l r0, @r1 ! CS5ABCR set
|
mov.l r0, @r1 ! CS5ABCR set
|
||||||
|
|
||||||
mov.l CS5BBCR_A, r1 ! CS5BBCR address -> R1
|
mov.l CS5BBCR_A, r1 ! CS5BBCR address -> R1
|
||||||
mov.l CS5BBCR_D, r0 ! CS5BBCR data -> R0
|
mov.l CS5BBCR_D, r0 ! CS5BBCR data -> R0
|
||||||
mov.l r0, @r1 ! CS5BBCR set
|
mov.l r0, @r1 ! CS5BBCR set
|
||||||
|
|
||||||
mov.l CS6ABCR_A, r1 ! CS6ABCR address -> R1
|
mov.l CS6ABCR_A, r1 ! CS6ABCR address -> R1
|
||||||
mov.l CS6ABCR_D, r0 ! CS6ABCR data -> R0
|
mov.l CS6ABCR_D, r0 ! CS6ABCR data -> R0
|
||||||
mov.l r0, @r1 ! CS6ABCR set
|
mov.l r0, @r1 ! CS6ABCR set
|
||||||
|
|
||||||
mov.l CS0WCR_A, r1 ! CS0WCR address -> R1
|
mov.l CS0WCR_A, r1 ! CS0WCR address -> R1
|
||||||
mov.l CS0WCR_D, r0 ! CS0WCR data -> R0
|
mov.l CS0WCR_D, r0 ! CS0WCR data -> R0
|
||||||
mov.l r0, @r1 ! CS0WCR set
|
mov.l r0, @r1 ! CS0WCR set
|
||||||
|
|
||||||
mov.l CS4WCR_A, r1 ! CS4WCR address -> R1
|
mov.l CS4WCR_A, r1 ! CS4WCR address -> R1
|
||||||
mov.l CS4WCR_D, r0 ! CS4WCR data -> R0
|
mov.l CS4WCR_D, r0 ! CS4WCR data -> R0
|
||||||
mov.l r0, @r1 ! CS4WCR set
|
mov.l r0, @r1 ! CS4WCR set
|
||||||
|
|
||||||
mov.l CS5AWCR_A, r1 ! CS5AWCR address -> R1
|
mov.l CS5AWCR_A, r1 ! CS5AWCR address -> R1
|
||||||
mov.l CS5AWCR_D, r0 ! CS5AWCR data -> R0
|
mov.l CS5AWCR_D, r0 ! CS5AWCR data -> R0
|
||||||
mov.l r0, @r1 ! CS5AWCR set
|
mov.l r0, @r1 ! CS5AWCR set
|
||||||
|
|
||||||
mov.l CS5BWCR_A, r1 ! CS5BWCR address -> R1
|
mov.l CS5BWCR_A, r1 ! CS5BWCR address -> R1
|
||||||
mov.l CS5BWCR_D, r0 ! CS5BWCR data -> R0
|
mov.l CS5BWCR_D, r0 ! CS5BWCR data -> R0
|
||||||
mov.l r0, @r1 ! CS5BWCR set
|
mov.l r0, @r1 ! CS5BWCR set
|
||||||
|
|
||||||
mov.l CS6AWCR_A, r1 ! CS6AWCR address -> R1
|
mov.l CS6AWCR_A, r1 ! CS6AWCR address -> R1
|
||||||
mov.l CS6AWCR_D, r0 ! CS6AWCR data -> R0
|
mov.l CS6AWCR_D, r0 ! CS6AWCR data -> R0
|
||||||
mov.l r0, @r1 ! CS6AWCR set
|
mov.l r0, @r1 ! CS6AWCR set
|
||||||
|
|
||||||
! SDRAM initialization
|
! SDRAM initialization
|
||||||
@@ -173,7 +173,7 @@ bsc_init:
|
|||||||
mov.l r0, @r1
|
mov.l r0, @r1
|
||||||
|
|
||||||
mov.l SDMR3_A, r1 ! SDMR3 address -> R1
|
mov.l SDMR3_A, r1 ! SDMR3 address -> R1
|
||||||
mov #0x00, r0 ! SDMR3 data -> R0
|
mov #0x00, r0 ! SDMR3 data -> R0
|
||||||
mov.b r0, @r1 ! SDMR3 set
|
mov.b r0, @r1 ! SDMR3 set
|
||||||
|
|
||||||
! BL bit off (init = ON) (?!?)
|
! BL bit off (init = ON) (?!?)
|
||||||
|
|||||||
@@ -165,7 +165,7 @@ void rpxclassic_init (void)
|
|||||||
|
|
||||||
/* ------------------------------------------------------------------------- */
|
/* ------------------------------------------------------------------------- */
|
||||||
|
|
||||||
long int initdram (int board_type)
|
phys_size_t initdram (int board_type)
|
||||||
{
|
{
|
||||||
volatile immap_t *immap = (immap_t *) CFG_IMMR;
|
volatile immap_t *immap = (immap_t *) CFG_IMMR;
|
||||||
volatile memctl8xx_t *memctl = &immap->im_memctl;
|
volatile memctl8xx_t *memctl = &immap->im_memctl;
|
||||||
|
|||||||
@@ -33,11 +33,11 @@ SECTIONS
|
|||||||
.dynsym : { *(.dynsym) }
|
.dynsym : { *(.dynsym) }
|
||||||
.dynstr : { *(.dynstr) }
|
.dynstr : { *(.dynstr) }
|
||||||
.rel.text : { *(.rel.text) }
|
.rel.text : { *(.rel.text) }
|
||||||
.rela.text : { *(.rela.text) }
|
.rela.text : { *(.rela.text) }
|
||||||
.rel.data : { *(.rel.data) }
|
.rel.data : { *(.rel.data) }
|
||||||
.rela.data : { *(.rela.data) }
|
.rela.data : { *(.rela.data) }
|
||||||
.rel.rodata : { *(.rel.rodata) }
|
.rel.rodata : { *(.rel.rodata) }
|
||||||
.rela.rodata : { *(.rela.rodata) }
|
.rela.rodata : { *(.rela.rodata) }
|
||||||
.rel.got : { *(.rel.got) }
|
.rel.got : { *(.rel.got) }
|
||||||
.rela.got : { *(.rela.got) }
|
.rela.got : { *(.rela.got) }
|
||||||
.rel.ctors : { *(.rel.ctors) }
|
.rel.ctors : { *(.rel.ctors) }
|
||||||
|
|||||||
@@ -33,11 +33,11 @@ SECTIONS
|
|||||||
.dynsym : { *(.dynsym) }
|
.dynsym : { *(.dynsym) }
|
||||||
.dynstr : { *(.dynstr) }
|
.dynstr : { *(.dynstr) }
|
||||||
.rel.text : { *(.rel.text) }
|
.rel.text : { *(.rel.text) }
|
||||||
.rela.text : { *(.rela.text) }
|
.rela.text : { *(.rela.text) }
|
||||||
.rel.data : { *(.rel.data) }
|
.rel.data : { *(.rel.data) }
|
||||||
.rela.data : { *(.rela.data) }
|
.rela.data : { *(.rela.data) }
|
||||||
.rel.rodata : { *(.rel.rodata) }
|
.rel.rodata : { *(.rel.rodata) }
|
||||||
.rela.rodata : { *(.rela.rodata) }
|
.rela.rodata : { *(.rela.rodata) }
|
||||||
.rel.got : { *(.rel.got) }
|
.rel.got : { *(.rel.got) }
|
||||||
.rela.got : { *(.rela.got) }
|
.rela.got : { *(.rela.got) }
|
||||||
.rel.ctors : { *(.rel.ctors) }
|
.rel.ctors : { *(.rel.ctors) }
|
||||||
|
|||||||
@@ -102,7 +102,7 @@ int checkboard (void)
|
|||||||
|
|
||||||
/* ------------------------------------------------------------------------- */
|
/* ------------------------------------------------------------------------- */
|
||||||
|
|
||||||
long int initdram (int board_type)
|
phys_size_t initdram (int board_type)
|
||||||
{
|
{
|
||||||
volatile immap_t *immap = (immap_t *) CFG_IMMR;
|
volatile immap_t *immap = (immap_t *) CFG_IMMR;
|
||||||
volatile memctl8xx_t *memctl = &immap->im_memctl;
|
volatile memctl8xx_t *memctl = &immap->im_memctl;
|
||||||
|
|||||||
@@ -31,7 +31,7 @@
|
|||||||
* are not tested.
|
* are not tested.
|
||||||
*
|
*
|
||||||
* (?) Does an RPXLite board which
|
* (?) Does an RPXLite board which
|
||||||
* does not use AM29LV800 flash memory exist ?
|
* does not use AM29LV800 flash memory exist ?
|
||||||
* I don't know...
|
* I don't know...
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
|||||||
@@ -33,11 +33,11 @@ SECTIONS
|
|||||||
.dynsym : { *(.dynsym) }
|
.dynsym : { *(.dynsym) }
|
||||||
.dynstr : { *(.dynstr) }
|
.dynstr : { *(.dynstr) }
|
||||||
.rel.text : { *(.rel.text) }
|
.rel.text : { *(.rel.text) }
|
||||||
.rela.text : { *(.rela.text) }
|
.rela.text : { *(.rela.text) }
|
||||||
.rel.data : { *(.rel.data) }
|
.rel.data : { *(.rel.data) }
|
||||||
.rela.data : { *(.rela.data) }
|
.rela.data : { *(.rela.data) }
|
||||||
.rel.rodata : { *(.rel.rodata) }
|
.rel.rodata : { *(.rel.rodata) }
|
||||||
.rela.rodata : { *(.rela.rodata) }
|
.rela.rodata : { *(.rela.rodata) }
|
||||||
.rel.got : { *(.rel.got) }
|
.rel.got : { *(.rel.got) }
|
||||||
.rela.got : { *(.rela.got) }
|
.rela.got : { *(.rela.got) }
|
||||||
.rel.ctors : { *(.rel.ctors) }
|
.rel.ctors : { *(.rel.ctors) }
|
||||||
|
|||||||
@@ -33,11 +33,11 @@ SECTIONS
|
|||||||
.dynsym : { *(.dynsym) }
|
.dynsym : { *(.dynsym) }
|
||||||
.dynstr : { *(.dynstr) }
|
.dynstr : { *(.dynstr) }
|
||||||
.rel.text : { *(.rel.text) }
|
.rel.text : { *(.rel.text) }
|
||||||
.rela.text : { *(.rela.text) }
|
.rela.text : { *(.rela.text) }
|
||||||
.rel.data : { *(.rel.data) }
|
.rel.data : { *(.rel.data) }
|
||||||
.rela.data : { *(.rela.data) }
|
.rela.data : { *(.rela.data) }
|
||||||
.rel.rodata : { *(.rel.rodata) }
|
.rel.rodata : { *(.rel.rodata) }
|
||||||
.rela.rodata : { *(.rela.rodata) }
|
.rela.rodata : { *(.rela.rodata) }
|
||||||
.rel.got : { *(.rel.got) }
|
.rel.got : { *(.rel.got) }
|
||||||
.rela.got : { *(.rela.got) }
|
.rela.got : { *(.rela.got) }
|
||||||
.rel.ctors : { *(.rel.ctors) }
|
.rel.ctors : { *(.rel.ctors) }
|
||||||
|
|||||||
@@ -104,7 +104,7 @@ int checkboard (void)
|
|||||||
|
|
||||||
/* ------------------------------------------------------------------------- */
|
/* ------------------------------------------------------------------------- */
|
||||||
|
|
||||||
long int initdram (int board_type)
|
phys_size_t initdram (int board_type)
|
||||||
{
|
{
|
||||||
volatile immap_t *immap = (immap_t *)CFG_IMMR;
|
volatile immap_t *immap = (immap_t *)CFG_IMMR;
|
||||||
volatile memctl8xx_t *memctl = &immap->im_memctl;
|
volatile memctl8xx_t *memctl = &immap->im_memctl;
|
||||||
@@ -124,7 +124,7 @@ long int initdram (int board_type)
|
|||||||
memctl->memc_mamr = CFG_MAMR_9COL & (~(MAMR_PTAE)); /* no refresh yet */
|
memctl->memc_mamr = CFG_MAMR_9COL & (~(MAMR_PTAE)); /* no refresh yet */
|
||||||
/*Disable Periodic timer A. */
|
/*Disable Periodic timer A. */
|
||||||
|
|
||||||
udelay(200);
|
udelay(200);
|
||||||
|
|
||||||
/* perform SDRAM initializsation sequence */
|
/* perform SDRAM initializsation sequence */
|
||||||
|
|
||||||
|
|||||||
@@ -31,7 +31,7 @@
|
|||||||
* are not tested.
|
* are not tested.
|
||||||
*
|
*
|
||||||
* (?) Does an RPXLite board which
|
* (?) Does an RPXLite board which
|
||||||
* does not use AM29LV800 flash memory exist ?
|
* does not use AM29LV800 flash memory exist ?
|
||||||
* I don't know...
|
* I don't know...
|
||||||
*/
|
*/
|
||||||
|
|
||||||
@@ -178,8 +178,8 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info)
|
|||||||
|
|
||||||
value = addr[0] ;
|
value = addr[0] ;
|
||||||
switch (value & 0x00FF00FF) {
|
switch (value & 0x00FF00FF) {
|
||||||
case AMD_MANUFACT: /* AMD_MANUFACT=0x00010001 in flash.h. */
|
case AMD_MANUFACT: /* AMD_MANUFACT =0x00010001 in flash.h */
|
||||||
info->flash_id = FLASH_MAN_AMD; /* FLASH_MAN_AMD=0x00000000 in flash.h.*/
|
info->flash_id = FLASH_MAN_AMD; /* FLASH_MAN_AMD=0x00000000 in flash.h */
|
||||||
break;
|
break;
|
||||||
case FUJ_MANUFACT:
|
case FUJ_MANUFACT:
|
||||||
info->flash_id = FLASH_MAN_FUJ;
|
info->flash_id = FLASH_MAN_FUJ;
|
||||||
|
|||||||
@@ -33,11 +33,11 @@ SECTIONS
|
|||||||
.dynsym : { *(.dynsym) }
|
.dynsym : { *(.dynsym) }
|
||||||
.dynstr : { *(.dynstr) }
|
.dynstr : { *(.dynstr) }
|
||||||
.rel.text : { *(.rel.text) }
|
.rel.text : { *(.rel.text) }
|
||||||
.rela.text : { *(.rela.text) }
|
.rela.text : { *(.rela.text) }
|
||||||
.rel.data : { *(.rel.data) }
|
.rel.data : { *(.rel.data) }
|
||||||
.rela.data : { *(.rela.data) }
|
.rela.data : { *(.rela.data) }
|
||||||
.rel.rodata : { *(.rel.rodata) }
|
.rel.rodata : { *(.rel.rodata) }
|
||||||
.rela.rodata : { *(.rela.rodata) }
|
.rela.rodata : { *(.rela.rodata) }
|
||||||
.rel.got : { *(.rel.got) }
|
.rel.got : { *(.rel.got) }
|
||||||
.rela.got : { *(.rela.got) }
|
.rela.got : { *(.rela.got) }
|
||||||
.rel.ctors : { *(.rel.ctors) }
|
.rel.ctors : { *(.rel.ctors) }
|
||||||
|
|||||||
@@ -33,11 +33,11 @@ SECTIONS
|
|||||||
.dynsym : { *(.dynsym) }
|
.dynsym : { *(.dynsym) }
|
||||||
.dynstr : { *(.dynstr) }
|
.dynstr : { *(.dynstr) }
|
||||||
.rel.text : { *(.rel.text) }
|
.rel.text : { *(.rel.text) }
|
||||||
.rela.text : { *(.rela.text) }
|
.rela.text : { *(.rela.text) }
|
||||||
.rel.data : { *(.rel.data) }
|
.rel.data : { *(.rel.data) }
|
||||||
.rela.data : { *(.rela.data) }
|
.rela.data : { *(.rela.data) }
|
||||||
.rel.rodata : { *(.rel.rodata) }
|
.rel.rodata : { *(.rel.rodata) }
|
||||||
.rela.rodata : { *(.rela.rodata) }
|
.rela.rodata : { *(.rela.rodata) }
|
||||||
.rel.got : { *(.rel.got) }
|
.rel.got : { *(.rel.got) }
|
||||||
.rela.got : { *(.rela.got) }
|
.rela.got : { *(.rela.got) }
|
||||||
.rel.ctors : { *(.rel.ctors) }
|
.rel.ctors : { *(.rel.ctors) }
|
||||||
|
|||||||
@@ -110,7 +110,7 @@ int checkboard (void)
|
|||||||
|
|
||||||
/* ------------------------------------------------------------------------- */
|
/* ------------------------------------------------------------------------- */
|
||||||
|
|
||||||
long int initdram (int board_type)
|
phys_size_t initdram (int board_type)
|
||||||
{
|
{
|
||||||
volatile immap_t *immap = (immap_t *) CFG_IMMR;
|
volatile immap_t *immap = (immap_t *) CFG_IMMR;
|
||||||
volatile memctl8xx_t *memctl = &immap->im_memctl;
|
volatile memctl8xx_t *memctl = &immap->im_memctl;
|
||||||
|
|||||||
@@ -33,11 +33,11 @@ SECTIONS
|
|||||||
.dynsym : { *(.dynsym) }
|
.dynsym : { *(.dynsym) }
|
||||||
.dynstr : { *(.dynstr) }
|
.dynstr : { *(.dynstr) }
|
||||||
.rel.text : { *(.rel.text) }
|
.rel.text : { *(.rel.text) }
|
||||||
.rela.text : { *(.rela.text) }
|
.rela.text : { *(.rela.text) }
|
||||||
.rel.data : { *(.rel.data) }
|
.rel.data : { *(.rel.data) }
|
||||||
.rela.data : { *(.rela.data) }
|
.rela.data : { *(.rela.data) }
|
||||||
.rel.rodata : { *(.rel.rodata) }
|
.rel.rodata : { *(.rel.rodata) }
|
||||||
.rela.rodata : { *(.rela.rodata) }
|
.rela.rodata : { *(.rela.rodata) }
|
||||||
.rel.got : { *(.rel.got) }
|
.rel.got : { *(.rel.got) }
|
||||||
.rela.got : { *(.rela.got) }
|
.rela.got : { *(.rela.got) }
|
||||||
.rel.ctors : { *(.rel.ctors) }
|
.rel.ctors : { *(.rel.ctors) }
|
||||||
|
|||||||
@@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
|
|||||||
|
|
||||||
LIB = $(obj)lib$(BOARD).a
|
LIB = $(obj)lib$(BOARD).a
|
||||||
|
|
||||||
COBJS = $(BOARD).o flash.o
|
COBJS = $(BOARD).o flash.o
|
||||||
|
|
||||||
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
|
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
|
||||||
OBJS := $(addprefix $(obj),$(COBJS))
|
OBJS := $(addprefix $(obj),$(COBJS))
|
||||||
|
|||||||
@@ -38,7 +38,7 @@ int checkboard (void)
|
|||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
long int initdram (int board_type)
|
phys_size_t initdram (int board_type)
|
||||||
{
|
{
|
||||||
long size;
|
long size;
|
||||||
long new_bank0_end;
|
long new_bank0_end;
|
||||||
@@ -82,7 +82,7 @@ static struct pci_config_table pci_a3000_config_table[] = {
|
|||||||
PCI_COMMAND_MEMORY |
|
PCI_COMMAND_MEMORY |
|
||||||
PCI_COMMAND_MASTER }},
|
PCI_COMMAND_MASTER }},
|
||||||
{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
|
{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
|
||||||
PCI_ANY_ID, 0x15, PCI_ANY_ID, /* PCI slot2 */
|
PCI_ANY_ID, 0x15, PCI_ANY_ID, /* PCI slot2 */
|
||||||
pci_cfgfunc_config_device, { PCI_ENET2_IOADDR,
|
pci_cfgfunc_config_device, { PCI_ENET2_IOADDR,
|
||||||
PCI_ENET2_MEMADDR,
|
PCI_ENET2_MEMADDR,
|
||||||
PCI_COMMAND_IO |
|
PCI_COMMAND_IO |
|
||||||
|
|||||||
@@ -38,7 +38,7 @@ clean:
|
|||||||
rm -f $(SOBJS) $(OBJS)
|
rm -f $(SOBJS) $(OBJS)
|
||||||
|
|
||||||
distclean: clean
|
distclean: clean
|
||||||
rm -f $(LIB) core *.bak .depend
|
rm -f $(LIB) core *.bak $(obj).depend
|
||||||
|
|
||||||
#########################################################################
|
#########################################################################
|
||||||
|
|
||||||
|
|||||||
@@ -38,7 +38,7 @@ clean:
|
|||||||
rm -f $(SOBJS) $(OBJS)
|
rm -f $(SOBJS) $(OBJS)
|
||||||
|
|
||||||
distclean: clean
|
distclean: clean
|
||||||
rm -f $(LIB) core *.bak .depend
|
rm -f $(LIB) core *.bak $(obj).depend
|
||||||
|
|
||||||
#########################################################################
|
#########################################################################
|
||||||
|
|
||||||
|
|||||||
@@ -38,7 +38,7 @@ clean:
|
|||||||
rm -f $(SOBJS) $(OBJS)
|
rm -f $(SOBJS) $(OBJS)
|
||||||
|
|
||||||
distclean: clean
|
distclean: clean
|
||||||
rm -f $(LIB) core *.bak .depend
|
rm -f $(LIB) core *.bak $(obj).depend
|
||||||
|
|
||||||
#########################################################################
|
#########################################################################
|
||||||
|
|
||||||
|
|||||||
@@ -38,7 +38,7 @@ clean:
|
|||||||
rm -f $(SOBJS) $(OBJS)
|
rm -f $(SOBJS) $(OBJS)
|
||||||
|
|
||||||
distclean: clean
|
distclean: clean
|
||||||
rm -f $(LIB) core *.bak .depend
|
rm -f $(LIB) core *.bak $(obj).depend
|
||||||
|
|
||||||
#########################################################################
|
#########################################################################
|
||||||
|
|
||||||
|
|||||||
@@ -41,7 +41,7 @@ clean:
|
|||||||
rm -f $(SOBJS) $(OBJS)
|
rm -f $(SOBJS) $(OBJS)
|
||||||
|
|
||||||
distclean: clean
|
distclean: clean
|
||||||
rm -f $(LIB) core *.bak .depend
|
rm -f $(LIB) core *.bak $(obj).depend
|
||||||
|
|
||||||
#########################################################################
|
#########################################################################
|
||||||
|
|
||||||
|
|||||||
@@ -65,7 +65,7 @@ static uint sdram_table[] = {
|
|||||||
0xfffffc27, 0xfffffc04, 0xfffffc04, 0xfffffc04
|
0xfffffc27, 0xfffffc04, 0xfffffc04, 0xfffffc04
|
||||||
};
|
};
|
||||||
|
|
||||||
long int initdram (int board_type)
|
phys_size_t initdram (int board_type)
|
||||||
{
|
{
|
||||||
long int msize;
|
long int msize;
|
||||||
volatile immap_t *immap = (volatile immap_t *)CFG_IMMR;
|
volatile immap_t *immap = (volatile immap_t *)CFG_IMMR;
|
||||||
|
|||||||
@@ -33,11 +33,11 @@ SECTIONS
|
|||||||
.dynsym : { *(.dynsym) }
|
.dynsym : { *(.dynsym) }
|
||||||
.dynstr : { *(.dynstr) }
|
.dynstr : { *(.dynstr) }
|
||||||
.rel.text : { *(.rel.text) }
|
.rel.text : { *(.rel.text) }
|
||||||
.rela.text : { *(.rela.text) }
|
.rela.text : { *(.rela.text) }
|
||||||
.rel.data : { *(.rel.data) }
|
.rel.data : { *(.rel.data) }
|
||||||
.rela.data : { *(.rela.data) }
|
.rela.data : { *(.rela.data) }
|
||||||
.rel.rodata : { *(.rel.rodata) }
|
.rel.rodata : { *(.rel.rodata) }
|
||||||
.rela.rodata : { *(.rela.rodata) }
|
.rela.rodata : { *(.rela.rodata) }
|
||||||
.rel.got : { *(.rel.got) }
|
.rel.got : { *(.rel.got) }
|
||||||
.rela.got : { *(.rela.got) }
|
.rela.got : { *(.rela.got) }
|
||||||
.rel.ctors : { *(.rel.ctors) }
|
.rel.ctors : { *(.rel.ctors) }
|
||||||
|
|||||||
@@ -23,9 +23,14 @@
|
|||||||
|
|
||||||
include $(TOPDIR)/config.mk
|
include $(TOPDIR)/config.mk
|
||||||
|
|
||||||
|
$(shell mkdir -p $(OBJTREE)/board/freescale/common)
|
||||||
|
|
||||||
LIB = $(obj)lib$(BOARD).a
|
LIB = $(obj)lib$(BOARD).a
|
||||||
|
|
||||||
COBJS-y := $(BOARD).o
|
COBJS-y := $(BOARD).o
|
||||||
|
COBJS-${CONFIG_FSL_DIU_FB} += ads5121_diu.o
|
||||||
|
COBJS-${CONFIG_FSL_DIU_FB} += ../freescale/common/fsl_diu_fb.o
|
||||||
|
COBJS-${CONFIG_FSL_DIU_FB} += ../freescale/common/fsl_logo_bmp.o
|
||||||
COBJS-$(CONFIG_PCI) += pci.o
|
COBJS-$(CONFIG_PCI) += pci.o
|
||||||
|
|
||||||
COBJS := $(COBJS-y)
|
COBJS := $(COBJS-y)
|
||||||
@@ -40,7 +45,7 @@ clean:
|
|||||||
rm -f $(SOBJS) $(OBJS)
|
rm -f $(SOBJS) $(OBJS)
|
||||||
|
|
||||||
distclean: clean
|
distclean: clean
|
||||||
rm -f $(LIB) core *.bak .depend
|
rm -f $(LIB) core *.bak $(obj).depend
|
||||||
|
|
||||||
#########################################################################
|
#########################################################################
|
||||||
|
|
||||||
|
|||||||
7
board/ads5121/README
Normal file
7
board/ads5121/README
Normal file
@@ -0,0 +1,7 @@
|
|||||||
|
To configure for the current (Rev 3.x) ADS5121
|
||||||
|
make ads5121_config
|
||||||
|
This will automatically include PCI, the Real Time CLock, add backup flash
|
||||||
|
ability and set the correct frequency and memory configuration.
|
||||||
|
|
||||||
|
To configure for the older Rev 2 ADS5121 type (this will not have PCI)
|
||||||
|
make ads5121_rev2_config
|
||||||
@@ -26,6 +26,9 @@
|
|||||||
#include <asm/bitops.h>
|
#include <asm/bitops.h>
|
||||||
#include <command.h>
|
#include <command.h>
|
||||||
#include <fdt_support.h>
|
#include <fdt_support.h>
|
||||||
|
#ifdef CONFIG_MISC_INIT_R
|
||||||
|
#include <i2c.h>
|
||||||
|
#endif
|
||||||
|
|
||||||
/* Clocks in use */
|
/* Clocks in use */
|
||||||
#define SCCR1_CLOCKS_EN (CLOCK_SCCR1_CFG_EN | \
|
#define SCCR1_CLOCKS_EN (CLOCK_SCCR1_CFG_EN | \
|
||||||
@@ -39,6 +42,7 @@
|
|||||||
|
|
||||||
#define SCCR2_CLOCKS_EN (CLOCK_SCCR2_MEM_EN | \
|
#define SCCR2_CLOCKS_EN (CLOCK_SCCR2_MEM_EN | \
|
||||||
CLOCK_SCCR2_SPDIF_EN | \
|
CLOCK_SCCR2_SPDIF_EN | \
|
||||||
|
CLOCK_SCCR2_DIU_EN | \
|
||||||
CLOCK_SCCR2_I2C_EN)
|
CLOCK_SCCR2_I2C_EN)
|
||||||
|
|
||||||
#define CSAW_START(start) ((start) & 0xFFFF0000)
|
#define CSAW_START(start) ((start) & 0xFFFF0000)
|
||||||
@@ -73,8 +77,21 @@ int board_early_init_f (void)
|
|||||||
* Without this the flash identification routine fails, as it needs to issue
|
* Without this the flash identification routine fails, as it needs to issue
|
||||||
* write commands in order to establish the device ID.
|
* write commands in order to establish the device ID.
|
||||||
*/
|
*/
|
||||||
*((volatile u8 *)(CFG_CPLD_BASE + 0x08)) = 0xC1;
|
|
||||||
|
|
||||||
|
#ifdef CONFIG_ADS5121_REV2
|
||||||
|
*((volatile u8 *)(CFG_CPLD_BASE + 0x08)) = 0xC1;
|
||||||
|
#else
|
||||||
|
if (*((u8 *)(CFG_CPLD_BASE + 0x08)) & 0x04) {
|
||||||
|
*((volatile u8 *)(CFG_CPLD_BASE + 0x08)) = 0xC1;
|
||||||
|
} else {
|
||||||
|
/* running from Backup flash */
|
||||||
|
*((volatile u8 *)(CFG_CPLD_BASE + 0x08)) = 0x32;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
/*
|
||||||
|
* Configure Flash Speed
|
||||||
|
*/
|
||||||
|
*((volatile u32 *)(CFG_IMMR + LPC_OFFSET + CS0_CONFIG)) = CFG_CS0_CFG;
|
||||||
/*
|
/*
|
||||||
* Enable clocks
|
* Enable clocks
|
||||||
*/
|
*/
|
||||||
@@ -84,7 +101,7 @@ int board_early_init_f (void)
|
|||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
long int initdram (int board_type)
|
phys_size_t initdram (int board_type)
|
||||||
{
|
{
|
||||||
u32 msize = 0;
|
u32 msize = 0;
|
||||||
|
|
||||||
@@ -105,7 +122,7 @@ long int fixed_sdram (void)
|
|||||||
u32 i;
|
u32 i;
|
||||||
|
|
||||||
/* Initialize IO Control */
|
/* Initialize IO Control */
|
||||||
im->io_ctrl.regs[MEM_IDX] = IOCTRL_MUX_DDR;
|
im->io_ctrl.regs[IOCTL_MEM/4] = IOCTRL_MUX_DDR;
|
||||||
|
|
||||||
/* Initialize DDR Local Window */
|
/* Initialize DDR Local Window */
|
||||||
im->sysconf.ddrlaw.bar = CFG_DDR_BASE & 0xFFFFF000;
|
im->sysconf.ddrlaw.bar = CFG_DDR_BASE & 0xFFFFF000;
|
||||||
@@ -186,21 +203,101 @@ long int fixed_sdram (void)
|
|||||||
return msize;
|
return msize;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
int misc_init_r(void)
|
||||||
|
{
|
||||||
|
u8 tmp_val;
|
||||||
|
extern int ads5121_diu_init(void);
|
||||||
|
|
||||||
|
/* Using this for DIU init before the driver in linux takes over
|
||||||
|
* Enable the TFP410 Encoder (I2C address 0x38)
|
||||||
|
*/
|
||||||
|
|
||||||
|
i2c_set_bus_num(2);
|
||||||
|
tmp_val = 0xBF;
|
||||||
|
i2c_write(0x38, 0x08, 1, &tmp_val, sizeof(tmp_val));
|
||||||
|
/* Verify if enabled */
|
||||||
|
tmp_val = 0;
|
||||||
|
i2c_read(0x38, 0x08, 1, &tmp_val, sizeof(tmp_val));
|
||||||
|
debug("DVI Encoder Read: 0x%02lx\n", tmp_val);
|
||||||
|
|
||||||
|
tmp_val = 0x10;
|
||||||
|
i2c_write(0x38, 0x0A, 1, &tmp_val, sizeof(tmp_val));
|
||||||
|
/* Verify if enabled */
|
||||||
|
tmp_val = 0;
|
||||||
|
i2c_read(0x38, 0x0A, 1, &tmp_val, sizeof(tmp_val));
|
||||||
|
debug("DVI Encoder Read: 0x%02lx\n", tmp_val);
|
||||||
|
|
||||||
|
#ifdef CONFIG_FSL_DIU_FB
|
||||||
|
#if !(defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE))
|
||||||
|
ads5121_diu_init();
|
||||||
|
#endif
|
||||||
|
#endif
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
static iopin_t ioregs_init[] = {
|
||||||
|
/* FUNC1=FEC_RX_DV Sets Next 3 to FEC pads */
|
||||||
|
{
|
||||||
|
IOCTL_SPDIF_TXCLK, 3, 0,
|
||||||
|
IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
|
||||||
|
IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
|
||||||
|
},
|
||||||
|
/* Set highest Slew on 9 PATA pins */
|
||||||
|
{
|
||||||
|
IOCTL_PATA_CE1, 9, 1,
|
||||||
|
IO_PIN_FMUX(0) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
|
||||||
|
IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
|
||||||
|
},
|
||||||
|
/* FUNC1=FEC_COL Sets Next 15 to FEC pads */
|
||||||
|
{
|
||||||
|
IOCTL_PSC0_0, 15, 0,
|
||||||
|
IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
|
||||||
|
IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
|
||||||
|
},
|
||||||
|
/* FUNC1=SPDIF_TXCLK */
|
||||||
|
{
|
||||||
|
IOCTL_LPC_CS1, 1, 0,
|
||||||
|
IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
|
||||||
|
IO_PIN_PUE(0) | IO_PIN_ST(1) | IO_PIN_DS(3)
|
||||||
|
},
|
||||||
|
/* FUNC2=SPDIF_TX and sets Next pin to SPDIF_RX */
|
||||||
|
{
|
||||||
|
IOCTL_I2C1_SCL, 2, 0,
|
||||||
|
IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
|
||||||
|
IO_PIN_PUE(0) | IO_PIN_ST(1) | IO_PIN_DS(3)
|
||||||
|
},
|
||||||
|
/* FUNC2=DIU CLK */
|
||||||
|
{
|
||||||
|
IOCTL_PSC6_0, 1, 0,
|
||||||
|
IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
|
||||||
|
IO_PIN_PUE(0) | IO_PIN_ST(1) | IO_PIN_DS(3)
|
||||||
|
},
|
||||||
|
/* FUNC2=DIU_HSYNC */
|
||||||
|
{
|
||||||
|
IOCTL_PSC6_1, 1, 0,
|
||||||
|
IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
|
||||||
|
IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
|
||||||
|
},
|
||||||
|
/* FUNC2=DIUVSYNC Sets Next 26 to DIU Pads */
|
||||||
|
{
|
||||||
|
IOCTL_PSC6_4, 26, 0,
|
||||||
|
IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
|
||||||
|
IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
|
||||||
|
}
|
||||||
|
};
|
||||||
|
|
||||||
int checkboard (void)
|
int checkboard (void)
|
||||||
{
|
{
|
||||||
ushort brd_rev = *(vu_short *) (CFG_CPLD_BASE + 0x00);
|
ushort brd_rev = *(vu_short *) (CFG_CPLD_BASE + 0x00);
|
||||||
uchar cpld_rev = *(vu_char *) (CFG_CPLD_BASE + 0x02);
|
uchar cpld_rev = *(vu_char *) (CFG_CPLD_BASE + 0x02);
|
||||||
volatile immap_t *im = (immap_t *) CFG_IMMR;
|
|
||||||
volatile unsigned long *reg;
|
|
||||||
int i;
|
|
||||||
|
|
||||||
printf ("Board: ADS5121 rev. 0x%04x (CPLD rev. 0x%02x)\n",
|
printf ("Board: ADS5121 rev. 0x%04x (CPLD rev. 0x%02x)\n",
|
||||||
brd_rev, cpld_rev);
|
brd_rev, cpld_rev);
|
||||||
|
/* initialize function mux & slew rate IO inter alia on IO Pins */
|
||||||
|
|
||||||
|
|
||||||
|
iopin_initialize(ioregs_init, sizeof(ioregs_init) / sizeof(ioregs_init[0]));
|
||||||
|
|
||||||
/* change the slew rate on all pata pins to max */
|
|
||||||
reg = (unsigned long *) &(im->io_ctrl.regs[PATA_CE1_IDX]);
|
|
||||||
for (i = 0; i < 9; i++)
|
|
||||||
reg[i] |= 0x00000003;
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
165
board/ads5121/ads5121_diu.c
Normal file
165
board/ads5121/ads5121_diu.c
Normal file
@@ -0,0 +1,165 @@
|
|||||||
|
/*
|
||||||
|
* Copyright 2008 Freescale Semiconductor, Inc.
|
||||||
|
* York Sun <yorksun@freescale.com>
|
||||||
|
*
|
||||||
|
* FSL DIU Framebuffer driver
|
||||||
|
*
|
||||||
|
* See file CREDITS for list of people who contributed to this
|
||||||
|
* project.
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or
|
||||||
|
* modify it under the terms of the GNU General Public License as
|
||||||
|
* published by the Free Software Foundation; either version 2 of
|
||||||
|
* the License, or (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program; if not, write to the Free Software
|
||||||
|
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||||
|
* MA 02111-1307 USA
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include <common.h>
|
||||||
|
#include <command.h>
|
||||||
|
#include <asm/io.h>
|
||||||
|
|
||||||
|
#ifdef CONFIG_FSL_DIU_FB
|
||||||
|
|
||||||
|
#include "../freescale/common/pixis.h"
|
||||||
|
#include "../freescale/common/fsl_diu_fb.h"
|
||||||
|
|
||||||
|
#if defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE)
|
||||||
|
#include <devices.h>
|
||||||
|
#include <video_fb.h>
|
||||||
|
#endif
|
||||||
|
|
||||||
|
extern unsigned int FSL_Logo_BMP[];
|
||||||
|
|
||||||
|
static int xres, yres;
|
||||||
|
|
||||||
|
void diu_set_pixel_clock(unsigned int pixclock)
|
||||||
|
{
|
||||||
|
volatile immap_t *immap = (immap_t *)CFG_IMMR;
|
||||||
|
volatile clk512x_t *clk = &immap->clk;
|
||||||
|
volatile unsigned int *clkdvdr = &clk->scfr[0];
|
||||||
|
unsigned long speed_ccb, temp, pixval;
|
||||||
|
|
||||||
|
speed_ccb = get_bus_freq(0) * 4;
|
||||||
|
temp = 1000000000/pixclock;
|
||||||
|
temp *= 1000;
|
||||||
|
pixval = speed_ccb / temp;
|
||||||
|
debug("DIU pixval = %lu\n", pixval);
|
||||||
|
|
||||||
|
/* Modify PXCLK in GUTS CLKDVDR */
|
||||||
|
debug("DIU: Current value of CLKDVDR = 0x%08x\n", *clkdvdr);
|
||||||
|
temp = *clkdvdr & 0xFFFFFF00;
|
||||||
|
*clkdvdr = temp | (pixval & 0xFF);
|
||||||
|
debug("DIU: Modified value of CLKDVDR = 0x%08x\n", *clkdvdr);
|
||||||
|
}
|
||||||
|
|
||||||
|
int ads5121_diu_init(void)
|
||||||
|
{
|
||||||
|
unsigned int pixel_format;
|
||||||
|
|
||||||
|
xres = 1024;
|
||||||
|
yres = 768;
|
||||||
|
pixel_format = 0x88883316;
|
||||||
|
|
||||||
|
return fsl_diu_init(xres, pixel_format, 0,
|
||||||
|
(unsigned char *)FSL_Logo_BMP);
|
||||||
|
}
|
||||||
|
|
||||||
|
int ads5121diu_init_show_bmp(cmd_tbl_t *cmdtp,
|
||||||
|
int flag, int argc, char *argv[])
|
||||||
|
{
|
||||||
|
unsigned int addr;
|
||||||
|
|
||||||
|
if (argc < 2) {
|
||||||
|
printf("Usage:\n%s\n", cmdtp->usage);
|
||||||
|
return 1;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (!strncmp(argv[1], "init", 4)) {
|
||||||
|
#if defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE)
|
||||||
|
fsl_diu_clear_screen();
|
||||||
|
drv_video_init();
|
||||||
|
#else
|
||||||
|
return ads5121_diu_init();
|
||||||
|
#endif
|
||||||
|
} else {
|
||||||
|
addr = simple_strtoul(argv[1], NULL, 16);
|
||||||
|
fsl_diu_clear_screen();
|
||||||
|
fsl_diu_display_bmp((unsigned char *)addr, 0, 0, 0);
|
||||||
|
}
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
U_BOOT_CMD(
|
||||||
|
diufb, CFG_MAXARGS, 1, ads5121diu_init_show_bmp,
|
||||||
|
"diufb init | addr - Init or Display BMP file\n",
|
||||||
|
"init\n - initialize DIU\n"
|
||||||
|
"addr\n - display bmp at address 'addr'\n"
|
||||||
|
);
|
||||||
|
|
||||||
|
|
||||||
|
#if defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE)
|
||||||
|
|
||||||
|
/*
|
||||||
|
* The Graphic Device
|
||||||
|
*/
|
||||||
|
GraphicDevice ctfb;
|
||||||
|
void *video_hw_init(void)
|
||||||
|
{
|
||||||
|
GraphicDevice *pGD = (GraphicDevice *) &ctfb;
|
||||||
|
struct fb_info *info;
|
||||||
|
|
||||||
|
if (ads5121_diu_init() < 0)
|
||||||
|
return;
|
||||||
|
|
||||||
|
/* fill in Graphic device struct */
|
||||||
|
sprintf(pGD->modeIdent, "%dx%dx%d %ldkHz %ldHz",
|
||||||
|
xres, yres, 32, 64, 60);
|
||||||
|
|
||||||
|
pGD->frameAdrs = (unsigned int)fsl_fb_open(&info);
|
||||||
|
pGD->winSizeX = xres;
|
||||||
|
pGD->winSizeY = yres - info->logo_height;
|
||||||
|
pGD->plnSizeX = pGD->winSizeX;
|
||||||
|
pGD->plnSizeY = pGD->winSizeY;
|
||||||
|
|
||||||
|
pGD->gdfBytesPP = 4;
|
||||||
|
pGD->gdfIndex = GDF_32BIT_X888RGB;
|
||||||
|
|
||||||
|
pGD->isaBase = 0;
|
||||||
|
pGD->pciBase = 0;
|
||||||
|
pGD->memSize = info->screen_size - info->logo_size;
|
||||||
|
|
||||||
|
/* Cursor Start Address */
|
||||||
|
pGD->dprBase = 0;
|
||||||
|
pGD->vprBase = 0;
|
||||||
|
pGD->cprBase = 0;
|
||||||
|
|
||||||
|
return (void *)pGD;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Set the LUT
|
||||||
|
*
|
||||||
|
* @index: color number
|
||||||
|
* @r: red
|
||||||
|
* @b: blue
|
||||||
|
* @g: green
|
||||||
|
*/
|
||||||
|
void video_set_lut
|
||||||
|
(unsigned int index, unsigned char r, unsigned char g, unsigned char b)
|
||||||
|
{
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif /* defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE) */
|
||||||
|
|
||||||
|
#endif /* CONFIG_FSL_DIU_FB */
|
||||||
@@ -30,11 +30,11 @@ SECTIONS
|
|||||||
.dynsym : { *(.dynsym) }
|
.dynsym : { *(.dynsym) }
|
||||||
.dynstr : { *(.dynstr) }
|
.dynstr : { *(.dynstr) }
|
||||||
.rel.text : { *(.rel.text) }
|
.rel.text : { *(.rel.text) }
|
||||||
.rela.text : { *(.rela.text) }
|
.rela.text : { *(.rela.text) }
|
||||||
.rel.data : { *(.rel.data) }
|
.rel.data : { *(.rel.data) }
|
||||||
.rela.data : { *(.rela.data) }
|
.rela.data : { *(.rela.data) }
|
||||||
.rel.rodata : { *(.rel.rodata) }
|
.rel.rodata : { *(.rel.rodata) }
|
||||||
.rela.rodata : { *(.rela.rodata) }
|
.rela.rodata : { *(.rela.rodata) }
|
||||||
.rel.got : { *(.rel.got) }
|
.rel.got : { *(.rel.got) }
|
||||||
.rela.got : { *(.rela.got) }
|
.rela.got : { *(.rela.got) }
|
||||||
.rel.ctors : { *(.rel.ctors) }
|
.rel.ctors : { *(.rel.ctors) }
|
||||||
|
|||||||
@@ -1,75 +0,0 @@
|
|||||||
/*
|
|
||||||
* (C) Copyright 2004
|
|
||||||
* Robert Whaley, Applied Data Systems, Inc. rwhaley@applieddata.net
|
|
||||||
*
|
|
||||||
* (C) Copyright 2002
|
|
||||||
* Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
|
|
||||||
*
|
|
||||||
* (C) Copyright 2002
|
|
||||||
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
|
|
||||||
* Marius Groeger <mgroeger@sysgo.de>
|
|
||||||
*
|
|
||||||
* See file CREDITS for list of people who contributed to this
|
|
||||||
* project.
|
|
||||||
*
|
|
||||||
* This program is free software; you can redistribute it and/or
|
|
||||||
* modify it under the terms of the GNU General Public License as
|
|
||||||
* published by the Free Software Foundation; either version 2 of
|
|
||||||
* the License, or (at your option) any later version.
|
|
||||||
*
|
|
||||||
* This program is distributed in the hope that it will be useful,
|
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
||||||
* GNU General Public License for more details.
|
|
||||||
*
|
|
||||||
* You should have received a copy of the GNU General Public License
|
|
||||||
* along with this program; if not, write to the Free Software
|
|
||||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
|
||||||
* MA 02111-1307 USA
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include <common.h>
|
|
||||||
|
|
||||||
DECLARE_GLOBAL_DATA_PTR;
|
|
||||||
|
|
||||||
/* ------------------------------------------------------------------------- */
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Miscelaneous platform dependent initialisations
|
|
||||||
*/
|
|
||||||
|
|
||||||
int board_init (void)
|
|
||||||
{
|
|
||||||
/* memory and cpu-speed are setup before relocation */
|
|
||||||
/* so we do _nothing_ here */
|
|
||||||
|
|
||||||
/* arch number of ADSVIX-Board */
|
|
||||||
gd->bd->bi_arch_number = 620;
|
|
||||||
|
|
||||||
/* adress of boot parameters */
|
|
||||||
gd->bd->bi_boot_params = 0xa000003c;
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
int board_late_init(void)
|
|
||||||
{
|
|
||||||
setenv("stdout", "serial");
|
|
||||||
setenv("stderr", "serial");
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
int dram_init (void)
|
|
||||||
{
|
|
||||||
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
|
|
||||||
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
|
|
||||||
gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
|
|
||||||
gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
|
|
||||||
gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
|
|
||||||
gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE;
|
|
||||||
gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
|
|
||||||
gd->bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE;
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
@@ -1 +0,0 @@
|
|||||||
TEXT_BASE = 0xa1700000
|
|
||||||
@@ -1,466 +0,0 @@
|
|||||||
/*
|
|
||||||
* This was originally from the Lubbock u-boot port.
|
|
||||||
*
|
|
||||||
* Most of this taken from Redboot hal_platform_setup.h with cleanup
|
|
||||||
*
|
|
||||||
* NOTE: I haven't clean this up considerably, just enough to get it
|
|
||||||
* running. See hal_platform_setup.h for the source. See
|
|
||||||
* board/cradle/lowlevel_init.S for another PXA250 setup that is
|
|
||||||
* much cleaner.
|
|
||||||
*
|
|
||||||
* See file CREDITS for list of people who contributed to this
|
|
||||||
* project.
|
|
||||||
*
|
|
||||||
* This program is free software; you can redistribute it and/or
|
|
||||||
* modify it under the terms of the GNU General Public License as
|
|
||||||
* published by the Free Software Foundation; either version 2 of
|
|
||||||
* the License, or (at your option) any later version.
|
|
||||||
*
|
|
||||||
* This program is distributed in the hope that it will be useful,
|
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
||||||
* GNU General Public License for more details.
|
|
||||||
*
|
|
||||||
* You should have received a copy of the GNU General Public License
|
|
||||||
* along with this program; if not, write to the Free Software
|
|
||||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
|
||||||
* MA 02111-1307 USA
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include <config.h>
|
|
||||||
#include <version.h>
|
|
||||||
#include <asm/arch/pxa-regs.h>
|
|
||||||
|
|
||||||
/* wait for coprocessor write complete */
|
|
||||||
.macro CPWAIT reg
|
|
||||||
mrc p15,0,\reg,c2,c0,0
|
|
||||||
mov \reg,\reg
|
|
||||||
sub pc,pc,#4
|
|
||||||
.endm
|
|
||||||
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Memory setup
|
|
||||||
*/
|
|
||||||
|
|
||||||
.globl lowlevel_init
|
|
||||||
lowlevel_init:
|
|
||||||
|
|
||||||
/* Set up GPIO pins first ----------------------------------------- */
|
|
||||||
|
|
||||||
ldr r0, =GPSR0
|
|
||||||
ldr r1, =CFG_GPSR0_VAL
|
|
||||||
str r1, [r0]
|
|
||||||
|
|
||||||
ldr r0, =GPSR1
|
|
||||||
ldr r1, =CFG_GPSR1_VAL
|
|
||||||
str r1, [r0]
|
|
||||||
|
|
||||||
ldr r0, =GPSR2
|
|
||||||
ldr r1, =CFG_GPSR2_VAL
|
|
||||||
str r1, [r0]
|
|
||||||
|
|
||||||
ldr r0, =GPSR3
|
|
||||||
ldr r1, =CFG_GPSR3_VAL
|
|
||||||
str r1, [r0]
|
|
||||||
|
|
||||||
ldr r0, =GPCR0
|
|
||||||
ldr r1, =CFG_GPCR0_VAL
|
|
||||||
str r1, [r0]
|
|
||||||
|
|
||||||
ldr r0, =GPCR1
|
|
||||||
ldr r1, =CFG_GPCR1_VAL
|
|
||||||
str r1, [r0]
|
|
||||||
|
|
||||||
ldr r0, =GPCR2
|
|
||||||
ldr r1, =CFG_GPCR2_VAL
|
|
||||||
str r1, [r0]
|
|
||||||
|
|
||||||
ldr r0, =GPCR3
|
|
||||||
ldr r1, =CFG_GPCR3_VAL
|
|
||||||
str r1, [r0]
|
|
||||||
|
|
||||||
ldr r0, =GPDR0
|
|
||||||
ldr r1, =CFG_GPDR0_VAL
|
|
||||||
str r1, [r0]
|
|
||||||
|
|
||||||
ldr r0, =GPDR1
|
|
||||||
ldr r1, =CFG_GPDR1_VAL
|
|
||||||
str r1, [r0]
|
|
||||||
|
|
||||||
ldr r0, =GPDR2
|
|
||||||
ldr r1, =CFG_GPDR2_VAL
|
|
||||||
str r1, [r0]
|
|
||||||
|
|
||||||
ldr r0, =GPDR3
|
|
||||||
ldr r1, =CFG_GPDR3_VAL
|
|
||||||
str r1, [r0]
|
|
||||||
|
|
||||||
ldr r0, =GAFR0_L
|
|
||||||
ldr r1, =CFG_GAFR0_L_VAL
|
|
||||||
str r1, [r0]
|
|
||||||
|
|
||||||
ldr r0, =GAFR0_U
|
|
||||||
ldr r1, =CFG_GAFR0_U_VAL
|
|
||||||
str r1, [r0]
|
|
||||||
|
|
||||||
ldr r0, =GAFR1_L
|
|
||||||
ldr r1, =CFG_GAFR1_L_VAL
|
|
||||||
str r1, [r0]
|
|
||||||
|
|
||||||
ldr r0, =GAFR1_U
|
|
||||||
ldr r1, =CFG_GAFR1_U_VAL
|
|
||||||
str r1, [r0]
|
|
||||||
|
|
||||||
ldr r0, =GAFR2_L
|
|
||||||
ldr r1, =CFG_GAFR2_L_VAL
|
|
||||||
str r1, [r0]
|
|
||||||
|
|
||||||
ldr r0, =GAFR2_U
|
|
||||||
ldr r1, =CFG_GAFR2_U_VAL
|
|
||||||
str r1, [r0]
|
|
||||||
|
|
||||||
ldr r0, =GAFR3_L
|
|
||||||
ldr r1, =CFG_GAFR3_L_VAL
|
|
||||||
str r1, [r0]
|
|
||||||
|
|
||||||
ldr r0, =GAFR3_U
|
|
||||||
ldr r1, =CFG_GAFR3_U_VAL
|
|
||||||
str r1, [r0]
|
|
||||||
|
|
||||||
ldr r0, =PSSR /* enable GPIO pins */
|
|
||||||
ldr r1, =CFG_PSSR_VAL
|
|
||||||
str r1, [r0]
|
|
||||||
|
|
||||||
/* ---------------------------------------------------------------- */
|
|
||||||
/* Enable memory interface */
|
|
||||||
/* */
|
|
||||||
/* The sequence below is based on the recommended init steps */
|
|
||||||
/* detailed in the Intel PXA250 Operating Systems Developers Guide, */
|
|
||||||
/* Chapter 10. */
|
|
||||||
/* ---------------------------------------------------------------- */
|
|
||||||
|
|
||||||
/* ---------------------------------------------------------------- */
|
|
||||||
/* Step 1: Wait for at least 200 microsedonds to allow internal */
|
|
||||||
/* clocks to settle. Only necessary after hard reset... */
|
|
||||||
/* FIXME: can be optimized later */
|
|
||||||
/* ---------------------------------------------------------------- */
|
|
||||||
|
|
||||||
ldr r3, =OSCR /* reset the OS Timer Count to zero */
|
|
||||||
mov r2, #0
|
|
||||||
str r2, [r3]
|
|
||||||
ldr r4, =0x300 /* really 0x2E1 is about 200usec, */
|
|
||||||
/* so 0x300 should be plenty */
|
|
||||||
1:
|
|
||||||
ldr r2, [r3]
|
|
||||||
cmp r4, r2
|
|
||||||
bgt 1b
|
|
||||||
|
|
||||||
mem_init:
|
|
||||||
|
|
||||||
ldr r1, =MEMC_BASE /* get memory controller base addr. */
|
|
||||||
|
|
||||||
/* ---------------------------------------------------------------- */
|
|
||||||
/* Step 2a: Initialize Asynchronous static memory controller */
|
|
||||||
/* ---------------------------------------------------------------- */
|
|
||||||
|
|
||||||
/* MSC registers: timing, bus width, mem type */
|
|
||||||
|
|
||||||
/* MSC0: nCS(0,1) */
|
|
||||||
ldr r2, =CFG_MSC0_VAL
|
|
||||||
str r2, [r1, #MSC0_OFFSET]
|
|
||||||
ldr r2, [r1, #MSC0_OFFSET] /* read back to ensure */
|
|
||||||
/* that data latches */
|
|
||||||
/* MSC1: nCS(2,3) */
|
|
||||||
ldr r2, =CFG_MSC1_VAL
|
|
||||||
str r2, [r1, #MSC1_OFFSET]
|
|
||||||
ldr r2, [r1, #MSC1_OFFSET]
|
|
||||||
|
|
||||||
/* MSC2: nCS(4,5) */
|
|
||||||
ldr r2, =CFG_MSC2_VAL
|
|
||||||
str r2, [r1, #MSC2_OFFSET]
|
|
||||||
ldr r2, [r1, #MSC2_OFFSET]
|
|
||||||
|
|
||||||
/* ---------------------------------------------------------------- */
|
|
||||||
/* Step 2b: Initialize Card Interface */
|
|
||||||
/* ---------------------------------------------------------------- */
|
|
||||||
|
|
||||||
/* MECR: Memory Expansion Card Register */
|
|
||||||
ldr r2, =CFG_MECR_VAL
|
|
||||||
str r2, [r1, #MECR_OFFSET]
|
|
||||||
ldr r2, [r1, #MECR_OFFSET]
|
|
||||||
|
|
||||||
/* MCMEM0: Card Interface slot 0 timing */
|
|
||||||
ldr r2, =CFG_MCMEM0_VAL
|
|
||||||
str r2, [r1, #MCMEM0_OFFSET]
|
|
||||||
ldr r2, [r1, #MCMEM0_OFFSET]
|
|
||||||
|
|
||||||
/* MCMEM1: Card Interface slot 1 timing */
|
|
||||||
ldr r2, =CFG_MCMEM1_VAL
|
|
||||||
str r2, [r1, #MCMEM1_OFFSET]
|
|
||||||
ldr r2, [r1, #MCMEM1_OFFSET]
|
|
||||||
|
|
||||||
/* MCATT0: Card Interface Attribute Space Timing, slot 0 */
|
|
||||||
ldr r2, =CFG_MCATT0_VAL
|
|
||||||
str r2, [r1, #MCATT0_OFFSET]
|
|
||||||
ldr r2, [r1, #MCATT0_OFFSET]
|
|
||||||
|
|
||||||
/* MCATT1: Card Interface Attribute Space Timing, slot 1 */
|
|
||||||
ldr r2, =CFG_MCATT1_VAL
|
|
||||||
str r2, [r1, #MCATT1_OFFSET]
|
|
||||||
ldr r2, [r1, #MCATT1_OFFSET]
|
|
||||||
|
|
||||||
/* MCIO0: Card Interface I/O Space Timing, slot 0 */
|
|
||||||
ldr r2, =CFG_MCIO0_VAL
|
|
||||||
str r2, [r1, #MCIO0_OFFSET]
|
|
||||||
ldr r2, [r1, #MCIO0_OFFSET]
|
|
||||||
|
|
||||||
/* MCIO1: Card Interface I/O Space Timing, slot 1 */
|
|
||||||
ldr r2, =CFG_MCIO1_VAL
|
|
||||||
str r2, [r1, #MCIO1_OFFSET]
|
|
||||||
ldr r2, [r1, #MCIO1_OFFSET]
|
|
||||||
|
|
||||||
/* ---------------------------------------------------------------- */
|
|
||||||
/* Step 2c: Write FLYCNFG FIXME: what's that??? */
|
|
||||||
/* ---------------------------------------------------------------- */
|
|
||||||
ldr r2, =CFG_FLYCNFG_VAL
|
|
||||||
str r2, [r1, #FLYCNFG_OFFSET]
|
|
||||||
str r2, [r1, #FLYCNFG_OFFSET]
|
|
||||||
|
|
||||||
/* ---------------------------------------------------------------- */
|
|
||||||
/* Step 2d: Initialize Timing for Sync Memory (SDCLK0) */
|
|
||||||
/* ---------------------------------------------------------------- */
|
|
||||||
|
|
||||||
/* Before accessing MDREFR we need a valid DRI field, so we set */
|
|
||||||
/* this to power on defaults + DRI field. */
|
|
||||||
|
|
||||||
ldr r4, [r1, #MDREFR_OFFSET]
|
|
||||||
ldr r2, =0xFFF
|
|
||||||
bic r4, r4, r2
|
|
||||||
|
|
||||||
ldr r3, =CFG_MDREFR_VAL
|
|
||||||
and r3, r3, r2
|
|
||||||
|
|
||||||
orr r4, r4, r3
|
|
||||||
str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */
|
|
||||||
|
|
||||||
orr r4, r4, #MDREFR_K0RUN
|
|
||||||
orr r4, r4, #MDREFR_K0DB4
|
|
||||||
orr r4, r4, #MDREFR_K0FREE
|
|
||||||
orr r4, r4, #MDREFR_K0DB2
|
|
||||||
orr r4, r4, #MDREFR_K1DB2
|
|
||||||
bic r4, r4, #MDREFR_K1FREE
|
|
||||||
bic r4, r4, #MDREFR_K2FREE
|
|
||||||
|
|
||||||
str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */
|
|
||||||
ldr r4, [r1, #MDREFR_OFFSET]
|
|
||||||
|
|
||||||
/* Note: preserve the mdrefr value in r4 */
|
|
||||||
|
|
||||||
|
|
||||||
/* ---------------------------------------------------------------- */
|
|
||||||
/* Step 3: Initialize Synchronous Static Memory (Flash/Peripherals) */
|
|
||||||
/* ---------------------------------------------------------------- */
|
|
||||||
|
|
||||||
/* Initialize SXCNFG register. Assert the enable bits */
|
|
||||||
|
|
||||||
/* Write SXMRS to cause an MRS command to all enabled banks of */
|
|
||||||
/* synchronous static memory. Note that SXLCR need not be written */
|
|
||||||
/* at this time. */
|
|
||||||
|
|
||||||
ldr r2, =CFG_SXCNFG_VAL
|
|
||||||
str r2, [r1, #SXCNFG_OFFSET]
|
|
||||||
|
|
||||||
/* ---------------------------------------------------------------- */
|
|
||||||
/* Step 4: Initialize SDRAM */
|
|
||||||
/* ---------------------------------------------------------------- */
|
|
||||||
|
|
||||||
bic r4, r4, #(MDREFR_K2FREE |MDREFR_K1FREE | MDREFR_K0FREE)
|
|
||||||
|
|
||||||
orr r4, r4, #MDREFR_K1RUN
|
|
||||||
bic r4, r4, #MDREFR_K2DB2
|
|
||||||
str r4, [r1, #MDREFR_OFFSET]
|
|
||||||
ldr r4, [r1, #MDREFR_OFFSET]
|
|
||||||
|
|
||||||
bic r4, r4, #MDREFR_SLFRSH
|
|
||||||
str r4, [r1, #MDREFR_OFFSET]
|
|
||||||
ldr r4, [r1, #MDREFR_OFFSET]
|
|
||||||
|
|
||||||
orr r4, r4, #MDREFR_E1PIN
|
|
||||||
str r4, [r1, #MDREFR_OFFSET]
|
|
||||||
ldr r4, [r1, #MDREFR_OFFSET]
|
|
||||||
|
|
||||||
nop
|
|
||||||
nop
|
|
||||||
|
|
||||||
|
|
||||||
/* Step 4d: write MDCNFG with MDCNFG:DEx deasserted (set to 0), to */
|
|
||||||
/* configure but not enable each SDRAM partition pair. */
|
|
||||||
|
|
||||||
ldr r4, =CFG_MDCNFG_VAL
|
|
||||||
bic r4, r4, #(MDCNFG_DE0|MDCNFG_DE1)
|
|
||||||
bic r4, r4, #(MDCNFG_DE2|MDCNFG_DE3)
|
|
||||||
|
|
||||||
str r4, [r1, #MDCNFG_OFFSET] /* write back MDCNFG */
|
|
||||||
ldr r4, [r1, #MDCNFG_OFFSET]
|
|
||||||
|
|
||||||
|
|
||||||
/* Step 4e: Wait for the clock to the SDRAMs to stabilize, */
|
|
||||||
/* 100..200 <20>sec. */
|
|
||||||
|
|
||||||
ldr r3, =OSCR /* reset the OS Timer Count to zero */
|
|
||||||
mov r2, #0
|
|
||||||
str r2, [r3]
|
|
||||||
ldr r4, =0x300 /* really 0x2E1 is about 200usec, */
|
|
||||||
/* so 0x300 should be plenty */
|
|
||||||
1:
|
|
||||||
ldr r2, [r3]
|
|
||||||
cmp r4, r2
|
|
||||||
bgt 1b
|
|
||||||
|
|
||||||
|
|
||||||
/* Step 4f: Trigger a number (usually 8) refresh cycles by */
|
|
||||||
/* attempting non-burst read or write accesses to disabled */
|
|
||||||
/* SDRAM, as commonly specified in the power up sequence */
|
|
||||||
/* documented in SDRAM data sheets. The address(es) used */
|
|
||||||
/* for this purpose must not be cacheable. */
|
|
||||||
|
|
||||||
ldr r3, =CFG_DRAM_BASE
|
|
||||||
str r2, [r3]
|
|
||||||
str r2, [r3]
|
|
||||||
str r2, [r3]
|
|
||||||
str r2, [r3]
|
|
||||||
str r2, [r3]
|
|
||||||
str r2, [r3]
|
|
||||||
str r2, [r3]
|
|
||||||
str r2, [r3]
|
|
||||||
|
|
||||||
|
|
||||||
/* Step 4g: Write MDCNFG with enable bits asserted */
|
|
||||||
/* (MDCNFG:DEx set to 1). */
|
|
||||||
|
|
||||||
ldr r3, [r1, #MDCNFG_OFFSET]
|
|
||||||
mov r4, r3
|
|
||||||
orr r3, r3, #MDCNFG_DE0
|
|
||||||
str r3, [r1, #MDCNFG_OFFSET]
|
|
||||||
mov r0, r3
|
|
||||||
|
|
||||||
/* Step 4h: Write MDMRS. */
|
|
||||||
|
|
||||||
ldr r2, =CFG_MDMRS_VAL
|
|
||||||
str r2, [r1, #MDMRS_OFFSET]
|
|
||||||
|
|
||||||
/* enable APD */
|
|
||||||
ldr r3, [r1, #MDREFR_OFFSET]
|
|
||||||
orr r3, r3, #MDREFR_APD
|
|
||||||
str r3, [r1, #MDREFR_OFFSET]
|
|
||||||
|
|
||||||
/* We are finished with Intel's memory controller initialisation */
|
|
||||||
|
|
||||||
setvoltage:
|
|
||||||
|
|
||||||
mov r10, lr
|
|
||||||
bl initPXAvoltage /* In case the board is rebooting with a */
|
|
||||||
mov lr, r10 /* low voltage raise it up to a good one. */
|
|
||||||
|
|
||||||
wakeup:
|
|
||||||
/* Are we waking from sleep? */
|
|
||||||
ldr r0, =RCSR
|
|
||||||
ldr r1, [r0]
|
|
||||||
and r1, r1, #(RCSR_GPR | RCSR_SMR | RCSR_WDR | RCSR_HWR)
|
|
||||||
str r1, [r0]
|
|
||||||
teq r1, #RCSR_SMR
|
|
||||||
|
|
||||||
bne initirqs
|
|
||||||
|
|
||||||
ldr r0, =PSSR
|
|
||||||
mov r1, #PSSR_PH
|
|
||||||
str r1, [r0]
|
|
||||||
|
|
||||||
/* if so, resume at PSPR */
|
|
||||||
ldr r0, =PSPR
|
|
||||||
ldr r1, [r0]
|
|
||||||
mov pc, r1
|
|
||||||
|
|
||||||
/* ---------------------------------------------------------------- */
|
|
||||||
/* Disable (mask) all interrupts at interrupt controller */
|
|
||||||
/* ---------------------------------------------------------------- */
|
|
||||||
|
|
||||||
initirqs:
|
|
||||||
|
|
||||||
mov r1, #0 /* clear int. level register (IRQ, not FIQ) */
|
|
||||||
ldr r2, =ICLR
|
|
||||||
str r1, [r2]
|
|
||||||
|
|
||||||
ldr r2, =ICMR /* mask all interrupts at the controller */
|
|
||||||
str r1, [r2]
|
|
||||||
|
|
||||||
/* ---------------------------------------------------------------- */
|
|
||||||
/* Clock initialisation */
|
|
||||||
/* ---------------------------------------------------------------- */
|
|
||||||
|
|
||||||
initclks:
|
|
||||||
|
|
||||||
/* Disable the peripheral clocks, and set the core clock frequency */
|
|
||||||
|
|
||||||
/* Turn Off on-chip peripheral clocks (except for memory) */
|
|
||||||
/* for re-configuration. */
|
|
||||||
ldr r1, =CKEN
|
|
||||||
ldr r2, =CFG_CKEN
|
|
||||||
str r2, [r1]
|
|
||||||
|
|
||||||
/* ... and write the core clock config register */
|
|
||||||
ldr r2, =CFG_CCCR
|
|
||||||
ldr r1, =CCCR
|
|
||||||
str r2, [r1]
|
|
||||||
|
|
||||||
/* Turn on turbo mode */
|
|
||||||
mrc p14, 0, r2, c6, c0, 0
|
|
||||||
orr r2, r2, #0xB /* Turbo, Fast-Bus, Freq change**/
|
|
||||||
mcr p14, 0, r2, c6, c0, 0
|
|
||||||
|
|
||||||
/* Re-write MDREFR */
|
|
||||||
ldr r1, =MEMC_BASE
|
|
||||||
ldr r2, [r1, #MDREFR_OFFSET]
|
|
||||||
str r2, [r1, #MDREFR_OFFSET]
|
|
||||||
#ifdef RTC
|
|
||||||
/* enable the 32Khz oscillator for RTC and PowerManager */
|
|
||||||
ldr r1, =OSCC
|
|
||||||
mov r2, #OSCC_OON
|
|
||||||
str r2, [r1]
|
|
||||||
|
|
||||||
/* NOTE: spin here until OSCC.OOK get set, meaning the PLL */
|
|
||||||
/* has settled. */
|
|
||||||
60:
|
|
||||||
ldr r2, [r1]
|
|
||||||
ands r2, r2, #1
|
|
||||||
beq 60b
|
|
||||||
#else
|
|
||||||
#error "RTC not defined"
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/* Interrupt init: Mask all interrupts */
|
|
||||||
ldr r0, =ICMR /* enable no sources */
|
|
||||||
mov r1, #0
|
|
||||||
str r1, [r0]
|
|
||||||
/* FIXME */
|
|
||||||
|
|
||||||
#ifdef NODEBUG
|
|
||||||
/*Disable software and data breakpoints */
|
|
||||||
mov r0,#0
|
|
||||||
mcr p15,0,r0,c14,c8,0 /* ibcr0 */
|
|
||||||
mcr p15,0,r0,c14,c9,0 /* ibcr1 */
|
|
||||||
mcr p15,0,r0,c14,c4,0 /* dbcon */
|
|
||||||
|
|
||||||
/*Enable all debug functionality */
|
|
||||||
mov r0,#0x80000000
|
|
||||||
mcr p14,0,r0,c10,c0,0 /* dcsr */
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/* ---------------------------------------------------------------- */
|
|
||||||
/* End lowlevel_init */
|
|
||||||
/* ---------------------------------------------------------------- */
|
|
||||||
|
|
||||||
endlowlevel_init:
|
|
||||||
|
|
||||||
mov pc, lr
|
|
||||||
@@ -1,67 +0,0 @@
|
|||||||
/*
|
|
||||||
* (C) Copyright 2004
|
|
||||||
* Robert Whaley, Applied Data Systems, Inc. rwhaley@applieddata.net
|
|
||||||
*
|
|
||||||
* See file CREDITS for list of people who contributed to this
|
|
||||||
* project.
|
|
||||||
*
|
|
||||||
* This program is free software; you can redistribute it and/or
|
|
||||||
* modify it under the terms of the GNU General Public License as
|
|
||||||
* published by the Free Software Foundation; either version 2 of
|
|
||||||
* the License, or (at your option) any later version.
|
|
||||||
*
|
|
||||||
* This program is distributed in the hope that it will be useful,
|
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
||||||
* GNU General Public License for more details.
|
|
||||||
*
|
|
||||||
* You should have received a copy of the GNU General Public License
|
|
||||||
* along with this program; if not, write to the Free Software
|
|
||||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
|
||||||
* MA 02111-1307 USA
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include <common.h>
|
|
||||||
#include <asm/arch/pxa-regs.h>
|
|
||||||
|
|
||||||
void pcmcia_power_on(void)
|
|
||||||
{
|
|
||||||
#if 0
|
|
||||||
if (!(GPLR(20) & GPIO_bit(20))) { /* 3.3V */
|
|
||||||
GPCR(81) = GPIO_bit(81);
|
|
||||||
GPSR(82) = GPIO_bit(82);
|
|
||||||
}
|
|
||||||
else if (!(GPLR(21) & GPIO_bit(21))) { /* 5.0V */
|
|
||||||
GPCR(81) = GPIO_bit(81);
|
|
||||||
GPCR(82) = GPIO_bit(82);
|
|
||||||
}
|
|
||||||
#else
|
|
||||||
#warning "Board will only supply 5V, wait for next HW spin for selectable power"
|
|
||||||
/* 5.0V */
|
|
||||||
GPCR(81) = GPIO_bit(81);
|
|
||||||
GPCR(82) = GPIO_bit(82);
|
|
||||||
#endif
|
|
||||||
|
|
||||||
udelay(300000);
|
|
||||||
|
|
||||||
/* reset the card */
|
|
||||||
GPSR(52) = GPIO_bit(52);
|
|
||||||
|
|
||||||
/* enable PCMCIA */
|
|
||||||
GPCR(83) = GPIO_bit(83);
|
|
||||||
|
|
||||||
/* clear reset */
|
|
||||||
udelay(10);
|
|
||||||
GPCR(52) = GPIO_bit(52);
|
|
||||||
|
|
||||||
udelay(20000);
|
|
||||||
}
|
|
||||||
|
|
||||||
void pcmcia_power_off(void)
|
|
||||||
{
|
|
||||||
/* 0V */
|
|
||||||
GPSR(81) = GPIO_bit(81);
|
|
||||||
GPSR(82) = GPIO_bit(82);
|
|
||||||
/* disable PCMCIA */
|
|
||||||
GPSR(83) = GPIO_bit(83);
|
|
||||||
}
|
|
||||||
@@ -1,230 +0,0 @@
|
|||||||
/*
|
|
||||||
* (C) Copyright 2004
|
|
||||||
* Robert Whaley, Applied Data Systems, Inc. rwhaley@applieddata.net
|
|
||||||
*
|
|
||||||
* See file CREDITS for list of people who contributed to this
|
|
||||||
* project.
|
|
||||||
*
|
|
||||||
* This program is free software; you can redistribute it and/or
|
|
||||||
* modify it under the terms of the GNU General Public License as
|
|
||||||
* published by the Free Software Foundation; either version 2 of
|
|
||||||
* the License, or (at your option) any later version.
|
|
||||||
*
|
|
||||||
* This program is distributed in the hope that it will be useful,
|
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
||||||
* GNU General Public License for more details.
|
|
||||||
*
|
|
||||||
* You should have received a copy of the GNU General Public License
|
|
||||||
* along with this program; if not, write to the Free Software
|
|
||||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
|
||||||
* MA 02111-1307 USA
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include <asm/arch/pxa-regs.h>
|
|
||||||
|
|
||||||
#define LTC1663_ADDR 0x20
|
|
||||||
|
|
||||||
#define LTC1663_SY 0x01 /* Sync ACK */
|
|
||||||
#define LTC1663_SD 0x04 /* shutdown */
|
|
||||||
#define LTC1663_BG 0x04 /* Internal Voltage Ref */
|
|
||||||
|
|
||||||
#define VOLT_1_55 18 /* DAC value for 1.55V */
|
|
||||||
|
|
||||||
.global initPXAvoltage
|
|
||||||
|
|
||||||
@ Set the voltage to 1.55V early in the boot process so we can run
|
|
||||||
@ at a high clock speed and boot quickly. Note that this is necessary
|
|
||||||
@ because the reset button does not reset the CPU voltage, so if the
|
|
||||||
@ voltage was low (say 0.85V) then the CPU would crash without this
|
|
||||||
@ routine
|
|
||||||
|
|
||||||
@ This routine clobbers r0-r4
|
|
||||||
|
|
||||||
initializei2c:
|
|
||||||
|
|
||||||
ldr r2, =CKEN
|
|
||||||
ldr r3, [r2]
|
|
||||||
orr r3, r3, #CKEN15_PWRI2C
|
|
||||||
str r3, [r2]
|
|
||||||
|
|
||||||
ldr r2, =PCFR
|
|
||||||
ldr r3, [r2]
|
|
||||||
orr r3, r3, #PCFR_PI2C_EN
|
|
||||||
str r3, [r2]
|
|
||||||
|
|
||||||
/* delay for about 250msec
|
|
||||||
*/
|
|
||||||
ldr r3, =OSCR
|
|
||||||
mov r2, #0
|
|
||||||
str r2, [r3]
|
|
||||||
ldr r1, =0xC0000
|
|
||||||
|
|
||||||
1:
|
|
||||||
ldr r2, [r3]
|
|
||||||
cmp r1, r2
|
|
||||||
bgt 1b
|
|
||||||
ldr r0, =PWRICR
|
|
||||||
ldr r1, [r0]
|
|
||||||
bic r1, r1, #(ICR_MA | ICR_START | ICR_STOP)
|
|
||||||
str r1, [r0]
|
|
||||||
|
|
||||||
orr r1, r1, #ICR_UR
|
|
||||||
str r1, [r0]
|
|
||||||
|
|
||||||
ldr r2, =PWRISR
|
|
||||||
ldr r3, =0x7ff
|
|
||||||
str r3, [r2]
|
|
||||||
|
|
||||||
bic r1, r1, #ICR_UR
|
|
||||||
str r1, [r0]
|
|
||||||
|
|
||||||
mov r1, #(ICR_GCD | ICR_SCLE)
|
|
||||||
str r1, [r0]
|
|
||||||
|
|
||||||
orr r1, r1, #ICR_IUE
|
|
||||||
str r1, [r0]
|
|
||||||
|
|
||||||
orr r1, r1, #ICR_FM
|
|
||||||
str r1, [r0]
|
|
||||||
|
|
||||||
/* delay for about 1msec
|
|
||||||
*/
|
|
||||||
ldr r3, =OSCR
|
|
||||||
mov r2, #0
|
|
||||||
str r2, [r3]
|
|
||||||
ldr r1, =0xC00
|
|
||||||
|
|
||||||
1:
|
|
||||||
ldr r2, [r3]
|
|
||||||
cmp r1, r2
|
|
||||||
bgt 1b
|
|
||||||
mov pc, lr
|
|
||||||
|
|
||||||
sendbytei2c:
|
|
||||||
ldr r3, =PWRIDBR
|
|
||||||
str r0, [r3]
|
|
||||||
ldr r3, =PWRICR
|
|
||||||
ldr r0, [r3]
|
|
||||||
orr r0, r0, r1
|
|
||||||
bic r0, r0, r2
|
|
||||||
str r0, [r3]
|
|
||||||
orr r0, r0, #ICR_TB
|
|
||||||
str r0, [r3]
|
|
||||||
|
|
||||||
mov r2, #0x100000
|
|
||||||
|
|
||||||
waitfortxemptyi2c:
|
|
||||||
|
|
||||||
ldr r0, =PWRISR
|
|
||||||
ldr r1, [r0]
|
|
||||||
|
|
||||||
/* take it from the top if we don't get empty after a while */
|
|
||||||
subs r2, r2, #1
|
|
||||||
moveq lr, r4
|
|
||||||
beq initPXAvoltage
|
|
||||||
|
|
||||||
tst r1, #ISR_ITE
|
|
||||||
|
|
||||||
beq waitfortxemptyi2c
|
|
||||||
|
|
||||||
orr r1, r1, #ISR_ITE
|
|
||||||
str r1, [r0]
|
|
||||||
|
|
||||||
mov pc, lr
|
|
||||||
|
|
||||||
initPXAvoltage:
|
|
||||||
|
|
||||||
mov r4, lr
|
|
||||||
|
|
||||||
bl setleds
|
|
||||||
|
|
||||||
bl initializei2c
|
|
||||||
|
|
||||||
bl setleds
|
|
||||||
|
|
||||||
/* now send the real message to set the correct voltage */
|
|
||||||
ldr r0, =LTC1663_ADDR
|
|
||||||
mov r0, r0, LSL #1
|
|
||||||
mov r1, #ICR_START
|
|
||||||
ldr r2, =(ICR_STOP | ICR_ALDIE | ICR_ACKNAK)
|
|
||||||
bl sendbytei2c
|
|
||||||
|
|
||||||
bl setleds
|
|
||||||
|
|
||||||
mov r0, #LTC1663_BG
|
|
||||||
mov r1, #0
|
|
||||||
mov r2, #(ICR_STOP | ICR_START)
|
|
||||||
bl sendbytei2c
|
|
||||||
|
|
||||||
bl setleds
|
|
||||||
|
|
||||||
ldr r0, =VOLT_1_55
|
|
||||||
and r0, r0, #0xff
|
|
||||||
mov r1, #0
|
|
||||||
mov r2, #(ICR_STOP | ICR_START)
|
|
||||||
bl sendbytei2c
|
|
||||||
|
|
||||||
bl setleds
|
|
||||||
|
|
||||||
ldr r0, =VOLT_1_55
|
|
||||||
mov r0, r0, ASR #8
|
|
||||||
and r0, r0, #0xff
|
|
||||||
mov r1, #ICR_STOP
|
|
||||||
mov r2, #ICR_START
|
|
||||||
bl sendbytei2c
|
|
||||||
|
|
||||||
bl setleds
|
|
||||||
|
|
||||||
@ delay a little for the volatage to stablize
|
|
||||||
ldr r3, =OSCR
|
|
||||||
mov r2, #0
|
|
||||||
str r2, [r3]
|
|
||||||
ldr r1, =0xC0
|
|
||||||
|
|
||||||
1:
|
|
||||||
ldr r2, [r3]
|
|
||||||
cmp r1, r2
|
|
||||||
bgt 1b
|
|
||||||
mov pc, r4
|
|
||||||
|
|
||||||
setleds:
|
|
||||||
mov pc, lr
|
|
||||||
|
|
||||||
ldr r5, =0x40e00058
|
|
||||||
ldr r3, [r5]
|
|
||||||
bic r3, r3, #0x3
|
|
||||||
str r3, [r5]
|
|
||||||
ldr r5, =0x40e0000c
|
|
||||||
ldr r3, [r5]
|
|
||||||
orr r3, r3, #0x00010000
|
|
||||||
str r3, [r5]
|
|
||||||
|
|
||||||
@ inner loop
|
|
||||||
mov r0, #0x2
|
|
||||||
1:
|
|
||||||
|
|
||||||
ldr r5, =0x40e00018
|
|
||||||
mov r3, #0x00010000
|
|
||||||
str r3, [r5]
|
|
||||||
|
|
||||||
@ outer loop
|
|
||||||
mov r3, #0x00F00000
|
|
||||||
2:
|
|
||||||
subs r3, r3, #1
|
|
||||||
bne 2b
|
|
||||||
|
|
||||||
ldr r5, =0x40e00024
|
|
||||||
mov r3, #0x00010000
|
|
||||||
str r3, [r5]
|
|
||||||
|
|
||||||
@ outer loop
|
|
||||||
mov r3, #0x00F00000
|
|
||||||
3:
|
|
||||||
subs r3, r3, #1
|
|
||||||
bne 3b
|
|
||||||
|
|
||||||
subs r0, r0, #1
|
|
||||||
bne 1b
|
|
||||||
|
|
||||||
mov pc, lr
|
|
||||||
@@ -38,7 +38,7 @@ clean:
|
|||||||
rm -f $(SOBJS) $(OBJS)
|
rm -f $(SOBJS) $(OBJS)
|
||||||
|
|
||||||
distclean: clean
|
distclean: clean
|
||||||
rm -f $(LIB) core *.bak .depend
|
rm -f $(LIB) core *.bak $(obj).depend
|
||||||
|
|
||||||
#########################################################################
|
#########################################################################
|
||||||
|
|
||||||
|
|||||||
@@ -131,7 +131,7 @@ void setupBat (ulong size)
|
|||||||
mtspr (DBAT7U, batu);
|
mtspr (DBAT7U, batu);
|
||||||
}
|
}
|
||||||
|
|
||||||
long int initdram (int board_type)
|
phys_size_t initdram (int board_type)
|
||||||
{
|
{
|
||||||
ulong size;
|
ulong size;
|
||||||
|
|
||||||
|
|||||||
@@ -670,7 +670,7 @@ static int write_data (flash_info_t * info, ulong dest, FPW data)
|
|||||||
|
|
||||||
/* Check if Flash is (sufficiently) erased */
|
/* Check if Flash is (sufficiently) erased */
|
||||||
if ((*addr & data) != data) {
|
if ((*addr & data) != data) {
|
||||||
printf ("not erased at %08lx (%lx)\n", (ulong) addr, *addr);
|
printf ("not erased at %08lx (%lx)\n", (ulong)addr, (ulong)*addr);
|
||||||
return (2);
|
return (2);
|
||||||
}
|
}
|
||||||
/* Disable interrupts which might cause a timeout here */
|
/* Disable interrupts which might cause a timeout here */
|
||||||
@@ -712,7 +712,7 @@ static int write_data_block (flash_info_t * info, ulong src, ulong dest)
|
|||||||
for (i = 0; i < WR_BLOCK; i++)
|
for (i = 0; i < WR_BLOCK; i++)
|
||||||
if ((*dstaddr++ & 0xff) != 0xff) {
|
if ((*dstaddr++ & 0xff) != 0xff) {
|
||||||
printf ("not erased at %08lx (%lx)\n",
|
printf ("not erased at %08lx (%lx)\n",
|
||||||
(ulong) dstaddr, *dstaddr);
|
(ulong)dstaddr, (ulong)*dstaddr);
|
||||||
return (2);
|
return (2);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -39,7 +39,7 @@ clean:
|
|||||||
rm -f $(SOBJS) $(OBJS)
|
rm -f $(SOBJS) $(OBJS)
|
||||||
|
|
||||||
distclean: clean
|
distclean: clean
|
||||||
rm -f $(LIB) core *.bak .depend
|
rm -f $(LIB) core *.bak $(obj).depend
|
||||||
|
|
||||||
#########################################################################
|
#########################################################################
|
||||||
|
|
||||||
|
|||||||
@@ -50,7 +50,7 @@ int checkboard (void)
|
|||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
long int initdram (int board_type)
|
phys_size_t initdram (int board_type)
|
||||||
{
|
{
|
||||||
return (0);
|
return (0);
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -39,7 +39,7 @@ clean:
|
|||||||
rm -f $(SOBJS) $(OBJS)
|
rm -f $(SOBJS) $(OBJS)
|
||||||
|
|
||||||
distclean: clean
|
distclean: clean
|
||||||
rm -f $(LIB) core *.bak .depend
|
rm -f $(LIB) core *.bak $(obj).depend
|
||||||
|
|
||||||
#########################################################################
|
#########################################################################
|
||||||
|
|
||||||
|
|||||||
@@ -54,7 +54,7 @@ int checkboard (void)
|
|||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
long int initdram (int board_type)
|
phys_size_t initdram (int board_type)
|
||||||
{
|
{
|
||||||
return (0);
|
return (0);
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -43,7 +43,7 @@ clean:
|
|||||||
rm -f $(SOBJS) $(OBJS)
|
rm -f $(SOBJS) $(OBJS)
|
||||||
|
|
||||||
distclean: clean
|
distclean: clean
|
||||||
rm -f $(LIB) core *.bak .depend
|
rm -f $(LIB) core *.bak $(obj).depend
|
||||||
|
|
||||||
#########################################################################
|
#########################################################################
|
||||||
|
|
||||||
|
|||||||
@@ -34,7 +34,7 @@ int checkboard (void)
|
|||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
long int initdram (int board_type)
|
phys_size_t initdram (int board_type)
|
||||||
{
|
{
|
||||||
return (0);
|
return (0);
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -43,7 +43,7 @@ clean:
|
|||||||
rm -f $(SOBJS) $(OBJS)
|
rm -f $(SOBJS) $(OBJS)
|
||||||
|
|
||||||
distclean: clean
|
distclean: clean
|
||||||
rm -f $(LIB) core *.bak .depend
|
rm -f $(LIB) core *.bak $(obj).depend
|
||||||
|
|
||||||
#########################################################################
|
#########################################################################
|
||||||
|
|
||||||
|
|||||||
@@ -34,7 +34,7 @@ int checkboard (void)
|
|||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
long int initdram (int board_type)
|
phys_size_t initdram (int board_type)
|
||||||
{
|
{
|
||||||
return (0);
|
return (0);
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -43,7 +43,7 @@ clean:
|
|||||||
rm -f $(SOBJS) $(OBJS)
|
rm -f $(SOBJS) $(OBJS)
|
||||||
|
|
||||||
distclean: clean
|
distclean: clean
|
||||||
rm -f $(LIB) core *.bak .depend
|
rm -f $(LIB) core *.bak $(obj).depend
|
||||||
|
|
||||||
#########################################################################
|
#########################################################################
|
||||||
|
|
||||||
|
|||||||
@@ -29,7 +29,7 @@ int checkboard (void)
|
|||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
long int initdram (int board_type)
|
phys_size_t initdram (int board_type)
|
||||||
{
|
{
|
||||||
return (0);
|
return (0);
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -39,7 +39,7 @@ clean:
|
|||||||
rm -f $(SOBJS) $(OBJS)
|
rm -f $(SOBJS) $(OBJS)
|
||||||
|
|
||||||
distclean: clean
|
distclean: clean
|
||||||
rm -f $(LIB) core *.bak .depend *~
|
rm -f $(LIB) core *.bak $(obj).depend
|
||||||
|
|
||||||
#########################################################################
|
#########################################################################
|
||||||
|
|
||||||
|
|||||||
@@ -33,14 +33,6 @@
|
|||||||
|
|
||||||
extern void board_pll_init_f(void);
|
extern void board_pll_init_f(void);
|
||||||
|
|
||||||
/*
|
|
||||||
* sdram_init - Dummy implementation for start.S, spd_sdram used on this board!
|
|
||||||
*/
|
|
||||||
void sdram_init(void)
|
|
||||||
{
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
|
|
||||||
#if !defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL)
|
#if !defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL)
|
||||||
static void cram_bcr_write(u32 wr_val)
|
static void cram_bcr_write(u32 wr_val)
|
||||||
{
|
{
|
||||||
@@ -67,7 +59,7 @@ static void cram_bcr_write(u32 wr_val)
|
|||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
long int initdram(int board_type)
|
phys_size_t initdram(int board_type)
|
||||||
{
|
{
|
||||||
#if defined(CONFIG_NAND_SPL)
|
#if defined(CONFIG_NAND_SPL)
|
||||||
u32 reg;
|
u32 reg;
|
||||||
@@ -116,10 +108,3 @@ long int initdram(int board_type)
|
|||||||
|
|
||||||
return (CFG_MBYTES_RAM << 20);
|
return (CFG_MBYTES_RAM << 20);
|
||||||
}
|
}
|
||||||
|
|
||||||
#ifndef CONFIG_NAND_SPL
|
|
||||||
int testdram(void)
|
|
||||||
{
|
|
||||||
return (0);
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|||||||
@@ -31,11 +31,11 @@ SECTIONS
|
|||||||
.dynsym : { *(.dynsym) }
|
.dynsym : { *(.dynsym) }
|
||||||
.dynstr : { *(.dynstr) }
|
.dynstr : { *(.dynstr) }
|
||||||
.rel.text : { *(.rel.text) }
|
.rel.text : { *(.rel.text) }
|
||||||
.rela.text : { *(.rela.text) }
|
.rela.text : { *(.rela.text) }
|
||||||
.rel.data : { *(.rel.data) }
|
.rel.data : { *(.rel.data) }
|
||||||
.rela.data : { *(.rela.data) }
|
.rela.data : { *(.rela.data) }
|
||||||
.rel.rodata : { *(.rel.rodata) }
|
.rel.rodata : { *(.rel.rodata) }
|
||||||
.rela.rodata : { *(.rela.rodata) }
|
.rela.rodata : { *(.rela.rodata) }
|
||||||
.rel.got : { *(.rel.got) }
|
.rel.got : { *(.rel.got) }
|
||||||
.rela.got : { *(.rela.got) }
|
.rela.got : { *(.rela.got) }
|
||||||
.rel.ctors : { *(.rel.ctors) }
|
.rel.ctors : { *(.rel.ctors) }
|
||||||
|
|||||||
@@ -38,11 +38,11 @@ SECTIONS
|
|||||||
.dynsym : { *(.dynsym) }
|
.dynsym : { *(.dynsym) }
|
||||||
.dynstr : { *(.dynstr) }
|
.dynstr : { *(.dynstr) }
|
||||||
.rel.text : { *(.rel.text) }
|
.rel.text : { *(.rel.text) }
|
||||||
.rela.text : { *(.rela.text) }
|
.rela.text : { *(.rela.text) }
|
||||||
.rel.data : { *(.rel.data) }
|
.rel.data : { *(.rel.data) }
|
||||||
.rela.data : { *(.rela.data) }
|
.rela.data : { *(.rela.data) }
|
||||||
.rel.rodata : { *(.rel.rodata) }
|
.rel.rodata : { *(.rel.rodata) }
|
||||||
.rela.rodata : { *(.rela.rodata) }
|
.rela.rodata : { *(.rela.rodata) }
|
||||||
.rel.got : { *(.rel.got) }
|
.rel.got : { *(.rel.got) }
|
||||||
.rela.got : { *(.rela.got) }
|
.rela.got : { *(.rela.got) }
|
||||||
.rel.ctors : { *(.rel.ctors) }
|
.rel.ctors : { *(.rel.ctors) }
|
||||||
|
|||||||
@@ -39,7 +39,7 @@ clean:
|
|||||||
rm -f $(SOBJS) $(OBJS)
|
rm -f $(SOBJS) $(OBJS)
|
||||||
|
|
||||||
distclean: clean
|
distclean: clean
|
||||||
rm -f $(LIB) core *.bak .depend
|
rm -f $(LIB) core *.bak $(obj).depend
|
||||||
|
|
||||||
#########################################################################
|
#########################################################################
|
||||||
|
|
||||||
|
|||||||
@@ -280,86 +280,86 @@ const unsigned char cfg_simulate_spd_eeprom[128] = {
|
|||||||
#define EBC0_BNAP_SMALL_FLASH \
|
#define EBC0_BNAP_SMALL_FLASH \
|
||||||
EBC0_BNAP_BME_DISABLED | \
|
EBC0_BNAP_BME_DISABLED | \
|
||||||
EBC0_BNAP_TWT_ENCODE(6) | \
|
EBC0_BNAP_TWT_ENCODE(6) | \
|
||||||
EBC0_BNAP_CSN_ENCODE(0) | \
|
EBC0_BNAP_CSN_ENCODE(0) | \
|
||||||
EBC0_BNAP_OEN_ENCODE(1) | \
|
EBC0_BNAP_OEN_ENCODE(1) | \
|
||||||
EBC0_BNAP_WBN_ENCODE(1) | \
|
EBC0_BNAP_WBN_ENCODE(1) | \
|
||||||
EBC0_BNAP_WBF_ENCODE(3) | \
|
EBC0_BNAP_WBF_ENCODE(3) | \
|
||||||
EBC0_BNAP_TH_ENCODE(1) | \
|
EBC0_BNAP_TH_ENCODE(1) | \
|
||||||
EBC0_BNAP_RE_ENABLED | \
|
EBC0_BNAP_RE_ENABLED | \
|
||||||
EBC0_BNAP_SOR_DELAYED | \
|
EBC0_BNAP_SOR_DELAYED | \
|
||||||
EBC0_BNAP_BEM_WRITEONLY | \
|
EBC0_BNAP_BEM_WRITEONLY | \
|
||||||
EBC0_BNAP_PEN_DISABLED
|
EBC0_BNAP_PEN_DISABLED
|
||||||
|
|
||||||
#define EBC0_BNCR_SMALL_FLASH_CS0 \
|
#define EBC0_BNCR_SMALL_FLASH_CS0 \
|
||||||
EBC0_BNCR_BAS_ENCODE(0xFFF00000) | \
|
EBC0_BNCR_BAS_ENCODE(0xFFF00000) | \
|
||||||
EBC0_BNCR_BS_1MB | \
|
EBC0_BNCR_BS_1MB | \
|
||||||
EBC0_BNCR_BU_RW | \
|
EBC0_BNCR_BU_RW | \
|
||||||
EBC0_BNCR_BW_8BIT
|
EBC0_BNCR_BW_8BIT
|
||||||
|
|
||||||
#define EBC0_BNCR_SMALL_FLASH_CS4 \
|
#define EBC0_BNCR_SMALL_FLASH_CS4 \
|
||||||
EBC0_BNCR_BAS_ENCODE(0x87F00000) | \
|
EBC0_BNCR_BAS_ENCODE(0x87F00000) | \
|
||||||
EBC0_BNCR_BS_1MB | \
|
EBC0_BNCR_BS_1MB | \
|
||||||
EBC0_BNCR_BU_RW | \
|
EBC0_BNCR_BU_RW | \
|
||||||
EBC0_BNCR_BW_8BIT
|
EBC0_BNCR_BW_8BIT
|
||||||
|
|
||||||
/* Large Flash or SRAM */
|
/* Large Flash or SRAM */
|
||||||
#define EBC0_BNAP_LARGE_FLASH_OR_SRAM \
|
#define EBC0_BNAP_LARGE_FLASH_OR_SRAM \
|
||||||
EBC0_BNAP_BME_DISABLED | \
|
EBC0_BNAP_BME_DISABLED | \
|
||||||
EBC0_BNAP_TWT_ENCODE(8) | \
|
EBC0_BNAP_TWT_ENCODE(8) | \
|
||||||
EBC0_BNAP_CSN_ENCODE(0) | \
|
EBC0_BNAP_CSN_ENCODE(0) | \
|
||||||
EBC0_BNAP_OEN_ENCODE(1) | \
|
EBC0_BNAP_OEN_ENCODE(1) | \
|
||||||
EBC0_BNAP_WBN_ENCODE(1) | \
|
EBC0_BNAP_WBN_ENCODE(1) | \
|
||||||
EBC0_BNAP_WBF_ENCODE(1) | \
|
EBC0_BNAP_WBF_ENCODE(1) | \
|
||||||
EBC0_BNAP_TH_ENCODE(2) | \
|
EBC0_BNAP_TH_ENCODE(2) | \
|
||||||
EBC0_BNAP_SOR_DELAYED | \
|
EBC0_BNAP_SOR_DELAYED | \
|
||||||
EBC0_BNAP_BEM_RW | \
|
EBC0_BNAP_BEM_RW | \
|
||||||
EBC0_BNAP_PEN_DISABLED
|
EBC0_BNAP_PEN_DISABLED
|
||||||
|
|
||||||
#define EBC0_BNCR_LARGE_FLASH_OR_SRAM_CS0 \
|
#define EBC0_BNCR_LARGE_FLASH_OR_SRAM_CS0 \
|
||||||
EBC0_BNCR_BAS_ENCODE(0xFF800000) | \
|
EBC0_BNCR_BAS_ENCODE(0xFF800000) | \
|
||||||
EBC0_BNCR_BS_8MB | \
|
EBC0_BNCR_BS_8MB | \
|
||||||
EBC0_BNCR_BU_RW | \
|
EBC0_BNCR_BU_RW | \
|
||||||
EBC0_BNCR_BW_16BIT
|
EBC0_BNCR_BW_16BIT
|
||||||
|
|
||||||
|
|
||||||
#define EBC0_BNCR_LARGE_FLASH_OR_SRAM_CS4 \
|
#define EBC0_BNCR_LARGE_FLASH_OR_SRAM_CS4 \
|
||||||
EBC0_BNCR_BAS_ENCODE(0x87800000) | \
|
EBC0_BNCR_BAS_ENCODE(0x87800000) | \
|
||||||
EBC0_BNCR_BS_8MB | \
|
EBC0_BNCR_BS_8MB | \
|
||||||
EBC0_BNCR_BU_RW | \
|
EBC0_BNCR_BU_RW | \
|
||||||
EBC0_BNCR_BW_16BIT
|
EBC0_BNCR_BW_16BIT
|
||||||
|
|
||||||
/* NVRAM - FPGA */
|
/* NVRAM - FPGA */
|
||||||
#define EBC0_BNAP_NVRAM_FPGA \
|
#define EBC0_BNAP_NVRAM_FPGA \
|
||||||
EBC0_BNAP_BME_DISABLED | \
|
EBC0_BNAP_BME_DISABLED | \
|
||||||
EBC0_BNAP_TWT_ENCODE(9) | \
|
EBC0_BNAP_TWT_ENCODE(9) | \
|
||||||
EBC0_BNAP_CSN_ENCODE(0) | \
|
EBC0_BNAP_CSN_ENCODE(0) | \
|
||||||
EBC0_BNAP_OEN_ENCODE(1) | \
|
EBC0_BNAP_OEN_ENCODE(1) | \
|
||||||
EBC0_BNAP_WBN_ENCODE(1) | \
|
EBC0_BNAP_WBN_ENCODE(1) | \
|
||||||
EBC0_BNAP_WBF_ENCODE(0) | \
|
EBC0_BNAP_WBF_ENCODE(0) | \
|
||||||
EBC0_BNAP_TH_ENCODE(2) | \
|
EBC0_BNAP_TH_ENCODE(2) | \
|
||||||
EBC0_BNAP_RE_ENABLED | \
|
EBC0_BNAP_RE_ENABLED | \
|
||||||
EBC0_BNAP_SOR_DELAYED | \
|
EBC0_BNAP_SOR_DELAYED | \
|
||||||
EBC0_BNAP_BEM_WRITEONLY | \
|
EBC0_BNAP_BEM_WRITEONLY | \
|
||||||
EBC0_BNAP_PEN_DISABLED
|
EBC0_BNAP_PEN_DISABLED
|
||||||
|
|
||||||
#define EBC0_BNCR_NVRAM_FPGA_CS5 \
|
#define EBC0_BNCR_NVRAM_FPGA_CS5 \
|
||||||
EBC0_BNCR_BAS_ENCODE(0x80000000) | \
|
EBC0_BNCR_BAS_ENCODE(0x80000000) | \
|
||||||
EBC0_BNCR_BS_1MB | \
|
EBC0_BNCR_BS_1MB | \
|
||||||
EBC0_BNCR_BU_RW | \
|
EBC0_BNCR_BU_RW | \
|
||||||
EBC0_BNCR_BW_8BIT
|
EBC0_BNCR_BW_8BIT
|
||||||
|
|
||||||
/* Nand Flash */
|
/* Nand Flash */
|
||||||
#define EBC0_BNAP_NAND_FLASH \
|
#define EBC0_BNAP_NAND_FLASH \
|
||||||
EBC0_BNAP_BME_DISABLED | \
|
EBC0_BNAP_BME_DISABLED | \
|
||||||
EBC0_BNAP_TWT_ENCODE(3) | \
|
EBC0_BNAP_TWT_ENCODE(3) | \
|
||||||
EBC0_BNAP_CSN_ENCODE(0) | \
|
EBC0_BNAP_CSN_ENCODE(0) | \
|
||||||
EBC0_BNAP_OEN_ENCODE(0) | \
|
EBC0_BNAP_OEN_ENCODE(0) | \
|
||||||
EBC0_BNAP_WBN_ENCODE(0) | \
|
EBC0_BNAP_WBN_ENCODE(0) | \
|
||||||
EBC0_BNAP_WBF_ENCODE(0) | \
|
EBC0_BNAP_WBF_ENCODE(0) | \
|
||||||
EBC0_BNAP_TH_ENCODE(1) | \
|
EBC0_BNAP_TH_ENCODE(1) | \
|
||||||
EBC0_BNAP_RE_ENABLED | \
|
EBC0_BNAP_RE_ENABLED | \
|
||||||
EBC0_BNAP_SOR_NOT_DELAYED | \
|
EBC0_BNAP_SOR_NOT_DELAYED | \
|
||||||
EBC0_BNAP_BEM_RW | \
|
EBC0_BNAP_BEM_RW | \
|
||||||
EBC0_BNAP_PEN_DISABLED
|
EBC0_BNAP_PEN_DISABLED
|
||||||
|
|
||||||
|
|
||||||
@@ -367,22 +367,22 @@ const unsigned char cfg_simulate_spd_eeprom[128] = {
|
|||||||
|
|
||||||
/* NAND0 */
|
/* NAND0 */
|
||||||
#define EBC0_BNCR_NAND_FLASH_CS1 \
|
#define EBC0_BNCR_NAND_FLASH_CS1 \
|
||||||
EBC0_BNCR_BAS_ENCODE(0x90000000) | \
|
EBC0_BNCR_BAS_ENCODE(0x90000000) | \
|
||||||
EBC0_BNCR_BS_1MB | \
|
EBC0_BNCR_BS_1MB | \
|
||||||
EBC0_BNCR_BU_RW | \
|
EBC0_BNCR_BU_RW | \
|
||||||
EBC0_BNCR_BW_32BIT
|
EBC0_BNCR_BW_32BIT
|
||||||
/* NAND1 - Bank2 */
|
/* NAND1 - Bank2 */
|
||||||
#define EBC0_BNCR_NAND_FLASH_CS2 \
|
#define EBC0_BNCR_NAND_FLASH_CS2 \
|
||||||
EBC0_BNCR_BAS_ENCODE(0x94000000) | \
|
EBC0_BNCR_BAS_ENCODE(0x94000000) | \
|
||||||
EBC0_BNCR_BS_1MB | \
|
EBC0_BNCR_BS_1MB | \
|
||||||
EBC0_BNCR_BU_RW | \
|
EBC0_BNCR_BU_RW | \
|
||||||
EBC0_BNCR_BW_32BIT
|
EBC0_BNCR_BW_32BIT
|
||||||
|
|
||||||
/* NAND1 - Bank3 */
|
/* NAND1 - Bank3 */
|
||||||
#define EBC0_BNCR_NAND_FLASH_CS3 \
|
#define EBC0_BNCR_NAND_FLASH_CS3 \
|
||||||
EBC0_BNCR_BAS_ENCODE(0x94000000) | \
|
EBC0_BNCR_BAS_ENCODE(0x94000000) | \
|
||||||
EBC0_BNCR_BS_1MB | \
|
EBC0_BNCR_BS_1MB | \
|
||||||
EBC0_BNCR_BU_RW | \
|
EBC0_BNCR_BU_RW | \
|
||||||
EBC0_BNCR_BW_32BIT
|
EBC0_BNCR_BW_32BIT
|
||||||
|
|
||||||
int board_early_init_f(void)
|
int board_early_init_f(void)
|
||||||
@@ -453,7 +453,7 @@ int checkboard(void)
|
|||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
long int initdram (int board_type)
|
phys_size_t initdram (int board_type)
|
||||||
{
|
{
|
||||||
#if !(defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL))
|
#if !(defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL))
|
||||||
long dram_size;
|
long dram_size;
|
||||||
@@ -466,73 +466,6 @@ long int initdram (int board_type)
|
|||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
#if defined(CFG_DRAM_TEST)
|
|
||||||
int testdram(void)
|
|
||||||
{
|
|
||||||
unsigned long *mem = (unsigned long *)0;
|
|
||||||
const unsigned long kend = (1024 / sizeof(unsigned long));
|
|
||||||
unsigned long k, n, *p32, ctr;
|
|
||||||
const unsigned long bend = CFG_MBYTES_SDRAM * 1024 * 1024;
|
|
||||||
|
|
||||||
mtmsr(0);
|
|
||||||
|
|
||||||
for (k = 0; k < CFG_MBYTES_SDRAM*1024;
|
|
||||||
++k, mem += (1024 / sizeof(unsigned long))) {
|
|
||||||
if ((k & 1023) == 0) {
|
|
||||||
printf("%3d MB\r", k / 1024);
|
|
||||||
}
|
|
||||||
|
|
||||||
memset(mem, 0xaaaaaaaa, 1024);
|
|
||||||
for (n = 0; n < kend; ++n) {
|
|
||||||
if (mem[n] != 0xaaaaaaaa) {
|
|
||||||
printf("SDRAM test fails at: %08x\n",
|
|
||||||
(uint) & mem[n]);
|
|
||||||
return 1;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
memset(mem, 0x55555555, 1024);
|
|
||||||
for (n = 0; n < kend; ++n) {
|
|
||||||
if (mem[n] != 0x55555555) {
|
|
||||||
printf("SDRAM test fails at: %08x\n",
|
|
||||||
(uint) & mem[n]);
|
|
||||||
return 1;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Perform a sequence test to ensure that all
|
|
||||||
* memory locations are uniquely addressable
|
|
||||||
*/
|
|
||||||
ctr = 0;
|
|
||||||
p32 = 0;
|
|
||||||
while ((unsigned long)p32 != bend) {
|
|
||||||
if (0 == ((unsigned long)p32 & ((1<<20)-1)))
|
|
||||||
printf("Writing %3d MB\r", (unsigned long)p32 >> 20);
|
|
||||||
*p32++ = ctr++;
|
|
||||||
}
|
|
||||||
|
|
||||||
ctr = 0;
|
|
||||||
p32 = 0;
|
|
||||||
while ((unsigned long)p32 != bend) {
|
|
||||||
if (0 == ((unsigned long)p32 & ((1<<20)-1)))
|
|
||||||
printf("Verifying %3d MB\r", (unsigned long)p32 >> 20);
|
|
||||||
|
|
||||||
if (*p32 != ctr) {
|
|
||||||
printf("SDRAM test fails at: %08x\n", p32);
|
|
||||||
return 1;
|
|
||||||
}
|
|
||||||
|
|
||||||
ctr++;
|
|
||||||
p32++;
|
|
||||||
}
|
|
||||||
|
|
||||||
printf("SDRAM test passes\n");
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/*************************************************************************
|
/*************************************************************************
|
||||||
* pci_pre_init
|
* pci_pre_init
|
||||||
*
|
*
|
||||||
|
|||||||
@@ -31,11 +31,11 @@ SECTIONS
|
|||||||
.dynsym : { *(.dynsym) }
|
.dynsym : { *(.dynsym) }
|
||||||
.dynstr : { *(.dynstr) }
|
.dynstr : { *(.dynstr) }
|
||||||
.rel.text : { *(.rel.text) }
|
.rel.text : { *(.rel.text) }
|
||||||
.rela.text : { *(.rela.text) }
|
.rela.text : { *(.rela.text) }
|
||||||
.rel.data : { *(.rel.data) }
|
.rel.data : { *(.rel.data) }
|
||||||
.rela.data : { *(.rela.data) }
|
.rela.data : { *(.rela.data) }
|
||||||
.rel.rodata : { *(.rel.rodata) }
|
.rel.rodata : { *(.rel.rodata) }
|
||||||
.rela.rodata : { *(.rela.rodata) }
|
.rela.rodata : { *(.rela.rodata) }
|
||||||
.rel.got : { *(.rel.got) }
|
.rel.got : { *(.rel.got) }
|
||||||
.rela.got : { *(.rela.got) }
|
.rela.got : { *(.rela.got) }
|
||||||
.rel.ctors : { *(.rel.ctors) }
|
.rel.ctors : { *(.rel.ctors) }
|
||||||
|
|||||||
@@ -43,11 +43,11 @@ SECTIONS
|
|||||||
.dynsym : { *(.dynsym) }
|
.dynsym : { *(.dynsym) }
|
||||||
.dynstr : { *(.dynstr) }
|
.dynstr : { *(.dynstr) }
|
||||||
.rel.text : { *(.rel.text) }
|
.rel.text : { *(.rel.text) }
|
||||||
.rela.text : { *(.rela.text) }
|
.rela.text : { *(.rela.text) }
|
||||||
.rel.data : { *(.rel.data) }
|
.rel.data : { *(.rel.data) }
|
||||||
.rela.data : { *(.rela.data) }
|
.rela.data : { *(.rela.data) }
|
||||||
.rel.rodata : { *(.rel.rodata) }
|
.rel.rodata : { *(.rel.rodata) }
|
||||||
.rela.rodata : { *(.rela.rodata) }
|
.rela.rodata : { *(.rela.rodata) }
|
||||||
.rel.got : { *(.rel.got) }
|
.rel.got : { *(.rel.got) }
|
||||||
.rela.got : { *(.rela.got) }
|
.rela.got : { *(.rela.got) }
|
||||||
.rel.ctors : { *(.rel.ctors) }
|
.rel.ctors : { *(.rel.ctors) }
|
||||||
|
|||||||
@@ -38,7 +38,7 @@ clean:
|
|||||||
rm -f $(SOBJS) $(OBJS)
|
rm -f $(SOBJS) $(OBJS)
|
||||||
|
|
||||||
distclean: clean
|
distclean: clean
|
||||||
rm -f $(LIB) core *.bak .depend
|
rm -f $(LIB) core *.bak $(obj).depend
|
||||||
|
|
||||||
#########################################################################
|
#########################################################################
|
||||||
|
|
||||||
|
|||||||
@@ -66,30 +66,14 @@ int checkboard(void)
|
|||||||
return (0);
|
return (0);
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
|
||||||
* sdram_init - Dummy implementation for start.S, spd_sdram used on this board!
|
|
||||||
*/
|
|
||||||
void sdram_init(void)
|
|
||||||
{
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* -------------------------------------------------------------------------
|
/* -------------------------------------------------------------------------
|
||||||
initdram(int board_type) reads EEPROM via I2c. EEPROM contains all of
|
initdram(int board_type) reads EEPROM via I2c. EEPROM contains all of
|
||||||
the necessary info for SDRAM controller configuration
|
the necessary info for SDRAM controller configuration
|
||||||
------------------------------------------------------------------------- */
|
------------------------------------------------------------------------- */
|
||||||
long int initdram(int board_type)
|
phys_size_t initdram(int board_type)
|
||||||
{
|
{
|
||||||
long int ret;
|
long int ret;
|
||||||
|
|
||||||
ret = spd_sdram();
|
ret = spd_sdram();
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
int testdram(void)
|
|
||||||
{
|
|
||||||
/* TODO: XXX XXX XXX */
|
|
||||||
printf("test: xxx MB - ok\n");
|
|
||||||
|
|
||||||
return (0);
|
|
||||||
}
|
|
||||||
|
|||||||
@@ -38,11 +38,11 @@ SECTIONS
|
|||||||
.dynsym : { *(.dynsym) }
|
.dynsym : { *(.dynsym) }
|
||||||
.dynstr : { *(.dynstr) }
|
.dynstr : { *(.dynstr) }
|
||||||
.rel.text : { *(.rel.text) }
|
.rel.text : { *(.rel.text) }
|
||||||
.rela.text : { *(.rela.text) }
|
.rela.text : { *(.rela.text) }
|
||||||
.rel.data : { *(.rel.data) }
|
.rel.data : { *(.rel.data) }
|
||||||
.rela.data : { *(.rela.data) }
|
.rela.data : { *(.rela.data) }
|
||||||
.rel.rodata : { *(.rel.rodata) }
|
.rel.rodata : { *(.rel.rodata) }
|
||||||
.rela.rodata : { *(.rela.rodata) }
|
.rela.rodata : { *(.rela.rodata) }
|
||||||
.rel.got : { *(.rel.got) }
|
.rel.got : { *(.rel.got) }
|
||||||
.rela.got : { *(.rela.got) }
|
.rela.got : { *(.rela.got) }
|
||||||
.rel.ctors : { *(.rel.ctors) }
|
.rel.ctors : { *(.rel.ctors) }
|
||||||
|
|||||||
@@ -40,7 +40,7 @@ clean:
|
|||||||
rm -f $(SOBJS) $(OBJS)
|
rm -f $(SOBJS) $(OBJS)
|
||||||
|
|
||||||
distclean: clean
|
distclean: clean
|
||||||
rm -f $(LIB) core *.bak .depend
|
rm -f $(LIB) core *.bak $(obj).depend
|
||||||
|
|
||||||
#########################################################################
|
#########################################################################
|
||||||
|
|
||||||
|
|||||||
@@ -22,6 +22,7 @@
|
|||||||
#include <ppc440.h>
|
#include <ppc440.h>
|
||||||
#include <libfdt.h>
|
#include <libfdt.h>
|
||||||
#include <fdt_support.h>
|
#include <fdt_support.h>
|
||||||
|
#include <i2c.h>
|
||||||
#include <asm/processor.h>
|
#include <asm/processor.h>
|
||||||
#include <asm/io.h>
|
#include <asm/io.h>
|
||||||
#include <asm/mmu.h>
|
#include <asm/mmu.h>
|
||||||
@@ -205,50 +206,12 @@ u32 ddr_clktr(u32 default_val) {
|
|||||||
* I2C SPD DIMM autodetection/calibration doesn't fit into the 4k of boot
|
* I2C SPD DIMM autodetection/calibration doesn't fit into the 4k of boot
|
||||||
* code.
|
* code.
|
||||||
*/
|
*/
|
||||||
long int initdram(int board_type)
|
phys_size_t initdram(int board_type)
|
||||||
{
|
{
|
||||||
return CFG_MBYTES_SDRAM << 20;
|
return CFG_MBYTES_SDRAM << 20;
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if defined(CFG_DRAM_TEST)
|
|
||||||
int testdram(void)
|
|
||||||
{
|
|
||||||
unsigned long *mem = (unsigned long *)0;
|
|
||||||
const unsigned long kend = (1024 / sizeof(unsigned long));
|
|
||||||
unsigned long k, n;
|
|
||||||
|
|
||||||
mtmsr(0);
|
|
||||||
|
|
||||||
for (k = 0; k < CFG_KBYTES_SDRAM;
|
|
||||||
++k, mem += (1024 / sizeof(unsigned long))) {
|
|
||||||
if ((k & 1023) == 0) {
|
|
||||||
printf("%3d MB\r", k / 1024);
|
|
||||||
}
|
|
||||||
|
|
||||||
memset(mem, 0xaaaaaaaa, 1024);
|
|
||||||
for (n = 0; n < kend; ++n) {
|
|
||||||
if (mem[n] != 0xaaaaaaaa) {
|
|
||||||
printf("SDRAM test fails at: %08x\n",
|
|
||||||
(uint) & mem[n]);
|
|
||||||
return 1;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
memset(mem, 0x55555555, 1024);
|
|
||||||
for (n = 0; n < kend; ++n) {
|
|
||||||
if (mem[n] != 0x55555555) {
|
|
||||||
printf("SDRAM test fails at: %08x\n",
|
|
||||||
(uint) & mem[n]);
|
|
||||||
return 1;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
printf("SDRAM test passes\n");
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* pci_target_init
|
* pci_target_init
|
||||||
*
|
*
|
||||||
@@ -431,6 +394,7 @@ int misc_init_r(void)
|
|||||||
u32 sdr0_srst1 = 0;
|
u32 sdr0_srst1 = 0;
|
||||||
u32 eth_cfg;
|
u32 eth_cfg;
|
||||||
u32 pvr = get_pvr();
|
u32 pvr = get_pvr();
|
||||||
|
u8 val;
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Set EMAC mode/configuration (GMII, SGMII, RGMII...).
|
* Set EMAC mode/configuration (GMII, SGMII, RGMII...).
|
||||||
@@ -458,6 +422,15 @@ int misc_init_r(void)
|
|||||||
sdr0_srst1 &= ~SDR0_SRST1_AHB;
|
sdr0_srst1 &= ~SDR0_SRST1_AHB;
|
||||||
mtsdr(SDR0_SRST1, sdr0_srst1);
|
mtsdr(SDR0_SRST1, sdr0_srst1);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* RTC/M41T62:
|
||||||
|
* Disable square wave output: Batterie will be drained
|
||||||
|
* quickly, when this output is not disabled
|
||||||
|
*/
|
||||||
|
val = i2c_reg_read(CFG_I2C_RTC_ADDR, 0xa);
|
||||||
|
val &= ~0x40;
|
||||||
|
i2c_reg_write(CFG_I2C_RTC_ADDR, 0xa, val);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -31,11 +31,11 @@ SECTIONS
|
|||||||
.dynsym : { *(.dynsym) }
|
.dynsym : { *(.dynsym) }
|
||||||
.dynstr : { *(.dynstr) }
|
.dynstr : { *(.dynstr) }
|
||||||
.rel.text : { *(.rel.text) }
|
.rel.text : { *(.rel.text) }
|
||||||
.rela.text : { *(.rela.text) }
|
.rela.text : { *(.rela.text) }
|
||||||
.rel.data : { *(.rel.data) }
|
.rel.data : { *(.rel.data) }
|
||||||
.rela.data : { *(.rela.data) }
|
.rela.data : { *(.rela.data) }
|
||||||
.rel.rodata : { *(.rel.rodata) }
|
.rel.rodata : { *(.rel.rodata) }
|
||||||
.rela.rodata : { *(.rela.rodata) }
|
.rela.rodata : { *(.rela.rodata) }
|
||||||
.rel.got : { *(.rel.got) }
|
.rel.got : { *(.rel.got) }
|
||||||
.rela.got : { *(.rela.got) }
|
.rela.got : { *(.rela.got) }
|
||||||
.rel.ctors : { *(.rel.ctors) }
|
.rel.ctors : { *(.rel.ctors) }
|
||||||
|
|||||||
@@ -43,11 +43,11 @@ SECTIONS
|
|||||||
.dynsym : { *(.dynsym) }
|
.dynsym : { *(.dynsym) }
|
||||||
.dynstr : { *(.dynstr) }
|
.dynstr : { *(.dynstr) }
|
||||||
.rel.text : { *(.rel.text) }
|
.rel.text : { *(.rel.text) }
|
||||||
.rela.text : { *(.rela.text) }
|
.rela.text : { *(.rela.text) }
|
||||||
.rel.data : { *(.rel.data) }
|
.rel.data : { *(.rel.data) }
|
||||||
.rela.data : { *(.rela.data) }
|
.rela.data : { *(.rela.data) }
|
||||||
.rel.rodata : { *(.rel.rodata) }
|
.rel.rodata : { *(.rel.rodata) }
|
||||||
.rela.rodata : { *(.rela.rodata) }
|
.rela.rodata : { *(.rela.rodata) }
|
||||||
.rel.got : { *(.rel.got) }
|
.rel.got : { *(.rel.got) }
|
||||||
.rela.got : { *(.rela.got) }
|
.rela.got : { *(.rela.got) }
|
||||||
.rel.ctors : { *(.rel.ctors) }
|
.rel.ctors : { *(.rel.ctors) }
|
||||||
|
|||||||
@@ -39,7 +39,7 @@ clean:
|
|||||||
rm -f $(SOBJS) $(OBJS)
|
rm -f $(SOBJS) $(OBJS)
|
||||||
|
|
||||||
distclean: clean
|
distclean: clean
|
||||||
rm -f $(LIB) core *.bak .depend
|
rm -f $(LIB) core *.bak $(obj).depend
|
||||||
|
|
||||||
#########################################################################
|
#########################################################################
|
||||||
|
|
||||||
|
|||||||
@@ -104,7 +104,7 @@ int checkboard(void)
|
|||||||
return (0);
|
return (0);
|
||||||
}
|
}
|
||||||
|
|
||||||
long int initdram(int board_type)
|
phys_size_t initdram(int board_type)
|
||||||
{
|
{
|
||||||
long dram_size = 0;
|
long dram_size = 0;
|
||||||
|
|
||||||
@@ -116,36 +116,6 @@ long int initdram(int board_type)
|
|||||||
return dram_size;
|
return dram_size;
|
||||||
}
|
}
|
||||||
|
|
||||||
#if defined(CFG_DRAM_TEST)
|
|
||||||
int testdram(void)
|
|
||||||
{
|
|
||||||
uint *pstart = (uint *) 0x00000000;
|
|
||||||
uint *pend = (uint *) 0x08000000;
|
|
||||||
uint *p;
|
|
||||||
|
|
||||||
for (p = pstart; p < pend; p++)
|
|
||||||
*p = 0xaaaaaaaa;
|
|
||||||
|
|
||||||
for (p = pstart; p < pend; p++) {
|
|
||||||
if (*p != 0xaaaaaaaa) {
|
|
||||||
printf("SDRAM test fails at: %08x\n", (uint) p);
|
|
||||||
return 1;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
for (p = pstart; p < pend; p++)
|
|
||||||
*p = 0x55555555;
|
|
||||||
|
|
||||||
for (p = pstart; p < pend; p++) {
|
|
||||||
if (*p != 0x55555555) {
|
|
||||||
printf("SDRAM test fails at: %08x\n", (uint) p);
|
|
||||||
return 1;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if !defined(CONFIG_SPD_EEPROM)
|
#if !defined(CONFIG_SPD_EEPROM)
|
||||||
/*************************************************************************
|
/*************************************************************************
|
||||||
* fixed sdram init -- doesn't use serial presence detect.
|
* fixed sdram init -- doesn't use serial presence detect.
|
||||||
|
|||||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user