Commit Graph

57132 Commits

Author SHA1 Message Date
Michal Simek
b92f1c7a03 Makefile: Prioritize external dtb if defined
Prioritize external dtb if its passed via EXT_DTB
than the dtb that was built in the tree. With this
patch it appends the specified external dtb to
the u-boot image.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
2019-03-25 15:39:06 +01:00
Siva Durga Prasad Paladugu
13eb663508 arm: zynq: Add an info message about post config
Post configuration cant be run at u-boot as u-boot
didn't has any info about the design.So,this patch
adds an info message that post config was not run
and needs to be run manually if needed.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-25 15:39:06 +01:00
Siva Durga Prasad Paladugu
9c8e7f4769 arm64: zynqmp: Add idcode for new RFSoC silicon ZU39DR
This patch adds "zu39dr" to the list of zynqmp devices
The zu39DR is the new RFSoC silicon with id value of 0x66.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-25 15:39:06 +01:00
Siva Durga Prasad Paladugu
cebc700b71 spi: zynqmp_gqspi: Fix tap delay values
There is no need of read modify write for tapdelay settings
ans hence remove the read operations while setting tapdelays.
Also, correct tapdelay value settings at 40MHZ by modifying
the if check to <= instead of <.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-22 11:24:27 +01:00
Siva Durga Prasad Paladugu
3aa57bd9e2 net: phy: ti: Use ofnode api to read phy property
Fix incorrect read of phy property "ti,6-wire-mode"
by using ofnode api instead of dev read.
All other phy properties in of_init() routine were
also read using ofnode APIs.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-22 11:24:07 +01:00
Rajan Vaja
e80b0044d6 include: dt-binding: clock: Rename file name
Rename file name of ZynqMP clk dt-bindings to align with
file name of reset and power dt-bindings.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-19 13:32:24 +01:00
Michal Simek
568a335428 .gitignore: Ignore regenerated *.dtbo files
*.dtbo are dt overlays files which should be also ignored as *.dtb.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-19 13:32:23 +01:00
Jyotheeswar Reddy Mutthareddyvari
3ca3e7fc2a arm64: zynqmp: Enable fclk nodes
CCF requires all PL IPs to have CCF compliant drivers and manage the clocks
they depend on. Currently not all PL IP drivers are CCF compliant and some
IPs may not have drivers. Since CCF accounts only for clock usage by CCF
compliant drivers, PL clocks may be gated and could cause malfunction of PL
IPs/Drivers that are not CCF compliant. So, keep all PL clocks always
enabled by enabling fclk nodes.
For cases which require active PL clock management, it should first be
ensured that all IPs have CCF compliant drivers and then fclk nodes can
be disabled.

Signed-off-by: Jyotheeswar Reddy Mutthareddyvari <jyotheeswar.reddy.mutthareddyvari@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-19 13:32:23 +01:00
Anurag Kumar Vulisha
9c21aeb78c arm64: dts: zynqmp: Add interrupt-names property into dwc3 node
This patch adds the "interrupt-names" property for providing
names to the interrupt ids used in dwc3 dts node

Signed-off-by: Anurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-19 13:32:23 +01:00
Harini Katakam
39f604e2fd arm64: dts: zynqmp: Add optional gpio phy reset properties
Add gpio phy reset via I2C expander TCA6416 on board ZCU102.
A warning call trace is observer in probe when this reset is called
from context that can sleep. Keep this commented until that is
resolved in phylib.

Signed-off-by: Harini Katakam <harini.katakam@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-19 13:01:56 +01:00
Michal Simek
00caea2145 arm64: zynqmp: Turn comment to gpio-line-names
Label gpio lines properly.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-19 13:01:19 +01:00
Michal Simek
fc2bc6508e arm64: zynqmp: Enable fpd_dma for zcu104 platforms
Enable fpd_dma for these boards.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-19 13:00:27 +01:00
Siva Durga Prasad Paladugu
f326702628 arm64: xilinx: zynqmp: Remove unneeded configs
Remove unneeded configs from mini qspi configuration
so that it saves space for this mini configuration.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-19 12:54:33 +01:00
Siva Durga Prasad Paladugu
92a55754fb arm64: zynqmp: Remove zynqmp-mini-qspi.dtsi file
This patch removes zynqmp-mini-qspi.dtsi files as it has
same content as zynqmp-mini-qspi.dts file and there is no
need to maintain two, if .dts can be included in all files
instead of .dtsi. So, this patch removes .dtsi inclusion with
.dts in all files.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-19 12:54:24 +01:00
Siva Durga Prasad Paladugu
b7fcedeee7 arm64: zynqmp: Define label for flash node
Define a label for flash node so that it can be
referenced easily as required.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-19 12:54:14 +01:00
Siva Durga Prasad Paladugu
de155c3795 arm64: zynqmp: Add spi-flash compatible string to flash node
spi-flash compatible string is needed for reading tx and rx bus
widths, hence add this compatible string to flash node.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-19 12:54:06 +01:00
Siva Durga Prasad Paladugu
5ff8217836 arm64: zynqmp: Enable Micrel phy support for xilinx zc1275 revB
This patch enables Micrel phy support for Xilinx ZynqMP zc1275
revB board.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-16 14:02:37 +01:00
Siva Durga Prasad Paladugu
8563ced8a0 net: phy: xilinx_gmii2rgmii: Fill node pointer for external phy
This patch fills external phy node pointer so that it will
be used in its driver to read its phy properties from DT.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-16 14:02:37 +01:00
Siva Durga Prasad Paladugu
bf09e558d1 net: phy: xilinx_gmii2rgmii: Define readext and writeext routines
This patch defines writeext and readext routines and hooks
them for xilinx gmii2rgmii phy driver. These routines will
invokes corresponding external phy routines if defined.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-16 14:02:37 +01:00
Siva Durga Prasad Paladugu
b351de58a9 net: phy: micrel_ksz90x1: switch to use ofnode apis
phydev->node is phy node, phydev->dev->node is controller
and that current code is likely reading the properties from
controller node and not from phy. So, Use PHY API phy_get_ofnode()
helper to get PHY DT node and use ofnode_read_u32_default() to
read properties in phy node.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Changes for v2:
- Updated description
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-16 14:02:37 +01:00
Michal Simek
602f217c49 phy: ti: Init node before reading
There is a need to fill node before clk_output_sel is setup.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
2019-03-16 13:42:50 +01:00
T Karthik Reddy
8fa84d44db common: image-sig.c: Add manual relocation
This patch adds manual relocation for struct checksum_algo & struct
crypto_algo structures.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-16 11:09:53 +01:00
T Karthik Reddy
bd7859cacf drivers: crypto: rsa_mod_exp: Add manual relocation for ops->mod_exp()
This patch adds manual relocation for Modular Exponentiation if
CONFIG_NEEDS_MANUAL_RELOC is enabled.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-16 11:09:53 +01:00
T Karthik Reddy
e50395850f common: hash: Manually relocate struct hash_algo
This patch adds manual relocation for struct hash_algo if
CONFIG_NEEDS_MANUAL_RELOC is enabled.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-16 11:09:52 +01:00
Siva Durga Prasad Paladugu
4b04f47297 net: phy: Define init routine and register generic phy driver
This patch define init routine for generic phy driver and registers it
using phy_register as this generic phy driver also needs to be relocated
incase of manual reloc.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-15 17:43:22 +01:00
Siva Durga Prasad Paladugu
6bc04dc1d6 net: phy: ti: Add support for 6-wire mode in SGMII configuration
This patch adds 6 wire mode supports which enables SGMII clock
to MAC from phy. The drivers gets this 6 wire mode info by reading
the property "ti,6-wire-mode" from DT.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-15 14:53:20 +01:00
Siva Durga Prasad Paladugu
1d44a0b44b net: xilinx_axiemac: Fill the phy node pointer in phydev
This patch assings the phynode pointer to the phydev node
as it is needed later in the corresponding phy driver to read
phy properties from DT.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-15 14:53:20 +01:00
T Karthik Reddy
e3c00d0191 arm64: zynqmp: Use zynqmp_mmio_read/write functions
Changed the return type of reset_reason() to int from u32, because
zynqmp_mmio_read/write() returns signed value on error.
Replaced readl and writel functions with zynqmp_mmio_read &
zynqmp_mmio_write functions to access RESET_REASON(CRL_APB) registers.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-13 15:57:58 +01:00
T Karthik Reddy
506e730462 test: py: tests: Add py-test case for zynq aes loadp command
This patch adds py-test case for zynq aes loadp command. It tests
loading partial bitstream to DDR and tests loading partial bitstream
to PL using "zynq aes loadp" command. This test needs to be executed
only in bootmode, if not it wil be skipped.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-13 15:19:22 +01:00
T Karthik Reddy
f5fbd45ddb test: py: tests: Correct zynq aes & rsa py-test cases
This patch corrects zynq aes & rsa py-test cases as per changes in
zynq aes and rsa commands.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-13 15:19:22 +01:00
T Karthik Reddy
9eb4a87785 test: py: tests: Compare value instead of object
This patch corrects comparing value instead of comparing objects

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-13 15:19:21 +01:00
T Karthik Reddy
ebf24fb076 fpga: zynqpl: Flush dcache only for non-bitstream data
In case of aes decryption destination address range must be flushed
before transferring decrypted data to destination.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-13 15:19:21 +01:00
T Karthik Reddy
3a460ecd96 ARM: zynq: Add zynq aes load & loadp commands
Added support for zynq aes load & loadp commands which are broken by
mainline merge.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-13 15:19:21 +01:00
T Karthik Reddy
a464203cca ARM: zynq: Check zynq aes & rsa command parameters count
This patch checks for zynq aes & rsa commands max parameters count. Also
checks minimum number of parameters count for aes command.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-13 15:19:21 +01:00
T Karthik Reddy
a3d1bdb137 fpga: zynqpl: Check fpga config completion
This patch checks fpga config completion when a bitstream is loaded
into PL.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-13 15:19:21 +01:00
T Karthik Reddy
8658eadb39 fpga: zynqpl: Add bstype argument to zynq_decrypt_load()
This patch adds 'bstype' argument to zynq_decrypt_load() to specify whether
the input source is a bitstream/non-bitstream/partial bitstream image.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-13 15:19:21 +01:00
Siva Durga Prasad Paladugu
b266b3847f i2c: i2c_cdns: Fix below warnings with checker tool
This patch fixes below warnings found with checker tool.
The variable len in i2c_msg struct is of unsigned type
and it is received as recv_count which is unsigned type
but it is checked with < 0 which is always false, hence
removed it.
The local variable curr_recv_count is declared as signed
type and compared aginst unsigned recv_count which is
incorrect. This is fixed by declaring it as unsigned type.

drivers/i2c/i2c-cdns.c: In function ‘cdns_i2c_read_data’:
drivers/i2c/i2c-cdns.c:317:18: warning: comparison of
unsigned expression < 0 is always false [-Wtype-limits]
  if ((recv_count < 0))
                  ^
drivers/i2c/i2c-cdns.c:340:24: warning: comparison of
integer expressions of different signedness:
‘u32’ {aka ‘unsigned int’} and ‘int’ [-Wsign-compare]
  updatetx = recv_count > curr_recv_count;
                        ^
drivers/i2c/i2c-cdns.c:361:39: warning: comparison of
integer expressions of different signedness:
‘u32’ {aka ‘unsigned int’} and ‘int’ [-Wsign-compare]
    while (readl(&regs->transfer_size) !=

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-13 15:19:21 +01:00
T Karthik Reddy
6fb02bbf50 arm64: zynqmp Add CONFIG_SF_DUAL_FLASH to zcu111 revA
This patch enables dual flash support for zcu111 board.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-12 12:53:01 +01:00
Siva Durga Prasad Paladugu
be952808d6 xilinx: Add qspi boot command script for reference
Thsi patch adds qspiboot command script for reference.
This can be converetd into uboot script using mkimage and
use for booting.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-12 12:53:01 +01:00
Siva Durga Prasad Paladugu
01ab10f790 i2c: i2c_cdns: Add support for handling arbitration lost
This patch adds support for handling arbitration lost
in case of multi master mode. When an arbitration lost
is detected, it retries for 10 times before failing.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-12 12:53:01 +01:00
Siva Durga Prasad Paladugu
505b978dab i2c: i2c_cdns: Fix clearing of all interrupts
The arbitration lost interrupt was not getting cleared
while clearing interrupts. This patch fixes this by adding
arbitration lost interrupt as well during clear. This patch
also removes hardcoded value and defined a macro for it.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-12 12:53:01 +01:00
Siva Durga Prasad Paladugu
225e20a440 spi: zynqmp_gqspi: Fix tap delay values at 100MHz and 150MHz
This patch fixes the tap delay values to be set at 100MHz and 150MHz
as per TRM by fixing the if condition to use <= instead of <.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-12 12:53:01 +01:00
Siva Durga Prasad Paladugu
195c620e34 net: phy: xilinx_gmii2rgmii: Add check for external phy detection
Add check if an external phy is detected or not before proceeding
further to config the external phy. This patch fixes the issue of
u-boot hang or reset, if u-boot is not able to communicate with
external connected over gmiitorgmii bridge.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-02-27 08:53:11 +01:00
Siva Durga Prasad Paladugu
e118badbd6 net: phy: Fix return value check phy_probe
Don't ignore return value of phy_probe() call as
the probe may fail and it needs to be reported.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-02-27 08:53:11 +01:00
Siva Durga Prasad Paladugu
260ac1c66d net: phy: Reloc next and prev pointers inside phy_drivers
This patch relocates the pointers inside phy_drivers incase
of manual reloc. Without this reloc, these points to invalid
pre relocation address and hence causes exception or hang.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-02-27 08:53:11 +01:00
Michal Simek
e168f3d231 arm64: zynqmp: Remove eeprom setting
By moving to DM_I2C there is no need to specify any eeprom configuration
because it is read from DT.

Reported-by: Sreeja Vadakattu <sreeja.vadakattu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-02-27 08:53:11 +01:00
Rajan Vaja
8b7bc7ccd1 dts: xilinx: zynqmp: Use macro instead of hard-coded value of reset
Use reset ID macros instead of hard-coded values.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-02-27 08:53:10 +01:00
Rajan Vaja
0a4e8524b7 dts: xilinx: zynqmp: Use macro instead of hard-coded value
Use clock ID macros instead of hard-coded values.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-02-27 08:53:10 +01:00
Rajan Vaja
cf9adf55b2 dts: xilinx: Update zynqmp dts
Update zynqmp dts files to sync with upstream binding.

Below DT nodes are updated:
* Firmware
* Clock
* zynqmp-power
* Power domain
* Reset
* Pinctrl

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-02-27 08:53:10 +01:00
Michal Simek
e5d628d1dd arm64: zynqmp: Add xlnx,zynqmp-clk.h binding header
Add clk binding header.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-02-27 08:53:10 +01:00