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arm64: zynqmp: Enable fclk nodes

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CCF requires all PL IPs to have CCF compliant drivers and manage the clocks
they depend on. Currently not all PL IP drivers are CCF compliant and some
IPs may not have drivers. Since CCF accounts only for clock usage by CCF
compliant drivers, PL clocks may be gated and could cause malfunction of PL
IPs/Drivers that are not CCF compliant. So, keep all PL clocks always
enabled by enabling fclk nodes.
For cases which require active PL clock management, it should first be
ensured that all IPs have CCF compliant drivers and then fclk nodes can
be disabled.

Signed-off-by: Jyotheeswar Reddy Mutthareddyvari <jyotheeswar.reddy.mutthareddyvari@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This commit is contained in:
Jyotheeswar Reddy Mutthareddyvari
2019-03-11 11:41:19 -07:00
committed by Michal Simek
parent 9c21aeb78c
commit 3ca3e7fc2a
1 changed files with 4 additions and 4 deletions
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8
arch/arm/dts/zynqmp-clk-ccf.dtsi
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@@ -10,25 +10,25 @@
#include <dt-bindings/clock/xlnx,zynqmp-clk.h>
/ {
fclk0: fclk0 {
status = "disabled";
status = "okay";
compatible = "xlnx,fclk";
clocks = <&zynqmp_clk PL0_REF>;
};
fclk1: fclk1 {
status = "disabled";
status = "okay";
compatible = "xlnx,fclk";
clocks = <&zynqmp_clk PL1_REF>;
};
fclk2: fclk2 {
status = "disabled";
status = "okay";
compatible = "xlnx,fclk";
clocks = <&zynqmp_clk PL2_REF>;
};
fclk3: fclk3 {
status = "disabled";
status = "okay";
compatible = "xlnx,fclk";
clocks = <&zynqmp_clk PL3_REF>;
};