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arm64: zynqmp: Remove zynqmp-mini-qspi.dtsi file

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This patch removes zynqmp-mini-qspi.dtsi files as it has
same content as zynqmp-mini-qspi.dts file and there is no
need to maintain two, if .dts can be included in all files
instead of .dtsi. So, this patch removes .dtsi inclusion with
.dts in all files.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This commit is contained in:
Siva Durga Prasad Paladugu
2019-03-19 11:50:51 +05:30
committed by Michal Simek
parent b7fcedeee7
commit 92a55754fb
8 changed files with 7 additions and 102 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/dts/zynqmp-mini-qspi-parallel.dts
View File

@@ -5,7 +5,7 @@
* Copyright (C) 2015 - 2017 Xilinx, Inc.
*/
#include "zynqmp-mini-qspi.dtsi"
#include "zynqmp-mini-qspi.dts"
&qspi {
is-dual = <1>;

2
arch/arm/dts/zynqmp-mini-qspi-single.dts
View File

@@ -5,7 +5,7 @@
* Copyright (C) 2015 - 2017 Xilinx, Inc.
*/
#include "zynqmp-mini-qspi.dtsi"
#include "zynqmp-mini-qspi.dts"
&flash0 {
spi-rx-bus-width = <4>;

2
arch/arm/dts/zynqmp-mini-qspi-stacked.dts
View File

@@ -5,7 +5,7 @@
* Copyright (C) 2015 - 2017 Xilinx, Inc.
*/
#include "zynqmp-mini-qspi.dtsi"
#include "zynqmp-mini-qspi.dts"
&qspi {
is-dual = <0>;

2
arch/arm/dts/zynqmp-mini-qspi-x1-single.dts
View File

@@ -5,7 +5,7 @@
* Copyright (C) 2015 - 2017 Xilinx, Inc.
*/
#include "zynqmp-mini-qspi.dtsi"
#include "zynqmp-mini-qspi.dts"
&flash0 {
spi-rx-bus-width = <1>;

2
arch/arm/dts/zynqmp-mini-qspi-x1-stacked.dts
View File

@@ -5,7 +5,7 @@
* Copyright (C) 2015 - 2017 Xilinx, Inc.
*/
#include "zynqmp-mini-qspi.dtsi"
#include "zynqmp-mini-qspi.dts"
&qspi {
is-dual = <0>;

2
arch/arm/dts/zynqmp-mini-qspi-x2-single.dts
View File

@@ -5,7 +5,7 @@
* Copyright (C) 2015 - 2017 Xilinx, Inc.
*/
#include "zynqmp-mini-qspi.dtsi"
#include "zynqmp-mini-qspi.dts"
&flash0 {
spi-rx-bus-width = <2>;

2
arch/arm/dts/zynqmp-mini-qspi-x2-stacked.dts
View File

@@ -5,7 +5,7 @@
* Copyright (C) 2015 - 2017 Xilinx, Inc.
*/
#include "zynqmp-mini-qspi.dtsi"
#include "zynqmp-mini-qspi.dts"
&qspi {
is-dual = <0>;

95
arch/arm/dts/zynqmp-mini-qspi.dtsi
View File

@@ -1,95 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* dts file for Xilinx ZynqMP Mini Configuration
*
* (C) Copyright 2015, Xilinx, Inc.
*
* Siva Durga Prasad <siva.durga.paladugu@xilinx.com>
* Michal Simek <michal.simek@xilinx.com>
*/
/dts-v1/;
/ {
model = "ZynqMP MINI QSPI";
compatible = "xlnx,zynqmp";
#address-cells = <2>;
#size-cells = <1>;
aliases {
serial0 = &dcc;
spi0 = &qspi;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory@0 {
device_type = "memory";
reg = <0x0 0x0 0x40000000>;
};
dcc: dcc {
compatible = "arm,dcc";
status = "disabled";
u-boot,dm-pre-reloc;
};
amba: amba {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <1>;
ranges;
qspi: spi@ff0f0000 {
compatible = "xlnx,zynqmp-qspi-1.0";
status = "disabled";
clock-names = "ref_clk", "pclk";
clocks = <&misc_clk &misc_clk>;
num-cs = <1>;
reg = <0x0 0xff0f0000 0x1000 0x0 0xc0000000 0x8000000>;
#address-cells = <1>;
#size-cells = <0>;
};
misc_clk: misc_clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <125000000>;
};
};
};
&qspi {
status = "okay";
flash0: flash@0 {
compatible = "n25q512a11";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x0>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>;
spi-max-frequency = <10000000>;
partition@qspi-fsbl-uboot { /* for testing purpose */
label = "qspi-fsbl-uboot";
reg = <0x0 0x100000>;
};
partition@qspi-linux { /* for testing purpose */
label = "qspi-linux";
reg = <0x100000 0x500000>;
};
partition@qspi-device-tree { /* for testing purpose */
label = "qspi-device-tree";
reg = <0x600000 0x20000>;
};
partition@qspi-rootfs { /* for testing purpose */
label = "qspi-rootfs";
reg = <0x620000 0x5E0000>;
};
};
};
&dcc {
status = "okay";
};