Describe the QSPI clock in the R8A7792 device tree.
Based on the original (and large) patch by Vladimir Barinov
<vladimir.barinov@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Define the Wheat board dependent part of the SDHI0 (connected to the
micro-SD slot) device node along with the necessary voltage regulator.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Define the Wheat board dependent part of the CAN0/1 device nodes...
Based on the original (and large) patch by Vladimir Barinov
<vladimir.barinov@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
When removing the non-existing thermal clock I forgot to remove its
parent from the node's "clocks" property -- this led to a wrong PWM
clock's parent clock.
Fixes: 2a29f9d6fe ("ARM: dts: r8a7794: add MSTP5 clocks")
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the initial device tree for the RZ/A1 based development board (RSK).
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
R8A7792 SoC doesn't have the EtherMAC core, so SMSC LAN89218 Ethernet
chip was used instead on the Wheat debug board; this chip is compatible
with SMSC LAN9115 for which there's a (device tree aware) driver.
Describe the chip in the Wheat device tree unconditionally (the driver
should fail the probe if the debug board isn't connected); enable DHCP and
NFS root in the command line for the kernel boot...
Based on the original (and large) patch by Vladimir Barinov
<vladimir.barinov@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the initial device tree for the R8A7792 SoC based Wheat board.
The Wheat board itself has no serial ports wired up, the USB serial chips
are situated on a separate debug board and one of them is connected to
SCFI0 -- include unconditional support for it, so that the serial console
can work.
Based on the original (and large) patch by Vladimir Barinov
<vladimir.barinov@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The Orange Pi Plus2E is an extended version of the Orange Pi Pc Plus,
with 2G RAM and an external gbit ethernet phy.
Note currently the dts is pretty much empty (except for including the
pc-plus dts), I've a local patch which enables the emac actually making
this dts different from the pc-plus one, but that needs the h3 emac
driver to get merged first.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Update the sun8i-h3-orangepi-plus.dts model string to reflect that it
is valid for both the Orange Pi Plus and the Orange Pi Plus 2.
This is also meant to help users realize that it is not valid for
the new Orange Pi Plus 2E, which will get its own dts.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add power supply reference for L3G3200D and the 3-axis Electronic
Compass AK8963.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The i2c address of the three-axis digital gyroscope L3G4200D should be
0x69 according to hardware design.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Commit 833f2cbf70 ("ARM: dts: imx6: change the core clock of spdif")
changed many more clocks than only the SPDIF core clock as stated in
the commit message.
The MLB clock has been added and this causes SPDIF regression as
reported by Xavi Drudis Ferran and also in this forum post:
https://forum.digikey.com/thread/34240
The MX6Q Reference Manual does not mention that MLB is a clock related
to SPDIF, so change it back to a dummy clock to restore SPDIF
functionality.
Thanks to Ambika for providing the fix at:
https://community.nxp.com/thread/387131
Fixes: 833f2cbf70 ("ARM: dts: imx6: change the core clock of spdif")
Cc: <stable@vger.kernel.org> # 4.4.x
Reported-by: Xavi Drudis Ferran <xdrudis@tinet.cat>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Tested-by: Xavi Drudis Ferran <xdrudis@tinet.cat>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
WaRP7 has a BCM43430 Bluetooth chip.
Add support for it.
Signed-off-by: Vanessa Maegima <vanessa.maegima@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
IMX6UL GEA M6UL modules are system on module solutions manufactured
by Engicam with following characteristics:
Processor Freescale i.MX 6UltraLite MCIMX6G2, 528 MHz
RAM 128MB, 16-bit DDR3
NAND SLC 256MB
Power supply Single 5V
MAX LCD RES up to WXGA, 1366x768
and more info at
http://www.engicam.com/prodotti/embedded/som/sodimm/gea-m6ul
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Matteo Lisi <matteo.lisi@engicam.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Enable USB OTG port on RK3288 Popmetal board, So we can run
some usb gadget functions like Android adb on this board.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
vreg_boost is Qualcomm platform specific and is also used in hammerhead
device.
Cc: Andy Gross <andy.gross@linaro.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: David Brown <david.brown@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: linux-arm-msm@vger.kernel.org
Cc: linux-soc@vger.kernel.org
Cc: devicetree@vger.kernel.org
Signed-off-by: Bhushan Shah <bshah@kde.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Cc: Andy Gross <andy.gross@linaro.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: David Brown <david.brown@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: linux-arm-msm@vger.kernel.org
Cc: linux-soc@vger.kernel.org
Cc: devicetree@vger.kernel.org
Signed-off-by: Bhushan Shah <bshah@kde.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This adds the PM8058 LEDs as used in the platform.
Cc: linux-arm-msm@vger.kernel.org
Cc: linux-leds@vger.kernel.org
Cc: Andy Gross <andy.gross@linaro.org>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Jacek Anaszewski <j.anaszewski@samsung.com>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Jacek Anaszewski <j.anaszewski@samsung.com>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
TSENS is part of GCC, hence add TSENS properties as part of GCC node.
Also add thermal zones and qfprom nodes.
Update GCC bindings doc to mention the possibility of optional TSENS
properties that can be part of GCC node.
Acked-by: Eduardo Valentin <edubezval@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add the i2c2 and rmi4 nodes to enable the Synaptics touchscreen found in
the Honami.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Merge "mvebu fixes for 4.8 (part 1)" from Gregory CLEMENT:
Few device tree fix on kirkwood:
- enable PCIe on OpenRD
- use correct u-boot environment partition size on ib62x0
* tag 'mvebu-fixes-4.8-2' of git://git.infradead.org/linux-mvebu:
ARM: dts: kirkwood: Fix PCIe label on OpenRD
ARM: kirkwood: ib62x0: fix size of u-boot environment partition
- Remove useless gpio-cells
- Update second parameter by using GPIO_ACTIVE_HIGH/LOW
instead of hardcoded value
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
- Remove useless gpio-cells
- Update second parameter by using GPIO_ACTIVE_HIGH/LOW
instead of hardcoded value
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
This patch allows to use second parameter to the gpio
specifier, which is used to specify whether the gpio is
active high or low.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
B2260 board is the STMicroelectronics 96Board
based on STiH410 soc :
- 1GB DDR
- On-Board USB combo WiFi/Bluetooth RTL8723BU
with PCB soldered antenna
- Ethernet 1000-BaseT
- Sata
- HDMI
- 2 x USB2 type A
- micro USB2 type AB
- SD card slot
- High speed connector (SD/I2C/USB interfaces)
- Slow speed connector (UART/I2C/GPIO/SPI/PCM interfaces)
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
Despite ST AHCI version = 1.3, reading HOST_PORTS_IMPL
returns 0. So force HOST_PORTS_IMPL to 1 by using
ports-implemented DT property.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
On 96board, we can't reuse rgmii1-mdio as the pin pio1 3
( mdint ) is dedicated for user led green 1. So create
rgmii1_mdio_1 for 96board on which only mdio and mdc pins
are useful.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
Due to 96board which uses mmc0 node for SD card, the non-removable
property must be moved from STiH407-family to board file for B2120
and B2199 boards.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
Add missing pin muxing for I2C2 alternate 2. This
i2c2 pin muxing is dedicated for 96board high speed
expansion connector.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
[Lee: Correct spacing between nodes]
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
[Lee: Changed node name and added the unit address]
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
This patch fixes the following DTC warnings:
"Node /memory has a reg or ranges property, but no unit name"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
This patch fixes the following DTC warnings:
"Node /memory has a reg or ranges property, but no unit name"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
This patch fixes the following DTC warnings:
"Node /memory has a reg or ranges property, but no unit name"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
The skeleton.dtsi file was removed in ARM64 for different reasons as
explained in commit ("3ebee5a2e141 arm64: dts: kill skeleton.dtsi").
These also applies to ARM and it will also allow to get rid of the
following DTC warnings in the future:
"Node /memory has a reg or ranges property, but no unit name"
The disassembled DTB are almost the same besides an empty chosen
node being removed and nodes reordered, so it should not have
functional changes.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
The skeleton.dtsi file was removed in ARM64 for different reasons as
explained in commit ("3ebee5a2e141 arm64: dts: kill skeleton.dtsi").
These also applies to ARM and it will also allow to get rid of the
following DTC warnings in the future:
"Node /memory has a reg or ranges property, but no unit name"
The disassembled DTB are almost the same besides an empty chosen
node being removed and nodes reordered, so it should not have
functional changes.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
The skeleton.dtsi file was removed in ARM64 for different reasons as
explained in commit ("3ebee5a2e141 arm64: dts: kill skeleton.dtsi").
These also applies to ARM and it will also allow to get rid of the
following DTC warnings in the future:
"Node /memory has a reg or ranges property, but no unit name"
The disassembled DTB are almost the same besides an empty chosen
node being removed and nodes reordered, so it should not have
functional changes.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
The skeleton.dtsi file was removed in ARM64 for different reasons as
explained in commit ("3ebee5a2e141 arm64: dts: kill skeleton.dtsi").
These also applies to ARM and it will also allow to get rid of the
following DTC warnings in the future:
"Node /memory has a reg or ranges property, but no unit name"
But these boards don't have a memory node defined, so removing the
skeleton.dtsi inclusion in exynos5440.dtsi will cause a change in
the compiled DTB. Add a dummy memory node so the compiled DTB does
not change if the skeleton.dtsi is removed from exynos5440.dtsi.
Eventually the correct starting addresses and sizes should be used
but I didn't find that information.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
FIMC-IS blocks must control 3 more clocks ("gicisp", "mcuctl_isp" and
"pwm_isp") to make the hardware fully operational.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Introduce the message manager node for the A15 queues on which Linux
runs. The Message Manager is primarily used for communication with
Power Management controller on K2G.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
Add the DSP GPIO controller node on K2G SoC.
This is used to send interrupts to the only DSP processor
subsystem present on the SoC. The IP is identical to that
of the equivalent nodes on existing K2 SoCs.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
Add the Keystone IRQ controller IP node on K2G SoC. This allows the
ARM CorePac core to receive interrupts from remote processor devices
(eg: DSP) on the SoC.
The IP is identical in functionality to that of the equivalent
nodes on existing K2 SoCs. The only difference is the ARM INTC
interrupt id/event number.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
Add the device state controller node as a syscon node to the
K2G SoC. This module provides similar device control functionality
as that on the existing K2 SoCs.
One example usage would be the boot address programming of the
DSP processor sub-system.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
The USB OTG mode is not supported by Kestone 2 devices, as result, the
USB devices enumeration and detection will not work properly when
kernel is built with CONFIG_USB_DWC3_DUAL_ROLE=y (default for multi
platform build):
- it's required to load gadget drivers manually to make host mode
work and this confuses current Keystone 2 users
- device mode is not working, because port can't detect and switch to
peripheral/host mode dynamically.
Hence, specify usb mode explicitly in DT: usb0 = "host" for all KS2
devices and usb1 = "peripheral" for K2E.
Cc: Sekhar Nori <nsekhar@ti.com>
Cc: Roger Quadros <rogerq@ti.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
This patch fixes the following DTC warnings:
"Node /memory has a reg or ranges property, but no unit name"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings:
"Node /memory has a reg or ranges property, but no unit name"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings:
"Node /memory has a reg or ranges property, but no unit name"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings:
"Node /memory has a reg or ranges property, but no unit name"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings:
"Node /memory has a reg or ranges property, but no unit name"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings:
"Node /memory has a reg or ranges property, but no unit name"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings:
"Node /memory has a reg or ranges property, but no unit name"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings:
"Node /memory has a reg or ranges property, but no unit name"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings:
"Node /memory has a reg or ranges property, but no unit name"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings:
"Node /memory has a reg or ranges property, but no unit name"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings:
"Node /memory has a reg or ranges property, but no unit name"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings:
"Node /memory has a reg or ranges property, but no unit name"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The skeleton.dtsi file was removed in ARM64 for different reasons as
explained in commit ("3ebee5a2e141 arm64: dts: kill skeleton.dtsi").
These also applies to ARM and it will also allow to get rid of the
following DTC warnings in the future:
"Node /memory has a reg or ranges property, but no unit name"
The disassembled DTB are almost the same besides an empty chosen
node being removed and nodes reordered, so it shouldn't have
functional changes.
Since no am4372 based board had a memory node defined, a dummy node
is added so the compiled DTB memory node is the same than before.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The skeleton.dtsi file was removed in ARM64 for different reasons as
explained in commit ("3ebee5a2e141 arm64: dts: kill skeleton.dtsi").
These also applies to ARM and it will also allow to get rid of the
following DTC warnings in the future:
"Node /memory has a reg or ranges property, but no unit name"
The disassembled DTB are almost the same besides an empty chosen
node being removed and nodes reordered, so it should not have
functional changes.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The skeleton.dtsi file was removed in ARM64 for different reasons as
explained in commit ("3ebee5a2e141 arm64: dts: kill skeleton.dtsi").
These also applies to ARM and it will also allow to get rid of the
following DTC warnings in the future:
"Node /memory has a reg or ranges property, but no unit name"
The disassembled DTB are almost the same besides an empty chosen
node being removed and nodes reordered, so it should not have
functional changes.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The skeleton.dtsi file was removed in ARM64 for different reasons as
explained in commit ("3ebee5a2e141 arm64: dts: kill skeleton.dtsi").
These also applies to ARM and it will also allow to get rid of the
following DTC warnings in the future:
"Node /memory has a reg or ranges property, but no unit name"
The disassembled DTB are almost the same besides an empty chosen
node being removed and nodes reordered, so it should not have
functional changes.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The skeleton.dtsi file was removed in ARM64 for different reasons as
explained in commit ("3ebee5a2e141 arm64: dts: kill skeleton.dtsi").
These also applies to ARM and it will also allow to get rid of the
following DTC warnings in the future:
"Node /memory has a reg or ranges property, but no unit name"
The disassembled DTB are almost the same besides an empty chosen
node being removed and nodes reordered, so it should not have
functional changes.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The skeleton.dtsi file was removed in ARM64 for different reasons as
explained in commit ("3ebee5a2e141 arm64: dts: kill skeleton.dtsi").
These also applies to ARM and it will also allow to get rid of the
following DTC warnings in the future:
"Node /memory has a reg or ranges property, but no unit name"
The disassembled DTB are almost the same besides an empty chosen
node being removed and nodes reordered, so it should not have
functional changes.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The skeleton.dtsi file was removed in ARM64 for different reasons as
explained in commit ("3ebee5a2e141 arm64: dts: kill skeleton.dtsi").
These also applies to ARM and it will also allow to get rid of the
following DTC warnings in the future:
"Node /memory has a reg or ranges property, but no unit name"
The disassembled DTB are almost the same besides an empty chosen
node being removed and nodes reordered, so it should not have
functional changes.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The skeleton.dtsi file was removed in ARM64 for different reasons as
explained in commit ("3ebee5a2e141 arm64: dts: kill skeleton.dtsi").
These also applies to ARM and it will also allow to get rid of the
following DTC warnings in the future:
"Node /memory has a reg or ranges property, but no unit name"
The disassembled DTB are almost the same besides an empty chosen
node being removed and nodes reordered, so it should not have
functional changes.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The skeleton.dtsi file was removed in ARM64 for different reasons as
explained in commit ("3ebee5a2e141 arm64: dts: kill skeleton.dtsi").
These also applies to ARM and it will also allow to get rid of the
following DTC warnings in the future:
"Node /memory has a reg or ranges property, but no unit name"
The disassembled DTB are almost the same besides an empty chosen
node being removed and nodes reordered, so it should not have
functional changes.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The skeleton.dtsi file was removed in ARM64 for different reasons as
explained in commit ("3ebee5a2e141 arm64: dts: kill skeleton.dtsi").
These also applies to ARM and it will also allow to get rid of the
following DTC warnings in the future:
"Node /memory has a reg or ranges property, but no unit name"
But these boards don't have a memory node defined, so removing the
skeleton.dtsi inclusion from omap3.dtsi will cause a change in the
compiled DTB. Add a dummy memory node so the compiled DTB doesn't
change if the skeleton.dtsi is removed from omap3.dtsi.
Eventually the correct starting addresses and sizes should be used
but I didn't find that information.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The skeleton.dtsi file was removed in ARM64 for different reasons as
explained in commit ("3ebee5a2e141 arm64: dts: kill skeleton.dtsi").
These also applies to ARM and it will also allow to get rid of the
following DTC warnings in the future:
"Node /memory has a reg or ranges property, but no unit name"
But the sl50 board doesn't have a, so removing the skeleton.dtsi
inclusion from am33xx.dtsi will cause a change in the compiled DTB.
The board has 512 MiB of RAM and its starting address is 0x80000000,
so add a proper memory device node in the DTS.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Current clocks tree definition for CPSW/CPTS doesn't
correspond TRM for dra7/am57 SoCs.
CPTS: has to be sourced from gmac_rft_clk_mux clock
CPSW: DPLL_GMAC -> CLKOUT_M2 -> GMAC_250M_CLK -> 1/2 ->
-> GMAC_MAIN_CLK (125 MHZ)
Hence, correct clock tree for GMAC_MAIN_CLK and use proper
clock for CPTS. This also require updating of CPTS clock
multiplier.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit fixes the clock data inside the DRA7xx clocks device tree
structure for the gmac_gmii_ref_clk_div clock. This clock is actually
the GMAC_MAIN_CLK and has nothing to do with the register at address
0x4a0093d0. If CLKSEL_REF bit 24 inside of CM_GMAC_GMAC_CLKCTRL, is
set to 1 in order to use the GMAC_RMII_CLK instead of the
GMAC_RMII_HS_CLK, the kernel generates a clock divider warning:
WARNING: CPU: 0 PID: 0 at drivers/clk/clk-divider.c:129 clk_divider_recalc_rate+0xa8/0xe0()
gmac_gmii_ref_clk_div: Zero divisor and CLK_DIVIDER_ALLOW_ZERO not set
By properly configuring the gmac_gmii_ref_clk_div (GMAC_MAIN_CLK) to
have the parent of dpll_gmac_m2_ck always divided by 2 the warning is
resolved and the clock tree is fixed up.
Additionally, a new clock called rmii_50mhz_clk_mux is defined that
does utilize CM_GMAC_GMAC_CLKCTRL[24] CLKSEL_REF to configure the
source clock for the RMII_50MHZ_CLK.
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: J.D. Schroeder <jay.schroeder@garmin.com>
Reviewed-by: Trenton Andres <trenton.andres@garmin.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The Integrator/CP CLCD VGA display can now be registered
fully from the device tree. Delete the board file code and
add the display definition to the DTS.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds the clocks on the core module to the Integrator/AP
board: a 24MHz chrystal, and two special-purpose ICST525
dividers, one used to clock the CPU core and another auxilary
oscillator.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The two clocks present on the Integrator/AP baseboard and
accessible through its system controller is the PCIv3 bridge
clock and the PCI bus clock. Define the proper device tree
nodes for these.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* GPIO for HDMI hot plug detect
GPX3_7 is used. The HPD awareness is done when the GPIO is active high.
* Enable HDMI block in Exynos5420
HDMI VDD and PLL consume 1.0V LDO6 (PVDD_ANAIP_1V0) and HDMI oscillator
requires 1.8V LDO7 (PVDD_ANAIP_1V8).
* Support HDMI display data channel
I2C #2 is assigned for the HDMI DDC. It enables the EDID access.
Cc: Kukjin Kim <kgene@kernel.org>
Cc: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-samsung-soc@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Milo Kim <woogyom.kim@gmail.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
The UniPhier reset controller driver has been merged. Enable it.
Also, replace the fixed-rate clocks with the dedicated clock
drivers.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Since DRA7 has multiple PCIe Rootcomplex, add "linux,pci-domain"
property to assign a PCI domain number to each of the host
bridges.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
AM335x ICE board has a rotary-switch connected to PCA9536 I2C GPIO
expander. The position of the rotary-switch is reflected by status of
GPIO lines. Add gpio-decoder node to read these GPIO line status via
gpio-decoder driver and report it as an input event to the system.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
All UniPhier device trees have the common prefix "uniphier-", so
"ph1-" is just making names longer. Recent documents and other
projects are not using PH1- prefixes any more.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Colibri modules need to be powered using the power pins 3V3 and
AVDD_AUDIO. Add fixed regulators which represent this power rails.
Potentially, those power rails could be switched on a carrier
board. A carrier board device tree could add a own regulator with
a GPIO, and reference that regulator in a vin-supply property of
those new module level system regulators. This also synchronize
the name of the +3.3V regulator with the one used in the Colibri
VF50/VF61 device tree.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Move SD-card definition to module level. While at it, also disable
write-protect since the Colibri standard does not define a pin for
SD-Card write-protection.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Fix misspelled "ti,x-plate-ohms" property name of TI TSC2046
touchscreen controller.
Fixes: d09e6beafa ("ARM: dts: imx7d-sdb: Add support for touchscreen")
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add bindings for the Vivante GC400T GPU found in the i.MX6SX.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The SPI controller in the arch/arm/boot/dts/armada-39x.dtsi file has moved
to a different location in the hierarchy, which breaks the overrides
in the board specific file:
Warning (reg_format): "reg" property in /soc/internal-regs/spi@10680/spi-flash@1 has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
Warning (avoid_default_addr_size): Relying on default #address-cells value for /soc/internal-regs/spi@10680/spi-flash@1
This changes the board to reference the spi controller by its label
(which has not changed) rather than the full path.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fixes: 0160a4b689 ("ARM: dts: mvebu: A37x/XP/38x/39x: Move SPI controller nodes into 'soc' node")
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
imx6ul-pico has WDOG1_B pin connected to the PMIC.
Pass the 'fsl,ext-reset-output' property so that the watchdog
can trigger a system POR reset via PMIC.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
At power on, pca953x GPIO pins are configured as input and may cause
unexpected interrupts. Configure the unused pins as GPO low to
avoid unexpected interrupts.
Signed-off-by: Ken Lin <ken.lin@advantech.com.tw>
Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Configure the DWMAC FIFO sizes, burst length and threshold DMA mode on
LPC18xx/43xx SoCs. These parameters are needed for correct operation of
the Ethernet MAC. The DWMAC on LPC18xx/43xx does not support RSF DMA
mode and therefore must use threshold mode.
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
The 'compatible = "nxp,jc42"' binding only happened to work because
the Linux driver is named jc42. The driver now supports generic
bindings for JC-42 compatible chips, so use the generic binding instead.
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
The inet-d978_rev2 is a pcb used in generic A33 based tablets. It features
volume buttons, micro-usb otg, headphone connector and a power button.
On the board a Realtek RTL8723BS SDIO Wi-Fi module are soldered, and there
is also a accompanied board which has a Goodix GT9271 soldered.
As this board is desired to create tablets with a Home key dealed by
GT9271, a LED is present at the front panel at the position of the
Home key.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The R_PIO device node is missing #interrupt-cells, which causes
interrupt parsing to fail to match it as a valid interrupt controller.
Add #interrupt-cells to it. Also remove the unnecesary #address-cells
and #size-cells.
Fixes: 1ac56a6da9 ("ARM: dts: sun9i: Add A80 R_PIO pin controller device
node")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Rename the reference-design-tablet touchscreen node from gsl1680 to
touchscreen, all? tablets seem to use the same power and interrupt
gpio-s, but not all tablets use a gsl1680 controller making the
gsl1680 name somewhat misleading.
Also move the reg and compatible property to the actual tablet dts
as they may differ per tablet.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add a dts file for the Empire Electronix M712 tablet, this is a 7" A13
tablet, with micro-usb (otg), headphone and micro-sd slots on the
outside. It uses a Goodix gt811 touchscreen controller, a RTL8188CTV
wifi chip and a DMART06 (1238a4) accelerometer.
Note currently the dts for this is somewhat empty. This will change
once we add support for the touchscreen and accelerometer.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The ehci1/ohci1 pair on the ba10-tv-box is connected to an USB-2 wifi
module soldered on the PCB, so there enabling ohci1 is not necessary.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The polaroid-mid2809 tablet has an esp8089 wifi chip,
add a dt node describing it.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The polaroid-mid2407 tablet has an esp8089 wifi chip,
add a dt node describing it.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Silicon limitation i845 documents how to cope with false
disconnection condition on USB2 PHY. Reference: AM572x
silicon errata document SPRZ429H, revised January 2016.
Using compatible "ti,dra7x-usb2" enables the recommended
software workaround for this issue. Use it for USB1 PHY.
The workaround is already in place for USB2 PHY.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The wega board has a TLV320AIC3007 connected via McASP0. In the default
configuration, no external crystal is mounted. We run a system clock of
25 MHz, so we use the audio codec PLL for audio clock generation.
Signed-off-by: Stefan Müller-Klieser <s.mueller-klieser@phytec.de>
Reviewed-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
AM572x IDK has a Spansion s25fl256s1 QSPI flash on the EVM connected to
TI QSPI IP over CS0. Hence, add QSPI and flash slave DT nodes.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
According to AM572x DM SPRS953A, QSPI maximum bus speed can be 76.8MHz.
Therefore, increase the spi-max-frequency value of QSPI node to 76.8MHz
for DRA74 and DRA72 evm. This improves flash raw read speed by ~2MB/s.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
With the device tree parsing using the regulator framework
there is a no longer a need for separate compatibles for
individual regulator nodes. Hence removing them all.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
With the device tree parsing using the regulator framework
there is a no longer a need for separate compatibles for
individual regulator nodes. Hence removing them all.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
With the device tree parsing using the regulator framework
there is a no longer a need for separate compatibles for
individual regulator nodes. Hence removing them all.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
With the device tree parsing using the regulator framework
there is a no longer a need for separate compatibles for
individual regulator nodes. Hence removing them all.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Without this, the memory will remain active during poweroff consuming
extra power. Please note revision 2.1 PMIC seems to fail when DCDC3
disable is attempted, so this is not done on that PMIC revision. The
PMIC revision checks in the regulator patches make sure of this.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Without this, the memory will remain active during poweroff consuming
extra power.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
dcdc3, dcdc5, dcdc6 supply ddr and rtc respectively. These
are required to be on during suspend. Hence set the state accordingly.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add support for the general purpose LEDs on the Blanche board.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add pin control information for the NAND flash interface. This interface
is multiplexed with the device bus interface to the function is "dev"
not "nand" as one might expect.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
While converting PCIe node on kirkwood by using label, the following
commit eb13cf8345 ("ARM: dts: kirkwood: Fixup pcie DT warnings")
introduced a regression on the OpenRD boards: the PCIe didn't work
anymore. As reported by Aaro Koskinen, the display/framebuffer was
lost. This commit adds the forgotten label.
Reported-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Tested-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Fixes: eb13cf8345 ("ARM: dts: kirkwood: Fixup pcie DT warnings")
Cc: stable@vger.kernel.org
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Commit 148c274ea6 ("ARM: kirkwood: ib62x0: add u-boot environment
partition") split the "u-boot" partition into "u-boot" and "u-boot
environment". However, instead of the size of the environment, an offset
was given, resulting in overlapping partitions.
Signed-off-by: Simon Baatz <gmbnomis@gmail.com>
Fixes: 148c274ea6 ("ARM: kirkwood: ib62x0: add u-boot environment partition")
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <gregory.clement@free-electrons.com>
Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Cc: Luka Perkov <luka@openwrt.org>
Cc: stable@vger.kernel.org # 3.13+
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
By assigning the pin hog to the pinctrl node, we correctly configure the
MPPs. However, they are not available to userspace.
Fix this by assigning the hogs to the gpio node.
After this, the following works as expected:
# echo 28 >/sys/class/gpio/export
# echo low >/sys/class/gpio/gpio28/direction
[gregory.clement@free-electrons.com: fix title]
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The ARM GIC only supports interrupts with either level-high or
rising-edge types for SPIs. The interrupt type for the Palmas PMIC used
for Tegra114 boards is specified as level-low which is invalid for the
GIC. This has gone undetected because until recently, failures to set
the interrupt type when the interrupts are mapped via firmware (such as
device-tree) have not been reported. Since commits 4b357daed6
("genirq: Look-up trigger type if not specified by caller") and
1e2a7d7849 ("irqdomain: Don't set type when mapping an IRQ"), failure
to set the interrupt type will cause the requesting of the interrupt to
fail and exposing incorrectly configured interrupts.
Please note that although the interrupt type was never being set for the
Palmas PMIC, it was still working fine, because the default type setting
for the interrupt, 'level-high', happen to match the correct type for
the interrupt.
Finally, it should be noted that the Palmas interrupt from the PMIC is
actually 'level-low', however, this interrupt signal is inverted by the
Tegra PMC and so the GIC actually sees a 'level-high' interrupt which is
what should be specified in the device-tree interrupt specifier.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
1. Select proper eMMC HighSpeed mode on Odroid XU. DTS was mixing
"samsung,exynos5250-dw-mshc" compatible (with HS200 as fastest mode)
with a property "mmc-hs400-1_8v" thus leading to failures during
probe.
2. Update Krzysztof Kozlowski's email address in maintainers.
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Merge tag 'samsung-fixes-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into fixes
Fix for v4.8-rc1:
1. Select proper eMMC HighSpeed mode on Odroid XU. DTS was mixing
"samsung,exynos5250-dw-mshc" compatible (with HS200 as fastest mode)
with a property "mmc-hs400-1_8v" thus leading to failures during
probe.
2. Update Krzysztof Kozlowski's email address in maintainers.
* tag 'samsung-fixes-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
MAINTAINERS: Switch to kernel.org account for Krzysztof Kozlowski
ARM: dts: exynos: Properly select eMMC HighSpeed mode on Odroid XU
Signed-off-by: Olof Johansson <olof@lixom.net>
- Fix typo in imx6sx-sabreauto board wakeup property
- Fix i.MX6UL suspend-to-standby support by adding the
BM_CLPCR_BYP_MMDC_CH0_LPM_HS handling
- Fix a i.MX6UL regression on suspend support, which is caused by
commit 850bea2335 ("arm: Remove unnecessary of_platform_populate
with default match table")
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Merge tag 'imx-fixes-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes
The i.MX fixes for 4.8:
- Fix typo in imx6sx-sabreauto board wakeup property
- Fix i.MX6UL suspend-to-standby support by adding the
BM_CLPCR_BYP_MMDC_CH0_LPM_HS handling
- Fix a i.MX6UL regression on suspend support, which is caused by
commit 850bea2335 ("arm: Remove unnecessary of_platform_populate
with default match table")
* tag 'imx-fixes-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx6ul: populates platform device at .init_machine
ARM: imx6: add missing BM_CLPCR_BYP_MMDC_CH0_LPM_HS setting for imx6ul
ARM: dts: imx6sx-sabreauto: Fix misspelled property
Signed-off-by: Olof Johansson <olof@lixom.net>
am335x RTC zero offset for clkctrl register. Also few other fixes:
- Add missing sysc information for DSI as at least n950 needs it for
the working display
- Fix old elm-id properties that cause nand boot to not work
- Fix overo gpmc nand cs0 range
- FIx overo gpmc nand on boards with ethernet
- Fix logicpd torpedo nand ready pin nand interrupt configuration
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Merge tag 'omap-for-v4.8/fixes-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Fixes for omaps for v4.8-rc cycle, mostly a series of four fixes for
am335x RTC zero offset for clkctrl register. Also few other fixes:
- Add missing sysc information for DSI as at least n950 needs it for
the working display
- Fix old elm-id properties that cause nand boot to not work
- Fix overo gpmc nand cs0 range
- FIx overo gpmc nand on boards with ethernet
- Fix logicpd torpedo nand ready pin nand interrupt configuration
* tag 'omap-for-v4.8/fixes-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: logicpd-somlv: Fix NAND device nodes
ARM: dts: logicpd-torpedo-som: Provide NAND ready pin
ARM: dts: overo: fix gpmc nand on boards with ethernet
ARM: dts: overo: fix gpmc nand cs0 range
ARM: dts: am335x: Update elm phandle binding
ARM: OMAP4+: CM: Remove redundant checks for clkctrl_offs of zero
ARM: OMAP4+: Have _omap4_wait_target_* check for valid clkctrl_offs
ARM: OMAP2+: AM33XX: Add HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET flag to rtc hwmod
ARM: OMAP4+: hwmod: Add hwmod flag for HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET
ARM: OMAP3: hwmod data: Add sysc information for DSI
Signed-off-by: Olof Johansson <olof@lixom.net>
Fix lan numbering for the Armada 388 clearfog board
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Merge tag 'mvebu-fixes-4.8-1' of git://git.infradead.org/linux-mvebu into fixes
mvebu fixes for 4.8 (part 1)
Fix lan numbering for the Armada 388 clearfog board
* tag 'mvebu-fixes-4.8-1' of git://git.infradead.org/linux-mvebu:
ARM: dts: armada-388-clearfog: number LAN ports properly
Signed-off-by: Olof Johansson <olof@lixom.net>
A23/A33 has a NAND controller which can now be used properly.
Add a device node for it.
The DMA function cannot work because of changed DMA IP block, so it's
temporarily removed in the device node. However, with PIO mode it can still
work.
Tested on an Aoson M751s tablet with Boris Brezillon's "mtd: nand: allow
vendor specific detection/initialization" patchset, which is needed for the
large-block MLC chip to be recognized correctly.
( http://lists.infradead.org/pipermail/linux-mtd/2016-June/068198.html )
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The Raspberry Pi Zero is a minified version of model A+. It's
notable there is no PWR LED and the ACT LED is inverted.
Additionally the Pi Zero is capable of the USB peripheral mode.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
In case dr_mode isn't passed via DT, the dwc2 defaults to OTG mode.
But all Raspberry Pi boards here are designed only for host mode.
So fix this issue by providing a dtsi file which set the dr_mode
to host.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
According to the DWC2 binding an appropriate clock is required.
This clock isn't handled by bcm2835 clock driver, so add a fixed
clock to the bcm283x DT.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
This patch enables getting a HPD GPIO descriptor quicker.
The exynos-hdmi driver uses "hpd" for HDMI hot plug detection.
static int hdmi_resources_init(struct hdmi_context *hdata)
{
...
hdata->hpd_gpio = devm_gpiod_get(dev, "hpd", GPIOD_IN);
...
}
This calls 'of_find_gpio()' and it generates the GPIO consumer ID by referring
GPIO suffix. So 'hpd-gpios' is preferred on getting a GPIO descriptor.
However, if the device tree uses 'hpd-gpio', then the exynos-hdmi driver
always retries to get a GPIO descriptor because the first GPIO suffix is not
'gpio' but 'gpios'. So you always see the debug message below.
of_get_named_gpiod_flags: can't parse 'hpd-gpios' property of node '/soc/hdmi@14530000[0]'
Use the preferred property, 'hpd-gpios' instead of 'hpd-gpio'.
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
Cc: devicetree@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-samsung-soc@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Milo Kim <woogyom.kim@gmail.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
This patch adds #reset-cells property to rcc node.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
This patch add the IMEM syscon memory region to the DT,
as well as addds support for the magic reboot reason
values that are written to the address for each mode.
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Andy Gross <agross@codeaurora.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Stephen Boyd <stephen.boyd@linaro.org>
Cc: linux-arm-msm@vger.kernel.org
Cc: devicetree@vger.kernel.org
Signed-off-by: John Stultz <john.stultz@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The Qualcomm SPMI GPIO and MPP lines are problematic: the
are fetched from the main MFD driver with platform_get_irq()
which means that at this point they will all be assigned the
flags set up for the interrupts in the device tree.
That is problematic since these are flagged as rising edge
and an this point the interrupt descriptor is assigned a
rising edge, while the only thing the GPIO/MPP drivers really
do is issue irq_get_irqchip_state() on the line to read it
out and to provide a .to_irq() helper for *other* IRQ
consumers.
If another device tree node tries to flag the same IRQ
for use as something else than rising edge, the kernel
irqdomain core will protest like this:
type mismatch, failed to map hwirq-NN for <FOO>!
Which is what happens when the device tree defines two
contradictory flags for the same interrupt line.
To work around this and alleviate the problem, assign 0
as flag for the interrupts taken by the PM GPIO and MPP
drivers. This will lead to the flag being unset, and a
second consumer requesting rising, falling, both or level
interrupts will be respected. This is what the qcom-pm*.dtsi
files already do.
Switched to using the symbolic name IRQ_TYPE_NONE so that
we get this more readable.
This misconfiguration was caused by a copy/pasting the
APQ8064 set-up, the latter has been fixed in a separate
patch.
Tested with one of the SPMI GPIOs: after this I can
successfully request one of these GPIOs as falling edge
from the device tree.
Fixes: 0840ea9e44 ("ARM: dts: add GPIO and MPP to MSM8660 PMIC")
Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Björn Andersson <bjorn.andersson@linaro.org>
Cc: Ivan T. Ivanov <ivan.ivanov@linaro.org>
Cc: John Stultz <john.stultz@linaro.org>
Cc: Andy Gross <andy.gross@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The Qualcomm PMIC GPIO and MPP lines are problematic: the
are fetched from the main MFD driver with platform_get_irq()
which means that at this point they will all be assigned the
flags set up for the interrupts in the device tree.
That is problematic since these are flagged as rising edge
and an this point the interrupt descriptor is assigned a
rising edge, while the only thing the GPIO/MPP drivers really
do is issue irq_get_irqchip_state() on the line to read it
out and to provide a .to_irq() helper for *other* IRQ
consumers.
If another device tree node tries to flag the same IRQ
for use as something else than rising edge, the kernel
irqdomain core will protest like this:
type mismatch, failed to map hwirq-NN for <FOO>!
Which is what happens when the device tree defines two
contradictory flags for the same interrupt line.
To work around this and alleviate the problem, assign 0
as flag for the interrupts taken by the PM GPIO and MPP
drivers. This will lead to the flag being unset, and a
second consumer requesting rising, falling, both or level
interrupts will be respected. This is what the qcom-pm*.dtsi
files already do.
Switched to using the symbolic name IRQ_TYPE_NONE so that
we get this more readable.
Cc: stable@vger.kernel.org
Fixes: bce3604696 ("ARM: dts: apq8064: add pm8921 mpp support")
Fixes: 874443fe9e ("ARM: dts: apq8064: Add pm8921 mfd and its gpio node")
Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Björn Andersson <bjorn.andersson@linaro.org>
Cc: Ivan T. Ivanov <ivan.ivanov@linaro.org>
Cc: John Stultz <john.stultz@linaro.org>
Cc: Andy Gross <andy.gross@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This introduces the gpio-keys node for keys of hammerhead and pinctrl
state associated with it.
Cc: Andy Gross <andy.gross@linaro.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: David Brown <david.brown@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: linux-arm-msm@vger.kernel.org
Cc: linux-soc@vger.kernel.org
Cc: devicetree@vger.kernel.org
Signed-off-by: Bhushan Shah <bshah@kde.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Cc: Andy Gross <andy.gross@linaro.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: David Brown <david.brown@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: linux-arm-msm@vger.kernel.org
Cc: linux-soc@vger.kernel.org
Cc: devicetree@vger.kernel.org
Signed-off-by: Bhushan Shah <bshah@kde.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This DTS file have support LG Nexus 5 (codenamed hammerhead).
Initial version have support for just serial console over headphone
jack.
Cc: Andy Gross <andy.gross@linaro.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: David Brown <david.brown@linaro.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Russell King <linux@armlinux.org.uk>
Cc: devicetree@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-arm-msm@vger.kernel.org
Signed-off-by: Bhushan Shah <bshah@kde.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
AP148 has a SATA port, but no entity to populate the AHCI
Port Implemented register, so force this in DT.
Signed-off-by: Thomas Pedersen <twp@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This serial port is used by LG Nexus 5 (codenammed hammerhead).
Cc: Andy Gross <andy.gross@linaro.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: David Brown <david.brown@linaro.org>
Cc: Stephen Boyd <stephen.boyd@linaro.org>
Cc: linux-arm-msm@vger.kernel.org
Cc: devicetree@vger.kernel.org
Signed-off-by: Bhushan Shah <bshah@kde.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Most 8064 devices have micro-usb ports for phy1, so setting
the dr_mode to host here seems incorrect.
Leaving it unspecified should default to otg, and then
any boards that wish to specify something else, can
override it in their dts file.
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Andy Gross <agross@codeaurora.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Stephen Boyd <stephen.boyd@linaro.org>
Cc: linux-arm-msm@vger.kernel.org
Cc: devicetree@vger.kernel.org
Signed-off-by: John Stultz <john.stultz@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
In order to have the usb phy work in gadget mode, override
the default host mode with otg mode.
This allows gadget mode to work w/o any hacks to the dtsi file.
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Andy Gross <agross@codeaurora.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Stephen Boyd <stephen.boyd@linaro.org>
Cc: linux-arm-msm@vger.kernel.org
Cc: devicetree@vger.kernel.org
Signed-off-by: John Stultz <john.stultz@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
SARADC controller needs to be reset before programming it, otherwise
it will not function properly.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Cc: <Stable@vger.kernel.org>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
Describe 3 instances (VSPS, VSPD0, and VSPD1) of the VSP1V in the R8A7792
device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Describe the VSP1V clocks in the R8A7792 device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Define the Blanche board dependent part of the DU device node.
Add the device nodes for the Analog Devices ADV7511W HDMI transmitter
(connected to DU0) and ADV7123 video DAC (connected to DU1). Add the
necessary subnodes to interconnect DU, HDMI/VDAC devices, and HDMI/VGA
connectors.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Define the Blanche board dependent part of the SDHI0 (connected to the
micro-SD slot) device node along with the necessary voltage regulator.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a dts file for tablets using the generic inet-q972 PCB.
Tablets with this PCB feature a mini-hdmi output, micro-usb usb-host,
micro-usb usb-otg, 3.5mm headphone jack, a micro sd slot,
(mini) power-barrel and an usb wifi module.
This has been tested on a 9.7" 1024x768 qware qw tb9718-qhd tablet.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Just like with a13/a23/a33 most a31 tablets are derived from the same
reference design. Add a .dtsi file with all the common bits to avoid
endless copy and pasting of these.
The sun6i-reference-design-tablet.dtsi this commit adds is a copy
of sun6i-a31s-colorfly-e708-q1.dts with a few tablet specific bits
removed / left in sun6i-a31s-colorfly-e708-q1.dts.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The presence of the mma8452_int_e708_q1 node is a copy and paste
error, remove it.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The 32.768 kHz clock inside the A80 SoC is fed from an external source,
typically the AC100 RTC module.
Make the osc32k placeholder a fixed-factor clock so board dts files can
specify its source.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Set cpu_alert0 temperature to 85°C instead of 850°C.
Fixes: 32a5d2d170 ("ARM: dts: sun5i: Add cpu thermal zones to dtsi")
Signed-off-by: Hugo Grostabussiat <bonstra@bonstra.fr.eu.org>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Almost all sun8i tablets use a gsl1680 touchscreen controller, so add
a node describing it to reference-design-tablet.dtsi.
Almost all, but not all, so mark it as disabled by default (dts files
will also need to supply a firmware-name and resolution info).
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The ga10h tablet has a rtl8703as wifi chip, add a dt node describing it.
This enables usage of wifi on this tablet (together with the out of
tree rtl8732bs driver).
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This results in quite a nice cleanup for this dts file.
As an added bonus this also enables full otg support. I've tested that
this works as advertised.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The Orange Pi Lite SBC is a small H3 based SBC, with 512MB RAM,
micro-sd slot, HDMI out, 2 USB-A connectors, 1 micro-USB connector,
sdio attached rtl8189ftv wifi and an ir receiver.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
A33-OLinuXino is A33 development board designed by Olimex LTD.
It has AXP223 PMU, 1GB DRAM, a micro SD card, one USB-OTG connector,
headphone and mic jacks, connector for LiPo battery and optional
4GB NAND Flash.
It has two 40-pin headers. One for LCD panel, and one for
additional modules. Also there is CSI/DSI connector.
Signed-off-by: Stefan Mavrodiev <stefan.mavrodiev@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The CHIP has a status LED connected to one of the AXP GPIOs. Add the
gpio-leds node to be able to use the proper LED framework to control it.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add the AXP209 GPIO node to our AXP209 DTSI so that boards can use it.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Add support for the general purpose software switches SW2 and tactile
switches SW24/25 as a virtual keyboard (like it was done with the Lager/
Koelsch boards).
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The LCDK embeds a TLV320AIC3106 connected to the SoC McASP for analog
audio. The power supply of the codec comes from the main PMIC
(TPS650250) DCDCs which are always on per HW design and not
controllable by SW, so SW wise the codec driver will rely on the 'dummy'
regulator.
Quality is good with arecord -pipe- aplay on Line In/Line Out.
Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Karl Beldan <kbeldan@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
The "linux,stdout-path" is deprecated.
Add serial options so the console can be properly configured when
bootloader does not pass "console" parameter to the command line. Without
options and lack of "console" in command line, the serial output dies
during boot (just after probing sound, probably because of rate change).
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
There are many regulators are missed in previous commit, this
commit complete most of them. It also fix some mistakes in the
regulator properties. The VDD_10(REG10) and VCC_18(REG11) had better
to keep in always-on state, as it is used as the USB PHY supply,
corretly we have no way to assign power supply to a USB PHY.
The VCCA_33(REG8) should be enabled or the GMAC won't work.
It also fix the wrong properties for audio in io-domains, the supply
connected to APIO4_VDD is different to firefly release version.
Signed-off-by: Randy Li <ayaka@soulik.info>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Because of a bug in hardware design, the sdcard at firefly
rk3288 reload board can't switch the io voltage level to 1.8v.
Signed-off-by: Randy Li <ayaka@soulik.info>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Currently the davinci da8xx boards use the mach-davinci aemif code.
Instantiating an aemif node into the DT allows to use the ti-aemif
memory driver and is another step to better DT support.
This change adds an aemif node in the dtsi while retiring the nand_cs3
node. The NAND is now instantiated in the dts as a subnode of the aemif
one along with its pins.
Signed-off-by: Karl Beldan <kbeldan@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
imx7s-warpd has WDOG1_B pin connected to the PMIC.
Pass the 'fsl,ext-reset-output' property so that the watchdog
can trigger a system POR reset via the PMIC.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Warp7 has a BCM43430 Wifi chip connected to the USDHC1 port.
Add support for it.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
warp7 has a sgtl5000 audio codec.
Add support for it.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Only i.MX 7Dual SoC supports CPU frequencies of up to 1GHz. The i.MX
7Solo can run with up to 800MHz and does so without making use of DVFS
usually. While the device tree clearly specified a too fast operating
point for i.MX 7Solo, the kernel did not used it in practise so far
because the CPUfreq driver does not get loaded on i.MX 7Solo devices
(since the fsl,imx7s compatible string is not in the list of devices
making use of the cpufreq-dt driver...).
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
As of commit 5aa2eb3c86 ("[media] v4l: vsp1: Configure device
based on IP version"), the DT properties to identify the exact VSP
device instance features are no longer used. Hence remove them.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
As of commit 5aa2eb3c86 ("[media] v4l: vsp1: Configure device
based on IP version"), the DT properties to identify the exact VSP
device instance features are no longer used. Hence remove them.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Define the Alt board dependent part of the MMCIF device node.
Like the Silk the board has eMMC chip along with the necessary voltage
regulator (note that the Vcc/Vccq regulator is dummy -- it's required by
the MMCIF driver but doesn't actually exist on the board).
Based on work for the Silk board by Vladimir Barinov and Sergei Shtylyov.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Define the Alt board dependent part of the SDHI0 and 1
device nodes along with the necessary voltage regulators.
Based on work by the original patch by Vladimir Barinov and
Sergei Shtylyov for the Silk board.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Describe two instances (VSPS and VSPD0) of the VSP1 in the R8A7794 device
tree.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The ARM GIC only supports interrupts with either level-high or
rising-edge types for SPIs. The interrupt type for the Palmas PMIC used
for Tegra114 boards is specified as level-low which is invalid for the
GIC. This has gone undetected because until recently, failures to set
the interrupt type when the interrupts are mapped via firmware (such as
device-tree) have not been reported. Since commits 4b357daed6
("genirq: Look-up trigger type if not specified by caller") and
1e2a7d7849 ("irqdomain: Don't set type when mapping an IRQ"), failure
to set the interrupt type will cause the requesting of the interrupt to
fail and exposing incorrectly configured interrupts.
Please note that although the interrupt type was never being set for the
Palmas PMIC, it was still working fine, because the default type setting
for the interrupt, 'level-high', happen to match the correct type for
the interrupt.
Finally, it should be noted that the Palmas interrupt from the PMIC is
actually 'level-low', however, this interrupt signal is inverted by the
Tegra PMC and so the GIC actually sees a 'level-high' interrupt which is
what should be specified in the device-tree interrupt specifier.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
DT compatible values should always include an entry for the specific
chip in addition to any earlier generations that the HW is backwards-
compatible with.
This doesn't affect the kernel at all given current driver code, but
U-Boot needs to distinguish between Tegra114 and Tegra30 for this HW,
and I'd like to synchronize the DT content.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This patch fixes the following DTC warnings for many boards:
"Node /leds/led@1 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for many boards:
"Node /leds/led@1 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for many boards:
"Node /gpio_keys/button0@10 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for many boards:
"Node /gpio_keys/button0@10 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for many boards:
"Node /fixedregulator@0 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for many boards:
"Node /fixedregulator@0 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for many boards:
"Node /fixedregulator@0 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for many boards:
"Node /matrix_keypad@0 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Commit b8d368caa8 ("ARM: dts: omap3: overo: remove unneded unit names
in display nodes") removed the unit names for all Overo display nodes
that didn't have a reg property.
But the display in arch/arm/boot/dts/omap3-overo-common-lcd35.dtsi does
have a reg property so the correct fix was to make the unit name match
the value of the reg property, instead of removing it.
This patch fixes the following DTC warning for boards using this dtsi:
"ocp/spi@48098000/display has a reg or ranges property, but no unit name"
Fixes: b8d368caa8 ("ARM: dts: omap3: overo: remove unneded unit names in display nodes")
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for many boards:
"Node /ocp has a reg or ranges property, but no unit name"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This fix was applied to a bunch of omap3 devices including LogicPD
Torpedo, but this got missed since it was new around the same times
the patches were applied. This makes the GPMC parameters match the
Torpedo since they have the same processor PoP memory.
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This was applied to a variety of omap3 boards, so it should
probably be applied here. I did not test NAND performance, but
I tested this with UBI to confirm read/write didn't break.
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The gpmc ranges property for NAND at CS0 was being overridden by later
includes that defined gpmc ethernet nodes, effectively breaking NAND on
these systems:
omap-gpmc 6e000000.gpmc: /ocp/gpmc@6e000000/nand@0,0 has
malformed 'reg' property
Instead of redefining the NAND range in every such dtsi, define all
currently used ranges in omap3-overo-base.dtsi.
Fixes: 98ce6007ef ("ARM: dts: overo: Support PoP NAND")
Cc: stable <stable@vger.kernel.org> # 4.3
Signed-off-by: Johan Hovold <johan@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The gpmc ranges property for NAND at CS0 has been broken since it was
first added.
This currently prevents the nand gpmc child node from being probed:
omap-gpmc 6e000000.gpmc: /ocp/gpmc@6e000000/nand@0,0 has
malformed 'reg' property
and consequently the NAND device from being registered.
Fixes: 98ce6007ef ("ARM: dts: overo: Support PoP NAND")
Cc: stable <stable@vger.kernel.org> # 4.3
Signed-off-by: Johan Hovold <johan@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The check for the "elm_id" binding had been removed.
This causes nand boot to fail on boards still using
the old binding. Update the bindings on those boards.
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Acked-by: Brian Norris <computersforpeace@gmail.com>
Acked-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add support for MPL3115 NXP pressure sensor.
Tested by reading temperature and pressure:
$ cat /sys/bus/iio/devices/iio:device0/in_temp_raw
$ cat /sys/bus/iio/devices/iio:device0/in_pressure_raw
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
These device trees add support for TS-4900 by Technologic Systems.
More details here:
http://wiki.embeddedarm.com/wiki/TS-4900
Signed-off-by: Lucile Quirion <lucile.quirion@savoirfairelinux.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The Gateworks Ventana GW553x is a single-board computer based on the NXP
IMX6 SoC with the following features:
* IMX6 DualLite Soc (supports IMX6S,IMX6DL,IMX6Q)
* small form factor (35x70mm)
* 512MB DDR3 DRAM (2x32bit) (options up to 2GB)
* 256MB NAND flash (4GB option)
* Gateworks System Controller:
- hardware watchdog
- hardware monitor
- pushbutton controller
- EEPROM storage
- power control
* JTAG programmable
* 1x miniPCI socket (with PCIe, USB, SIM)
* 1x microSD socket
* 1x SIM socket
* Inertial Module (LSM9DS1 9DOF: 3x acc, 3x rate, 3x mag)
* analog CVBS video in
* GPS (optional uBlox EVA-M8M)
* Application headers:
- 2x TTL UART (TX/RX)
- 4x TTL GPIO (3x configurable as PWM)
- 3x CVBS Analog video input (1x decoder with 3x selectable inputs)
* Front panel connectors:
- micro-HDMI audio/video out
- 1x user programmable LED
- 1x configurable user pushbutton
- 1x USB OTG
See http://www.gateworks.com for more info
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The i.MX 7 as a GICv2, hence its CPU interface register map (the
second register region) is 8kB long. Add the VGIC maintenance
interrupt which allows to use the new VGIC driver.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Suggested-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Since we have a SoC level node we should make use of it and have
all nodes which are within the SoC, inside that node. This also
saves an extra interrupt-parent properties. While at it, also
order the Coresight nodes according to register addresses.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
We currently define OBJCOPYFLAGS in the top-level arm Makefile, and thus
these flags will be passed to all uses of objcopy, kernel-wide, for
which they are not explicitly overridden. The flags we set are intended
for converting a few ELF files into raw binaries, and thus the flags
chosen are problematic for some other uses which do not expect a raw
binary result, e.g. the upcoming lkdtm rodata test:
http://www.openwall.com/lists/kernel-hardening/2016/06/08/2
This patch localises the objcopy flags such that they are only used for
the cases we require them for today.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Kees Cook <keescook@chromium.org>
Tested-by: Laura Abbott <labbott@redhat.com>
Cc: Russell King <linux@armlinux.org.uk>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Rockchip platform use a SYSCON mapped register store
the reboot mode magic value for bootloader to use when
system reboot. So add syscon-reboot-mode driver DT node
for rk3xxx/rk3036/rk3288 based platform
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Clearly QEMU is very permissive in how its PL310 model may be set up,
but the real hardware turns out to be far more particular about things
actually being correct. Fix up the DT description so that the real
thing actually boots:
- The arm,data-latency and arm,tag-latency properties need 3 cells to
be valid, otherwise we end up retaining the default 8-cycle latencies
which leads pretty quickly to lockup.
- The arm,dirty-latency property is only relevant to L210/L220, so get
rid of it.
- The cache geometry override also leads to lockup and/or general
misbehaviour. Irritatingly, the manual doesn't state the actual PL310
configuration, but based on the boardfile code and poking registers
from the Boot Monitor, it would seem to be 8 sets of 16KB ways.
With that, we can successfully boot to enjoy the fun of mismatched FPUs...
Cc: stable@vger.kernel.org
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Tested-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
c90bb7b enabled the high speed UARTs of the Jetson TK1. Due to a merge
quirk, wrong addresses were introduced. Fix it and use the correct
addresses.
Thierry let me know, that there is another patch (b5896f67ab in
linux-next) in preparation which removes all the '0,' prefixes of unit
addresses on Tegra124 and is planned to go upstream in 4.8, so
this patch will get reverted then.
But for the moment, this patch is necessary to fix current misbehaviour.
Fixes: c90bb7b9b9 ("ARM: tegra: Add high speed UARTs to Jetson TK1 device tree")
Signed-off-by: Ralf Ramsauer <ralf@ramses-pyramidenbau.de>
Acked-by: Thierry Reding <thierry.reding@gmail.com>
Cc: stable@vger.kernel.org # v4.7
Cc: linux-tegra@vger.kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This syscon needs to be looked up by clocks, flash protection
and other consumers.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This syscon needs to be looked up by flash protection, CLCD
display output settings and other consumers.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Exynos5410 supports eMMC version 4.41 so HS200 is the top mode which
should be configured. This is reflected in usage of
"samsung,exynos5250-dw-mshc" compatible. However Odroid XU DTS
contained also property "mmc-hs400-1_8v" which is parsed by MMC core
therefore resulting in mixed configuration. MMC core set HS400 but
dwmmc_exynos driver did not configure the data strobe for HS400 DDR
mode.
Removal of HS400 properties fixes semi-random mmc errors during boot:
mmc_host mmc0: Bus speed (slot 0) = 400000000Hz (slot req 200000000Hz, actual 200000000HZ div = 1)
mmc0: mmc_select_hs400 failed, error -84
mmc0: error -84 whilst initialising MMC card
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
We have the following messages that tell csi devices are not used:
imx-ipuv3 18000000.ipu: no port@0 node in /soc/ipu@18000000, not using CSI0
imx-ipuv3 18000000.ipu: no port@1 node in /soc/ipu@18000000, not using CSI1
So we add them in the common device tree to make CSI ports available on
imx53 boards.
Signed-off-by: Fabien Lahoudere <fabien.lahoudere@collabora.co.uk>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
In order to use sdma with UART, we need to add DMA configuration in device tree.
Signed-off-by: Fabien Lahoudere <fabien.lahoudere@collabora.co.uk>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Define the generic R8A7792 part of the DU device node.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Describe the DU0/1 clocks and their parent, ZX clock in the R8A7792 device
tree.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Commit 2a0900655d5e (ARM: dts: r8a7792: add I2C support) had a wrongly
indented line at the end of the "aliases" subnode -- fix it.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Define the SILK board dependent part of the R8A7794 sound device node.
Add device node for Asahi Kasei AK4643 stereo codec to the I2C1 bus.
Add the "simple-audio-card" device node to interconnect the SoC sound
device and the codec.
This patch is based on the commit 493b4da7c1 ("ARM: dts: porter: add
sound support").
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Define the generic R8A7794 part of the sound device node.
This sound device is a complex one and comprises the Audio Clock Generator
(ADG), Sampling Rate Converter Unit (SCU), Serial Sound Interface [Unit]
(SSI[U]), and Audio DMAC-Peripheral-Peripheral.
It is up to the board file to enable the device.
This patch is based on the R8A7791 sound work by Kuninori Morimoto.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Describe Audio-DMAC in the R8A7794 device tree.
This patch is loosely based on the commit 8994fff677 ("ARM: shmobile:
r8a7791: Add Audio DMAC devices to DT").
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add MSTP10 clocks to the R8A7794 device tree.
This patch is based on the commit ee9141522d ("ARM: shmobile: r8a7791:
add MSTP10 support on DTSI").
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add some MSTP5 clocks to the R8A7794 device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Describe the external audio clocks (signals AUDIO_CLK[ABC]) required by
the sound driver. Boards that provide audio clocks need to override the
clock frequencies.
This patch is based on the commit 0d3dbde84a ("ARM: shmobile: r8a7791:
add audio clock on DTSI").
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Define the generic R8A7792 parts of the VIN[0-5] device nodes.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Describe the VIN[0-5] clocks and their parent, ZG clock in the R8A7792
device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Define the generic R8A7792 parts of the I2C[0-5] device nodes.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Describe the I2C[0-5] clocks in the R8A7792 device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Define the generic R8A7792 part of the SDHI0 device node.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Describe the SDHI0 clock and its parent, SD clock in the R8A7792 device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The LCDK is the successor to the late Hawkboard.
Among the differences are the flash (16bits vs 8bits) and some pins
(MMC, LEDs, buttons, some external connectors), however the main
components remain the same (eth. phy, audio codec, video decoder and
DAC) except for the main PMIC, different and hard-wired on the LCDK (the
LDOs and DCDCs are always on).
A DT-only boot with this addition gives functional UART, reboot via
watchdog, RTC, ethernet and MMC (I added the CD GPIO for the MMC
although davinci_mmc doesn't call the OF facilities of mmc core).
Cc: Sekhar Nori <nsekhar@ti.com>
Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Karl Beldan <kbeldan@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
This adds 2 pinctrl groups (rtscts, rxtx) for each of the 3 UARTs.
Signed-off-by: Karl Beldan <kbeldan@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
For some devices, the PWMSS is a parent of eCAP and ePWM and provides
the functional clocks for those submodules. The ti,am33xx-ecap and
ti,am33xx-ehrpwm bindings were based on this parent child relationship
where the functional clock would be grabbed from the module's parent.
However, DA850 doesn't have a PWMSS and the eCAP and ePWM provides
their functional clock themselves. Therefore, prefer the new binding
that doesn't assume this parent child relationship.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
[nsekhar@ti.com: minor commit message fixes]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
imx6ul-pico-hobbit has a bcm4343 wifi chip connected to usdhc2 port.
Add support for it.
Signed-off-by: Vanessa Maegima <vanessa.maegima@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The SoC internal regulators for the CPU and the SoC come from the
DA9063 vdd_core and vdd_soc. Add this relationship to the device tree
so that the voltage drop on the SoC internal LDO regulators can be
minimized.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Several dts files set a bit in the SPEED field for pads
RGMII_{R,T}{XC,D0,D1,D2,D3,X_CTL}, but that doesn't exist. Writing there
doesn't have an effect and the bit reads as zero.
Signed-off-by: Uwe Kleine-König <uwe@kleine-koenig.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Create a new device tree file for the Broadcom Northstar Plus
bcm958622hr SVK. This SVK has 2GB RAM, 5 port Ethernet, 2 PCI slots,
and 1 UART. Also, it has the ability to reboot via GPIO. To be added
in the future are support for the USB and SLIC audio.
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Create a new device tree file for the Broadcom Northstar Plus
bcm958623hr SVK. This SVK has 2GB RAM, 5 ports Ethernet, SATA, 2 PCI
slots, and 1 UART. Also, it has the ability to reboot via GPIO. To be
added in the future are support for the USB and SLIC audio.
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Create a new device tree file for the Broadcom Northstar Plus
bcm988312hr SVK. This SVK has 2GB RAM, 5 ports Ethernet, 2 eSATA, 2 PCI
slots, and 1 UART. Also, it has the ability to reboot via GPIO. To be
added in the future is support for the USB.
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Create a new device tree file for the Broadcom Northstar Plus
bcm958522er SVK. This SVK has 2GB RAM, 2 ports Ethernet, 2 PCI slots,
and 1 UART. Also, it has the ability to reboot via GPIO. To be added
in the future is support for the USB.
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Create a new device tree file for the Broadcom Northstar Plus
bcm958525er SVK. This SVK has 2GB RAM, 2 ports Ethernet, 2 eSATA, 2 PCI
slots, and 1 UART. Also, it has the ability to reboot via GPIO. To be
added in the future is support for the USB.
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Add the ability to reboot the bcm958625xmc board via GPIO.
Unfortunately, not all of the NSP based boards use the same GPIO pin
and one doesn't have the ability to reboot via GPIO at all. So, this
will need to be specified per DTS file.
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Add the ability to reboot the bcm958625hr board via GPIO.
Unfortunately, not all of the NSP based boards use the same GPIO pin and
one doesn't have the ability to reboot via GPIO at all. So, this will
need to be specified per DTS file.
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
