Enable the performance monitor unit for the Cortex-A53 cores on the
R8A7795 SoC.
Extracted from a patch by Takeshi Kihara in the BSP.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch adds Cortex-A53 CPU cores to r8a7795 SoC for a total of 8
cores (4 x Cortex-A57 + 4 x Cortex-A53).
Based on work by Takeshi Kihara and Dirk Behme.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Enables the SCIF hooked up to the DEBUG1 connector.
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the device nodes for all R-Car H3 SCIF serial ports, incl. clocks
and power domain.
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the device nodes for all HSCIF serial ports, incl. clocks, and
power domain.
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
[simon: express register size in hex; refer to power domain in changelog]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Fix warnings reported when built with W=1:
Node /memory has a reg or ranges property, but no unit name
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The ethmac node has to be configured for each board due to different
pinctrl nodes for RGMII/RMII. Thus the phy-mode should be specified at
the same place (= in the board .dts), making it easier to read the board
.dts file (because the phy-mode is stated explicitly, without requiring
developers to read all "parent" .dtsi as well).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This adds the amlogic,tx-delay-ns property with the old (hardcoded)
default value of 2ns to all boards which are using an RGMII ethernet
PHY.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Tested-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Amlogic's own .dts specifies that the P201 board uses a RMII PHY (with
the reset GPIO being GPIOZ_14).
However our P201 board .dts simply inherits the phy-mode setting from
from meson-gx.dtsi where it defaults to RGMII mode.
Remove all ethernet settings from meson-gxbb-p20x.dtsi as it only
specifies the RGMII pins which are only valid for the P200 board.
Instead we add the ethmac node to the meson-gxbb-p201.dts and configure
the pinctrl property and the phy-mode for an RMII PHY.
An MDIO node (which would also specify the PHY) is not added since we
don't know which PHY is being used (and thus which PHY address would
have to be used).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This resets the ethernet PHY during boot to get the PHY into a "clean"
state.
While here also specify the phy-handle of the ethmac node to make the
PHY configuration similar to the one we have on GXL devices. This will
allow us to specify OF-properties for the PHY itself.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Tested-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This resets the ethernet PHY during boot to get the PHY into a "clean"
state.
While here also specify the phy-handle of the ethmac node to make the
PHY configuration similar to the one we have on GXL devices. This will
allow us to specify OF-properties for the PHY itself.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This resets the ethernet PHY during boot to get the PHY into a "clean"
state.
While here also specify the phy-handle of the ethmac node to make the
PHY configuration similar to the one we have on GXL devices. This will
allow us to specify OF-properties for the PHY itself.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Tested-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This resets the ethernet PHY during boot to get the PHY into a "clean"
state.
While here also specify the phy-handle of the ethmac node to make the
PHY configuration similar to the one we have on GXL devices. This will
allow us to specify OF-properties for the PHY itself.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This resets the ethernet PHY during boot to get the PHY into a "clean"
state.
While here also specify the phy-handle of the ethmac node to make the
PHY configuration similar to the one we have on GXL devices. This will
allow us to specify OF-properties for the PHY itself.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Tested-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This resets the ethernet PHY during boot to get the PHY into a "clean"
state. While here also explicitly specify the phy-mode instead of
relying on the default-value from meson-gx.dtsi.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Tested-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Set PHY rxc-skew-ps to 1500 and all other values to their default values.
This is intended to to address failures in the case of 1Gbps communication
using the by salvator-x board with the KSZ9031RNX phy. This has been
reported to occur with both the r8a7795 (H3) and r8a7796 (M3-W) SoCs.
Signed-off-by: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Since commit 61fccb2d62 ("ravb: Add tx and rx clock internal delays mode
of APSR") the EthernetAVB driver enables tx and rx clock internal delay
modes (TDM and RDM) depending on the phy mode as follows:
phy mode | ASPR delay mode
-----------+----------------
rgmii-id | TDM and RDM
rgmii-rxid | RDM
rgmii-txid | TDM
And prior to the above commit no internal delay mode settings were
implemented for any phy mode.
With this and the above change present tx internal delay mode is enabled
which has been observed to address failures in the case of 1Gbps
communication using the by salvator-x board with the KSZ9031RNX phy. This
has been reported to occur with both the r8a7795 (H3) and r8a7796 (M3-W)
SoCs.
With the above patch present but this patch present tx and rx internal
delay modes are enabled; and with the above patch and this present absent
no internal delay modes are enabled. In both cases failures have been
observed when using 1Gbps communication in the environments described
above.
Signed-off-by: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Set PHY rxc-skew-ps to 1500 and all other values to their default values.
This is intended to to address failures in the case of 1Gbps communication
using the by h3ulcb board with the KSZ9031RNX phy.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Set PHY rxc-skew-ps to 1500 and all other values to their default values.
This is intended to to address failures in the case of 1Gbps communication
using the by salvator-x board with the KSZ9031RNX phy. This has been
reported to occur with both the r8a7795 (H3) and r8a7796 (M3-W) SoCs.
Signed-off-by: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Since commit 61fccb2d62 ("ravb: Add tx and rx clock internal delays mode
of APSR") the EthernetAVB driver enables tx and rx clock internal delay
modes (TDM and RDM) depending on the phy mode as follows:
phy mode | ASPR delay mode
-----------+----------------
rgmii-id | TDM and RDM
rgmii-rxid | RDM
rgmii-txid | TDM
And prior to the above commit no internal delay mode settings were
implemented for any phy mode.
With this and the above change present tx internal delay mode is enabled
which has been observed to address failures in the case of 1Gbps
communication using the by salvator-x board with the KSZ9031RNX phy. This
has been reported to occur with both the r8a7795 (H3) and r8a7796 (M3-W)
SoCs.
With the above patch present but this patch present tx and rx internal
delay modes are enabled; and with the above patch and this present absent
no internal delay modes are enabled. In both cases failures have been
observed when using 1Gbps communication in the environments described
above.
Signed-off-by: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch enables I2C for DVFS device for for Salvator-X board on
R8A7795 SoC.
Signed-off-by: Keita Kobayashi <keita.kobayashi.ym@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
This patch adds support of I2C for DVFS device for Salvator-X board on
R8A7796 SoC.
Signed-off-by: Dien Pham <dien.pham.ry@rvc.renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
f8000000 is less than all the other (top-level) unit addresses.
Signed-off-by: Brian Norris <briannorris@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add Northstar2 device tree entry for Broadcom Secure Processing Unit
(SPU) crypto hardware.
Signed-off-by: Steve Lin <steven.lin1@broadcom.com>
Signed-off-by: Rob Rice <rob.rice@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Merge "ARMv8 Juno DT fix for v4.11" from Sudeep Holla:
Just single patch to fix replicator in order to prevent overflows at
the source and reduce the back pressure by splitting the trace output
to TPIU and ETR.
* tag 'juno-fixes-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
arm64: dts: juno: update definition for programmable replicator
ARM64 DT updates are fairly small this time, only two new SoCs and a handful
of new machines get added, all of them similar to other hardware we already
support.
New SoC:
- HiSilicon Kirin960/Hi3660 and HiKey960 development board
- NXP LS1012a with three reference boards
http://www.nxp.com/products/microcontrollers-and-processors/arm-processors/qoriq-layerscape-arm-processors/qoriq-layerscape-1012a-low-power-communication-processor:LS1012A
New development board:
- Banana Pi M64, based on Allwinner A64
http://www.banana-pi.org/m64.html
- SolidRun MACCHIATOBin based on Marvell Armada 8K
https://www.solid-run.com/marvell-armada-family/armada-8040-community-board/
- Broadcom BCM958712DxXMC NorthStar2 reference board (another one)
A lot of platforms improve support for existing machines by adding
extra devices for which a binding and driver is availabe:
Allwinner: MMC, USB
ARM Juno: Coresight, STM
Broadcom: NS2 GICv2m irqchip and PCIe
Marvell: Armada 3700 SPI, I2C, ethernet switch
Mediatek: MT8173 thermal
NXP i.MX: LS1046A thermal
Qualcomm: coresight on MSM8916, HDMI, WCNSS, SCM
Renesas: r8a779[56] thermal, powerdomain, ethernet, sound, pwm, can, can fd
Rockchip: thermal, eDP, pinctrl enhancements
Samsung: TM2 touchkey, Exynos5433 HDMI and power management improvements
UniPhier: SD reset, eMMC controller
ZTE: oppv2 cpufreq
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Merge tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM 64-bit DT updates from Arnd Bergmann:
"ARM64 DT updates are fairly small this time, only two new SoCs and a
handful of new machines get added, all of them similar to other
hardware we already support.
New SoC:
- HiSilicon Kirin960/Hi3660 and HiKey960 development board
- NXP LS1012a with three reference boards:
http://www.nxp.com/products/microcontrollers-and-processors/arm-processors/qoriq-layerscape-arm-processors/qoriq-layerscape-1012a-low-power-communication-processor:LS1012A
New development board:
- Banana Pi M64, based on Allwinner A64:
http://www.banana-pi.org/m64.html
- SolidRun MACCHIATOBin based on Marvell Armada 8K:
https://www.solid-run.com/marvell-armada-family/armada-8040-community-board/
- Broadcom BCM958712DxXMC NorthStar2 reference board (another one)
A lot of platforms improve support for existing machines by adding
extra devices for which a binding and driver is availabe:
Allwinner:
- MMC, USB
ARM Juno:
- Coresight, STM
Broadcom:
- NS2 GICv2m irqchip and PCIe
Marvell:
- Armada 3700 SPI, I2C, ethernet switch
Mediatek:
- MT8173 thermal
NXP i.MX:
- LS1046A thermal
Qualcomm:
- coresight on MSM8916, HDMI, WCNSS, SCM
Renesas:
- r8a779[56] thermal, powerdomain, ethernet, sound, pwm, can, can fd
Rockchip:
- thermal, eDP, pinctrl enhancements
Samsung:
- TM2 touchkey, Exynos5433 HDMI and power management improvements
UniPhier:
- SD reset, eMMC controller
ZTE:
- oppv2 cpufreq"
* tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (110 commits)
arm64: dts: qcom: Add msm8916 CoreSight components
arm64: dts: marvell: adjust name of sd-mmc-gop clock in syscon
arm64: allwinner: add BananaPi-M64 support
arm64: allwinner: a64: add UART1 pin nodes
arm64: allwinner: pine64: add MMC support
arm64: allwinner: a64: Increase the MMC max frequency
arm64: allwinner: a64: Add MMC pinctrl nodes
arm64: allwinner: a64: Add MMC nodes
dt-bindings: clockgen: Add compatible string for LS1012A
Documentation: DT: add LS1012A compatible for SCFG and DCFG
Documentation: DT: Add entry for FSL LS1012A RDB, FRDM, QDS boards
arm64: dts: marvell: add generic-ahci compatibles for CP110 ahci
arm64: tegra: Use symbolic reset identifiers
arm64: dts: r8a7796: Mark EthernetAVB device node disabled
arm64: dts: r8a7795: Mark EthernetAVB device node disabled
arm64: dts: r8a7795: tidyup audma definition order
arm64: dts: r8a7796: Link ARM GIC to clock and clock domain
arm64: dts: r8a7795: Link ARM GIC to clock and clock domain
arm64: dts: r8a7796: Add R-Car Gen3 thermal support
arm64: dts: r8a7795: Add R-Car Gen3 thermal support
...
Here is the big USB and PHY driver updates for 4.11-rc1.
Nothing major, just the normal amount of churn in the usb gadget and dwc
and xhci controllers, new device ids, new phy drivers, a new usb-serial
driver, and a few other minor changes in different USB drivers.
All have been in linux-next for a long time with no reported issues.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'usb-4.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb
Pull USB/PHY updates from Greg KH:
"Here is the big USB and PHY driver updates for 4.11-rc1.
Nothing major, just the normal amount of churn in the usb gadget and
dwc and xhci controllers, new device ids, new phy drivers, a new
usb-serial driver, and a few other minor changes in different USB
drivers.
All have been in linux-next for a long time with no reported issues"
* tag 'usb-4.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (265 commits)
usb: cdc-wdm: remove logically dead code
USB: serial: keyspan: drop header file
USB: serial: io_edgeport: drop io-tables header file
usb: musb: add code comment for clarification
usb: misc: add USB251xB/xBi Hi-Speed Hub Controller Driver
usb: misc: usbtest: remove redundant check on retval < 0
USB: serial: upd78f0730: sort device ids
USB: serial: upd78f0730: add ID for EVAL-ADXL362Z
ohci-hub: fix typo in dbg_port macro
usb: musb: dsps: Manage CPPI 4.1 DMA interrupt in DSPS
usb: musb: tusb6010: Clean up tusb_omap_dma structure
usb: musb: cppi_dma: Clean up cppi41_dma_controller structure
usb: musb: cppi_dma: Clean up cppi structure
usb: musb: cppi41: Detect aborted transfers in cppi41_dma_callback()
usb: musb: dma: Add a DMA completion platform callback
drivers: usb: usbip: Add missing break statement to switch
usb: mtu3: remove redundant dev_err call in get_ssusb_rscs()
USB: serial: mos7840: fix another NULL-deref at open
USB: serial: console: clean up sanity checks
USB: serial: console: fix uninitialised spinlock
...
Juno platforms have a programmable replicator splitting the trace output
to TPIU and ETR. Currently this is not being programmed as it is being
treated as a none-programmable replicator - which is the default
operational mode for these devices. The TPIU in the system is enabled by
default, and this combination is causing back-pressure in the trace
system resulting in overflows at the source.
Replaces the existing definition with one that defines the programmable
replicator, using the "qcom,coresight-replicator1x" driver that provides
the correct functionality for CoreSight programmable replicators.
Reviewed-and-Tested-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Mike Leach <mike.leach@linaro.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
1. Add necessary initial configuration for clocks of display subsystem.
Till now it worked mostly thanks to bootloader.
2. Use macro definitions instead of hard-coded values for pinctrl on Exynos7.
3. Enable USB 3.0 (DWC3) on Exynos7.
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Merge tag 'samsung-dt64-4.11-3' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/late
Pull "Samsung DeviceTree ARM64 update for v4.11, third round" from Krzysztof Kozłowski:
1. Add necessary initial configuration for clocks of display subsystem.
Till now it worked mostly thanks to bootloader.
2. Use macro definitions instead of hard-coded values for pinctrl on Exynos7.
3. Enable USB 3.0 (DWC3) on Exynos7.
* tag 'samsung-dt64-4.11-3' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (27 commits)
arm64: dts: exynos: Add regulators for Vbus and Vbus-Boost
arm64: dts: exynos: Add USB 3.0 controller node for Exynos7
arm64: dts: exynos: Use macros for pinctrl configuration on Exynos7
pinctrl: dt-bindings: samsung: Add Exynos7 specific pinctrl macro definitions
arm64: dts: exynos: Add initial configuration for DISP clocks for TM2/TM2e
clk: samsung: exynos5433: Add data for 250MHz and 278MHz PLL rates
clk: samsung: exynos5433: Add IDs for PHYCLK_MIPIDPHY0_* clocks
arm64: dts: exynos: Add clocks to Exynos5433 LPASS module
arm64: dts: exynos: set LDO7 regulator as always on
arm64: dts: exynos: configure TV path clocks for Ultra HD modes
arm64: dts: exynos: Fix drive strength of sd0_xxx pin definitions
arm64: dts: exynos: Disable pull down for audio pins in Exynos5433 SoCs
arm64: dts: exynos: Add TM2 touchkey node
arm64: dts: exynos: Remove unneeded unit names in Exynos5433 nodes
arm64: dts: exynos: Enable HDMI/TV path on Exynos5433-TM2
arm64: dts: exynos: Add HDMI node to Exynos5433
arm64: dts: exynos: Add DECON_TV node to Exynos5433
arm64: dts: exynos: Fix addresses in node names on Exynos5433
arm64: dts: exynos: Make TM2 and TM2E independent from each other
arm64: dts: exynos: Fix wrong values for ldo23 and ldo25 on TM2/TM2E
...
adjust name of sd-mmc-gop clock in sysco for Armada 7K/8K
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Merge tag 'mvebu-dt64-4.11-3' of git://git.infradead.org/linux-mvebu into next/dt64
Pull "mvebu dt for 4.11 (part 3)" from Gregory CLEMENT:
adjust name of sd-mmc-gop clock in sysco for Armada 7K/8K
* tag 'mvebu-dt64-4.11-3' of git://git.infradead.org/linux-mvebu:
arm64: dts: marvell: adjust name of sd-mmc-gop clock in syscon
Some patches related the arm64 Allwinner SoCs, most notably:
- Support for the MMC
- Suport for the USB and mUSB controllers
- New boards: Bananapi M64
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Merge tag 'sunxi-dt64-for-4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/dt64
Pull "Allwinner arm64 changes for 4.11" from Maxime Ripard:
Some patches related the arm64 Allwinner SoCs, most notably:
- Support for the MMC
- Suport for the USB and mUSB controllers
- New boards: Bananapi M64
* tag 'sunxi-dt64-for-4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
arm64: allwinner: add BananaPi-M64 support
arm64: allwinner: a64: add UART1 pin nodes
arm64: allwinner: pine64: add MMC support
arm64: allwinner: a64: Increase the MMC max frequency
arm64: allwinner: a64: Add MMC pinctrl nodes
arm64: allwinner: a64: Add MMC nodes
arm64: dts: allwinner: Remove no longer used pinctrl/sun4i-a10.h header
arm64: dts: enable the MUSB controller of Pine64 in host-only mode
arm64: dts: add MUSB node to Allwinner A64 dtsi
arm64: dts: allwinner: enable EHCI1, OHCI1 and USB PHY nodes in Pine64
arm64: dts: allwinner: sort the nodes in sun50i-a64-pine64.dts
arm64: dts: allwinner: add USB1-related nodes of Allwinner A64
Due to the reference clock comes from 26M oscillator directly
on mt8173, and it is a fixed-clock in DTS which always turned
on, we ignore it before. But on some platforms, it comes
from PLL, and need be controlled, so here add it, no matter
it is a fixed-clock or not.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Adding fixed voltage regulators for Vbus and Vbus-boost required
by USB 3.0 DRD controller on Exynos7-espresso board.
Signed-off-by: Vivek Gautam <gautamvivek1987@gmail.com>
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Add USB 3.0 DRD controller device node, with its clock
and phy information to enable the same on Exynos7.
Signed-off-by: Vivek Gautam <gautamvivek1987@gmail.com>
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Usage of DTS macros instead of hard-coded numbers makes code easier to
read. One does not have to remember which value means pull-up/down or
specific driver strength.
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Add initial set of CoreSight components found on Qualcomm msm8916 and
apq8016 based platforms, including the DragonBoard 410c board.
Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org>
Acked-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add initial clock configuration for display subsystem for Exynos5433
based TM2/TM2e boards in device tree in order to avoid dependency on the
configuration left by the bootloader. This initial configuration is also
needed to ensure that display subsystem is operational if display power
domain gets turned off before clock controller is probed and the inital
clock configuration left by the bootloader saved.
TM2 and TM2e uses different rate for DISP PLL clock, but for better
maintainability all 'assigned-clocks-*' properties for DISP CMU are
defines in each board dts instead of redefining the rates property.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
This commit adjusts the names of gatable clock #18 of the Marvell Armada
CP110 system controller. This clock not only controls SD/MMC, but also
the GOP (Group Of Ports) used for networking. So the clock is renamed to
{cpm,cps}-sd-mmc-gop instead of {cpm,cps}-sd-mmc.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
1. Use proper drive strengths on Exynos7.
2. Fix significant current leak on Exynos5433-based TM2/TM2E due
to disabled regulator.
3. Add touchkey to TM2, set display clocks for Ultra HD modes.
4. Cleanups and minor fixes for Exynos5433, TM2 and TM2E.
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Merge tag 'samsung-dt64-4.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt64
Samsung DeviceTree ARM64 update for v4.11, second round:
1. Use proper drive strengths on Exynos7.
2. Fix significant current leak on Exynos5433-based TM2/TM2E due
to disabled regulator.
3. Add touchkey to TM2, set display clocks for Ultra HD modes.
4. Cleanups and minor fixes for Exynos5433, TM2 and TM2E.
* tag 'samsung-dt64-4.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos: Add clocks to Exynos5433 LPASS module
arm64: dts: exynos: set LDO7 regulator as always on
arm64: dts: exynos: configure TV path clocks for Ultra HD modes
arm64: dts: exynos: Fix drive strength of sd0_xxx pin definitions
arm64: dts: exynos: Disable pull down for audio pins in Exynos5433 SoCs
arm64: dts: exynos: Add TM2 touchkey node
arm64: dts: exynos: Remove unneeded unit names in Exynos5433 nodes
Signed-off-by: Olof Johansson <olof@lixom.net>
Add the 5 buttons connected to a resistor laddered matrix and sampled
by the SAR ADC channel 0.
Only the p200 board has these buttons, the P201 doesn't.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add the SAR ADC to meson-gxbb.dtsi and meson-gxl.dtsi. GXBB provides a
10-bit ADC while GXL and GXM provide a 12-bit ADC.
Some boards use resistor ladder buttons connected through one of the ADC
channels. On newer devices (GXL and GXM) some boards use pull-ups/downs
to change the resistance (and thus the ADC value) on one of the ADC
channels to indicate the board revision.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Tested-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The Banana Pi M64 board is a typical single board computer based on the
Allwinner A64 SoC. Aside from the usual peripherals it features eMMC
storage, which is connected to the 8-bit capable SDHC2 controller.
Also it has a soldered WiFi/Bluetooth chip, so we enable UART1 and SDHC1
as those two interfaces are connected to it.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
On many boards UART1 connects to a Bluetooth chip, so add the pinctrl
nodes for the only pins providing access to that UART. That includes
those pins for hardware flow control (RTS/CTS).
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
All Pine64 boards connect an micro-SD card slot to the first MMC
controller.
Enable the respective DT node and specify the (always-on) regulator
and card-detect pin.
As a micro-SD slot does not feature a write-protect switch, we disable
this feature.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
The eMMC controller seem to have a maximum frequency of 200MHz, while the
regular MMC controllers are capped at 150MHz.
Since older SoCs cannot go that high, we cannot change the default maximum
frequency, but fortunately for us we have a property for that in the DT.
This also has the side effect of allowing to use the MMC HS200 and SD
SDR104 modes for the boards that support it (with either 1.2v or 1.8v IOs).
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Tested-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Acked-by: Chen-Yu Tsai <wens@csie.org>
The A64 only has a single set of pins for each MMC controller. Since we
already have boards that require all of them, let's add them to the DTSI.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Tested-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Acked-by: Chen-Yu Tsai <wens@csie.org>
The A64 has 3 MMC controllers, one of them being especially targeted to
eMMC. Among other things, it has a data strobe signal and a 8 bits data
width.
The two other are more usual controllers that will have a 4 bits width at
most and no data strobe signal, which limits it to more usual SD or MMC
peripherals.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Tested-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Acked-by: Chen-Yu Tsai <wens@csie.org>
- Enable cpufreq support for zx296718 by using new operating-points-v2
bindings, so that it works with the generic cpufreq-dt driver.
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Merge tag 'zte-dt64-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt64
ZTE arm64 device tree update for 4.11:
- Enable cpufreq support for zx296718 by using new operating-points-v2
bindings, so that it works with the generic cpufreq-dt driver.
* tag 'zte-dt64-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
arm64: dts: zx: support cpu-freq for zx296718
Signed-off-by: Olof Johansson <olof@lixom.net>
- Add support for LS1012A SoC which is an ARMv8 SoC with single
Cortex-A53 core, and the corresponding board support: FRDM, QDS
and RDB.
- Enable TMU (Thermal Monitoring Unit) support for LS1046A SoC.
- Enable PCA9547 device for ls2080a-rdb board by removing 'disabled'
status setting.
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Merge tag 'imx-dt64-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt64
Freescale arm64 device tree updates for 4.11:
- Add support for LS1012A SoC which is an ARMv8 SoC with single
Cortex-A53 core, and the corresponding board support: FRDM, QDS
and RDB.
- Enable TMU (Thermal Monitoring Unit) support for LS1046A SoC.
- Enable PCA9547 device for ls2080a-rdb board by removing 'disabled'
status setting.
* tag 'imx-dt64-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
dt-bindings: clockgen: Add compatible string for LS1012A
Documentation: DT: add LS1012A compatible for SCFG and DCFG
Documentation: DT: Add entry for FSL LS1012A RDB, FRDM, QDS boards
arm64: dts: ls1046a: Add TMU device tree support
arm64: dts: Add support for FSL's LS1012A SoC
arm64: dts: ls2080a-rdb: remove disable status of pca9547
Signed-off-by: Olof Johansson <olof@lixom.net>
- Add a new Armada 8K based board: MACCHIATOBin
- Enable AHCI on the Armada 7K/8K SoCs
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Merge tag 'mvebu-dt64-4.11-2' of git://git.infradead.org/linux-mvebu into next/dt64
mvebu dt64 for 4.11 (part 2)
- Add a new Armada 8K based board: MACCHIATOBin
- Enable AHCI on the Armada 7K/8K SoCs
* tag 'mvebu-dt64-4.11-2' of git://git.infradead.org/linux-mvebu:
arm64: dts: marvell: add generic-ahci compatibles for CP110 ahci
arm64: dts: marvell: Add DT for MACCHIATOBin board
Signed-off-by: Olof Johansson <olof@lixom.net>
This contains three patches that reintroduce symbolic identifiers for
clocks, resets and mailboxes. These had been converted to literals in
the v4.10 release to avoid complicated dependencies between branches.
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Merge tag 'tegra-for-4.11-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt64
arm64: tegra: Device tree changes for v4.11-rc1
This contains three patches that reintroduce symbolic identifiers for
clocks, resets and mailboxes. These had been converted to literals in
the v4.10 release to avoid complicated dependencies between branches.
* tag 'tegra-for-4.11-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
arm64: tegra: Use symbolic reset identifiers
arm64: tegra: Use symbolic clock identifiers
arm64: tegra: Use symbolic HSP identifiers
Signed-off-by: Olof Johansson <olof@lixom.net>
r8a779[56] SoCs:
* Mark EthernetAVB device node disabled in DT for r8a779[56] SoCs
- They are enabled as appropriate in board DT files
* Link ARM GIC to clock and clock domain on r8a779[56] SoCs
* Add thermal support
r8a7795 SoC:
* Tidyup audma definition order on r8a7795 SoC
* Add missing power-domains property for SATA
r8a7795/h3ulcb board:
* Add MIX/CTU support as per support present in DT for r8a7796
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Merge tag 'renesas-arm64-dt2-for-v4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt64
Second Round of Renesas ARM64 Based SoC DT Updates for v4.11
r8a779[56] SoCs:
* Mark EthernetAVB device node disabled in DT for r8a779[56] SoCs
- They are enabled as appropriate in board DT files
* Link ARM GIC to clock and clock domain on r8a779[56] SoCs
* Add thermal support
r8a7795 SoC:
* Tidyup audma definition order on r8a7795 SoC
* Add missing power-domains property for SATA
r8a7795/h3ulcb board:
* Add MIX/CTU support as per support present in DT for r8a7796
* tag 'renesas-arm64-dt2-for-v4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
arm64: dts: r8a7796: Mark EthernetAVB device node disabled
arm64: dts: r8a7795: Mark EthernetAVB device node disabled
arm64: dts: r8a7795: tidyup audma definition order
arm64: dts: r8a7796: Link ARM GIC to clock and clock domain
arm64: dts: r8a7795: Link ARM GIC to clock and clock domain
arm64: dts: r8a7796: Add R-Car Gen3 thermal support
arm64: dts: r8a7795: Add R-Car Gen3 thermal support
arm64: dts: r8a7795: Add missing power-domains property for sata
arm64: dts: h3ulcb: follow sound CTU/MIX supports
Signed-off-by: Olof Johansson <olof@lixom.net>
- Add binding for Hi3660 SoC and HiKey960 Board
- Add binding for ARM Cortex-A73
- Add dts files for HiKey960 development board
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Merge tag 'hisi-arm64-dt-for-4.11' of git://github.com/hisilicon/linux-hisi into next/dt64
ARM64: DT: Hisilicon SoC DT updates for 4.11
- Add binding for Hi3660 SoC and HiKey960 Board
- Add binding for ARM Cortex-A73
- Add dts files for HiKey960 development board
* tag 'hisi-arm64-dt-for-4.11' of git://github.com/hisilicon/linux-hisi:
arm64: dts: Add dts files for Hisilicon Hi3660 SoC
dt-bindings: Add a support cpu type for cortex-a73
document: dt: add binding for Hi3660 SoC
Signed-off-by: Olof Johansson <olof@lixom.net>
- set mm_sel clock to 400 MHz to support 4K HDMI
- adjust power efficiency between the little and big cores
- add a node for thermal calibration via e-fuse data
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Merge tag 'v4.10-next-dts' of https://github.com/mbgg/linux-mediatek into next/dt64
For mt8173:
- set mm_sel clock to 400 MHz to support 4K HDMI
- adjust power efficiency between the little and big cores
- add a node for thermal calibration via e-fuse data
* tag 'v4.10-next-dts' of https://github.com/mbgg/linux-mediatek:
arm64: dts: mt8173: add node for thermal calibration
arm64: dts: mt8173: Fix cpu_thermal cooling-maps contributions
arm64: dts: mt8173: add mmsel clocks for 4K support
Signed-off-by: Olof Johansson <olof@lixom.net>
* Add Vol+ support for DB820C and APQ8016
* Add HDMI audio support for APQ8016
* Fix DB820C GPIO pinctrl name
* Enable WCNSS on MSM8916
* Add SCM node for MSM8996
* Use fixed XO clock on MSM8916
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Merge tag 'qcom-arm64-for-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/dt64
Qualcomm ARM64 Updates for v4.11
* Add Vol+ support for DB820C and APQ8016
* Add HDMI audio support for APQ8016
* Fix DB820C GPIO pinctrl name
* Enable WCNSS on MSM8916
* Add SCM node for MSM8996
* Use fixed XO clock on MSM8916
* tag 'qcom-arm64-for-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
arm64: dts: db820c: add support to volume up key
arm64: dts: apq8016-sbc: Limit MPP4 high state to 1.8V
arm64: dts: apq8016-sbc: Add Volume Up key device node
arm64: dts: apq8016-sbc: add support to hdmi audio via adv7533
arm64: dts: db820c: fix gpio pinctrl name correctly
ARM: dts: msm8916: Add and enable wcnss node
arm64: dts: msm8996: Add SCM DT node
arm64: dts: qcom: msm8916: Use fixed factor xo clock
Signed-off-by: Olof Johansson <olof@lixom.net>
usb clocks, grf phandles for the rk3399 CRUs, epd pinctrl settings,
a phandle to the rk3399 tsadc and converting boards to use the
recently introduced pin constants.
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Merge tag 'v4.11-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt64
64bit dts changes with some adjustments to the pcie controller,
usb clocks, grf phandles for the rk3399 CRUs, epd pinctrl settings,
a phandle to the rk3399 tsadc and converting boards to use the
recently introduced pin constants.
* tag 'v4.11-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm64: dts: rockchip: add rockchip,grf property for RK3399 PMUCRU/CRU
arm64: dts: rockchip: add aspm-no-l0s for rk3399
arm64: dts: rockchip: add max-link-speed for rk3399
arm64: dts: rockchip: use pin constants to describe gpios
arm64: dts: rockchip: add u2phy clock for ehci and ohci of rk3399
arm64: dts: rockchip: add rk3399 eDP HPD pinctrl
arm64: dts: rockchip: add rk3399 thermal_zones phandle
Signed-off-by: Olof Johansson <olof@lixom.net>
This adds the pwm_ao_b pin to allow boards which have an LED connected
to GPIOAO_9 to use the leds-pwm driver (by activating the pwm_AO_ab node
and passing the pwm_ao_b_pin pinctrl-reference).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
All Meson GX SoCs (GXBB, GXL and GXM) have a PWM controller within the
AO domain. When one of the board's LEDs is connected to one of the AO
PWM pins then this can be used to dim that LED (when the leds-pwm driver
is used).
Add the pwm_AO_ab to allow such devices to use the leds-pwm driver.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The Amlogic Meson GXBB/GXL/GXM secure monitor uses part of the memory space,
this patch adds these reserved zones.
Without such reserved memory zones, running the following stress command :
$ stress-ng --vm 16 --vm-bytes 128M --timeout 10s
multiple times:
Could lead to the following kernel crashes :
[ 46.937975] Bad mode in Error handler detected on CPU1, code 0xbf000000 -- SError
...
[ 47.058536] Internal error: Attempting to execute userspace memory: 8600000f [#3] PREEMPT SMP
...
Instead of the OOM killer.
Fixes: 4f24eda840 ("ARM64: dts: Prepare configs for Amlogic Meson GXBaby")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
[khilman: added Fixes tag, added _reserved and unit addresses]
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
OdroidC2 GbE link breaks under heavy tx transfer. This happens even if the
MAC does not enable Energy Efficient Ethernet (No Low Power state Idle on
the Tx path). The problem seems to come from the phy Rx path, entering the
LPI state.
Disabling EEE advertisement on the phy prevent this feature to be
negociated with the link partner and solve the issue.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Testing with an Armada 8040 board shows that adding the generic-ahci
compatible to the CP110 AHCI nodes gets us working AHCI on the board.
A previous patch series posted by Thomas Petazzoni was retracted when
it was realised that the IP was supposed to be, and is, compatible
with the standard register layout.
Add this compatible.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Now that the corresponding device tree binding include has been merged,
convert the DTS files to use symbolic names instead of numeric ones.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Device nodes representing I/O devices should be marked disabled in the
SoC-specific DTS, and overridden by board-specific DTSes where needed.
Fixes: 8e8b9eaef8 ("arm64: dts: renesas: r8a7796: Add EthernetAVB instance")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Device nodes representing I/O devices should be marked disabled in the
SoC-specific DTS, and overridden by board-specific DTSes where needed.
Fixes: a92843c8a6 ("arm64: dts: r8a7795: add EthernetAVB device node")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Current r8a7795.dtsi defines audma -> ipmmu -> dma order.
Because of this order, dma can connect to ipmmu, but
audma can't connect to it.
This patch moves audma order as ipmmu -> dma -> audma.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Link the ARM GIC to the INTC-AP module clock, and add it to the SYSC
"always-on" PM Domain, so it can be power managed using that clock.
Note that currently the GIC-400 driver doesn't support module clocks nor
Runtime PM, so this must be handled as a critical clock.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Link the ARM GIC to the INTC-AP module clock, and add it to the SYSC
"always-on" PM Domain, so it can be power managed using that clock.
Note that currently the GIC-400 driver doesn't support module clocks nor
Runtime PM, so this must be handled as a critical clock.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This went unnoticed as the sata_rcar driver doesn't support Runtime PM
yet, but manages module clocks manually.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Exynos5433 LPASS module requires some clocks for proper operation with
power domain.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
All dts files for the sunxi platform have been switched to the generic
pinconf bindings. As a result, the sunxi specific pinctrl macros are
no longer used.
Remove the #include entry with the following command:
sed -i -e '/pinctrl\/sun4i-a10.h/D' \
arch/arm64/boot/dts/allwinner/*.dts?
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add initial dtsi file to support Hisilicon Hi3660 SoC with
support of Octal core CPUs in two clusters(4 * A53 & 4 * A73).
Also add dts file to support HiKey960 development board which
based on Hi3660 SoC.
The output console is earlycon "earlycon=pl011,0xfdf05000".
And the con_init uart5 with a fixed clock, which already
configured at bootloader.
When clock is available, the uart5 will be modified.
Tested on HiKey960 Board.
Signed-off-by: Chen Feng <puck.chen@hisilicon.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Now that the corresponding device tree binding include has been merged,
convert the DTS files to use symbolic names instead of numeric ones.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Now that the corresponding device tree binding include has been merged,
convert the DTS files to use symbolic names instead of numeric ones.
Signed-off-by: Thierry Reding <treding@nvidia.com>
LDO7 regulator beside DSI and HDMI provides power for core blocks in Exynos
5433 SoC. Disabling it causes serious current leak - about 200mA.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Since the GXL family has S905X and S905D SoCs, we're keeping the SoC
name in the DTS filename for clarity. Rename this file accordingly to
be consistent with the rest of the GXL DTS files.
Cc: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Adds support for the WeTek Hub and Play2 boards.
The Hub is an extremely small IPTv Set-Top-Box and the Play2 is a more
traditionnal Satellite or Terrestrial and IPTv Set-Top-Box.
Both are based on the p200 Reference Design and out-of-tree support is
based on LibreELEC kernel at [1].
[1] https://github.com/wetek-enigma/linux-amlogic
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Ultra HD modes requires clock ticking at increased rate.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
The LD11 SoC is equipped with SD-ctrl (0x59810000) as well as
MIO-ctrl (0x5b3e0000). The SD-ctrl block on this SoC has just
one register for controlling RST_n pin of the eMMC device.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
As per Exynos7 datasheet FSYS1 pinctrl block does not support drive
strength value of 0x3. This patch fixes this and update the correct
drive strength for sd0_xxx pin definitions.
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Common definition for I2S, PMC, SPDIF buses should not define any pull
control for the individual pins. Correct this by changing samsung,pin-pud
property to EXYNOS_PIN_PULL_NONE like it is defined for other Exynos SoCs.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Add a cut-down version of the DTS file for the community board
MACCHIATOBin from SolidRun based on Marvell Armada 8040 SoC to suit
the current mainlined Armada 8040 state.
This brings support for mainly SATA, SPI flash and UART. The USB
descriptions are included but are not tested in this form due to the
lack of mainline GPIO.
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Acked-by: Rabeeh Khoury <rabeeh@solid-run.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
In order to keep consistency naming with the Nexbox A1 DTS file, remove the
S912 SoC name in the GXM DT files.
Suggested-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
4.11, please pull the following changes:
- Jon adds Device Tree nodes for the GICv2m and PAXB/PAXC PCIe interfaces on
the Northstar 2 SoCs, he also enables PAXC on the Northstar 2 SVK reference
board. He also updates the reserved memory entry for the Nitro firmware,
required to get the on-chip NICs to work. Finally he adds support for the
BCM958712DxXMC reference board which is a subset of existing boards.
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Merge tag 'arm-soc/for-4.11/devicetree-arm64' of http://github.com/Broadcom/stblinux into next/dt64
This pull request contains Broadcom ARM64-based SoC Device Tree changes for
4.11, please pull the following changes:
- Jon adds Device Tree nodes for the GICv2m and PAXB/PAXC PCIe interfaces on
the Northstar 2 SoCs, he also enables PAXC on the Northstar 2 SVK reference
board. He also updates the reserved memory entry for the Nitro firmware,
required to get the on-chip NICs to work. Finally he adds support for the
BCM958712DxXMC reference board which is a subset of existing boards.
* tag 'arm-soc/for-4.11/devicetree-arm64' of http://github.com/Broadcom/stblinux:
arm64: dts: NS2: add support for XMC form factor
arm64: dts: NS2: reserve memory for Nitro firmware
arm64: dts: NS2: enable PAXC on NS2 SVK
arm64: dts: NS2: enable GICv2m for PAXB/PAXC interfaces
Signed-off-by: Olof Johansson <olof@lixom.net>
1. Addition of Coresight support on Juno R1 and R2 variants
2. Addition of STM(System Trace Macrocell) support on all Juno variants
3. Removed incorrect nesting of dtsi files
4. Removed untested USB hub only available on initial Juno R0 motherboard
5. Added ETR SMMU power domain and dma-ranges property
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Merge tag 'juno-updates-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/dt64
ARMv8 Vexpress/Juno DT updates for v4.11
1. Addition of Coresight support on Juno R1 and R2 variants
2. Addition of STM(System Trace Macrocell) support on all Juno variants
3. Removed incorrect nesting of dtsi files
4. Removed untested USB hub only available on initial Juno R0 motherboard
5. Added ETR SMMU power domain and dma-ranges property
* tag 'juno-updates-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
arm64: dts: juno: remove motherboard USB node
arm64: dts: juno: add ETR SMMU power domain
arm64: dts: juno: add dma-ranges property
arm64: dts: juno: add missing CoreSight STM component
arm64: dts: juno: add CoreSight support for Juno r1/r2 variants
arm64: dts: juno: refactor CoreSight support on Juno r0
arm64: dts: juno: remove dtsi nesting inside tree structure
Signed-off-by: Olof Johansson <olof@lixom.net>
Add pinctrl nodes for HDMI HPD and DDC pins modes for Amlogic Meson GXL
and GXBB SoCs.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
There is one blue LED on the front of the device. Keep it lit and
configure it as panic indicator.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This adds pinctrl group nodes for the CTS and RTS pins of each serial
controller. This makes it possible to enable the CTS and RTS pins which
are controlled by the serial controller hardware (through the meson_uart
driver).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Tested-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This adds the missing node for the uart_AO_B port to the meson-gx.dtsi
(as this is supported by GXBB, GXL and GXM) along with the required
pinctrl pins. This is required as some boards are using it (the boards
from the Khadas VIM series for example have it exposed on the pin
headers).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The "samsung,exynos5433-mipi-video-phy" and "samsung,exynos5250-dwusb3"
DT bindings don't specify a reg property for these nodes, so having a
unit name leads to the following DTC warnings:
Node /soc/video-phy@105c0710 has a unit name, but no reg property
Node /soc/usb@15400000 has a unit name, but no reg property
Node /soc/usb@15a00000 has a unit name, but no reg property
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
The first batch of Juno boards included a discrete USB controller chip
as a contingency in case of issues with the USB 2.0 IP integrated into
the SoC. As it turned out, the latter was fine, and to the best of my
knowledge the motherboard USB was never even brought up and validated.
Since this also isn't present on later boards, and uses a compatible
string undocumented and unmatched by any driver in the kernel, let's
just tidy it away for ever to avoid any confusion.
Acked-by: Liviu Dudau <Liviu.Dudau@arm.com>
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
It is not at all clear from the documentation, but straightforward to
determine in practice, that the ETR SMMU is actually in the DEBUGSYS
power domain. Add that to the DT so that anyone brave enough to enable
said SMMU doesn't experience a system lockup on boot, especially a
sneaky one which goes away as soon as you connect an external debugger
to have a look at where it's stuck (thus powering up DEBUGSYS by other
means and allowing it to make progress again before actually halting...)
Acked-by: Liviu Dudau <Liviu.Dudau@arm.com>
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
The interconnects around Juno have a 40-bit address width, and DMA
masters have no restrictions beyond their own individual limitations.
Describe this to ensure that DT-based DMA masks get set up correctly
for all devices capable of 40-bit addressing.
Acked-by: Liviu Dudau <Liviu.Dudau@arm.com>
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
This patch adds the missing CoreSight STM component definition to the
device tree of all the juno variants(r0,r1,r2)
STM component is connected to different funnels depending on Juno
platform variant.
Reviewed-and-tested-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mike Leach <mike.leach@linaro.org>
[sudeep.holla@arm.com: minor changelog update and reorganising the STM
node back into juno-base.dtsi to avoid duplication]
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
The CoreSight support added for Juno is valid for only Juno r0.
The Juno r1 and r2 variants have additional components and alternative
connection routes between trace source and sinks.
This patch builds on top of the existing r0 support and extends it to
Juno r1/r2 variants.
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mike Leach <mike.leach@linaro.org>
[sudeep.holla@arm.com: minor changelog update and major reorganisation of
the common coresight components back into juno-base.dtsi to avoid
duplication, also renamed funnel node names]
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Currently the Coresight components are supported only on Juno r0
variant. In preparation to add support to Juno r1/r2 variants, this
patch refactors the existing coresight device nodes so that r1/r2
support can be added easily.
It also cleans up some of the device node names which were previously
named so as they were confused as the labels rather than the node names.
Reviewed-and-tested-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Currently juno-clock.dtsi and juno-base.dtsi are nested badly inside
the device tree structure. It's generally good practice to ensure that
individual dtsi stand by themselves at the top of the file.
This patch removes the nesting of the above mentioned dtsi files and
makes them independent.
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
The current hardware is not able to run with all cores enabled at a
cluster frequency superior at 1536MHz.
But the currently shipped u-boot for the platform still reports an OPP
table with possible DVFS frequency up to 2GHz, and will not change since
the off-tree linux tree supports limiting the OPPs with a kernel parameter.
A recent u-boot change reports the boot-time DVFS around 100MHz and
the default performance cpufreq governor sets the maximum frequency.
Previous version of u-boot reported to be already at the max OPP and
left the OPP as is.
Nevertheless, other governors like ondemand could setup the max frequency
and make the system crash.
This patch disables the DVFS clock and disables cpufreq.
Fixes: 70db166a2b ("ARM64: dts: meson-gxbb: Add SCPI with cpufreq & sensors Nodes")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
- Correct license text which was mangled when switching to dual license
- Add SPI and I2C nodes on Armada 3700(driver support had been already
merged)
- Add support for the ethernet switch on the EspressoBin board (driver
support not yet merged)
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Merge tag 'mvebu-dt64-4.11-1' of git://git.infradead.org/linux-mvebu into next/dt64
mvebu dt64 for 4.11 (part 1)
- Correct license text which was mangled when switching to dual license
- Add SPI and I2C nodes on Armada 3700(driver support had been already
merged)
- Add support for the ethernet switch on the EspressoBin board (driver
support not yet merged)
* tag 'mvebu-dt64-4.11-1' of git://git.infradead.org/linux-mvebu:
ARM64: dts: marvell: Correct license text
arm64: dts: marvell: Add I2C definitions for the Armada 3700
arm64: dts: marvell: Enable spi0 on the board Armada-3720-db
arm64: dts: marvell: Add definition of SPI controller for Armada 3700
arm64: dts: marvell: Add ethernet switch definition for the ESPRESSObin
Signed-off-by: Olof Johansson <olof@lixom.net>
1. Add bus frequency and voltage scalling on Exynos5433 TM2 device (along with
necessary bus nodes and Platform Performance Monitoring Unit on Exynos5433).
2. Use macros for pinctrl settings on Exynos5433.
This contains necessary header with bindings.
3. Minor cleanups in Exynos5433 DTSI and boards using it.
4. Create common DTSI betweem Exynos5433 TM2E and TM2E.
5. Add HDMI/TV to Exynos5433 TM2.
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Merge tag 'samsung-dt64-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt64
Samsung DeviceTree ARM64 update for v4.11:
1. Add bus frequency and voltage scalling on Exynos5433 TM2 device (along with
necessary bus nodes and Platform Performance Monitoring Unit on Exynos5433).
2. Use macros for pinctrl settings on Exynos5433.
This contains necessary header with bindings.
3. Minor cleanups in Exynos5433 DTSI and boards using it.
4. Create common DTSI betweem Exynos5433 TM2E and TM2E.
5. Add HDMI/TV to Exynos5433 TM2.
* tag 'samsung-dt64-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos: Enable HDMI/TV path on Exynos5433-TM2
arm64: dts: exynos: Add HDMI node to Exynos5433
arm64: dts: exynos: Add DECON_TV node to Exynos5433
arm64: dts: exynos: Fix addresses in node names on Exynos5433
arm64: dts: exynos: Make TM2 and TM2E independent from each other
arm64: dts: exynos: Fix wrong values for ldo23 and ldo25 on TM2/TM2E
arm64: dts: exynos: Remove unsupported regulator-always-off property from TM2E
arm64: dts: exynos: Comply to the samsung pinctrl naming convention in TM2
arm64: dts: exynos: Use macros for pinctrl configuration on Exynos5433
pinctrl: dt-bindings: samsung: add drive strength macros for Exynos5433
arm64: dts: exynos: Add support of bus frequency using VDD_INT on Exynos5433 TM2
arm64: dts: exynos: Add bus nodes using VDD_INT for Exynos5433
arm64: dts: exynos: Add PPMU node to Exynos5433
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch adds support to volume-up key found on the board.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
96Boards specs require all GPIO signals to be at 1.8V.
Limit MPP4, which is PIN28 on J8, to 1.8V(L5).
Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
VOL/ZOOM+ button on DB410c is connected to
SoC GPIO 104. Add support for it.
Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds support to hdmi audio via adv7533.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Tested-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Fix typo in node name to reflect the correct pin name.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add the wcnss remoteproc node the SMD edge and the wcnss ctrl, bluetooth
and wifi nodes specified and enable this on db410c.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The rpmcc driver is providing the XO clock, which is the parent of almost
all clocks. But during boot, this driver may probe later and leave most of
the clocks without parent. The common clock framework currently reports
invalid rate for orphan clocks and this may confuse drivers.
To resolve this, use fixed clocks registration until we have some support
to deal with the this issue. Removing the generic rpmcc compatible is
enough to switch back to fixed factor XO clock.
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The structure rockchip_clk_provider needs to refer the GRF regmap
in somewhere, if the CRU node has not "rockchip,grf" property,
calling syscon_regmap_lookup_by_phandle will return an invalid GRF
regmap, and the MUXGRF type clock will be not supported.
Therefore, we need to add them.
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
According to [0], the contribution field for each cooling-device express
their relative power efficiency. Higher weights express higher power
efficiency. Weighting is relative such that if each cooling device has a
weight of 1 they are considered equal. This is particularly useful in
heterogeneous systems where two cooling devices may perform the same kind
of compute, but with different efficiency.
[0] Documentation/thermal/power_allocator.txt
According to Mediatek IC designer, the power efficiency ratio between the
LITTLE core cluster (cooling-device cpu0) and big core cluster
(cooling-device cpu1) is around 3:1 (3072:1024).
Signed-off-by: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
To support HDMI 4K resolution, mmsys need clcok
mm_sel to be 400MHz.
The board .dts file should override the clock rate
property with the higher VENCPLL frequency the board
supports HDMI 4K resolution.
Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Per the discussion of bug fix[1], we now actually
leaves the default clock choice for pcie phy is
derived from 24MHz OSC to guarantee the least BER.
So let's add aspm-no-l0s here and folks could delete
this property from their dts.
[1] https://patchwork.kernel.org/patch/9470519/
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
HDMI converts RGB/I80 signal from DECON_TV to HDMI/TMDS video stream.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Tested-by: Hoegeun Kwon <hoegeun.kwon@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
DECON_TV is 2nd display controller on Exynos5433, used in HDMI path
or 2nd DSI path.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Tested-by: Hoegeun Kwon <hoegeun.kwon@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
This adds the SCPI DVFS clock index and configures the CPU cores
accordingly.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Tested-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
SCPI and SRAM are identical on GXBB and GXL. Moving the corresponding
nodes to meson-gx adds support for the thermal sensor on GXL based
devices.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Tested-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
[khilman: add scpi_clocks label]
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Address should not contain 0x prefix.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Reviewed-by: Andi Shyti <andi.shyti@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
* Add PWM, and sound MIX and CTU support to r8a7795 SoC
* Add CAN, CAN FD and all MSIOF nodes to r8a7796 SoC
* Use Gen 3 fallback binding for i2c, msiof, PCIE and USB2 phy
* Enable Ethernet and 4 GiB memory on r8a7796/salvator-x board
* Add r8a7796/salvator-x board part number to bindings
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Merge tag 'renesas-arm64-dt-for-v4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt64
Renesas ARM64 Based SoC DT Updates for v4.11
* Add PWM, and sound MIX and CTU support to r8a7795 SoC
* Add CAN, CAN FD and all MSIOF nodes to r8a7796 SoC
* Use Gen 3 fallback binding for i2c, msiof, PCIE and USB2 phy
* Enable Ethernet and 4 GiB memory on r8a7796/salvator-x board
* Add r8a7796/salvator-x board part number to bindings
* tag 'renesas-arm64-dt-for-v4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
arm64: dts: r8a7795: Add PWM support
arm64: dts: r8a7796: Use R-Car Gen 3 fallback binding for msiof nodes
arm64: dts: r8a7796: salvator-x: Enable EthernetAVB
arm64: dts: renesas: r8a7796: Add EthernetAVB instance
arm64: dts: r8a7796: salvator-x: Update memory node to 4 GiB map
arm64: dts: r8a7796: Use R-Car Gen 3 fallback binding for i2c nodes
arm64: dts: r8a7795: Use R-Car Gen 3 fallback binding for i2c nodes
arm64: dts: r8a7795: Use Gen 3 fallback compat string for PCIE
arm64: dts: r8a7795: add sound MIX support
arm64: dts: r8a7795: add sound CTU support
arm64: dts: r8a7795: Use renesas,rcar-gen3-usb2-phy fallback binding
arm64: renesas: r8a7796/salvator-x: Add board part number to DT bindings
arm64: dts: r8a7796: Add CAN FD support
arm64: dts: r8a7796: Add CAN support
arm64: dts: r8a7796: Add CAN external clock support
arm64: dts: r8a7796: Add all MSIOF nodes
Signed-off-by: Olof Johansson <olof@lixom.net>
Tree-wide replacement was done by commit 2ef7d5f342 ("ARM, ARM64:
dts: drop "arm,amba-bus" in favor of "simple-bus"), then the 2nd
round by commit 15b7cc78f0 ("arm64: dts: drop "arm,amba-bus" in
favor of "simple-bus" part 2").
Here, some new users have appeared for Linux v4.10-rc1. Eliminate
them now.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
LS1012A features an advanced 64-bit ARM v8 CortexA53 processor
with 32 KB of parity protected L1-I cache, 32 KB of ECC protected
L1-D cache, as well as 256 KB of ECC protected L2 cache.
Features summary
One 64-bit ARM-v8 Cortex-A53 core with the following capabilities
- Arranged as a cluster of one core supporting a 256 KB L2 cache with ECC
protection
- Speed up to 800 MHz
- Parity-protected 32 KB L1 instruction cache and 32 KB L1 data cache
- Neon SIMD engine
- ARM v8 cryptography extensions
One 16-bit DDR3L SDRAM memory controller
ARM core-link CCI-400 cache coherent interconnect
Cryptography acceleration (SEC)
One Configurable x3 SerDes
One PCI Express Gen2 controller, supporting x1 operation
One serial ATA (SATA Gen 3.0) controller
One USB 3.0/2.0 controller with integrated PHY
Following levels of DTSI/DTS files have been created for the LS1012A
SoC family:
- fsl-ls1012a.dtsi:
DTS-Include file for FSL LS1012A SoC.
- fsl-ls1012a-frdm.dts:
DTS file for FSL LS1012A FRDM board.
- fsl-ls1012a-qds.dts:
DTS file for FSL LS1012A QDS board.
- fsl-ls1012a-rdb.dts:
DTS file for FSL LS1012A RDB board.
Signed-off-by: Harninder Rai <harninder.rai@nxp.com>
Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Currently TM2E dts includes TM2 but there are some differences
between the two boards and TM2 has some properties that TM2E
doesn't have.
That's why it's important to keep the two dts files independent
and put all the commonalities in a tm2-common.dtsi file.
At the current status the only two differences between the two
dts files (besides the board name) are ldo31 and ldo38.
Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
This patch fixes wrong values assigned to ldo23 and ldo25 on both TM2 and TM2E.
Fixes: 01e5d23521 ("arm64: dts: exynos: Add dts file for Exynos5433-based TM2 board")
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Per the errata of TRM, rk3399 won't support gen2 from
now on, so let's set max-link-speed to 1 in order not
to doing training for gen2.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Change the PIN() macro definition so that it can use the macros
from pinctrl/samsung.h header file.
Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Use the macros defined in include/dt-bindings/pinctrl/samsung.h
instead of hardcoded values.
Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
A64 has a MUSB controller wired to the USB PHY 0, which is connected
to the upper USB Type-A port of Pine64.
As the port is a Type-A female port, enable it in host-only mode in the
device tree, which makes devices with USB Type-A male port can work on
this port (which is originally designed by Pine64 team).
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Allwinner A64 SoC has a MUSB controller like the one in A33, so add
a node for it, just use the compatible of A33 MUSB.
Host mode is tested to work properly on Pine64 and will be added into
the device tree of Pine64 in next patch.
Peripheral mode is also tested on Pine64, by changing dr_mode property
of usb_otg node and use a non-standard USB Type-A to Type-A cable.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Pine64 have two USB Type-A ports, which are wired to the two ports of
A64 USB PHY, and the lower port is the EHCI/OHCI1 port.
Enable the necessary nodes to enable the lower USB port to work.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
In this dts file, uart0 node is put before i2c1.
Move the uart0 node to the end to satisfy alphebetical order.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Allwinner A64 have two HCI USB controllers, a OTG controller and a USB
PHY device which have two ports. One of the port is wired to both a HCI
USB controller and the OTG controller, which is currently not supported.
The another one is only wired to a HCI controller, and the device node of
OHCI/EHCI controller of the port can be added now.
Also the A64 USB PHY device node is also added for the HCI controllers to
work.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
- DT: GXL: fix GPIO include
- add DT and defconfig for newly merged DRM driver
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Merge tag 'amlogic-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into fixes
Pull "Amlogic fixes for v4.10" from Kevin Hilman:
- DT: GXL: fix GPIO include
- add DT and defconfig for newly merged DRM driver
This pull has one real fix, as a couple non-critical ones. The DRM
DT/defconfig patches are coming now because I didn't expect the new
driver to make it for the v4.10 merge window, but since it did[1], the
DT and defconfig should go into the same release.
[1] bbbe775ec5 drm: Add support for Amlogic Meson Graphic Controller
* tag 'amlogic-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
ARM64: defconfig: enable DRM_MESON as module
ARM64: dts: meson-gx: Add Graphic Controller nodes
ARM64: dts: meson-gxl: fix GPIO include
A simple fix to extend GICv2 CPU interface registers from 4K to 8K
on AEMv8 FVP/RTSM models in order to support split priority drop and
interrupt deactivation.
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Merge tag 'juno-fixes-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into fixes
Pull "ARMv8 Juno/VExpress fixes for v4.10" from Sudeep Holla:
A simple fix to extend GICv2 CPU interface registers from 4K to 8K
on AEMv8 FVP/RTSM models in order to support split priority drop and
interrupt deactivation.
* tag 'juno-fixes-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
arm64: dts: vexpress: Support GICC_DIR operations
* Provide sd0_uhs node
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Merge tag 'renesas-fixes-for-v4.10' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes
Renesas ARM Based SoC Fixes for v4.10
* Provide sd0_uhs node
* tag 'renesas-fixes-for-v4.10' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
arm64: dts: h3ulcb: Provide sd0_uhs node
Add the 7 PWM channels to the r8a7795 device tree, in the disabled
state.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The BCM958712DxXMC board is a smaller form factor typically used as
controller boards for switches. This smaller board has less devices
pinned out, so only a few need be populated in the device tree.
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Nitro firmware is loaded into memory by the bootloader at a specific
location. Set this memory range aside to prevent the kernel from using
it.
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
This enables the PAXC based PCIe root complex on NS2 SVK. The PAXC based
root complex is connected to internally emulated PCIe endpoints
Signed-off-by: Ray Jui <rjui@broadcom.com>
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
PAXB and PAXC PCIe interfaces on NS2 have been using the iProc event
queue to handle MSI. With the gicv2m support ready, we should now switch
to gicv2m for MSI handling
Signed-off-by: Ray Jui <ray.jui@broadcom.com>
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Add Video Processing Unit and CVBS Output nodes, and enable CVBS on selected
boards.
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The license text has been mangled at some point then copy pasted across
multiple files. Restore it to what it should be.
Note that this is not intended as a license change.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The Armada 3700 has two i2c bus interface units, this commit adds the
definitions of the corresponding device nodes. It also enables the node
on the development board for this SoC.
Signed-off-by: Romain Perier <romain.perier@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
This commit enables the device node spi0 on the official development
board for the Marvell Armada 3700. It also adds sub-node for the 128Mb
SPI-NOR present on the board.
Signed-off-by: Romain Perier <romain.perier@free-electrons.com>
Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Armada 3700 SoC has an SPI Controller, this commit adds the definition
of the SPI device node at the SoC level.
Signed-off-by: Romain Perier <romain.perier@free-electrons.com>
Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
This defines and enables the Marvell ethernet switch MVE886341 on the
Marvell ESPRESSObin board.
Signed-off-by: Romain Perier <romain.perier@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Use recently added R-Car Gen 3 fallback binding for msiof nodes in
DT for r8a7796 SoC.
This has no run-time effect for the current driver as the initialisation
sequence is the same for the SoC-specific binding for r8a7796 and the
fallback binding for R-Car Gen 3.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
This patch updates memory region:
- After changes, the new map of the Salvator-X board on R8A7796 SoC
Bank0: 2GiB RAM : 0x000048000000 -> 0x000bfffffff
Bank1: 2GiB RAM : 0x000600000000 -> 0x0067fffffff
- Before changes, the old map looked like this:
Bank0: 2GiB RAM : 0x000048000000 -> 0x000bfffffff
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[geert: Correct size of old map]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Use recently added R-Car Gen 3 fallback binding for i2c nodes in
DT for r8a7796 SoC.
This has no run-time effect for the current driver as the initialisation
sequence is the same for the SoC-specific binding for r8a7796 and the
fallback binding for R-Car Gen 3.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Use recently added R-Car Gen 3 fallback binding for i2c nodes in
DT for r8a7795 SoC.
This has no run-time effect for the current driver as the initialisation
sequence is the same for the SoC-specific binding for r8a7795 and the
fallback binding for R-Car Gen 3.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Use recently added en 3 fallback compat string for PCIE
in r8a7795 DT.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
This patch adds CTU (= Channel Transfer Unit) support which is needed
to sound mixing.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
A fallback binding for the Renesas R-Car Gen3 for USB2.0 PHY driver was
added by commit cde7bc367f ("phy: rcar-gen3-usb2: add fallback binding").
This patch makes use of this binding in the DT for the r8a7795 SoC.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Adds CAN FD controller node for r8a7796.
Based on a patch for r8a7795 by Ramesh Shanmugasundaram.
Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Marc Kleine-Budde <mkl@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Adds CAN controller nodes for r8a7796.
Based on a patch for r8a7795 by Ramesh Shanmugasundaram.
Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Marc Kleine-Budde <mkl@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Adds external CAN clock node for r8a7796. This clock can be used as
fCAN clock of CAN and CAN FD controller.
Based on a patch for r8a7795 by Ramesh Shanmugasundaram.
Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the device nodes for all MSIOF SPI controllers.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch adds the CPU clock phandle in CPU's node
and uses operating-points-v2 to register operating points.
So it can be used by cpufreq-dt driver.
Signed-off-by: Baoyou Xie <baoyou.xie@linaro.org>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Reviewed-by: Jun Nie <jun.nie@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
pca9547 won't probed since its status property is disabled.
while there are devices connected to it, we need remove status
property to let ds3232 and adt7461 probed correctly.
Signed-off-by: Meng Yi <meng.yi@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This patch adds the bus Device-tree nodes for INT (Internal) block
and enables the bus frequency scaling.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
This patch adds the AMBA AXI bus nodes using VDD_INT for Exynos5433 SoC.
Following list specify the detailed correlation between sub-block and clock:
- CLK_ACLK_G2D_{400|266} : Bus clock for G2D (2D graphic engine)
- CLK_ACLK_MSCL_400 : Bus clock for MSCL (Memory to memory Scaler)
- CLK_ACLK_GSCL_333 : Bus clock for GSCL (General Scaler)
- CLK_SCLK_JPEG_MSCL : Bus clock for JPEG
- CLK_ACLK_MFC_400 : Bus clock for MFC (Multi Format Codec)
- CLK_ACLK_HEVC_400 : Bus clock for HEVC (High Efficient Video Codec)
- CLK_ACLK_BUS0_400 : NoC's (Network On Chip) bus clock for PERIC/PERIS/FSYS/MSCL
- CLK_ACLK_BUS1_400 : NoC's bus clock for MFC/HEVC/G3D
- CLK_ACLK_BUS2_400 : NoC's bus clock for GSCL/DISP/G2D/CAM0/CAM1/ISP
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
This patch adds PPMU (Platform Performance Monitoring Unit) Device-tree node
to measure the utilization of each IP in Exynos SoC.
- PPMU_D{0|1}_CPU are used to measure the utilization of MIF (Memory Interface)
block with VDD_MIF power source.
- PPMU_D{0|1}_GENERAL are used to measure the utilization of INT(Internal)
block with VDD_INT power source.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Use macros to describe gpios will make the dts easier to
read and write.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
[converted interrupt-gpios and new rk3399-evb backlight]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
We found that the suspend process was blocked when it run into
ehci/ohci module due to clk-480m of usb2-phy was disabled.
The root cause is that usb2-phy suspended earlier than ehci/ohci
(usb2-phy will be auto suspended if no devices plug-in). and the
clk-480m provided by it was disabled if no module used. However,
some suspend process related ehci/ohci are base on this clock,
so we should refer it into ehci/ohci driver to prevent this case.
The u2phy clock flow like this:
===
u2phy ________________
| | |-----> UTMI_CLK ---------> | EHCI |
OSC_24M ---|---> PHY_PLL----|----|
|________^_______| |-----> 480M_CLK ---|G|---> | USBPHY_480M_SRC| ----> USBPHY_480M for SoC
|
|
GRF
===
Signed-off-by: William wu <wulf@rock-chips.com>
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
We haven't enabled eDP support yet, but we might as well describe the
pin now.
Signed-off-by: Brian Norris <briannorris@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
We're going to need to amend this table in board files.
Signed-off-by: Brian Norris <briannorris@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The Zynq Ultrascale MP uses version 1.4 of the Cadence IP core
which fixes some silicon bugs that needed software workarounds
in Version 1.0 that was used on Zynq systems.
Signed-off-by: Moritz Fischer <mdf@kernel.org>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Sören Brinkmann <soren.brinkmann@xilinx.com>
Cc: Rob Herring <robh+dt@kernel.org>
Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The patch removes these warnings reported by dtc 1.4:
Warning (unit_address_vs_reg): Node /amba_apu has a reg or ranges
property, but no unit name
Warning (unit_address_vs_reg): Node /memory has a reg or ranges
property, but no unit name
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The GICv2 CPU interface registers span across 8K, not 4K as indicated in
the DT. Only the GICC_DIR register is located after the initial 4K
boundary, leaving a functional system but without support for separately
EOI'ing and deactivating interrupts.
After this change the system supports split priority drop and interrupt
deactivation. This patch is based on similar one from Christoffer Dall:
commit 368400e242 ("ARM: dts: vexpress: Support GICC_DIR operations")
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
This patch adds required memory carveouts so that the kernel does not
access memory that is in use or has been reserved for use by other remote
processors.
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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Merge tag 'media/v4.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media
Pull media updates from Mauro Carvalho Chehab:
- new Mediatek drivers: mtk-mdp and mtk-vcodec
- some additions at the media documentation
- the CEC core and drivers were promoted from staging to mainstream
- some cleanups at the DVB core
- the LIRC serial driver got promoted from staging to mainstream
- added a driver for Renesas R-Car FDP1 driver
- add DVBv5 statistics support to mn88473 driver
- several fixes related to printk continuation lines
- add support for HSV encoding formats
- lots of other cleanups, fixups and driver improvements.
* tag 'media/v4.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media: (496 commits)
[media] v4l: tvp5150: Add missing break in set control handler
[media] v4l: tvp5150: Don't inline the tvp5150_selmux() function
[media] v4l: tvp5150: Compile tvp5150_link_setup out if !CONFIG_MEDIA_CONTROLLER
[media] em28xx: don't store usb_device at struct em28xx
[media] em28xx: use usb_interface for dev_foo() calls
[media] em28xx: don't change the device's name
[media] mn88472: fix chip id check on probe
[media] mn88473: fix chip id check on probe
[media] lirc: fix error paths in lirc_cdev_add()
[media] s5p-mfc: Add support for MFC v8 available in Exynos 5433 SoCs
[media] s5p-mfc: Rework clock handling
[media] s5p-mfc: Don't keep clock prepared all the time
[media] s5p-mfc: Kill all IS_ERR_OR_NULL in clocks management code
[media] s5p-mfc: Remove dead conditional code
[media] s5p-mfc: Ensure that clock is disabled before turning power off
[media] s5p-mfc: Remove special clock rate management
[media] s5p-mfc: Use printk_ratelimited for reporting ioctl errors
[media] s5p-mfc: Set DMA_ATTR_ALLOC_SINGLE_PAGES
[media] vivid: Set color_enc on HSV formats
[media] v4l2-tpg: Init hv_enc field with a valid value
...
A couple of interesting new SoC platforms are now supported, these are
the respective DTS sources:
- Samsung Exynos5433 mobile phone platform, including an (almost) fully
supported phone reference board.
- Hisilicon Hip07 server platform and D05 board, the latest iteration
of their product line, now with 64 Cortex-A72 cores across two
sockets.
- Allwinner A64 SoC, the first 64-bit chip from their "sunxi" product
line, used in Android tablets and ultra-cheap development boards
- NXP LS1046A Communication processor, improving on the earlier LS1043A
with faster CPU cores
- Qualcomm MSM8992 (Snapdragon 808) and MSM8994 (Snapdragon 810)
mobile phone SoCs
- Early support for the Nvidia Tegra Tegra186 SoC
- Amlogic S905D is a minor variant of their existing Android consumer
product line
- Rockchip PX5 automotive platform, a close relative of their popular
rk3368 Android tablet chips
Aside from the respective evaluation platforms for the above
chips, there are only a few consumer devices and boards added
this time:
- Huawei Nexus 6P (Angler) mobile phone
- LG Nexus 5x (Bullhead) mobile phone
- Nexbox A1 and A95X Android TV boxes
- Pine64 development board based on Allwinner A64
- Globalscale Marvell ESPRESSOBin community board based on Armada 3700
- Renesas "R-Car Starter Kit Pro" (M3ULCB) low-cost automotive board
For the existing platforms, we get bug fixes and new peripheral support
for Juno, Renesas, Uniphier, Amlogic, Samsung, Broadcom, Rockchip, Berlin,
and ZTE.
Conflicts:
- Documentation/devicetree/bindings/arm/shmobile.txt: a
rename/add conflict, keep both modifications and maintain
alphabetical ordering.
- arch/arm64/boot/dts/*/*.dtsi: nodes were added in netdev,
mmc and clk, keep both sides in each case.
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Merge tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM 64-bit DT updates from Arnd Bergmann:
"A couple of interesting new SoC platforms are now supported, these are
the respective DTS sources:
- Samsung Exynos5433 mobile phone platform, including an (almost)
fully supported phone reference board.
- Hisilicon Hip07 server platform and D05 board, the latest iteration
of their product line, now with 64 Cortex-A72 cores across two
sockets.
- Allwinner A64 SoC, the first 64-bit chip from their "sunxi" product
line, used in Android tablets and ultra-cheap development boards
- NXP LS1046A Communication processor, improving on the earlier
LS1043A with faster CPU cores
- Qualcomm MSM8992 (Snapdragon 808) and MSM8994 (Snapdragon 810)
mobile phone SoCs
- Early support for the Nvidia Tegra Tegra186 SoC
- Amlogic S905D is a minor variant of their existing Android consumer
product line
- Rockchip PX5 automotive platform, a close relative of their popular
rk3368 Android tablet chips
Aside from the respective evaluation platforms for the above chips,
there are only a few consumer devices and boards added this time:
- Huawei Nexus 6P (Angler) mobile phone
- LG Nexus 5x (Bullhead) mobile phone
- Nexbox A1 and A95X Android TV boxes
- Pine64 development board based on Allwinner A64
- Globalscale Marvell ESPRESSOBin community board based on Armada 3700
- Renesas "R-Car Starter Kit Pro" (M3ULCB) low-cost automotive board
For the existing platforms, we get bug fixes and new peripheral
support for Juno, Renesas, Uniphier, Amlogic, Samsung, Broadcom,
Rockchip, Berlin, and ZTE"
* tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (168 commits)
arm64: dts: fix build errors from missing dependencies
ARM64: dts: meson-gxbb: add SCPI pre-1.0 compatible
ARM64: dts: meson-gxl: Add support for Nexbox A95X
ARM64: dts: meson-gxm: Add support for the Nexbox A1
ARM: dts: artpec: add pcie support
arm64: dts: berlin4ct-dmp: add missing unit name to /memory node
arm64: dts: berlin4ct-stb: add missing unit name to /memory node
arm64: dts: berlin4ct: add missing unit name to /soc node
arm64: dts: qcom: msm8916: Add ddr support to sdhc1
arm64: dts: exynos: Enable HS400 mode for eMMC for TM2
ARM: dts: Add xo to sdhc clock node on qcom platforms
ARM64: dts: Add support for Meson GXM
dt-bindings: add rockchip RK1108 Evaluation board
arm64: dts: NS2: Add PCI PHYs
arm64: dts: NS2: enable sdio1
arm64: dts: exynos: Add the mshc_2 node for supporting T-Flash
arm64: tegra: Add NVIDIA P2771 board support
arm64: tegra: Enable PSCI on P3310
arm64: tegra: Add NVIDIA P3310 processor module support
arm64: tegra: Add GPIO controllers on Tegra186
...
Lots of changes as usual, so I'm trying to be brief here. Most of the
new hardware support has the respective driver changes merged through
other trees or has had it available for a while, so this is where things
come together.
We get a DT descriptions for a couple of new SoCs, all of them variants
of other chips we already support, and usually coming with a new
evaluation board:
- Oxford semiconductor (now Broadcom) OX820 SoC for NAS devices
- Qualcomm MDM9615 LTE baseband
- NXP imx6ull, the latest and smallest i.MX6 application processor variant
- Renesas RZ/G (r8a7743 and r8a7745) application processors
- Rockchip PX3, a variant of the rk3188 chip used in Android tablets
- Rockchip rk1108 single-core application processor
- ST stm32f746 Cortex-M7 based microcontroller
- TI DRA71x automotive processors
These are commercially available consumer platforms we now support:
- Motorola Droid 4 (xt894) mobile phone
- Rikomagic MK808 Android TV stick based on Rockchips rx3066
- Cloud Engines PogoPlug v3 based on OX820
- Various Broadcom based wireless devices:
- Netgear R8500 router
- Tenda AC9 router
- TP-LINK Archer C9 V1
- Luxul XAP-1510 Access point
- Turris Omnia open hardware router based on Armada 385
And a couple of new boards targeted at developers, makers
or industrial integration:
- Macnica Sodia development platform for Altera socfpga (Cyclone V)
- MicroZed board based on Xilinx Zynq FPGA platforms
- TOPEET itop/elite based on exynos4412
- WP8548 MangOH Open Hardware platform for IOT, based on
Qualcomm MDM9615
- NextThing CHIP Pro gadget
- NanoPi M1 development board
- AM571x-IDK industrial board based on TI AM5718
- i.MX6SX UDOO Neo
- Boundary Devices Nitrogen6_SOM2 (i.MX6)
- Engicam i.CoreM6
- Grinn i.MX6UL liteSOM/liteBoard
- Toradex Colibri iMX6 module
Other changes:
- added peripherals on renesas, davinci, stm32f429, uniphier, sti,
mediatek, integrator, at91, imx, vybrid, ls1021a, omap, qualcomm,
mvebu, allwinner, broadcom, exynos, zynq
- Continued fixes for W=1 dtc warnings
- The old STiH415/416 SoC support gets removed, these never made it into
products and have served their purpose in the kernel as a template
for teh newer chips from ST
- The exynos4415 dtsi file is removed as nothing uses it.
- Intel PXA25x can now be booted using devicetree
Conflicts:
arch/arm/boot/dts/r8a*.dtsi: a node was added
the clk tree, keep both sides and watch out for git
dropping the required '};' at the end of each side.
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM DT updates from Arnd Bergmann:
"Lots of changes as usual, so I'm trying to be brief here. Most of the
new hardware support has the respective driver changes merged through
other trees or has had it available for a while, so this is where
things come together.
We get a DT descriptions for a couple of new SoCs, all of them
variants of other chips we already support, and usually coming with a
new evaluation board:
- Oxford semiconductor (now Broadcom) OX820 SoC for NAS devices
- Qualcomm MDM9615 LTE baseband
- NXP imx6ull, the latest and smallest i.MX6 application processor variant
- Renesas RZ/G (r8a7743 and r8a7745) application processors
- Rockchip PX3, a variant of the rk3188 chip used in Android tablets
- Rockchip rk1108 single-core application processor
- ST stm32f746 Cortex-M7 based microcontroller
- TI DRA71x automotive processors
These are commercially available consumer platforms we now support:
- Motorola Droid 4 (xt894) mobile phone
- Rikomagic MK808 Android TV stick based on Rockchips rx3066
- Cloud Engines PogoPlug v3 based on OX820
- Various Broadcom based wireless devices:
- Netgear R8500 router
- Tenda AC9 router
- TP-LINK Archer C9 V1
- Luxul XAP-1510 Access point
- Turris Omnia open hardware router based on Armada 385
And a couple of new boards targeted at developers, makers or
industrial integration:
- Macnica Sodia development platform for Altera socfpga (Cyclone V)
- MicroZed board based on Xilinx Zynq FPGA platforms
- TOPEET itop/elite based on exynos4412
- WP8548 MangOH Open Hardware platform for IOT, based on Qualcomm MDM9615
- NextThing CHIP Pro gadget
- NanoPi M1 development board
- AM571x-IDK industrial board based on TI AM5718
- i.MX6SX UDOO Neo
- Boundary Devices Nitrogen6_SOM2 (i.MX6)
- Engicam i.CoreM6
- Grinn i.MX6UL liteSOM/liteBoard
- Toradex Colibri iMX6 module
Other changes:
- added peripherals on renesas, davinci, stm32f429, uniphier, sti,
mediatek, integrator, at91, imx, vybrid, ls1021a, omap, qualcomm,
mvebu, allwinner, broadcom, exynos, zynq
- Continued fixes for W=1 dtc warnings
- The old STiH415/416 SoC support gets removed, these never made it
into products and have served their purpose in the kernel as a
template for teh newer chips from ST
- The exynos4415 dtsi file is removed as nothing uses it.
- Intel PXA25x can now be booted using devicetree"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (422 commits)
arm: dts: zynq: Add MicroZed board support
ARM: dts: da850: enable high speed for mmc
ARM: dts: da850: Add node for pullup/pulldown pinconf
ARM: dts: da850: enable memctrl and mstpri nodes per board
ARM: dts: da850-lcdk: Add ethernet0 alias to DT
ARM: dts: artpec: add pcie support
ARM: dts: add support for Turris Omnia
devicetree: Add vendor prefix for CZ.NIC
ARM: dts: berlin2q-marvell-dmp: fix typo in chosen node
ARM: dts: berlin2q-marvell-dmp: fix regulators' name
ARM: dts: Add xo to sdhc clock node on qcom platforms
ARM: dts: r8a7794: Add device node for PRR
ARM: dts: r8a7793: Add device node for PRR
ARM: dts: r8a7792: Add device node for PRR
ARM: dts: r8a7791: Add device node for PRR
ARM: dts: r8a7790: Add device node for PRR
ARM: dts: r8a7779: Add device node for PRR
ARM: dts: r8a73a4: Add device node for PRR
ARM: dts: sk-rzg1e: add Ether support
ARM: dts: sk-rzg1e: initial device tree
...
As usual, we queue up a few fixes that don't seem urgent enough to go in
through -rc, or that just came a little too late given their size.
The zx fixes make the platform finally boot on real hardware, the
davinci and imx31 get the DT support working better for some of
the machines that are still normally used with classic board files.
One tegra fix is important for new bootloader versions, but the
bug has been around for a while without anyone noticing.
The other changes are mostly cosmetic.
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Merge tag 'armsoc-fixes-nc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC non-urgent fixes from Arnd Bergmann:
"As usual, we queue up a few fixes that don't seem urgent enough to go
in through -rc, or that just came a little too late given their size.
The zx fixes make the platform finally boot on real hardware, the
davinci and imx31 get the DT support working better for some of the
machines that are still normally used with classic board files. One
tegra fix is important for new bootloader versions, but the bug has
been around for a while without anyone noticing.
The other changes are mostly cosmetic"
* tag 'armsoc-fixes-nc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (22 commits)
arm64: tegra: Add missing Smaug revision
arm64: tegra: Add VDD_GPU regulator to Jetson TX1
arm64: dts: zte: clean up gic-v3 redistributor properties
arm64: dts: zx: Fix gic GICR property
bus: vexpress-config: fix device reference leak
soc: ti: qmss: fix the case when !SMP
ARM: lpc32xx: drop duplicate header device.h
ARM: ixp4xx: drop duplicate header gpio.h
ARM: socfpga: fix spelling mistake in error message
ARM: dts: imx6q-cm-fx6: fix fec pinctrl
ARM: dts: imx7d-pinfunc: fix UART pinmux defines
ARM: dts: imx6qp: correct LDB clock inputs
ARM: OMAP2+: pm-debug: Use seq_putc() in two functions
ARM: OMAP2+: Remove the omapdss_early_init_of() function
mfd: tps65217: Fix mismatched interrupt number
ARM: zx: Fix error handling
ARM: spear: Fix error handling
ARM: davinci: da850: Fix pwm name matching
ARM: clk: imx31: properly init clocks for machines with DT
clk: imx31: fix rewritten input argument of mx31_clocks_init()
...
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Merge tag 'pci-v4.10-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci
Pull PCI updates from Bjorn Helgaas:
"PCI changes:
- add support for PCI on ARM64 boxes with ACPI. We already had this
for theoretical spec-compliant hardware; now we're adding quirks
for the actual hardware (Cavium, HiSilicon, Qualcomm, X-Gene)
- add runtime PM support for hotplug ports
- enable runtime suspend for Intel UHCI that uses platform-specific
wakeup signaling
- add yet another host bridge registration interface. We hope this is
extensible enough to subsume the others
- expose device revision in sysfs for DRM
- to avoid device conflicts, make sure any VF BAR updates are done
before enabling the VF
- avoid unnecessary link retrains for ASPM
- allow INTx masking on Mellanox devices that support it
- allow access to non-standard VPD for Chelsio devices
- update Broadcom iProc support for PAXB v2, PAXC v2, inbound DMA,
etc
- update Rockchip support for max-link-speed
- add NVIDIA Tegra210 support
- add Layerscape LS1046a support
- update R-Car compatibility strings
- add Qualcomm MSM8996 support
- remove some uninformative bootup messages"
* tag 'pci-v4.10-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (115 commits)
PCI: Enable access to non-standard VPD for Chelsio devices (cxgb3)
PCI: Expand "VPD access disabled" quirk message
PCI: pciehp: Remove loading message
PCI: hotplug: Remove hotplug core message
PCI: Remove service driver load/unload messages
PCI/AER: Log AER IRQ when claiming Root Port
PCI/AER: Log errors with PCI device, not PCIe service device
PCI/AER: Remove unused version macros
PCI/PME: Log PME IRQ when claiming Root Port
PCI/PME: Drop unused support for PMEs from Root Complex Event Collectors
PCI: Move config space size macros to pci_regs.h
x86/platform/intel-mid: Constify mid_pci_platform_pm
PCI/ASPM: Don't retrain link if ASPM not possible
PCI: iproc: Skip check for legacy IRQ on PAXC buses
PCI: pciehp: Leave power indicator on when enabling already-enabled slot
PCI: pciehp: Prioritize data-link event over presence detect
PCI: rcar: Add gen3 fallback compatibility string for pcie-rcar
PCI: rcar: Use gen2 fallback compatibility last
PCI: rcar-gen2: Use gen2 fallback compatibility last
PCI: rockchip: Move the deassert of pm/aclk/pclk after phy_init()
..
* patchwork: (496 commits)
[media] v4l: tvp5150: Add missing break in set control handler
[media] v4l: tvp5150: Don't inline the tvp5150_selmux() function
[media] v4l: tvp5150: Compile tvp5150_link_setup out if !CONFIG_MEDIA_CONTROLLER
[media] em28xx: don't store usb_device at struct em28xx
[media] em28xx: use usb_interface for dev_foo() calls
[media] em28xx: don't change the device's name
[media] mn88472: fix chip id check on probe
[media] mn88473: fix chip id check on probe
[media] lirc: fix error paths in lirc_cdev_add()
[media] s5p-mfc: Add support for MFC v8 available in Exynos 5433 SoCs
[media] s5p-mfc: Rework clock handling
[media] s5p-mfc: Don't keep clock prepared all the time
[media] s5p-mfc: Kill all IS_ERR_OR_NULL in clocks management code
[media] s5p-mfc: Remove dead conditional code
[media] s5p-mfc: Ensure that clock is disabled before turning power off
[media] s5p-mfc: Remove special clock rate management
[media] s5p-mfc: Use printk_ratelimited for reporting ioctl errors
[media] s5p-mfc: Set DMA_ATTR_ALLOC_SINGLE_PAGES
[media] vivid: Set color_enc on HSV formats
[media] v4l2-tpg: Init hv_enc field with a valid value
...
Pull crypto updates from Herbert Xu:
"Here is the crypto update for 4.10:
API:
- add skcipher walk interface
- add asynchronous compression (acomp) interface
- fix algif_aed AIO handling of zero buffer
Algorithms:
- fix unaligned access in poly1305
- fix DRBG output to large buffers
Drivers:
- add support for iMX6UL to caam
- fix givenc descriptors (used by IPsec) in caam
- accelerated SHA256/SHA512 for ARM64 from OpenSSL
- add SSE CRCT10DIF and CRC32 to ARM/ARM64
- add AEAD support to Chelsio chcr
- add Armada 8K support to omap-rng"
* 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (148 commits)
crypto: testmgr - fix overlap in chunked tests again
crypto: arm/crc32 - accelerated support based on x86 SSE implementation
crypto: arm64/crc32 - accelerated support based on x86 SSE implementation
crypto: arm/crct10dif - port x86 SSE implementation to ARM
crypto: arm64/crct10dif - port x86 SSE implementation to arm64
crypto: testmgr - add/enhance test cases for CRC-T10DIF
crypto: testmgr - avoid overlap in chunked tests
crypto: chcr - checking for IS_ERR() instead of NULL
crypto: caam - check caam_emi_slow instead of re-lookup platform
crypto: algif_aead - fix AIO handling of zero buffer
crypto: aes-ce - Make aes_simd_algs static
crypto: algif_skcipher - set error code when kcalloc fails
crypto: caam - make aamalg_desc a proper module
crypto: caam - pass key buffers with typesafe pointers
crypto: arm64/aes-ce-ccm - Fix AEAD decryption length
MAINTAINERS: add crypto headers to crypto entry
crypt: doc - remove misleading mention of async API
crypto: doc - fix header file name
crypto: api - fix comment typo
crypto: skcipher - Add separate walker for AEAD decryption
..
Here's the big set of USB/PHY patches for 4.10-rc1.
A number of new drivers are here in this set of changes. We have a new
USB controller type "mtu3", a new usb-serial driver, and the usual churn
in the gadget subsystem and the xhci host controller driver, along with
a few other new small drivers added. And lots of little other changes
all over the USB and PHY driver tree. Full details are in the shortlog
All of these have been in linux-next for a while with no reported
issues.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'usb-4.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb
Pull USB/PHY updates from Greg KH:
"Here's the big set of USB/PHY patches for 4.10-rc1.
A number of new drivers are here in this set of changes. We have a new
USB controller type "mtu3", a new usb-serial driver, and the usual
churn in the gadget subsystem and the xhci host controller driver,
along with a few other new small drivers added. And lots of little
other changes all over the USB and PHY driver tree. Full details are
in the shortlog
All of these have been in linux-next for a while with no reported
issues"
* tag 'usb-4.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (309 commits)
USB: serial: option: add dlink dwm-158
USB: serial: option: add support for Telit LE922A PIDs 0x1040, 0x1041
USB: OHCI: nxp: fix code warnings
USB: OHCI: nxp: remove useless extern declaration
USB: OHCI: at91: remove useless extern declaration
usb: misc: rio500: fix result type for error message
usb: mtu3: fix U3 port link issue
usb: mtu3: enable auto switch from U3 to U2
usbip: fix warning in vhci_hcd_probe/lockdep_init_map
usb: core: usbport: Use proper LED API to fix potential crash
usbip: add missing compile time generated files to .gitignore
usb: hcd.h: construct hub class request constants from simpler constants
USB: OHCI: ohci-pxa27x: remove useless functions
USB: OHCI: omap: remove useless extern declaration
USB: OHCI: ohci-omap: remove useless functions
USB: OHCI: ohci-s3c2410: remove useless functions
USB: cdc-acm: add device id for GW Instek AFG-125
fsl/usb: Workarourd for USB erratum-A005697
usb: hub: Wait for connection to be reestablished after port reset
usbip: vudc: Refactor init_vudc_hw() to be more obvious
...
framework. The only patch that can even be considered "core" adds another
clk_get() variant. The rest of the changes are in drivers for various SoCs, and
we have a few bits for ARM shmobile architecture code (dts and mach) due to the
dependency we're breaking between shmobile architecture code and its clk
driver. Those shmobile bits have also been pulled into arm-soc tree. Here's the
summary:
Core:
- Support for devm_get_clk_from_child() used with DT bindings that have
subnodes with the 'clocks' property
New Drivers:
- Allwinner A64 (sun50i)
- i.MX imx6ull
- Socionext's UniPhier SoC CPUs
- Mediatek MT2701 SoCs
- Rockchip rk1108 SoCs
- Qualcomm MSM8994/MSM8992 SoCS
- Qualcomm RPM Clocks
- Hisilicon Hi3516CV300 and Hi3798CV200 CRG
- Oxford Semiconductor OX820 and OX810SE SoCs
- Renesas RZ/G1M and RZ/GIE SoCs
- Renesas R-Car RST driver for mode pin states
Updates:
- Four Allwinner SoCs are migrated to the new style clk driver
- Rockchip rk3399,rk3066 PLL optimizations
- i.MX LVDS display glitch fixes and AV PLL precision improvements
- Qualcomm MSM8996 GPU GDSCs, hw controlled GDSCs, and Alpha PLL support
- Explicit demodularization of always builtin drivers
- Freescale Qoriq ls1012a and ls1046a support
- Exynos 5433 parent typo fix and critical clock tagging
- Renesas r8a7743/r8a7745 CPG
- Renesas R-Car M3-W CSI2/VIN/SYS-DMAC/(H)SCIF/I2C/DRIF/gfx support
- stm32f4* LSI, LSE, RTC, and QSPI clocks
- pxa27x and pxa25x cpufreq as clks
- TI omap36xx sprz319 advisory 2.1 workaround
- Broadcom bcm2835 rate change propogation to PLLH_AUX from VEC
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd:
"This is a fairly quiet release. We don't have any patches to the core
framework. The only patch that can even be considered "core" adds
another clk_get() variant. The rest of the changes are in drivers for
various SoCs, and we have a few bits for ARM shmobile architecture
code (dts and mach) due to the dependency we're breaking between
shmobile architecture code and its clk driver. Those shmobile bits
have also been pulled into arm-soc tree. Here's the summary:
Core:
- Support for devm_get_clk_from_child() used with DT bindings that
have subnodes with the 'clocks' property
New Drivers:
- Allwinner A64 (sun50i)
- i.MX imx6ull
- Socionext's UniPhier SoC CPUs
- Mediatek MT2701 SoCs
- Rockchip rk1108 SoCs
- Qualcomm MSM8994/MSM8992 SoCS
- Qualcomm RPM Clocks
- Hisilicon Hi3516CV300 and Hi3798CV200 CRG
- Oxford Semiconductor OX820 and OX810SE SoCs
- Renesas RZ/G1M and RZ/GIE SoCs
- Renesas R-Car RST driver for mode pin states
Updates:
- Four Allwinner SoCs are migrated to the new style clk driver
- Rockchip rk3399,rk3066 PLL optimizations
- i.MX LVDS display glitch fixes and AV PLL precision improvements
- Qualcomm MSM8996 GPU GDSCs, hw controlled GDSCs, and Alpha PLL
support
- Explicit demodularization of always builtin drivers
- Freescale Qoriq ls1012a and ls1046a support
- Exynos 5433 parent typo fix and critical clock tagging
- Renesas r8a7743/r8a7745 CPG
- Renesas R-Car M3-W CSI2/VIN/SYS-DMAC/(H)SCIF/I2C/DRIF/gfx support
- stm32f4* LSI, LSE, RTC, and QSPI clocks
- pxa27x and pxa25x cpufreq as clks
- TI omap36xx sprz319 advisory 2.1 workaround
- Broadcom bcm2835 rate change propogation to PLLH_AUX from VEC"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (150 commits)
clk: bcm: Fix 'maybe-uninitialized' warning in bcm2835_clock_choose_div_and_prate()
clk: add devm_get_clk_from_child() API
clk: st: clk-flexgen: Unmap region obtained by of_iomap
clk: keystone: pll: Unmap region obtained by of_iomap
clk:mmp:clk-of-mmp2: Free memory and Unmap region obtained by kzalloc and of_iomap
clk:mmp:clk-of-pxa910: Free memory and Unmap region obtained by kzmalloc and of_iomap
clk: mmp: clk-of-pxa1928: Free memory obtained by kzalloc
clk: cdce925: Fix limit check
clk: bcm: Make COMMON_CLK_IPROC into a library
clk: qoriq: added ls1012a clock configuration
clk: ti: dra7: fix "failed to lookup clock node gmac_gmii_ref_clk_div" boot message
clk: bcm: Allow rate change propagation to PLLH_AUX on VEC clock
clk: bcm: Support rate change propagation on bcm2835 clocks
clk: bcm2835: Avoid overwriting the div info when disabling a pll_div clk
clk: ti: omap36xx: Work around sprz319 advisory 2.1
clk: clk-wm831x: fix a logic error
clk: uniphier: add cpufreq data for LD11, LD20 SoCs
clk: uniphier: add CPU-gear change (cpufreq) support
clk: qcom: Put venus core0/1 gdscs to hw control mode
clk: qcom: gdsc: Add support for gdscs with HW control
...
mmc host drivers, some existing drivers being extended to support new IP
versions and lots of other updates.
MMC core:
- Delete eMMC packed command support
- Introduce mmc_abort_tuning() to enable eMMC tuning to fail gracefully
- Introduce mmc_can_retune() to see if a host can be retuned
- Re-work and improve the sequence when sending a CMD6 for mmc
- Enable CDM13 polling when switching to HS and HS DDR mode for mmc
- Relax checking for CMD6 errors after switch to HS200
- Re-factoring the code dealing with the mmc block queue
- Recognize whether the eMMC card supports CMDQ
- Fix 4K native sector check
- Don't power off the card when starting the host
- Increase MMC_IOC_MAX_BYTES to support bigger firmware binaries
- Improve error handling and drop meaningless BUG_ONs()
- Lots of clean-ups and changes to improve the quality of the code
MMC host:
- sdhci: Fix tuning sequence and clean-up the related code
- sdhci: Add support to via DT override broken SDHCI cap register bits
- sdhci-cadence: Add new driver for Cadence SD4HC SDHCI variant
- sdhci-msm: Update clock management
- sdhci-msm: Add support for eMMC HS400 mode
- sdhci-msm: Deploy runtime/system PM support
- sdhci-iproc: Extend driver support to newer IP versions
- sdhci-pci: Add support for Intel GLK
- sdhci-pci: Add support for Intel NI byt sdio
- sdhci-acpi: Add support for 80860F14 UID 2 SDIO bus
- sdhci: Lots of various small improvements and clean-ups
- tmio: Add support for tuning
- sh_mobile_sdhi: Add support for tuning
- sh_mobile_sdhi: Extend driver to support SDHI IP on R7S72100 SoC
- sh_mobile_sdhi: remove support for sh7372
- davinci: Use mmc_of_parse() to enable generic mmc DT bindings
- meson: Add new driver to support GX platforms
- dw_mmc: Deploy generic runtime/system PM support
- dw_mmc: Lots of various small improvements
As a part of the mmc changes this time, I have also pulled in an immutable
branch/tag (soc-device-match-tag1) hosted by Geert Uytterhoeven, to share the
implementation of the new soc_device_match() interface. This is needed by the
below mmc related changes:
- mmc: sdhci-of-esdhc: Get correct IP version for T4240-R1.0-R2.0
- soc: fsl: add GUTS driver for QorIQ platforms
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Merge tag 'mmc-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc
Pull MMC updates from Ulf Hansson:
"It's been an busy period for mmc. Quite some changes in the mmc core,
two new mmc host drivers, some existing drivers being extended to
support new IP versions and lots of other updates.
MMC core:
- Delete eMMC packed command support
- Introduce mmc_abort_tuning() to enable eMMC tuning to fail
gracefully
- Introduce mmc_can_retune() to see if a host can be retuned
- Re-work and improve the sequence when sending a CMD6 for mmc
- Enable CDM13 polling when switching to HS and HS DDR mode for mmc
- Relax checking for CMD6 errors after switch to HS200
- Re-factoring the code dealing with the mmc block queue
- Recognize whether the eMMC card supports CMDQ
- Fix 4K native sector check
- Don't power off the card when starting the host
- Increase MMC_IOC_MAX_BYTES to support bigger firmware binaries
- Improve error handling and drop meaningless BUG_ONs()
- Lots of clean-ups and changes to improve the quality of the code
MMC host:
- sdhci: Fix tuning sequence and clean-up the related code
- sdhci: Add support to via DT override broken SDHCI cap register
bits
- sdhci-cadence: Add new driver for Cadence SD4HC SDHCI variant
- sdhci-msm: Update clock management
- sdhci-msm: Add support for eMMC HS400 mode
- sdhci-msm: Deploy runtime/system PM support
- sdhci-iproc: Extend driver support to newer IP versions
- sdhci-pci: Add support for Intel GLK
- sdhci-pci: Add support for Intel NI byt sdio
- sdhci-acpi: Add support for 80860F14 UID 2 SDIO bus
- sdhci: Lots of various small improvements and clean-ups
- tmio: Add support for tuning
- sh_mobile_sdhi: Add support for tuning
- sh_mobile_sdhi: Extend driver to support SDHI IP on R7S72100 SoC
- sh_mobile_sdhi: remove support for sh7372
- davinci: Use mmc_of_parse() to enable generic mmc DT bindings
- meson: Add new driver to support GX platforms
- dw_mmc: Deploy generic runtime/system PM support
- dw_mmc: Lots of various small improvements
As a part of the mmc changes this time, I have also pulled in an
immutable branch/tag (soc-device-match-tag1) hosted by Geert
Uytterhoeven, to share the implementation of the new
soc_device_match() interface. This is needed by these mmc related
changes:
- mmc: sdhci-of-esdhc: Get correct IP version for T4240-R1.0-R2.0
- soc: fsl: add GUTS driver for QorIQ platforms"
* tag 'mmc-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: (136 commits)
mmc: sdhci-cadence: add Cadence SD4HC support
mmc: sdhci: export sdhci_execute_tuning()
mmc: sdhci: Tidy tuning loop
mmc: sdhci: Simplify tuning block size logic
mmc: sdhci: Factor out tuning helper functions
mmc: sdhci: Use mmc_abort_tuning()
mmc: mmc: Introduce mmc_abort_tuning()
mmc: sdhci: Always allow tuning to fall back to fixed sampling
mmc: sdhci: Fix tuning reset after exhausting the maximum number of loops
mmc: sdhci: Fix recovery from tuning timeout
Revert "mmc: sdhci: Reset cmd and data circuits after tuning failure"
mmc: mmc: Relax checking for switch errors after HS200 switch
mmc: sdhci-acpi: support 80860F14 UID 2 SDIO bus
mmc: sdhci-of-at91: remove bogus MMC_SDHCI_IO_ACCESSORS select
mmc: sdhci-pci: Use ACPI to get max frequency for Intel NI byt sdio
mmc: sdhci-pci: Add PCI ID for Intel NI byt sdio
mmc: sdhci-s3c: add spin_unlock_irq() before calling clk_round_rate
mmc: dw_mmc: display the clock message only one time when card is polling
mmc: dw_mmc: add the debug message for polling and non-removable
mmc: dw_mmc: check the "present" variable before checking flags
...
Pull timer updates from Thomas Gleixner:
"The time/timekeeping/timer folks deliver with this update:
- Fix a reintroduced signed/unsigned issue and cleanup the whole
signed/unsigned mess in the timekeeping core so this wont happen
accidentaly again.
- Add a new trace clock based on boot time
- Prevent injection of random sleep times when PM tracing abuses the
RTC for storage
- Make posix timers configurable for real tiny systems
- Add tracepoints for the alarm timer subsystem so timer based
suspend wakeups can be instrumented
- The usual pile of fixes and updates to core and drivers"
* 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (23 commits)
timekeeping: Use mul_u64_u32_shr() instead of open coding it
timekeeping: Get rid of pointless typecasts
timekeeping: Make the conversion call chain consistently unsigned
timekeeping_Force_unsigned_clocksource_to_nanoseconds_conversion
alarmtimer: Add tracepoints for alarm timers
trace: Update documentation for mono, mono_raw and boot clock
trace: Add an option for boot clock as trace clock
timekeeping: Add a fast and NMI safe boot clock
timekeeping/clocksource_cyc2ns: Document intended range limitation
timekeeping: Ignore the bogus sleep time if pm_trace is enabled
selftests/timers: Fix spelling mistake "Asyncrhonous" -> "Asynchronous"
clocksource/drivers/bcm2835_timer: Unmap region obtained by of_iomap
clocksource/drivers/arm_arch_timer: Map frame with of_io_request_and_map()
arm64: dts: rockchip: Arch counter doesn't tick in system suspend
clocksource/drivers/arm_arch_timer: Don't assume clock runs in suspend
posix-timers: Make them configurable
posix_cpu_timers: Move the add_device_randomness() call to a proper place
timer: Move sys_alarm from timer.c to itimer.c
ptp_clock: Allow for it to be optional
Kconfig: Regenerate *.c_shipped files after previous changes
...
Provide separaate sd0 and sd0_uhs nodes rather than duplicate sd0 nodes.
Cc: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Fixes: 93373c309a ("arm64: dts: h3ulcb: rename SDHI0 pins")
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The "google,smaug-rev2" string is missing from the compatible list of
Smaug's DT. The differences of rev2 are not relevant at our current
level of support and it boots just fine, so add it.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Andrew Bresticker <abrestic@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add the VDD_GPU regulator (a GPIO-enabled PWM regulator) to the Jetson
TX1 board. This addition allows the GPU to be used provided the
bootloader properly enabled the GPU node.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
[as pointed out by Thierry on IRC, nobody has reported a bug
in the field, but using a new bootloader with a .dtb that
has the incorrect data, it will crash on boot]
Fixes: 336f79c7b6 ("arm64: tegra: Add NVIDIA Jetson TX1 Developer Kit support")
Cc: stable@vger.kernel.org #v4.5+
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The gic-v3 property redistributor-stride is only meant as a workaround
for broken platforms that have a redistributor stride deviating what the
architecture defines, i.e. 128KiB for GICv3, 256KiB for GICv4. This is
not the case for ZX296718, and redistributor-stride is not really
necessary. Let's drop it.
Also, #redistributor-regions is only required when there is more than
one such region is present. Let's remove it as well.
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
GICR for multiple CPU can be described with start address and stride,
or with multiple address. Current multiple address and stride are
both used. Fix it.
vmalloc patch 727a7f5a9 triggered this bug:
[ 0.097146] Unable to handle kernel paging request at virtual address ffff000008060008
[ 0.097150] pgd = ffff000008602000
[ 0.097160] [ffff000008060008] *pgd=000000007fffe003, *pud=000000007fffd003, *pmd=000000007fffc003, *pte=0000000000000000
[ 0.097165] Internal error: Oops: 96000007 [#1] PREEMPT SMP
[ 0.097170] Modules linked in:
[ 0.097177] CPU: 1 PID: 0 Comm: swapper/1 Not tainted 4.8.0+ #1474
[ 0.097179] Hardware name: ZTE zx296718 evaluation board (DT)
[ 0.097183] task: ffff80003e8c8b80 task.stack: ffff80003e8d0000
[ 0.097197] PC is at gic_populate_rdist+0x74/0x15c
[ 0.097202] LR is at gic_starting_cpu+0xc/0x20
[ 0.097206] pc : [<ffff0000082b1b18>] lr : [<ffff0000082b26e0>] pstate: 600001c5
Signed-off-by: Jun Nie <jun.nie@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
Enable the x4 PCIe and M.2 Key E slots on Jetson TX1. The Key E slot is
currently untested due to lack of hardware.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Bjorn Helgaas <helgaas@kernel.org>
Add the PCIe host bridge found on Tegra X1. It implements two root ports
that support x4 and x1 configurations, respectively.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Bjorn Helgaas <helgaas@kernel.org>
Couple conflicts resolved here:
1) In the MACB driver, a bug fix to properly initialize the
RX tail pointer properly overlapped with some changes
to support variable sized rings.
2) In XGBE we had a "CONFIG_PM" --> "CONFIG_PM_SLEEP" fix
overlapping with a reorganization of the driver to support
ACPI, OF, as well as PCI variants of the chip.
3) In 'net' we had several probe error path bug fixes to the
stmmac driver, meanwhile a lot of this code was cleaned up
and reorganized in 'net-next'.
4) The cls_flower classifier obtained a helper function in
'net-next' called __fl_delete() and this overlapped with
Daniel Borkamann's bug fix to use RCU for object destruction
in 'net'. It also overlapped with Jiri's change to guard
the rhashtable_remove_fast() call with a check against
tc_skip_sw().
5) In mlx4, a revert bug fix in 'net' overlapped with some
unrelated changes in 'net-next'.
6) In geneve, a stale header pointer after pskb_expand_head()
bug fix in 'net' overlapped with a large reorganization of
the same code in 'net-next'. Since the 'net-next' code no
longer had the bug in question, there was nothing to do
other than to simply take the 'net-next' hunks.
Signed-off-by: David S. Miller <davem@davemloft.net>
Add neta nodes for network support both in device tree for the SoC and
the board.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The core and the cluster sleep state entry latencies can't be same as
cluster sleep involves more work compared to core level e.g. shared
cache maintenance.
Experiments have shown on an average about 100us more latency for the
cluster sleep state compared to the core level sleep. This patch fixes
the entry latency for the cluster sleep state.
Fixes: 28e10a8f3a ("arm64: dts: juno: Add idle-states to device tree")
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: "Jon Medhurst (Tixy)" <tixy@linaro.org>
Reviewed-by: Liviu Dudau <Liviu.Dudau@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The PCIe root complex on Juno translates the MMIO mapped
at 0x5f800000 to the PIO address range starting at 0
(which is common because PIO addresses are generally < 64k).
Correct the DT to reflect this.
Signed-off-by: Jeremy Linton <jeremy.linton@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- new SoC support: S912/GXM series (8x A53)
- new boards: Nexbox A1 (S912), Nexbox A95X (S905X)
- resets for 2nd USB PHY
- update SCPI compatible for pre-v1.0 devices
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Merge tag 'amlogic-dt64-2-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt64
Pull "Amlogic 64-bit DT updates for v4.10, round 2" from Kevin Hilman:
- new SoC support: S912/GXM series (8x A53)
- new boards: Nexbox A1 (S912), Nexbox A95X (S905X)
- resets for 2nd USB PHY
- update SCPI compatible for pre-v1.0 devices
* tag 'amlogic-dt64-2-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
ARM64: dts: meson-gxbb: add SCPI pre-1.0 compatible
ARM64: dts: meson-gxl: Add support for Nexbox A95X
ARM64: dts: meson-gxm: Add support for the Nexbox A1
ARM64: dts: Add support for Meson GXM
ARM64: dts: meson-gxbb: add the USB reset also to the second USB PHY
Add clock controller device nodes, including one top clock controller,
two low speed clock controllers and one audio clock controller.
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Merge tag 'zte-dt64-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt64
Pull "ZTE arm64 device tree update for 4.10" from Shawn Guo:
Add clock controller device nodes, including one top clock controller,
two low speed clock controllers and one audio clock controller.
* tag 'zte-dt64-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
arm64: dts: zx: Add clock controller nodes
- fix some dtc compiler warnings
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Merge tag 'berlin64-dt-for-v4.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/jszhang/linux-berlin into next/dt64
Pull "Berlin64 DT changes for v4.10" from Jisheng Zhang:
- fix some dtc compiler warnings
* tag 'berlin64-dt-for-v4.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/jszhang/linux-berlin:
arm64: dts: berlin4ct-dmp: add missing unit name to /memory node
arm64: dts: berlin4ct-stb: add missing unit name to /memory node
arm64: dts: berlin4ct: add missing unit name to /soc node
as the binding doc for the 32bit rk1108 eval board to prevent it
from conflicting with the recently added 64bit px5 board.
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Merge tag 'v4.10-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt64
Pull "Rockchip dts64 changes for 4.10" from Heiko Stübner:
Some more powerdomains and usb2-otg support for the rk3399 as well
as the binding doc for the 32bit rk1108 eval board to prevent it
from conflicting with the recently added 64bit px5 board.
* tag 'v4.10-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
dt-bindings: add rockchip RK1108 Evaluation board
arm64: dts: rockchip: add usb2-phy otg-port support for rk3399
arm64: dts: rockchip: add pd_sd power-domain node for rk3399
arm64: dts: rockchip: add eMMC's power domain support for rk3399
arm64: dts: rockchip: add backlight support for rk3399 evb board
arm64: dts: rockchip: add gmac needed pclk for rk3399 pd
* Add SDHC xo clk and 1.8V DDR support
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Merge tag 'qcom-arm64-for-4.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/dt64
Pull "Qualcomm ARM64 Updates for v4.10 - Part 2" from Andy Gross:
* Add SDHC xo clk and 1.8V DDR support
* tag 'qcom-arm64-for-4.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
arm64: dts: qcom: msm8916: Add ddr support to sdhc1
ARM: dts: Add xo to sdhc clock node on qcom platforms
1. Add Performance Monitor Unit to Exynos7.
2. Add MFC, JPEG and Gscaler to Exynos5433 based TM2 board.
3. Cleanups and fixes for recently added TM2 and TM2E boards.
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Merge tag 'samsung-dt64-4.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt64
Pull "Samsung DeviceTree arm64 second update for v4.10" from Krzysztof Kozłowski:
1. Add Performance Monitor Unit to Exynos7.
2. Add MFC, JPEG and Gscaler to Exynos5433 based TM2 board.
3. Cleanups and fixes for recently added TM2 and TM2E boards.
* tag 'samsung-dt64-4.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos: Enable HS400 mode for eMMC for TM2
arm64: dts: exynos: Add the mshc_2 node for supporting T-Flash
arm64: dts: exynos: TM2 - add support for MFC video codec device
arm64: dts: exynos: TM2 - add support for JPEG codec device
arm64: dts: exynos: TM2 - add support for GScaler devices
arm64: dts: exynos: TM2 - remove unused UART3 and set clocks directly on CMU
arm64: dts: exynos: Assign parent clock of the clkout clock for TM2 board
arm64: dts: exynos: Move FSYS CMU configuration from Exynos5433 dtsi to TM2 dts
arm64: dts: exynos: Add missing parent clocks to audio block in Exynos5433 SoC
arm64: dts: exynos: Fix FSYS CMU parent clocks in Exynos5433 SoC
arm64: dts: exynos: Fix IRQ type flags for Exynos5433 SoC
arm64: dts: Add ARM PMU node for exynos7
4.10, please pull the following:
- Robin updates the Northstart 2 DTS to use the generic IOMMU binding
- Scott renames the Broadcom Northstar 2 binding document to use a standard name
including the brcm vendor prefix
- Kamal adds the QSPI Device Tree node to the Northstar 2 SoC and updates the
Northstar 2 SVK reference board DTS file with it enabled.
- Rob adds the Device Tree node for the Broadcom PDC (mailbox) hardware to the
Northstar 2 SoC
- Jon enables the SDIO1 block and adds proper PCIe PHYs Device Tree nodes to the
Northstar 2 SoC
- Ray adds required properties NAND controller properties to make NAND work on
the Northstar 2 SVK board, this was submitted as a 4.9 fixes and is included
here to resolve DTS file merges
- Andrea removes an incorrect power LED from the Raspberry Pi 3 DTS
- Andreas fixes the compatible string for the BCM2837 (Raspberry Pi 3)
- Eric defines standard pinctrl groups in the BCM2835 GPIO node
- Gerd adds definitions for the pinctrl groups and updates the PWM, I2C and SDHCI nodes
to use their appropriate pinctrl functions
- Linus adds names for the Raspberry Pi GPIO lines based on the datasheet
- Martin adds the DT binding and nodes for the Raspberry Pi firmware thermal block
- Stefan fixes a few typos with respect to the BCM2835 mailbox binding example and
Device Tree nodes he also uses the proper DTSI file to define the USB host mode
for the USB Device Tree nodes
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Merge tag 'arm-soc/for-4.10/devicetree-arm64' of http://github.com/Broadcom/stblinux into next/dt64
Pull "Broadcom devicetree-arm64 changes for 4.10" from Florian Fainelli:
This pull request contains Broadcom ARM64 based SoC Device Tree changes for
4.10, please pull the following:
- Robin updates the Northstart 2 DTS to use the generic IOMMU binding
- Scott renames the Broadcom Northstar 2 binding document to use a standard name
including the brcm vendor prefix
- Kamal adds the QSPI Device Tree node to the Northstar 2 SoC and updates the
Northstar 2 SVK reference board DTS file with it enabled.
- Rob adds the Device Tree node for the Broadcom PDC (mailbox) hardware to the
Northstar 2 SoC
- Jon enables the SDIO1 block and adds proper PCIe PHYs Device Tree nodes to the
Northstar 2 SoC
- Ray adds required properties NAND controller properties to make NAND work on
the Northstar 2 SVK board, this was submitted as a 4.9 fixes and is included
here to resolve DTS file merges
- Andrea removes an incorrect power LED from the Raspberry Pi 3 DTS
- Andreas fixes the compatible string for the BCM2837 (Raspberry Pi 3)
- Eric defines standard pinctrl groups in the BCM2835 GPIO node
- Gerd adds definitions for the pinctrl groups and updates the PWM, I2C and SDHCI nodes
to use their appropriate pinctrl functions
- Linus adds names for the Raspberry Pi GPIO lines based on the datasheet
- Martin adds the DT binding and nodes for the Raspberry Pi firmware thermal block
- Stefan fixes a few typos with respect to the BCM2835 mailbox binding example and
Device Tree nodes he also uses the proper DTSI file to define the USB host mode
for the USB Device Tree nodes
* tag 'arm-soc/for-4.10/devicetree-arm64' of http://github.com/Broadcom/stblinux: (23 commits)
arm64: dts: NS2: Add PCI PHYs
arm64: dts: NS2: enable sdio1
ARM64: dts: bcm2837-rpi-3-b: remove incorrect pwr LED
ARM64: bcm2835: dts: add thermal node to device-tree of bcm2837
ARM: bcm2835: Add names for the Raspberry Pi GPIO lines
ARM: bcm2835: dts: add thermal node to device-tree of bcm283x
dt: bindings: add thermal device driver for bcm2835
arm64: dts: Add Broadcom Northstar2 device tree entries for PDC driver.
ARM: dts: bcm283x: fix typo in mailbox address
DT: binding: bcm2835-mbox: fix address typo in example
ARM64: dts: bcm2835: Fix bcm2837 compatible string
arm64: dts: Update Broadcom NS2 to generic IOMMU binding
arm64: dts: Updated NAND DT properties for NS2 SVK
arm64: dts: rename ns2.txt to brcm,ns2.txt
ARM64: dts: Add QSPI Device Tree node for NS2
ARM64: dts: bcm283x: Use dtsi for USB host mode
ARM: dts: bcm283x: drop alt3 from &gpio
ARM: dts: bcm283x: add pinctrl group to &sdhci, drop pins from &gpio
ARM: dts: bcm283x: add pinctrl group to &i2c1, drop pins from &gpio
ARM: dts: bcm283x: add pinctrl group to &i2c0, drop pins from &gpio
...
This adds initial support for Tegra186, the P3310 processor module as
well as the P2771 development board. Not much is functional, but there
is enough to boot to an initial ramdisk with debug serial output.
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Merge tag 'tegra-for-4.10-arm64-dt-numeric-ids' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt64
Pull "arm64: tegra: Device tree changes for v4.10-rc1" from Thierry Reding:
This adds initial support for Tegra186, the P3310 processor module as
well as the P2771 development board. Not much is functional, but there
is enough to boot to an initial ramdisk with debug serial output.
* tag 'tegra-for-4.10-arm64-dt-numeric-ids' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
arm64: tegra: Add NVIDIA P2771 board support
arm64: tegra: Enable PSCI on P3310
arm64: tegra: Add NVIDIA P3310 processor module support
arm64: tegra: Add GPIO controllers on Tegra186
arm64: tegra: Add SDHCI controllers on Tegra186
arm64: tegra: Add I2C controllers on Tegra186
arm64: tegra: Add serial ports on Tegra186
arm64: tegra: Add CPU nodes for Tegra186
arm64: tegra: Add Tegra186 support
Two branches were incorrectly sent without having the necessary
header file changes. Rather than back those out now, I'm replacing
the symbolic names for the clks and resets with the numeric
values to get 'make allmodconfig dtbs' back to work.
After the header file changes are merged, we can revert this
patch.
Fixes: 6bc37fa ("arm64: dts: add Allwinner A64 SoC .dtsi")
Fixes: 50784e6 ("dts: arm64: db820c: add pmic pins specific dts file")
Acked-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add the dts node for device configuration unit that provides
general purpose configuration and status for the device.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Acked-by: Scott Wood <oss@buserror.net>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
The SCPI driver has an updated compatible to indicate the pre-released
(pre v1.0) status of the driver. Since Amlogic used a pre-1.0
version, add that compatible as well.
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The Nexbox A95X exists with a Meson GXBB (S905) Soc or a Meson GXL SoC (S905X).
Add the S905X variant which uses the internal PHY instead of an external PHY.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add support for the Nexbox A1 board based on the Amlogic S912 SoC.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
[khilman: replace '_' in node-names with '-']
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Fix DTC warning on Armada 37xx and 7K/8K
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Merge tag 'mvebu-dt64-4.10-2' of git://git.infradead.org/linux-mvebu into next/dt64
Pull "mvebu dt64 for 4.10 (part 2)" from Gregory CLEMENT:
Fix DTC warning on Armada 37xx and 7K/8K
* tag 'mvebu-dt64-4.10-2' of git://git.infradead.org/linux-mvebu:
ARM64: dts: marvell: Fixup memory DT warning for Armada 37xx
arm64: dts: marvell: Fixup config-space DT warning For Armada 7K/8K
arm64: dts: marvell: Fixup internal-regs DT warning for Armada 37xx
This patch fixes the following DTC warning with W=1:
"Node /memory has a reg or ranges property, but no unit name"
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
This patch fixes the following DTC warning with W=1:
"Node /memory has a reg or ranges property, but no unit name"
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
This patch fixes the following DTC warning with W=1:
"Node /soc has a reg or ranges property, but no unit name"
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
This adds mmc-ddr-1_8v support to DT for sdhc1 of msm8916.
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
TM2 can support the HS400 mode, but eMMC is working in the lowest mode.
This patch adds the properties for HS400 and other modes.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Add xo entry to sdhc clock node on all qcom platforms.
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Following the Amlogic Linux kernel, it seem the only differences
between the GXL and GXM SoCs are the CPU Clusters.
This commit renames the gxl-s905d-p23x DTSI in a common file for
S905D p23x and S912 q20x boards.
Then adds a meson-gxm dtsi and reproduce the P23x to Q20x boards
dts files since the S905D and S912 SoCs shares the same pinout
and the P23x and Q20x boards are identical.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
All conflicts were simple overlapping changes except perhaps
for the Thunder driver.
That driver has a change_mtu method explicitly for sending
a message to the hardware. If that fails it returns an
error.
Normally a driver doesn't need an ndo_change_mtu method becuase those
are usually just range changes, which are now handled generically.
But since this extra operation is needed in the Thunder driver, it has
to stay.
However, if the message send fails we have to restore the original
MTU before the change because the entire call chain expects that if
an error is thrown by ndo_change_mtu then the MTU did not change.
Therefore code is added to nicvf_change_mtu to remember the original
MTU, and to restore it upon nicvf_update_hw_max_frs() failue.
Signed-off-by: David S. Miller <davem@davemloft.net>
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Merge tag 'v4.9-rc6' into patchwork
Linux 4.9-rc6
* tag 'v4.9-rc6': (305 commits)
Linux 4.9-rc6
ext4: sanity check the block and cluster size at mount time
fscrypto: don't use on-stack buffer for key derivation
fscrypto: don't use on-stack buffer for filename encryption
i2c: i2c-mux-pca954x: fix deselect enabling for device-tree
kvm: x86: merge kvm_arch_set_irq and kvm_arch_set_irq_inatomic
KVM: x86: fix missed SRCU usage in kvm_lapic_set_vapic_addr
KVM: async_pf: avoid recursive flushing of work items
kvm: kvmclock: let KVM_GET_CLOCK return whether the master clock is in use
KVM: Disable irq while unregistering user notifier
KVM: x86: do not go through vcpu in __get_kvmclock_ns
MAINTAINERS: Add LED subsystem co-maintainer
crypto: algif_hash - Fix NULL hash crash with shash
powerpc/mm: Fix missing update of HID register on secondary CPUs
KVM: arm64: Fix the issues when guest PMCCFILTR is configured
arm64: KVM: pmu: Fix AArch32 cycle counter access
powerpc/mm/radix: Invalidate ERAT on tlbiel for POWER9 DD1
i2c: digicolor: use clk_disable_unprepare instead of clk_unprepare
ipmi/bt-bmc: change compatible node to 'aspeed, ast2400-ibt-bmc'
Revert "drm/mediatek: set vblank_disable_allowed to true"
...
other fixes.
In order to get the thermal node that we're adjusting the compatible
string on, we have to merge in the bcm2835-dt-next branch.
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Merge tag 'bcm2835-dt-64-next-2016-11-18' into devicetree-arm64/next
This pull request brings thermal support to the BCM2837 DT, and a few
other fixes.
In order to get the thermal node that we're adjusting the compatible
string on, we have to merge in the bcm2835-dt-next branch.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
PCI PHYs are missing from the Northstar2 DT entries for the 2 PCI buses.
Add them so that PCI devices can be discovered.
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Enable sdio1 in the Northstar2 SVK device tree file
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Add the mshc_2 node for supporting T-Flash.
Also add the "mshc*" aliases. dwmmc driver should be assigned to
"ctrl_id" after parsing to "mshc". If there are no aliases for mshc,
then it might be set to the wrong capabilities.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
The "arm,no-tick-in-suspend" property was introduced to note
implementations where the system counter does not quite follow the ARM
specification that it "must be implemented in an always-on power
domain".
Particularly, RK3399's counter stops ticking when we switch from the
24MHz clock to the 32KHz clock in low-power suspend, so let's mark it as
such.
Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
The NVIDIA P2771 is composed of a P3310 processor module that connects
to the P2597 I/O board. It comes with a 1200x1920 MIPI DSI panel that is
connected via the P2597's display connector and has several connectors
such as HDMI, USB 3.0, PCIe and ethernet.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The P3310 processor module comes ships with a firmware that implements
PSCI 1.0. Enable and use it to bring up all CPUs.
Signed-off-by: Thierry Reding <treding@nvidia.com>
The NVIDIA P3310 is a processor module used in several reference designs
that features a Tegra186 SoC, 8 GiB of LPDDR4 RAM, 32 GiB eMMC and other
essentials such as ethernet, WiFi and a PMIC. It is typically connected
to an I/O board (such as the P2597) that provides the connecters needed
to hook it up to the outside world.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Tegra186 has two GPIO controllers that are no longer compatible with the
controller found on earlier generations. One of these controllers exists
in an always-on partition of the SoC whereas the other can be clock- and
powergated.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Tegra186 has a total of four SDHCI controllers that each support SD 4.2
(up to UHS-I speed), SDIO 4.1 (up to UHS-I speed), eSD 2.1, eMMC 5.1 and
SDHOST 4.1 (up to UHS-I speed).
Signed-off-by: Thierry Reding <treding@nvidia.com>
Tegra186 has a total of nine I2C controllers that are compatible with
the I2C controllers introduced in Tegra114. Two of these controllers
share pads with two DPAUX controllers (for AUX transactions).
Signed-off-by: Thierry Reding <treding@nvidia.com>
The initial patch only added UARTA, but there's no reason we shouldn't
be adding all of them. While at it, also specify the missing clocks and
resets for UARTA.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Tegra186 has six CPUs: two CPUs are second generation Denver CPUs that
support ARMv8 and four CPUs are Cortex-A57 CPUs.
Signed-off-by: Thierry Reding <treding@nvidia.com>
This adds the initial support of Tegra186 SoC. It provides enough to
enable the serial console and boot from an initial ramdisk.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
[treding@nvidia.com: remove leading 0 from unit-addresses]
[treding@nvidia.com: remove unused nvidia,bpmp property]
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add a device node for the Product Register, which provides SoC product
and revision information.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a device node for the Product Register, which provides SoC product
and revision information.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This changes SDHI0 pin names for H3ULCB board
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This supports SDHI2 for H3ULCB onboard eMMC
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This supports SDHI2 for M3ULCB onboard eMMC
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This supports SDHI0 on M3ULCB board SD card slot
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This supports watchdog timer for M3ULCB board
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This enables EXTALR clock that can be used for the watchdog.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This supports GPIO keys on M3ULCB board
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This supports GPIO leds on M3ULCB board
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This enables the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the initial device tree for the R8A7796 SoC based M3ULCB low cost
board (R-Car Starter Kit Pro)
This commit supports the following peripherals:
- SCIF (console)
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This updates H3ULCB device tree header with official board name
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Fix invalid GIC interrupt flags - type IRQ_TYPE_NONE is not allowed for GIC
interrupts. Although this was working but with error messages like:
genirq: Setting trigger mode 0 for irq 16 failed
Use level high interrupt instead of type none. The choice of level high was
rather an arbitrary decision hoping it will work on each platform. Tests shown
no issues so far.
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Merge tag 'samsung-dt64-gic-flags-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt64
Topic branch with DT arm64 changes for v4.10.
Fix invalid GIC interrupt flags - type IRQ_TYPE_NONE is not allowed for GIC
interrupts. Although this was working but with error messages like:
genirq: Setting trigger mode 0 for irq 16 failed
Use level high interrupt instead of type none. The choice of level high was
rather an arbitrary decision hoping it will work on each platform. Tests shown
no issues so far.
* tag 'samsung-dt64-gic-flags-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos: Use human-friendly symbols for interrupt properties in exynos7
arm64: dts: exynos: Fix invalid GIC interrupt flags in exynos7
Signed-off-by: Olof Johansson <olof@lixom.net>
Adding the new "community" board for Armada 3700
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Merge tag 'mvebu-dt64-4.10-1' of git://git.infradead.org/linux-mvebu into next/dt64
mvebu dt64 for 4.10 (part 1)
Adding the new "community" board for Armada 3700
* tag 'mvebu-dt64-4.10-1' of git://git.infradead.org/linux-mvebu:
arm64: dts: marvell: Add definition for the Globalscale Marvell ESPRESSOBin Board
Signed-off-by: Olof Johansson <olof@lixom.net>
Support for the Allwinner A64, their first armv8 SoC.
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Merge tag 'sunxi-dt64-for-4.10' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/dt64
Allwinner arm64 DT changes for 4.10
Support for the Allwinner A64, their first armv8 SoC.
* tag 'sunxi-dt64-for-4.10' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
arm64: dts: add Pine64 support
Documentation: devicetree: add vendor prefix for Pine64
arm64: dts: add Allwinner A64 SoC .dtsi
Signed-off-by: Olof Johansson <olof@lixom.net>
- Correct the hardware pin number of the usb node on the Hip06
- Add the Hisilicon Hip07 D05 board dts binding
- Add the initial dts for the Hip07 D05 board
- Fix the warning for the node without reg propery on the Hip06
- Fix the sas am max transmissions quirk property on the Hip06
- Disable the sas0 and sas2 on D03 board
- Add refclk node for SAS on the Hip06
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Merge tag 'hisi-arm64-dt-4.10' of git://github.com/hisilicon/linux-hisi into next/dt64
ARM64: DT: Hisilicon SoC DT updates for 4.10
- Correct the hardware pin number of the usb node on the Hip06
- Add the Hisilicon Hip07 D05 board dts binding
- Add the initial dts for the Hip07 D05 board
- Fix the warning for the node without reg propery on the Hip06
- Fix the sas am max transmissions quirk property on the Hip06
- Disable the sas0 and sas2 on D03 board
- Add refclk node for SAS on the Hip06
* tag 'hisi-arm64-dt-4.10' of git://github.com/hisilicon/linux-hisi:
arm64: dts: hisi: add refclk node to hip06 dts files for SAS
arm64: dts: hisi: disable sas0 and sas2 for d03
arm64: dts: hisi: fix hip06 sas am-max-trans quirk
arm64: dts: hip06: Fix no reg property warning
arm64: dts: hisilicon: Add initial dts for Hip07 D05 board
Documentation: arm64: Add Hisilicon Hip07 D05 dts binding
arm64: dts: hip06: Correct hardware pin number of usb node
Signed-off-by: Olof Johansson <olof@lixom.net>
- Enable Thermal Monitoring Unit (TMU) for thermal management on
LS1043A and LS2080A.
- Add support for LS1046A SoC, which has similar peripherals as
LS1043A but integrates 4 A72 cores.
- Add two LS1046A based board support: LS1046A-QDS and LS1046A-RDB.
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Merge tag 'imx-dt64-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt64
Freescale arm64 device tree updates for 4.10:
- Enable Thermal Monitoring Unit (TMU) for thermal management on
LS1043A and LS2080A.
- Add support for LS1046A SoC, which has similar peripherals as
LS1043A but integrates 4 A72 cores.
- Add two LS1046A based board support: LS1046A-QDS and LS1046A-RDB.
* tag 'imx-dt64-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
arm64: dts: ls2080a: Add TMU device tree support for LS2080A
arm64: dts: ls1043a: Add TMU device tree support for LS1043A
arm64: dts: add LS1046A-QDS board support
Documentation: DT: Add entry for QorIQ LS1046A-QDS board
arm64: dts: add LS1046A-RDB board support
Documentation: DT: Add entry for QorIQ LS1046A-RDB board
arm64: dts: add QorIQ LS1046A SoC support
dt-bindings: ahci-fsl-qoriq: updated for SoC ls1046a
dt-bindings: qoriq-clock: add LS1043A/LS1046A/LS2080A compatible for clockgen
dt-bindings: i2c: adds two more nxp devices
dt-bindings: fsl: add LS1043A/LS1046A/LS2080A compatible for SCFG and DCFG
dt-bindings: fsl: Add LS1043A/LS1046A/LS2080A SoC compatible strings
Signed-off-by: Olof Johansson <olof@lixom.net>
us to use generic parser later on. Note that the driver supports
handling the legacy binding also with no #pinctrl-cells so these
changes can be queued separately from the driver changes.
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Merge tag 'omap-for-v4.10/pinctrl-cells-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Add #pinctrl-cells for pinctrl-single using dts files. This allows
us to use generic parser later on. Note that the driver supports
handling the legacy binding also with no #pinctrl-cells so these
changes can be queued separately from the driver changes.
* tag 'omap-for-v4.10/pinctrl-cells-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: Add #pinctrl-cells for pinctrl-single instances
Signed-off-by: Olof Johansson <olof@lixom.net>
One big merge this time with a total of 166 non-merge commits.
Most of the work, by far, is on dwc2 this time (68.2%) with dwc3 a far
second (22.5%). The remaining 9.3% are scattered on gadget drivers.
The most important changes for dwc2 are the peripheral side DMA support
implemented by Synopsys folks and support for the new IOT dwc2
compatible core from Synopsys.
In dwc3 land we have support for high-bandwidth, high-speed isochronous
endpoints and some non-critical fixes for large scatter lists.
Apart from these, we have our usual set of cleanups, non-critical fixes,
etc.
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Merge tag 'usb-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-next
Felipe writes:
usb: patches for v4.10 merge window
One big merge this time with a total of 166 non-merge commits.
Most of the work, by far, is on dwc2 this time (68.2%) with dwc3 a far
second (22.5%). The remaining 9.3% are scattered on gadget drivers.
The most important changes for dwc2 are the peripheral side DMA support
implemented by Synopsys folks and support for the new IOT dwc2
compatible core from Synopsys.
In dwc3 land we have support for high-bandwidth, high-speed isochronous
endpoints and some non-critical fixes for large scatter lists.
Apart from these, we have our usual set of cleanups, non-critical fixes,
etc.
This patch adds device nodes for MFC video codec device to Exynos5433 SoC
dtsi and proper initial clock configuration to TM2 dts.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
This patch adds device nodes for JPEG codec device to Exynos5433 SoC dtsi
and proper initial clock configuration to TM2 dts.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
This patch adds device nodes for GScaler devices to Exynos5433 SoC dtsi
and proper initial clock configuration to TM2 dts.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
This is not needed as the gadget now fully supports DMA and it can
autodetect it. This was initially added because gadget DMA mode was only
partially implemented so could not be automatically enabled.
Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
UART3 device is not really needed for enabling audio block on TM2.
Enabling it made it working by enabling some common parent clocks,
what is now handled by improved exynos5433 clocks driver. Thus the UART3
device node can be safely disabled. The assigned-clocks entries are
however still needed, so move them under the respective CMU node.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Without this patch the clkout clock is orphaned and sound doesn't
work properly.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Move initial FSYS CMU (related to USB 3.0 devices) clocks configuration
from generic exynos5433.dtsi file to exynos5433-tm2.dts, as this is
a board specific item.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Audio PLL and oscillator clocks are proper parent clocks for AUD CMU.
They are not visible as such on first glance on Exynos5433 SoC docs,
but they are needed for this CMU to operate properly.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
This patch corrects FSYS CMU parent clocks specified in clock controller
node to let improved Exynos5433 clocks driver to control proper clocks
on FSYS<->TOP CMU boundary.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Interrupt of type IRQ_TYPE_NONE is not allowed for GIC interrupts. The
GIC requires shared interrupts to be edge rising or level high. Platform
declares support for both. Set all interrupts type to level high, as this
works fine - tested on Exynos5433-based TM2 board.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
- Add clocks for auxadc on mt8173-evb
- Add nodes needed by clock controller for mt2701
- Use clocks from the clock controller for the uart of mt2701
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Merge tag 'v4.9-next-dts' of https://github.com/mbgg/linux-mediatek into next/dt
- Add bindings for mtk-scpsys for mt2701
- Add clocks for auxadc on mt8173-evb
- Add nodes needed by clock controller for mt2701
- Use clocks from the clock controller for the uart of mt2701
* tag 'v4.9-next-dts' of https://github.com/mbgg/linux-mediatek:
arm: dts: mt2701: Use real clock for UARTs
arm: dts: mt2701: Add clock controller device nodes
arm64: dts: mt8173: Fix auxadc node
soc: mediatek: Add MT2701 power dt-bindings
Signed-off-by: Olof Johansson <olof@lixom.net>
a fix for wrong i2c registers on rk3368 a new nvmem cell and
power-domain on rk3399 as well as moving mmc frequency
properties to the more generic max-frequency one.
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Merge tag 'v4.10-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt64
64bit devicetree changes including the px5 evaluation board
a fix for wrong i2c registers on rk3368 a new nvmem cell and
power-domain on rk3399 as well as moving mmc frequency
properties to the more generic max-frequency one.
* tag 'v4.10-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm64: dts: rockchip: replace to "max-frequency" instead of "clock-freq-min-max"
arm64: dts: rockchip: add cpu-id nvmem cell node for rk3399
arm64: dts: rockchip: add sdmmc support for px5-evb
arm64: dts: rockchip: Add more properties for emmc on px5-evb
arm64: dts: rockchip: Add PX5 Evaluation board
arm64: dts: rockchip: add powerdomain for typec on rk3399
arm64: dts: rockchip: fix i2c resource error of rk3368
Signed-off-by: Olof Johansson <olof@lixom.net>
SoC along with two boards. A lot of Samsung people contributed into this
but the final work and commits were done by Chanwoo Choi.
This means that for v4.10 we got:
1. Exynos5433 DTSI.
2. Two boards: TM2 and TM2E. These are (almost fully) working mobile phones.
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Merge tag 'samsung-dt64-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt64
Finally, I am really pleased to announce adding support for Exynos5433 ARMv8
SoC along with two boards. A lot of Samsung people contributed into this
but the final work and commits were done by Chanwoo Choi.
This means that for v4.10 we got:
1. Exynos5433 DTSI.
2. Two boards: TM2 and TM2E. These are (almost fully) working mobile phones.
* tag 'samsung-dt64-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos: Add dts file for Exynos5433-based TM2E board
arm64: dts: exynos: Add dts file for Exynos5433-based TM2 board
arm64: dts: exynos: Add dtsi files for Samsung Exynos5433 64bit SoC
Signed-off-by: Olof Johansson <olof@lixom.net>
- Switch CPU enable-method from spin-table to PSCI
- Add OPP tables to support generic cpufreq driver
- Misc fixes
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Merge tag 'uniphier-dt64-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier into next/dt64
UniPhier ARM64 SoC DT updates for v4.10
- Switch CPU enable-method from spin-table to PSCI
- Add OPP tables to support generic cpufreq driver
- Misc fixes
* tag 'uniphier-dt64-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier:
arm64: dts: uniphier: make compatible of syscon nodes SoC-specific
arm64: dts: uniphier: add CPU clocks and OPP tables for LD20 SoC
arm64: dts: uniphier: add CPU clock and OPP table for LD11 SoC
arm64: dts: uniphier: increase register region size of sysctrl node
arm64: dts: uniphier: switch over to PSCI enable method
Signed-off-by: Olof Johansson <olof@lixom.net>
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Merge tag 'v4.9-rc3' into next/dt64
Linux 4.9-rc3
* tag 'v4.9-rc3': (292 commits)
Linux 4.9-rc3
x86/smpboot: Init apic mapping before usage
ACPICA: Dispatcher: Fix interpreter locking around acpi_ev_initialize_region()
ACPICA: Dispatcher: Fix an unbalanced lock exit path in acpi_ds_auto_serialize_method()
ACPICA: Dispatcher: Fix order issue of method termination
ARC: module: print pretty section names
ARC: module: elide loop to save reference to .eh_frame
ARC: mm: retire ARC_DBG_TLB_MISS_COUNT...
ARC: build: retire old toggles
ARC: boot log: refactor cpu name/release printing
ARC: boot log: remove awkward space comma from MMU line
ARC: boot log: don't assume SWAPE instruction support
ARC: boot log: refactor printing abt features not captured in BCRs
ARCv2: boot log: print IOC exists as well as enabled status
ubifs: Fix regression in ubifs_readdir()
ubi: fastmap: Fix add_vol() return value test in ubi_attach_fastmap()
MAINTAINERS: Add entry for genwqe driver
VMCI: Doorbell create and destroy fixes
GenWQE: Fix bad page access during abort of resource allocation
vme: vme_get_size potentially returning incorrect value on failure
...
All of them are fixes for arm64 device tree
- 2 for the SPI node on the Armada 7K/8K
- 1 for the clock node on the Armada 37xx
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Merge tag 'mvebu-fixes-4.9-1' of git://git.infradead.org/linux-mvebu into fixes
mvebu fixes for 4.9 (part 1)
All of them are fixes for arm64 device tree
- 2 for the SPI node on the Armada 7K/8K
- 1 for the clock node on the Armada 37xx
* tag 'mvebu-fixes-4.9-1' of git://git.infradead.org/linux-mvebu:
arm64: dts: marvell: add unique identifiers for Armada A8k SPI controllers
arm64: dts: marvell: fix clocksource for CP110 slave SPI0
arm64: dts: marvell: Fix typo in label name on Armada 37xx
Signed-off-by: Olof Johansson <olof@lixom.net>
We are incorrectly defining the pwr LED, attaching it to a gpio line
that is wired to the Wi-Fi SDIO module (which fails due to this).
The actual power LED is connected to the GPIO expander, which we don't
expose currently.
Fixes: 9d56c22a78 ("ARM: bcm2835: Add devicetree for the Raspberry Pi 3.")
Thanks-to: Eric Anholt <eric@anholt.net> [for clarifying we can't control the LED]
Signed-off-by: Andrea Merello <andrea.merello@gmail.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
When the USB PHY driver was introduced the reset framework did not
have support for triggering a reset pulse for shared resets. On GXBB
however there is only one reset line for both PHYs (meaning we have a
shared reset line). With the latest changes to the reset framework and
the corresponding updates to the phy-meson8b-usb2 driver we can now pass
the reset to the second PHY as well.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
All boards from the Tronsmart Vega S95 series are sharing similar MMC
based hardware.
sd_emmc_a is used to connect a Broadcom based SDIO wifi card (supported
by the brcmfmac driver). The 32.768KHz LPO clock for the wifi chip is
generated by PWM_E.
sd_emmc_b is routed to the SD-card. Unlike p20x there is no GPIO
regulator, meaning it only supports 3.3V (which seems to be hard-wired).
The eMMC chip is connected to sd_emmc_c and is implemented similar to
the meson-gxbb-p20x boards (meaning that hard-wired fixed regulators
are used).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Enable Ethernet on the p23x board, pinctrl attribute is only added for
the p230 board since the p231 only uses the Internal PHY.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add Ethernet node with Internal PHY selection for the Amlogic GXL SoCs
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
meson-gx.dtsi was directly derived from meson-gxbb.dtsi, so keep the
copyrights in chronological order to not give a wrong impression.
Fixes: c328666d58 ("ARM64: dts: amlogic: Add Meson GX dtsi from GXBB")
Cc: Neil Armstrong <narmstrong@baylibre.com>
Cc: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Enable the Infraread Receiver on the p23x board.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add SD/SDIO/MMC nodes and PWM 32768Hz clock configuration to provide
storage and WiFi functionality on the p23x boards.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add clock node for Amlogic Meson GXL.
The GXBB compatible is retained since the GXBB clock tree is used for now.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add pinctrl nodes and pin definitions for Amlogic Meson GXL.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
[khilman: use GXBB include until GXL pinctrl support merged]
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Move common nodes between GXBB and GXL in to the common GX dtsi.
Leave the clock attributes in the GXBB dtsi for now.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This patch adds ARM Performance Monitor Unit dt node for exynos7.
PMU provides various statistics on the operation of the CPU and
memory system at runtime, which are very useful when debugging or
profiling code. This enables the same.
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
[krzk: Squashed with "Add level for cpu dt node for exynos7"]
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Add otg-port nodes for both u2phy0 and u2phy1. The otg-port can
be used for USB2.0 part of USB3.0 OTG controller.
Signed-off-by: William Wu <wulf@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
We will only maintain 1 dts for D03 and there are 50MHz
and 66MHz versions of D03: so we expect UEFI to update
refclk rate in the fdt at boot time.
Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Xiang Chen <chenxiang66@hisilicon.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
The SAS nodes sas0 and sas2 are not available on d03, so
disable them.
Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
The string for the am max transmissions quirk property
is not correct -> fix it.
Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Xiang Chen <chenxiang66@hisilicon.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Warning (unit_address_vs_reg): Node /soc/ethernet@4 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /soc/ethernet@5 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /soc/ethernet@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /soc/ethernet@1 has a unit name, but no reg property
Fix warning when build with W=1.
Cc: Kejian Yan <yankejian@huawei.com>
Cc: Yisen Zhuang <yisen.zhuang@huawei.com>
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Adding initial dt file for Hip07 D05 board, it is with dual socket
and each socket has two SCCLs(supper cpu cluster), one SCCL contains
four clusters and each cluster has quard Cortex-A72.
Since each SCCL has their own DDR controller, it could be treated as
a separate numa node. Thus, there are four numa nodes(one node with
sixteen core) on Hip07 SoC.
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Add the sd power-domain, its qos area and assign it to the
sdmmc device node.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Tested-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Control power domain for eMMC via genpd to reduce power consumption.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Tested-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add backlight node for evb board, perpare for panel device node.
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This patch fixes that sometimes hang at start-up time of the system.
As the below log:
...
[ 11.136543] calling pm_genpd_debug_init+0x0/0x60 @ 1
[ 11.141602] initcall pm_genpd_debug_init+0x0/0x60 returned 0 after 11 usecs
[ 11.148558] calling genpd_poweroff_unused+0x0/0x84 @ 1
<hang>
In some cases, the rk3399 should turn off the gmac power domain to save
power if some boards didn't register the gmac device node for rk3399.
Then, rk3399 need to make sure the gmac's pclk enabled if we need
operate the gmac power domain. (Due to the NOC had enabled always)
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Initial device tree support for Qualcomm MSM8994 SoC and
Huawei Angler / Google Nexus 6P support.
The device tree is based on the Google 3.10 kernel tree.
The device can be booted into the initrd with only one CPU running.
Signed-off-by: Bastian Köcher <mail@kchr.de>
[jeremymc@redhat.com: removed Kconfig, defconfig, move from Huawei to qcom dir]
Signed-off-by: Jeremy McNicoll <jeremymc@redhat.com>
Tested-by: Michael Scott <michael.scott@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Initial device tree support for Qualcomm MSM8992 SoC and
LG Bullhead / Google Nexus 5X support.
Signed-off-by: Jeremy McNicoll <jeremymc@redhat.com>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch add support to Analog audio both Playback and Capture via
msm8916 WCD muti codec.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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Merge tag 'pci-v4.9-fixes-3' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci
Pull PCI fixes from Bjorn Helgaas:
- Update MAINTAINERS for Intel VMD driver filename
- Update Rockchip rk3399 host bridge driver DTS and resets
- Fix ROM shadow problem that made some video device initialization
fail
* tag 'pci-v4.9-fixes-3' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci:
PCI: VMD: Update filename to reflect move
arm64: dts: rockchip: add three new resets for rk3399 PCIe controller
PCI: rockchip: Add three new resets as required properties
PCI: Don't attempt to claim shadow copies of ROM
Add the node for the thermal sensor of the bcm2837-soc
to the device tree.
Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
pm8994 has 22 gpios, so add the missing interrupts entry for one
of the gpios
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
On the APQ8016 SBC, the LDO2 PM8916 regulator feeds 1.2V to the following:
- VDDA_1P2_MIPI_DSI and VDDA_MIPI_CSI pins on APQ8016.
- VCCCAD pins on the LPDDR3 chip.
- VDDPX_1 pins on APQ8016.
The LDO6 regulator feeds 1.8V to:
- VDAA_MIPI_DSI0_PLL pin on APQ8016.
- QFPROM_BLOW_VDD pin on PM8916.
- The AVDD, A2VDD and DVDD pins on ADV7533 bridge.
The LDO17 regulator feeds 3.3V to:
- The V3P3 pin on ADV7533 bridge.
Currently, the regulator min/max voltages for all the LDOs are set to the
range of what the PMIC supports. Set the ranges for L2, L6 and L17 to what
we need, i.e. 1.2V, 1.8V and 3.3V respectively.
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
pm_rst, aclk_rst and pclk_rst should be controlled by driver, so we
need to add these three resets for PCIe controller.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
In drivers/mmc/core/host.c, there is "max-freqeuncy" property.
It should be same behavior, So Use the "max-frequency" instead of
"clock-freq-min-max".
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Enabling SPI controllers, which are attached to different busses
inside an SoC, may result in overlapping enumeration and cause
sysfs registration failure. Example log after enabling two
controllers on Armada 8040 SoC with same identifiers:
[ 3.740415] sysfs: cannot create duplicate filename
'/class/spi_master/spi0'
[ 3.747510] ------------[ cut here ]------------
[ 3.752145] WARNING: at fs/sysfs/dir.c:31
[...]
[ 4.002299] orion_spi: probe of f4700600.spi failed with error -17
spi-orion driver offers dedicated DT property ('cell-index'), that
allow setting unique identifiers. Recently added support for CP110-slave
HW block introduced two new SPI controllers' nodes with same ID as
ones from CP110-master.
This commit fixes the issue by assigning different 'cell-index' values
for CP110-slave SPI controllers.
Fixes: 4eef78a009 ("arm64: dts: marvell: add description for the slave
CP110 in Armada 8K")
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
I2C and SPI interfaces share common clock trees within the CP110 HW block.
It occurred that SPI0 interface has wrong clock assignment in the device
tree, which is fixed in this commit to a proper value.
Fixes: c749b8d9de32 ("arm64: dts: marvell: add description for the ...")
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The label names of the peripheral clocks have a typo. Fix it before it is
more widely used.
Reported-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Add support for the AMAC ethernet to the Broadcom Northstar2 SoC device
tree
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Drivers using pinctrl-single,pins have #pinctrl-cells = <1>, while
pinctrl-single,bits need #pinctrl-cells = <2>.
Note that this patch can be optionally applied separately from the
driver changes as the driver supports also the legacy binding without
#pinctrl-cells.
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
These hardware blocks are SoC-specific, so their compatible strings
should be SoC-specific as well. This change has no impact on the
actual behavior since it is controlled by the generic "simple-mfd",
"syscon" compatible strings.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Add a CPU clock to every CPU node and CPU OPP tables to use the
generic cpufreq driver. All the CPUs in each cluster share the
same OPP table.
Note:
clock-latency-ns (300ns) was calculated based on the CPU-gear switch
sequencer spec; it takes 12 clock cycles on the sequencer running
at 50 MHz, plus a bit additional latency.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Add a CPU clock to every CPU node and a CPU OPP table to use the
generic cpufreq driver.
Note:
clock-latency-ns (300ns) was calculated based on the CPU-gear switch
sequencer spec; it takes 12 clock cycles on the sequencer running
at 50 MHz, plus a bit additional latency.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
The System Control node has 0x10000 byte of registers. The current
reg size must be expanded to use the cpufreq driver because the
registers controlling CPU frequency are located at offset 0x8000.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
At the first system bring-up, I chose to use spin-table because ARM
Trusted Firmware was not ready for this platform at that moment.
Actually, these SoCs are equipped with EL3 and able to provide PSCI.
Now I finished porting the ATF BL31 for the UniPhier platform, so it
is ready to migrate to PSCI enable method.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Since this board doesn't mount pull-up/down registers for
USB1_{OVC,PWEN} pins, we should enable bias setting to pull these
pins up/down.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Based on work for the r8a7796 by Wolfram Sang.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Enable the exposed SD card slots in the DT of the r8a7796/salvator-x.
Based on work for the r8a7795/salvator-x by Ai Kyuse.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Replace hard-coded values of type of GIC interrupt and its flags with
respective macros from header to increase code readability
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Interrupt of type IRQ_TYPE_NONE is not allowed for GIC interrupts and
generates an error:
genirq: Setting trigger mode 0 for irq 16 failed (gic_set_type+0x0/0x68)
The GIC requires shared interrupts to be edge rising or level high.
Platform declares support for both. Arbitrarily choose level high
everywhere hoping it will work on each platform.
Reported-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reported-by: Alban Browaeys <alban.browaeys@gmail.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
This patch adds the Device Tree source for Exynos5433-based Samsung TM2E
board. TM2E board is very similar to the TM2 board so the
exynos5433-tm2e.dts includes the TM2 DTS and overrides the differences.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Jonghwa Lee <jonghwa3.lee@samsung.com>
Signed-off-by: Beomho Seo <beomho.seo@samsung.com>
Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com>
Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>
Signed-off-by: Inha Song <ideal.song@samsung.com>
Signed-off-by: Ingi kim <ingi2.kim@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Tested-by: Andi Shyti <andi.shyti@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
This patch adds the Device Tree source for Exynos5433-based Samsung TM2
board.
This patch adds support for following devices:
1. basic SoC
- Initial booting for Samsung Exynos5433 SoC
- DRAM LPDDR3 (3GB)
- eMMC (32GB)
- ARM architecture timer
2. power management devices
- Sasmung S2MPS13 PMIC for the power supply
- CPUFREQ for big.LITTLE cores
- TMU for big.LITTLE cores and GPU
- ADC with thermistor to measure the temperature of AP/Battery/Charger
- Maxim MAX77843 Interface PMIC (MUIC/Haptic/Regulator)
3. sound devices
- I2S for sound bus
- LPASS for sound power control
- Wolfson WM5110 for sound codec
- Maxim MAX98504 for speaker amplifier
- TM2 ASoC Machine device driver node
3. display devices
- DECON, DSI and MIC for the panel output
4. USB devices
- USB 3.0 DRD (Dual Role Device)
- USB 3.0 Host controller
5. storage devices
- MSHC (Mobile Storage Host Controller) for eMMC device
6. misc devices
- gpio-keys (power, volume up/down, home key)
- PWM (Pulse Width Modulation Timer)
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Jonghwa Lee <jonghwa3.lee@samsung.com>
Signed-off-by: Beomho Seo <beomho.seo@samsung.com>
Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com>
Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>
Signed-off-by: Inha Song <ideal.song@samsung.com>
Signed-off-by: Ingi kim <ingi2.kim@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Tested-by: Andi Shyti <andi.shyti@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
The Pine64 is a cost-efficient development board based on the
Allwinner A64 SoC.
There are three models: the basic version with Fast Ethernet and
512 MB of DRAM (Pine64) and two Pine64+ versions, which both
feature Gigabit Ethernet and additional connectors for touchscreens
and a camera. Or as my son put it: "Those are smaller and these are
missing." ;-)
The two Pine64+ models just differ in the amount of DRAM
(1GB vs. 2GB). Since U-Boot will figure out the right size for us and
patches the DT accordingly we just need to provide one DT for the
Pine64+.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
[Maxime: Removed the common DTSI and include directly the pine64 DTS]
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The Allwinner A64 SoC is a low-cost chip with 4 ARM Cortex-A53 cores
and the typical tablet / TV box peripherals.
The SoC is based on the (32-bit) Allwinner H3 chip, sharing most of
the peripherals and the memory map.
Although the cores are proper 64-bit ones, the whole SoC is actually
limited to 4GB (including all the supported DRAM), so we use 32-bit
address and size cells. This has the nice feature of us being able to
reuse the DT for 32-bit kernels as well.
This .dtsi lists the hardware that we support so far.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Chen-Yu Tsai <wens@csie.org>
[Maxime: Convert to CCU binding, drop the MMC support for now]
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add a device node for the RST module, which provides a.o. reset control
and mode pin monitoring.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
Add a device node for the RST module, which provides a.o. reset control
and mode pin monitoring.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
There is a 'cpu-id' field in efuse, export it for other drivers
reference.
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The devicetree node for mt8173-auxadc lacks the clock and
io-channel-cells property. This leads to a non-working driver.
mt6577-auxadc 11001000.auxadc: failed to get auxadc clock
mt6577-auxadc: probe of 11001000.auxadc failed with error -2
Fix these fields to get the device up and running.
Fixes: 748c7d4de4 ("ARM64: dts: mt8173: Add thermal/auxadc device
nodes")
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
bind/unbind calls work correctly and remove a sdio-only
property from non-sdio mmc hosts, that accidentially was
added there.
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Merge tag 'v4.9-rockchip-dts64-fixes1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into fixes
Correct regulator handling on Rockchip arm64 boards to make
bind/unbind calls work correctly and remove a sdio-only
property from non-sdio mmc hosts, that accidentially was
added there.
* tag 'v4.9-rockchip-dts64-fixes1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm64: dts: rockchip: remove the abuse of keep-power-in-suspend
arm64: dts: rockchip: remove always-on and boot-on from vcc_sd
Signed-off-by: Olof Johansson <olof@lixom.net>
- Ray adds the required bus width and OOB sector size properties to the
Northstar 2 SVK reference board in order for the NAND controller to work
properly
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Merge tag 'arm-soc/for-4.9/devicetree-arm64-fixes' of http://github.com/Broadcom/stblinux into fixes
This pull request contains a single fix for Broadcom ARM64-based SoCs:
- Ray adds the required bus width and OOB sector size properties to the
Northstar 2 SVK reference board in order for the NAND controller to work
properly
* tag 'arm-soc/for-4.9/devicetree-arm64-fixes' of http://github.com/Broadcom/stblinux:
arm64: dts: Updated NAND DT properties for NS2 SVK
Signed-off-by: Olof Johansson <olof@lixom.net>
- A couple of patches from Fabio to fix the GPC power domain regression
which is caused by PM Domain core change 0159ec6707
("PM / Domains: Verify the PM domain is present when adding a
provider"), and a related kernel crash seen with multi_v7_defconfig
build.
- Correct the PHY ID mask for AR8031 to match phy driver code.
- Apply new added timer erratum A008585 for LS1043A and LS2080A SoC.
- Correct vf610 global timer IRQ flag to avoid warning from gic driver
after commit 992345a58e ("irqchip/gic: WARN if setting the
interrupt type for a PPI fails").
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Merge tag 'imx-fixes-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes
The i.MX fixes for 4.9:
- A couple of patches from Fabio to fix the GPC power domain regression
which is caused by PM Domain core change 0159ec6707
("PM / Domains: Verify the PM domain is present when adding a
provider"), and a related kernel crash seen with multi_v7_defconfig
build.
- Correct the PHY ID mask for AR8031 to match phy driver code.
- Apply new added timer erratum A008585 for LS1043A and LS2080A SoC.
- Correct vf610 global timer IRQ flag to avoid warning from gic driver
after commit 992345a58e ("irqchip/gic: WARN if setting the
interrupt type for a PPI fails").
* tag 'imx-fixes-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx: mach-imx6q: Fix the PHY ID mask for AR8031
ARM: dts: vf610: fix IRQ flag of global timer
ARM: imx: gpc: Fix the imx_gpc_genpd_init() error path
ARM: imx: gpc: Initialize all power domains
arm64: dts: Add timer erratum property for LS2080A and LS1043A
Signed-off-by: Olof Johansson <olof@lixom.net>
Add SDHI nodes to the DT of the r8a7796 SoC.
Based on the DT of the r8a7795 SoC.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
The SoC-specific compatible strings have been removed from the FCP DT
bindings, removed them from the device tree.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
bcm2837-rpi-3-b.dts, its only in-tree user, was overriding it as
"brcm,bcm2837" already.
Fixes: 9d56c22a78 ("ARM: bcm2835: Add devicetree for the Raspberry Pi 3.")
Cc: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Eric Anholt <eric@anholt.net>
This patch adds pmic specific dts which are configured specially
for db820c. One of such pin is GPIO_F on the Low Speed expansion
which has default output voltage of 2.7v. This patch fixes setup
for that pin to have an output voltage of 1.8v to comply with
96boards LS expansion specs.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The Hexagon core on the msm8916 provides services for audio control,
audio output, sensors and the Hexagon SDK. The Hexagon remoteproc node
allows us to boot this core.
Although its part of the core platform its left disabled as it will
crash without the rmtfs QMI service and we do not yet handle crashes
gracefully.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add the Hexagon SMD edge, so that QRTR is probed when the Hexagon is
booted.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add clock controller nodes, including one top controller
two low speed controllers and one audio controller.
Signed-off-by: Jun Nie <jun.nie@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This patch adds NAND DT properties for NS2 SVK to configure the bus
width width and OOB sector size
Signed-off-by: Prafulla Kota <prafulla.kota@broadcom.com>
Signed-off-by: Ray Jui <ray.jui@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Add video decoder node for MT8173
Signed-off-by: Tiffany Lin <tiffany.lin@mediatek.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
The LS1046A QorIQ development system (QDS) board is a high-performance
computing, evaluation, development, and test platform supporting the
LS1046A SoC.
Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The LS1046A reference design board (RDB) is a high-performance computing,
evaluation, and development platform that supports the LS1046A SoC.
Signed-off-by: Mingkai Hu <Mingkai.Hu@nxp.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
LS1046A is an SoC with 4 ARMv8 A72 cores and most other IP blocks
are similar to LS1043A which also complies to Freescale Chassis 2.1
spec.
Created LS1046A SoC DTSI file to be included by board level DTS
files.
Signed-off-by: Horia Geant? <horia.geanta@nxp.com>
Signed-off-by: Mihai Bantea <mihai.bantea@nxp.com>
Signed-off-by: Chenhui Zhao <chenhui.zhao@nxp.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Mingkai Hu <Mingkai.Hu@nxp.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Both the LS1043A and LS2080A platforms are affected by the Freescale
A008585 erratum. Advertise it in their respective device trees.
Signed-off-by: Scott Wood <oss@buserror.net>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commits adds the devicetree description of the SafeXcel IP-76 TRNG
found in the two Armada CP110.
Signed-off-by: Romain Perier <romain.perier@free-electrons.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Add support for eMMC/SD/SDIO on the Nexbox A95x.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add Wifi module support on the Amlogic P20x boards on the SDIO port.
The Wifi module also needs a 32768Hz clock provided by the PWM E port
through a pwm-clock node in it's power sequence.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add a 32768Hz clock generated by the PWM E port used by the WiFi module.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add binding and basic support for the SD/eMMC controller on Amlogic
S905/GXBB devices.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
[narmstrong: added nodes for GX, enabled SDIO on P20x]
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
With the "mmu-masters" property now deprecated and optional, the
generic binding offers a more efficient way to specify no masters.
CC: Ray Jui <rjui@broadcom.com>
CC: Scott Branden <sbranden@broadcom.com>
CC: Jon Mason <jonmason@broadcom.com>
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
This patch adds NAND DT properties for NS2 SVK to configure the bus
width width and OOB sector size
Signed-off-by: Prafulla Kota <prafulla.kota@broadcom.com>
Signed-off-by: Ray Jui <ray.jui@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Adding QSPI node compatible with the new spi-bcm-qspi driver for the Broadcom's
Northstar2 SoC.
Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com>
Signed-off-by: Yendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
It was invented for sdio only, and should not be used for sdmmc
or emmc. Remove it.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Enable both gxbb USB controller and add a 5V regulator for the OTG port
VBUS
Signed-off-by: Brian Kim <brian.kim@hardkernel.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
For boards only supporting 10/100 ethernet over a RMII PHY link, add
a separate pinctrl node. By the way, rename the existing node to rgmii
specific naming in all boards dts.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
In order to remove the boot warning :
[ 2.290933] Unable to detect cache hierarchy from DT for CPU 0
And add missing L2 cache hierarchy information, add a simple l2 cache node
and reference it from the A53 cpu nodes.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add support for the S905 (GXBB) version of the Nexbox A95X.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This patch introduces the basic support for the Amlogic S905D (MesonGXL)
and for the Amlogic evaluation boards P230 and P231.
No documentation has been released yet for this SoC, so for now only the
bare minimum has been added in the DT.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This patch introduces the basic support for the Amlogic S905X (Meson
GXL) and for the Amlogic evaluation board P212.
No documentation has been released yet for this SoC, so for now only the
bare minimum has been added in the DT.
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Carlo Caione <carlo@endlessm.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Move all non-gxbb specific nodes to a common GX dtsi.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
- Select corediv clk for all mvebu v7 SoC
- Fix clocksource for CP110 master SPI0 for Armada 7K/8K
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Merge tag 'mvebu-fixes-4.8-3' of git://git.infradead.org/linux-mvebu into fixes
mvebu fixes for 4.8 (part 3)
- Select corediv clk for all mvebu v7 SoC
- Fix clocksource for CP110 master SPI0 for Armada 7K/8K
* tag 'mvebu-fixes-4.8-3' of git://git.infradead.org/linux-mvebu:
arm64: dts: marvell: fix clocksource for CP110 master SPI0
ARM: mvebu: Select corediv clk for all mvebu v7 SoC
Signed-off-by: Olof Johansson <olof@lixom.net>
In case dr_mode isn't passed via DT, the dwc2 driver defaults
to OTG mode. But the Raspberry Pi 3 is designed only for host mode.
So fix this issue by linking to the dtsi file which set the dr_mode
to host.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Tested-by: Gerd Hoffmann <kraxel@redhat.com>
Juno has separate MMU-401 instances in front of the DMA-330, both HDLCD
controllers, the USB host controller, the PCIe root complex, and the
CoreSight ETR. Since there is still work to do to make all the relevant
subsystems interact nicely with the presence of an IOMMU, add the nodes
to aid development and testing but leave them disabled by default to
avoid nasty surprises.
CC: Liviu Dudau <liviu.dudau@arm.com>
CC: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
[sudeep.holla@arm.com: reformated subject]
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
This is a high performance 64 bit dual core low power consuming
networking computing platform based on the ARMv8 architecture.
It contains an Armada 3720 running up to 1.2Ghz.
This commit adds a basic definition for this board.
Signed-off-by: Romain Perier <romain.perier@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Declaring the endpoint makes LVDS enablement easier by just including
the corresponding panel's dtsi file.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
It can be used for the watchdog.
Based on similar work for r8a7795/salvator-x by Wolfram Sang.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
px5-evb has one sdmmc slot, so we could support sdmmc.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The emmc on px5-evb can support hs200, so let's add mmc-hs200-1_8v.
And in order to speed up the boot time, we could add no-sdio and
no-sd to simplify the initialization.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
PX5 EVB is designed by Rockchip for automotive field
with integrated CVBS (TP2825) / MIPI DSI / CSI / LVDS
HDMI video input/output interface, audio codec ES8396,
WIFI/BT (on RTL8723BS), Gsensor BMA250E and light&proximity
sensor STK3410.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The tcpc power domain will try to power up/down the power of Type-C PHY.
Hence, we need control it in Type-C PHY driver with the pm_runtime helper.
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
According to the TRM and downstream code from rockchip, the register
address of i2c1 on rk3368 is 0xff660000 and i2c2 is 0xff140000.
This patch fix the i2c1 & i2c2 register address definition error, also
fix the clk and pinctrl reference error.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Please don't add these for vcc_sd, and mmc-core/driver will control
it. Otherwise, it will waste energy even without sdmmc in slot.
Moreover, it will causes a bug:
If we insert/remove sd card, we could see
[9.337271] mmc0: new ultra high speed SDR25 SDHC card at address 0007
[9.345144] mmcblk0: mmc0:0007 SD32G 29.3 GiB
This is okay for normal sd insert/remove test, but when I debug some
issues for sdmmc, I did unbind/bind test. And there is a interesting
phenomenon when we bind the driver again:
[58.314069] mmc0: new high speed SDHC card at address 0007
[58.320282] mmcblk0: mmc0:0007 SD32G 29.3 GiB
So the sd card could just support high speed without power cycle
since the vcc_sd is always on, which makes the sd card fail to
reinit its internal ocr mask.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Pull libata updates from Tejun Heo:
- Write same support added
- Minor ahci MSIX irq handling updates
- Non-critical SCSI command translation fixes
- Controller specific changes
* 'for-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata:
ahci: qoriq: Revert "ahci: qoriq: Disable NCQ on ls2080a SoC"
libata: remove <asm-generic/libata-portmap.h>
libata: remove unused definitions from <asm/libata-portmap.h>
pata_at91: Use PTR_ERR_OR_ZERO rather than if(IS_ERR(...)) + PTR_ERR
ata: Replace BUG() with BUG_ON().
ata: sata_mv: Replacing dma_pool_alloc and memset with a single call dma_pool_zalloc.
libata: Some drives failing on SCT Write Same
ahci: use pci_alloc_irq_vectors
libata: SCT Write Same handle ATA_DFLAG_PIO
libata: SCT Write Same / DSM Trim
libata: Add support for SCT Write Same
libata: Safely overwrite attached page in WRITE SAME xlat
ahci: also use a per-port lock for the multi-MSIX case
ARM: dts: STiH407-family: Add ports-implemented property in sata nodes
ahci: st: Add ports-implemented property in support
ahci: qoriq: enable snoopable sata read and write
ahci: qoriq: adjust sata parameter
libata-scsi: fix MODE SELECT translation for Control mode page
libata-scsi: use u8 array to store mode page copy
Pull thermal managament updates from Zhang Rui:
- Enhance thermal "userspace" governor to export the reason when a
thermal event is triggered and delivered to user space. From Srinivas
Pandruvada
- Introduce a single TSENS thermal driver for the different versions of
the TSENS IP that exist, on different qcom msm/apq SoCs'. Support for
msm8916, msm8960, msm8974 and msm8996 families is also added. From
Rajendra Nayak
- Introduce hardware-tracked trip points support to the device tree
thermal sensor framework. The framework supports an arbitrary number
of trip points. Whenever the current temperature is changed, the trip
points immediately below and above the current temperature are found,
driver callback is invoked to program the hardware to get notified
when either of the two trip points are triggered. Hardware-tracked
trip points support for rockchip thermal driver is also added at the
same time. From Sascha Hauer, Caesar Wang
- Introduce a new thermal driver, which enables TMU (Thermal Monitor
Unit) on QorIQ platform. From Jia Hongtao
- Introduce a new thermal driver for Maxim MAX77620. From Laxman
Dewangan
- Introduce a new thermal driver for Intel platforms using WhiskeyCove
PMIC. From Bin Gao
- Add mt2701 chip support to MTK thermal driver. From Dawei Chien
- Enhance Tegra thermal driver to enable soctherm node and set
"critical", "hot" trips, for Tegra124, Tegra132, Tegra210. From Wei
Ni
- Add resume support for tango thermal driver. From Marc Gonzalez
- several small fixes and improvements for rockchip, qcom, imx, rcar,
mtk thermal drivers and thermal core code. From Caesar Wang, Keerthy,
Rocky Hao, Wei Yongjun, Peter Robinson, Bui Duc Phuc, Axel Lin, Hugh
Kang
* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux: (48 commits)
thermal: int3403: Process trip change notification
thermal: int340x: New Interface to read trip and notify
thermal: user_space gov: Add additional information in uevent
thermal: Enhance thermal_zone_device_update for events
arm64: tegra: set hot trips for Tegra210
arm64: tegra: set critical trips for Tegra210
arm64: tegra: add soctherm node for Tegra210
arm64: tegra: set hot trips for Tegra132
arm64: tegra: set critical trips for Tegra132
arm64: tegra: use tegra132-soctherm for Tegra132
arm: tegra: set hot trips for Tegra124
arm: tegra: set critical trips for Tegra124
thermal: tegra: add hw-throttle for Tegra132
thermal: tegra: add hw-throttle function
of: Add bindings of hw throttle for Tegra soctherm
thermal: mtk_thermal: Check return value of devm_thermal_zone_of_sensor_register
thermal: Add Mediatek thermal driver for mt2701.
dt-bindings: thermal: Add binding document for Mediatek thermal controller
thermal: max77620: Add thermal driver for reporting junction temp
thermal: max77620: Add DT binding doc for thermal driver
...
These updates have been kept in a separate branch mostly because
they rely on updates to the respective clk drivers to keep the
shared header files in sync.
- The Renesas r8a7796 (R-Car M3-W) platform gets added, this is an
automotive SoC similar to the ⅹ8a7795 chip we already support, but
the dts changes rely on a clock driver change that has been
merged for v4.9 through the clk tree.
- The Amlogic meson-gxbb (S905) platform gains support for a few
drivers merged through our tree, in particular the network and
usb driver changes are required and included here, and also
the clk tree changes.
- The Allwinner platforms have seen a large-scale change to their
clk drivers and the dts file updates must come after that.
This includes the newly added Nextthing GR8 platform, which is
derived from sun5i/A13.
- Some integrator (arm32) changes rely on clk driver changes.
- A single patch for lpc32xx has no such dependency but wasn't
added until just before the merge window
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Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC late DT updates from Arnd Bergmann:
"These updates have been kept in a separate branch mostly because they
rely on updates to the respective clk drivers to keep the shared
header files in sync.
- The Renesas r8a7796 (R-Car M3-W) platform gets added, this is an
automotive SoC similar to the ⅹ8a7795 chip we already support, but
the dts changes rely on a clock driver change that has been merged
for v4.9 through the clk tree.
- The Amlogic meson-gxbb (S905) platform gains support for a few
drivers merged through our tree, in particular the network and usb
driver changes are required and included here, and also the clk
tree changes.
- The Allwinner platforms have seen a large-scale change to their clk
drivers and the dts file updates must come after that. This
includes the newly added Nextthing GR8 platform, which is derived
from sun5i/A13.
- Some integrator (arm32) changes rely on clk driver changes.
- A single patch for lpc32xx has no such dependency but wasn't added
until just before the merge window"
* tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (99 commits)
ARM: dts: lpc32xx: add device node for IRAM on-chip memory
ARM: dts: sun8i: Add accelerometer to polaroid-mid2407pxe03
ARM: dts: sun8i: enable UART1 for iNet D978 Rev2 board
ARM: dts: sun8i: add pinmux for UART1 at PG
dts: sun8i-h3: add I2C0-2 peripherals to H3 SOC
dts: sun8i-h3: add pinmux definitions for I2C0-2
dts: sun8i-h3: associate exposed UARTs on Orange Pi Boards
dts: sun8i-h3: split off RTS/CTS for UART1 in seperate pinmux
dts: sun8i-h3: add pinmux definitions for UART2-3
ARM: dts: sun9i: a80-optimus: Disable EHCI1
ARM: dts: sun9i: cubieboard4: Add AXP806 PMIC device node and regulators
ARM: dts: sun9i: a80-optimus: Add AXP806 PMIC device node and regulators
ARM: dts: sun9i: cubieboard4: Declare AXP809 SW regulator as unused
ARM: dts: sun9i: a80-optimus: Declare AXP809 SW regulator as unused
ARM: dts: sun8i: Add touchscreen node for sun8i-a33-ga10h
ARM: dts: sun8i: Add touchscreen node for sun8i-a23-polaroid-mid2809pxe04
ARM: dts: sun8i: Add touchscreen node for sun8i-a23-polaroid-mid2407pxe03
ARM: dts: sun8i: Add touchscreen node for sun8i-a23-inet86dz
ARM: dts: sun8i: Add touchscreen node for sun8i-a23-gt90h
ARM64: dts: meson-gxbb-vega-s95: Enable USB Nodes
...
The 64-bit DT changes are surprisingly small this time, we only add two
SoC platforms: the ZTE ZX296718 Set-top-box SoC and the SocioNext
UniPhier LD11 TV SoC, each with their reference boards.
There are three new machines added for existing SoC platforms:
- The Marvell Armada 8040 development board is an impressive quad-core
Cortex-A72 machine with three 10gbit ethernet interfaces
- Qualcomms DragonBoard 820c single-board computer is their current
high-end phone platform in the 96boards form factor
- Rockchip: Tronsmart Orion r86 set-top-box is a popular mid-range
Android box based on the 8-core rk3368 SoC.
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Merge tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM 64-bit DT updates from Arnd Bergmann:
"The 64-bit DT changes are surprisingly small this time, we only add
two SoC platforms: the ZTE ZX296718 Set-top-box SoC and the SocioNext
UniPhier LD11 TV SoC, each with their reference boards.
There are three new machines added for existing SoC platforms:
- The Marvell Armada 8040 development board is an impressive
quad-core Cortex-A72 machine with three 10gbit ethernet interfaces
- Qualcomms DragonBoard 820c single-board computer is their current
high-end phone platform in the 96boards form factor
- Rockchip: Tronsmart Orion r86 set-top-box is a popular mid-range
Android box based on the 8-core rk3368 SoC"
* tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (91 commits)
arm64: dts: berlin4ct: Add L2 cache topology
arm64: dts: berlin4ct: enable all wdt nodes unconditionally
arm64: dts: berlin4ct: switch to Cortex-A53 specific pmu nodes
arm64: dts: Add ZTE ZX296718 SoC dts and Makefile
arm64: dts: apm: Add DT node for APM X-Gene 2 CPU clocks
arm64: dts: apm: Add X-Gene SoC hwmon to device tree
arm64: dts: apm: Fix interrupt polarity for X-Gene PCIe legacy interrupts
arm64: dts: apm: Add APM X-Gene v2 SoC PMU DTS entries
arm64: dts: apm: Add APM X-Gene SoC PMU DTS entries
arm64: dts: marvell: enable MSI for PCIe on Armada 7K/8K
arm64: dts: ls2080a: Add 'dma-coherent' for ls2080a PCI nodes
arm64: dts: rockchip: add Type-C phy for RK3399
arm64: dts: rockchip: enable the gmac for rk3399 evb board
arm64: dts: rockchip: add the gmac needed node for rk3399
arm64: dts: rockchip: support the pmu node for rk3399
arm64: dts: rockchip: change all interrupts cells to 4 on rk3399 SoCs
arm64: dts: rockchip: add the tcpc for rk3399 power domain
arm64: dts: rockchip: add efuse0 device node for rk3399
arm64: dts: rockchip: configure PCIe support for rk3399-evb
arm64: dts: rockchip: add the PCIe controller support for RK3399
...
This patch adds the L2 cache topology for berlin4ct which has 1MB L2
cache.
[Sebastian: rename cache node from "l2-cache" to "cache"]
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
After commit f29a72c24a ("watchdog: dw_wdt: Convert to use watchdog
infrastructure"), the dw_wdt driver can support multiple variants, so
unconditionally enable all dw_wdt nodes now.
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Commit ac82d12772 ("arm64: perf: add Cortex-A53 support") adds the
cortex A53 PMU support, thus instead of using the generic armv8-pmuv3
compatibility use the more specific Cortex A53 compatibility.
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Enable throttle function for SOC_THERM.
Set "hot" trips for cpu and gpu thermal zones, which
can trigger the SOC_THERM hardware throttle.
Signed-off-by: Wei Ni <wni@nvidia.com>
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Set general "critical" trip temperatures for cpu, gpu, mem and pllx
thermal zones on Tegra210, these trips can trigger shut down or reset.
Signed-off-by: Wei Ni <wni@nvidia.com>
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Adds soctherm node for Tegra210, and add cpu,
gpu, mem, pllx as thermal-zones. Set critical
trip temperatures for them.
Signed-off-by: Wei Ni <wni@nvidia.com>
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Enable throttle function for SOC_THERM.
Set "hot" trips for cpu and gpu thermal zones, which
can trigger the SOC_THERM hardware throttle.
Signed-off-by: Wei Ni <wni@nvidia.com>
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Set general "critical" trip temperatures for cpu, gpu, mem and pllx
thermal zones on Tegra132, these trips can trigger shut down or reset.
Signed-off-by: Wei Ni <wni@nvidia.com>
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
The Tegra132 has the specific settings for soctherm,
so change to use campatible "nvidia,tegra132-soctherm" for it.
And adds cpu, gpu, mem and pllx thermal zones.
Signed-off-by: Wei Ni <wni@nvidia.com>
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
I2C and SPI interfaces share common clock trees within the CP110 HW block.
It occurred that SPI0 interface has wrong clock assignment in the device
tree, which is fixed in this commit to a proper value.
Fixes: 728dacc7f4 ("arm64: dts: marvell: initial DT description of ...")
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
CC: <stable@vger.kernel.org> v4.7+
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
- Add initial DTS support for ZTE ZX296718 SoC and ZX296718 EVB board.
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Merge tag 'zte-dt64-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt64
Pull "ZTE arm64 device tree changes for 4.9" from Shawn Guo:
- Add initial DTS support for ZTE ZX296718 SoC and ZX296718 EVB board.
* tag 'zte-dt64-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
arm64: dts: Add ZTE ZX296718 SoC dts and Makefile
- enable MSI for PCIe on Armada 7K/8K
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Merge tag 'mvebu-dt64-4.9-2' of git://git.infradead.org/linux-mvebu into next/dt64
Pull "mvebu dt64 for 4.9 (part 2)" from Gregory CLEMENT:
- enable MSI for PCIe on Armada 7K/8K
* tag 'mvebu-dt64-4.9-2' of git://git.infradead.org/linux-mvebu:
arm64: dts: marvell: enable MSI for PCIe on Armada 7K/8K
Here are a couple of bugfixes for v4.8-rc. Most of them have
actually been around for a while this time but for some reason
didn't get applied early on. The shmobile regulator fix is the
only one that isn't completely obvious.
device tree changes:
- archtimer interrupts must be level triggered (multiple platforms)
- fix for USB and MMC clocks on STiH410
- fix split DT repository in case of raspberry-pi 3
- A new use of skeleton.dtsi on arm64 has crept in after that
was removed.
defconfig updates:
- xilinx vdma has a new Kconfig symbol name
- keystone requires CONFIG_NOP_USB_XCEIV since v4.8-rc1
code fixes:
- fix regulator quirk on shmobile
- suspend-to-ram regression on EXYNOS
maintainer updates:
- Javier Martinez Canillas is now a reviewer for Samsung EXYNOS
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Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Arnd Bergmann:
"Here are a couple of bugfixes for v4.8-rc.
Most of them have actually been around for a while this time but for
some reason didn't get applied early on. The shmobile regulator fix
is the only one that isn't completely obvious.
Device tree changes:
- archtimer interrupts must be level triggered (multiple platforms)
- fix for USB and MMC clocks on STiH410
- fix split DT repository in case of raspberry-pi 3
- a new use of skeleton.dtsi on arm64 has crept in after that was
removed.
defconfig updates:
- xilinx vdma has a new Kconfig symbol name
- keystone requires CONFIG_NOP_USB_XCEIV since v4.8-rc1
Code fixes:
- fix regulator quirk on shmobile
- suspend-to-ram regression on EXYNOS
Maintainer updates:
- Javier Martinez Canillas is now a reviewer for Samsung EXYNOS"
* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: keystone: defconfig: Fix USB configuration
arm64: dts: Fix broken architected timer interrupt trigger
ARM: multi_v7_defconfig: update XILINX_VDMA
ARM64: dts: bcm: Use a symlink to R-Pi dtsi files from arch=arm
ARM: dts: Remove use of skeleton.dtsi from bcm283x.dtsi
ARM: dts: STiH407-family: Provide interconnect clock for consumption in ST SDHCI
ARM: dts: STiH410: Handle interconnect clock required by EHCI/OHCI (USB)
ARM: shmobile: fix regulator quirk for Gen2
ARM: EXYNOS: Clear OF_POPULATED flag from PMU node in IRQ init callback
MAINTAINERS: Add myself as reviewer for Samsung Exynos support
Add device tree support for ZX296718 SoC and evaluation board based
on it. Also document new values.
Signed-off-by: Jun Nie <jun.nie@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Enable both gxbb USB controller and add a 5V regulator for the OTG port
VBUS
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Enable both gxbb USB controller and add a 5V regulator for the OTG port
VBUS
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
[khilman: rename vbus node to match P200 schematics]
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
* dt/irq-fix:
arm64: dts: Fix broken architected timer interrupt trigger
This resolves a non-obvious conflict between a bugfix from
v4.8 and a cleanup for the exynos7 platform.
The ARM architected timer specification mandates that the interrupt
associated with each timer is level triggered (which corresponds to
the "counter >= comparator" condition).
A number of DTs are being remarkably creative, declaring the interrupt
to be edge triggered. A quick look at the TRM for the corresponding ARM
CPUs clearly shows that this is wrong, and I've corrected those.
For non-ARM designs (and in the absence of a publicly available TRM),
I've made them active low as well, which can't be completely wrong
as the GIC cannot disinguish between level low and level high.
The respective maintainers are of course welcome to prove me wrong.
While I was at it, I took the liberty to fix a couple of related issue,
such as some spurious affinity bits on ThunderX, and their complete
absence on ls1043a (both of which seem to be related to copy-pasting
from other DTs).
Acked-by: Duc Dang <dhdang@apm.com>
Acked-by: Carlo Caione <carlo@endlessm.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add the nodes for the dwc2 USB controller and the related USB PHYs.
Currently we force usb0 to host mode because OTG is currently not
working in our PHY driver.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add nodes for i2c bus on gxbb based platforms.
On the OdroidC2 (I2C A) and P200 (I2C B), the pull-up resistor are
present directly on the board. This indicates that these pins are
dedicated to i2c.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This is used to configure the pins of the sd_emmc_a controller to
which an SDIO module is connected (when available).
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The Amlogic reference driver uses the "mc_val" devicetree property to
configure the PRG_ETHERNET_ADDR0 register. Unfortunately it uses magic
values for this configuration.
According to the datasheet the PRG_ETHERNET_ADDR0 register is at address
0xc8834108. However, the reference driver uses 0xc8834540 instead.
According to my tests, the value from the reference driver is correct.
No changes are required to the board dts files because the only
required configuration option is the phy-mode, which had to be
configured correctly before as well.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
All of these have a Realtek Gbit RGMII PHY.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Tested-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
- Add property dma-coherent for ls2080a PCI device to save software
cache maintenance.
- Update serial aliases and use stdout-path to sepecify console for
ls2080a and ls1043a boards.
- Add DDR memory controller device node for ls2080a and ls1043a SoCs.
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Merge tag 'imx-dt64-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt64
Pull "i.MX arm64 device tree changes for 4.9" from Shawn Guo:
- Add property dma-coherent for ls2080a PCI device to save software
cache maintenance.
- Update serial aliases and use stdout-path to sepecify console for
ls2080a and ls1043a boards.
- Add DDR memory controller device node for ls2080a and ls1043a SoCs.
* tag 'imx-dt64-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
arm64: dts: ls2080a: Add 'dma-coherent' for ls2080a PCI nodes
arm64: dts: add stdout-path to chosen node for ls2080a/ls1043a boards
arm64: dts: updates serial aliases for ls1043a rdb and qds boards
arm64: dts: Add DDR memory controller for Layerscape SoCs
Add a couple of devices (AGIC, ADMA) on Tegra210 and enable them on
Smaug. Also enable DPAUX on Smaug to allow the I2C bus that shares pads
with the DPAUX to be used to access various audio devices. Furthermore,
enable the XUSB controller on Smaug for USB 3.0 support.
Finally, select PM_GENERIC_DOMAINS for 64-bit Tegra devices to make sure
devices are probed only after their power partitions have been enabled.
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Merge tag 'tegra-for-4.9-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt64
Pull "arm64: tegra: Device tree changes for v4.9-rc1" from Thierry Reding:
Add a couple of devices (AGIC, ADMA) on Tegra210 and enable them on
Smaug. Also enable DPAUX on Smaug to allow the I2C bus that shares pads
with the DPAUX to be used to access various audio devices. Furthermore,
enable the XUSB controller on Smaug for USB 3.0 support.
Finally, select PM_GENERIC_DOMAINS for 64-bit Tegra devices to make sure
devices are probed only after their power partitions have been enabled.
* tag 'tegra-for-4.9-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
arm64: tegra: Select PM_GENERIC_DOMAINS
arm64: tegra: Enable XUSB controller on Tegra210 Smaug
arm64: tegra: Add the various audio devices for Tegra210 Smaug
arm64: tegra: Enable DPAUX for Tegra210 Smaug
arm64: tegra: Add ACONNECT, ADMA and AGIC nodes Tegra210 Smaug
arm64: tegra: Add SOR power-domain for Tegra210
arm64: tegra: Add ADMA node for Tegra210
arm64: tegra: Add AGIC node for Tegra210
arm64: tegra: Drop clock and reset names for XUSB powergates
arm64: tegra: Simplify Tegra210 GPIO compatible value
Pull "Rockchip dts64 changes for 4.9" from Heiko Stübner:
64bit Rockchip devicetree changes containing support for the recently
added firmware reboot-flag support, one new board the Tronsmart Orion
based on the rk3368 and a large number of newly supported peripherals
for the rk3399 (type-c phy, usb2 phy, pcie controller and pcie phy,
gmac, arm-pmu using ppi partitioning, efuse, saradc) as well as some
smaller housekeeping and non-critical fixes.
* tag 'v4.9-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (22 commits)
arm64: dts: rockchip: add Type-C phy for RK3399
arm64: dts: rockchip: enable the gmac for rk3399 evb board
arm64: dts: rockchip: add the gmac needed node for rk3399
arm64: dts: rockchip: support the pmu node for rk3399
arm64: dts: rockchip: change all interrupts cells to 4 on rk3399 SoCs
arm64: dts: rockchip: add the tcpc for rk3399 power domain
arm64: dts: rockchip: add efuse0 device node for rk3399
arm64: dts: rockchip: configure PCIe support for rk3399-evb
arm64: dts: rockchip: add the PCIe controller support for RK3399
arm64: dts: rockchip: add the PCIe PHY for RK3399
arm64: dts: rockchip: add the gmac power domain on rk3399
arm64: dts: rockchip: Add pinctrl entry for 32k clock on rk3399
arm64: dts: rockchip: set to CCI clock of RK3399 to 600M
arm64: dts: rockchip: fix the address map for WDT0 and WDT1
arm64: dts: rockchip: add the saradc for rk3399
arm64: dts: rockchip: configure usb2-phy support for rk3399-evb
arm64: dts: rockchip: add usb2-phy support for rk3399
arm64: dts: rockchip: add syscon-reboot-mode DT node
soc: rockchip: add reboot-mode header
arm64: dts: rockchip: remove broken-cd from sdio0
...
v4.9, please pull the folllowing:
- Dhanajay adds the PWM Device Tree nodes to the Northstar 2 DTS files
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Merge tag 'arm-soc/for-4.9/devicetree-arm64' of http://github.com/Broadcom/stblinux into next/dt64
Pull "Broadcom devicetree-arm64 changes for 4.9" from Florian Fainelli:
This pull request contains Broadcom ARM64-based SoC Device Tree changes for
v4.9, please pull the folllowing:
- Dhanajay adds the PWM Device Tree nodes to the Northstar 2 DTS files
* tag 'arm-soc/for-4.9/devicetree-arm64' of http://github.com/Broadcom/stblinux:
arm64: dts: Add PWM DT node for NS2
- add description for the new Armada 8040 dev board
- add the PIC and PMU on Armada 7K/8K
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Merge tag 'mvebu-dt64-4.9-1' of git://git.infradead.org/linux-mvebu into next/dt64
Pull "mvebu dt64 for 4.9 (part 1)" from Gregory CLEMENT:
- add description for the new Armada 8040 dev board
- add the PIC and PMU on Armada 7K/8K
* tag 'mvebu-dt64-4.9-1' of git://git.infradead.org/linux-mvebu:
arm64: dts: marvell: describe the PIC and PMU on Armada 7K/8K
arm64: dts: marvell: add description for the Armada 8040 dev board
arm64: dts: marvell: add description for the slave CP110 in Armada 8K
* Updates for MSM8916 including TSCR, SMSM/SMP2P, and MBA reserve
* Update SCM node to denote being a reset-controller
* Fix broken interrupt settings
* Add TSENS nodes for MSM8916/MSM8996
* Add DB820c support
* Add MSM8916/APQ8016 display support
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Merge tag 'qcom-arm64-for-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/dt64
Pull "Qualcomm ARM64 Updates for v4.9" from Andy Gross:
* Updates for MSM8916 including TSCR, SMSM/SMP2P, and MBA reserve
* Update SCM node to denote being a reset-controller
* Fix broken interrupt settings
* Add TSENS nodes for MSM8916/MSM8996
* Add DB820c support
* Add MSM8916/APQ8016 display support
* tag 'qcom-arm64-for-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
arm64: dts: apq8016-sbc: Add HDMI display support
arm64: dts: msm8916: Add display support
arm64: dts: db820c: add support to external sd card.
arm64: dts: db820c: add support to SPI on HS
arm64: dts: db820c: add support to LS-SPI0
arm64: dts: db820c: add support to I2C on HS
arm64: dts: db820c: add support to LS-I2C1
arm64: dts: db820c: add support to LS-I2C0
arm64: dts: db820c: add support to LS-UART0
arm64: dts: db820c: add basic board support
arm64: dts: msm8996: Add thermal zones, tsens and qfprom nodes
arm64: dts: msm8916: Add thermal zones, tsens and qfprom nodes
arm64: dts: qcom: Fix broken interrupt trigger settings
arm64: dts: qcom: msm8916: Add tcsr syscon
arm64: dts: qcom: msm8916: Make scm a reset-controller
arm64: dts: qcom: msm8916: Add mba memory reserve
arm64: dts: qcom: msm8916: Add smsm and smp2p nodes
- Set UART1 clock frequency to 150MHz for higher baud rates on hikey
- Add display subsystem, HDMI and cma nodes on hikey to support display
- Add syscon-reboot-mode support on hikey
- Add pstore support on hikey
- Add resets and sd-uhs-sdr property dwmmc ndoe on hikey
- Remove hip05_hns.dtsi since it can not be built without mbigenv1
- Update system controller bingding document for hip05 and hip06
- Add xge and sas support on hip06
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Merge tag 'hisi-soc-dt-for-4.9' of git://github.com/hisilicon/linux-hisi into next/dt64
Pull "ARM64: DT: Hisilicon SoC DT updates for 4.9" from Wei Xu:
- Set UART1 clock frequency to 150MHz for higher baud rates on hikey
- Add display subsystem, HDMI and cma nodes on hikey to support display
- Add syscon-reboot-mode support on hikey
- Add pstore support on hikey
- Add resets and sd-uhs-sdr property dwmmc ndoe on hikey
- Remove hip05_hns.dtsi since it can not be built without mbigenv1
- Update system controller bingding document for hip05 and hip06
- Add xge and sas support on hip06
* tag 'hisi-soc-dt-for-4.9' of git://github.com/hisilicon/linux-hisi:
arm64: dts: hi6220: add sd-uhs- properties into dwmmc_1
arm64: dts: hi6220: add resets property into dwmmc nodes
arm64: dts: hikey: extend default cma size to 128MB
arm64: dts: hip06: Append sas node
arm64: dts: hip06: Append hns node
dt-bindings: hisilicon: Add Hip05 and Hip06 system controller support
arm64: dts: hip05: kill hip05_hns.dtsi
arm64: dts: hikey: Add pstore support for HiKey
arm64: dts: hikey: Add hikey support for syscon-reboot-mode
arm64: dts: Add HDMI node for hi6220-hikey
arm64: dts: Add display subsystem DT nodes for hi6220-hikey
arm64: dts: set UART1 clock frequency to 150MHz
1. Use human-friendly symbols for interrupt flags.
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Merge tag 'samsung-dt64-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt64
Pull "Samsung DeviceTree ARM64 update for v4.9" from Krzysztof Kozlowski:
1. Use human-friendly symbols for interrupt flags.
* tag 'samsung-dt64-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos: Use human-friendly symbols for timer interrupt flags
* Match DT names other projects and documents
* Use clock/reset drivers
* Add new SoC/board support
* Misc
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Merge tag 'uniphier-dt64-v4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier into next/dt64
Merge "UniPhier ARM64 SoC DT updates for v4.9" from Masahiro Yamada:
* Match DT names other projects and documents
* Use clock/reset drivers
* Add new SoC/board support
* Misc
* tag 'uniphier-dt64-v4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier:
arm64: dts: uniphier: add LD11 SoC/Board support
arm64: dts: uniphier: add specific compatible to SoC-Glue node
arm64: dts: uniphier: use clock/reset controllers
arm64: dts: uniphier: add pinctrl property to System Bus node
arm64: dts: uniphier: match DT names to other projects and documents
This commit adds a reference to the appropriate MSI controller in the
description of the PCIe controllers on Marvel Armada 7K and 8K
platforms.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Conflicts:
drivers/net/ethernet/mediatek/mtk_eth_soc.c
drivers/net/ethernet/qlogic/qed/qed_dcbx.c
drivers/net/phy/Kconfig
All conflicts were cases of overlapping commits.
Signed-off-by: David S. Miller <davem@davemloft.net>
The ../../../arm... style cross-references added by commit 9d56c22a78
("ARM: bcm2835: Add devicetree for the Raspberry Pi 3.") do not work in the
context of the split device-tree repository[0] (where the directory
structure differs). As with commit 8ee57b8182 ("ARM64: dts: vexpress: Use
a symlink to vexpress-v2m-rs1.dtsi from arch=arm") use symlinks instead.
[0] https://git.kernel.org/cgit/linux/kernel/git/devicetree/devicetree-rebasing.git/
Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Frank Rowand <frowand.list@gmail.com>
Cc: Eric Anholt <eric@anholt.net>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Lee Jones <lee@kernel.org>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-rpi-kernel@lists.infradead.org
Cc: arm@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The 'dma-coherent' indicates that the hardware IP block can ensure
the coherency of the data transferred from/to the IP block. This
can avoid the software cache flush/invalid actions, and improve
the performance significantly.
The PCI IP block of ls2080a has this capability, so adding this
feature to improve the PCI performance.
Signed-off-by: Liu Gang <Gang.Liu@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This supports GPIO leds on H3ULCB board
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This supports SSI sound for H3ULCB board.
SSI DMA mode used. CS2000 used as AUDIO_CLK_B.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This supports GPIO keys on H3ULCB board
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Remove cap-mmc-highspeed property from SDHI2 and SDHI3.
This property is unnecessary as the driver automatically sets
the highspeed capability. Furthermore its use is inconsistent with SDHI0
and SDHI1 which are also highspeed capable but do not have this property
present.
Found by inspection.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
There are 2 Type-C phy on RK3399, they are almost same, except the
address of register. They support USB3.0 Type-C and DisplayPort1.3
Alt Mode on USB Type-C. Register a phy, supply it to USB3 controller
and DP controller.
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
We add the required and optional properties for evb board.
See the [0] to get the detail information.
[0]:
Documentation/devicetree/bindings/net/rockchip-dwmac.txt
Signed-off-by: Roger Chen <roger.chen@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The RK3399 GMAC Ethernet Controller provides a complete Ethernet interface
from processor to a Reduced Media Independent Interface (RMII) and Reduced
Gigabit Media Independent Interface (RGMII) compliant Ethernet PHY.
This patch adds the related needed device information.
e.g.: interrupts, grf, clocks, pinctrl and so on.
The full details are in [0].
[0]:
Documentation/devicetree/bindings/net/rockchip-dwmac.txt
Signed-off-by: Roger Chen <roger.chen@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
