ARMv8 Vexpress/Juno DT updates for v4.11

1. Addition of Coresight support on Juno R1 and R2 variants
 
 2. Addition of STM(System Trace Macrocell) support on all Juno variants
 
 3. Removed incorrect nesting of dtsi files
 
 4. Removed untested USB hub only available on initial Juno R0 motherboard
 
 5. Added ETR SMMU power domain and dma-ranges property
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Merge tag 'juno-updates-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/dt64

ARMv8 Vexpress/Juno DT updates for v4.11

1. Addition of Coresight support on Juno R1 and R2 variants
2. Addition of STM(System Trace Macrocell) support on all Juno variants
3. Removed incorrect nesting of dtsi files
4. Removed untested USB hub only available on initial Juno R0 motherboard
5. Added ETR SMMU power domain and dma-ranges property

* tag 'juno-updates-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
  arm64: dts: juno: remove motherboard USB node
  arm64: dts: juno: add ETR SMMU power domain
  arm64: dts: juno: add dma-ranges property
  arm64: dts: juno: add missing CoreSight STM component
  arm64: dts: juno: add CoreSight support for Juno r1/r2 variants
  arm64: dts: juno: refactor CoreSight support on Juno r0
  arm64: dts: juno: remove dtsi nesting inside tree structure

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2017-01-18 16:14:29 -08:00
commit 992ffc3eb1
7 changed files with 186 additions and 26 deletions

View File

@ -1,6 +1,10 @@
#include "juno-clocks.dtsi"
/ {
/*
* Devices shared by all Juno boards
*/
dma-ranges = <0 0 0 0 0x100 0>;
memtimer: timer@2a810000 {
compatible = "arm,armv7-timer-mem";
@ -48,6 +52,7 @@
#iommu-cells = <1>;
#global-interrupts = <1>;
dma-coherent;
power-domains = <&scpi_devpd 0>;
status = "disabled";
};
@ -83,7 +88,7 @@
* The actual size is just 4K though 64K is reserved. Access to the
* unmapped reserved region results in a DECERR response.
*/
etf@20010000 {
etf@20010000 { /* etf0 */
compatible = "arm,coresight-tmc", "arm,primecell";
reg = <0 0x20010000 0 0x1000>;
@ -97,7 +102,7 @@
/* input port */
port@0 {
reg = <0>;
etf_in_port: endpoint {
etf0_in_port: endpoint {
slave-mode;
remote-endpoint = <&main_funnel_out_port>;
};
@ -106,8 +111,7 @@
/* output port */
port@1 {
reg = <0>;
etf_out_port: endpoint {
remote-endpoint = <&replicator_in_port0>;
etf0_out_port: endpoint {
};
};
};
@ -128,7 +132,8 @@
};
};
main-funnel@20040000 {
/* main funnel on Juno r0, cssys0 funnel on Juno r1/r2 as per TRM*/
main_funnel: funnel@20040000 {
compatible = "arm,coresight-funnel", "arm,primecell";
reg = <0 0x20040000 0 0x1000>;
@ -139,13 +144,15 @@
#address-cells = <1>;
#size-cells = <0>;
/* output port */
port@0 {
reg = <0>;
main_funnel_out_port: endpoint {
remote-endpoint = <&etf_in_port>;
remote-endpoint = <&etf0_in_port>;
};
};
/* input ports */
port@1 {
reg = <0>;
main_funnel_in_port0: endpoint {
@ -161,7 +168,6 @@
remote-endpoint = <&cluster1_funnel_out_port>;
};
};
};
};
@ -181,6 +187,21 @@
};
};
stm@20100000 {
compatible = "arm,coresight-stm", "arm,primecell";
reg = <0 0x20100000 0 0x1000>,
<0 0x28000000 0 0x1000000>;
reg-names = "stm-base", "stm-stimulus-base";
clocks = <&soc_smc50mhz>;
clock-names = "apb_pclk";
power-domains = <&scpi_devpd 0>;
port {
stm_out_port: endpoint {
};
};
};
etm0: etm@22040000 {
compatible = "arm,coresight-etm4x", "arm,primecell";
reg = <0 0x22040000 0 0x1000>;
@ -195,7 +216,7 @@
};
};
cluster0-funnel@220c0000 {
funnel@220c0000 { /* cluster0 funnel */
compatible = "arm,coresight-funnel", "arm,primecell";
reg = <0 0x220c0000 0 0x1000>;
@ -259,7 +280,7 @@
};
};
cluster1-funnel@230c0000 {
funnel@230c0000 { /* cluster1 funnel */
compatible = "arm,coresight-funnel", "arm,primecell";
reg = <0 0x230c0000 0 0x1000>;
@ -382,7 +403,6 @@
reg = <0>;
replicator_in_port0: endpoint {
slave-mode;
remote-endpoint = <&etf_out_port>;
};
};
};
@ -507,8 +527,6 @@
};
};
/include/ "juno-clocks.dtsi"
smmu_dma: iommu@7fb00000 {
compatible = "arm,mmu-401", "arm,smmu-v1";
reg = <0x0 0x7fb00000 0x0 0x10000>;
@ -719,3 +737,4 @@
interrupt-map-mask = <0 0>;
interrupt-map = <0 0 &gic 0 0 0 168 IRQ_TYPE_LEVEL_HIGH>;
};
};

View File

@ -6,7 +6,7 @@
* This file is licensed under a dual GPLv2 or BSD license.
*
*/
/ {
/* SoC fixed clocks */
soc_uartclk: refclk7273800hz {
compatible = "fixed-clock";
@ -42,3 +42,4 @@
clock-frequency = <400000000>;
clock-output-names = "faxi_clk";
};
};

View File

@ -0,0 +1,100 @@
/ {
funnel@20130000 { /* cssys1 */
compatible = "arm,coresight-funnel", "arm,primecell";
reg = <0 0x20130000 0 0x1000>;
clocks = <&soc_smc50mhz>;
clock-names = "apb_pclk";
power-domains = <&scpi_devpd 0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
/* output port */
port@0 {
reg = <0>;
csys1_funnel_out_port: endpoint {
remote-endpoint = <&etf1_in_port>;
};
};
/* input port */
port@1 {
reg = <0>;
csys1_funnel_in_port0: endpoint {
slave-mode;
};
};
};
};
etf@20140000 { /* etf1 */
compatible = "arm,coresight-tmc", "arm,primecell";
reg = <0 0x20140000 0 0x1000>;
clocks = <&soc_smc50mhz>;
clock-names = "apb_pclk";
power-domains = <&scpi_devpd 0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
/* input port */
port@0 {
reg = <0>;
etf1_in_port: endpoint {
slave-mode;
remote-endpoint = <&csys1_funnel_out_port>;
};
};
/* output port */
port@1 {
reg = <0>;
etf1_out_port: endpoint {
remote-endpoint = <&csys2_funnel_in_port1>;
};
};
};
};
funnel@20150000 { /* cssys2 */
compatible = "arm,coresight-funnel", "arm,primecell";
reg = <0 0x20150000 0 0x1000>;
clocks = <&soc_smc50mhz>;
clock-names = "apb_pclk";
power-domains = <&scpi_devpd 0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
/* output port */
port@0 {
reg = <0>;
csys2_funnel_out_port: endpoint {
remote-endpoint = <&replicator_in_port0>;
};
};
/* input ports */
port@1 {
reg = <0>;
csys2_funnel_in_port0: endpoint {
slave-mode;
remote-endpoint = <&etf0_out_port>;
};
};
port@2 {
reg = <1>;
csys2_funnel_in_port1: endpoint {
slave-mode;
remote-endpoint = <&etf1_out_port>;
};
};
};
};
};

View File

@ -131,13 +131,6 @@
vddvario-supply = <&mb_fixed_3v3>;
};
usb@5,00000000 {
compatible = "nxp,usb-isp1763";
reg = <5 0x00000000 0x20000>;
bus-width = <16>;
interrupts = <4>;
};
iofpga@3,00000000 {
compatible = "simple-bus";
#address-cells = <1>;

View File

@ -9,6 +9,8 @@
/dts-v1/;
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "juno-base.dtsi"
#include "juno-cs-r1r2.dtsi"
/ {
model = "ARM Juno development board (r1)";
@ -176,8 +178,6 @@
<&A53_2>,
<&A53_3>;
};
#include "juno-base.dtsi"
};
&memtimer {
@ -227,3 +227,15 @@
&gpu1_thermal_zone {
status = "okay";
};
&etf0_out_port {
remote-endpoint = <&csys2_funnel_in_port0>;
};
&replicator_in_port0 {
remote-endpoint = <&csys2_funnel_out_port>;
};
&stm_out_port {
remote-endpoint = <&csys1_funnel_in_port0>;
};

View File

@ -9,6 +9,8 @@
/dts-v1/;
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "juno-base.dtsi"
#include "juno-cs-r1r2.dtsi"
/ {
model = "ARM Juno development board (r2)";
@ -176,8 +178,6 @@
<&A53_2>,
<&A53_3>;
};
#include "juno-base.dtsi"
};
&memtimer {
@ -227,3 +227,15 @@
&gpu1_thermal_zone {
status = "okay";
};
&etf0_out_port {
remote-endpoint = <&csys2_funnel_in_port0>;
};
&replicator_in_port0 {
remote-endpoint = <&csys2_funnel_out_port>;
};
&stm_out_port {
remote-endpoint = <&csys1_funnel_in_port0>;
};

View File

@ -9,6 +9,7 @@
/dts-v1/;
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "juno-base.dtsi"
/ {
model = "ARM Juno development board (r0)";
@ -176,8 +177,6 @@
<&A53_2>,
<&A53_3>;
};
#include "juno-base.dtsi"
};
&etm0 {
@ -203,3 +202,27 @@
&etm5 {
cpu = <&A53_3>;
};
&etf0_out_port {
remote-endpoint = <&replicator_in_port0>;
};
&replicator_in_port0 {
remote-endpoint = <&etf0_out_port>;
};
&stm_out_port {
remote-endpoint = <&main_funnel_in_port2>;
};
&main_funnel {
ports {
port@3 {
reg = <2>;
main_funnel_in_port2: endpoint {
slave-mode;
remote-endpoint = <&stm_out_port>;
};
};
};
};