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Qualcomm ARM64 Updates for v4.9

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* Updates for MSM8916 including TSCR, SMSM/SMP2P, and MBA reserve
 * Update SCM node to denote being a reset-controller
 * Fix broken interrupt settings
 * Add TSENS nodes for MSM8916/MSM8996
 * Add DB820c support
 * Add MSM8916/APQ8016 display support
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Merge tag 'qcom-arm64-for-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/dt64

Pull "Qualcomm ARM64 Updates for v4.9" from Andy Gross:

* Updates for MSM8916 including TSCR, SMSM/SMP2P, and MBA reserve
* Update SCM node to denote being a reset-controller
* Fix broken interrupt settings
* Add TSENS nodes for MSM8916/MSM8996
* Add DB820c support
* Add MSM8916/APQ8016 display support

* tag 'qcom-arm64-for-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
  arm64: dts: apq8016-sbc: Add HDMI display support
  arm64: dts: msm8916: Add display support
  arm64: dts: db820c: add support to external sd card.
  arm64: dts: db820c: add support to SPI on HS
  arm64: dts: db820c: add support to LS-SPI0
  arm64: dts: db820c: add support to I2C on HS
  arm64: dts: db820c: add support to LS-I2C1
  arm64: dts: db820c: add support to LS-I2C0
  arm64: dts: db820c: add support to LS-UART0
  arm64: dts: db820c: add basic board support
  arm64: dts: msm8996: Add thermal zones, tsens and qfprom nodes
  arm64: dts: msm8916: Add thermal zones, tsens and qfprom nodes
  arm64: dts: qcom: Fix broken interrupt trigger settings
  arm64: dts: qcom: msm8916: Add tcsr syscon
  arm64: dts: qcom: msm8916: Make scm a reset-controller
  arm64: dts: qcom: msm8916: Add mba memory reserve
  arm64: dts: qcom: msm8916: Add smsm and smp2p nodes
This commit is contained in:
Arnd Bergmann 2016-09-14 17:07:38 +02:00
commit bd3af15a4e
8 changed files with 652 additions and 7 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
arch/arm64/boot/dts/qcom/Makefile
View File

@ -1,5 +1,6 @@
dtb-$(CONFIG_ARCH_QCOM) += apq8016-sbc.dtb msm8916-mtp.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8996-mtp.dtb
dtb-$(CONFIG_ARCH_QCOM) += apq8096-db820c.dtb
always := $(dtb-y)
subdir-y := $(dts-dirs)

48
arch/arm64/boot/dts/qcom/apq8016-sbc-soc-pins.dtsi
View File

@ -24,4 +24,52 @@
bias-pull-up;
};
};
adv7533_int_active: adv533_int_active {
pinmux {
function = "gpio";
pins = "gpio31";
};
pinconf {
pins = "gpio31";
drive-strength = <16>;
bias-disable;
};
};
adv7533_int_suspend: adv7533_int_suspend {
pinmux {
function = "gpio";
pins = "gpio31";
};
pinconf {
pins = "gpio31";
drive-strength = <2>;
bias-disable;
};
};
adv7533_switch_active: adv7533_switch_active {
pinmux {
function = "gpio";
pins = "gpio32";
};
pinconf {
pins = "gpio32";
drive-strength = <16>;
bias-disable;
};
};
adv7533_switch_suspend: adv7533_switch_suspend {
pinmux {
function = "gpio";
pins = "gpio32";
};
pinconf {
pins = "gpio32";
drive-strength = <2>;
bias-disable;
};
};
};

82
arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
View File

@ -63,6 +63,47 @@
/* On High speed expansion */
label = "HS-I2C2";
status = "okay";
adv_bridge: bridge@39 {
status = "okay";
compatible = "adi,adv7533";
reg = <0x39>;
interrupt-parent = <&msmgpio>;
interrupts = <31 2>;
adi,dsi-lanes = <4>;
pd-gpios = <&msmgpio 32 0>;
avdd-supply = <&pm8916_l6>;
v1p2-supply = <&pm8916_l6>;
v3p3-supply = <&pm8916_l17>;
pinctrl-names = "default","sleep";
pinctrl-0 = <&adv7533_int_active &adv7533_switch_active>;
pinctrl-1 = <&adv7533_int_suspend &adv7533_switch_suspend>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
adv7533_in: endpoint {
remote-endpoint = <&dsi0_out>;
};
};
port@1 {
reg = <1>;
adv7533_out: endpoint {
remote-endpoint = <&hdmi_con>;
};
};
};
};
};
i2c@78ba000 {
@ -180,6 +221,36 @@
lpass@07708000 {
status = "okay";
};
mdss@1a00000 {
status = "okay";
mdp@1a01000 {
status = "okay";
};
dsi@1a98000 {
status = "okay";
vdda-supply = <&pm8916_l2>;
vddio-supply = <&pm8916_l6>;
ports {
port@1 {
endpoint {
remote-endpoint = <&adv7533_in>;
data-lanes = <0 1 2 3>;
};
};
};
};
dsi-phy@1a98300 {
status = "okay";
vddio-supply = <&pm8916_l6>;
};
};
};
usb2513 {
@ -194,6 +265,17 @@
pinctrl-names = "default";
pinctrl-0 = <&usb_id_default>;
};
hdmi-out {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_con: endpoint {
remote-endpoint = <&adv7533_out>;
};
};
};
};
&smd_rpm_regulators {

39
arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi Normal file
View File

@ -0,0 +1,39 @@
/*
* Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
&msmgpio {
sdc2_cd_on: sdc2_cd_on {
mux {
pins = "gpio38";
function = "gpio";
};
config {
pins = "gpio38";
bias-pull-up; /* pull up */
drive-strength = <16>; /* 16 MA */
};
};
sdc2_cd_off: sdc2_cd_off {
mux {
pins = "gpio38";
function = "gpio";
};
config {
pins = "gpio38";
bias-pull-up; /* pull up */
drive-strength = <2>; /* 2 MA */
};
};
};

21
arch/arm64/boot/dts/qcom/apq8096-db820c.dts Normal file
View File

@ -0,0 +1,21 @@
/*
* Copyright (c) 2014-2016, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
#include "apq8096-db820c.dtsi"
/ {
model = "Qualcomm Technologies, Inc. DB820c";
compatible = "arrow,apq8096-db820c", "qcom,apq8096-sbc";
};

88
arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi Normal file
View File

@ -0,0 +1,88 @@
/*
* Copyright (c) 2014-2016, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include "msm8996.dtsi"
#include "apq8096-db820c-pins.dtsi"
/ {
aliases {
serial0 = &blsp2_uart1;
serial1 = &blsp2_uart2;
i2c0 = &blsp1_i2c2;
i2c1 = &blsp2_i2c1;
i2c2 = &blsp2_i2c0;
spi0 = &blsp1_spi0;
spi1 = &blsp2_spi5;
};
chosen {
stdout-path = "serial0:115200n8";
};
soc {
serial@75b0000 {
label = "LS-UART1";
status = "okay";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&blsp2_uart1_2pins_default>;
pinctrl-1 = <&blsp2_uart1_2pins_sleep>;
};
serial@75b1000 {
label = "LS-UART0";
status = "okay";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&blsp2_uart2_4pins_default>;
pinctrl-1 = <&blsp2_uart2_4pins_sleep>;
};
i2c@07577000 {
/* On Low speed expansion */
label = "LS-I2C0";
status = "okay";
};
i2c@075b6000 {
/* On Low speed expansion */
label = "LS-I2C1";
status = "okay";
};
spi@07575000 {
/* On Low speed expansion */
label = "LS-SPI0";
status = "okay";
};
i2c@075b5000 {
/* On High speed expansion */
label = "HS-I2C2";
status = "okay";
};
spi@075ba000{
/* On High speed expansion */
label = "HS-SPI1";
status = "okay";
};
sdhci@74a4900 {
/* External SD card */
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>;
pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;
cd-gpios = <&msmgpio 38 0x1>;
status = "okay";
};
};
};

286
arch/arm64/boot/dts/qcom/msm8916.dtsi
View File

@ -86,6 +86,11 @@
reg = <0x0 0x89300000 0x0 0x600000>;
no-map;
};
mba_mem: mba@8ea00000 {
no-map;
reg = <0 0x8ea00000 0 0x100000>;
};
};
cpus {
@ -155,6 +160,49 @@
interrupts = <GIC_PPI 7 GIC_CPU_MASK_SIMPLE(4)>;
};
thermal-zones {
cpu-thermal0 {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens 4>;
trips {
cpu_alert0: trip0 {
temperature = <75000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit0: trip1 {
temperature = <110000>;
hysteresis = <2000>;
type = "critical";
};
};
};
cpu-thermal1 {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens 3>;
trips {
cpu_alert1: trip0 {
temperature = <75000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit1: trip1 {
temperature = <110000>;
hysteresis = <2000>;
type = "critical";
};
};
};
};
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
@ -187,10 +235,11 @@
};
firmware {
scm {
scm: scm {
compatible = "qcom,scm";
clocks = <&gcc GCC_CRYPTO_CLK>, <&gcc GCC_CRYPTO_AXI_CLK>, <&gcc GCC_CRYPTO_AHB_CLK>;
clock-names = "core", "bus", "iface";
#reset-cells = <1>;
};
};
@ -228,6 +277,11 @@
reg = <0x1905000 0x20000>;
};
tcsr: syscon@1937000 {
compatible = "qcom,tcsr-msm8916", "syscon";
reg = <0x1937000 0x30000>;
};
tcsr_mutex: hwlock {
compatible = "qcom,tcsr-mutex";
syscon = <&tcsr_mutex_regs 0 0x1000>;
@ -483,7 +537,7 @@
compatible = "qcom,ci-hdrc";
reg = <0x78d9000 0x400>;
dr_mode = "peripheral";
interrupts = <GIC_SPI 134 IRQ_TYPE_NONE>;
interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
usb-phy = <&usb_otg>;
status = "disabled";
};
@ -491,7 +545,7 @@
usb_host: ehci@78d9000 {
compatible = "qcom,ehci-host";
reg = <0x78d9000 0x400>;
interrupts = <GIC_SPI 134 IRQ_TYPE_NONE>;
interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
usb-phy = <&usb_otg>;
status = "disabled";
};
@ -499,8 +553,8 @@
usb_otg: phy@78d9000 {
compatible = "qcom,usb-otg-snps";
reg = <0x78d9000 0x400>;
interrupts = <GIC_SPI 134 IRQ_TYPE_EDGE_BOTH>,
<GIC_SPI 140 IRQ_TYPE_EDGE_RISING>;
interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
qcom,vdd-levels = <500000 1000000 1320000>;
qcom,phy-init-sequence = <0x44 0x6B 0x24 0x13>;
@ -594,7 +648,7 @@
<0x200a000 0x002100>;
reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
interrupt-names = "periph_irq";
interrupts = <GIC_SPI 190 IRQ_TYPE_NONE>;
interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
qcom,ee = <0>;
qcom,channel = <0>;
#address-cells = <2>;
@ -609,6 +663,144 @@
clocks = <&gcc GCC_PRNG_AHB_CLK>;
clock-names = "core";
};
qfprom: qfprom@5c000 {
compatible = "qcom,qfprom";
reg = <0x5c000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
tsens_caldata: caldata@d0 {
reg = <0xd0 0x8>;
};
tsens_calsel: calsel@ec {
reg = <0xec 0x4>;
};
};
tsens: thermal-sensor@4a8000 {
compatible = "qcom,msm8916-tsens";
reg = <0x4a8000 0x2000>;
nvmem-cells = <&tsens_caldata>, <&tsens_calsel>;
nvmem-cell-names = "calib", "calib_sel";
#thermal-sensor-cells = <1>;
};
mdss: mdss@1a00000 {
compatible = "qcom,mdss";
reg = <0x1a00000 0x1000>,
<0x1ac8000 0x3000>;
reg-names = "mdss_phys", "vbif_phys";
power-domains = <&gcc MDSS_GDSC>;
clocks = <&gcc GCC_MDSS_AHB_CLK>,
<&gcc GCC_MDSS_AXI_CLK>,
<&gcc GCC_MDSS_VSYNC_CLK>;
clock-names = "iface_clk",
"bus_clk",
"vsync_clk";
interrupts = <0 72 0>;
interrupt-controller;
#interrupt-cells = <1>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
mdp: mdp@1a01000 {
compatible = "qcom,mdp5";
reg = <0x1a01000 0x90000>;
reg-names = "mdp_phys";
interrupt-parent = <&mdss>;
interrupts = <0 0>;
clocks = <&gcc GCC_MDSS_AHB_CLK>,
<&gcc GCC_MDSS_AXI_CLK>,
<&gcc GCC_MDSS_MDP_CLK>,
<&gcc GCC_MDSS_VSYNC_CLK>;
clock-names = "iface_clk",
"bus_clk",
"core_clk",
"vsync_clk";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
mdp5_intf1_out: endpoint {
remote-endpoint = <&dsi0_in>;
};
};
};
};
dsi0: dsi@1a98000 {
compatible = "qcom,mdss-dsi-ctrl";
reg = <0x1a98000 0x25c>;
reg-names = "dsi_ctrl";
interrupt-parent = <&mdss>;
interrupts = <4 0>;
assigned-clocks = <&gcc BYTE0_CLK_SRC>,
<&gcc PCLK0_CLK_SRC>;
assigned-clock-parents = <&dsi_phy0 0>,
<&dsi_phy0 1>;
clocks = <&gcc GCC_MDSS_MDP_CLK>,
<&gcc GCC_MDSS_AHB_CLK>,
<&gcc GCC_MDSS_AXI_CLK>,
<&gcc GCC_MDSS_BYTE0_CLK>,
<&gcc GCC_MDSS_PCLK0_CLK>,
<&gcc GCC_MDSS_ESC0_CLK>;
clock-names = "mdp_core_clk",
"iface_clk",
"bus_clk",
"byte_clk",
"pixel_clk",
"core_clk";
phys = <&dsi_phy0>;
phy-names = "dsi-phy";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dsi0_in: endpoint {
remote-endpoint = <&mdp5_intf1_out>;
};
};
port@1 {
reg = <1>;
dsi0_out: endpoint {
};
};
};
};
dsi_phy0: dsi-phy@1a98300 {
compatible = "qcom,dsi-phy-28nm-lp";
reg = <0x1a98300 0xd4>,
<0x1a98500 0x280>,
<0x1a98780 0x30>;
reg-names = "dsi_pll",
"dsi_phy",
"dsi_phy_regulator";
#clock-cells = <1>;
clocks = <&gcc GCC_MDSS_AHB_CLK>;
clock-names = "iface_clk";
};
};
};
smd {
@ -657,6 +849,88 @@
};
};
};
hexagon-smp2p {
compatible = "qcom,smp2p";
qcom,smem = <435>, <428>;
interrupts = <0 27 IRQ_TYPE_EDGE_RISING>;
qcom,ipc = <&apcs 8 14>;
qcom,local-pid = <0>;
qcom,remote-pid = <1>;
hexagon_smp2p_out: master-kernel {
qcom,entry-name = "master-kernel";
#qcom,smem-state-cells = <1>;
};
hexagon_smp2p_in: slave-kernel {
qcom,entry-name = "slave-kernel";
interrupt-controller;
#interrupt-cells = <2>;
};
};
wcnss-smp2p {
compatible = "qcom,smp2p";
qcom,smem = <451>, <431>;
interrupts = <0 143 IRQ_TYPE_EDGE_RISING>;
qcom,ipc = <&apcs 8 18>;
qcom,local-pid = <0>;
qcom,remote-pid = <4>;
wcnss_smp2p_out: master-kernel {
qcom,entry-name = "master-kernel";
#qcom,smem-state-cells = <1>;
};
wcnss_smp2p_in: slave-kernel {
qcom,entry-name = "slave-kernel";
interrupt-controller;
#interrupt-cells = <2>;
};
};
smsm {
compatible = "qcom,smsm";
#address-cells = <1>;
#size-cells = <0>;
qcom,ipc-1 = <&apcs 0 13>;
qcom,ipc-6 = <&apcs 0 19>;
apps_smsm: apps@0 {
reg = <0>;
#qcom,smem-state-cells = <1>;
};
hexagon_smsm: hexagon@1 {
reg = <1>;
interrupts = <0 26 IRQ_TYPE_EDGE_RISING>;
interrupt-controller;
#interrupt-cells = <2>;
};
wcnss_smsm: wcnss@6 {
reg = <6>;
interrupts = <0 144 IRQ_TYPE_EDGE_RISING>;
interrupt-controller;
#interrupt-cells = <2>;
};
};
};
#include "msm8916-pins.dtsi"

94
arch/arm64/boot/dts/qcom/msm8996.dtsi
View File

@ -97,6 +97,92 @@
};
};
thermal-zones {
cpu-thermal0 {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens0 3>;
trips {
cpu_alert0: trip0 {
temperature = <75000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit0: trip1 {
temperature = <110000>;
hysteresis = <2000>;
type = "critical";
};
};
};
cpu-thermal1 {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens0 5>;
trips {
cpu_alert1: trip0 {
temperature = <75000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit1: trip1 {
temperature = <110000>;
hysteresis = <2000>;
type = "critical";
};
};
};
cpu-thermal2 {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens0 8>;
trips {
cpu_alert2: trip0 {
temperature = <75000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit2: trip1 {
temperature = <110000>;
hysteresis = <2000>;
type = "critical";
};
};
};
cpu-thermal3 {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens0 10>;
trips {
cpu_alert3: trip0 {
temperature = <75000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit3: trip1 {
temperature = <110000>;
hysteresis = <2000>;
type = "critical";
};
};
};
};
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
@ -181,6 +267,12 @@
status = "disabled";
};
tsens0: thermal-sensor@4a8000 {
compatible = "qcom,msm8996-tsens";
reg = <0x4a8000 0x2000>;
#thermal-sensor-cells = <1>;
};
blsp2_uart1: serial@75b0000 {
compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
reg = <0x75b0000 0x1000>;
@ -339,7 +431,7 @@
<0x400a000 0x002100>;
reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
interrupt-names = "periph_irq";
interrupts = <GIC_SPI 326 IRQ_TYPE_NONE>;
interrupts = <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>;
qcom,ee = <0>;
qcom,channel = <0>;
#address-cells = <2>;