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ARM64: DT: Hisilicon SoC DT updates for 4.10

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- Correct the hardware pin number of the usb node on the Hip06
 - Add the Hisilicon Hip07 D05 board dts binding
 - Add the initial dts for the Hip07 D05 board
 - Fix the warning for the node without reg propery on the Hip06
 - Fix the sas am max transmissions quirk property on the Hip06
 - Disable the sas0 and sas2 on D03 board
 - Add refclk node for SAS on the Hip06
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Merge tag 'hisi-arm64-dt-4.10' of git://github.com/hisilicon/linux-hisi into next/dt64

ARM64: DT: Hisilicon SoC DT updates for 4.10

- Correct the hardware pin number of the usb node on the Hip06
- Add the Hisilicon Hip07 D05 board dts binding
- Add the initial dts for the Hip07 D05 board
- Fix the warning for the node without reg propery on the Hip06
- Fix the sas am max transmissions quirk property on the Hip06
- Disable the sas0 and sas2 on D03 board
- Add refclk node for SAS on the Hip06

* tag 'hisi-arm64-dt-4.10' of git://github.com/hisilicon/linux-hisi:
  arm64: dts: hisi: add refclk node to hip06 dts files for SAS
  arm64: dts: hisi: disable sas0 and sas2 for d03
  arm64: dts: hisi: fix hip06 sas am-max-trans quirk
  arm64: dts: hip06: Fix no reg property warning
  arm64: dts: hisilicon: Add initial dts for Hip07 D05 board
  Documentation: arm64: Add Hisilicon Hip07 D05 dts binding
  arm64: dts: hip06: Correct hardware pin number of usb node

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2016-11-18 10:38:12 -08:00
commit e702ddd3e8
6 changed files with 1146 additions and 15 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
View File

@ -28,6 +28,10 @@ HiP06 D03 Board
Required root node properties:
- compatible = "hisilicon,hip06-d03";
HiP07 D05 Board
Required root node properties:
- compatible = "hisilicon,hip07-d05";
Hisilicon system controller
Required properties:

1
arch/arm64/boot/dts/hisilicon/Makefile
View File

@ -1,6 +1,7 @@
dtb-$(CONFIG_ARCH_HISI) += hi6220-hikey.dtb
dtb-$(CONFIG_ARCH_HISI) += hip05-d02.dtb
dtb-$(CONFIG_ARCH_HISI) += hip06-d03.dtb
dtb-$(CONFIG_ARCH_HISI) += hip07-d05.dtb
always := $(dtb-y)
subdir-y := $(dts-dirs)

8
arch/arm64/boot/dts/hisilicon/hip06-d03.dts
View File

@ -41,18 +41,10 @@
status = "ok";
};
&sas0 {
status = "ok";
};
&sas1 {
status = "ok";
};
&sas2 {
status = "ok";
};
&usb_ohci {
status = "ok";
};

23
arch/arm64/boot/dts/hisilicon/hip06.dtsi
View File

@ -318,11 +318,17 @@
#size-cells = <2>;
ranges;
refclk: refclk {
compatible = "fixed-clock";
clock-frequency = <50000000>;
#clock-cells = <0>;
};
usb_ohci: ohci@a7030000 {
compatible = "generic-ohci";
reg = <0x0 0xa7030000 0x0 0x10000>;
interrupt-parent = <&mbigen_usb>;
interrupts = <64 4>;
interrupts = <640 4>;
dma-coherent;
status = "disabled";
};
@ -331,7 +337,7 @@
compatible = "generic-ehci";
reg = <0x0 0xa7020000 0x0 0x10000>;
interrupt-parent = <&mbigen_usb>;
interrupts = <65 4>;
interrupts = <641 4>;
dma-coherent;
status = "disabled";
};
@ -508,7 +514,7 @@
};
};
eth0: ethernet@4{
eth0: ethernet-4{
compatible = "hisilicon,hns-nic-v2";
ae-handle = <&dsaf0>;
port-idx-in-ae = <4>;
@ -517,7 +523,7 @@
dma-coherent;
};
eth1: ethernet@5{
eth1: ethernet-5{
compatible = "hisilicon,hns-nic-v2";
ae-handle = <&dsaf0>;
port-idx-in-ae = <5>;
@ -526,7 +532,7 @@
dma-coherent;
};
eth2: ethernet@0{
eth2: ethernet-0{
compatible = "hisilicon,hns-nic-v2";
ae-handle = <&dsaf0>;
port-idx-in-ae = <0>;
@ -535,7 +541,7 @@
dma-coherent;
};
eth3: ethernet@1{
eth3: ethernet-1{
compatible = "hisilicon,hns-nic-v2";
ae-handle = <&dsaf0>;
port-idx-in-ae = <1>;
@ -552,6 +558,7 @@
ctrl-reset-reg = <0xa60>;
ctrl-reset-sts-reg = <0x5a30>;
ctrl-clock-ena-reg = <0x338>;
clocks = <&refclk 0>;
queue-count = <16>;
phy-count = <8>;
dma-coherent;
@ -590,10 +597,11 @@
reg = <0 0xa2000000 0 0x10000>;
sas-addr = [50 01 88 20 16 00 00 00];
hisilicon,sas-syscon = <&pcie_subctl>;
am-max-trans;
hip06-sas-v2-quirk-amt;
ctrl-reset-reg = <0xa18>;
ctrl-reset-sts-reg = <0x5a0c>;
ctrl-clock-ena-reg = <0x318>;
clocks = <&refclk 0>;
queue-count = <16>;
phy-count = <8>;
dma-coherent;
@ -635,6 +643,7 @@
ctrl-reset-reg = <0xae0>;
ctrl-reset-sts-reg = <0x5a70>;
ctrl-clock-ena-reg = <0x3a8>;
clocks = <&refclk 0>;
queue-count = <16>;
phy-count = <9>;
dma-coherent;

66
arch/arm64/boot/dts/hisilicon/hip07-d05.dts Normal file
View File

@ -0,0 +1,66 @@
/**
* dts file for Hisilicon D05 Development Board
*
* Copyright (C) 2016 Hisilicon Ltd.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* publishhed by the Free Software Foundation.
*
*/
/dts-v1/;
#include "hip07.dtsi"
/ {
model = "Hisilicon Hip07 D05 Development Board";
compatible = "hisilicon,hip07-d05";
/* the mem node will be updated by UEFI. */
memory@0 {
device_type = "memory";
reg = <0x0 0x00000000 0x0 0x40000000>;
numa-node-id = <0>;
};
distance-map {
compatible = "numa-distance-map-v1";
distance-matrix = <0 0 10>,
<0 1 15>,
<0 2 20>,
<0 3 25>,
<1 0 15>,
<1 1 10>,
<1 2 25>,
<1 3 30>,
<2 0 20>,
<2 1 25>,
<2 2 10>,
<2 3 15>,
<3 0 25>,
<3 1 30>,
<3 2 15>,
<3 3 10>;
};
aliases {
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
};
&uart0 {
status = "ok";
};
&usb_ohci {
status = "ok";
};
&usb_ehci {
status = "ok";
};

1059
arch/arm64/boot/dts/hisilicon/hip07.dtsi Normal file
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