Commit Graph

57053 Commits

Author SHA1 Message Date
Simon Goldschmidt
46b633d7b4 spi: cadence_qspi: convert to livetree
Convert 'cadence_spi_ofdata_to_platdata' to use dev_read_* functions to
read driver parameters and 'dev_read_first_subnode'/'ofnode_read_*' to
read flash (child node) parameters.

Tested on socfpga_socrates (socfpga gen5).

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-05-10 22:48:11 +02:00
Simon Goldschmidt
460a97f3a2 timer: dw-apb: remove unused DECLARE_GLOBAL_DATA_PTR
The dw-apb timer does not use 'gd', so remove its declaration.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-05-10 22:48:11 +02:00
Ley Foon Tan
8ede7515fe configs: stratix10: Enable CONFIG_SPI_FLASH_USE_4K_SECTORS
Fix SPI flash environment erase size error.

CONFIG_ENV_SECT_SIZE is set to 4KB. Enable CONFIG_SPI_FLASH_USE_4K_SECTORS
to allow erase one environment sector.

Fix error below:

SOCFPGA_STRATIX10 # saveenv
Saving Environment to SPI Flash...
SF: Detected mt25qu02g with page size 256 Bytes, erase size 64 KiB, total 256 MiB
Erasing SPI flash...SF: Erase offset/length not multiple of erase size
Failed (-22)

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2019-05-10 22:48:11 +02:00
Tien Fong Chee
da0d5f6f73 ARM: socfpga: Increase Malloc pool size to support FAT filesystem in SPL
Increasing Malloc pool size up to 0x15000 is required to support FAT in SPL
. The result of calculation is come from default max cluster(0x10000) +
others(0x2000) + additional memory for headroom(0x3000).

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2019-05-10 22:48:11 +02:00
Tien Fong Chee
1a0d0b7841 ARM: socfpga: Synchronize the configuration for A10 SoCDK
Update the default configuration file to enable the necessary functionality
the get the kit working.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2019-05-10 22:48:11 +02:00
Tien Fong Chee
1085bb3cba spl: socfpga: Implement fpga bitstream loading with socfpga loadfs
Add support for loading FPGA bitstream to get DDR up running before
U-Boot is loaded into DDR. Boot device initialization, generic firmware
loader and SPL FAT support are required for this whole mechanism to work.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2019-05-10 22:48:11 +02:00
Tien Fong Chee
f61d529260 ARM: socfpga: Add the configuration for FPGA SoCFPGA A10 SoCDK
Update the default configuration file to enable the necessary functionality
to get the SoCFPGA loadfs driver support. This would enable the
implementation of programming bitstream into FPGA from MMC.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2019-05-10 22:48:11 +02:00
Tien Fong Chee
0a42a132a4 ARM: socfpga: Add FPGA drivers for Arria 10 FPGA bitstream loading
Add FPGA driver to support program FPGA with FPGA bitstream loading from
filesystem. The driver are designed based on generic firmware loader
framework. The driver can handle FPGA program operation from loading FPGA
bitstream in flash to memory and then to program FPGA.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2019-05-10 22:48:11 +02:00
Tien Fong Chee
c1cf539180 ARM: socfpga: Moving the watchdog reset to the for-loop status polling
Current watchdog reset is misplaced after for-loop status polling, so
this poses a risk that watchdog can't be reset timely if polling taking
longer than watchdog timeout. This patch moving the watchdog reset
into polling to ensure the watchdog can be reset timely.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2019-05-10 22:48:10 +02:00
Tien Fong Chee
f4b53b24d0 ARM: socfpga: Cleaning up and ensuring consistent format messages in driver
Ensure all the debug messages are always prefix with "FPGA: " and comment
beginning with uppercase letter.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2019-05-10 22:48:10 +02:00
Tien Fong Chee
f78b505f81 ARM: socfpga: Add default FPGA bitstream fitImage for Arria10 SoCDK
Add default fitImage file bundling FPGA bitstreams for Arria10.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2019-05-10 22:48:10 +02:00
Tien Fong Chee
5c2ae96b60 ARM: socfpga: Description on FPGA bitstream type and file name for Arria 10
This patch adds description on properties about file name used for both
peripheral bitstream and core bitstream.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2019-05-10 22:48:10 +02:00
Tom Rini
82da478b8f Merge branch '2019-05-10-master-imports'
- Correct CONFIG_CRC32 related options in Kconfig
- CONFIG_GPIO select's DM_GPIO, drop CONFIG_GPIO from whitelist.txt
2019-05-10 11:08:48 -04:00
Chris Packham
48372a5af6 Remove whitelist entry for CONFIG_CRC32
There are no longer any references to this in the code so this can be
removed.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2019-05-10 07:18:13 -04:00
Chris Packham
4ad2c8953d Remove #define CONFIG_CRC32
There is no check for CONFIG_CRC32 so the #define in image.h does
nothing. Remove it.

Reported-by: Robert P. J. Day <rpjday@crashcourse.ca>
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
2019-05-10 07:18:13 -04:00
Chris Packham
661bbc50d3 mtd: ubi: Remove select for non existent option
There is no 'config CRC32' remove the select that was attempting to use
it.

Reported-by: Robert P. J. Day <rpjday@crashcourse.ca>
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2019-05-10 07:18:13 -04:00
Chris Packham
2b841dba5c cmd: ubifs: Remove select for non-existent option
There is no 'config CRC32', remove the select that was attempting to use
it.

Reported-by: Robert P. J. Day <rpjday@crashcourse.ca>
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2019-05-10 07:18:13 -04:00
Chris Packham
b8de00c671 Remove whitelist entry for CONFIG_GPIO
CONFIG_GPIO does not exist. There is one hit for it in tegra_gpio.c but
it is a variable name.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-05-10 07:18:13 -04:00
Chris Packham
26680b9f3a sysreset: select DM_GPIO instead of GPIO
CONFIG_GPIO does not exist. sysreset_gpio.c uses the DM gpio APIs so the
correct option to select is DM_GPIO.

Reported-by: Robert P. J. Day <rpjday@crashcourse.ca>
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-05-10 07:18:13 -04:00
Tom Rini
927a37df9f Merge branch '2019-05-09-master-imports'
- Minor fixes (ata memory leak, implement feedback on ohci-da8xx
  changes, avb test fix, mmc test fix, spelling fixes, make FIT really
  optional, fit-dtb blob cleanups, TI K3 workflow improvements, bootz
  can boot barebox on 32bit ARM).
2019-05-10 07:07:49 -04:00
Lokesh Vutla
0d7b6cffa5 remoteproc: k3_system_controller: Increase rx timeout
There is one case where 400ms is not sufficient for loading the
system firmware:
- System firmware is not signed with rsa degenerate key.
- ROM loading the sysfw directly from SPI flash which is in memory
  mapped mode.

The above scenario is definitely not desired in production use cases
as it effects boot time. But still keeping this support as this is
a valid boot scenario.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-05-09 20:22:05 -04:00
Lokesh Vutla
a325796da4 arm: k3: config.mk: Use k3_gen_x509_cert.sh to generate boot images
Instead of overlading makefile, use the k3_gen_x509_cert.sh script
to generate boot images.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-05-09 20:22:05 -04:00
Lokesh Vutla
ca71186a76 tools: k3_get_x509 cert: Add a script to generate x509 certificate for K3 devices
TI's K3 boot architecture mandates a x509 certificate for every boot image.
While signing the image K3 ROM allows for two types of keys based on which
the boot image gets loaded in different ways:
- Degenerate RSA keys: This generates a signature which is equal to the digest.
		       When ROM sees this, it does a DMA for copying the images,
		       which significantly improves the boot time.
- Any other key: Does a memcpy to load the image. This is introduced as a
		 fallback for DMA copy.

Add a script for generating boot images with the above options. Default
generates image using rsa degenerate key in order to improve boot time.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
2019-05-09 20:22:04 -04:00
Vagrant Cascadian
878e2a50b5 Set time and umask on fit-dtb.blob to ensure reproducibile builds.
Support for compressed fit-dtb.blob was added in:

  commit 95f4bbd581 ("lib: fdt: Allow LZO and GZIP DT compression in
  U-Boot")

When building compressed (lzop, gzip) fit-dtb.blob images, the
compression tool may embed the time or umask in the image.

Work around this by manually setting the time of the source file using
SOURCE_DATE_EPOCH and a hard-coded 0600 umask.

With gzip, this could be accomplished by using -n/--no-name, but lzop
has no current workaround:

  https://bugs.debian.org/896520

This is essentially the same fix applied to multi-dtb fit SPL images in:

  commit 8664ab7deb ("Set time and umask on multi-dtb fit images to
  ensure reproducibile builds.")

Signed-off-by: Vagrant Cascadian <vagrant@reproducible-builds.org>
2019-05-09 20:22:04 -04:00
Vagrant Cascadian
3ee8d91328 Remove fit-dtb.blob* in clean target.
Support for compressed fit-dtb.blob was added in:

  commit 95f4bbd581 ("lib: fdt: Allow LZO and GZIP DT compression in
  U-Boot")

Adjust Makefile to also clean compressed blobs.

Signed-off-by: Vagrant Cascadian <vagrant@reproducible-builds.org>
2019-05-09 20:22:04 -04:00
Vagrant Cascadian
c6833e762f Add fit-dtb.blob* to .gitignore.
Support for compressed fit-dtb.blob was added in:

  commit 95f4bbd581 ("lib: fdt: Allow LZO and GZIP DT compression in
  U-Boot")

Adjust .gitignore to also exclude compressed blobs.

Signed-off-by: Vagrant Cascadian <vagrant@reproducible-builds.org>
2019-05-09 20:22:04 -04:00
Christoph Fritz
02c038ddb3 arm: zimage: add barebox image magic number
For chainboot configurations or test environments, this patch allows
booting barebox images by using command bootz.

Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com>
2019-05-09 20:21:59 -04:00
Stephen Warren
89a5317ae2 test/py: don't use mmc_rd config for other mmc tests
Fix test_mmc_dev(), test_mmc_rescan(), test_mmc_info() not to use the
same configuration data that test_mmc_rd() does. Doing so causes the
following issues:

* The new code uncondtionally expects certain keys to exist in the
configuration data. These keys do not exist in existing configuration
data since they were not previously required, and there was no
notification re: a requirement to add these new keys. This causes test
failures due to thrown exceptions when accessing the non-existent keys.

* The new tests logically operate on different objects. test_mmc_rd()
operates on ranges of sectors on an MMC device (which may be the entire
set of sectors of a device, or a part of a device), whereas all the new
tests operate solely on entire devices. These are separate things, and
it's entirely likely that the user will wish to runs the two types of
tests on different sets of data; see the example configuration data that
this commit adds. Ideally, the new tests would have been added to a
separate Python file, since they aren' closely related to the existing
tests.

FIXME: Marek, can you please replace the "???" in this patch with some
reasonable looking data? Thanks.

Cc: Marek Vasut <marek.vasut@gmail.com>
Fixes: 4ffec8cdf5 ("test/py: mmc: Add 'mmc info' test")
Fixes: ce4b2cafa7 ("test/py: mmc: Add 'mmc rescan' test")
Fixes: 86dfd152c9 ("test/py: mmc: Add 'mmc dev' test")
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2019-05-09 19:52:55 -04:00
Simon Goldschmidt
59bd796801 fdt_shrink_to_minimum: do not mark fdt space reserved unconditionally
This function merely relocates the fdt blob, so don't let it alter
it by adding reservations that didn't exist before.

Instead, if the memory used for the fdt blob has been reserved
before calling this function, ensure the relocated memory is
marked as reserved instead.

Reported-by: Keerthy <j-keerthy@ti.com>
Reported-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-05-09 19:52:55 -04:00
Fabrice Fontaine
93e078807f Make FIT support really optional
Due to some mistakes in the source code, it was not possible to really
turn FIT support off. This commit fixes the problem by means of the
following changes:

- Enclose "bootm_host_load_image" and "bootm_host_load_images" between
  checks for CONFIG_FIT_SIGNATURE, in common/bootm.c.

- Enclose the declaration of "bootm_host_load_images" between checks for
  CONFIG_FIT_SIGNATURE, in common/bootm.h.

- Condition the compilation and linking of fit_common.o fit_image.o
  image-host.o common/image-fit.o to CONFIG_FIT=y, in tools/Makefile.

Signed-off-by: Carlos Santos <casantos@datacom.ind.br>
[fabio: adapt for 2016.07]
Signed-off-by: Fabio Estevam <festevam@gmail.com>
[Ricardo: fix conditional compilation and linking of the files mentioned above
for 2016.07]
Signed-off-by: Ricardo Martincoski <ricardo.martincoski@gmail.com>
[Jörg: adapt for 2019.01]
Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks>
[Retrieved from:
https://git.buildroot.net/buildroot/tree/package/uboot-tools/0003-Make-FIT-support-really-optional.patch]
Signed-off-by: Fabrice Fontaine <fontaine.fabrice@gmail.com>
2019-05-09 19:52:55 -04:00
Vagrant Cascadian
048a92ea54 Fix spelling of available.
Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
2019-05-09 19:52:55 -04:00
Marek Vasut
dd30961ca1 env: spi: Fix incorrect entry description
Fix the max frequency entry description, it's incorrect.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Tom Rini <trini@konsulko.com>
2019-05-09 19:52:55 -04:00
Igor Opaniuk
34501d6713 test/py: avb: fix test_avb_persistent_values fail
Fix test_avb_persistent_values() pytest, which was failing because of
wrong size value provided from tee sandbox driver.

Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Igor Opaniuk <igor.opaniuk@gmail.com>
2019-05-09 19:52:55 -04:00
Christian Gmeiner
28b4ba9481 ata: ahci: fix memory leak
malloc(..) and memalign(..) are both allocating memory and as a result
we leak the memory allocated with malloc(..).

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-05-09 19:52:55 -04:00
Adam Ford
3a90b50a32 usb: ohci: ohci-da8xx: Cleanup Error handling and fix flags
Per feedback from Marek, he suggested better handling and
to enable DM_FLAG_OS_PREPARE, this patch re-orders some of
the error checking, and errors returns the error code right
away and also sets DM_FLAG_OS_PREPARE.

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-05-09 19:52:55 -04:00
Stefan Roese
80af0fed23 dm: MIGRATION: Add migration plan for WDT (DM watchdog support)
As much of the watchdog system has been migrated to DM now, formalize a
deadline for migration.

Please note that the old CONFIG_HW_WATCHDOG macro should be removed
completely at some point.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
2019-05-09 19:52:55 -04:00
Tom Rini
f30f268a07 Merge tag 'rockchip-for-v2019.07-rc1' of git://git.denx.de/u-boot-rockchip
Improvements and new features:
- split more rockchip pinctrl_core feature into per SoC
- enable TPL for evb-rk3399 board
- enable TPL/SPL for evb-px5 board
- enable TPL and OP-TEE support for evb-rk3229
- update fix in arm common assembly start code for rockchip header file
- update default SPL_FIT_GENERATOR for rockchip
- rk3399 boards update to use '-u-boot.dtsi'
- add new rk3399 boards: Nanopi M4, Nanopc T4
- enable sound for chromebook_minnie
2019-05-09 12:36:17 -04:00
Tom Rini
062aceb8bf Merge git://git.denx.de/u-boot-marvell
- DM updates for multiple MVEBU boards (Stefan)
- Add CRS305-1G-4S board (Luka)
- Enable MMC in SPL on clearfog (Baruch)
2019-05-09 07:12:25 -04:00
Tom Rini
7d41f2dcbe Merge git://git.denx.de/u-boot-riscv
- Correct SYS_TEXT_BASE for qemu.
- Support booti.
- Increase SYSBOOTM_LEN for Fedora/RISCV kernel.
- Support SMP booting from flash.
2019-05-09 07:11:52 -04:00
Tom Rini
7aaf2af0e0 - Add USB PHY drivers for Amlogic G12A
- Add USB Complex Glue driver for Amlogic G12A
 - Add USB Gadget support for Amlogic G12A
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Merge tag 'u-boot-amlogic-20190509' of git://git.denx.de/u-boot-amlogic

- Add USB PHY drivers for Amlogic G12A
- Add USB Complex Glue driver for Amlogic G12A
- Add USB Gadget support for Amlogic G12A
2019-05-09 07:11:39 -04:00
Jagan Teki
c661c059b9 doc: rockchip: Add global doc for rk3399 build/flash
Since rockchip have an individual doc/README.rockchip, it would
be better to update the same instead of maintaining it separately
in board files.

So, add the documentation for rk3399
- procedure to build for Rockchip miniloader and
  U-Boot SPL options
- procedure to boot from SD for Rockchip miniloader and
  U-Boot SPL options
- procedure to build ATF, PMU M0 firmware for puma boards
- add boot logs of each option, so-that it would help for future
  boards porting

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-05-09 18:24:31 +08:00
Jagan Teki
65cc7dcd77 rockchip: rk3399: Add Nanopc T4 board support
Add initial support for Nanopc T4 board.

Specification
- Rockchip RK3399
- Dual-Channel 4GB LPDDR3-1866
- SD card slot
- 16GB eMMC
- RTL8211E 1Gbps
- AP6356S WiFI/BT
- HDMI In/Out, DP, MIPI DSI/CSI, eDP
- USB 3.0, 2.0
- USB Type C power and data
- GPIO expansion ports
- DC 12V/2A

Commit details of rk3399-nanopc-t4.dts sync from Linux 5.1-rc2:
"arm64: dts: rockchip: Add NanoPC-T4 IR receiver"
(sha1: 95658e21b1707ad7844f873db2fdaa295109a5a3)

Tested-by: Daniel Gröber <dxld@darkboxed.org>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-05-09 18:24:31 +08:00
Jagan Teki
b2f5da9dd0 rockchip: rk3399: Add Nanopi M4 board support
Add initial support for Nanopi M4 board.

Specification
- Rockchip RK3399
- Dual-Channel 4GB LPDDR3-1866
- SD card slot
- eMMC socket
- RTL8211E 1Gbps
- AP6356S WiFI/BT
- HDMI In/Out, DP, MIPI DSI/CSI
- USB 3.0 x4
- USB Type C power and data
- GPIO1, GPIO2 expansion ports
- DC5V/3A

Commit details of rk3399-nanopi-m4.dts sync from Linux 5.1-rc2:
"arm64: dts: rockchip: Refine nanopi4 differences"
(sha1: c62ffaf5026d0b7633e62b2cea8450b5543c349a)

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-09 18:24:31 +08:00
Jagan Teki
adc91db0e6 rockchip: dts: rk3399: nanopi4: Use CD pin as RK_FUNC_1
Attaching GPIO functionality to SDMMC0_DET pin (which
does in Linux base dts) make dwmmc driver "fail to detect
the card".

  Card did not respond to voltage select!

It may be because the existing driver can't support gpio
card detection. So, change the pinctrl functionality from
RK_FUNC_GPIO to RK_FUNC_1 like other rk3399 dts does via
sdmmc_cd pin.

Cc: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-05-09 18:23:16 +08:00
Atish Patra
3cedc97479 RISCV: image: Add booti support
This patch adds booti support for RISC-V Linux kernel. The existing
bootm method will also continue to work as it is.

It depends on the following kernel patch which adds the header to the
flat Image. Gzip compressed Image (Image.gz) support is not enabled with
this patch.

https://patchwork.kernel.org/patch/10925543/

Tested on HiFive Unleashed and QEMU.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tested-by: Karsten Merker <merker@debian.org>
Reviewed-by: Marek Vasut <marek.vasut@gmail.com>
2019-05-09 16:47:52 +08:00
Rick Chen
d8fc1ef2f0 riscv: configs: AE350 will use CONFIG_OF_SEPARATE when boots from flash
When AE350 boots from flash, use CONFIG_OF_SEPARATE instead of
CONFIG_OF_BOARD.

Also remove unused code about prior_stage_fdt_address.
And modify CONFIG_SYS_FDT_BASE as flash address.

Signed-off-by: Rick Chen <rick@andestech.com>
Cc: Greentime Hu <greentime@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2019-05-09 16:46:46 +08:00
Rick Chen
a3caa84627 riscv: configs: AE350 will use CONFIG_OF_PRIOR_STAGE when boots from ram
When AE350 boots from ram, use CONFIG_OF_PRIOR_STAGE instead
of CONFIG_OF_BOARD.

Signed-off-by: Rick Chen <rick@andestech.com>
Cc: Greentime Hu <greentime@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2019-05-09 16:46:46 +08:00
Rick Chen
f9281b8905 riscv: prior_stage_fdt_address should only be used when OF_PRIOR_STAGE is enabled
This patch will fix prior_stage_fdt_address write failure problem, when
AE350 boots from flash.

When AE350 boots from flash, prior_stage_fdt_address will be flash
address, we shall avoid it to be written.

Signed-off-by: Rick Chen <rick@andestech.com>
Cc: Greentime Hu <greentime@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2019-05-09 16:46:46 +08:00
Rick Chen
e7e47f6391 riscv: configs: Support AE350 SMP booting from flash flow
Add two defconfigs to support AE350 SMP booting from flash.

Signed-off-by: Rick Chen <rick@andestech.com>
Cc: Greentime Hu <greentime@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2019-05-09 16:46:46 +08:00
Rick Chen
bdce38965e riscv: Introduce CONFIG_XIP to support booting from flash
When U-Boot boots from flash, during the boot process,
hart_lottery and available_harts_lock variable addresses
point to flash which is not writable. This causes boot
failures on AE350. Introduce a config option CONFIG_XIP
to support such configuration.

Signed-off-by: Rick Chen <rick@andestech.com>
Cc: Greentime Hu <greentime@andestech.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-09 16:46:46 +08:00