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ARM: socfpga: Moving the watchdog reset to the for-loop status polling

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Current watchdog reset is misplaced after for-loop status polling, so
this poses a risk that watchdog can't be reset timely if polling taking
longer than watchdog timeout. This patch moving the watchdog reset
into polling to ensure the watchdog can be reset timely.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
This commit is contained in:
Tien Fong Chee 2019-05-07 17:42:27 +08:00 committed by Marek Vasut
parent f4b53b24d0
commit c1cf539180
1 changed files with 1 additions and 1 deletions
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2
drivers/fpga/socfpga_arria10.c
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@ -360,6 +360,7 @@ static int fpgamgr_program_poll_cd(void)
printf("nstatus == 0 while waiting for condone\n");
return -EPERM;
}
WATCHDOG_RESET();
}
if (i == FPGA_TIMEOUT_CNT)
@ -433,7 +434,6 @@ int fpgamgr_program_finish(void)
printf("FPGA: Poll CD failed with error code %d\n", status);
return -EPERM;
}
WATCHDOG_RESET();
/* Ensure the FPGA entering user mode */
status = fpgamgr_program_poll_usermode();