Commit Graph

57200 Commits

Author SHA1 Message Date
Luca Ceresoli
12fa4e2e39 tools: zynqmp_psu_init_minimize.sh: fix return lines coding style
Remove unneeded parenthess around return value. E.g.:
    return (0);   ->   return 0;

Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-28 11:25:30 +02:00
Harini Katakam
e33bed4aac net: phy: ti: Use auto MDI crossover for SGMII
Use auto MDI crossover for SGMII to support all cable setups.
Also correct MDIX mask bit.

Signed-off-by: Harini Katakam <harini.katakam@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-28 11:25:30 +02:00
T Karthik Reddy
5deb244953 mmc: zynq_sdhci: Move UHS mode macros
This patch moves UHS mode macros from mmc.h to zynq_sdhci.c.
Moving UHS mode macros in mmc.h avoids redefinition of macros when
xenon_sdhci.c is compiled.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-28 11:25:30 +02:00
T Karthik Reddy
2f9a216c72 mmc: sdhci: Read sdhci card detect properties from DT
This patch reads card detect properties from device tree.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-28 11:25:30 +02:00
T Karthik Reddy
4d41f637b4 mmc: sdhci: Implement SDHCI card detect
Card detect function implemented for SDHCI framework.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-28 11:25:30 +02:00
Michal Simek
26722abf2f arm64: versal: Add support for vc-d-d1760-01
Add support for the first data center card. Only memory and uart is
specified for initial bringup.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-28 11:25:30 +02:00
Siva Durga Prasad Paladugu
51dfed0c18 mmc: zynq_sdhci: Fix SD at 25MHz
High speeds were broken in versal. This patch workarounds the issue and operates
SD in 25MHz.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-28 11:25:30 +02:00
Michal Simek
3e136a2702 arm64: versal: Add a2197 base board support with x-prc01/02 cards
There is generic defconfig designed for autodetection (not added yet)
and then separate defconfigs directly used for certain x-prc card.

Octal SPI dts is added but not wired for x-prc specific defconfig.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Harini Katakam <harini.katakam@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
2019-06-28 11:25:30 +02:00
Michal Simek
c1cf1a3d98 arm64: versal: Add platform detection code to versal_virt
Detect which platform U-Boot is running at and based on that choose DTS
file which U-Boot uses for own configuration.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-06 15:00:35 +02:00
Michal Simek
30f6180c99 arm64: zynqmp: Add DT for zcu216 revA board
Add preliminary support for zcu216 board.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-06 14:49:03 +02:00
Michal Simek
a52a805d61 arm64: zynqmp: Add a2197 memory board revA
Similar to processor board but i2c structure is completely different.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-06 14:01:14 +02:00
Michal Simek
ee9b308483 arm64: zynqmp: Add System Controller for a2197-g/p
Similar SCs but different wiring.

- dc_i2c is connected to X-PRC cards that's why label is required to have
  an option to hook up some devices.
- Exactly identify i2c devices on x-prc boards.
  In case of missing i2c connection devices won't be accessible.
- USB 0 should be device mode with super speed.
- USB 1 should be host mode.
- Fix i2c mux reset pin entry - commented, not verified.
- Fix i2c1 eeprom compatible string - it is an ST 128Kbit device.
  Need to use atmel fallback.
- Fix si570 I2C slave address and add corresponding part numbers.
- Enable AMS for system monitoring.
- phy reset property should be commented because it will throw a
  warning dump when called from context that can sleep.
  No support for phys property (zynqmp phy driver) with SGMII.
  Add is-internal-pcspma property required by uboot.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Harini Katakam <harini.katakam@xilinx.com>
2019-06-06 13:56:50 +02:00
Michal Simek
4b1a740aef arm64: zynqmp: Add generic a2197 system controller config
Add generic configuration for a2197-p/-m/-g boards.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-06 13:46:52 +02:00
Michal Simek
8e10a95228 arm64: zynqmp: Add board detection based on FRU
Identification depends on eeprom with FRU content.

For example 2 eeproms to check.
chosen {
	xlnx,eeprom = <&eeprom>, <&eeprom2>;
};

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-06 13:46:52 +02:00
Michal Simek
e78bcec604 cmd: fru: Add fru to versal maintainer fragment
Just record responsiblity.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-06 13:46:52 +02:00
Michal Simek
0837acee9b cmd: fru: Add basic fru format generator
Idea is to have something what can be used for board bringup from
generic board perspective.

There is a violation compare to spec that FRU ID is ASCII8 instead of
binary format but this is really for having something to pass boot and
boot to OS which has better generating options.
Also time should be filled properly.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-06 13:46:52 +02:00
Michal Simek
1cf538f832 cmd: fru: Simplify do_fru_capture()
Remove ret and check already recorded maximum number of args via
cmdtp->maxargs.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-06 13:46:52 +02:00
Michal Simek
291b2ec0cc cmd: fru: Use the same format in long help
Use the same format for both capture/display options.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-06 13:46:52 +02:00
Michal Simek
c718031b55 cmd: fru: Also write terminating char to arrays
There is a need to also end up strings with terminating char \0 to be
able to reread different structures.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-06 13:46:52 +02:00
Michal Simek
70c975fe77 cmd: fru: Fix structure format for board info
Origin code was targeting product area which is not what will be used at
first place.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-06 13:46:52 +02:00
Michal Simek
50b3b7f273 cmd: fru: Separate checksum routine
There is a need to call this function from different places too.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-06 13:46:52 +02:00
Michal Simek
d6fc386420 cmd: fru: Save fru decoding address to variables
Keep record of place where fru is.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-06 13:46:52 +02:00
Michal Simek
f6a651bdcd cmd: fru: Move fru_data to data section instead of bss section
I didn't fully check it but I think that there is an issue to use FIT
images with dtb again when bss section is cleared. U-Boot copy just
origin DTB and if embedded_dtb_select() doesn't find new DTB then can't
go back to origin DTB file.
Move this structure to data section for now.
It should be allocated by malloc anyway.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-06 13:46:52 +02:00
Michal Simek
c899191781 cmd: fru: Move structures to header
There is no reason to keep them private just in C.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-06 13:46:52 +02:00
Siva Durga Prasad Paladugu
df532608ed cmd: fru: Add support for FRU commands
This patch adds support for fru commands "fru capture"
and "fru display". The fru capture parses the FRU table
present at an address and stores in a structure for later
use. The fru display prints the content of captured structured
in a readable format.

As of now, it supports only common header and board area of FRU.
Also, its supports only English language code and ASCII8 format.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-06 13:46:52 +02:00
Michal Simek
f607c476e7 arm64: zynqmp: Do not remove dpll_prog from psu_init
dpll_prog is available in some psu_init files that's why this function
should stay there.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-06 13:45:41 +02:00
Luca Ceresoli
6db7101e09 arm64: zynqmp: add tool to minimize psu_init_gpl.c files
This script transforms a pair of psu_init_gpl.c and .h files produced by
the Xilinx Vivado tool for ZynqMP into a smaller psu_init_gpl.c file that
is almost checkpatch compliant.

Based on a script by Michal Simek.

Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-06 13:09:54 +02:00
Michal Simek
08e89c2e64 arm64: versal: Enable BDI for mini mtest configuration
bdi is useful to see how memory is mapped.
Also enable 3 memory banks to be mapped.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-04 14:22:25 +02:00
Michal Simek
20bd2bb23a arm64: versal: Align model name with DT
All qspi configurations are marked as MINI QSPI which is wrong.
Use model property to distinguish different configurations.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-04 14:22:25 +02:00
Siva Durga Prasad Paladugu
2e6f0a40dc arm64: versal: Update compatible string in ospi node
This patch updates ospi node compatible strings to match
with latest source.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-04 14:22:25 +02:00
Michal Simek
54bc9ce169 arm64: versal: Enable memory mapping via DT
Code reads DT and setup MMU table based on memory node.
This will ensure that only DT needs to be changed.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-04 14:22:25 +02:00
Siva Durga Prasad Paladugu
bc5ed323e6 arm64: versal: Enable USB driver support
This patch adds usb host and device mode support for Xilinx
Versal virtual platform. By default USB host functionality
is enabled. To use in usb device mode, set dr_mode property
in DT to peripheral.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-04 14:22:25 +02:00
Siva Durga Prasad Paladugu
f09c49270c arm64: versal: Define configs related to USB DFU functionality
This patch defines macros required for DFU functionality
for Xilinx Versal platform.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-04 14:22:25 +02:00
Michal Simek
49227276c6 arm64: zynqmp: Rename zc1275 to zcu1275
Name of this platform has changed and released to customers that's why
name has also changed.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Series-to: uboot
2019-06-04 14:20:53 +02:00
Michal Simek
d1b1bf55a9 arm64: zynqmp: Align model name with DT
All qspi configurations are marked as MINI QSPI which is wrong.
Use model property to distinguish different configurations.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-04 14:20:53 +02:00
Michal Simek
8a560967f6 arm: zynq: Align model name with DT
All qspi configurations are marked as MINI QSPI which is wrong.
Use model property to distinguish different configurations.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-04 14:20:53 +02:00
Luca Ceresoli
275d716a4c arm64: zynqmp: add tool to convert PMU config object .c to binary
The recently-added ZYNQMP_SPL_PM_CFG_OBJ_FILE option allows SPL to load a
PMUFW configuration object from a binary blob. However the configuration
object is produced by Xilinx proprietary tools as a C source file and no
tool exists to easily convert it to a binary blob in an embedded Linux
build system for U-Boot to use.

Add a simple Python script to do the conversion.

It is definitely not a complete C language parser, but it is enough to
parse the known patterns generated by Xilinx tools, including:

 - defines
 - literal integers, optionally with a 'U' suffix
 - bitwise OR between them

Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-04 14:20:53 +02:00
Luca Ceresoli
1f01941d0a arm64: zynqmp: spl: install a PMU firmware config object at runtime
Optionally allow U-Boot to load a configuration object into the Power
Management Unit (PMU) firmware on Xilinx ZynqMP.

The configuration object is required by the PMU FW to enable most SoC
peripherals. So far the only way to boot using U-Boot SPL was to hard-code
the configuration object in the PMU firmware. Allow a different boot
process, where the PMU FW is equal for any ZynqMP chip and its
configuration is passed at runtime by U-Boot SPL.

All the code for Inter-processor communication with the PMU is isolated in
a new file (pmu_ipc.c). The code is inspired by the same feature as
implemented in the Xilinx First Stage Bootloader (FSBL) and Arm Trusted
Firmware:

 * fb647e6b4c/lib/sw_apps/zynqmp_fsbl/src/xfsbl_misc_drivers.c (L295)
 * c48d02bade/plat/xilinx/zynqmp/pm_service/pm_api_sys.c (L357)

SPL logs on the console before loading the configuration object:

  U-Boot SPL 2019.07-rc1-00511-gaec224515c87 (May 15 2019 - 08:43:41 +0200)
  Loading PMUFW cfg obj (2008 bytes)
  EL Level:	EL3
  ...

Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-04 14:20:53 +02:00
Ibai Erkiaga
84fa7c8ff3 Kconfig: fix FIT offset prompt text
The current prompt text for FIT external offset is identical to
SYS_TEXT_BASE which might confuse the users. Provided more accurate
description for the prompt text.

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2019-06-04 13:38:45 +02:00
Luca Ceresoli
6b6f167a3d arm64: zynqmp: fix preprocessor check for SPL_ZYNQMP_TWO_SDHCI
A missing CONFIG_ prefix while checking for this Kconfig variable makes the
check always fail. Fix it. While there also switch from the '#if defined'
form to the '#ifdef' form as the other checks in this function.

Fixes: 35e2b92344 ("arm64: zynqmp: Fix logic around CONFIG_ZYNQ_SDHCI")

Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-04 13:38:45 +02:00
Siva Durga Prasad Paladugu
117aa8e082 arm64: zynqmp: Enable spi flash split read
This patch enables spi flash spilt read for ZynqMP
platform.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-04 13:12:07 +02:00
Siva Durga Prasad Paladugu
c744e9e6f6 mtd: spi: Split read transactions per bank
The patch splits the read transaction into multiple
read transactions which means incase of read requested
across multiple banks, it splits and sends one read per
bank. This can be enabled using new config option
CONFIG_SPI_FLASH_SPLIT_READ.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-04 12:48:10 +02:00
Siva Durga Prasad Paladugu
b3e44ab427 mmc: sdhci: Move ZYNQ_HISPD_BROKEN to Kconfig
This patch moves CONFIG_ZYNQ_HISPD_BROKEN to Kconfig

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-04 12:47:15 +02:00
Wojciech Tatarski
c379a08eb5 spi: zynqmp_gqspi: do not round immediate_data field
Immediate_data is 8 bit value in generic FIFO command. When fields
data_xfer=1 and exponent=0 this field specifies the absolute number of data
bytes to read into the RXFIFO. Values from range 0xfd to 0xff are rounded
up to 0x100. It causes overwriting the next bit field which is data_xfer.
According to Zynq US+ TRM only DMA transfers should be word aligned. So
there is no reason to round up the immediate_data field.

Signed-off-by: Wojciech Tatarski <wtatarski@antmicro.com>
Signed-off-by: Tomasz Gorochowik <tgorochowik@antmicro.com>
Tested-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-04 12:47:15 +02:00
Wojciech Tatarski
d7432d93b4 spi: zynqmp_gqspi: DMA transfers should be world aligned
According to Zynq US+ TRM all the data transfers are word aligned. So
there is no reason to round up size of DMA transfer to ARCH_DMA_MINALIGN
(0x40)

Signed-off-by: Wojciech Tatarski <wtatarski@antmicro.com>
Signed-off-by: Tomasz Gorochowik <tgorochowik@antmicro.com>
Tested-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-04 12:47:15 +02:00
T Karthik Reddy
08d9db9b5c drivers: usb: dwc3: setup phy before dwc3 core soft reset
Phy setup should be done before dwc3 soft core reset as it is done
in linux & this fixes unreliable detection of usb cable on host side.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-04 12:47:15 +02:00
T Karthik Reddy
67f7f4461a usb: composite: add BOS descriptor support to composite framework
To add usb-3.0 support to peripheral device add BOS & SS capability
descriptors to gadget composite framework.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-04 12:47:15 +02:00
Siva Durga Prasad Paladugu
9bafead6b7 mtd: spi_flash: Add device mt35ux02g to spi flash ids list
This patch adds new spi flash device mt35ux02g to spi
flash ids table.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-04 12:47:15 +02:00
Siva Durga Prasad Paladugu
9ba61fc244 spi: Add support for 4Byte addressing commands
Thsi patch adds support for 4-byte addressing Read, write
and erase commands.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
2019-06-04 12:47:15 +02:00
Siva Durga Prasad Paladugu
c879ab6c71 spi: cadence_qspi: Fix stig write issue
This patch fixes the stig programming issue by checking
the status and flag status register register for every
write.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
2019-06-04 12:47:15 +02:00