Commit Graph

1510 Commits

Author SHA1 Message Date
Linus Torvalds
ed4643521e ARM: DT updates for 5.18
After a somewhat quiet 5.17 release, the size of the DT changes
 is a bit larger again. There are nine new SoC that get added,
 all of them related to existing platforms:
 
  - Airoha (formerly Mediatek/EcoNet) EN7523 networking SoC and EVB
 
  - Mediatek mt6582 tablet platform with the Prestigio PMT5008 3G tablet
 
  - Microchip Lan966 networking SoC and it evaluation board
 
  - Qualcomm Snapdragon 625/632 midrange phone SoCs, with the
    LG Nexus 5X and Fairphone FP3 phones
 
  - Renesas RZ/G2LC and RZ/V2L general-purpose embedded SoCs,
    along with their evaluation boards
 
  - Samsung Exynos 850 phone SoC and reference board
 
  - Samsung Exynos7885 with the Samsung Galaxy A8 (2018) phone
 
  - Tesla FSD (Fully Self-Driving), an automotive SoC losely derived
    from the Samsung Exynos family.
 
  - TI K3/AM62 SoC and reference board
 
 Support for additional functionality in existing dts files is added all
 over the place: Samsung, Renesas, Mstar, wpcm450, OMAP, AT91, Allwinner,
 i.MX, Tegra, Aspeed, Oxnas, Qualcomm, Mediatek, and Broadcom.
 
 Samsung has a rework for its pinctrl schema that is a bit tricky and
 requires driver changes to be included here.
 
 A few more platforms only have smaller cleanups and DT Schema fixes,
 this includes SoCFPGA, ux500, ixp4xx, STi, Xilinx Zynq, LG, and Juno.
 
 The new machines are really too many to list, but I'll do it anyway:
 
  Allwinner:
    - A20-Marsboard development board
 
  Amlogic
   - Amediatek X96-AIR (Amlogic S905X3)
   - CYX A95XF3-AIR (Amlogic S905X3)
   - Haochuangy H96-Max (Amlogic S905X3)
   - Amlogic AQ222 (Amlogic S4)
   - OSMC Vero 4K+ (Amlogic S905D)
 
  Arm Juno
   - Separate DT depending on SCMI firmware version
 
  Aspeed:
   - Quanta S6Q BMC (AST2600)
   - ASRock ROMED8HM3 (AST2500)
 
  Broadcom:
   - Raspberry Pi Zero 2 W
 
  Marvell MVEBU/Armada:
   - Ctera C200 V1 NAS (kirkwood)
   - Ctera C200 V2 NAS (armada-370)
 
  Mstar
   - DongShanPiOne, a low-end embedded board
   - Miyoo Mini handheld game console
 
  NXP i.MX:
   - Numerous i.MX8M Mini based boards in even more variations, but
     none based on other SoCs this time:
     Protonic PRT8MM, emCON-MX8M Mini, Toradex Verdin, and
     Gateworks GW7903
 
  Qualcomm:
   - Google Herobrine R1 Chromebook platform (Snapdragon 7c Gen 3)
   - SHIFT6mq phone (Snapdragon 845)
   - Samsung Galaxy Book2 (Snapdragon 850)
   - Snapdragon 8 Gen 1 Hardware Development Kit
 
  TI OMAP:
   - SanCloud BeagleBone Enhanced WiFi
 
  Rockchip:
   - Pine64 PineNote ereader tablet (rk356x)
   - Bananapi-R2-Pro (rk356x)
 
  STM32:
   - emtrion emSBS-Argon embedded board (stm32mp157c)
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Merge tag 'arm-dt-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM devicetree updates from Arnd Bergmann:
 "After a somewhat quiet 5.17 release, the size of the DT changes is a
  bit larger again. There are nine new SoC that get added, all of them
  related to existing platforms:

   - Airoha (formerly Mediatek/EcoNet) EN7523 networking SoC and EVB

   - Mediatek mt6582 tablet platform with the Prestigio PMT5008 3G
     tablet

   - Microchip Lan966 networking SoC and it evaluation board

   - Qualcomm Snapdragon 625/632 midrange phone SoCs, with the LG Nexus
     5X and Fairphone FP3 phones

   - Renesas RZ/G2LC and RZ/V2L general-purpose embedded SoCs, along
     with their evaluation boards

   - Samsung Exynos 850 phone SoC and reference board

   - Samsung Exynos7885 with the Samsung Galaxy A8 (2018) phone

   - Tesla FSD (Fully Self-Driving), an automotive SoC loosely derived
     from the Samsung Exynos family.

   - TI K3/AM62 SoC and reference board

  Support for additional functionality in existing dts files is added
  all over the place: Samsung, Renesas, Mstar, wpcm450, OMAP, AT91,
  Allwinner, i.MX, Tegra, Aspeed, Oxnas, Qualcomm, Mediatek, and
  Broadcom.

  Samsung has a rework for its pinctrl schema that is a bit tricky and
  requires driver changes to be included here.

  A few more platforms only have smaller cleanups and DT Schema fixes,
  this includes SoCFPGA, ux500, ixp4xx, STi, Xilinx Zynq, LG, and Juno.

  The new machines are really too many to list, but I'll do it anyway:

  Allwinner:
   - A20-Marsboard development board

  Amlogic:
   - Amediatek X96-AIR (Amlogic S905X3)
   - CYX A95XF3-AIR (Amlogic S905X3)
   - Haochuangy H96-Max (Amlogic S905X3)
   - Amlogic AQ222 (Amlogic S4)
   - OSMC Vero 4K+ (Amlogic S905D)

  Arm Juno:
   - Separate DT depending on SCMI firmware version

  Aspeed:
   - Quanta S6Q BMC (AST2600)
   - ASRock ROMED8HM3 (AST2500)

  Broadcom:
   - Raspberry Pi Zero 2 W

  Marvell MVEBU/Armada:
   - Ctera C200 V1 NAS (kirkwood)
   - Ctera C200 V2 NAS (armada-370)

  Mstar:
   - DongShanPiOne, a low-end embedded board
   - Miyoo Mini handheld game console

  NXP i.MX:
   - Numerous i.MX8M Mini based boards in even more variations, but
    none based on other SoCs this time:
    Protonic PRT8MM, emCON-MX8M Mini, Toradex Verdin, and
    Gateworks GW7903

  Qualcomm:
   - Google Herobrine R1 Chromebook platform (Snapdragon 7c Gen 3)
   - SHIFT6mq phone (Snapdragon 845)
   - Samsung Galaxy Book2 (Snapdragon 850)
   - Snapdragon 8 Gen 1 Hardware Development Kit

  TI OMAP:
   - SanCloud BeagleBone Enhanced WiFi

  Rockchip:
   - Pine64 PineNote ereader tablet (rk356x)
   - Bananapi-R2-Pro (rk356x)

  STM32:
   - emtrion emSBS-Argon embedded board (stm32mp157c)"

* tag 'arm-dt-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (627 commits)
  arm64: dts: n5x: drop invalid property and fix edac node name
  arm64: dts: fsd: Add the MCT support
  arm64: dts: stingray: Fix spi clock name
  arm64: dts: ns2: Fix spi clock name
  ARM: dts: rockchip: Update regulator name for PX3
  ARM: dts: rockchip: Add #clock-cells value for rk805
  arm64: dts: rockchip: Add #clock-cells value for rk805
  arm64: dts: rockchip: Remove vcc13 and vcc14 for rk808
  arm64: dts: rockchip: Fix SDIO regulator supply properties on rk3399-firefly
  ARM: dts: at91: sama7g5: Add NAND support
  ARM: dts: at91: sama7g5: add eic node
  ARM: dts: at91: sama7g5: Remove unused properties in i2c nodes
  ARM: dts: at91: sam9x60ek: modify vdd_1v5 regulator to vdd_1v15
  arm64: dts: lg: align pl330 node name with dtschema
  arm64: dts: lg: add dma-cells to pl330 node
  arm64: dts: juno: align pl330 node name with dtschema
  arm64: dts: broadcom: Fix sata nodename
  arm64: dts: n5x: add sdr edac support
  arm64: dts: agilex/stratix10: add clock-names to USB DWC2 node
  dt-bindings: usb: dwc2: add disable-over-current
  ...
2022-03-23 18:37:22 -07:00
Linus Torvalds
b4bc93bd76 ARM driver updates for 5.18
There are a few separately maintained driver subsystems that we merge through
 the SoC tree, notable changes are:
 
  - Memory controller updates, mainly for Tegra and Mediatek SoCs,
    and clarifications for the memory controller DT bindings
 
  - SCMI firmware interface updates, in particular a new transport based
    on OPTEE and support for atomic operations.
 
  - Cleanups to the TEE subsystem, refactoring its memory management
 
 For SoC specific drivers without a separate subsystem, changes include
 
  - Smaller updates and fixes for TI, AT91/SAMA5, Qualcomm and NXP
    Layerscape SoCs.
 
  - Driver support for Microchip SAMA5D29, Tesla FSD, Renesas RZ/G2L,
    and Qualcomm SM8450.
 
  - Better power management on Mediatek MT81xx, NXP i.MX8MQ
    and older NVIDIA Tegra chips
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Merge tag 'arm-drivers-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM driver updates from Arnd Bergmann:
 "There are a few separately maintained driver subsystems that we merge
  through the SoC tree, notable changes are:

   - Memory controller updates, mainly for Tegra and Mediatek SoCs, and
     clarifications for the memory controller DT bindings

   - SCMI firmware interface updates, in particular a new transport
     based on OPTEE and support for atomic operations.

   - Cleanups to the TEE subsystem, refactoring its memory management

  For SoC specific drivers without a separate subsystem, changes include

   - Smaller updates and fixes for TI, AT91/SAMA5, Qualcomm and NXP
     Layerscape SoCs.

   - Driver support for Microchip SAMA5D29, Tesla FSD, Renesas RZ/G2L,
     and Qualcomm SM8450.

   - Better power management on Mediatek MT81xx, NXP i.MX8MQ and older
     NVIDIA Tegra chips"

* tag 'arm-drivers-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (154 commits)
  ARM: spear: fix typos in comments
  soc/microchip: fix invalid free in mpfs_sys_controller_delete
  soc: s4: Add support for power domains controller
  dt-bindings: power: add Amlogic s4 power domains bindings
  ARM: at91: add support in soc driver for new SAMA5D29
  soc: mediatek: mmsys: add sw0_rst_offset in mmsys driver data
  dt-bindings: memory: renesas,rpc-if: Document RZ/V2L SoC
  memory: emif: check the pointer temp in get_device_details()
  memory: emif: Add check for setup_interrupts
  dt-bindings: arm: mediatek: mmsys: add support for MT8186
  dt-bindings: mediatek: add compatible for MT8186 pwrap
  soc: mediatek: pwrap: add pwrap driver for MT8186 SoC
  soc: mediatek: mmsys: add mmsys reset control for MT8186
  soc: mediatek: mtk-infracfg: Disable ACP on MT8192
  soc: ti: k3-socinfo: Add AM62x JTAG ID
  soc: mediatek: add MTK mutex support for MT8186
  soc: mediatek: mmsys: add mt8186 mmsys routing table
  soc: mediatek: pm-domains: Add support for mt8186
  dt-bindings: power: Add MT8186 power domains
  soc: mediatek: pm-domains: Add support for mt8195
  ...
2022-03-23 18:23:13 -07:00
Arnd Bergmann
1a38f961c4 AT91 DT #2 for 5.18:
- Align one sam9x60ek regulator with reality at vdd_1v15
 - Clean sama7g5 i2c nodes
 - Add EIC and NAND nodes to sama7g5
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Merge tag 'at91-dt-5.18-2' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/dt

AT91 DT #2 for 5.18:

- Align one sam9x60ek regulator with reality at vdd_1v15
- Clean sama7g5 i2c nodes
- Add EIC and NAND nodes to sama7g5

* tag 'at91-dt-5.18-2' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  ARM: dts: at91: sama7g5: Add NAND support
  ARM: dts: at91: sama7g5: add eic node
  ARM: dts: at91: sama7g5: Remove unused properties in i2c nodes
  ARM: dts: at91: sam9x60ek: modify vdd_1v5 regulator to vdd_1v15

Link: https://lore.kernel.org/r/20220304160036.27392-1-nicolas.ferre@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-03-08 16:22:28 +01:00
Tudor Ambarus
92499dec3a ARM: dts: at91: sama7g5: Add NAND support
Add NAND support. The sama7g5's SMC IP is the same as sama5d2's with
a slightly change: it provides a synchronous clock output (SMC clock)
that is dedicated to FPGA usage. Since this doesn't interfere with the SMC
NAND configuration, thus code will not be added in the current nand driver
to address the FPGA usage, use the sama5d2's compatible and choose not to
introduce dedicated compatibles for sama7g5.
Tested with Micron MT29F4G08ABAEAWP NAND flash.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
[nicolas.ferre@microchip.com: add the definition of PMC_MCK1 in
	include/dt-bindings/clock/at91.h from another patch]
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20220111130556.905978-1-tudor.ambarus@microchip.com
2022-03-04 15:03:53 +01:00
Arnd Bergmann
cba4cdeb35 dt-bindings: Changes for v5.18-rc1
This contains additions to various DT bindings includes (such as clocks,
 resets, power domains, memory controller clients and SMMU stream IDs)
 for Tegra234.
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Merge tag 'tegra-for-5.18-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt

dt-bindings: Changes for v5.18-rc1

This contains additions to various DT bindings includes (such as clocks,
resets, power domains, memory controller clients and SMMU stream IDs)
for Tegra234.

* tag 'tegra-for-5.18-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  dt-bindings: memory: Add Tegra234 PCIe memory
  dt-bindings: power: Add Tegra234 PCIe power domains
  dt-bindings: Add Tegra234 PCIe clocks and resets
  dt-bindings: Document Tegra234 HDA support
  dt-bindings: Add HDA support for Tegra234
  dt-bindings: Add Tegra234 APE support
  dt-bindings: Add headers for Tegra234 PWM
  dt-bindings: Add headers for Tegra234 I2C

Link: https://lore.kernel.org/r/20220225164741.1064416-2-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-02-28 15:10:36 +01:00
Arnd Bergmann
b10e270dc9 Renesas ARM DT updates for v5.18 (take two)
- Document the use of the renesas-soc IRC channel,
   - Watchdog support for the R-Car S4-8, RZ/N1D, and RZ/G2LC SoCs on the
     Spider, RZN1D-DB, and RZ/G2LC SMARC EVK development boards,
   - Miscellaneous fixes and improvements.
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Merge tag 'renesas-arm-dt-for-v5.18-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt

Renesas ARM DT updates for v5.18 (take two)

  - Document the use of the renesas-soc IRC channel,
  - Watchdog support for the R-Car S4-8, RZ/N1D, and RZ/G2LC SoCs on the
    Spider, RZN1D-DB, and RZ/G2LC SMARC EVK development boards,
  - Miscellaneous fixes and improvements.

* tag 'renesas-arm-dt-for-v5.18-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  ARM: dts: renesas: Align GPIO hog names with dtschema
  arm64: dts: renesas: Align GPIO hog names with dtschema
  arm64: dts: renesas: rzg2lc-smarc-som: Enable watchdog
  ARM: dts: r9a06g032-rzn1d400-db: Enable watchdog0 with a 60s timeout
  ARM: dts: r9a06g032: Add the watchdog nodes
  dt-bindings: clock: r9a06g032: Add the definition of the watchdog clock
  arm64: dts: renesas: spider-cpu: Enable watchdog timer
  arm64: dts: renesas: r8a779f0: Add RWDT node
  MAINTAINERS: Specify IRC channel for Renesas ARM64 port
  MAINTAINERS: Specify IRC channel for Renesas ARM32 port
  arm64: dts: renesas: ulcb-kf: fix wrong comment

Link: https://lore.kernel.org/r/cover.1645784466.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-02-25 16:14:30 +01:00
Arnd Bergmann
3b34d3a919 Renesas ARM DT updates for v5.18
- External interrupt (INTC-EX) support for the R-Car V3U SoC,
   - Initial support for the RZ/G2LC and RZ/V2L SoCs, and the RZ/G2LC and
     RZ/V2L SMARC EVK development boards,
   - Support for MAX9286 GMSL deserializers and GSML cameras on the Eagle
     and Condor development boards,
   - NAND support for the RZ/N1D SoC,
   - DMA engine (SYS-DMAC) support for the R-Car S4-8 SoC,
   - LVDS support for the R-Car M3-W+ SoC,
   - HDMI output and 9-axis sensor support for the Kingfisher (ULCB
     extension) board,
   - MAX96712 GMSL serializer support for the Falcon development board,
   - MOST network support for the R-Car H3, M3-W, M3-W+, M3-N, E3, and D3
     SoCs,
   - Miscellaneous fixes and improvements.
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Merge tag 'renesas-arm-dt-for-v5.18-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt

Renesas ARM DT updates for v5.18

  - External interrupt (INTC-EX) support for the R-Car V3U SoC,
  - Initial support for the RZ/G2LC and RZ/V2L SoCs, and the RZ/G2LC and
    RZ/V2L SMARC EVK development boards,
  - Support for MAX9286 GMSL deserializers and GSML cameras on the Eagle
    and Condor development boards,
  - NAND support for the RZ/N1D SoC,
  - DMA engine (SYS-DMAC) support for the R-Car S4-8 SoC,
  - LVDS support for the R-Car M3-W+ SoC,
  - HDMI output and 9-axis sensor support for the Kingfisher (ULCB
    extension) board,
  - MAX96712 GMSL serializer support for the Falcon development board,
  - MOST network support for the R-Car H3, M3-W, M3-W+, M3-N, E3, and D3
    SoCs,
  - Miscellaneous fixes and improvements.

* tag 'renesas-arm-dt-for-v5.18-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (27 commits)
  arm64: dts: renesas: rzg2lc-smarc: Use SW_SD0_DEV_SEL macro for eMMC/SDHI device selection
  arm64: dts: renesas: rzg2lc-smarc: Enable CANFD channel 1
  arm64: dts: renesas: rzg2lc-smarc: Enable SCIF1 on carrier board
  arm64: dts: renesas: rzg2lc-smarc: Add macros for DIP-Switch settings
  arm64: dts: renesas: rzg2l-smarc: Add common dtsi file
  arm64: dts: renesas: rzg2lc-smarc: Enable microSD on SMARC platform
  arm64: dts: renesas: rzg2lc-smarc-som: Enable eMMC on SMARC platform
  arm64: dts: renesas: Add initial device tree for RZ/V2L SMARC EVK
  arm64: dts: renesas: Add initial DTSI for RZ/V2L SoC
  dt-bindings: clock: Add R9A07G054 CPG Clock and Reset Definitions
  arm64: dts: renesas: ulcb/ulcb-kf: switch to use audio-graph-card2 for sound
  arm64: dts: renesas: rcar-gen3: Add MOST devices
  arm64: dts: renesas: Miscellaneous whitespace fixes
  arm64: dts: renesas: falcon-csi-dsi: Add and connect MAX96712
  arm64: dts: renesas: ulcb-kf: Add 9-asix sensor device
  arm64: dts: renesas: ulcb-kf: Add KF HDMI output
  arm64: dts: renesas: r8a77961: Add lvds0 device node
  arm64: dts: renesas: r8a779f0: Add sys-dmac nodes
  ARM: dts: r9a06g032: Describe the NAND controller
  arm64: dts: renesas: Add GMSL cameras .dtsi
  ...

Link: https://lore.kernel.org/r/cover.1644587200.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-02-25 15:23:12 +01:00
Vidya Sagar
d06a171e07 dt-bindings: Add Tegra234 PCIe clocks and resets
Add the clocks and resets used by the PCIe hardware found on
Tegra234 SoCs.

Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-24 19:56:16 +01:00
Mohan Kumar
07d743902a dt-bindings: Add HDA support for Tegra234
Add hda clocks, memory ,power and reset binding entries
for Tegra234.

Signed-off-by: Mohan Kumar <mkumard@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-24 18:34:33 +01:00
Jean-Jacques Hiblot
a3a59919ab dt-bindings: clock: r9a06g032: Add the definition of the watchdog clock
This clock is actually the REF_SYNC_D8 clock.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220221095032.95054-2-jjhiblot@traphandler.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-02-24 13:48:08 +01:00
Sameer Pujar
40efe139ff dt-bindings: Add Tegra234 APE support
Add clocks, power-domain and memory bindings to support APE subsystem
on Tegra234.

Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-17 15:21:43 +01:00
Arnd Bergmann
486343d372 Fixes for omaps
A series of fixes for omap variants for minor issues, and a fix for a timer
 regression for some omap3 beagleboard versions.
 
 The timer fix needs to patch both the dts and the timer code because
 otherwise the timer quirk handling for old dtbs will prevent the dts fix
 from working.
 
 The other changes are for issues found by automated analysis, a macasp
 typo fix, and two cosmetic fixes for clocks.
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Merge tag 'omap-for-v5.17/fixes-for-merge-window-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixes

Fixes for omaps

A series of fixes for omap variants for minor issues, and a fix for a timer
regression for some omap3 beagleboard versions.

The timer fix needs to patch both the dts and the timer code because
otherwise the timer quirk handling for old dtbs will prevent the dts fix
from working.

The other changes are for issues found by automated analysis, a macasp
typo fix, and two cosmetic fixes for clocks.

* tag 'omap-for-v5.17/fixes-for-merge-window-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: dts: Don't use legacy clock defines for dra7 clkctrl
  clk: ti: Move dra7 clock devices out of the legacy section
  ARM: dts: Fix timer regression for beagleboard revision c
  ARM: dts: am335x-wega: Fix typo in mcasp property rx-num-evt
  ARM: OMAP2+: adjust the location of put_device() call in omapdss_init_of
  ARM: OMAP2+: hwmod: Add of_node_put() before break

Link: https://lore.kernel.org/r/pull-1641801310-149268@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-02-07 17:42:44 +01:00
Akhil R
38eb21a5fc dt-bindings: Add headers for Tegra234 PWM
Add dt-bindings header files for PWM of Tegra234

Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-03 18:43:17 +01:00
Akhil R
bb747becf8 dt-bindings: Add headers for Tegra234 I2C
Add dt-bindings header files for I2C controllers for Tegra234

Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-03 18:43:00 +01:00
Biju Das
4decd2e54b dt-bindings: clock: Add R9A07G054 CPG Clock and Reset Definitions
Define RZ/V2L (R9A07G054) Clock Pulse Generator Core Clock and module
clock outputs, as listed in Table 7.1.4.2 ("Clock List r1.0") and also
add Reset definitions referring to registers CPG_RST_* in Section 7.2.3
("Register configuration") of the RZ/V2L Hardware User's Manual (Rev.
1.00, Nov. 2021).

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220126211003.6675-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-02-02 09:06:22 +01:00
Alim Akhtar
d6dc675377 dt-bindings: clock: Add bindings definitions for FSD CMU blocks
Clock controller driver of FSD platform is designed to have separate
instances for each particular CMU. So clock IDs in this bindings header
also start from 1 for each CMU block.

Cc: linux-fsd@tesla.com
Reported-by: kernel test robot <lkp@intel.com>
[robot: reported missing #endif]
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Link: https://lore.kernel.org/r/20220124141644.71052-3-alim.akhtar@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2022-01-26 10:21:39 +01:00
Linus Torvalds
455e73a07f We have a couple patches in the framework core this time around but
they're mostly minor cleanups and some debugfs stuff. The real work
 that's in here is the typical pile of clk driver updates and new SoC
 support. Per usual (or maybe just recent trends), Qualcomm gains a
 handful of SoC drivers additions and has the largest diffstat. After
 that there are quite a few updates to the Allwinner (sunxi) drivers to
 support modular drivers and Renesas is heavily updated to add more
 support for various clks. Overall it looks pretty normal.
 
 New Drivers:
  - Add MDMA and BDMA clks to Ingenic JZ4760 and JZ4770
  - MediaTek mt7986 SoC basic support
  - Clock and reset driver for Toshiba Visconti SoCs
  - Initial clock driver for the Exynos7885 SoC (Samsung Galaxy A8)
  - Allwinner D1 clks
  - Lan966x Generic Clock Controller driver and associated DT bindings
  - Qualcomm SDX65, SM8450, and MSM8976 GCC clks
  - Qualcomm SDX65 and SM8450 RPMh clks
 
 Updates:
  - Set suppress_bind_attrs to true for i.MX8ULP driver
  - Switch from do_div to div64_ul for throughout all i.MX drivers
  - Fix imx8mn_clko1_sels for i.MX8MN
  - Remove unused IPG_AUDIO_ROOT from i.MX8MP
  - Switch parent for audio_root_clk to audio ahb in i.MX8MP driver
  - Removal of all remaining uses of __clk_lookup() in drivers/clk/samsung
  - Refactoring of the CPU clocks registration to use common interface
  - An update of the Exynos850 driver (support for more clock domains)
    required by the E850-96 development board
  - Prep for runtime PM and generic power domains on Tegra
  - Support modular Allwinner clk drivers via platform bus
  - Lan966x clock driver extended to support clock gating
  - Add serial (SCI1), watchdog (WDT), timer (OSTM), SPI (RSPI), and
    thermal (TSU) clocks and resets on Renesas RZ/G2L
  - Rework SDHI clock handling in the Renesas R-Car Gen3 and RZ/G2 clock
    drivers, and in the Renesas SDHI driver
  - Make the Cortex-A55 (I) clock on Renesas RZ/G2L programmable
  - Document support for the new Renesas R-Car S4-8 (R8A779F0) SoC
  - Add support for the new Renesas R-Car S4-8 (R8A779F0) SoC
  - Add GPU clock and resets on Renesas RZ/G2L
  - Add clk-provider.h to various Qualcomm clk drivers
  - devm version of clk_hw_register_gate()
  - kerneldoc fixes in a couple drivers
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "We have a couple patches in the framework core this time around but
  they're mostly minor cleanups and some debugfs stuff. The real work
  that's in here is the typical pile of clk driver updates and new SoC
  support.

  Per usual (or maybe just recent trends), Qualcomm gains a handful of
  SoC drivers additions and has the largest diffstat. After that there
  are quite a few updates to the Allwinner (sunxi) drivers to support
  modular drivers and Renesas is heavily updated to add more support for
  various clks.

  Overall it looks pretty normal.

  New Drivers:
   - Add MDMA and BDMA clks to Ingenic JZ4760 and JZ4770
   - MediaTek mt7986 SoC basic support
   - Clock and reset driver for Toshiba Visconti SoCs
   - Initial clock driver for the Exynos7885 SoC (Samsung Galaxy A8)
   - Allwinner D1 clks
   - Lan966x Generic Clock Controller driver and associated DT bindings
   - Qualcomm SDX65, SM8450, and MSM8976 GCC clks
   - Qualcomm SDX65 and SM8450 RPMh clks

  Updates:
   - Set suppress_bind_attrs to true for i.MX8ULP driver
   - Switch from do_div to div64_ul for throughout all i.MX drivers
   - Fix imx8mn_clko1_sels for i.MX8MN
   - Remove unused IPG_AUDIO_ROOT from i.MX8MP
   - Switch parent for audio_root_clk to audio ahb in i.MX8MP driver
   - Removal of all remaining uses of __clk_lookup() in
     drivers/clk/samsung
   - Refactoring of the CPU clocks registration to use common interface
   - An update of the Exynos850 driver (support for more clock domains)
     required by the E850-96 development board
   - Prep for runtime PM and generic power domains on Tegra
   - Support modular Allwinner clk drivers via platform bus
   - Lan966x clock driver extended to support clock gating
   - Add serial (SCI1), watchdog (WDT), timer (OSTM), SPI (RSPI), and
     thermal (TSU) clocks and resets on Renesas RZ/G2L
   - Rework SDHI clock handling in the Renesas R-Car Gen3 and RZ/G2
     clock drivers, and in the Renesas SDHI driver
   - Make the Cortex-A55 (I) clock on Renesas RZ/G2L programmable
   - Document support for the new Renesas R-Car S4-8 (R8A779F0) SoC
   - Add support for the new Renesas R-Car S4-8 (R8A779F0) SoC
   - Add GPU clock and resets on Renesas RZ/G2L
   - Add clk-provider.h to various Qualcomm clk drivers
   - devm version of clk_hw_register_gate()
   - kerneldoc fixes in a couple drivers"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (131 commits)
  clk: visconti: Remove pointless NULL check in visconti_pll_add_lookup()
  clk: mediatek: add mt7986 clock support
  clk: mediatek: add mt7986 clock IDs
  dt-bindings: clock: mediatek: document clk bindings for mediatek mt7986 SoC
  clk: mediatek: clk-gate: Use regmap_{set/clear}_bits helpers
  clk: mediatek: clk-gate: Shrink by adding clockgating bit check helper
  clk: x86: Fix clk_gate_flags for RV_CLK_GATE
  clk: x86: Use dynamic con_id string during clk registration
  ACPI: APD: Add a fmw property clk-name
  drivers: acpi: acpi_apd: Remove unused device property "is-rv"
  x86: clk: clk-fch: Add support for newer family of AMD's SOC
  clk: ingenic: Add MDMA and BDMA clocks
  dt-bindings: clk/ingenic: Add MDMA and BDMA clocks
  clk: bm1880: remove kfrees on static allocations
  clk: Drop unused COMMON_CLK_STM32MP157_SCMI config
  clk: st: clkgen-mux: search reg within node or parent
  clk: st: clkgen-fsyn: search reg within node or parent
  clk: Enable/Disable runtime PM for clk_summary
  MAINTAINERS: Add entries for Toshiba Visconti PLL and clock controller
  clk: visconti: Add support common clock driver and reset driver
  ...
2022-01-12 17:02:27 -08:00
Stephen Boyd
4afd2a9355 Merge branches 'clk-ingenic' and 'clk-mediatek' into clk-next
- Add MDMA and BDMA clks to Ingenic JZ4760 and JZ4770
 - MediaTek mt7986 SoC basic support

* clk-ingenic:
  clk: ingenic: Add MDMA and BDMA clocks
  dt-bindings: clk/ingenic: Add MDMA and BDMA clocks

* clk-mediatek:
  clk: mediatek: add mt7986 clock support
  clk: mediatek: add mt7986 clock IDs
  dt-bindings: clock: mediatek: document clk bindings for mediatek mt7986 SoC
  clk: mediatek: clk-gate: Use regmap_{set/clear}_bits helpers
  clk: mediatek: clk-gate: Shrink by adding clockgating bit check helper
2022-01-11 18:31:00 -08:00
Stephen Boyd
1d0bd126d9 Merge branches 'clk-socfpga', 'clk-toshiba', 'clk-st' and 'clk-bitmain' into clk-next
- Clock and reset driver for Toshiba Visconti SoCs

* clk-socfpga:
  clk: socfpga: s10: Make use of the helper function devm_platform_ioremap_resource()
  clk: socfpga: agilex: Make use of the helper function devm_platform_ioremap_resource()
  clk: socfpga: remove redundant assignment after a mask operation
  clk: socfpga: remove redundant assignment on division

* clk-toshiba:
  clk: visconti: Remove pointless NULL check in visconti_pll_add_lookup()
  MAINTAINERS: Add entries for Toshiba Visconti PLL and clock controller
  clk: visconti: Add support common clock driver and reset driver
  dt-bindings: clock: Add DT bindings for SMU of Toshiba Visconti TMPV770x SoC
  dt-bindings: clock: Add DT bindings for PLL of Toshiba Visconti TMPV770x SoC

* clk-st:
  clk: Drop unused COMMON_CLK_STM32MP157_SCMI config
  clk: st: clkgen-mux: search reg within node or parent
  clk: st: clkgen-fsyn: search reg within node or parent

* clk-bitmain:
  clk: bm1880: remove kfrees on static allocations
2022-01-11 18:30:50 -08:00
Stephen Boyd
f691c9b526 Merge branches 'clk-nvidia', 'clk-imx', 'clk-samsung' and 'clk-qcom' into clk-next
* clk-nvidia:
  clk: tegra: Support runtime PM and power domain
  clk: tegra: Make vde a child of pll_p on tegra114

* clk-imx:
  clk: imx8mp: Fix the parent clk of the audio_root_clk
  clk: imx8mp: Remove IPG_AUDIO_ROOT from imx8mp-clock.h
  clk: imx8mn: Fix imx8mn_clko1_sels
  clk: imx: Use div64_ul instead of do_div
  clk: imx: imx8ulp: set suppress_bind_attrs to true

* clk-samsung:
  clk: samsung: Add initial Exynos7885 clock driver
  clk: samsung: clk-pll: Add support for pll1417x
  clk: samsung: Make exynos850_register_cmu shared
  dt-bindings: clock: Document Exynos7885 CMU bindings
  dt-bindings: clock: Add bindings definitions for Exynos7885 CMU
  clk: samsung: exynos850: Add missing sysreg clocks
  dt-bindings: clock: Add bindings for Exynos850 sysreg clocks
  clk: samsung: exynos850: Register clocks early
  clk: samsung: exynos850: Keep some crucial clocks running
  clk: samsung: exynos850: Implement CMU_CMGP domain
  dt-bindings: clock: Add bindings for Exynos850 CMU_CMGP
  clk: samsung: exynos850: Implement CMU_APM domain
  dt-bindings: clock: Add bindings for Exynos850 CMU_APM
  clk: samsung: Update CPU clk registration
  clk: samsung: Remove meaningless __init and extern from header files
  clk: samsung: remove __clk_lookup() usage
  dt-bindings: clock: samsung: add IDs for some core clocks

* clk-qcom: (25 commits)
  clk: qcom: gcc-sc7280: Mark gcc_cfg_noc_lpass_clk always enabled
  clk: qcom: clk-alpha-pll: Increase PLL lock detect poll time
  clk: qcom: turingcc-qcs404: explicitly include clk-provider.h
  clk: qcom: q6sstop-qcs404: explicitly include clk-provider.h
  clk: qcom: mmcc-apq8084: explicitly include clk-provider.h
  clk: qcom: lpasscc-sdm845: explicitly include clk-provider.h
  clk: qcom: lpasscc-sc7280: explicitly include clk-provider.h
  clk: qcom: gcc-sm6350: explicitly include clk-provider.h
  clk: qcom: gcc-msm8994: explicitly include clk-provider.h
  clk: qcom: gcc-sm8350: explicitly include clk-provider.h
  clk: qcom: Add MSM8976/56 Global Clock Controller (GCC) driver
  dt-bindings: clk: qcom: Document MSM8976 Global Clock Controller
  clk: qcom: Add clock driver for SM8450
  clk: qcom: Add SDX65 GCC support
  clk: qcom: Add LUCID_EVO PLL type for SDX65
  dt-bindings: clock: Add SM8450 GCC clock bindings
  dt-bindings: clock: Add SDX65 GCC clock bindings
  clk: qcom: rpmh: add support for SM8450 rpmh clocks
  dt-bindings: clock: Add RPMHCC bindings for SM8450
  clk: qcom: smd-rpm: Drop binary value handling for buffered clock
  ...
2022-01-11 18:30:43 -08:00
Stephen Boyd
151768f348 Merge branches 'clk-x86', 'clk-stm', 'clk-amlogic' and 'clk-allwinner' into clk-next
* clk-x86:
  clk: x86: Fix clk_gate_flags for RV_CLK_GATE
  clk: x86: Use dynamic con_id string during clk registration
  ACPI: APD: Add a fmw property clk-name
  drivers: acpi: acpi_apd: Remove unused device property "is-rv"
  x86: clk: clk-fch: Add support for newer family of AMD's SOC
  clk: Introduce clk-tps68470 driver
  platform/x86: int3472: Deal with probe ordering issues
  platform/x86: int3472: Pass tps68470_regulator_platform_data to the tps68470-regulator MFD-cell
  platform/x86: int3472: Pass tps68470_clk_platform_data to the tps68470-regulator MFD-cell
  platform/x86: int3472: Add get_sensor_adev_and_name() helper
  platform/x86: int3472: Split into 2 drivers
  platform_data: Add linux/platform_data/tps68470.h file
  i2c: acpi: Add i2c_acpi_new_device_by_fwnode() function
  i2c: acpi: Use acpi_dev_ready_for_enumeration() helper
  ACPI: delay enumeration of devices with a _DEP pointing to an INT3472 device

* clk-stm:
  clk: stm32: Fix ltdc's clock turn off by clk_disable_unused() after system enter shell

* clk-amlogic:
  clk: meson: gxbb: Fix the SDM_EN bit for MPLL0 on GXBB

* clk-allwinner:
  clk: sunxi-ng: Add support for the D1 SoC clocks
  clk: sunxi-ng: gate: Add macros for gates with fixed dividers
  clk: sunxi-ng: mux: Add macros using clk_parent_data and clk_hw
  clk: sunxi-ng: mp: Add macros using clk_parent_data and clk_hw
  clk: sunxi-ng: div: Add macros using clk_parent_data and clk_hw
  dt-bindings: clk: Add compatibles for D1 CCUs
  clk: sunxi-ng: Allow the CCU core to be built as a module
  clk: sunxi-ng: Convert early providers to platform drivers
  clk: sunxi-ng: Allow drivers to be built as modules
  clk: sunxi-ng: Export symbols used by CCU drivers
2022-01-11 18:30:35 -08:00
Stephen Boyd
270bbc7253 Merge branches 'clk-doc', 'clk-renesas', 'clk-at91', 'clk-cleanup' and 'clk-debugfs' into clk-next
* clk-doc:
  clk: Gemini: fix struct name in kernel-doc
  clk: zynq: pll: Fix kernel-doc warnings
  clk: imx: pllv1: fix kernel-doc notation for struct clk_pllv1

* clk-renesas: (31 commits)
  clk: renesas: r9a07g044: Add GPU clock and reset entries
  clk: renesas: r9a07g044: Add mux and divider for G clock
  clk: renesas: r9a07g044: Rename CLK_PLL3_DIV4 macro
  clk: renesas: cpg-mssr: Add support for R-Car S4-8
  clk: renesas: rcar-gen4: Introduce R-Car Gen4 CPG driver
  dt-bindings: clock: Add r8a779f0 CPG Core Clock Definitions
  dt-bindings: power: Add r8a779f0 SYSC power domain definitions
  clk: renesas: r9a07g044: Add TSU clock and reset entry
  mmc: renesas_sdhi: Simplify an expression
  mmc: renesas_sdhi: Use devm_clk_get_optional() to obtain CD clock
  dt-bindings: clock: renesas,cpg-mssr: Document r8a779f0
  clk: renesas: cpg-mssr: propagate return value of_genpd_add_provider_simple()
  clk: renesas: cpg-mssr: Check return value of pm_genpd_init()
  clk: renesas: rzg2l: propagate return value of_genpd_add_provider_simple()
  clk: renesas: rzg2l: Check return value of pm_genpd_init()
  clk: renesas: r9a07g044: Add RSPI clock and reset entries
  clk: renesas: r9a07g044: Change core clock "I" from DEF_FIXED->DEF_DIV
  clk: renesas: rzg2l: Add CPG_PL1_DDIV macro
  mmc: renesas_sdhi: Parse DT for SDnH
  mmc: renesas_sdhi: Use dev_err_probe when getting clock fails
  ...

* clk-at91:
  clk: lan966x: Extend lan966x clock driver for clock gating support
  dt-bindings: clock: lan966x: Extend includes with clock gates
  dt-bindings: clock: lan966x: Extend for clock gate support
  clk: gate: Add devm_clk_hw_register_gate()
  clk: lan966x: Add lan966x SoC clock driver
  dt-bindings: clock: lan966x: Add LAN966X Clock Controller
  dt-bindings: clock: lan966x: Add binding includes for lan966x SoC clock IDs

* clk-cleanup:
  clk: stm32mp1: remove redundant assignment to pointer data
  clk: __clk_core_init() never takes NULL
  clk: clk_core_get() can also return NULL
  clk/ti/adpll: Make const pointer error a static const array

* clk-debugfs:
  clk: Enable/Disable runtime PM for clk_summary
  clk: Emit a stern warning with writable debugfs enabled
  clk: Add write operation for clk_parent debugfs node
2022-01-11 18:30:10 -08:00
Linus Torvalds
bb4ed26e7e SoC: Add support for StarFive JH7100 RISC-V SoC
This adds support for the StarFive JH7100, including the necessary
 device drivers and DT files for the BeagleV Starlight prototype
 board, with additional boards to be added later. This SoC promises
 to be the first usable low-cost platform for RISC-V.
 
 I've taken this through the SoC tree in the anticipation of adding
 a few other Arm based SoCs as well, but those did not pass the
 review in time, so it's only this one.
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Merge tag 'newsoc-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull RISC-V SoC updates from Arnd Bergmann:
 "Add support for StarFive JH7100 RISC-V SoC

  This adds support for the StarFive JH7100, including the necessary
  device drivers and DT files for the BeagleV Starlight prototype board,
  with additional boards to be added later. This SoC promises to be the
  first usable low-cost platform for RISC-V.

  I've taken this through the SoC tree in the anticipation of adding a
  few other Arm based SoCs as well, but those did not pass the review in
  time, so it's only this one"

* tag 'newsoc-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
  reset: starfive-jh7100: Fix 32bit compilation
  RISC-V: Add BeagleV Starlight Beta device tree
  RISC-V: Add initial StarFive JH7100 device tree
  serial: 8250_dw: Add StarFive JH7100 quirk
  dt-bindings: serial: snps-dw-apb-uart: Add JH7100 uarts
  pinctrl: starfive: Add pinctrl driver for StarFive SoCs
  dt-bindings: pinctrl: Add StarFive JH7100 bindings
  dt-bindings: pinctrl: Add StarFive pinctrl definitions
  reset: starfive-jh7100: Add StarFive JH7100 reset driver
  dt-bindings: reset: Add Starfive JH7100 reset bindings
  dt-bindings: reset: Add StarFive JH7100 reset definitions
  clk: starfive: Add JH7100 clock generator driver
  dt-bindings: clock: starfive: Add JH7100 bindings
  dt-bindings: clock: starfive: Add JH7100 clock definitions
  dt-bindings: interrupt-controller: Add StarFive JH7100 plic
  dt-bindings: timer: Add StarFive JH7100 clint
  RISC-V: Add StarFive SoC Kconfig option
2022-01-10 08:32:37 -08:00
Sam Shih
4470c830f9 clk: mediatek: add mt7986 clock IDs
Add MT7986 clock dt-bindings, include topckgen, apmixedsys,
infracfg, and ethernet subsystem clocks.

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211217121148.6753-3-sam.shih@mediatek.com
Reviewed-by: Ryder Lee <ryder.lee@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-01-06 18:30:58 -08:00
Paul Cercueil
51d04bcfb8 dt-bindings: clk/ingenic: Add MDMA and BDMA clocks
The Ingenic JZ4760 and JZ4770 both have an extra DMA core named BDMA
dedicated to the NAND and BCH controller, but which can also do
memory-to-memory transfers. The JZ4760 additionally has a DMA core named
MDMA dedicated to memory-to-memory transfers. The programming manual for
the JZ4770 does have a bit for a MDMA clock, but does not seem to have
the hardware wired in.

Add macros for the MDMA and BDMA clocks to the dt-bindings include
files, so that they can be used within Device Tree files.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Link: https://lore.kernel.org/r/20211220193319.114974-2-paul@crapouillou.net
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-01-06 17:51:11 -08:00
Nobuhiro Iwamatsu
ffa81a0326 dt-bindings: clock: Add DT bindings for SMU of Toshiba Visconti TMPV770x SoC
Add device tree bindings for SMU (System Management Unit) controller of
Toshiba Visconti TMPV770x SoC series.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211025031038.4180686-3-nobuhiro1.iwamatsu@toshiba.co.jp
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-01-05 17:05:21 -08:00
Arnd Bergmann
c03b7ba969 Qualcomm ARM64 DeviceTree updates for v5.17
This introduces initial support for the brand new Snapdragon 8 Gen 1,
 aka SM8450 platform, with SMP, CPUfreq, cluster idling, low speed buses,
 TLMM pinctrl, SMMU, regulators, clocks, power-domains, UFS storage and
 USB currently supported.
 
 SDM845 adds new support for Sony Xperia XZ2, XZ2C and XZ3. The Lenovo
 Yoga C630 gains a few audio related fixes. The PMIC's VADC channels are
 described as thermal zones. OnePlus devices gains msm-id and board-id,
 to facilitate a single firmware image for the multiple devices.
 
 On SM8350 the Sony Xperia 1 III and 5 III, as well as initial
 description of Microsoft's Surface Duo 2 are introduced.  On the
 platform side, LLCC, QUP nodes, redistributor stride and all the
 low-speed QUPs are added
 
 MSM8996 gained various regulator fixes, and adsp firmware name to
 faciliate pushing firmware to linux-firmware. Xiaomi Mi Note 2 gained
 touchkey controller definition.
 
 On SDM660 the Xiaomi Redmi Note 7 gained power and volume keys, RPM and
 regulator definitions, USB, eMMC and SD-card and a simple-framebuffer
 description.
 
 MSM8916 has the mmc aliases corrected, to stop the storage devices to
 move around and the RPM sleep stats memory is described. Support for the
 Samsung J5 2015 smartphone is introduced.
 
 SM6350 validation errors are fixed and and description of the audio,
 compute and modem remoteprocs are added.
 
 A couple new revisions of the SC7180 based Google devices are added.
 The SC7280 platform gains venus and a few fixes. The CRD development
 device is introduced, with the EC, touchscreen and touchpad.
 
 On SM8250 CPU opp-tables, for scaling L3 cache and DDR frequency based
 on CPU frequency, are added. As is TX, RX macros and SoundWire blocks
 and used to enable audio on the SM8350 MTP.
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Merge tag 'qcom-arm64-for-5.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt

Qualcomm ARM64 DeviceTree updates for v5.17

This introduces initial support for the brand new Snapdragon 8 Gen 1,
aka SM8450 platform, with SMP, CPUfreq, cluster idling, low speed buses,
TLMM pinctrl, SMMU, regulators, clocks, power-domains, UFS storage and
USB currently supported.

SDM845 adds new support for Sony Xperia XZ2, XZ2C and XZ3. The Lenovo
Yoga C630 gains a few audio related fixes. The PMIC's VADC channels are
described as thermal zones. OnePlus devices gains msm-id and board-id,
to facilitate a single firmware image for the multiple devices.

On SM8350 the Sony Xperia 1 III and 5 III, as well as initial
description of Microsoft's Surface Duo 2 are introduced.  On the
platform side, LLCC, QUP nodes, redistributor stride and all the
low-speed QUPs are added

MSM8996 gained various regulator fixes, and adsp firmware name to
faciliate pushing firmware to linux-firmware. Xiaomi Mi Note 2 gained
touchkey controller definition.

On SDM660 the Xiaomi Redmi Note 7 gained power and volume keys, RPM and
regulator definitions, USB, eMMC and SD-card and a simple-framebuffer
description.

MSM8916 has the mmc aliases corrected, to stop the storage devices to
move around and the RPM sleep stats memory is described. Support for the
Samsung J5 2015 smartphone is introduced.

SM6350 validation errors are fixed and and description of the audio,
compute and modem remoteprocs are added.

A couple new revisions of the SC7180 based Google devices are added.
The SC7280 platform gains venus and a few fixes. The CRD development
device is introduced, with the EC, touchscreen and touchpad.

On SM8250 CPU opp-tables, for scaling L3 cache and DDR frequency based
on CPU frequency, are added. As is TX, RX macros and SoundWire blocks
and used to enable audio on the SM8350 MTP.

* tag 'qcom-arm64-for-5.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (92 commits)
  arm64: dts: qcom: sm6125: Avoid using missing SM6125_VDDCX
  arm64: dts: qcom: sm8450-qrd: Enable USB nodes
  arm64: dts: qcom: sm8450: Add usb nodes
  arm64: dts: qcom: sm8450: add i2c13 and i2c14 device nodes
  arm64: dts: qcom: sm8450: add cpufreq support
  arm64: dts: qcom: sm8450: Add rpmhpd node
  arm64: dts: qcom: sm8450-qrd: enable ufs nodes
  arm64: dts: qcom: sm8450: add ufs nodes
  arm64: dts: qcom: sm8450-qrd: Add rpmh regulator nodes
  arm64: dts: qcom: Add base SM8450 QRD DTS
  arm64: dts: qcom: sm8450: add smmu nodes
  arm64: dts: qcom: sm8450: Add reserved memory nodes
  arm64: dts: qcom: sm8450: Add tlmm nodes
  arm64: dts: qcom: Add base SM8450 DTSI
  arm64: dts: qcom: ipq6018: Fix gpio-ranges property
  arm64: dts: qcom: sdm845: add QFPROM chipset specific compatible
  arm64: dts: qcom: sdm845: mtp: Add vadc channels and thermal zones
  arm64: dts: qcom: pm8998: Add ADC Thermal Monitor node
  arm64: qcom: dts: drop legacy property #stream-id-cells
  Revert "arm64: dts: qcom: sm8350: Specify clock-frequency for arch timer"
  ...

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-22 16:49:32 +01:00
Tony Lindgren
9206a3af4f clk: ti: Move dra7 clock devices out of the legacy section
I accidentally added some dra7 clock defines to the legacy section that
we want to stop using. Let's move the defines to the right location.
Note that this is just a cosmetic fix.

Cc: linux-clk@vger.kernel.org
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Tero Kristo <kristo@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-12-22 08:27:35 +02:00
Arnd Bergmann
dfdded9b0b Qualcomm DeviceTree updates for v5.17
To SDX55 this introduces the description of the IPA, PCIe PHY and PCIe
 endpoint controller, as well as enables these for the FN960 device.
 
 The SDX65 5G platform is introduced, currently with definitions
 necessary to boot to a shell.
 
 The undocumented property "input-name" is dropped throughout the dts
 files, dwc3 nodes throughout gains more specific compatibles and lastly
 building of the Dragonboard 410c DTB on ARM32 is enabled, in addition to
 its normal operation in 64-bit mode.
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Merge tag 'qcom-dts-for-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt

Qualcomm DeviceTree updates for v5.17

To SDX55 this introduces the description of the IPA, PCIe PHY and PCIe
endpoint controller, as well as enables these for the FN960 device.

The SDX65 5G platform is introduced, currently with definitions
necessary to boot to a shell.

The undocumented property "input-name" is dropped throughout the dts
files, dwc3 nodes throughout gains more specific compatibles and lastly
building of the Dragonboard 410c DTB on ARM32 is enabled, in addition to
its normal operation in 64-bit mode.

* tag 'qcom-dts-for-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  ARM: dts: qcom: Drop input-name property
  ARM: dts: qcom: sdx65: Add pincontrol node
  ARM: dts: qcom: Add SDX65 platform and MTP board support
  dt-bindings: arm: qcom: Document SDX65 platform and boards
  dt-bindings: clock: Add SDX65 GCC clock bindings
  ARM: dts: qcom: Build apq8016-sbc/DragonBoard 410c DTB on ARM32
  ARM: dts: qcom: sdx55-t55: Enable IPA
  ARM: dts: qcom: sdx55-fn980: Enable IPA
  ARM: dts: qcom: sdx55-fn980: Enable PCIe EP
  ARM: dts: qcom: sdx55: Add support for PCIe EP
  ARM: dts: qcom: sdx55-fn980: Enable PCIE0 PHY
  ARM: dts: qcom: sdx55: Add support for PCIe PHY
  ARM: dts: qcom: update USB nodes with new platform specific compatible

Link: https://lore.kernel.org/r/20211221042154.3621955-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-21 15:37:20 +01:00
Arnd Bergmann
b87cd3759d dt-bindings: Changes for v5.17-rc1
This contains a bunch of json-schema conversions for various Tegra-
 related DT bindings and additions for new SoC and board support.
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Merge tag 'tegra-for-5.17-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt

dt-bindings: Changes for v5.17-rc1

This contains a bunch of json-schema conversions for various Tegra-
related DT bindings and additions for new SoC and board support.

* tag 'tegra-for-5.17-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (30 commits)
  media: dt: bindings: tegra-vde: Document OPP and power domain
  media: dt: bindings: tegra-vde: Convert to schema
  dt-bindings: host1x: Document Memory Client resets of Host1x, GR2D and GR3D
  dt-bindings: host1x: Document OPP and power domain properties
  dt-bindings: clock: tegra-car: Document new clock sub-nodes
  dt-bindings: ARM: tegra: Document Pegatron Chagall
  dt-bindings: ARM: tegra: Document ASUS Transformers
  dt-bindings: usb: tegra-xudc: Document interconnects and iommus properties
  dt-bindings: serial: Document Tegra234 TCU
  dt-bindings: serial: tegra-tcu: Convert to json-schema
  dt-bindings: thermal: tegra186-bpmp: Convert to json-schema
  dt-bindings: firmware: tegra: Convert to json-schema
  dt-bindings: tegra: pmc: Convert to json-schema
  dt-bindings: serial: 8250: Document Tegra234 UART
  dt-bindings: mmc: tegra: Document Tegra234 SDHCI
  dt-bindings: fuse: tegra: Document Tegra234 FUSE
  dt-bindings: fuse: tegra: Convert to json-schema
  dt-bindings: rtc: tegra: Document Tegra234 RTC
  dt-bindings: rtc: tegra: Convert to json-schema
  dt-bindings: mailbox: tegra: Document Tegra234 HSP
  ...

Link: https://lore.kernel.org/r/20211217162253.1801077-3-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-20 15:37:24 +01:00
David Virag
591020a516 dt-bindings: clock: Add bindings definitions for Exynos7885 CMU
Just like on Exynos850, the clock controller driver is designed to have
separate instances for each particular CMU, so clock IDs start from 1
for each CMU in this bindings header too.

Signed-off-by: David Virag <virag.david003@gmail.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211206153124.427102-2-virag.david003@gmail.com
2021-12-19 23:37:54 +01:00
Sam Protsenko
a949f2cf1a dt-bindings: clock: Add bindings for Exynos850 sysreg clocks
System Register is used to configure system behavior, like USI protocol,
etc. SYSREG clocks should be provided to corresponding syscon nodes, to
make it possible to modify SYSREG registers.

While at it, add also missing PMU and GPIO clocks, which looks necessary
and might be needed for corresponding Exynos850 features soon.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Link: https://lore.kernel.org/r/20211217161549.24836-2-semen.protsenko@linaro.org
2021-12-19 23:25:28 +01:00
Arnd Bergmann
527c71547d Renesas ARM DT updates for v5.17 (take two)
- Initial support for the R-Car S4-8 SoC on the Spider CPU and
     BreakOut boards,
   - MIPI DSI display support for the R-Car V3u SoC and the Falcon board
     stack,
   - Thermal and GPU support for the RZ/G2L SoC and the RZ/G2L SMARC EVK
     development board,
   - Miscellaneous fixes and improvements.
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Merge tag 'renesas-arm-dt-for-v5.17-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt

Renesas ARM DT updates for v5.17 (take two)

  - Initial support for the R-Car S4-8 SoC on the Spider CPU and
    BreakOut boards,
  - MIPI DSI display support for the R-Car V3u SoC and the Falcon board
    stack,
  - Thermal and GPU support for the RZ/G2L SoC and the RZ/G2L SMARC EVK
    development board,
  - Miscellaneous fixes and improvements.

* tag 'renesas-arm-dt-for-v5.17-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  arm64: dts: renesas: Fix pin controller node names
  arm64: dts: renesas: rzg2l-smarc-som: Add vdd core regulator
  arm64: dts: renesas: r9a07g044: Add Mali-G31 GPU node
  arm64: dts: renesas: r9a07g044: Create thermal zone to support IPA
  arm64: dts: renesas: r9a07g044: Add TSU node
  arm64: dts: renesas: falcon-cpu: Add DSI display output
  arm64: dts: renesas: r8a779a0: Add DSI encoders
  arm64: dts: renesas: Add Renesas Spider boards support
  arm64: dts: renesas: Add Renesas R8A779F0 SoC support
  dt-bindings: clock: Add r8a779f0 CPG Core Clock Definitions
  dt-bindings: power: Add r8a779f0 SYSC power domain definitions
  arm64: dts: renesas: Fix thermal bindings

Link: https://lore.kernel.org/r/cover.1639736718.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-17 15:53:30 +01:00
Marijn Suijten
6d24d9546d dt-bindings: clk: qcom: Document MSM8976 Global Clock Controller
Document the required properties and firmware clocks for gcc-msm8976 to
operate nominally, and add header definitions for referencing the clocks
from firmware.

Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211208091036.132334-2-marijn.suijten@somainline.org
2021-12-16 13:17:23 -06:00
Bjorn Andersson
fe5cf1c34f Merge tag '20211207114003.100693-2-vkoul@kernel.org' into clk-for-5.17
v5.16-rc1 + 20211207114003.100693-2-vkoul@kernel.org

The immutable branch contains the DT binding and clock defines as need
for the Qualcomm SM8450 global clock controller driver.
2021-12-16 13:17:22 -06:00
Geert Uytterhoeven
38bb8a7264 dt-bindings: clock: starfive: Add JH7100 clock definitions
Add all clock outputs for the StarFive JH7100 clock generator.

Based on work by Ahmad Fatoum for Barebox, with "JH7100_" prefixes added
to all definitions.

Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
2021-12-16 17:22:35 +01:00
Thierry Reding
c3859c1436 dt-bindings: memory: tegra: Add Tegra234 support
Document the variant of the memory controller and external memory
controllers found on Tegra234 and add some memory client and SMMU
stream ID definitions for use in device tree files.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16 16:43:49 +01:00
Mikko Perttunen
fc5e0e3762 dt-bindings: Update headers for Tegra234
Add a few more clocks that will be used in follow-up patches to enable
more functionality on Tegra234.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16 16:43:49 +01:00
Vinod Koul
72a0ca203c dt-bindings: clock: Add SM8450 GCC clock bindings
Add device tree bindings for global clock controller on SM8450 SoCs.

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211207114003.100693-2-vkoul@kernel.org
2021-12-14 21:19:13 -06:00
Vamsi krishna Lanka
8f8ef3860d dt-bindings: clock: Add SDX65 GCC clock bindings
Add device tree bindings for global clock controller on SDX65 SOCs.

Signed-off-by: Vamsi Krishna Lanka <quic_vamslank@quicinc.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/e15509b2b7c9b600ab38c5269d4fac609c077b5b.1638861860.git.quic_vamslank@quicinc.com
2021-12-14 20:53:19 -06:00
Horatiu Vultur
51d0a37dde dt-bindings: clock: lan966x: Extend includes with clock gates
On lan966x it is allow to control the clock to some peripherals like
USB. So extend the include file with these clocks.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20211103085102.1656081-4-horatiu.vultur@microchip.com
2021-12-08 11:19:20 +01:00
Kavyasree Kotagiri
265d27caf9 dt-bindings: clock: lan966x: Add binding includes for lan966x SoC clock IDs
LAN966X supports 14 clock outputs for its peripherals.
This include file is introduced to use identifiers for clocks.

Signed-off-by: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20211103061935.25677-2-kavyasree.kotagiri@microchip.com
2021-12-08 10:57:25 +01:00
Yoshihiro Shimoda
81c1655823 dt-bindings: clock: Add r8a779f0 CPG Core Clock Definitions
Add all Clock Pulse Generator Core Clock Outputs for the Renesas
R-Car S4-8 (R8A779F0) SoC.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20211201073308.1003945-4-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-12-07 16:29:25 +01:00
Samuel Holland
71b597ef5d
dt-bindings: clock: sunxi: Export CLK_DRAM for devfreq
The MBUS node needs to reference the CLK_DRAM clock, as the MBUS
hardware implements memory dynamic frequency scaling using this clock.

Export this clock for SoCs which will be getting a devfreq driver.

Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20211118031841.42315-2-samuel@sholland.org
2021-11-23 11:29:35 +01:00
Samuel Holland
c962f10f39
dt-bindings: clk: Add compatibles for D1 CCUs
The D1 has a CCU and a R_CCU (PRCM CCU) like most other sunxi SoCs, with
3 and 4 clock inputs, respectively. Add the compatibles and bindings.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20211119043545.4010-2-samuel@sholland.org
2021-11-23 10:29:05 +01:00
Hui Wang
6deb3fb22d clk: imx8mp: Remove IPG_AUDIO_ROOT from imx8mp-clock.h
Since the commit b24e288d50 ("clk: imx: Remove the audio ipg clock
from imx8mp") removes the non-existing IPG_AUDIO_ROOT from the
clk-imx8mp.c, and this definition is not used by anywhere, let us
removed it in the imx8mp-clock.h as well.

Signed-off-by: Hui Wang <hui.wang@canonical.com>
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Link: https://lore.kernel.org/r/20211109125657.63485-1-hui.wang@canonical.com
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
2021-11-22 17:06:48 +02:00
Sam Protsenko
c2afeb79fd dt-bindings: clock: Add bindings for Exynos850 CMU_CMGP
CMU_CMGP generates USI and ADC clocks for BLK_ALIVE. In particular USI
clocks are needed for HSI2C_3 and HSI2C_4 instances.

Add clock indices and bindings documentation for CMU_CMGP domain.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Link: https://lore.kernel.org/r/20211121232741.6967-4-semen.protsenko@linaro.org
2021-11-22 10:13:18 +01:00
Sam Protsenko
16e0c2474f dt-bindings: clock: Add bindings for Exynos850 CMU_APM
CMU_APM generates clocks for APM IP-core (Active Power Management). In
particular it generates RTC clocks, which are needed to enable rtc-s3c
driver on Exynos850 SoC.

Add clock indices and binding documentation for CMU_APM.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Link: https://lore.kernel.org/r/20211121232741.6967-2-semen.protsenko@linaro.org
2021-11-22 10:13:18 +01:00
Marek Szyprowski
d68f50e6ad dt-bindings: clock: samsung: add IDs for some core clocks
Add IDs for some core clocks referenced during the boot process.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Link: https://lore.kernel.org/r/20211018125456.8292-1-m.szyprowski@samsung.com
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2021-11-19 19:32:26 +01:00
Paul Cercueil
c4a11bf423 dt-bindings: Rename Ingenic CGU headers to ingenic,*.h
Tidy up a bit the tree, by prefixing all include/dt-bindings/clock/ files
related to Ingenic SoCs with 'ingenic,'.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211016133322.40771-1-paul@crapouillou.net
2021-11-11 22:27:14 -06:00