forked from Minki/linux
dt-bindings: clock: Add bindings for Exynos850 CMU_CMGP
CMU_CMGP generates USI and ADC clocks for BLK_ALIVE. In particular USI clocks are needed for HSI2C_3 and HSI2C_4 instances. Add clock indices and bindings documentation for CMU_CMGP domain. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Acked-by: Chanwoo Choi <cw00.choi@samsung.com> Link: https://lore.kernel.org/r/20211121232741.6967-4-semen.protsenko@linaro.org
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@ -33,6 +33,7 @@ properties:
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enum:
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- samsung,exynos850-cmu-top
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- samsung,exynos850-cmu-apm
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- samsung,exynos850-cmu-cmgp
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- samsung,exynos850-cmu-core
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- samsung,exynos850-cmu-dpu
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- samsung,exynos850-cmu-hsi
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@ -87,6 +88,24 @@ allOf:
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- const: oscclk
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- const: dout_clkcmu_apm_bus
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- if:
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properties:
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compatible:
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contains:
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const: samsung,exynos850-cmu-cmgp
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then:
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properties:
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clocks:
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items:
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- description: External reference clock (26 MHz)
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- description: CMU_CMGP bus clock (from CMU_APM)
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clock-names:
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items:
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- const: oscclk
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- const: gout_clkcmu_cmgp_bus
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- if:
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properties:
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compatible:
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@ -84,6 +84,23 @@
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#define CLK_GOUT_SPEEDY_PCLK 21
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#define APM_NR_CLK 22
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/* CMU_CMGP */
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#define CLK_RCO_CMGP 1
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#define CLK_MOUT_CMGP_ADC 2
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#define CLK_MOUT_CMGP_USI0 3
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#define CLK_MOUT_CMGP_USI1 4
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#define CLK_DOUT_CMGP_ADC 5
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#define CLK_DOUT_CMGP_USI0 6
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#define CLK_DOUT_CMGP_USI1 7
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#define CLK_GOUT_CMGP_ADC_S0_PCLK 8
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#define CLK_GOUT_CMGP_ADC_S1_PCLK 9
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#define CLK_GOUT_CMGP_GPIO_PCLK 10
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#define CLK_GOUT_CMGP_USI0_IPCLK 11
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#define CLK_GOUT_CMGP_USI0_PCLK 12
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#define CLK_GOUT_CMGP_USI1_IPCLK 13
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#define CLK_GOUT_CMGP_USI1_PCLK 14
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#define CMGP_NR_CLK 15
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/* CMU_HSI */
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#define CLK_MOUT_HSI_BUS_USER 1
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#define CLK_MOUT_HSI_MMC_CARD_USER 2
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