2008-07-22 19:27:11 +00:00
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/*
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2007-10-10 15:16:19 +00:00
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* Kernel-based Virtual Machine driver for Linux
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*
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* This header defines architecture specific interfaces, x86 version
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*
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* This work is licensed under the terms of the GNU GPL, version 2. See
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* the COPYING file in the top-level directory.
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*
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*/
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2008-10-23 05:26:29 +00:00
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#ifndef _ASM_X86_KVM_HOST_H
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#define _ASM_X86_KVM_HOST_H
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2007-10-10 15:16:19 +00:00
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2007-10-20 07:34:38 +00:00
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#include <linux/types.h>
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#include <linux/mm.h>
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2008-07-25 14:24:52 +00:00
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#include <linux/mmu_notifier.h>
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2009-06-17 12:22:14 +00:00
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#include <linux/tracepoint.h>
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2010-06-30 04:25:15 +00:00
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#include <linux/cpumask.h>
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2011-11-10 12:57:22 +00:00
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#include <linux/irq_work.h>
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2007-10-20 07:34:38 +00:00
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#include <linux/kvm.h>
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#include <linux/kvm_para.h>
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2007-12-16 09:02:48 +00:00
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#include <linux/kvm_types.h>
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2011-11-10 12:57:22 +00:00
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#include <linux/perf_event.h>
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2012-11-28 01:29:01 +00:00
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#include <linux/pvclock_gtod.h>
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#include <linux/clocksource.h>
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2007-10-20 07:34:38 +00:00
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2008-06-03 14:17:31 +00:00
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#include <asm/pvclock-abi.h>
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2007-12-03 21:30:25 +00:00
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#include <asm/desc.h>
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2008-10-09 08:01:54 +00:00
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#include <asm/mtrr.h>
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2008-11-25 19:17:02 +00:00
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#include <asm/msr-index.h>
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2012-04-20 20:41:59 +00:00
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#include <asm/asm.h>
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2007-12-03 21:30:25 +00:00
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2013-04-28 01:31:04 +00:00
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#define KVM_MAX_VCPUS 255
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2012-02-03 14:28:31 +00:00
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#define KVM_SOFT_MAX_VCPUS 160
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2014-11-06 15:52:47 +00:00
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#define KVM_USER_MEM_SLOTS 509
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2012-12-10 17:33:15 +00:00
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/* memory slots that are not exposed to userspace */
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#define KVM_PRIVATE_MEM_SLOTS 3
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2012-12-10 17:33:09 +00:00
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#define KVM_MEM_SLOTS_NUM (KVM_USER_MEM_SLOTS + KVM_PRIVATE_MEM_SLOTS)
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2011-11-24 09:37:48 +00:00
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2008-03-21 10:38:23 +00:00
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#define KVM_PIO_PAGE_OFFSET 1
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2008-05-30 14:05:55 +00:00
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#define KVM_COALESCED_MMIO_PAGE_OFFSET 2
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2008-03-21 10:38:23 +00:00
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2013-04-15 08:42:33 +00:00
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#define KVM_IRQCHIP_NUM_PINS KVM_IOAPIC_NUM_PINS
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2011-04-04 10:39:28 +00:00
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#define CR0_RESERVED_BITS \
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(~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
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| X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
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| X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
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2014-04-18 00:35:09 +00:00
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#define CR3_L_MODE_RESERVED_BITS 0xFFFFFF0000000000ULL
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2015-01-15 08:44:56 +00:00
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#define CR3_PCID_INVD BIT_64(63)
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2011-04-04 10:39:28 +00:00
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#define CR4_RESERVED_BITS \
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(~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
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| X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
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2012-07-02 01:18:48 +00:00
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| X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \
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2013-04-27 23:37:47 +00:00
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| X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \
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2014-04-01 09:46:33 +00:00
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| X86_CR4_OSXMMEXCPT | X86_CR4_VMXE | X86_CR4_SMAP))
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2011-04-04 10:39:28 +00:00
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#define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
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2007-11-19 06:33:37 +00:00
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#define INVALID_PAGE (~(hpa_t)0)
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2010-07-03 08:02:42 +00:00
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#define VALID_PAGE(x) ((x) != INVALID_PAGE)
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2007-11-19 06:33:37 +00:00
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#define UNMAPPED_GVA (~(gpa_t)0)
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2009-06-19 13:16:23 +00:00
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/* KVM Hugepage definitions for x86 */
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2009-07-27 14:30:47 +00:00
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#define KVM_NR_PAGE_SIZES 3
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2010-07-01 14:00:11 +00:00
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#define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9)
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#define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x))
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2009-06-19 13:16:23 +00:00
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#define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x))
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#define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1))
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#define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE)
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2008-02-23 14:44:30 +00:00
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2013-10-02 21:22:28 +00:00
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static inline gfn_t gfn_to_index(gfn_t gfn, gfn_t base_gfn, int level)
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{
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/* KVM_HPAGE_GFN_SHIFT(PT_PAGE_TABLE_LEVEL) must be 0. */
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return (gfn >> KVM_HPAGE_GFN_SHIFT(level)) -
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(base_gfn >> KVM_HPAGE_GFN_SHIFT(level));
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}
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2007-12-14 01:41:22 +00:00
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#define KVM_PERMILLE_MMU_PAGES 20
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#define KVM_MIN_ALLOC_MMU_PAGES 64
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2008-01-07 11:20:25 +00:00
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#define KVM_MMU_HASH_SHIFT 10
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#define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT)
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2007-12-14 01:41:22 +00:00
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#define KVM_MIN_FREE_MMU_PAGES 5
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#define KVM_REFILL_PAGES 25
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2010-12-01 11:17:44 +00:00
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#define KVM_MAX_CPUID_ENTRIES 80
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2008-10-09 08:01:54 +00:00
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#define KVM_NR_FIXED_MTRR_REGION 88
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2014-08-18 14:39:48 +00:00
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#define KVM_NR_VAR_MTRR 8
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2007-12-14 01:41:22 +00:00
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2010-10-14 09:22:46 +00:00
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#define ASYNC_PF_PER_VCPU 64
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2008-06-27 17:58:02 +00:00
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enum kvm_reg {
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2007-11-19 06:56:05 +00:00
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VCPU_REGS_RAX = 0,
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VCPU_REGS_RCX = 1,
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VCPU_REGS_RDX = 2,
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VCPU_REGS_RBX = 3,
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VCPU_REGS_RSP = 4,
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VCPU_REGS_RBP = 5,
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VCPU_REGS_RSI = 6,
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VCPU_REGS_RDI = 7,
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#ifdef CONFIG_X86_64
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VCPU_REGS_R8 = 8,
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VCPU_REGS_R9 = 9,
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VCPU_REGS_R10 = 10,
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VCPU_REGS_R11 = 11,
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VCPU_REGS_R12 = 12,
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VCPU_REGS_R13 = 13,
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VCPU_REGS_R14 = 14,
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VCPU_REGS_R15 = 15,
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#endif
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2008-06-27 17:58:02 +00:00
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VCPU_REGS_RIP,
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2007-11-19 06:56:05 +00:00
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NR_VCPU_REGS
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};
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2009-05-31 19:58:47 +00:00
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enum kvm_reg_ex {
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VCPU_EXREG_PDPTR = NR_VCPU_REGS,
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2010-12-05 16:56:11 +00:00
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VCPU_EXREG_CR3,
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2011-03-07 10:51:22 +00:00
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VCPU_EXREG_RFLAGS,
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2011-04-27 16:42:18 +00:00
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VCPU_EXREG_SEGMENTS,
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2009-05-31 19:58:47 +00:00
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};
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2007-11-19 06:56:05 +00:00
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enum {
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2008-05-27 13:26:01 +00:00
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VCPU_SREG_ES,
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2007-11-19 06:56:05 +00:00
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VCPU_SREG_CS,
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2008-05-27 13:26:01 +00:00
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VCPU_SREG_SS,
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2007-11-19 06:56:05 +00:00
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VCPU_SREG_DS,
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VCPU_SREG_FS,
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VCPU_SREG_GS,
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VCPU_SREG_TR,
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VCPU_SREG_LDTR,
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};
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2009-08-12 12:04:37 +00:00
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#include <asm/kvm_emulate.h>
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2007-11-19 06:56:05 +00:00
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2007-12-14 01:41:22 +00:00
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#define KVM_NR_MEM_OBJS 40
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2008-12-15 12:52:10 +00:00
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#define KVM_NR_DB_REGS 4
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#define DR6_BD (1 << 13)
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#define DR6_BS (1 << 14)
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2014-07-15 14:37:46 +00:00
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#define DR6_RTM (1 << 16)
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#define DR6_FIXED_1 0xfffe0ff0
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#define DR6_INIT 0xffff0ff0
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#define DR6_VOLATILE 0x0001e00f
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2008-12-15 12:52:10 +00:00
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#define DR7_BP_EN_MASK 0x000000ff
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#define DR7_GE (1 << 9)
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#define DR7_GD (1 << 13)
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#define DR7_FIXED_1 0x00000400
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2014-07-15 14:37:46 +00:00
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#define DR7_VOLATILE 0xffff2bff
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2008-12-15 12:52:10 +00:00
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2014-12-25 00:52:16 +00:00
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#define PFERR_PRESENT_BIT 0
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#define PFERR_WRITE_BIT 1
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#define PFERR_USER_BIT 2
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#define PFERR_RSVD_BIT 3
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#define PFERR_FETCH_BIT 4
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#define PFERR_PRESENT_MASK (1U << PFERR_PRESENT_BIT)
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#define PFERR_WRITE_MASK (1U << PFERR_WRITE_BIT)
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#define PFERR_USER_MASK (1U << PFERR_USER_BIT)
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#define PFERR_RSVD_MASK (1U << PFERR_RSVD_BIT)
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#define PFERR_FETCH_MASK (1U << PFERR_FETCH_BIT)
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2012-04-19 11:06:29 +00:00
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/* apic attention bits */
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#define KVM_APIC_CHECK_VAPIC 0
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2012-06-24 16:25:07 +00:00
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/*
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* The following bit is set with PV-EOI, unset on EOI.
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* We detect PV-EOI changes by guest by comparing
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* this bit with PV-EOI in guest memory.
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* See the implementation in apic_update_pv_eoi.
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*/
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#define KVM_APIC_PV_EOI_PENDING 1
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2012-04-19 11:06:29 +00:00
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2007-12-14 01:41:22 +00:00
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/*
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* We don't want allocation failures within the mmu code, so we preallocate
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* enough memory for a single page fault in a cache.
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*/
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struct kvm_mmu_memory_cache {
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int nobjs;
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void *objects[KVM_NR_MEM_OBJS];
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};
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union kvm_mmu_page_role {
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unsigned word;
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struct {
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2008-03-23 08:02:34 +00:00
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unsigned level:4;
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2010-04-14 16:20:03 +00:00
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unsigned cr4_pae:1;
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2008-03-23 08:02:34 +00:00
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unsigned quadrant:2;
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2009-01-11 11:02:10 +00:00
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unsigned direct:1;
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2008-03-23 08:02:34 +00:00
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unsigned access:3;
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2008-02-20 19:47:24 +00:00
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unsigned invalid:1;
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2009-03-31 08:31:54 +00:00
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unsigned nxe:1;
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2010-05-12 08:48:18 +00:00
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unsigned cr0_wp:1;
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2011-06-06 13:11:54 +00:00
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unsigned smep_andnot_wp:1;
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2015-05-11 14:55:21 +00:00
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unsigned smap_andnot_wp:1;
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2015-05-18 13:03:39 +00:00
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unsigned :8;
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/*
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* This is left at the top of the word so that
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* kvm_memslots_for_spte_role can extract it with a
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* simple shift. While there is room, give it a whole
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* byte so it is also faster to load it from memory.
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*/
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unsigned smm:8;
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2007-12-14 01:41:22 +00:00
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};
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};
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struct kvm_mmu_page {
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struct list_head link;
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struct hlist_node hash_link;
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/*
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* The following two entries are used to key the shadow page in the
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* hash table.
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*/
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gfn_t gfn;
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union kvm_mmu_page_role role;
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u64 *spt;
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/* hold the gfn of each spte inside spt */
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gfn_t *gfns;
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2008-09-23 16:18:39 +00:00
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bool unsync;
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2010-04-16 13:27:54 +00:00
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int root_count; /* Currently serving as active root */
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2008-12-02 00:32:02 +00:00
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unsigned int unsync_children;
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2011-05-15 15:27:08 +00:00
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unsigned long parent_ptes; /* Reverse mapping for parent_pte */
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2013-06-19 09:09:24 +00:00
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/* The page is obsolete if mmu_valid_gen != kvm->arch.mmu_valid_gen. */
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2013-05-31 00:36:22 +00:00
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unsigned long mmu_valid_gen;
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2013-06-19 09:09:24 +00:00
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2008-09-23 16:18:40 +00:00
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DECLARE_BITMAP(unsync_child_bitmap, 512);
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2011-07-11 19:32:13 +00:00
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#ifdef CONFIG_X86_32
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2013-06-19 09:09:20 +00:00
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/*
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* Used out of the mmu-lock to avoid reading spte values while an
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* update is in progress; see the comments in __get_spte_lockless().
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*/
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2011-07-11 19:32:13 +00:00
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int clear_spte_count;
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#endif
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2013-06-19 09:09:21 +00:00
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/* Number of writes since the last time traversal visited this page. */
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KVM: MMU: improve write flooding detected
Detecting write-flooding does not work well, when we handle page written, if
the last speculative spte is not accessed, we treat the page is
write-flooding, however, we can speculative spte on many path, such as pte
prefetch, page synced, that means the last speculative spte may be not point
to the written page and the written page can be accessed via other sptes, so
depends on the Accessed bit of the last speculative spte is not enough
Instead of detected page accessed, we can detect whether the spte is accessed
after it is written, if the spte is not accessed but it is written frequently,
we treat is not a page table or it not used for a long time
Signed-off-by: Xiao Guangrong <xiaoguangrong@cn.fujitsu.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
2011-09-22 08:58:36 +00:00
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int write_flooding_count;
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2007-12-14 01:41:22 +00:00
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};
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2009-01-04 10:39:07 +00:00
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struct kvm_pio_request {
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unsigned long count;
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int in;
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int port;
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int size;
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};
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2007-12-14 01:41:22 +00:00
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/*
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* x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level
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* 32-bit). The kvm_mmu structure abstracts the details of the current mmu
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* mode.
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*/
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struct kvm_mmu {
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2010-09-10 15:30:40 +00:00
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void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long root);
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2010-09-10 15:30:42 +00:00
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|
|
unsigned long (*get_cr3)(struct kvm_vcpu *vcpu);
|
2011-07-28 08:36:17 +00:00
|
|
|
u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index);
|
2010-12-07 02:48:06 +00:00
|
|
|
int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err,
|
|
|
|
bool prefault);
|
2010-11-29 14:12:30 +00:00
|
|
|
void (*inject_page_fault)(struct kvm_vcpu *vcpu,
|
|
|
|
struct x86_exception *fault);
|
2010-02-10 12:21:32 +00:00
|
|
|
gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva, u32 access,
|
2010-11-22 15:53:26 +00:00
|
|
|
struct x86_exception *exception);
|
2014-09-02 11:23:06 +00:00
|
|
|
gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
|
|
|
|
struct x86_exception *exception);
|
2008-09-23 16:18:33 +00:00
|
|
|
int (*sync_page)(struct kvm_vcpu *vcpu,
|
2010-11-19 09:04:03 +00:00
|
|
|
struct kvm_mmu_page *sp);
|
2008-09-23 16:18:35 +00:00
|
|
|
void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva);
|
2011-03-09 07:43:51 +00:00
|
|
|
void (*update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
|
2011-03-28 02:29:27 +00:00
|
|
|
u64 *spte, const void *pte);
|
2007-12-14 01:41:22 +00:00
|
|
|
hpa_t root_hpa;
|
|
|
|
int root_level;
|
|
|
|
int shadow_root_level;
|
2008-12-21 17:20:09 +00:00
|
|
|
union kvm_mmu_page_role base_role;
|
2010-09-10 15:30:39 +00:00
|
|
|
bool direct_map;
|
2007-12-14 01:41:22 +00:00
|
|
|
|
KVM: MMU: Optimize pte permission checks
walk_addr_generic() permission checks are a maze of branchy code, which is
performed four times per lookup. It depends on the type of access, efer.nxe,
cr0.wp, cr4.smep, and in the near future, cr4.smap.
Optimize this away by precalculating all variants and storing them in a
bitmap. The bitmap is recalculated when rarely-changing variables change
(cr0, cr4) and is indexed by the often-changing variables (page fault error
code, pte access permissions).
The permission check is moved to the end of the loop, otherwise an SMEP
fault could be reported as a false positive, when PDE.U=1 but PTE.U=0.
Noted by Xiao Guangrong.
The result is short, branch-free code.
Reviewed-by: Xiao Guangrong <xiaoguangrong@linux.vnet.ibm.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
2012-09-12 11:52:00 +00:00
|
|
|
/*
|
|
|
|
* Bitmap; bit set = permission fault
|
|
|
|
* Byte index: page fault error code [4:1]
|
|
|
|
* Bit index: pte permissions in ACC_* format
|
|
|
|
*/
|
|
|
|
u8 permissions[16];
|
|
|
|
|
2007-12-14 01:41:22 +00:00
|
|
|
u64 *pae_root;
|
2010-09-10 15:31:00 +00:00
|
|
|
u64 *lm_root;
|
2009-03-30 08:21:08 +00:00
|
|
|
u64 rsvd_bits_mask[2][4];
|
2013-08-06 09:00:32 +00:00
|
|
|
u64 bad_mt_xwr;
|
2010-09-10 15:30:57 +00:00
|
|
|
|
2012-09-12 17:46:56 +00:00
|
|
|
/*
|
|
|
|
* Bitmap: bit set = last pte in walk
|
|
|
|
* index[0:1]: level (zero-based)
|
|
|
|
* index[2]: pte.ps
|
|
|
|
*/
|
|
|
|
u8 last_pte_bitmap;
|
|
|
|
|
2010-09-10 15:31:01 +00:00
|
|
|
bool nx;
|
|
|
|
|
2010-09-10 15:30:57 +00:00
|
|
|
u64 pdptrs[4]; /* pae */
|
2007-12-14 01:41:22 +00:00
|
|
|
};
|
|
|
|
|
2011-11-10 12:57:22 +00:00
|
|
|
enum pmc_type {
|
|
|
|
KVM_PMC_GP = 0,
|
|
|
|
KVM_PMC_FIXED,
|
|
|
|
};
|
|
|
|
|
|
|
|
struct kvm_pmc {
|
|
|
|
enum pmc_type type;
|
|
|
|
u8 idx;
|
|
|
|
u64 counter;
|
|
|
|
u64 eventsel;
|
|
|
|
struct perf_event *perf_event;
|
|
|
|
struct kvm_vcpu *vcpu;
|
|
|
|
};
|
|
|
|
|
|
|
|
struct kvm_pmu {
|
|
|
|
unsigned nr_arch_gp_counters;
|
|
|
|
unsigned nr_arch_fixed_counters;
|
|
|
|
unsigned available_event_types;
|
|
|
|
u64 fixed_ctr_ctrl;
|
|
|
|
u64 global_ctrl;
|
|
|
|
u64 global_status;
|
|
|
|
u64 global_ovf_ctrl;
|
|
|
|
u64 counter_bitmask[2];
|
|
|
|
u64 global_ctrl_mask;
|
2013-07-18 22:57:02 +00:00
|
|
|
u64 reserved_bits;
|
2011-11-10 12:57:22 +00:00
|
|
|
u8 version;
|
2012-06-20 18:46:33 +00:00
|
|
|
struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC];
|
|
|
|
struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED];
|
2011-11-10 12:57:22 +00:00
|
|
|
struct irq_work irq_work;
|
|
|
|
u64 reprogram_pmi;
|
|
|
|
};
|
|
|
|
|
2014-02-21 08:55:56 +00:00
|
|
|
enum {
|
|
|
|
KVM_DEBUGREG_BP_ENABLED = 1,
|
2014-02-21 09:17:24 +00:00
|
|
|
KVM_DEBUGREG_WONT_EXIT = 2,
|
2015-04-02 00:10:37 +00:00
|
|
|
KVM_DEBUGREG_RELOAD = 4,
|
2014-02-21 08:55:56 +00:00
|
|
|
};
|
|
|
|
|
2015-06-15 08:55:24 +00:00
|
|
|
struct kvm_mtrr {
|
|
|
|
struct mtrr_var_range var_ranges[MTRR_MAX_VAR_RANGES];
|
|
|
|
mtrr_type fixed_ranges[KVM_NR_FIXED_MTRR_REGION];
|
|
|
|
unsigned char enabled;
|
|
|
|
mtrr_type def_type;
|
|
|
|
};
|
|
|
|
|
2007-12-13 15:50:52 +00:00
|
|
|
struct kvm_vcpu_arch {
|
2008-06-27 17:58:02 +00:00
|
|
|
/*
|
|
|
|
* rip and regs accesses must go through
|
|
|
|
* kvm_{register,rip}_{read,write} functions.
|
|
|
|
*/
|
|
|
|
unsigned long regs[NR_VCPU_REGS];
|
|
|
|
u32 regs_avail;
|
|
|
|
u32 regs_dirty;
|
2007-10-20 07:34:38 +00:00
|
|
|
|
|
|
|
unsigned long cr0;
|
2009-12-29 16:43:06 +00:00
|
|
|
unsigned long cr0_guest_owned_bits;
|
2007-10-20 07:34:38 +00:00
|
|
|
unsigned long cr2;
|
|
|
|
unsigned long cr3;
|
|
|
|
unsigned long cr4;
|
2009-12-07 10:16:48 +00:00
|
|
|
unsigned long cr4_guest_owned_bits;
|
2007-10-20 07:34:38 +00:00
|
|
|
unsigned long cr8;
|
2008-11-25 19:17:04 +00:00
|
|
|
u32 hflags;
|
2010-01-21 13:31:50 +00:00
|
|
|
u64 efer;
|
2007-10-20 07:34:38 +00:00
|
|
|
u64 apic_base;
|
|
|
|
struct kvm_lapic *apic; /* kernel irqchip context */
|
2012-04-19 11:06:29 +00:00
|
|
|
unsigned long apic_attention;
|
2009-03-05 14:34:59 +00:00
|
|
|
int32_t apic_arb_prio;
|
2007-10-20 07:34:38 +00:00
|
|
|
int mp_state;
|
|
|
|
u64 ia32_misc_enable_msr;
|
2015-05-07 09:36:11 +00:00
|
|
|
u64 smbase;
|
2007-10-22 14:50:39 +00:00
|
|
|
bool tpr_access_reporting;
|
2014-12-02 11:14:59 +00:00
|
|
|
u64 ia32_xss;
|
2007-10-20 07:34:38 +00:00
|
|
|
|
2010-09-10 15:30:49 +00:00
|
|
|
/*
|
|
|
|
* Paging state of the vcpu
|
|
|
|
*
|
|
|
|
* If the vcpu runs in guest mode with two level paging this still saves
|
|
|
|
* the paging mode of the l1 guest. This context is always used to
|
|
|
|
* handle faults.
|
|
|
|
*/
|
2007-10-20 07:34:38 +00:00
|
|
|
struct kvm_mmu mmu;
|
2010-09-10 15:30:46 +00:00
|
|
|
|
2010-09-10 15:30:50 +00:00
|
|
|
/*
|
|
|
|
* Paging state of an L2 guest (used for nested npt)
|
|
|
|
*
|
|
|
|
* This context will save all necessary information to walk page tables
|
|
|
|
* of the an L2 guest. This context is only initialized for page table
|
|
|
|
* walking and not for faulting since we never handle l2 page faults on
|
|
|
|
* the host.
|
|
|
|
*/
|
|
|
|
struct kvm_mmu nested_mmu;
|
|
|
|
|
2010-09-10 15:30:49 +00:00
|
|
|
/*
|
|
|
|
* Pointer to the mmu context currently used for
|
|
|
|
* gva_to_gpa translations.
|
|
|
|
*/
|
|
|
|
struct kvm_mmu *walk_mmu;
|
|
|
|
|
2011-05-15 15:26:20 +00:00
|
|
|
struct kvm_mmu_memory_cache mmu_pte_list_desc_cache;
|
2007-10-20 07:34:38 +00:00
|
|
|
struct kvm_mmu_memory_cache mmu_page_cache;
|
|
|
|
struct kvm_mmu_memory_cache mmu_page_header_cache;
|
|
|
|
|
2010-05-17 09:08:28 +00:00
|
|
|
struct fpu guest_fpu;
|
2015-05-20 20:41:25 +00:00
|
|
|
bool eager_fpu;
|
2010-06-10 03:27:12 +00:00
|
|
|
u64 xcr0;
|
2013-10-02 14:06:15 +00:00
|
|
|
u64 guest_supported_xcr0;
|
2013-10-02 14:06:16 +00:00
|
|
|
u32 guest_xstate_size;
|
2007-10-20 07:34:38 +00:00
|
|
|
|
|
|
|
struct kvm_pio_request pio;
|
|
|
|
void *pio_data;
|
|
|
|
|
2009-05-11 10:35:50 +00:00
|
|
|
u8 event_exit_inst_len;
|
|
|
|
|
2007-11-25 11:41:11 +00:00
|
|
|
struct kvm_queued_exception {
|
|
|
|
bool pending;
|
|
|
|
bool has_error_code;
|
2010-04-22 10:33:13 +00:00
|
|
|
bool reinject;
|
2007-11-25 11:41:11 +00:00
|
|
|
u8 nr;
|
|
|
|
u32 error_code;
|
|
|
|
} exception;
|
|
|
|
|
2008-07-03 12:17:01 +00:00
|
|
|
struct kvm_queued_interrupt {
|
|
|
|
bool pending;
|
2009-05-11 10:35:50 +00:00
|
|
|
bool soft;
|
2008-07-03 12:17:01 +00:00
|
|
|
u8 nr;
|
|
|
|
} interrupt;
|
|
|
|
|
2007-10-20 07:34:38 +00:00
|
|
|
int halt_request; /* real mode on Intel only */
|
|
|
|
|
|
|
|
int cpuid_nent;
|
2007-11-21 15:10:04 +00:00
|
|
|
struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES];
|
2015-03-29 20:56:12 +00:00
|
|
|
|
|
|
|
int maxphyaddr;
|
|
|
|
|
2007-10-20 07:34:38 +00:00
|
|
|
/* emulate context */
|
|
|
|
|
|
|
|
struct x86_emulate_ctxt emulate_ctxt;
|
2011-03-31 10:06:41 +00:00
|
|
|
bool emulate_regs_need_sync_to_vcpu;
|
|
|
|
bool emulate_regs_need_sync_from_vcpu;
|
2012-09-03 12:24:26 +00:00
|
|
|
int (*complete_userspace_io)(struct kvm_vcpu *vcpu);
|
2008-02-15 19:52:47 +00:00
|
|
|
|
|
|
|
gpa_t time;
|
2008-06-03 14:17:31 +00:00
|
|
|
struct pvclock_vcpu_time_info hv_clock;
|
2010-08-20 08:07:23 +00:00
|
|
|
unsigned int hw_tsc_khz;
|
2013-02-20 22:48:10 +00:00
|
|
|
struct gfn_to_hva_cache pv_time;
|
|
|
|
bool pv_time_enabled;
|
2012-08-03 18:57:49 +00:00
|
|
|
/* set guest stopped flag in pvclock flags field */
|
|
|
|
bool pvclock_set_guest_stopped_request;
|
2011-07-11 19:28:14 +00:00
|
|
|
|
|
|
|
struct {
|
|
|
|
u64 msr_val;
|
|
|
|
u64 last_steal;
|
|
|
|
u64 accum_steal;
|
|
|
|
struct gfn_to_hva_cache stime;
|
|
|
|
struct kvm_steal_time steal;
|
|
|
|
} st;
|
|
|
|
|
2010-08-20 08:07:30 +00:00
|
|
|
u64 last_guest_tsc;
|
2012-02-03 17:43:54 +00:00
|
|
|
u64 last_host_tsc;
|
2012-02-03 17:43:56 +00:00
|
|
|
u64 tsc_offset_adjustment;
|
2012-02-03 17:43:57 +00:00
|
|
|
u64 this_tsc_nsec;
|
|
|
|
u64 this_tsc_write;
|
2014-06-24 07:42:43 +00:00
|
|
|
u64 this_tsc_generation;
|
2010-09-19 00:38:15 +00:00
|
|
|
bool tsc_catchup;
|
KVM: Infrastructure for software and hardware based TSC rate scaling
This requires some restructuring; rather than use 'virtual_tsc_khz'
to indicate whether hardware rate scaling is in effect, we consider
each VCPU to always have a virtual TSC rate. Instead, there is new
logic above the vendor-specific hardware scaling that decides whether
it is even necessary to use and updates all rate variables used by
common code. This means we can simply query the virtual rate at
any point, which is needed for software rate scaling.
There is also now a threshold added to the TSC rate scaling; minor
differences and variations of measured TSC rate can accidentally
provoke rate scaling to be used when it is not needed. Instead,
we have a tolerance variable called tsc_tolerance_ppm, which is
the maximum variation from user requested rate at which scaling
will be used. The default is 250ppm, which is the half the
threshold for NTP adjustment, allowing for some hardware variation.
In the event that hardware rate scaling is not available, we can
kludge a bit by forcing TSC catchup to turn on when a faster than
hardware speed has been requested, but there is nothing available
yet for the reverse case; this requires a trap and emulate software
implementation for RDTSC, which is still forthcoming.
[avi: fix 64-bit division on i386]
Signed-off-by: Zachary Amsden <zamsden@gmail.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
2012-02-03 17:43:50 +00:00
|
|
|
bool tsc_always_catchup;
|
|
|
|
s8 virtual_tsc_shift;
|
|
|
|
u32 virtual_tsc_mult;
|
|
|
|
u32 virtual_tsc_khz;
|
2012-11-29 20:42:50 +00:00
|
|
|
s64 ia32_tsc_adjust_msr;
|
2008-05-15 01:52:48 +00:00
|
|
|
|
2011-09-20 10:43:14 +00:00
|
|
|
atomic_t nmi_queued; /* unprocessed asynchronous NMIs */
|
|
|
|
unsigned nmi_pending; /* NMI queued after currently running handler */
|
|
|
|
bool nmi_injected; /* Trying to inject an NMI this entry */
|
2015-04-01 13:06:40 +00:00
|
|
|
bool smi_pending; /* SMI queued after currently running handler */
|
2008-05-26 17:06:35 +00:00
|
|
|
|
2015-06-15 08:55:24 +00:00
|
|
|
struct kvm_mtrr mtrr_state;
|
2014-06-19 09:40:18 +00:00
|
|
|
u64 pat;
|
2008-12-15 12:52:10 +00:00
|
|
|
|
2014-02-21 08:55:56 +00:00
|
|
|
unsigned switch_db_regs;
|
2008-12-15 12:52:10 +00:00
|
|
|
unsigned long db[KVM_NR_DB_REGS];
|
|
|
|
unsigned long dr6;
|
|
|
|
unsigned long dr7;
|
|
|
|
unsigned long eff_db[KVM_NR_DB_REGS];
|
2012-09-21 03:42:55 +00:00
|
|
|
unsigned long guest_debug_dr7;
|
2009-05-11 08:48:15 +00:00
|
|
|
|
|
|
|
u64 mcg_cap;
|
|
|
|
u64 mcg_status;
|
|
|
|
u64 mcg_ctl;
|
|
|
|
u64 *mce_banks;
|
2009-10-18 11:24:44 +00:00
|
|
|
|
2011-07-11 19:23:20 +00:00
|
|
|
/* Cache MMIO info */
|
|
|
|
u64 mmio_gva;
|
|
|
|
unsigned access;
|
|
|
|
gfn_t mmio_gfn;
|
2014-08-18 22:46:07 +00:00
|
|
|
u64 mmio_gen;
|
2011-07-11 19:23:20 +00:00
|
|
|
|
2011-11-10 12:57:22 +00:00
|
|
|
struct kvm_pmu pmu;
|
|
|
|
|
2009-10-18 11:24:44 +00:00
|
|
|
/* used for guest single stepping over the given code position */
|
|
|
|
unsigned long singlestep_rip;
|
2010-02-23 16:47:55 +00:00
|
|
|
|
2010-01-17 13:51:23 +00:00
|
|
|
/* fields used by HYPER-V emulation */
|
|
|
|
u64 hv_vapic;
|
2010-06-30 04:25:15 +00:00
|
|
|
|
|
|
|
cpumask_var_t wbinvd_dirty_mask;
|
2010-10-14 09:22:46 +00:00
|
|
|
|
2011-09-22 09:02:48 +00:00
|
|
|
unsigned long last_retry_eip;
|
|
|
|
unsigned long last_retry_addr;
|
|
|
|
|
2010-10-14 09:22:46 +00:00
|
|
|
struct {
|
|
|
|
bool halted;
|
|
|
|
gfn_t gfns[roundup_pow_of_two(ASYNC_PF_PER_VCPU)];
|
2010-10-14 09:22:50 +00:00
|
|
|
struct gfn_to_hva_cache data;
|
|
|
|
u64 msr_val;
|
2010-10-14 09:22:53 +00:00
|
|
|
u32 id;
|
2010-10-14 09:22:55 +00:00
|
|
|
bool send_user_only;
|
2010-10-14 09:22:46 +00:00
|
|
|
} apf;
|
2012-01-09 19:00:35 +00:00
|
|
|
|
|
|
|
/* OSVW MSRs (AMD only) */
|
|
|
|
struct {
|
|
|
|
u64 length;
|
|
|
|
u64 status;
|
|
|
|
} osvw;
|
2012-06-24 16:25:07 +00:00
|
|
|
|
|
|
|
struct {
|
|
|
|
u64 msr_val;
|
|
|
|
struct gfn_to_hva_cache data;
|
|
|
|
} pv_eoi;
|
2013-01-13 15:49:07 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Indicate whether the access faults on its page table in guest
|
|
|
|
* which is set when fix page fault and used to detect unhandeable
|
|
|
|
* instruction.
|
|
|
|
*/
|
|
|
|
bool write_fault_to_shadow_pgtable;
|
2013-08-06 09:00:32 +00:00
|
|
|
|
|
|
|
/* set at EPT violation at this point */
|
|
|
|
unsigned long exit_qualification;
|
2013-08-26 08:48:34 +00:00
|
|
|
|
|
|
|
/* pv related host specific info */
|
|
|
|
struct {
|
|
|
|
bool pv_unhalted;
|
|
|
|
} pv;
|
2007-10-20 07:34:38 +00:00
|
|
|
};
|
|
|
|
|
2012-02-08 04:02:18 +00:00
|
|
|
struct kvm_lpage_info {
|
|
|
|
int write_count;
|
|
|
|
};
|
|
|
|
|
|
|
|
struct kvm_arch_memory_slot {
|
2012-08-01 09:03:28 +00:00
|
|
|
unsigned long *rmap[KVM_NR_PAGE_SIZES];
|
2012-02-08 04:02:18 +00:00
|
|
|
struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1];
|
|
|
|
};
|
|
|
|
|
2015-02-12 18:41:33 +00:00
|
|
|
/*
|
|
|
|
* We use as the mode the number of bits allocated in the LDR for the
|
|
|
|
* logical processor ID. It happens that these are all powers of two.
|
|
|
|
* This makes it is very easy to detect cases where the APICs are
|
|
|
|
* configured for multiple modes; in that case, we cannot use the map and
|
|
|
|
* hence cannot use kvm_irq_delivery_to_apic_fast either.
|
|
|
|
*/
|
|
|
|
#define KVM_APIC_MODE_XAPIC_CLUSTER 4
|
|
|
|
#define KVM_APIC_MODE_XAPIC_FLAT 8
|
|
|
|
#define KVM_APIC_MODE_X2APIC 16
|
|
|
|
|
2012-09-13 14:19:24 +00:00
|
|
|
struct kvm_apic_map {
|
|
|
|
struct rcu_head rcu;
|
2015-02-12 18:41:33 +00:00
|
|
|
u8 mode;
|
2012-09-13 14:19:24 +00:00
|
|
|
struct kvm_lapic *phys_map[256];
|
|
|
|
/* first index is cluster id second is cpu id in a cluster */
|
|
|
|
struct kvm_lapic *logical_map[16][16];
|
|
|
|
};
|
|
|
|
|
2009-12-23 16:35:17 +00:00
|
|
|
struct kvm_arch {
|
2010-08-20 01:11:28 +00:00
|
|
|
unsigned int n_used_mmu_pages;
|
2007-12-14 02:01:48 +00:00
|
|
|
unsigned int n_requested_mmu_pages;
|
2010-08-20 01:11:14 +00:00
|
|
|
unsigned int n_max_mmu_pages;
|
2011-05-15 15:20:27 +00:00
|
|
|
unsigned int indirect_shadow_pages;
|
2013-05-31 00:36:22 +00:00
|
|
|
unsigned long mmu_valid_gen;
|
2007-12-14 02:01:48 +00:00
|
|
|
struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
|
|
|
|
/*
|
|
|
|
* Hash table of struct kvm_mmu_page.
|
|
|
|
*/
|
|
|
|
struct list_head active_mmu_pages;
|
2013-05-31 00:36:29 +00:00
|
|
|
struct list_head zapped_obsolete_pages;
|
|
|
|
|
2008-07-28 16:26:26 +00:00
|
|
|
struct list_head assigned_dev_head;
|
2008-12-03 13:43:34 +00:00
|
|
|
struct iommu_domain *iommu_domain;
|
2013-10-30 17:02:23 +00:00
|
|
|
bool iommu_noncoherent;
|
2013-10-30 17:02:30 +00:00
|
|
|
#define __KVM_HAVE_ARCH_NONCOHERENT_DMA
|
|
|
|
atomic_t noncoherent_dma_count;
|
2007-12-14 02:17:34 +00:00
|
|
|
struct kvm_pic *vpic;
|
|
|
|
struct kvm_ioapic *vioapic;
|
2008-01-27 21:10:22 +00:00
|
|
|
struct kvm_pit *vpit;
|
2008-10-20 08:20:03 +00:00
|
|
|
int vapics_in_nmi_mode;
|
2012-09-13 14:19:24 +00:00
|
|
|
struct mutex apic_map_lock;
|
|
|
|
struct kvm_apic_map *apic_map;
|
2007-12-14 02:20:16 +00:00
|
|
|
|
|
|
|
unsigned int tss_addr;
|
2014-09-24 07:57:58 +00:00
|
|
|
bool apic_access_page_done;
|
2008-02-15 19:52:47 +00:00
|
|
|
|
|
|
|
gpa_t wall_clock;
|
2008-04-25 13:44:52 +00:00
|
|
|
|
|
|
|
bool ept_identity_pagetable_done;
|
2009-07-21 02:42:48 +00:00
|
|
|
gpa_t ept_identity_map_addr;
|
2008-10-15 12:15:06 +00:00
|
|
|
|
|
|
|
unsigned long irq_sources_bitmap;
|
2009-10-16 19:28:36 +00:00
|
|
|
s64 kvmclock_offset;
|
2011-02-04 09:49:11 +00:00
|
|
|
raw_spinlock_t tsc_write_lock;
|
2010-08-20 08:07:20 +00:00
|
|
|
u64 last_tsc_nsec;
|
|
|
|
u64 last_tsc_write;
|
KVM: Improve TSC offset matching
There are a few improvements that can be made to the TSC offset
matching code. First, we don't need to call the 128-bit multiply
(especially on a constant number), the code works much nicer to
do computation in nanosecond units.
Second, the way everything is setup with software TSC rate scaling,
we currently have per-cpu rates. Obviously this isn't too desirable
to use in practice, but if for some reason we do change the rate of
all VCPUs at runtime, then reset the TSCs, we will only want to
match offsets for VCPUs running at the same rate.
Finally, for the case where we have an unstable host TSC, but
rate scaling is being done in hardware, we should call the platform
code to compute the TSC offset, so the math is reorganized to recompute
the base instead, then transform the base into an offset using the
existing API.
[avi: fix 64-bit division on i386]
Signed-off-by: Zachary Amsden <zamsden@gmail.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
KVM: Fix 64-bit division in kvm_write_tsc()
Breaks i386 build.
Signed-off-by: Avi Kivity <avi@redhat.com>
2012-02-03 17:43:51 +00:00
|
|
|
u32 last_tsc_khz;
|
2012-02-03 17:43:57 +00:00
|
|
|
u64 cur_tsc_nsec;
|
|
|
|
u64 cur_tsc_write;
|
|
|
|
u64 cur_tsc_offset;
|
2014-06-24 07:42:43 +00:00
|
|
|
u64 cur_tsc_generation;
|
2012-11-28 01:29:03 +00:00
|
|
|
int nr_vcpus_matched_tsc;
|
2009-10-15 22:21:43 +00:00
|
|
|
|
2012-11-28 01:29:01 +00:00
|
|
|
spinlock_t pvclock_gtod_sync_lock;
|
|
|
|
bool use_master_clock;
|
|
|
|
u64 master_kernel_ns;
|
|
|
|
cycle_t master_cycle_now;
|
2014-02-28 11:52:54 +00:00
|
|
|
struct delayed_work kvmclock_update_work;
|
2014-02-28 11:52:55 +00:00
|
|
|
struct delayed_work kvmclock_sync_work;
|
2012-11-28 01:29:01 +00:00
|
|
|
|
2009-10-15 22:21:43 +00:00
|
|
|
struct kvm_xen_hvm_config xen_hvm_config;
|
2010-01-17 13:51:22 +00:00
|
|
|
|
2014-11-20 12:45:31 +00:00
|
|
|
/* reads protected by irq_srcu, writes by irq_lock */
|
|
|
|
struct hlist_head mask_notifier_list;
|
|
|
|
|
2010-01-17 13:51:22 +00:00
|
|
|
/* fields used by HYPER-V emulation */
|
|
|
|
u64 hv_guest_os_id;
|
|
|
|
u64 hv_hypercall;
|
2014-01-16 09:18:37 +00:00
|
|
|
u64 hv_tsc_page;
|
2010-12-23 08:08:35 +00:00
|
|
|
|
|
|
|
#ifdef CONFIG_KVM_MMU_AUDIT
|
|
|
|
int audit_point;
|
|
|
|
#endif
|
2015-01-20 17:54:52 +00:00
|
|
|
|
|
|
|
bool boot_vcpu_runs_old_kvmclock;
|
2015-04-12 22:53:41 +00:00
|
|
|
|
|
|
|
u64 disabled_quirks;
|
2007-12-14 01:54:20 +00:00
|
|
|
};
|
|
|
|
|
2007-12-14 02:23:23 +00:00
|
|
|
struct kvm_vm_stat {
|
|
|
|
u32 mmu_shadow_zapped;
|
|
|
|
u32 mmu_pte_write;
|
|
|
|
u32 mmu_pte_updated;
|
|
|
|
u32 mmu_pde_zapped;
|
|
|
|
u32 mmu_flooded;
|
|
|
|
u32 mmu_recycled;
|
2007-12-18 17:47:18 +00:00
|
|
|
u32 mmu_cache_miss;
|
2008-09-23 16:18:39 +00:00
|
|
|
u32 mmu_unsync;
|
2007-12-14 02:23:23 +00:00
|
|
|
u32 remote_tlb_flush;
|
2008-02-23 14:44:30 +00:00
|
|
|
u32 lpages;
|
2007-12-14 02:23:23 +00:00
|
|
|
};
|
|
|
|
|
2007-12-14 01:49:26 +00:00
|
|
|
struct kvm_vcpu_stat {
|
|
|
|
u32 pf_fixed;
|
|
|
|
u32 pf_guest;
|
|
|
|
u32 tlb_flush;
|
|
|
|
u32 invlpg;
|
|
|
|
|
|
|
|
u32 exits;
|
|
|
|
u32 io_exits;
|
|
|
|
u32 mmio_exits;
|
|
|
|
u32 signal_exits;
|
|
|
|
u32 irq_window_exits;
|
2008-05-15 10:23:25 +00:00
|
|
|
u32 nmi_window_exits;
|
2007-12-14 01:49:26 +00:00
|
|
|
u32 halt_exits;
|
kvm: add halt_poll_ns module parameter
This patch introduces a new module parameter for the KVM module; when it
is present, KVM attempts a bit of polling on every HLT before scheduling
itself out via kvm_vcpu_block.
This parameter helps a lot for latency-bound workloads---in particular
I tested it with O_DSYNC writes with a battery-backed disk in the host.
In this case, writes are fast (because the data doesn't have to go all
the way to the platters) but they cannot be merged by either the host or
the guest. KVM's performance here is usually around 30% of bare metal,
or 50% if you use cache=directsync or cache=writethrough (these
parameters avoid that the guest sends pointless flush requests, and
at the same time they are not slow because of the battery-backed cache).
The bad performance happens because on every halt the host CPU decides
to halt itself too. When the interrupt comes, the vCPU thread is then
migrated to a new physical CPU, and in general the latency is horrible
because the vCPU thread has to be scheduled back in.
With this patch performance reaches 60-65% of bare metal and, more
important, 99% of what you get if you use idle=poll in the guest. This
means that the tunable gets rid of this particular bottleneck, and more
work can be done to improve performance in the kernel or QEMU.
Of course there is some price to pay; every time an otherwise idle vCPUs
is interrupted by an interrupt, it will poll unnecessarily and thus
impose a little load on the host. The above results were obtained with
a mostly random value of the parameter (500000), and the load was around
1.5-2.5% CPU usage on one of the host's core for each idle guest vCPU.
The patch also adds a new stat, /sys/kernel/debug/kvm/halt_successful_poll,
that can be used to tune the parameter. It counts how many HLT
instructions received an interrupt during the polling period; each
successful poll avoids that Linux schedules the VCPU thread out and back
in, and may also avoid a likely trip to C1 and back for the physical CPU.
While the VM is idle, a Linux 4 VCPU VM halts around 10 times per second.
Of these halts, almost all are failed polls. During the benchmark,
instead, basically all halts end within the polling period, except a more
or less constant stream of 50 per second coming from vCPUs that are not
running the benchmark. The wasted time is thus very low. Things may
be slightly different for Windows VMs, which have a ~10 ms timer tick.
The effect is also visible on Marcelo's recently-introduced latency
test for the TSC deadline timer. Though of course a non-RT kernel has
awful latency bounds, the latency of the timer is around 8000-10000 clock
cycles compared to 20000-120000 without setting halt_poll_ns. For the TSC
deadline timer, thus, the effect is both a smaller average latency and
a smaller variance.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-02-04 17:20:58 +00:00
|
|
|
u32 halt_successful_poll;
|
2007-12-14 01:49:26 +00:00
|
|
|
u32 halt_wakeup;
|
|
|
|
u32 request_irq_exits;
|
|
|
|
u32 irq_exits;
|
|
|
|
u32 host_state_reload;
|
|
|
|
u32 efer_reload;
|
|
|
|
u32 fpu_reload;
|
|
|
|
u32 insn_emulation;
|
|
|
|
u32 insn_emulation_fail;
|
2008-02-20 19:30:30 +00:00
|
|
|
u32 hypercalls;
|
2008-09-01 12:57:51 +00:00
|
|
|
u32 irq_injections;
|
2008-09-26 07:30:55 +00:00
|
|
|
u32 nmi_injections;
|
2007-12-14 01:49:26 +00:00
|
|
|
};
|
2007-12-13 15:50:52 +00:00
|
|
|
|
2011-04-04 10:39:27 +00:00
|
|
|
struct x86_instruction_info;
|
|
|
|
|
2012-11-29 20:42:12 +00:00
|
|
|
struct msr_data {
|
|
|
|
bool host_initiated;
|
|
|
|
u32 index;
|
|
|
|
u64 data;
|
|
|
|
};
|
|
|
|
|
2014-12-17 17:17:20 +00:00
|
|
|
struct kvm_lapic_irq {
|
|
|
|
u32 vector;
|
2015-04-21 12:57:05 +00:00
|
|
|
u16 delivery_mode;
|
|
|
|
u16 dest_mode;
|
|
|
|
bool level;
|
|
|
|
u16 trig_mode;
|
2014-12-17 17:17:20 +00:00
|
|
|
u32 shorthand;
|
|
|
|
u32 dest_id;
|
2015-03-19 01:26:03 +00:00
|
|
|
bool msi_redir_hint;
|
2014-12-17 17:17:20 +00:00
|
|
|
};
|
|
|
|
|
2007-11-19 06:40:47 +00:00
|
|
|
struct kvm_x86_ops {
|
|
|
|
int (*cpu_has_kvm_support)(void); /* __init */
|
|
|
|
int (*disabled_by_bios)(void); /* __init */
|
2014-08-28 13:13:03 +00:00
|
|
|
int (*hardware_enable)(void);
|
|
|
|
void (*hardware_disable)(void);
|
2007-11-19 06:40:47 +00:00
|
|
|
void (*check_processor_compatibility)(void *rtn);
|
|
|
|
int (*hardware_setup)(void); /* __init */
|
|
|
|
void (*hardware_unsetup)(void); /* __exit */
|
2007-12-26 11:57:04 +00:00
|
|
|
bool (*cpu_has_accelerated_tpr)(void);
|
2015-04-01 12:25:33 +00:00
|
|
|
bool (*cpu_has_high_real_mode_segbase)(void);
|
2009-12-18 08:48:46 +00:00
|
|
|
void (*cpuid_update)(struct kvm_vcpu *vcpu);
|
2007-11-19 06:40:47 +00:00
|
|
|
|
|
|
|
/* Create, but do not attach this VCPU */
|
|
|
|
struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id);
|
|
|
|
void (*vcpu_free)(struct kvm_vcpu *vcpu);
|
KVM: x86: INIT and reset sequences are different
x86 architecture defines differences between the reset and INIT sequences.
INIT does not initialize the FPU (including MMX, XMM, YMM, etc.), TSC, PMU,
MSRs (in general), MTRRs machine-check, APIC ID, APIC arbitration ID and BSP.
References (from Intel SDM):
"If the MP protocol has completed and a BSP is chosen, subsequent INITs (either
to a specific processor or system wide) do not cause the MP protocol to be
repeated." [8.4.2: MP Initialization Protocol Requirements and Restrictions]
[Table 9-1. IA-32 Processor States Following Power-up, Reset, or INIT]
"If the processor is reset by asserting the INIT# pin, the x87 FPU state is not
changed." [9.2: X87 FPU INITIALIZATION]
"The state of the local APIC following an INIT reset is the same as it is after
a power-up or hardware reset, except that the APIC ID and arbitration ID
registers are not affected." [10.4.7.3: Local APIC State After an INIT Reset
("Wait-for-SIPI" State)]
Signed-off-by: Nadav Amit <namit@cs.technion.ac.il>
Message-Id: <1428924848-28212-1-git-send-email-namit@cs.technion.ac.il>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-04-13 11:34:08 +00:00
|
|
|
void (*vcpu_reset)(struct kvm_vcpu *vcpu, bool init_event);
|
2007-11-19 06:40:47 +00:00
|
|
|
|
|
|
|
void (*prepare_guest_switch)(struct kvm_vcpu *vcpu);
|
|
|
|
void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
|
|
|
|
void (*vcpu_put)(struct kvm_vcpu *vcpu);
|
|
|
|
|
2012-09-21 03:42:55 +00:00
|
|
|
void (*update_db_bp_intercept)(struct kvm_vcpu *vcpu);
|
2015-04-08 13:30:38 +00:00
|
|
|
int (*get_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);
|
2012-11-29 20:42:12 +00:00
|
|
|
int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);
|
2007-11-19 06:40:47 +00:00
|
|
|
u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
|
|
|
|
void (*get_segment)(struct kvm_vcpu *vcpu,
|
|
|
|
struct kvm_segment *var, int seg);
|
2008-03-24 17:38:34 +00:00
|
|
|
int (*get_cpl)(struct kvm_vcpu *vcpu);
|
2007-11-19 06:40:47 +00:00
|
|
|
void (*set_segment)(struct kvm_vcpu *vcpu,
|
|
|
|
struct kvm_segment *var, int seg);
|
|
|
|
void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
|
2009-12-29 16:43:06 +00:00
|
|
|
void (*decache_cr0_guest_bits)(struct kvm_vcpu *vcpu);
|
2010-12-05 16:56:11 +00:00
|
|
|
void (*decache_cr3)(struct kvm_vcpu *vcpu);
|
2007-11-19 06:40:47 +00:00
|
|
|
void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu);
|
|
|
|
void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
|
|
|
|
void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
|
2011-05-25 20:03:24 +00:00
|
|
|
int (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
|
2007-11-19 06:40:47 +00:00
|
|
|
void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
|
2010-02-16 08:51:48 +00:00
|
|
|
void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
|
|
|
|
void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
|
|
|
|
void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
|
|
|
|
void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
|
2014-01-04 17:47:16 +00:00
|
|
|
u64 (*get_dr6)(struct kvm_vcpu *vcpu);
|
|
|
|
void (*set_dr6)(struct kvm_vcpu *vcpu, unsigned long value);
|
2014-02-21 09:17:24 +00:00
|
|
|
void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu);
|
2010-04-13 07:05:23 +00:00
|
|
|
void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value);
|
2008-06-27 17:58:02 +00:00
|
|
|
void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg);
|
2007-11-19 06:40:47 +00:00
|
|
|
unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
|
|
|
|
void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
|
2015-05-20 09:33:43 +00:00
|
|
|
void (*fpu_activate)(struct kvm_vcpu *vcpu);
|
2009-12-30 10:40:26 +00:00
|
|
|
void (*fpu_deactivate)(struct kvm_vcpu *vcpu);
|
2007-11-19 06:40:47 +00:00
|
|
|
|
|
|
|
void (*tlb_flush)(struct kvm_vcpu *vcpu);
|
|
|
|
|
2009-08-24 08:10:17 +00:00
|
|
|
void (*run)(struct kvm_vcpu *vcpu);
|
|
|
|
int (*handle_exit)(struct kvm_vcpu *vcpu);
|
2007-11-19 06:40:47 +00:00
|
|
|
void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
|
2009-05-12 20:21:05 +00:00
|
|
|
void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask);
|
2014-05-20 12:29:47 +00:00
|
|
|
u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu);
|
2007-11-19 06:40:47 +00:00
|
|
|
void (*patch_hypercall)(struct kvm_vcpu *vcpu,
|
|
|
|
unsigned char *hypercall_addr);
|
2009-05-11 10:35:50 +00:00
|
|
|
void (*set_irq)(struct kvm_vcpu *vcpu);
|
2009-04-21 14:45:08 +00:00
|
|
|
void (*set_nmi)(struct kvm_vcpu *vcpu);
|
2007-11-25 11:41:11 +00:00
|
|
|
void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr,
|
2010-04-22 10:33:13 +00:00
|
|
|
bool has_error_code, u32 error_code,
|
|
|
|
bool reinject);
|
2010-07-20 12:06:17 +00:00
|
|
|
void (*cancel_injection)(struct kvm_vcpu *vcpu);
|
2009-03-23 10:12:11 +00:00
|
|
|
int (*interrupt_allowed)(struct kvm_vcpu *vcpu);
|
2009-04-21 14:45:08 +00:00
|
|
|
int (*nmi_allowed)(struct kvm_vcpu *vcpu);
|
2009-11-12 00:04:25 +00:00
|
|
|
bool (*get_nmi_mask)(struct kvm_vcpu *vcpu);
|
|
|
|
void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked);
|
2014-03-07 19:03:15 +00:00
|
|
|
void (*enable_nmi_window)(struct kvm_vcpu *vcpu);
|
|
|
|
void (*enable_irq_window)(struct kvm_vcpu *vcpu);
|
2009-04-21 14:45:08 +00:00
|
|
|
void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr);
|
2013-01-25 02:18:51 +00:00
|
|
|
int (*vm_has_apicv)(struct kvm *kvm);
|
|
|
|
void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr);
|
|
|
|
void (*hwapic_isr_update)(struct kvm *kvm, int isr);
|
|
|
|
void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap);
|
2013-01-25 02:18:50 +00:00
|
|
|
void (*set_virtual_x2apic_mode)(struct kvm_vcpu *vcpu, bool set);
|
2014-09-24 07:57:54 +00:00
|
|
|
void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu, hpa_t hpa);
|
2013-04-11 11:25:15 +00:00
|
|
|
void (*deliver_posted_interrupt)(struct kvm_vcpu *vcpu, int vector);
|
|
|
|
void (*sync_pir_to_irr)(struct kvm_vcpu *vcpu);
|
2007-11-19 06:40:47 +00:00
|
|
|
int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
|
2008-04-25 02:20:22 +00:00
|
|
|
int (*get_tdp_level)(void);
|
2009-04-27 12:35:42 +00:00
|
|
|
u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio);
|
2010-01-05 11:02:27 +00:00
|
|
|
int (*get_lpage_level)(void);
|
2009-12-18 08:48:47 +00:00
|
|
|
bool (*rdtscp_supported)(void);
|
2012-07-02 01:18:48 +00:00
|
|
|
bool (*invpcid_supported)(void);
|
2012-02-03 17:43:55 +00:00
|
|
|
void (*adjust_tsc_offset)(struct kvm_vcpu *vcpu, s64 adjustment, bool host);
|
2009-07-27 14:30:48 +00:00
|
|
|
|
2010-09-10 15:30:41 +00:00
|
|
|
void (*set_tdp_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
|
|
|
|
|
2010-04-22 10:33:11 +00:00
|
|
|
void (*set_supported_cpuid)(u32 func, struct kvm_cpuid_entry2 *entry);
|
|
|
|
|
2010-06-30 04:25:15 +00:00
|
|
|
bool (*has_wbinvd_exit)(void);
|
|
|
|
|
KVM: Infrastructure for software and hardware based TSC rate scaling
This requires some restructuring; rather than use 'virtual_tsc_khz'
to indicate whether hardware rate scaling is in effect, we consider
each VCPU to always have a virtual TSC rate. Instead, there is new
logic above the vendor-specific hardware scaling that decides whether
it is even necessary to use and updates all rate variables used by
common code. This means we can simply query the virtual rate at
any point, which is needed for software rate scaling.
There is also now a threshold added to the TSC rate scaling; minor
differences and variations of measured TSC rate can accidentally
provoke rate scaling to be used when it is not needed. Instead,
we have a tolerance variable called tsc_tolerance_ppm, which is
the maximum variation from user requested rate at which scaling
will be used. The default is 250ppm, which is the half the
threshold for NTP adjustment, allowing for some hardware variation.
In the event that hardware rate scaling is not available, we can
kludge a bit by forcing TSC catchup to turn on when a faster than
hardware speed has been requested, but there is nothing available
yet for the reverse case; this requires a trap and emulate software
implementation for RDTSC, which is still forthcoming.
[avi: fix 64-bit division on i386]
Signed-off-by: Zachary Amsden <zamsden@gmail.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
2012-02-03 17:43:50 +00:00
|
|
|
void (*set_tsc_khz)(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale);
|
2012-11-29 20:42:50 +00:00
|
|
|
u64 (*read_tsc_offset)(struct kvm_vcpu *vcpu);
|
2010-08-20 08:07:17 +00:00
|
|
|
void (*write_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset);
|
|
|
|
|
2011-03-25 08:44:50 +00:00
|
|
|
u64 (*compute_tsc_offset)(struct kvm_vcpu *vcpu, u64 target_tsc);
|
2012-11-28 01:28:58 +00:00
|
|
|
u64 (*read_l1_tsc)(struct kvm_vcpu *vcpu, u64 host_tsc);
|
2011-03-25 08:44:50 +00:00
|
|
|
|
2010-11-18 11:09:54 +00:00
|
|
|
void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2);
|
2011-04-04 10:39:27 +00:00
|
|
|
|
|
|
|
int (*check_intercept)(struct kvm_vcpu *vcpu,
|
|
|
|
struct x86_instruction_info *info,
|
|
|
|
enum x86_intercept_stage stage);
|
2013-04-11 11:25:10 +00:00
|
|
|
void (*handle_external_intr)(struct kvm_vcpu *vcpu);
|
2014-02-24 10:55:46 +00:00
|
|
|
bool (*mpx_supported)(void);
|
2014-12-02 11:21:30 +00:00
|
|
|
bool (*xsaves_supported)(void);
|
2014-03-07 19:03:12 +00:00
|
|
|
|
|
|
|
int (*check_nested_events)(struct kvm_vcpu *vcpu, bool external_intr);
|
2014-08-21 16:08:06 +00:00
|
|
|
|
|
|
|
void (*sched_in)(struct kvm_vcpu *kvm, int cpu);
|
2015-01-28 02:54:27 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Arch-specific dirty logging hooks. These hooks are only supposed to
|
|
|
|
* be valid if the specific arch has hardware-accelerated dirty logging
|
|
|
|
* mechanism. Currently only for PML on VMX.
|
|
|
|
*
|
|
|
|
* - slot_enable_log_dirty:
|
|
|
|
* called when enabling log dirty mode for the slot.
|
|
|
|
* - slot_disable_log_dirty:
|
|
|
|
* called when disabling log dirty mode for the slot.
|
|
|
|
* also called when slot is created with log dirty disabled.
|
|
|
|
* - flush_log_dirty:
|
|
|
|
* called before reporting dirty_bitmap to userspace.
|
|
|
|
* - enable_log_dirty_pt_masked:
|
|
|
|
* called when reenabling log dirty for the GFNs in the mask after
|
|
|
|
* corresponding bits are cleared in slot->dirty_bitmap.
|
|
|
|
*/
|
|
|
|
void (*slot_enable_log_dirty)(struct kvm *kvm,
|
|
|
|
struct kvm_memory_slot *slot);
|
|
|
|
void (*slot_disable_log_dirty)(struct kvm *kvm,
|
|
|
|
struct kvm_memory_slot *slot);
|
|
|
|
void (*flush_log_dirty)(struct kvm *kvm);
|
|
|
|
void (*enable_log_dirty_pt_masked)(struct kvm *kvm,
|
|
|
|
struct kvm_memory_slot *slot,
|
|
|
|
gfn_t offset, unsigned long mask);
|
2007-11-19 06:40:47 +00:00
|
|
|
};
|
|
|
|
|
2010-10-14 09:22:46 +00:00
|
|
|
struct kvm_arch_async_pf {
|
2010-10-14 09:22:53 +00:00
|
|
|
u32 token;
|
2010-10-14 09:22:46 +00:00
|
|
|
gfn_t gfn;
|
2010-12-07 02:35:25 +00:00
|
|
|
unsigned long cr3;
|
2010-11-12 06:49:55 +00:00
|
|
|
bool direct_map;
|
2010-10-14 09:22:46 +00:00
|
|
|
};
|
|
|
|
|
2007-11-14 12:09:30 +00:00
|
|
|
extern struct kvm_x86_ops *kvm_x86_ops;
|
|
|
|
|
2012-02-03 17:43:55 +00:00
|
|
|
static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
|
|
|
|
s64 adjustment)
|
|
|
|
{
|
|
|
|
kvm_x86_ops->adjust_tsc_offset(vcpu, adjustment, false);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
|
|
|
|
{
|
|
|
|
kvm_x86_ops->adjust_tsc_offset(vcpu, adjustment, true);
|
|
|
|
}
|
|
|
|
|
2007-11-19 07:24:28 +00:00
|
|
|
int kvm_mmu_module_init(void);
|
|
|
|
void kvm_mmu_module_exit(void);
|
|
|
|
|
|
|
|
void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
|
|
|
|
int kvm_mmu_create(struct kvm_vcpu *vcpu);
|
2013-10-02 14:56:13 +00:00
|
|
|
void kvm_mmu_setup(struct kvm_vcpu *vcpu);
|
2008-04-25 13:13:50 +00:00
|
|
|
void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
|
2009-04-27 12:35:42 +00:00
|
|
|
u64 dirty_mask, u64 nx_mask, u64 x_mask);
|
2007-11-19 07:24:28 +00:00
|
|
|
|
2013-10-02 14:56:13 +00:00
|
|
|
void kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
|
2015-01-28 02:54:26 +00:00
|
|
|
void kvm_mmu_slot_remove_write_access(struct kvm *kvm,
|
|
|
|
struct kvm_memory_slot *memslot);
|
2015-04-03 07:40:25 +00:00
|
|
|
void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm,
|
2015-05-18 11:20:23 +00:00
|
|
|
const struct kvm_memory_slot *memslot);
|
2015-01-28 02:54:24 +00:00
|
|
|
void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm,
|
|
|
|
struct kvm_memory_slot *memslot);
|
|
|
|
void kvm_mmu_slot_largepage_remove_write_access(struct kvm *kvm,
|
|
|
|
struct kvm_memory_slot *memslot);
|
|
|
|
void kvm_mmu_slot_set_dirty(struct kvm *kvm,
|
|
|
|
struct kvm_memory_slot *memslot);
|
|
|
|
void kvm_mmu_clear_dirty_pt_masked(struct kvm *kvm,
|
|
|
|
struct kvm_memory_slot *slot,
|
|
|
|
gfn_t gfn_offset, unsigned long mask);
|
2007-11-19 07:24:28 +00:00
|
|
|
void kvm_mmu_zap_all(struct kvm *kvm);
|
2015-04-08 13:39:23 +00:00
|
|
|
void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, struct kvm_memslots *slots);
|
2007-11-20 05:11:38 +00:00
|
|
|
unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm);
|
2007-11-19 07:24:28 +00:00
|
|
|
void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages);
|
|
|
|
|
2010-09-10 15:30:57 +00:00
|
|
|
int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3);
|
2008-02-07 12:47:43 +00:00
|
|
|
|
2008-03-29 23:17:59 +00:00
|
|
|
int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
|
2008-03-02 12:06:05 +00:00
|
|
|
const void *val, int bytes);
|
2008-02-22 17:21:37 +00:00
|
|
|
|
2014-11-20 12:45:31 +00:00
|
|
|
struct kvm_irq_mask_notifier {
|
|
|
|
void (*func)(struct kvm_irq_mask_notifier *kimn, bool masked);
|
|
|
|
int irq;
|
|
|
|
struct hlist_node link;
|
|
|
|
};
|
|
|
|
|
|
|
|
void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq,
|
|
|
|
struct kvm_irq_mask_notifier *kimn);
|
|
|
|
void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
|
|
|
|
struct kvm_irq_mask_notifier *kimn);
|
|
|
|
void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin,
|
|
|
|
bool mask);
|
|
|
|
|
2008-02-22 17:21:37 +00:00
|
|
|
extern bool tdp_enabled;
|
2008-03-02 12:06:05 +00:00
|
|
|
|
2011-09-22 08:55:52 +00:00
|
|
|
u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu);
|
|
|
|
|
2011-03-25 08:44:51 +00:00
|
|
|
/* control of guest tsc rate supported? */
|
|
|
|
extern bool kvm_has_tsc_control;
|
|
|
|
/* minimum supported tsc_khz for guests */
|
|
|
|
extern u32 kvm_min_guest_tsc_khz;
|
|
|
|
/* maximum supported tsc_khz for guests */
|
|
|
|
extern u32 kvm_max_guest_tsc_khz;
|
|
|
|
|
2007-11-19 07:24:28 +00:00
|
|
|
enum emulation_result {
|
2013-06-25 16:24:41 +00:00
|
|
|
EMULATE_DONE, /* no further processing */
|
|
|
|
EMULATE_USER_EXIT, /* kvm_run ready for userspace exit */
|
2007-11-19 07:24:28 +00:00
|
|
|
EMULATE_FAIL, /* can't emulate this instruction */
|
|
|
|
};
|
|
|
|
|
KVM: x86 emulator: Only allow VMCALL/VMMCALL trapped by #UD
When executing a test program called "crashme", we found the KVM guest cannot
survive more than ten seconds, then encounterd kernel panic. The basic concept
of "crashme" is generating random assembly code and trying to execute it.
After some fixes on emulator insn validity judgment, we found it's hard to
get the current emulator handle the invalid instructions correctly, for the
#UD trap for hypercall patching caused troubles. The problem is, if the opcode
itself was OK, but combination of opcode and modrm_reg was invalid, and one
operand of the opcode was memory (SrcMem or DstMem), the emulator will fetch
the memory operand first rather than checking the validity, and may encounter
an error there. For example, ".byte 0xfe, 0x34, 0xcd" has this problem.
In the patch, we simply check that if the invalid opcode wasn't vmcall/vmmcall,
then return from emulate_instruction() and inject a #UD to guest. With the
patch, the guest had been running for more than 12 hours.
Signed-off-by: Feng (Eric) Liu <eric.e.liu@intel.com>
Signed-off-by: Sheng Yang <sheng.yang@intel.com>
Signed-off-by: Avi Kivity <avi@qumranet.com>
2008-01-02 06:49:22 +00:00
|
|
|
#define EMULTYPE_NO_DECODE (1 << 0)
|
|
|
|
#define EMULTYPE_TRAP_UD (1 << 1)
|
2009-04-12 10:36:57 +00:00
|
|
|
#define EMULTYPE_SKIP (1 << 2)
|
2011-09-22 09:02:48 +00:00
|
|
|
#define EMULTYPE_RETRY (1 << 3)
|
2013-04-11 09:10:51 +00:00
|
|
|
#define EMULTYPE_NO_REEXECUTE (1 << 4)
|
2010-12-21 10:12:07 +00:00
|
|
|
int x86_emulate_instruction(struct kvm_vcpu *vcpu, unsigned long cr2,
|
|
|
|
int emulation_type, void *insn, int insn_len);
|
2010-12-21 10:12:02 +00:00
|
|
|
|
|
|
|
static inline int emulate_instruction(struct kvm_vcpu *vcpu,
|
|
|
|
int emulation_type)
|
|
|
|
{
|
2010-12-21 10:12:07 +00:00
|
|
|
return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
|
2010-12-21 10:12:02 +00:00
|
|
|
}
|
|
|
|
|
2008-01-31 13:57:37 +00:00
|
|
|
void kvm_enable_efer_bits(u64);
|
2013-04-20 08:52:36 +00:00
|
|
|
bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer);
|
2015-04-08 13:30:38 +00:00
|
|
|
int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr);
|
2012-11-29 20:42:12 +00:00
|
|
|
int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr);
|
2007-11-19 07:24:28 +00:00
|
|
|
|
|
|
|
struct x86_emulate_ctxt;
|
|
|
|
|
2010-03-18 13:20:23 +00:00
|
|
|
int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port);
|
2007-11-19 07:24:28 +00:00
|
|
|
void kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
|
|
|
|
int kvm_emulate_halt(struct kvm_vcpu *vcpu);
|
2015-03-02 19:43:31 +00:00
|
|
|
int kvm_vcpu_halt(struct kvm_vcpu *vcpu);
|
2010-06-30 04:25:15 +00:00
|
|
|
int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu);
|
2007-11-19 07:24:28 +00:00
|
|
|
|
2008-05-27 08:18:46 +00:00
|
|
|
void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
|
2010-02-18 10:15:01 +00:00
|
|
|
int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg);
|
2014-11-24 13:35:24 +00:00
|
|
|
void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector);
|
2008-05-27 08:18:46 +00:00
|
|
|
|
2012-02-08 13:34:38 +00:00
|
|
|
int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
|
|
|
|
int reason, bool has_error_code, u32 error_code);
|
2008-03-24 21:14:53 +00:00
|
|
|
|
2010-06-10 14:02:14 +00:00
|
|
|
int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
|
2010-06-10 14:02:16 +00:00
|
|
|
int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
|
2010-06-10 14:02:15 +00:00
|
|
|
int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
|
2010-12-21 10:12:00 +00:00
|
|
|
int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8);
|
2010-04-13 07:05:23 +00:00
|
|
|
int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val);
|
|
|
|
int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val);
|
2008-02-24 09:20:43 +00:00
|
|
|
unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu);
|
|
|
|
void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
|
2007-11-19 07:24:28 +00:00
|
|
|
void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l);
|
2010-06-10 03:27:12 +00:00
|
|
|
int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr);
|
2007-11-19 07:24:28 +00:00
|
|
|
|
2015-04-08 13:30:38 +00:00
|
|
|
int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);
|
2012-11-29 20:42:12 +00:00
|
|
|
int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);
|
2007-11-19 07:24:28 +00:00
|
|
|
|
2009-10-05 11:07:21 +00:00
|
|
|
unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu);
|
|
|
|
void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
|
2011-11-10 12:57:23 +00:00
|
|
|
bool kvm_rdpmc(struct kvm_vcpu *vcpu);
|
2009-10-05 11:07:21 +00:00
|
|
|
|
2007-11-25 11:41:11 +00:00
|
|
|
void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
|
|
|
|
void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
|
2010-04-22 10:33:13 +00:00
|
|
|
void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr);
|
|
|
|
void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
|
2010-11-29 14:12:30 +00:00
|
|
|
void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault);
|
2010-09-10 15:30:51 +00:00
|
|
|
int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
|
|
|
|
gfn_t gfn, void *data, int offset, int len,
|
|
|
|
u32 access);
|
2009-09-01 09:03:25 +00:00
|
|
|
bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl);
|
2014-10-02 22:10:05 +00:00
|
|
|
bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr);
|
2007-11-25 11:41:11 +00:00
|
|
|
|
2012-07-19 10:45:20 +00:00
|
|
|
static inline int __kvm_irq_line_state(unsigned long *irq_state,
|
|
|
|
int irq_source_id, int level)
|
|
|
|
{
|
|
|
|
/* Logical OR for level trig interrupt */
|
|
|
|
if (level)
|
|
|
|
__set_bit(irq_source_id, irq_state);
|
|
|
|
else
|
|
|
|
__clear_bit(irq_source_id, irq_state);
|
|
|
|
|
|
|
|
return !!(*irq_state);
|
|
|
|
}
|
|
|
|
|
|
|
|
int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level);
|
|
|
|
void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id);
|
2008-10-06 05:48:45 +00:00
|
|
|
|
2008-05-15 01:52:48 +00:00
|
|
|
void kvm_inject_nmi(struct kvm_vcpu *vcpu);
|
|
|
|
|
KVM: x86: INIT and reset sequences are different
x86 architecture defines differences between the reset and INIT sequences.
INIT does not initialize the FPU (including MMX, XMM, YMM, etc.), TSC, PMU,
MSRs (in general), MTRRs machine-check, APIC ID, APIC arbitration ID and BSP.
References (from Intel SDM):
"If the MP protocol has completed and a BSP is chosen, subsequent INITs (either
to a specific processor or system wide) do not cause the MP protocol to be
repeated." [8.4.2: MP Initialization Protocol Requirements and Restrictions]
[Table 9-1. IA-32 Processor States Following Power-up, Reset, or INIT]
"If the processor is reset by asserting the INIT# pin, the x87 FPU state is not
changed." [9.2: X87 FPU INITIALIZATION]
"The state of the local APIC following an INIT reset is the same as it is after
a power-up or hardware reset, except that the APIC ID and arbitration ID
registers are not affected." [10.4.7.3: Local APIC State After an INIT Reset
("Wait-for-SIPI" State)]
Signed-off-by: Nadav Amit <namit@cs.technion.ac.il>
Message-Id: <1428924848-28212-1-git-send-email-namit@cs.technion.ac.il>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-04-13 11:34:08 +00:00
|
|
|
int fx_init(struct kvm_vcpu *vcpu, bool init_event);
|
2007-11-19 07:24:28 +00:00
|
|
|
|
|
|
|
void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
|
2011-09-22 08:56:39 +00:00
|
|
|
const u8 *new, int bytes);
|
2011-09-22 09:02:48 +00:00
|
|
|
int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn);
|
2007-11-19 07:24:28 +00:00
|
|
|
int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
|
|
|
|
void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
|
|
|
|
int kvm_mmu_load(struct kvm_vcpu *vcpu);
|
|
|
|
void kvm_mmu_unload(struct kvm_vcpu *vcpu);
|
2008-09-23 16:18:34 +00:00
|
|
|
void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu);
|
2014-09-02 11:23:06 +00:00
|
|
|
gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
|
|
|
|
struct x86_exception *exception);
|
2010-11-22 15:53:26 +00:00
|
|
|
gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
|
|
|
|
struct x86_exception *exception);
|
|
|
|
gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
|
|
|
|
struct x86_exception *exception);
|
|
|
|
gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
|
|
|
|
struct x86_exception *exception);
|
|
|
|
gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
|
|
|
|
struct x86_exception *exception);
|
2007-11-19 07:24:28 +00:00
|
|
|
|
|
|
|
int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
|
|
|
|
|
2010-12-21 10:12:07 +00:00
|
|
|
int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code,
|
|
|
|
void *insn, int insn_len);
|
2008-09-23 16:18:35 +00:00
|
|
|
void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva);
|
2013-10-02 14:56:11 +00:00
|
|
|
void kvm_mmu_new_cr3(struct kvm_vcpu *vcpu);
|
2007-10-20 07:34:38 +00:00
|
|
|
|
2008-02-07 12:47:41 +00:00
|
|
|
void kvm_enable_tdp(void);
|
2008-07-14 18:36:36 +00:00
|
|
|
void kvm_disable_tdp(void);
|
2008-02-07 12:47:41 +00:00
|
|
|
|
2014-09-02 11:23:06 +00:00
|
|
|
static inline gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
|
|
|
|
struct x86_exception *exception)
|
2011-11-28 12:42:16 +00:00
|
|
|
{
|
|
|
|
return gpa;
|
|
|
|
}
|
|
|
|
|
2007-11-19 07:08:31 +00:00
|
|
|
static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
|
|
|
|
{
|
|
|
|
struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);
|
|
|
|
|
|
|
|
return (struct kvm_mmu_page *)page_private(page);
|
|
|
|
}
|
|
|
|
|
2008-07-10 13:53:33 +00:00
|
|
|
static inline u16 kvm_read_ldt(void)
|
2007-11-19 07:08:31 +00:00
|
|
|
{
|
|
|
|
u16 ldt;
|
|
|
|
asm("sldt %0" : "=g"(ldt));
|
|
|
|
return ldt;
|
|
|
|
}
|
|
|
|
|
2008-07-10 13:53:33 +00:00
|
|
|
static inline void kvm_load_ldt(u16 sel)
|
2007-11-19 07:08:31 +00:00
|
|
|
{
|
|
|
|
asm("lldt %0" : : "rm"(sel));
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef CONFIG_X86_64
|
|
|
|
static inline unsigned long read_msr(unsigned long msr)
|
|
|
|
{
|
|
|
|
u64 value;
|
|
|
|
|
|
|
|
rdmsrl(msr, value);
|
|
|
|
return value;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
static inline u32 get_rdx_init_val(void)
|
|
|
|
{
|
|
|
|
return 0x600; /* P6 family */
|
|
|
|
}
|
|
|
|
|
2007-11-25 12:12:03 +00:00
|
|
|
static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
|
|
|
|
{
|
|
|
|
kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
|
|
|
|
}
|
|
|
|
|
KVM: x86: Check non-canonical addresses upon WRMSR
Upon WRMSR, the CPU should inject #GP if a non-canonical value (address) is
written to certain MSRs. The behavior is "almost" identical for AMD and Intel
(ignoring MSRs that are not implemented in either architecture since they would
anyhow #GP). However, IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
non-canonical address is written on Intel but not on AMD (which ignores the top
32-bits).
Accordingly, this patch injects a #GP on the MSRs which behave identically on
Intel and AMD. To eliminate the differences between the architecutres, the
value which is written to IA32_SYSENTER_ESP and IA32_SYSENTER_EIP is turned to
canonical value before writing instead of injecting a #GP.
Some references from Intel and AMD manuals:
According to Intel SDM description of WRMSR instruction #GP is expected on
WRMSR "If the source register contains a non-canonical address and ECX
specifies one of the following MSRs: IA32_DS_AREA, IA32_FS_BASE, IA32_GS_BASE,
IA32_KERNEL_GS_BASE, IA32_LSTAR, IA32_SYSENTER_EIP, IA32_SYSENTER_ESP."
According to AMD manual instruction manual:
LSTAR/CSTAR (SYSCALL): "The WRMSR instruction loads the target RIP into the
LSTAR and CSTAR registers. If an RIP written by WRMSR is not in canonical
form, a general-protection exception (#GP) occurs."
IA32_GS_BASE and IA32_FS_BASE (WRFSBASE/WRGSBASE): "The address written to the
base field must be in canonical form or a #GP fault will occur."
IA32_KERNEL_GS_BASE (SWAPGS): "The address stored in the KernelGSbase MSR must
be in canonical form."
This patch fixes CVE-2014-3610.
Cc: stable@vger.kernel.org
Signed-off-by: Nadav Amit <namit@cs.technion.ac.il>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-09-16 00:24:05 +00:00
|
|
|
static inline u64 get_canonical(u64 la)
|
|
|
|
{
|
|
|
|
return ((int64_t)la << 16) >> 16;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline bool is_noncanonical_address(u64 la)
|
|
|
|
{
|
|
|
|
#ifdef CONFIG_X86_64
|
|
|
|
return get_canonical(la) != la;
|
|
|
|
#else
|
|
|
|
return false;
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2007-11-19 07:08:31 +00:00
|
|
|
#define TSS_IOPB_BASE_OFFSET 0x66
|
|
|
|
#define TSS_BASE_SIZE 0x68
|
|
|
|
#define TSS_IOPB_SIZE (65536 / 8)
|
|
|
|
#define TSS_REDIRECTION_SIZE (256 / 8)
|
2008-03-23 08:02:34 +00:00
|
|
|
#define RMODE_TSS_SIZE \
|
|
|
|
(TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
|
2007-12-03 22:15:26 +00:00
|
|
|
|
2008-03-24 21:14:53 +00:00
|
|
|
enum {
|
|
|
|
TASK_SWITCH_CALL = 0,
|
|
|
|
TASK_SWITCH_IRET = 1,
|
|
|
|
TASK_SWITCH_JMP = 2,
|
|
|
|
TASK_SWITCH_GATE = 3,
|
|
|
|
};
|
|
|
|
|
2008-11-25 19:17:04 +00:00
|
|
|
#define HF_GIF_MASK (1 << 0)
|
2008-11-25 19:17:07 +00:00
|
|
|
#define HF_HIF_MASK (1 << 1)
|
|
|
|
#define HF_VINTR_MASK (1 << 2)
|
2009-04-21 14:45:08 +00:00
|
|
|
#define HF_NMI_MASK (1 << 3)
|
2009-05-11 10:35:52 +00:00
|
|
|
#define HF_IRET_MASK (1 << 4)
|
2010-11-29 16:51:47 +00:00
|
|
|
#define HF_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */
|
2015-04-01 13:06:40 +00:00
|
|
|
#define HF_SMM_MASK (1 << 6)
|
|
|
|
#define HF_SMM_INSIDE_NMI_MASK (1 << 7)
|
2008-11-25 19:17:04 +00:00
|
|
|
|
2015-05-18 13:03:39 +00:00
|
|
|
#define __KVM_VCPU_MULTIPLE_ADDRESS_SPACE
|
|
|
|
#define KVM_ADDRESS_SPACE_NUM 2
|
|
|
|
|
|
|
|
#define kvm_arch_vcpu_memslots_id(vcpu) ((vcpu)->arch.hflags & HF_SMM_MASK ? 1 : 0)
|
|
|
|
#define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, (role).smm)
|
|
|
|
|
2008-05-13 10:23:38 +00:00
|
|
|
/*
|
|
|
|
* Hardware virtualization extension instructions may fault if a
|
|
|
|
* reboot turns off virtualization while processes are running.
|
|
|
|
* Trap the fault and ignore the instruction if that happens.
|
|
|
|
*/
|
2010-12-02 15:52:50 +00:00
|
|
|
asmlinkage void kvm_spurious_fault(void);
|
2008-05-13 10:23:38 +00:00
|
|
|
|
2011-05-15 14:13:12 +00:00
|
|
|
#define ____kvm_handle_fault_on_reboot(insn, cleanup_insn) \
|
2008-05-13 10:23:38 +00:00
|
|
|
"666: " insn "\n\t" \
|
2010-12-02 15:52:50 +00:00
|
|
|
"668: \n\t" \
|
2008-08-19 23:00:08 +00:00
|
|
|
".pushsection .fixup, \"ax\" \n" \
|
2008-05-13 10:23:38 +00:00
|
|
|
"667: \n\t" \
|
2011-05-15 14:13:12 +00:00
|
|
|
cleanup_insn "\n\t" \
|
2010-12-02 15:52:50 +00:00
|
|
|
"cmpb $0, kvm_rebooting \n\t" \
|
|
|
|
"jne 668b \n\t" \
|
2008-08-14 18:25:47 +00:00
|
|
|
__ASM_SIZE(push) " $666b \n\t" \
|
2010-12-02 15:52:50 +00:00
|
|
|
"call kvm_spurious_fault \n\t" \
|
2008-05-13 10:23:38 +00:00
|
|
|
".popsection \n\t" \
|
2012-04-20 20:41:59 +00:00
|
|
|
_ASM_EXTABLE(666b, 667b)
|
2008-05-13 10:23:38 +00:00
|
|
|
|
2011-05-15 14:13:12 +00:00
|
|
|
#define __kvm_handle_fault_on_reboot(insn) \
|
|
|
|
____kvm_handle_fault_on_reboot(insn, "")
|
|
|
|
|
2008-07-25 14:24:52 +00:00
|
|
|
#define KVM_ARCH_WANT_MMU_NOTIFIER
|
|
|
|
int kvm_unmap_hva(struct kvm *kvm, unsigned long hva);
|
2012-07-02 08:56:33 +00:00
|
|
|
int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end);
|
2014-09-22 21:54:42 +00:00
|
|
|
int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end);
|
2011-01-13 23:47:10 +00:00
|
|
|
int kvm_test_age_hva(struct kvm *kvm, unsigned long hva);
|
2009-09-23 18:47:18 +00:00
|
|
|
void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);
|
2013-01-25 02:18:51 +00:00
|
|
|
int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v);
|
2009-07-09 12:33:52 +00:00
|
|
|
int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu);
|
|
|
|
int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu);
|
2009-07-09 12:33:53 +00:00
|
|
|
int kvm_cpu_get_interrupt(struct kvm_vcpu *v);
|
KVM: x86: INIT and reset sequences are different
x86 architecture defines differences between the reset and INIT sequences.
INIT does not initialize the FPU (including MMX, XMM, YMM, etc.), TSC, PMU,
MSRs (in general), MTRRs machine-check, APIC ID, APIC arbitration ID and BSP.
References (from Intel SDM):
"If the MP protocol has completed and a BSP is chosen, subsequent INITs (either
to a specific processor or system wide) do not cause the MP protocol to be
repeated." [8.4.2: MP Initialization Protocol Requirements and Restrictions]
[Table 9-1. IA-32 Processor States Following Power-up, Reset, or INIT]
"If the processor is reset by asserting the INIT# pin, the x87 FPU state is not
changed." [9.2: X87 FPU INITIALIZATION]
"The state of the local APIC following an INIT reset is the same as it is after
a power-up or hardware reset, except that the APIC ID and arbitration ID
registers are not affected." [10.4.7.3: Local APIC State After an INIT Reset
("Wait-for-SIPI" State)]
Signed-off-by: Nadav Amit <namit@cs.technion.ac.il>
Message-Id: <1428924848-28212-1-git-send-email-namit@cs.technion.ac.il>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-04-13 11:34:08 +00:00
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void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event);
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2014-09-24 07:57:54 +00:00
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void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu);
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2014-09-24 07:57:57 +00:00
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void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,
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unsigned long address);
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2008-07-25 14:24:52 +00:00
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2009-09-07 08:12:18 +00:00
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void kvm_define_shared_msr(unsigned index, u32 msr);
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2014-08-27 18:16:44 +00:00
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int kvm_set_shared_msr(unsigned index, u64 val, u64 mask);
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2009-09-07 08:12:18 +00:00
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2014-11-02 09:54:45 +00:00
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unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu);
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2010-02-23 16:47:55 +00:00
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bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip);
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2010-10-14 09:22:46 +00:00
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void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
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struct kvm_async_pf *work);
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void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
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struct kvm_async_pf *work);
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2010-10-17 16:13:42 +00:00
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void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu,
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struct kvm_async_pf *work);
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2010-10-14 09:22:53 +00:00
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bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu);
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2010-10-14 09:22:46 +00:00
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extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn);
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2010-12-21 10:12:01 +00:00
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void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err);
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2011-11-10 12:57:22 +00:00
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int kvm_is_in_guest(void);
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void kvm_pmu_init(struct kvm_vcpu *vcpu);
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void kvm_pmu_destroy(struct kvm_vcpu *vcpu);
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void kvm_pmu_reset(struct kvm_vcpu *vcpu);
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void kvm_pmu_cpuid_update(struct kvm_vcpu *vcpu);
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bool kvm_pmu_msr(struct kvm_vcpu *vcpu, u32 msr);
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int kvm_pmu_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *data);
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2013-03-28 16:18:35 +00:00
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int kvm_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info);
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2014-06-02 15:34:09 +00:00
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int kvm_pmu_check_pmc(struct kvm_vcpu *vcpu, unsigned pmc);
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2011-11-10 12:57:22 +00:00
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int kvm_pmu_read_pmc(struct kvm_vcpu *vcpu, unsigned pmc, u64 *data);
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void kvm_handle_pmu_event(struct kvm_vcpu *vcpu);
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void kvm_deliver_pmi(struct kvm_vcpu *vcpu);
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2015-05-18 11:33:16 +00:00
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int __x86_set_memory_region(struct kvm *kvm,
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const struct kvm_userspace_memory_region *mem);
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int x86_set_memory_region(struct kvm *kvm,
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const struct kvm_userspace_memory_region *mem);
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2008-10-23 05:26:29 +00:00
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#endif /* _ASM_X86_KVM_HOST_H */
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