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KVM: x86: Move TSC offset writes to common code
Also, ensure that the storing of the offset and the reading of the TSC are never preempted by taking a spinlock. While the lock is overkill now, it is useful later in this patch series. Signed-off-by: Zachary Amsden <zamsden@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
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@ -395,6 +395,7 @@ struct kvm_arch {
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unsigned long irq_sources_bitmap;
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s64 kvmclock_offset;
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spinlock_t tsc_write_lock;
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struct kvm_xen_hvm_config xen_hvm_config;
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@ -521,6 +522,8 @@ struct kvm_x86_ops {
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bool (*has_wbinvd_exit)(void);
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void (*write_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset);
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const struct trace_print_flags *exit_reasons_str;
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};
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@ -915,7 +915,7 @@ static struct kvm_vcpu *svm_create_vcpu(struct kvm *kvm, unsigned int id)
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svm->vmcb_pa = page_to_pfn(page) << PAGE_SHIFT;
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svm->asid_generation = 0;
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init_vmcb(svm);
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svm_write_tsc_offset(&svm->vcpu, 0-native_read_tsc());
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kvm_write_tsc(&svm->vcpu, 0);
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err = fx_init(&svm->vcpu);
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if (err)
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@ -2581,7 +2581,7 @@ static int svm_set_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 data)
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switch (ecx) {
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case MSR_IA32_TSC:
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svm_write_tsc_offset(vcpu, data - native_read_tsc());
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kvm_write_tsc(vcpu, data);
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break;
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case MSR_STAR:
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svm->vmcb->save.star = data;
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@ -3551,6 +3551,8 @@ static struct kvm_x86_ops svm_x86_ops = {
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.set_supported_cpuid = svm_set_supported_cpuid,
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.has_wbinvd_exit = svm_has_wbinvd_exit,
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.write_tsc_offset = svm_write_tsc_offset,
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};
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static int __init svm_init(void)
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@ -1146,10 +1146,9 @@ static u64 guest_read_tsc(void)
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}
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/*
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* writes 'guest_tsc' into guest's timestamp counter "register"
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* guest_tsc = host_tsc + tsc_offset ==> tsc_offset = guest_tsc - host_tsc
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* writes 'offset' into guest's timestamp counter offset register
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*/
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static void vmx_write_tsc_offset(u64 offset)
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static void vmx_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
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{
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vmcs_write64(TSC_OFFSET, offset);
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}
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@ -1224,7 +1223,6 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
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{
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struct vcpu_vmx *vmx = to_vmx(vcpu);
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struct shared_msr_entry *msr;
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u64 host_tsc;
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int ret = 0;
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switch (msr_index) {
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@ -1254,8 +1252,7 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
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vmcs_writel(GUEST_SYSENTER_ESP, data);
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break;
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case MSR_IA32_TSC:
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rdtscll(host_tsc);
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vmx_write_tsc_offset(data - host_tsc);
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kvm_write_tsc(vcpu, data);
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break;
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case MSR_IA32_CR_PAT:
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if (vmcs_config.vmentry_ctrl & VM_ENTRY_LOAD_IA32_PAT) {
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@ -2653,7 +2650,7 @@ static int vmx_vcpu_setup(struct vcpu_vmx *vmx)
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vmx->vcpu.arch.cr4_guest_owned_bits |= X86_CR4_PGE;
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vmcs_writel(CR4_GUEST_HOST_MASK, ~vmx->vcpu.arch.cr4_guest_owned_bits);
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vmx_write_tsc_offset(0-native_read_tsc());
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kvm_write_tsc(&vmx->vcpu, 0);
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return 0;
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}
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@ -4348,6 +4345,8 @@ static struct kvm_x86_ops vmx_x86_ops = {
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.set_supported_cpuid = vmx_set_supported_cpuid,
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.has_wbinvd_exit = cpu_has_vmx_wbinvd_exit,
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.write_tsc_offset = vmx_write_tsc_offset,
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};
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static int __init vmx_init(void)
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@ -895,6 +895,22 @@ static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *
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static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
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void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
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{
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struct kvm *kvm = vcpu->kvm;
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u64 offset;
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unsigned long flags;
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spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
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offset = data - native_read_tsc();
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kvm_x86_ops->write_tsc_offset(vcpu, offset);
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spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
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/* Reset of TSC must disable overshoot protection below */
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vcpu->arch.hv_clock.tsc_timestamp = 0;
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}
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EXPORT_SYMBOL_GPL(kvm_write_tsc);
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static void kvm_write_guest_time(struct kvm_vcpu *v)
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{
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struct timespec ts;
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@ -5495,6 +5511,8 @@ struct kvm *kvm_arch_create_vm(void)
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/* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
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set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
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spin_lock_init(&kvm->arch.tsc_write_lock);
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return kvm;
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}
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@ -68,4 +68,6 @@ static inline int is_paging(struct kvm_vcpu *vcpu)
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void kvm_before_handle_nmi(struct kvm_vcpu *vcpu);
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void kvm_after_handle_nmi(struct kvm_vcpu *vcpu);
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void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data);
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#endif
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