2005-04-16 22:20:36 +00:00
|
|
|
config MIPS
|
|
|
|
bool
|
|
|
|
default y
|
2015-07-29 20:44:53 +00:00
|
|
|
select ARCH_SUPPORTS_UPROBES
|
2013-10-08 02:13:33 +00:00
|
|
|
select ARCH_MIGHT_HAVE_PC_PARPORT
|
2014-01-01 19:32:00 +00:00
|
|
|
select ARCH_MIGHT_HAVE_PC_SERIO
|
2015-07-30 15:16:10 +00:00
|
|
|
select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
|
2015-09-29 10:19:48 +00:00
|
|
|
select ARCH_USE_BUILTIN_BSWAP
|
2013-05-28 23:07:19 +00:00
|
|
|
select HAVE_CONTEXT_TRACKING
|
2009-06-03 15:16:04 +00:00
|
|
|
select HAVE_GENERIC_DMA_COHERENT
|
2008-02-09 09:46:40 +00:00
|
|
|
select HAVE_IDE
|
2008-02-02 20:10:34 +00:00
|
|
|
select HAVE_OPROFILE
|
2010-10-12 11:37:21 +00:00
|
|
|
select HAVE_PERF_EVENTS
|
|
|
|
select PERF_USE_VMALLOC
|
2008-07-29 20:58:53 +00:00
|
|
|
select HAVE_ARCH_KGDB
|
2014-01-22 14:40:04 +00:00
|
|
|
select HAVE_ARCH_SECCOMP_FILTER
|
2012-08-17 06:22:04 +00:00
|
|
|
select HAVE_ARCH_TRACEHOOK
|
2016-05-13 17:08:28 +00:00
|
|
|
select HAVE_CBPF_JIT if !CPU_MICROMIPS
|
2009-11-20 12:34:29 +00:00
|
|
|
select HAVE_FUNCTION_TRACER
|
MIPS: Tracing: Add dynamic function tracer support
With dynamic function tracer, by default, _mcount is defined as an
"empty" function, it returns directly without any more action . When
enabling it in user-space, it will jump to a real tracing
function(ftrace_caller), and do the real job for us.
Differ from the static function tracer, dynamic function tracer provides
two functions ftrace_make_call()/ftrace_make_nop() to enable/disable the
tracing of some indicated kernel functions(set_ftrace_filter).
In the -v4 version, the implementation of this support is basically the same as
X86 version does: _mcount is implemented as an empty function and ftrace_caller
is implemented as a real tracing function respectively.
But in this version, to support module tracing with the help of
-mlong-calls in arch/mips/Makefile:
MODFLAGS += -mlong-calls.
The stuff becomes a little more complex. We need to cope with two
different type of calling to _mcount.
For the kernel part, the calling to _mcount(result of "objdump -hdr
vmlinux"). is like this:
108: 03e0082d move at,ra
10c: 0c000000 jal 0 <fpcsr_pending>
10c: R_MIPS_26 _mcount
10c: R_MIPS_NONE *ABS*
10c: R_MIPS_NONE *ABS*
110: 00020021 nop
For the module with -mlong-calls, it looks like this:
c: 3c030000 lui v1,0x0
c: R_MIPS_HI16 _mcount
c: R_MIPS_NONE *ABS*
c: R_MIPS_NONE *ABS*
10: 64630000 daddiu v1,v1,0
10: R_MIPS_LO16 _mcount
10: R_MIPS_NONE *ABS*
10: R_MIPS_NONE *ABS*
14: 03e0082d move at,ra
18: 0060f809 jalr v1
In the kernel version, there is only one "_mcount" string for every
kernel function, so, we just need to match this one in mcount_regex of
scripts/recordmcount.pl, but in the module version, we need to choose
one of the two to match. Herein, I choose the first one with
"R_MIPS_HI16 _mcount".
and In the kernel verion, without module tracing support, we just need
to replace "jal _mcount" by "jal ftrace_caller" to do real tracing, and
filter the tracing of some kernel functions via replacing it by a nop
instruction.
but as we have described before, the instruction "jal ftrace_caller" only left
32bit length for the address of ftrace_caller, it will fail when calling from
the module space. so, herein, we must replace something else.
the basic idea is loading the address of ftrace_caller to v1 via changing these
two instructions:
lui v1,0x0
addiu v1,v1,0
If we want to enable the tracing, we need to replace the above instructions to:
lui v1, HI_16BIT_ftrace_caller
addiu v1, v1, LOW_16BIT_ftrace_caller
If we want to stop the tracing of the indicated kernel functions, we
just need to replace the "jalr v1" to a nop instruction. but we need to
replace two instructions and encode the above two instructions
oursevles.
Is there a simpler solution? Yes! Here it is, in this version, we put _mcount
and ftrace_caller together, which means the address of _mcount and
ftrace_caller is the same:
_mcount:
ftrace_caller:
j ftrace_stub
nop
...(do real tracing here)...
ftrace_stub:
jr ra
move ra, at
By default, the kernel functions call _mcount, and then jump to ftrace_stub and
return. and when we want to do real tracing, we just need to remove that "j
ftrace_stub", and it will run through the two "nop" instructions and then do
the real tracing job.
what about filtering job? we just need to do this:
lui v1, hi_16bit_of_mcount <--> b 1f (0x10000004)
addiu v1, v1, low_16bit_of_mcount
move at, ra
jalr v1
nop
1f: (rec->ip + 12)
In linux-mips64, there will be some local symbols, whose name are
prefixed by $L, which need to be filtered. thanks goes to Steven for
writing the mips64-specific function_regex.
In a conclusion, with RISC, things becomes easier with such a "stupid"
trick, RISC is something like K.I.S.S, and also, there are lots of
"simple" tricks in the whole ftrace support, thanks goes to Steven and
the other folks for providing such a wonderful tracing framework!
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Nicholas Mc Guire <der.herr@hofr.at>
Cc: zhangfx@lemote.com
Cc: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/675/
Acked-by: Steven Rostedt <rostedt@goodmis.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-20 12:34:32 +00:00
|
|
|
select HAVE_DYNAMIC_FTRACE
|
|
|
|
select HAVE_FTRACE_MCOUNT_RECORD
|
2010-10-27 10:59:09 +00:00
|
|
|
select HAVE_C_RECORDMCOUNT
|
MIPS: Tracing: Add function graph tracer support for MIPS
The implementation of function graph tracer for MIPS is a little
different from X86.
in MIPS, gcc(with -pg) only transfer the caller's return address(at) and
the _mcount's return address(ra) to us.
For the kernel part without -mlong-calls:
move at, ra
jal _mcount
For the module part with -mlong-calls:
lui v1, hi16bit_of_mcount
addiu v1, v1, low16bit_of_mcount
move at, ra
jal _mcount
Without -mlong-calls,
if the function is a leaf, it will not save the return address(ra):
ffffffff80101298 <au1k_wait>:
ffffffff80101298: 67bdfff0 daddiu sp,sp,-16
ffffffff8010129c: ffbe0008 sd s8,8(sp)
ffffffff801012a0: 03a0f02d move s8,sp
ffffffff801012a4: 03e0082d move at,ra
ffffffff801012a8: 0c042930 jal ffffffff8010a4c0 <_mcount>
ffffffff801012ac: 00020021 nop
so, we can hijack it directly in _mcount, but if the function is non-leaf, the
return address is saved in the stack.
ffffffff80133030 <copy_process>:
ffffffff80133030: 67bdff50 daddiu sp,sp,-176
ffffffff80133034: ffbe00a0 sd s8,160(sp)
ffffffff80133038: 03a0f02d move s8,sp
ffffffff8013303c: ffbf00a8 sd ra,168(sp)
ffffffff80133040: ffb70098 sd s7,152(sp)
ffffffff80133044: ffb60090 sd s6,144(sp)
ffffffff80133048: ffb50088 sd s5,136(sp)
ffffffff8013304c: ffb40080 sd s4,128(sp)
ffffffff80133050: ffb30078 sd s3,120(sp)
ffffffff80133054: ffb20070 sd s2,112(sp)
ffffffff80133058: ffb10068 sd s1,104(sp)
ffffffff8013305c: ffb00060 sd s0,96(sp)
ffffffff80133060: 03e0082d move at,ra
ffffffff80133064: 0c042930 jal ffffffff8010a4c0 <_mcount>
ffffffff80133068: 00020021 nop
but we can not get the exact stack address(which saved ra) directly in
_mcount, we need to search the content of at register in the stack space
or search the "s{d,w} ra, offset(sp)" instruction in the text. 'Cause we
can not prove there is only a match in the stack space, so, we search
the text instead.
as we can see, if the first instruction above "move at, ra" is not a
store instruction, there should be a leaf function, so we hijack the at
register directly via putting &return_to_handler into it, otherwise, we
search the "s{d,w} ra, offset(sp)" instruction to get the stack offset,
and then the stack address. we use the above copy_process() as an
example, we at last find "ffbf00a8", 0xa8 is the stack offset, we plus
it with s8(fp), that is the stack address, we hijack the content via
writing the &return_to_handler in.
If with -mlong-calls, since there are two more instructions above "move
at, ra", so, we can move the pointer to the position above "lui v1,
hi16bit_of_mcount".
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Nicholas Mc Guire <der.herr@hofr.at>
Cc: zhangfx@lemote.com
Cc: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/677/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-20 12:34:34 +00:00
|
|
|
select HAVE_FUNCTION_GRAPH_TRACER
|
2010-08-03 18:22:20 +00:00
|
|
|
select HAVE_KPROBES
|
|
|
|
select HAVE_KRETPROBES
|
2013-09-06 18:24:48 +00:00
|
|
|
select HAVE_SYSCALL_TRACEPOINTS
|
2012-10-08 23:28:11 +00:00
|
|
|
select HAVE_DEBUG_KMEMLEAK
|
2013-09-06 18:24:48 +00:00
|
|
|
select HAVE_SYSCALL_TRACEPOINTS
|
2015-04-14 22:48:00 +00:00
|
|
|
select ARCH_HAS_ELF_RANDOMIZE
|
2013-03-04 04:17:21 +00:00
|
|
|
select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT
|
2015-04-21 02:00:35 +00:00
|
|
|
select RTC_LIB if !MACH_LOONGSON64
|
2010-06-09 04:35:25 +00:00
|
|
|
select GENERIC_ATOMIC64 if !64BIT
|
2012-07-30 21:41:09 +00:00
|
|
|
select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
|
2014-07-16 15:51:32 +00:00
|
|
|
select HAVE_DMA_CONTIGUOUS
|
2010-10-01 20:27:32 +00:00
|
|
|
select HAVE_DMA_API_DEBUG
|
2010-11-05 22:12:48 +00:00
|
|
|
select GENERIC_IRQ_PROBE
|
2011-03-23 21:09:05 +00:00
|
|
|
select GENERIC_IRQ_SHOW
|
2013-06-17 08:09:00 +00:00
|
|
|
select GENERIC_PCI_IOMAP
|
2010-12-28 21:26:23 +00:00
|
|
|
select HAVE_ARCH_JUMP_LABEL
|
2012-07-30 21:42:46 +00:00
|
|
|
select ARCH_WANT_IPC_PARSE_VERSION
|
2011-07-23 12:41:25 +00:00
|
|
|
select IRQ_FORCED_THREADING
|
2011-12-08 18:22:09 +00:00
|
|
|
select HAVE_MEMBLOCK
|
|
|
|
select HAVE_MEMBLOCK_NODE_MAP
|
|
|
|
select ARCH_DISCARD_MEMBLOCK
|
2012-04-20 13:05:51 +00:00
|
|
|
select GENERIC_SMP_IDLE_THREAD
|
2012-04-19 21:59:58 +00:00
|
|
|
select BUILDTIME_EXTABLE_SORT
|
2012-05-18 16:45:50 +00:00
|
|
|
select GENERIC_CLOCKEVENTS
|
2015-03-07 18:30:23 +00:00
|
|
|
select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
|
2012-05-18 16:45:50 +00:00
|
|
|
select GENERIC_CMOS_UPDATE
|
2012-09-28 05:01:03 +00:00
|
|
|
select HAVE_MOD_ARCH_SPECIFIC
|
2016-05-21 00:00:33 +00:00
|
|
|
select HAVE_NMI
|
2013-03-07 04:48:16 +00:00
|
|
|
select VIRT_TO_BUS
|
2012-12-27 18:46:46 +00:00
|
|
|
select MODULES_USE_ELF_REL if MODULES
|
|
|
|
select MODULES_USE_ELF_RELA if MODULES && 64BIT
|
2012-12-27 17:11:46 +00:00
|
|
|
select CLONE_BACKWARDS
|
2013-07-01 20:04:42 +00:00
|
|
|
select HAVE_DEBUG_STACKOVERFLOW
|
2013-12-19 19:35:58 +00:00
|
|
|
select HAVE_CC_STACKPROTECTOR
|
2014-03-04 10:11:39 +00:00
|
|
|
select CPU_PM if CPU_IDLE
|
2014-02-14 09:24:58 +00:00
|
|
|
select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
|
2014-09-11 07:30:22 +00:00
|
|
|
select ARCH_BINFMT_ELF_STATE
|
2015-01-21 10:54:46 +00:00
|
|
|
select SYSCTL_EXCEPTION_TRACE
|
2015-03-07 18:30:21 +00:00
|
|
|
select HAVE_VIRT_CPU_ACCOUNTING_GEN
|
2015-03-07 18:30:35 +00:00
|
|
|
select HAVE_IRQ_TIME_ACCOUNTING
|
MIPS: VDSO: Add implementations of gettimeofday() and clock_gettime()
Add user-mode implementations of gettimeofday() and clock_gettime() to
the VDSO. This is currently usable with 2 clocksources: the CP0 count
register, which is accessible to user-mode via RDHWR on R2 and later
cores, or the MIPS Global Interrupt Controller (GIC) timer, which
provides a "user-mode visible" section containing a mirror of its
counter registers. This section must be mapped into user memory, which
is done below the VDSO data page.
When a supported clocksource is not in use, the VDSO functions will
return -ENOSYS, which causes libc to fall back on the standard syscall
path.
When support for neither of these clocksources is compiled into the
kernel at all, the VDSO still provides clock_gettime(), as the coarse
realtime/monotonic clocks can still be implemented. However,
gettimeofday() is not provided in this case as nothing can be done
without a suitable clocksource. This causes the symbol lookup to fail
in libc and it will then always use the standard syscall path.
This patch includes a workaround for a bug in QEMU which results in
RDHWR on the CP0 count register always returning a constant (incorrect)
value. A fix for this has been submitted, and the workaround can be
removed after the fix has been in stable releases for a reasonable
amount of time.
A simple performance test which calls gettimeofday() 1000 times in a
loop and calculates the average execution time gives the following
results on a Malta + I6400 (running at 20MHz):
- Syscall: ~31000 ns
- VDSO (GIC): ~15000 ns
- VDSO (CP0): ~9500 ns
[markos.chandras@imgtec.com:
- Minor code re-arrangements in order for mappings to be made
in the order they appear to the process' address space.
- Move do_{monotonic, realtime} outside of the MIPS_CLOCK_VSYSCALL ifdef
- Use gic_get_usm_range so we can do the GIC mapping in the
arch/mips/kernel/vdso instead of the GIC irqchip driver]
Signed-off-by: Alex Smith <alex.smith@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/11338/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-10-21 08:57:44 +00:00
|
|
|
select GENERIC_TIME_VSYSCALL
|
|
|
|
select ARCH_CLOCKSOURCE_DATA
|
2016-02-09 19:00:07 +00:00
|
|
|
select HANDLE_DOMAIN_IRQ
|
2005-04-16 22:20:36 +00:00
|
|
|
|
|
|
|
menu "Machine selection"
|
|
|
|
|
2005-10-29 18:32:41 +00:00
|
|
|
choice
|
|
|
|
prompt "System type"
|
|
|
|
default SGI_IP22
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2010-07-15 19:45:04 +00:00
|
|
|
config MIPS_ALCHEMY
|
2007-05-11 11:44:30 +00:00
|
|
|
bool "Alchemy processor based machines"
|
2014-11-21 23:16:48 +00:00
|
|
|
select ARCH_PHYS_ADDR_T_64BIT
|
2012-11-30 16:27:27 +00:00
|
|
|
select CEVT_R4K
|
2012-11-15 05:34:17 +00:00
|
|
|
select CSRC_R4K
|
2015-05-26 16:20:06 +00:00
|
|
|
select IRQ_MIPS_CPU
|
2014-02-20 13:59:23 +00:00
|
|
|
select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is
|
2010-07-15 19:45:04 +00:00
|
|
|
select SYS_HAS_CPU_MIPS32_R1
|
|
|
|
select SYS_SUPPORTS_32BIT_KERNEL
|
|
|
|
select SYS_SUPPORTS_APM_EMULATION
|
2016-04-19 09:23:22 +00:00
|
|
|
select GPIOLIB
|
2009-10-14 10:12:16 +00:00
|
|
|
select SYS_SUPPORTS_ZBOOT
|
2014-07-23 14:36:48 +00:00
|
|
|
select COMMON_CLK
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2009-06-24 09:12:57 +00:00
|
|
|
config AR7
|
|
|
|
bool "Texas Instruments AR7"
|
|
|
|
select BOOT_ELF32
|
|
|
|
select DMA_NONCOHERENT
|
|
|
|
select CEVT_R4K
|
|
|
|
select CSRC_R4K
|
2015-05-26 16:20:06 +00:00
|
|
|
select IRQ_MIPS_CPU
|
2009-06-24 09:12:57 +00:00
|
|
|
select NO_EXCEPT_FILL
|
|
|
|
select SWAP_IO_SPACE
|
|
|
|
select SYS_HAS_CPU_MIPS32_R1
|
|
|
|
select SYS_HAS_EARLY_PRINTK
|
|
|
|
select SYS_SUPPORTS_32BIT_KERNEL
|
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
2014-04-28 23:49:24 +00:00
|
|
|
select SYS_SUPPORTS_MIPS16
|
2009-10-14 10:12:16 +00:00
|
|
|
select SYS_SUPPORTS_ZBOOT_UART16550
|
2016-04-19 09:23:22 +00:00
|
|
|
select GPIOLIB
|
2009-06-24 09:12:57 +00:00
|
|
|
select VLYNQ
|
2012-08-01 06:38:00 +00:00
|
|
|
select HAVE_CLK
|
2009-06-24 09:12:57 +00:00
|
|
|
help
|
|
|
|
Support for the Texas Instruments AR7 System-on-a-Chip
|
|
|
|
family: TNETD7100, 7200 and 7300.
|
|
|
|
|
2014-10-28 23:18:38 +00:00
|
|
|
config ATH25
|
|
|
|
bool "Atheros AR231x/AR531x SoC support"
|
|
|
|
select CEVT_R4K
|
|
|
|
select CSRC_R4K
|
|
|
|
select DMA_NONCOHERENT
|
2015-05-26 16:20:06 +00:00
|
|
|
select IRQ_MIPS_CPU
|
2014-10-28 23:18:41 +00:00
|
|
|
select IRQ_DOMAIN
|
2014-10-28 23:18:38 +00:00
|
|
|
select SYS_HAS_CPU_MIPS32_R1
|
|
|
|
select SYS_SUPPORTS_BIG_ENDIAN
|
|
|
|
select SYS_SUPPORTS_32BIT_KERNEL
|
2014-10-28 23:18:42 +00:00
|
|
|
select SYS_HAS_EARLY_PRINTK
|
2014-10-28 23:18:38 +00:00
|
|
|
help
|
|
|
|
Support for Atheros AR231x and Atheros AR531x based boards
|
|
|
|
|
2011-01-04 20:28:14 +00:00
|
|
|
config ATH79
|
|
|
|
bool "Atheros AR71XX/AR724X/AR913X based boards"
|
2015-08-03 17:23:52 +00:00
|
|
|
select ARCH_HAS_RESET_CONTROLLER
|
2011-01-04 20:28:14 +00:00
|
|
|
select BOOT_RAW
|
|
|
|
select CEVT_R4K
|
|
|
|
select CSRC_R4K
|
|
|
|
select DMA_NONCOHERENT
|
2016-04-19 09:23:22 +00:00
|
|
|
select GPIOLIB
|
2012-08-04 16:01:26 +00:00
|
|
|
select HAVE_CLK
|
2015-04-19 12:30:04 +00:00
|
|
|
select COMMON_CLK
|
2013-08-28 08:41:47 +00:00
|
|
|
select CLKDEV_LOOKUP
|
2015-05-26 16:20:06 +00:00
|
|
|
select IRQ_MIPS_CPU
|
2011-01-04 20:28:16 +00:00
|
|
|
select MIPS_MACHINE
|
2011-01-04 20:28:14 +00:00
|
|
|
select SYS_HAS_CPU_MIPS32_R2
|
|
|
|
select SYS_HAS_EARLY_PRINTK
|
|
|
|
select SYS_SUPPORTS_32BIT_KERNEL
|
|
|
|
select SYS_SUPPORTS_BIG_ENDIAN
|
2014-04-28 23:49:24 +00:00
|
|
|
select SYS_SUPPORTS_MIPS16
|
2016-01-26 08:38:29 +00:00
|
|
|
select SYS_SUPPORTS_ZBOOT_UART_PROM
|
2015-05-30 23:52:25 +00:00
|
|
|
select USE_OF
|
2011-01-04 20:28:14 +00:00
|
|
|
help
|
|
|
|
Support for the Atheros AR71XX/AR724X/AR913X SoCs.
|
|
|
|
|
2014-12-25 17:49:00 +00:00
|
|
|
config BMIPS_GENERIC
|
|
|
|
bool "Broadcom Generic BMIPS kernel"
|
2014-10-21 04:28:05 +00:00
|
|
|
select BOOT_RAW
|
|
|
|
select NO_EXCEPT_FILL
|
|
|
|
select USE_OF
|
|
|
|
select CEVT_R4K
|
|
|
|
select CSRC_R4K
|
|
|
|
select SYNC_R4K
|
|
|
|
select COMMON_CLK
|
2015-11-22 14:30:14 +00:00
|
|
|
select BCM6345_L1_IRQ
|
2014-12-25 17:49:17 +00:00
|
|
|
select BCM7038_L1_IRQ
|
|
|
|
select BCM7120_L2_IRQ
|
|
|
|
select BRCMSTB_L2_IRQ
|
2015-05-26 16:20:06 +00:00
|
|
|
select IRQ_MIPS_CPU
|
2014-12-25 17:49:17 +00:00
|
|
|
select DMA_NONCOHERENT
|
2014-10-21 04:28:05 +00:00
|
|
|
select SYS_SUPPORTS_32BIT_KERNEL
|
2014-12-25 17:49:17 +00:00
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
2014-10-21 04:28:05 +00:00
|
|
|
select SYS_SUPPORTS_BIG_ENDIAN
|
|
|
|
select SYS_SUPPORTS_HIGHMEM
|
2014-12-25 17:49:17 +00:00
|
|
|
select SYS_HAS_CPU_BMIPS32_3300
|
|
|
|
select SYS_HAS_CPU_BMIPS4350
|
|
|
|
select SYS_HAS_CPU_BMIPS4380
|
2014-10-21 04:28:05 +00:00
|
|
|
select SYS_HAS_CPU_BMIPS5000
|
|
|
|
select SWAP_IO_SPACE
|
2014-12-25 17:49:17 +00:00
|
|
|
select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
|
|
|
|
select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
|
|
|
|
select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
|
|
|
|
select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
|
2014-10-21 04:28:05 +00:00
|
|
|
help
|
2014-12-25 17:49:00 +00:00
|
|
|
Build a generic DT-based kernel image that boots on select
|
|
|
|
BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
|
|
|
|
box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
|
|
|
|
must be set appropriately for your board.
|
2014-10-21 04:28:05 +00:00
|
|
|
|
2007-09-25 13:40:12 +00:00
|
|
|
config BCM47XX
|
2010-03-25 10:42:41 +00:00
|
|
|
bool "Broadcom BCM47XX based boards"
|
2012-12-26 20:06:17 +00:00
|
|
|
select BOOT_RAW
|
2007-10-18 16:48:11 +00:00
|
|
|
select CEVT_R4K
|
2007-11-24 22:33:28 +00:00
|
|
|
select CSRC_R4K
|
2007-09-25 13:40:12 +00:00
|
|
|
select DMA_NONCOHERENT
|
|
|
|
select HW_HAS_PCI
|
2015-05-26 16:20:06 +00:00
|
|
|
select IRQ_MIPS_CPU
|
2013-07-23 14:40:37 +00:00
|
|
|
select SYS_HAS_CPU_MIPS32_R1
|
2012-12-26 20:06:18 +00:00
|
|
|
select NO_EXCEPT_FILL
|
2007-09-25 13:40:12 +00:00
|
|
|
select SYS_SUPPORTS_32BIT_KERNEL
|
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
2014-04-28 23:49:24 +00:00
|
|
|
select SYS_SUPPORTS_MIPS16
|
2007-09-25 13:41:24 +00:00
|
|
|
select SYS_HAS_EARLY_PRINTK
|
2014-03-26 20:40:25 +00:00
|
|
|
select USE_GENERIC_EARLY_PRINTK_8250
|
2014-06-17 14:36:50 +00:00
|
|
|
select GPIOLIB
|
|
|
|
select LEDS_GPIO_REGISTER
|
2015-06-10 21:05:08 +00:00
|
|
|
select BCM47XX_NVRAM
|
2016-01-25 08:50:29 +00:00
|
|
|
select BCM47XX_SPROM
|
2007-09-25 13:40:12 +00:00
|
|
|
help
|
|
|
|
Support for BCM47XX based boards
|
|
|
|
|
2009-08-18 12:23:37 +00:00
|
|
|
config BCM63XX
|
|
|
|
bool "Broadcom BCM63XX based boards"
|
2013-06-18 16:55:39 +00:00
|
|
|
select BOOT_RAW
|
2009-08-18 12:23:37 +00:00
|
|
|
select CEVT_R4K
|
|
|
|
select CSRC_R4K
|
2014-07-08 14:26:13 +00:00
|
|
|
select SYNC_R4K
|
2009-08-18 12:23:37 +00:00
|
|
|
select DMA_NONCOHERENT
|
2015-05-26 16:20:06 +00:00
|
|
|
select IRQ_MIPS_CPU
|
2009-08-18 12:23:37 +00:00
|
|
|
select SYS_SUPPORTS_32BIT_KERNEL
|
|
|
|
select SYS_SUPPORTS_BIG_ENDIAN
|
|
|
|
select SYS_HAS_EARLY_PRINTK
|
|
|
|
select SWAP_IO_SPACE
|
2016-04-19 09:23:22 +00:00
|
|
|
select GPIOLIB
|
2012-08-01 06:39:52 +00:00
|
|
|
select HAVE_CLK
|
2014-01-14 17:54:40 +00:00
|
|
|
select MIPS_L1_CACHE_SHIFT_4
|
2009-08-18 12:23:37 +00:00
|
|
|
help
|
|
|
|
Support for BCM63XX based boards
|
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
config MIPS_COBALT
|
2006-05-09 21:34:53 +00:00
|
|
|
bool "Cobalt Server"
|
2007-10-18 16:48:11 +00:00
|
|
|
select CEVT_R4K
|
2007-11-24 22:33:28 +00:00
|
|
|
select CSRC_R4K
|
2007-10-22 10:43:15 +00:00
|
|
|
select CEVT_GT641XX
|
2005-04-16 22:20:36 +00:00
|
|
|
select DMA_NONCOHERENT
|
|
|
|
select HW_HAS_PCI
|
2007-10-11 22:46:10 +00:00
|
|
|
select I8253
|
2005-04-16 22:20:36 +00:00
|
|
|
select I8259
|
2015-05-26 16:20:06 +00:00
|
|
|
select IRQ_MIPS_CPU
|
2007-09-13 14:51:26 +00:00
|
|
|
select IRQ_GT641XX
|
2007-03-14 12:51:26 +00:00
|
|
|
select PCI_GT64XXX_PCI0
|
2009-06-02 14:17:07 +00:00
|
|
|
select PCI
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_NEVADA
|
2007-03-02 03:42:33 +00:00
|
|
|
select SYS_HAS_EARLY_PRINTK
|
2005-09-03 22:56:21 +00:00
|
|
|
select SYS_SUPPORTS_32BIT_KERNEL
|
2008-01-15 18:42:57 +00:00
|
|
|
select SYS_SUPPORTS_64BIT_KERNEL
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
2014-03-26 20:40:25 +00:00
|
|
|
select USE_GENERIC_EARLY_PRINTK_8250
|
2005-04-16 22:20:36 +00:00
|
|
|
|
|
|
|
config MACH_DECSTATION
|
2006-05-09 21:34:53 +00:00
|
|
|
bool "DECstations"
|
2005-04-16 22:20:36 +00:00
|
|
|
select BOOT_ELF32
|
2008-04-25 03:11:44 +00:00
|
|
|
select CEVT_DS1287
|
2014-04-06 20:46:05 +00:00
|
|
|
select CEVT_R4K if CPU_R4X00
|
2008-04-24 00:48:40 +00:00
|
|
|
select CSRC_IOASIC
|
2014-04-06 20:46:05 +00:00
|
|
|
select CSRC_R4K if CPU_R4X00
|
2007-10-23 11:43:11 +00:00
|
|
|
select CPU_DADDI_WORKAROUNDS if 64BIT
|
|
|
|
select CPU_R4000_WORKAROUNDS if 64BIT
|
|
|
|
select CPU_R4400_WORKAROUNDS if 64BIT
|
2005-04-16 22:20:36 +00:00
|
|
|
select DMA_NONCOHERENT
|
2014-04-07 22:39:19 +00:00
|
|
|
select NO_IOPORT_MAP
|
2015-05-26 16:20:06 +00:00
|
|
|
select IRQ_MIPS_CPU
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_R3000
|
|
|
|
select SYS_HAS_CPU_R4X00
|
2005-09-03 22:56:21 +00:00
|
|
|
select SYS_SUPPORTS_32BIT_KERNEL
|
2013-01-17 02:53:19 +00:00
|
|
|
select SYS_SUPPORTS_64BIT_KERNEL
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
2006-06-19 15:19:13 +00:00
|
|
|
select SYS_SUPPORTS_128HZ
|
|
|
|
select SYS_SUPPORTS_256HZ
|
|
|
|
select SYS_SUPPORTS_1024HZ
|
2014-01-14 17:54:38 +00:00
|
|
|
select MIPS_L1_CACHE_SHIFT_4
|
2005-10-29 18:32:41 +00:00
|
|
|
help
|
2005-04-16 22:20:36 +00:00
|
|
|
This enables support for DEC's MIPS based workstations. For details
|
|
|
|
see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
|
|
|
|
DECstation porting pages on <http://decstation.unix-ag.org/>.
|
|
|
|
|
|
|
|
If you have one of the following DECstation Models you definitely
|
|
|
|
want to choose R4xx0 for the CPU Type:
|
|
|
|
|
2007-08-29 13:21:45 +00:00
|
|
|
DECstation 5000/50
|
|
|
|
DECstation 5000/150
|
|
|
|
DECstation 5000/260
|
|
|
|
DECsystem 5900/260
|
2005-04-16 22:20:36 +00:00
|
|
|
|
|
|
|
otherwise choose R3000.
|
|
|
|
|
2005-10-29 18:32:41 +00:00
|
|
|
config MACH_JAZZ
|
2006-05-09 21:34:53 +00:00
|
|
|
bool "Jazz family of machines"
|
2012-11-15 19:48:50 +00:00
|
|
|
select FW_ARC
|
|
|
|
select FW_ARC32
|
2005-10-29 18:32:41 +00:00
|
|
|
select ARCH_MAY_HAVE_PC_FDC
|
2007-10-18 16:48:11 +00:00
|
|
|
select CEVT_R4K
|
2007-11-24 22:33:28 +00:00
|
|
|
select CSRC_R4K
|
2007-12-02 12:00:32 +00:00
|
|
|
select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
|
2005-10-29 18:32:41 +00:00
|
|
|
select GENERIC_ISA_DMA
|
2011-06-01 18:05:10 +00:00
|
|
|
select HAVE_PCSPKR_PLATFORM
|
2015-05-26 16:20:06 +00:00
|
|
|
select IRQ_MIPS_CPU
|
2007-10-11 22:46:10 +00:00
|
|
|
select I8253
|
2005-10-29 18:32:41 +00:00
|
|
|
select I8259
|
|
|
|
select ISA
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_R4X00
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_32BIT_KERNEL
|
2013-01-17 02:53:19 +00:00
|
|
|
select SYS_SUPPORTS_64BIT_KERNEL
|
2006-06-19 15:19:13 +00:00
|
|
|
select SYS_SUPPORTS_100HZ
|
2005-04-16 22:20:36 +00:00
|
|
|
help
|
2005-10-29 18:32:41 +00:00
|
|
|
This a family of machines based on the MIPS R4030 chipset which was
|
|
|
|
used by several vendors to build RISC/os and Windows NT workstations.
|
2009-01-26 10:12:25 +00:00
|
|
|
Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
|
2005-10-29 18:32:41 +00:00
|
|
|
Olivetti M700-10 workstations.
|
|
|
|
|
2015-05-24 15:11:13 +00:00
|
|
|
config MACH_INGENIC
|
|
|
|
bool "Ingenic SoC based machines"
|
2010-06-19 04:08:19 +00:00
|
|
|
select SYS_SUPPORTS_32BIT_KERNEL
|
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
2012-03-30 14:48:05 +00:00
|
|
|
select SYS_SUPPORTS_ZBOOT_UART16550
|
2010-06-19 04:08:19 +00:00
|
|
|
select DMA_NONCOHERENT
|
2015-05-26 16:20:06 +00:00
|
|
|
select IRQ_MIPS_CPU
|
2016-04-19 09:23:22 +00:00
|
|
|
select GPIOLIB
|
2015-05-24 15:11:36 +00:00
|
|
|
select COMMON_CLK
|
2011-09-24 00:29:46 +00:00
|
|
|
select GENERIC_IRQ_CHIP
|
2015-05-24 15:11:15 +00:00
|
|
|
select BUILTIN_DTB
|
|
|
|
select USE_OF
|
2015-05-24 15:11:42 +00:00
|
|
|
select LIBFDT
|
2010-06-19 04:08:19 +00:00
|
|
|
|
2011-03-30 07:27:47 +00:00
|
|
|
config LANTIQ
|
|
|
|
bool "Lantiq based platforms"
|
|
|
|
select DMA_NONCOHERENT
|
2015-05-26 16:20:06 +00:00
|
|
|
select IRQ_MIPS_CPU
|
2011-03-30 07:27:47 +00:00
|
|
|
select CEVT_R4K
|
|
|
|
select CSRC_R4K
|
|
|
|
select SYS_HAS_CPU_MIPS32_R1
|
|
|
|
select SYS_HAS_CPU_MIPS32_R2
|
|
|
|
select SYS_SUPPORTS_BIG_ENDIAN
|
|
|
|
select SYS_SUPPORTS_32BIT_KERNEL
|
2014-04-28 23:49:24 +00:00
|
|
|
select SYS_SUPPORTS_MIPS16
|
2011-03-30 07:27:47 +00:00
|
|
|
select SYS_SUPPORTS_MULTITHREADING
|
|
|
|
select SYS_HAS_EARLY_PRINTK
|
2016-04-19 09:23:22 +00:00
|
|
|
select GPIOLIB
|
2011-03-30 07:27:47 +00:00
|
|
|
select SWAP_IO_SPACE
|
|
|
|
select BOOT_RAW
|
2012-04-17 13:53:19 +00:00
|
|
|
select CLKDEV_LOOKUP
|
2012-04-13 18:56:13 +00:00
|
|
|
select USE_OF
|
2012-08-28 10:44:59 +00:00
|
|
|
select PINCTRL
|
|
|
|
select PINCTRL_LANTIQ
|
2013-09-03 11:18:12 +00:00
|
|
|
select ARCH_HAS_RESET_CONTROLLER
|
|
|
|
select RESET_CONTROLLER
|
2011-03-30 07:27:47 +00:00
|
|
|
|
2007-08-21 20:34:16 +00:00
|
|
|
config LASAT
|
|
|
|
bool "LASAT Networks platforms"
|
2007-10-18 16:48:11 +00:00
|
|
|
select CEVT_R4K
|
2014-06-26 13:43:01 +00:00
|
|
|
select CRC32
|
2007-11-24 22:33:28 +00:00
|
|
|
select CSRC_R4K
|
2007-08-21 20:34:16 +00:00
|
|
|
select DMA_NONCOHERENT
|
|
|
|
select SYS_HAS_EARLY_PRINTK
|
|
|
|
select HW_HAS_PCI
|
2015-05-26 16:20:06 +00:00
|
|
|
select IRQ_MIPS_CPU
|
2007-08-21 20:34:16 +00:00
|
|
|
select PCI_GT64XXX_PCI0
|
|
|
|
select MIPS_NILE4
|
|
|
|
select R5000_CPU_SCACHE
|
|
|
|
select SYS_HAS_CPU_R5000
|
|
|
|
select SYS_SUPPORTS_32BIT_KERNEL
|
|
|
|
select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
|
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
|
|
|
|
2015-04-21 02:00:35 +00:00
|
|
|
config MACH_LOONGSON32
|
|
|
|
bool "Loongson-1 family of machines"
|
2010-01-04 09:16:46 +00:00
|
|
|
select SYS_SUPPORTS_ZBOOT
|
2007-07-27 06:25:43 +00:00
|
|
|
help
|
2015-04-21 02:00:35 +00:00
|
|
|
This enables support for the Loongson-1 family of machines.
|
2009-07-02 15:26:45 +00:00
|
|
|
|
2015-04-21 02:00:35 +00:00
|
|
|
Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
|
|
|
|
the Institute of Computing Technology (ICT), Chinese Academy of
|
|
|
|
Sciences (CAS).
|
2007-07-27 06:25:43 +00:00
|
|
|
|
2015-04-21 02:00:35 +00:00
|
|
|
config MACH_LOONGSON64
|
|
|
|
bool "Loongson-2/3 family of machines"
|
2012-07-25 14:17:24 +00:00
|
|
|
select SYS_SUPPORTS_ZBOOT
|
|
|
|
help
|
2015-04-21 02:00:35 +00:00
|
|
|
This enables the support of Loongson-2/3 family of machines.
|
2012-07-25 14:17:24 +00:00
|
|
|
|
2015-04-21 02:00:35 +00:00
|
|
|
Loongson-2 is a family of single-core CPUs and Loongson-3 is a
|
|
|
|
family of multi-core CPUs. They are both 64-bit general-purpose
|
|
|
|
MIPS-compatible CPUs. Loongson-2/3 are developed by the Institute
|
|
|
|
of Computing Technology (ICT), Chinese Academy of Sciences (CAS)
|
|
|
|
in the People's Republic of China. The chief architect is Professor
|
|
|
|
Weiwu Hu.
|
2012-07-25 14:17:24 +00:00
|
|
|
|
2015-03-16 21:43:10 +00:00
|
|
|
config MACH_PISTACHIO
|
|
|
|
bool "IMG Pistachio SoC based boards"
|
|
|
|
select BOOT_ELF32
|
|
|
|
select BOOT_RAW
|
|
|
|
select CEVT_R4K
|
|
|
|
select CLKSRC_MIPS_GIC
|
|
|
|
select COMMON_CLK
|
|
|
|
select CSRC_R4K
|
2016-06-03 08:35:00 +00:00
|
|
|
select DMA_NONCOHERENT
|
2016-04-19 09:23:22 +00:00
|
|
|
select GPIOLIB
|
2015-05-26 16:20:06 +00:00
|
|
|
select IRQ_MIPS_CPU
|
2015-03-16 21:43:10 +00:00
|
|
|
select LIBFDT
|
|
|
|
select MFD_SYSCON
|
|
|
|
select MIPS_CPU_SCACHE
|
|
|
|
select MIPS_GIC
|
|
|
|
select PINCTRL
|
|
|
|
select REGULATOR
|
|
|
|
select SYS_HAS_CPU_MIPS32_R2
|
|
|
|
select SYS_SUPPORTS_32BIT_KERNEL
|
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
|
|
|
select SYS_SUPPORTS_MIPS_CPS
|
|
|
|
select SYS_SUPPORTS_MULTITHREADING
|
2016-05-25 11:58:40 +00:00
|
|
|
select SYS_SUPPORTS_RELOCATABLE
|
2015-03-16 21:43:10 +00:00
|
|
|
select SYS_SUPPORTS_ZBOOT
|
2015-04-28 22:08:35 +00:00
|
|
|
select SYS_HAS_EARLY_PRINTK
|
|
|
|
select USE_GENERIC_EARLY_PRINTK_8250
|
2015-03-16 21:43:10 +00:00
|
|
|
select USE_OF
|
|
|
|
help
|
|
|
|
This enables support for the IMG Pistachio SoC platform.
|
|
|
|
|
2015-10-26 11:30:56 +00:00
|
|
|
config MACH_XILFPGA
|
|
|
|
bool "MIPSfpga Xilinx based boards"
|
|
|
|
select BOOT_ELF32
|
|
|
|
select BOOT_RAW
|
|
|
|
select BUILTIN_DTB
|
|
|
|
select CEVT_R4K
|
|
|
|
select COMMON_CLK
|
|
|
|
select CSRC_R4K
|
2016-04-19 09:23:22 +00:00
|
|
|
select GPIOLIB
|
2015-10-26 11:30:56 +00:00
|
|
|
select IRQ_MIPS_CPU
|
|
|
|
select LIBFDT
|
|
|
|
select MIPS_CPU_SCACHE
|
|
|
|
select SYS_HAS_EARLY_PRINTK
|
|
|
|
select SYS_HAS_CPU_MIPS32_R2
|
|
|
|
select SYS_SUPPORTS_32BIT_KERNEL
|
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
|
|
|
select SYS_SUPPORTS_ZBOOT_UART16550
|
|
|
|
select USE_OF
|
|
|
|
select USE_GENERIC_EARLY_PRINTK_8250
|
|
|
|
help
|
|
|
|
This enables support for the IMG University Program MIPSfpga platform.
|
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
config MIPS_MALTA
|
2006-05-09 21:34:53 +00:00
|
|
|
bool "MIPS Malta board"
|
2005-09-15 08:52:34 +00:00
|
|
|
select ARCH_MAY_HAVE_PC_FDC
|
2005-04-16 22:20:36 +00:00
|
|
|
select BOOT_ELF32
|
2008-01-29 10:15:00 +00:00
|
|
|
select BOOT_RAW
|
2015-05-22 15:51:02 +00:00
|
|
|
select BUILTIN_DTB
|
2007-10-18 16:48:11 +00:00
|
|
|
select CEVT_R4K
|
2007-11-24 22:33:28 +00:00
|
|
|
select CSRC_R4K
|
2014-10-20 19:03:58 +00:00
|
|
|
select CLKSRC_MIPS_GIC
|
2015-08-22 09:40:41 +00:00
|
|
|
select COMMON_CLK
|
2013-09-27 12:41:44 +00:00
|
|
|
select DMA_MAYBE_COHERENT
|
2005-04-16 22:20:36 +00:00
|
|
|
select GENERIC_ISA_DMA
|
2011-06-01 18:05:10 +00:00
|
|
|
select HAVE_PCSPKR_PLATFORM
|
2015-05-26 16:20:06 +00:00
|
|
|
select IRQ_MIPS_CPU
|
2014-09-18 21:47:19 +00:00
|
|
|
select MIPS_GIC
|
2005-04-16 22:20:36 +00:00
|
|
|
select HW_HAS_PCI
|
2007-10-11 22:46:10 +00:00
|
|
|
select I8253
|
2005-04-16 22:20:36 +00:00
|
|
|
select I8259
|
2005-10-29 18:32:41 +00:00
|
|
|
select MIPS_BONITO64
|
2006-06-20 16:15:20 +00:00
|
|
|
select MIPS_CPU_SCACHE
|
2014-10-21 04:27:57 +00:00
|
|
|
select MIPS_L1_CACHE_SHIFT_6
|
2007-03-14 12:51:26 +00:00
|
|
|
select PCI_GT64XXX_PCI0
|
2005-10-29 18:32:41 +00:00
|
|
|
select MIPS_MSC
|
2015-09-22 18:58:43 +00:00
|
|
|
select SMP_UP if SMP
|
2005-04-16 22:20:36 +00:00
|
|
|
select SWAP_IO_SPACE
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_MIPS32_R1
|
|
|
|
select SYS_HAS_CPU_MIPS32_R2
|
2014-01-16 13:12:36 +00:00
|
|
|
select SYS_HAS_CPU_MIPS32_R3_5
|
2015-02-27 00:16:38 +00:00
|
|
|
select SYS_HAS_CPU_MIPS32_R5
|
2014-11-19 11:31:56 +00:00
|
|
|
select SYS_HAS_CPU_MIPS32_R6
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_MIPS64_R1
|
2012-07-19 07:11:15 +00:00
|
|
|
select SYS_HAS_CPU_MIPS64_R2
|
2014-11-19 11:31:56 +00:00
|
|
|
select SYS_HAS_CPU_MIPS64_R6
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_NEVADA
|
|
|
|
select SYS_HAS_CPU_RM7000
|
2005-09-03 22:56:21 +00:00
|
|
|
select SYS_SUPPORTS_32BIT_KERNEL
|
|
|
|
select SYS_SUPPORTS_64BIT_KERNEL
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_BIG_ENDIAN
|
2015-02-27 00:16:38 +00:00
|
|
|
select SYS_SUPPORTS_HIGHMEM
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
2014-11-15 22:07:07 +00:00
|
|
|
select SYS_SUPPORTS_MICROMIPS
|
2009-06-17 23:22:53 +00:00
|
|
|
select SYS_SUPPORTS_MIPS_CMP
|
2014-01-15 10:31:56 +00:00
|
|
|
select SYS_SUPPORTS_MIPS_CPS
|
2014-04-28 23:49:24 +00:00
|
|
|
select SYS_SUPPORTS_MIPS16
|
2006-06-05 16:24:46 +00:00
|
|
|
select SYS_SUPPORTS_MULTITHREADING
|
2007-02-02 16:41:47 +00:00
|
|
|
select SYS_SUPPORTS_SMARTMIPS
|
2009-10-14 10:12:16 +00:00
|
|
|
select SYS_SUPPORTS_ZBOOT
|
2016-03-31 09:05:39 +00:00
|
|
|
select SYS_SUPPORTS_RELOCATABLE
|
2015-05-22 15:51:02 +00:00
|
|
|
select USE_OF
|
2015-04-27 14:07:19 +00:00
|
|
|
select ZONE_DMA32 if 64BIT
|
2015-09-22 18:56:38 +00:00
|
|
|
select BUILTIN_DTB
|
|
|
|
select LIBFDT
|
2005-04-16 22:20:36 +00:00
|
|
|
help
|
2005-02-02 22:23:46 +00:00
|
|
|
This enables support for the MIPS Technologies Malta evaluation
|
2005-04-16 22:20:36 +00:00
|
|
|
board.
|
|
|
|
|
2016-01-14 01:15:39 +00:00
|
|
|
config MACH_PIC32
|
|
|
|
bool "Microchip PIC32 Family"
|
|
|
|
help
|
|
|
|
This enables support for the Microchip PIC32 family of platforms.
|
|
|
|
|
|
|
|
Microchip PIC32 is a family of general-purpose 32 bit MIPS core
|
|
|
|
microcontrollers.
|
|
|
|
|
2012-05-11 02:46:20 +00:00
|
|
|
config MIPS_SEAD3
|
|
|
|
bool "MIPS SEAD3 board"
|
|
|
|
select BOOT_ELF32
|
|
|
|
select BOOT_RAW
|
2014-08-21 20:04:24 +00:00
|
|
|
select BUILTIN_DTB
|
2012-05-11 02:46:20 +00:00
|
|
|
select CEVT_R4K
|
|
|
|
select CSRC_R4K
|
2014-10-20 19:03:58 +00:00
|
|
|
select CLKSRC_MIPS_GIC
|
2015-08-22 09:40:41 +00:00
|
|
|
select COMMON_CLK
|
2012-05-11 02:46:20 +00:00
|
|
|
select CPU_MIPSR2_IRQ_VI
|
|
|
|
select CPU_MIPSR2_IRQ_EI
|
|
|
|
select DMA_NONCOHERENT
|
2015-05-26 16:20:06 +00:00
|
|
|
select IRQ_MIPS_CPU
|
2014-09-18 21:47:19 +00:00
|
|
|
select MIPS_GIC
|
2013-12-06 11:00:42 +00:00
|
|
|
select LIBFDT
|
2012-05-11 02:46:20 +00:00
|
|
|
select MIPS_MSC
|
|
|
|
select SYS_HAS_CPU_MIPS32_R1
|
|
|
|
select SYS_HAS_CPU_MIPS32_R2
|
2016-02-03 12:06:35 +00:00
|
|
|
select SYS_HAS_CPU_MIPS32_R6
|
2012-05-11 02:46:20 +00:00
|
|
|
select SYS_HAS_CPU_MIPS64_R1
|
|
|
|
select SYS_HAS_EARLY_PRINTK
|
|
|
|
select SYS_SUPPORTS_32BIT_KERNEL
|
|
|
|
select SYS_SUPPORTS_64BIT_KERNEL
|
|
|
|
select SYS_SUPPORTS_BIG_ENDIAN
|
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
|
|
|
select SYS_SUPPORTS_SMARTMIPS
|
2013-02-05 22:52:02 +00:00
|
|
|
select SYS_SUPPORTS_MICROMIPS
|
2014-04-28 23:49:24 +00:00
|
|
|
select SYS_SUPPORTS_MIPS16
|
2016-03-31 09:05:39 +00:00
|
|
|
select SYS_SUPPORTS_RELOCATABLE
|
2012-05-11 02:46:20 +00:00
|
|
|
select USB_EHCI_BIG_ENDIAN_DESC
|
|
|
|
select USB_EHCI_BIG_ENDIAN_MMIO
|
2013-01-17 17:37:03 +00:00
|
|
|
select USE_OF
|
2012-05-11 02:46:20 +00:00
|
|
|
help
|
|
|
|
This enables support for the MIPS Technologies SEAD3 evaluation
|
|
|
|
board.
|
|
|
|
|
2009-03-13 20:17:57 +00:00
|
|
|
config NEC_MARKEINS
|
|
|
|
bool "NEC EMMA2RH Mark-eins board"
|
|
|
|
select SOC_EMMA2RH
|
|
|
|
select HW_HAS_PCI
|
|
|
|
help
|
|
|
|
This enables support for the NEC Electronics Mark-eins boards.
|
2007-07-27 06:25:43 +00:00
|
|
|
|
2005-10-29 18:32:41 +00:00
|
|
|
config MACH_VR41XX
|
2007-04-26 10:45:09 +00:00
|
|
|
bool "NEC VR4100 series based machines"
|
2007-10-18 16:48:11 +00:00
|
|
|
select CEVT_R4K
|
2007-11-24 22:33:28 +00:00
|
|
|
select CSRC_R4K
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_VR41XX
|
2014-04-28 23:49:24 +00:00
|
|
|
select SYS_SUPPORTS_MIPS16
|
2016-04-19 09:23:22 +00:00
|
|
|
select GPIOLIB
|
2005-10-29 18:32:41 +00:00
|
|
|
|
2008-06-16 14:49:21 +00:00
|
|
|
config NXP_STB220
|
|
|
|
bool "NXP STB220 board"
|
|
|
|
select SOC_PNX833X
|
|
|
|
help
|
|
|
|
Support for NXP Semiconductors STB220 Development Board.
|
|
|
|
|
|
|
|
config NXP_STB225
|
|
|
|
bool "NXP 225 board"
|
|
|
|
select SOC_PNX833X
|
|
|
|
select SOC_PNX8335
|
|
|
|
help
|
|
|
|
Support for NXP Semiconductors STB225 Development Board.
|
|
|
|
|
2007-06-14 21:55:31 +00:00
|
|
|
config PMC_MSP
|
|
|
|
bool "PMC-Sierra MSP chipsets"
|
2010-11-18 08:12:28 +00:00
|
|
|
select CEVT_R4K
|
|
|
|
select CSRC_R4K
|
2007-06-14 21:55:31 +00:00
|
|
|
select DMA_NONCOHERENT
|
|
|
|
select SWAP_IO_SPACE
|
|
|
|
select NO_EXCEPT_FILL
|
|
|
|
select BOOT_RAW
|
|
|
|
select SYS_HAS_CPU_MIPS32_R1
|
|
|
|
select SYS_HAS_CPU_MIPS32_R2
|
|
|
|
select SYS_SUPPORTS_32BIT_KERNEL
|
|
|
|
select SYS_SUPPORTS_BIG_ENDIAN
|
2014-04-28 23:49:24 +00:00
|
|
|
select SYS_SUPPORTS_MIPS16
|
2015-05-26 16:20:06 +00:00
|
|
|
select IRQ_MIPS_CPU
|
2007-06-14 21:55:31 +00:00
|
|
|
select SERIAL_8250
|
|
|
|
select SERIAL_8250_CONSOLE
|
2013-04-09 12:29:26 +00:00
|
|
|
select USB_EHCI_BIG_ENDIAN_MMIO
|
|
|
|
select USB_EHCI_BIG_ENDIAN_DESC
|
2007-06-14 21:55:31 +00:00
|
|
|
help
|
|
|
|
This adds support for the PMC-Sierra family of Multi-Service
|
|
|
|
Processor System-On-A-Chips. These parts include a number
|
|
|
|
of integrated peripherals, interfaces and DSPs in addition to
|
|
|
|
a variety of MIPS cores.
|
|
|
|
|
2013-01-20 21:05:30 +00:00
|
|
|
config RALINK
|
|
|
|
bool "Ralink based machines"
|
|
|
|
select CEVT_R4K
|
|
|
|
select CSRC_R4K
|
|
|
|
select BOOT_RAW
|
|
|
|
select DMA_NONCOHERENT
|
2015-05-26 16:20:06 +00:00
|
|
|
select IRQ_MIPS_CPU
|
2013-01-20 21:05:30 +00:00
|
|
|
select USE_OF
|
|
|
|
select SYS_HAS_CPU_MIPS32_R1
|
|
|
|
select SYS_HAS_CPU_MIPS32_R2
|
|
|
|
select SYS_SUPPORTS_32BIT_KERNEL
|
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
2014-04-28 23:49:24 +00:00
|
|
|
select SYS_SUPPORTS_MIPS16
|
2013-01-20 21:05:30 +00:00
|
|
|
select SYS_HAS_EARLY_PRINTK
|
|
|
|
select CLKDEV_LOOKUP
|
2013-09-03 22:16:59 +00:00
|
|
|
select ARCH_HAS_RESET_CONTROLLER
|
|
|
|
select RESET_CONTROLLER
|
2013-01-20 21:05:30 +00:00
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
config SGI_IP22
|
2006-05-09 21:34:53 +00:00
|
|
|
bool "SGI IP22 (Indy/Indigo2)"
|
2012-11-15 19:48:50 +00:00
|
|
|
select FW_ARC
|
|
|
|
select FW_ARC32
|
2005-04-16 22:20:36 +00:00
|
|
|
select BOOT_ELF32
|
2007-10-18 16:48:11 +00:00
|
|
|
select CEVT_R4K
|
2007-11-24 22:33:28 +00:00
|
|
|
select CSRC_R4K
|
2007-12-02 12:00:32 +00:00
|
|
|
select DEFAULT_SGI_PARTITION
|
2005-04-16 22:20:36 +00:00
|
|
|
select DMA_NONCOHERENT
|
2005-10-29 18:32:41 +00:00
|
|
|
select HW_HAS_EISA
|
2007-10-11 22:46:10 +00:00
|
|
|
select I8253
|
2007-11-23 19:34:16 +00:00
|
|
|
select I8259
|
2005-04-16 22:20:36 +00:00
|
|
|
select IP22_CPU_SCACHE
|
2015-05-26 16:20:06 +00:00
|
|
|
select IRQ_MIPS_CPU
|
2006-11-30 01:14:51 +00:00
|
|
|
select GENERIC_ISA_DMA_SUPPORT_BROKEN
|
2007-12-02 12:00:32 +00:00
|
|
|
select SGI_HAS_I8042
|
|
|
|
select SGI_HAS_INDYDOG
|
2008-07-16 12:06:15 +00:00
|
|
|
select SGI_HAS_HAL2
|
2007-12-02 12:00:32 +00:00
|
|
|
select SGI_HAS_SEEQ
|
|
|
|
select SGI_HAS_WD93
|
|
|
|
select SGI_HAS_ZILOG
|
2005-04-16 22:20:36 +00:00
|
|
|
select SWAP_IO_SPACE
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_R4X00
|
|
|
|
select SYS_HAS_CPU_R5000
|
2009-11-19 16:40:09 +00:00
|
|
|
#
|
|
|
|
# Disable EARLY_PRINTK for now since it leads to overwritten prom
|
|
|
|
# memory during early boot on some machines.
|
|
|
|
#
|
|
|
|
# See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
|
|
|
|
# for a more details discussion
|
|
|
|
#
|
|
|
|
# select SYS_HAS_EARLY_PRINTK
|
2005-09-03 22:56:21 +00:00
|
|
|
select SYS_SUPPORTS_32BIT_KERNEL
|
|
|
|
select SYS_SUPPORTS_64BIT_KERNEL
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_BIG_ENDIAN
|
2014-01-14 17:54:38 +00:00
|
|
|
select MIPS_L1_CACHE_SHIFT_7
|
2005-04-16 22:20:36 +00:00
|
|
|
help
|
|
|
|
This are the SGI Indy, Challenge S and Indigo2, as well as certain
|
|
|
|
OEM variants like the Tandem CMN B006S. To compile a Linux kernel
|
|
|
|
that runs on these, say Y here.
|
|
|
|
|
|
|
|
config SGI_IP27
|
2006-05-09 21:34:53 +00:00
|
|
|
bool "SGI IP27 (Origin200/2000)"
|
2012-11-15 19:48:50 +00:00
|
|
|
select FW_ARC
|
|
|
|
select FW_ARC64
|
2005-10-29 18:32:41 +00:00
|
|
|
select BOOT_ELF64
|
2007-12-02 12:00:32 +00:00
|
|
|
select DEFAULT_SGI_PARTITION
|
2009-01-28 17:48:40 +00:00
|
|
|
select DMA_COHERENT
|
2007-03-01 11:56:43 +00:00
|
|
|
select SYS_HAS_EARLY_PRINTK
|
2005-04-16 22:20:36 +00:00
|
|
|
select HW_HAS_PCI
|
2007-02-06 16:53:15 +00:00
|
|
|
select NR_CPUS_DEFAULT_64
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_R10000
|
2005-09-03 22:56:21 +00:00
|
|
|
select SYS_SUPPORTS_64BIT_KERNEL
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_BIG_ENDIAN
|
2006-06-11 22:03:08 +00:00
|
|
|
select SYS_SUPPORTS_NUMA
|
2006-11-02 17:23:33 +00:00
|
|
|
select SYS_SUPPORTS_SMP
|
2014-01-14 17:54:38 +00:00
|
|
|
select MIPS_L1_CACHE_SHIFT_7
|
2005-04-16 22:20:36 +00:00
|
|
|
help
|
|
|
|
This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
|
|
|
|
workstations. To compile a Linux kernel that runs on these, say Y
|
|
|
|
here.
|
|
|
|
|
2007-12-02 12:00:32 +00:00
|
|
|
config SGI_IP28
|
2013-01-17 02:53:19 +00:00
|
|
|
bool "SGI IP28 (Indigo2 R10k)"
|
2012-11-15 19:48:50 +00:00
|
|
|
select FW_ARC
|
|
|
|
select FW_ARC64
|
2007-12-02 12:00:32 +00:00
|
|
|
select BOOT_ELF64
|
|
|
|
select CEVT_R4K
|
|
|
|
select CSRC_R4K
|
|
|
|
select DEFAULT_SGI_PARTITION
|
|
|
|
select DMA_NONCOHERENT
|
|
|
|
select GENERIC_ISA_DMA_SUPPORT_BROKEN
|
2015-05-26 16:20:06 +00:00
|
|
|
select IRQ_MIPS_CPU
|
2007-12-02 12:00:32 +00:00
|
|
|
select HW_HAS_EISA
|
|
|
|
select I8253
|
|
|
|
select I8259
|
|
|
|
select SGI_HAS_I8042
|
|
|
|
select SGI_HAS_INDYDOG
|
2008-07-10 18:29:55 +00:00
|
|
|
select SGI_HAS_HAL2
|
2007-12-02 12:00:32 +00:00
|
|
|
select SGI_HAS_SEEQ
|
|
|
|
select SGI_HAS_WD93
|
|
|
|
select SGI_HAS_ZILOG
|
|
|
|
select SWAP_IO_SPACE
|
|
|
|
select SYS_HAS_CPU_R10000
|
2009-11-19 16:40:09 +00:00
|
|
|
#
|
|
|
|
# Disable EARLY_PRINTK for now since it leads to overwritten prom
|
|
|
|
# memory during early boot on some machines.
|
|
|
|
#
|
|
|
|
# See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
|
|
|
|
# for a more details discussion
|
|
|
|
#
|
|
|
|
# select SYS_HAS_EARLY_PRINTK
|
2007-12-02 12:00:32 +00:00
|
|
|
select SYS_SUPPORTS_64BIT_KERNEL
|
|
|
|
select SYS_SUPPORTS_BIG_ENDIAN
|
2014-08-19 20:00:07 +00:00
|
|
|
select MIPS_L1_CACHE_SHIFT_7
|
2007-12-02 12:00:32 +00:00
|
|
|
help
|
|
|
|
This is the SGI Indigo2 with R10000 processor. To compile a Linux
|
|
|
|
kernel that runs on these, say Y here.
|
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
config SGI_IP32
|
2007-07-10 16:33:00 +00:00
|
|
|
bool "SGI IP32 (O2)"
|
2012-11-15 19:48:50 +00:00
|
|
|
select FW_ARC
|
|
|
|
select FW_ARC32
|
2005-04-16 22:20:36 +00:00
|
|
|
select BOOT_ELF32
|
2007-10-18 16:48:11 +00:00
|
|
|
select CEVT_R4K
|
2007-11-24 22:33:28 +00:00
|
|
|
select CSRC_R4K
|
2005-04-16 22:20:36 +00:00
|
|
|
select DMA_NONCOHERENT
|
|
|
|
select HW_HAS_PCI
|
2015-05-26 16:20:06 +00:00
|
|
|
select IRQ_MIPS_CPU
|
2005-04-16 22:20:36 +00:00
|
|
|
select R5000_CPU_SCACHE
|
|
|
|
select RM7000_CPU_SCACHE
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_R5000
|
|
|
|
select SYS_HAS_CPU_R10000 if BROKEN
|
|
|
|
select SYS_HAS_CPU_RM7000
|
2006-01-19 14:55:42 +00:00
|
|
|
select SYS_HAS_CPU_NEVADA
|
2005-09-03 22:56:21 +00:00
|
|
|
select SYS_SUPPORTS_64BIT_KERNEL
|
2005-07-25 22:45:45 +00:00
|
|
|
select SYS_SUPPORTS_BIG_ENDIAN
|
|
|
|
help
|
2005-10-29 18:32:41 +00:00
|
|
|
If you want this kernel to run on SGI O2 workstation, say Y here.
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2007-07-27 06:25:43 +00:00
|
|
|
config SIBYTE_CRHINE
|
|
|
|
bool "Sibyte BCM91120C-CRhine"
|
2005-10-20 06:57:11 +00:00
|
|
|
select BOOT_ELF32
|
|
|
|
select DMA_COHERENT
|
2007-07-27 06:25:43 +00:00
|
|
|
select SIBYTE_BCM1120
|
2005-10-20 06:57:11 +00:00
|
|
|
select SWAP_IO_SPACE
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_SB1
|
2005-10-20 06:57:11 +00:00
|
|
|
select SYS_SUPPORTS_BIG_ENDIAN
|
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
|
|
|
|
2007-07-27 06:25:43 +00:00
|
|
|
config SIBYTE_CARMEL
|
|
|
|
bool "Sibyte BCM91120x-Carmel"
|
2005-10-29 18:32:41 +00:00
|
|
|
select BOOT_ELF32
|
2005-04-16 22:20:36 +00:00
|
|
|
select DMA_COHERENT
|
2007-07-27 06:25:43 +00:00
|
|
|
select SIBYTE_BCM1120
|
2005-10-29 18:32:41 +00:00
|
|
|
select SWAP_IO_SPACE
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_SB1
|
2005-06-05 03:57:20 +00:00
|
|
|
select SYS_SUPPORTS_BIG_ENDIAN
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2007-07-27 06:25:43 +00:00
|
|
|
config SIBYTE_CRHONE
|
|
|
|
bool "Sibyte BCM91125C-CRhone"
|
2005-10-29 18:32:41 +00:00
|
|
|
select BOOT_ELF32
|
|
|
|
select DMA_COHERENT
|
2007-07-27 06:25:43 +00:00
|
|
|
select SIBYTE_BCM1125
|
2005-10-29 18:32:41 +00:00
|
|
|
select SWAP_IO_SPACE
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_SB1
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_BIG_ENDIAN
|
2007-07-27 06:25:43 +00:00
|
|
|
select SYS_SUPPORTS_HIGHMEM
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2005-10-29 18:32:41 +00:00
|
|
|
config SIBYTE_RHONE
|
2006-05-09 21:34:53 +00:00
|
|
|
bool "Sibyte BCM91125E-Rhone"
|
2005-10-29 18:32:41 +00:00
|
|
|
select BOOT_ELF32
|
|
|
|
select DMA_COHERENT
|
|
|
|
select SIBYTE_BCM1125H
|
|
|
|
select SWAP_IO_SPACE
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_SB1
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_BIG_ENDIAN
|
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2007-07-27 06:25:43 +00:00
|
|
|
config SIBYTE_SWARM
|
|
|
|
bool "Sibyte BCM91250A-SWARM"
|
2005-10-29 18:32:41 +00:00
|
|
|
select BOOT_ELF32
|
2005-09-15 08:03:12 +00:00
|
|
|
select DMA_COHERENT
|
2010-04-18 13:26:36 +00:00
|
|
|
select HAVE_PATA_PLATFORM
|
2007-07-27 06:25:43 +00:00
|
|
|
select SIBYTE_SB1250
|
2005-10-29 18:32:41 +00:00
|
|
|
select SWAP_IO_SPACE
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_SB1
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_BIG_ENDIAN
|
2007-07-27 06:25:43 +00:00
|
|
|
select SYS_SUPPORTS_HIGHMEM
|
2005-03-01 06:33:16 +00:00
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
2007-11-03 02:05:43 +00:00
|
|
|
select ZONE_DMA32 if 64BIT
|
2005-03-01 06:33:16 +00:00
|
|
|
|
2007-07-27 06:25:43 +00:00
|
|
|
config SIBYTE_LITTLESUR
|
|
|
|
bool "Sibyte BCM91250C2-LittleSur"
|
2005-10-29 18:32:41 +00:00
|
|
|
select BOOT_ELF32
|
|
|
|
select DMA_COHERENT
|
2010-04-18 13:26:36 +00:00
|
|
|
select HAVE_PATA_PLATFORM
|
2005-10-29 18:32:41 +00:00
|
|
|
select SIBYTE_SB1250
|
|
|
|
select SWAP_IO_SPACE
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_SB1
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_BIG_ENDIAN
|
|
|
|
select SYS_SUPPORTS_HIGHMEM
|
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2007-07-27 06:25:43 +00:00
|
|
|
config SIBYTE_SENTOSA
|
|
|
|
bool "Sibyte BCM91250E-Sentosa"
|
2005-10-29 18:32:41 +00:00
|
|
|
select BOOT_ELF32
|
|
|
|
select DMA_COHERENT
|
|
|
|
select SIBYTE_SB1250
|
|
|
|
select SWAP_IO_SPACE
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_SB1
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_BIG_ENDIAN
|
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2007-07-27 06:25:43 +00:00
|
|
|
config SIBYTE_BIGSUR
|
|
|
|
bool "Sibyte BCM91480B-BigSur"
|
2005-10-29 18:32:41 +00:00
|
|
|
select BOOT_ELF32
|
|
|
|
select DMA_COHERENT
|
2007-07-27 06:25:43 +00:00
|
|
|
select NR_CPUS_DEFAULT_4
|
|
|
|
select SIBYTE_BCM1x80
|
2005-10-29 18:32:41 +00:00
|
|
|
select SWAP_IO_SPACE
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_SB1
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_BIG_ENDIAN
|
2007-11-01 21:55:39 +00:00
|
|
|
select SYS_SUPPORTS_HIGHMEM
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
2007-11-03 02:05:43 +00:00
|
|
|
select ZONE_DMA32 if 64BIT
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2006-12-05 16:05:44 +00:00
|
|
|
config SNI_RM
|
|
|
|
bool "SNI RM200/300/400"
|
2012-11-15 19:48:50 +00:00
|
|
|
select FW_ARC if CPU_LITTLE_ENDIAN
|
|
|
|
select FW_ARC32 if CPU_LITTLE_ENDIAN
|
2013-03-25 09:39:54 +00:00
|
|
|
select FW_SNIPROM if CPU_BIG_ENDIAN
|
2005-09-15 08:52:34 +00:00
|
|
|
select ARCH_MAY_HAVE_PC_FDC
|
2005-04-16 22:20:36 +00:00
|
|
|
select BOOT_ELF32
|
2007-10-18 16:48:11 +00:00
|
|
|
select CEVT_R4K
|
2007-11-24 22:33:28 +00:00
|
|
|
select CSRC_R4K
|
2007-12-02 12:00:32 +00:00
|
|
|
select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
|
2005-04-16 22:20:36 +00:00
|
|
|
select DMA_NONCOHERENT
|
|
|
|
select GENERIC_ISA_DMA
|
2011-06-01 18:05:10 +00:00
|
|
|
select HAVE_PCSPKR_PLATFORM
|
2005-10-29 18:32:41 +00:00
|
|
|
select HW_HAS_EISA
|
2005-04-16 22:20:36 +00:00
|
|
|
select HW_HAS_PCI
|
2015-05-26 16:20:06 +00:00
|
|
|
select IRQ_MIPS_CPU
|
2007-10-11 22:46:10 +00:00
|
|
|
select I8253
|
2005-04-16 22:20:36 +00:00
|
|
|
select I8259
|
|
|
|
select ISA
|
2006-06-13 11:59:01 +00:00
|
|
|
select SWAP_IO_SPACE if CPU_BIG_ENDIAN
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_R4X00
|
2006-06-13 11:59:01 +00:00
|
|
|
select SYS_HAS_CPU_R5000
|
2006-12-28 17:22:32 +00:00
|
|
|
select SYS_HAS_CPU_R10000
|
2006-06-13 11:59:01 +00:00
|
|
|
select R5000_CPU_SCACHE
|
2007-03-01 11:56:43 +00:00
|
|
|
select SYS_HAS_EARLY_PRINTK
|
2005-09-03 22:56:21 +00:00
|
|
|
select SYS_SUPPORTS_32BIT_KERNEL
|
2013-01-17 02:53:19 +00:00
|
|
|
select SYS_SUPPORTS_64BIT_KERNEL
|
2006-06-13 11:59:01 +00:00
|
|
|
select SYS_SUPPORTS_BIG_ENDIAN
|
2005-08-10 15:17:11 +00:00
|
|
|
select SYS_SUPPORTS_HIGHMEM
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
2005-04-16 22:20:36 +00:00
|
|
|
help
|
2006-12-05 16:05:44 +00:00
|
|
|
The SNI RM200/300/400 are MIPS-based machines manufactured by
|
|
|
|
Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
|
2005-04-16 22:20:36 +00:00
|
|
|
Technology and now in turn merged with Fujitsu. Say Y here to
|
|
|
|
support this machine type.
|
|
|
|
|
2008-07-11 14:27:54 +00:00
|
|
|
config MACH_TX39XX
|
|
|
|
bool "Toshiba TX39 series based machines"
|
2005-10-29 18:32:41 +00:00
|
|
|
|
2008-07-11 14:27:54 +00:00
|
|
|
config MACH_TX49XX
|
|
|
|
bool "Toshiba TX49 series based machines"
|
2005-10-29 18:32:41 +00:00
|
|
|
|
2008-07-16 15:12:25 +00:00
|
|
|
config MIKROTIK_RB532
|
|
|
|
bool "Mikrotik RB532 boards"
|
|
|
|
select CEVT_R4K
|
|
|
|
select CSRC_R4K
|
|
|
|
select DMA_NONCOHERENT
|
|
|
|
select HW_HAS_PCI
|
2015-05-26 16:20:06 +00:00
|
|
|
select IRQ_MIPS_CPU
|
2008-07-16 15:12:25 +00:00
|
|
|
select SYS_HAS_CPU_MIPS32_R1
|
|
|
|
select SYS_SUPPORTS_32BIT_KERNEL
|
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
|
|
|
select SWAP_IO_SPACE
|
|
|
|
select BOOT_RAW
|
2016-04-19 09:23:22 +00:00
|
|
|
select GPIOLIB
|
2014-01-14 17:54:38 +00:00
|
|
|
select MIPS_L1_CACHE_SHIFT_4
|
2008-07-16 15:12:25 +00:00
|
|
|
help
|
|
|
|
Support the Mikrotik(tm) RouterBoard 532 series,
|
|
|
|
based on the IDT RC32434 SoC.
|
|
|
|
|
2013-05-22 15:10:46 +00:00
|
|
|
config CAVIUM_OCTEON_SOC
|
|
|
|
bool "Cavium Networks Octeon SoC based boards"
|
2008-12-11 23:33:38 +00:00
|
|
|
select CEVT_R4K
|
2014-11-21 23:16:48 +00:00
|
|
|
select ARCH_PHYS_ADDR_T_64BIT
|
2008-12-11 23:33:38 +00:00
|
|
|
select DMA_COHERENT
|
|
|
|
select SYS_SUPPORTS_64BIT_KERNEL
|
|
|
|
select SYS_SUPPORTS_BIG_ENDIAN
|
2012-10-16 22:39:09 +00:00
|
|
|
select EDAC_SUPPORT
|
2015-05-21 17:59:31 +00:00
|
|
|
select EDAC_ATOMIC_SCRUB
|
2015-03-20 16:11:58 +00:00
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
|
|
|
select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
|
2008-12-11 23:33:38 +00:00
|
|
|
select SYS_HAS_EARLY_PRINTK
|
2009-02-02 19:30:59 +00:00
|
|
|
select SYS_HAS_CPU_CAVIUM_OCTEON
|
2009-04-24 00:44:38 +00:00
|
|
|
select HW_HAS_PCI
|
2010-10-01 20:27:30 +00:00
|
|
|
select ZONE_DMA32
|
2011-08-20 15:44:00 +00:00
|
|
|
select HOLES_IN_ZONE
|
2016-04-19 09:23:22 +00:00
|
|
|
select GPIOLIB
|
2014-05-28 21:52:05 +00:00
|
|
|
select LIBFDT
|
|
|
|
select USE_OF
|
|
|
|
select ARCH_SPARSEMEM_ENABLE
|
|
|
|
select SYS_SUPPORTS_SMP
|
|
|
|
select NR_CPUS_DEFAULT_16
|
2014-08-21 20:04:22 +00:00
|
|
|
select BUILTIN_DTB
|
2015-03-05 14:31:30 +00:00
|
|
|
select MTD_COMPLEX_MAPPINGS
|
2008-12-11 23:33:38 +00:00
|
|
|
help
|
|
|
|
This option supports all of the Octeon reference boards from Cavium
|
|
|
|
Networks. It builds a kernel that dynamically determines the Octeon
|
|
|
|
CPU type and supports all known board reference implementations.
|
|
|
|
Some of the supported boards are:
|
|
|
|
EBT3000
|
|
|
|
EBH3000
|
|
|
|
EBH3100
|
|
|
|
Thunder
|
|
|
|
Kodama
|
|
|
|
Hikari
|
|
|
|
Say Y here for most Octeon reference boards.
|
|
|
|
|
2011-05-06 20:06:57 +00:00
|
|
|
config NLM_XLR_BOARD
|
|
|
|
bool "Netlogic XLR/XLS based systems"
|
|
|
|
select BOOT_ELF32
|
|
|
|
select NLM_COMMON
|
|
|
|
select SYS_HAS_CPU_XLR
|
|
|
|
select SYS_SUPPORTS_SMP
|
|
|
|
select HW_HAS_PCI
|
|
|
|
select SWAP_IO_SPACE
|
|
|
|
select SYS_SUPPORTS_32BIT_KERNEL
|
|
|
|
select SYS_SUPPORTS_64BIT_KERNEL
|
2014-11-21 23:16:48 +00:00
|
|
|
select ARCH_PHYS_ADDR_T_64BIT
|
2011-05-06 20:06:57 +00:00
|
|
|
select SYS_SUPPORTS_BIG_ENDIAN
|
|
|
|
select SYS_SUPPORTS_HIGHMEM
|
|
|
|
select DMA_COHERENT
|
|
|
|
select NR_CPUS_DEFAULT_32
|
|
|
|
select CEVT_R4K
|
|
|
|
select CSRC_R4K
|
2015-05-26 16:20:06 +00:00
|
|
|
select IRQ_MIPS_CPU
|
2012-10-31 12:01:33 +00:00
|
|
|
select ZONE_DMA32 if 64BIT
|
2011-05-06 20:06:57 +00:00
|
|
|
select SYNC_R4K
|
|
|
|
select SYS_HAS_EARLY_PRINTK
|
2013-06-10 06:33:26 +00:00
|
|
|
select SYS_SUPPORTS_ZBOOT
|
|
|
|
select SYS_SUPPORTS_ZBOOT_UART16550
|
2011-05-06 20:06:57 +00:00
|
|
|
help
|
|
|
|
Support for systems based on Netlogic XLR and XLS processors.
|
|
|
|
Say Y here if you have a XLR or XLS based board.
|
|
|
|
|
2011-11-16 00:21:28 +00:00
|
|
|
config NLM_XLP_BOARD
|
|
|
|
bool "Netlogic XLP based systems"
|
|
|
|
select BOOT_ELF32
|
|
|
|
select NLM_COMMON
|
|
|
|
select SYS_HAS_CPU_XLP
|
|
|
|
select SYS_SUPPORTS_SMP
|
|
|
|
select HW_HAS_PCI
|
|
|
|
select SYS_SUPPORTS_32BIT_KERNEL
|
|
|
|
select SYS_SUPPORTS_64BIT_KERNEL
|
2014-11-21 23:16:48 +00:00
|
|
|
select ARCH_PHYS_ADDR_T_64BIT
|
2016-04-19 09:23:22 +00:00
|
|
|
select GPIOLIB
|
2011-11-16 00:21:28 +00:00
|
|
|
select SYS_SUPPORTS_BIG_ENDIAN
|
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
|
|
|
select SYS_SUPPORTS_HIGHMEM
|
|
|
|
select DMA_COHERENT
|
|
|
|
select NR_CPUS_DEFAULT_32
|
|
|
|
select CEVT_R4K
|
|
|
|
select CSRC_R4K
|
2015-05-26 16:20:06 +00:00
|
|
|
select IRQ_MIPS_CPU
|
2012-10-31 12:01:33 +00:00
|
|
|
select ZONE_DMA32 if 64BIT
|
2011-11-16 00:21:28 +00:00
|
|
|
select SYNC_R4K
|
|
|
|
select SYS_HAS_EARLY_PRINTK
|
2012-07-13 16:23:22 +00:00
|
|
|
select USE_OF
|
2013-06-10 06:33:26 +00:00
|
|
|
select SYS_SUPPORTS_ZBOOT
|
|
|
|
select SYS_SUPPORTS_ZBOOT_UART16550
|
2011-11-16 00:21:28 +00:00
|
|
|
help
|
|
|
|
This board is based on Netlogic XLP Processor.
|
|
|
|
Say Y here if you have a XLP based board.
|
|
|
|
|
2014-05-28 21:52:15 +00:00
|
|
|
config MIPS_PARAVIRT
|
|
|
|
bool "Para-Virtualized guest system"
|
|
|
|
select CEVT_R4K
|
|
|
|
select CSRC_R4K
|
|
|
|
select DMA_COHERENT
|
|
|
|
select SYS_SUPPORTS_64BIT_KERNEL
|
|
|
|
select SYS_SUPPORTS_32BIT_KERNEL
|
|
|
|
select SYS_SUPPORTS_BIG_ENDIAN
|
|
|
|
select SYS_SUPPORTS_SMP
|
|
|
|
select NR_CPUS_DEFAULT_4
|
|
|
|
select SYS_HAS_EARLY_PRINTK
|
|
|
|
select SYS_HAS_CPU_MIPS32_R2
|
|
|
|
select SYS_HAS_CPU_MIPS64_R2
|
|
|
|
select SYS_HAS_CPU_CAVIUM_OCTEON
|
|
|
|
select HW_HAS_PCI
|
|
|
|
select SWAP_IO_SPACE
|
|
|
|
help
|
|
|
|
This option supports guest running under ????
|
|
|
|
|
2005-10-29 18:32:41 +00:00
|
|
|
endchoice
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2008-09-16 17:12:16 +00:00
|
|
|
source "arch/mips/alchemy/Kconfig"
|
2014-10-28 23:18:39 +00:00
|
|
|
source "arch/mips/ath25/Kconfig"
|
2011-01-04 20:28:14 +00:00
|
|
|
source "arch/mips/ath79/Kconfig"
|
2011-07-22 23:20:13 +00:00
|
|
|
source "arch/mips/bcm47xx/Kconfig"
|
2009-08-18 12:23:37 +00:00
|
|
|
source "arch/mips/bcm63xx/Kconfig"
|
2014-12-25 17:49:20 +00:00
|
|
|
source "arch/mips/bmips/Kconfig"
|
2005-10-29 18:32:41 +00:00
|
|
|
source "arch/mips/jazz/Kconfig"
|
2010-06-19 04:08:19 +00:00
|
|
|
source "arch/mips/jz4740/Kconfig"
|
2011-03-30 07:27:48 +00:00
|
|
|
source "arch/mips/lantiq/Kconfig"
|
2007-08-21 20:34:16 +00:00
|
|
|
source "arch/mips/lasat/Kconfig"
|
2016-01-14 01:15:39 +00:00
|
|
|
source "arch/mips/pic32/Kconfig"
|
2015-08-06 11:22:43 +00:00
|
|
|
source "arch/mips/pistachio/Kconfig"
|
2012-12-15 10:52:10 +00:00
|
|
|
source "arch/mips/pmcs-msp71xx/Kconfig"
|
2013-01-20 21:05:30 +00:00
|
|
|
source "arch/mips/ralink/Kconfig"
|
2005-02-07 01:27:14 +00:00
|
|
|
source "arch/mips/sgi-ip27/Kconfig"
|
2005-02-03 14:28:23 +00:00
|
|
|
source "arch/mips/sibyte/Kconfig"
|
2008-07-10 15:31:36 +00:00
|
|
|
source "arch/mips/txx9/Kconfig"
|
2005-10-29 18:32:41 +00:00
|
|
|
source "arch/mips/vr41xx/Kconfig"
|
2008-12-11 23:33:38 +00:00
|
|
|
source "arch/mips/cavium-octeon/Kconfig"
|
2015-04-21 02:00:35 +00:00
|
|
|
source "arch/mips/loongson32/Kconfig"
|
|
|
|
source "arch/mips/loongson64/Kconfig"
|
2011-05-06 20:06:57 +00:00
|
|
|
source "arch/mips/netlogic/Kconfig"
|
2014-05-28 21:52:14 +00:00
|
|
|
source "arch/mips/paravirt/Kconfig"
|
2015-10-26 11:30:56 +00:00
|
|
|
source "arch/mips/xilfpga/Kconfig"
|
2005-02-03 14:28:23 +00:00
|
|
|
|
2005-10-29 18:32:41 +00:00
|
|
|
endmenu
|
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
config RWSEM_GENERIC_SPINLOCK
|
|
|
|
bool
|
|
|
|
default y
|
|
|
|
|
|
|
|
config RWSEM_XCHGADD_ALGORITHM
|
|
|
|
bool
|
|
|
|
|
2006-12-08 10:37:49 +00:00
|
|
|
config ARCH_HAS_ILOG2_U32
|
|
|
|
bool
|
|
|
|
default n
|
|
|
|
|
|
|
|
config ARCH_HAS_ILOG2_U64
|
|
|
|
bool
|
|
|
|
default n
|
|
|
|
|
[PATCH] bitops: mips: use generic bitops
- remove __{,test_and_}{set,clear,change}_bit() and test_bit()
- unless defined(CONFIG_CPU_MIPS32) or defined(CONFIG_CPU_MIPS64)
- remove __ffs()
- remove ffs()
- remove ffz()
- remove fls()
- remove fls64()
- remove find_{next,first}{,_zero}_bit()
- remove sched_find_first_bit()
- remove generic_hweight64()
- remove generic_hweight{32,16,8}()
- remove ext2_{set,clear,test,find_first_zero,find_next_zero}_bit()
- remove ext2_{set,clear}_bit_atomic()
- remove minix_{test,set,test_and_clear,test,find_first_zero}_bit()
Signed-off-by: Akinobu Mita <mita@miraclelinux.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-26 09:39:30 +00:00
|
|
|
config GENERIC_HWEIGHT
|
|
|
|
bool
|
|
|
|
default y
|
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
config GENERIC_CALIBRATE_DELAY
|
|
|
|
bool
|
|
|
|
default y
|
|
|
|
|
2008-11-11 08:05:16 +00:00
|
|
|
config SCHED_OMIT_FRAME_POINTER
|
2006-04-04 04:11:45 +00:00
|
|
|
bool
|
|
|
|
default y
|
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
#
|
|
|
|
# Select some configuration options automatically based on user selections.
|
|
|
|
#
|
2012-11-15 19:48:50 +00:00
|
|
|
config FW_ARC
|
2005-04-16 22:20:36 +00:00
|
|
|
bool
|
|
|
|
|
2005-09-15 08:52:34 +00:00
|
|
|
config ARCH_MAY_HAVE_PC_FDC
|
|
|
|
bool
|
|
|
|
|
2007-06-14 21:55:31 +00:00
|
|
|
config BOOT_RAW
|
|
|
|
bool
|
|
|
|
|
2007-11-01 01:57:55 +00:00
|
|
|
config CEVT_BCM1480
|
|
|
|
bool
|
|
|
|
|
2008-04-25 03:11:44 +00:00
|
|
|
config CEVT_DS1287
|
|
|
|
bool
|
|
|
|
|
2007-10-22 10:43:15 +00:00
|
|
|
config CEVT_GT641XX
|
|
|
|
bool
|
|
|
|
|
2007-10-18 16:48:11 +00:00
|
|
|
config CEVT_R4K
|
|
|
|
bool
|
|
|
|
|
2007-11-01 01:57:55 +00:00
|
|
|
config CEVT_SB1250
|
|
|
|
bool
|
|
|
|
|
2007-10-24 16:34:09 +00:00
|
|
|
config CEVT_TXX9
|
|
|
|
bool
|
|
|
|
|
2007-11-01 01:57:55 +00:00
|
|
|
config CSRC_BCM1480
|
|
|
|
bool
|
|
|
|
|
2008-04-24 00:48:40 +00:00
|
|
|
config CSRC_IOASIC
|
|
|
|
bool
|
|
|
|
|
2007-11-24 22:33:28 +00:00
|
|
|
config CSRC_R4K
|
|
|
|
bool
|
|
|
|
|
2007-11-01 01:57:55 +00:00
|
|
|
config CSRC_SB1250
|
|
|
|
bool
|
|
|
|
|
MIPS: VDSO: Add implementations of gettimeofday() and clock_gettime()
Add user-mode implementations of gettimeofday() and clock_gettime() to
the VDSO. This is currently usable with 2 clocksources: the CP0 count
register, which is accessible to user-mode via RDHWR on R2 and later
cores, or the MIPS Global Interrupt Controller (GIC) timer, which
provides a "user-mode visible" section containing a mirror of its
counter registers. This section must be mapped into user memory, which
is done below the VDSO data page.
When a supported clocksource is not in use, the VDSO functions will
return -ENOSYS, which causes libc to fall back on the standard syscall
path.
When support for neither of these clocksources is compiled into the
kernel at all, the VDSO still provides clock_gettime(), as the coarse
realtime/monotonic clocks can still be implemented. However,
gettimeofday() is not provided in this case as nothing can be done
without a suitable clocksource. This causes the symbol lookup to fail
in libc and it will then always use the standard syscall path.
This patch includes a workaround for a bug in QEMU which results in
RDHWR on the CP0 count register always returning a constant (incorrect)
value. A fix for this has been submitted, and the workaround can be
removed after the fix has been in stable releases for a reasonable
amount of time.
A simple performance test which calls gettimeofday() 1000 times in a
loop and calculates the average execution time gives the following
results on a Malta + I6400 (running at 20MHz):
- Syscall: ~31000 ns
- VDSO (GIC): ~15000 ns
- VDSO (CP0): ~9500 ns
[markos.chandras@imgtec.com:
- Minor code re-arrangements in order for mappings to be made
in the order they appear to the process' address space.
- Move do_{monotonic, realtime} outside of the MIPS_CLOCK_VSYSCALL ifdef
- Use gic_get_usm_range so we can do the GIC mapping in the
arch/mips/kernel/vdso instead of the GIC irqchip driver]
Signed-off-by: Alex Smith <alex.smith@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/11338/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-10-21 08:57:44 +00:00
|
|
|
config MIPS_CLOCK_VSYSCALL
|
|
|
|
def_bool CSRC_R4K || CLKSRC_MIPS_GIC
|
|
|
|
|
2008-04-04 15:55:41 +00:00
|
|
|
config GPIO_TXX9
|
2016-04-19 09:23:22 +00:00
|
|
|
select GPIOLIB
|
2008-04-04 15:55:41 +00:00
|
|
|
bool
|
|
|
|
|
2012-11-15 19:48:50 +00:00
|
|
|
config FW_CFE
|
2007-09-05 06:58:26 +00:00
|
|
|
bool
|
|
|
|
|
2010-09-03 00:49:12 +00:00
|
|
|
config ARCH_DMA_ADDR_T_64BIT
|
2014-11-21 23:16:48 +00:00
|
|
|
def_bool (HIGHMEM && ARCH_PHYS_ADDR_T_64BIT) || 64BIT
|
2010-09-03 00:49:12 +00:00
|
|
|
|
2015-07-29 20:44:53 +00:00
|
|
|
config ARCH_SUPPORTS_UPROBES
|
|
|
|
bool
|
|
|
|
|
2013-09-27 12:41:44 +00:00
|
|
|
config DMA_MAYBE_COHERENT
|
|
|
|
select DMA_NONCOHERENT
|
|
|
|
bool
|
|
|
|
|
2005-09-03 22:56:19 +00:00
|
|
|
config DMA_COHERENT
|
2005-04-16 22:20:36 +00:00
|
|
|
bool
|
|
|
|
|
2005-09-03 22:56:19 +00:00
|
|
|
config DMA_NONCOHERENT
|
|
|
|
bool
|
2010-03-10 23:23:25 +00:00
|
|
|
select NEED_DMA_MAP_STATE
|
2005-09-03 22:56:19 +00:00
|
|
|
|
2010-03-10 23:23:25 +00:00
|
|
|
config NEED_DMA_MAP_STATE
|
2005-04-16 22:20:36 +00:00
|
|
|
bool
|
|
|
|
|
2007-03-01 11:56:43 +00:00
|
|
|
config SYS_HAS_EARLY_PRINTK
|
2005-04-16 22:20:36 +00:00
|
|
|
bool
|
|
|
|
|
2009-06-23 09:00:31 +00:00
|
|
|
config SYS_SUPPORTS_HOTPLUG_CPU
|
2007-08-07 13:52:17 +00:00
|
|
|
bool
|
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
config MIPS_BONITO64
|
|
|
|
bool
|
|
|
|
|
|
|
|
config MIPS_MSC
|
|
|
|
bool
|
|
|
|
|
2007-08-21 20:34:16 +00:00
|
|
|
config MIPS_NILE4
|
|
|
|
bool
|
|
|
|
|
2008-04-28 16:14:26 +00:00
|
|
|
config SYNC_R4K
|
|
|
|
bool
|
|
|
|
|
2010-11-23 15:06:25 +00:00
|
|
|
config MIPS_MACHINE
|
|
|
|
def_bool n
|
|
|
|
|
2014-04-07 22:39:19 +00:00
|
|
|
config NO_IOPORT_MAP
|
2007-05-29 14:08:07 +00:00
|
|
|
def_bool n
|
|
|
|
|
2014-11-13 11:25:27 +00:00
|
|
|
config GENERIC_CSUM
|
|
|
|
bool
|
|
|
|
|
2007-08-24 15:48:30 +00:00
|
|
|
config GENERIC_ISA_DMA
|
|
|
|
bool
|
|
|
|
select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
|
2010-10-18 03:55:21 +00:00
|
|
|
select ISA_DMA_API
|
2007-08-24 15:48:30 +00:00
|
|
|
|
2006-11-30 01:14:51 +00:00
|
|
|
config GENERIC_ISA_DMA_SUPPORT_BROKEN
|
|
|
|
bool
|
2007-08-24 15:48:30 +00:00
|
|
|
select GENERIC_ISA_DMA
|
2006-11-30 01:14:51 +00:00
|
|
|
|
2010-10-18 03:55:21 +00:00
|
|
|
config ISA_DMA_API
|
|
|
|
bool
|
|
|
|
|
2011-08-20 15:44:00 +00:00
|
|
|
config HOLES_IN_ZONE
|
|
|
|
bool
|
|
|
|
|
2016-03-31 09:05:39 +00:00
|
|
|
config SYS_SUPPORTS_RELOCATABLE
|
|
|
|
bool
|
|
|
|
help
|
|
|
|
Selected if the platform supports relocating the kernel.
|
|
|
|
The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
|
|
|
|
to allow access to command line and entropy sources.
|
|
|
|
|
2005-10-29 18:32:41 +00:00
|
|
|
#
|
2012-04-13 15:14:11 +00:00
|
|
|
# Endianness selection. Sufficiently obscure so many users don't know what to
|
2005-10-29 18:32:41 +00:00
|
|
|
# answer,so we try hard to limit the available choices. Also the use of a
|
|
|
|
# choice statement should be more obvious to the user.
|
|
|
|
#
|
|
|
|
choice
|
2012-04-13 15:14:11 +00:00
|
|
|
prompt "Endianness selection"
|
2005-04-16 22:20:36 +00:00
|
|
|
help
|
|
|
|
Some MIPS machines can be configured for either little or big endian
|
2005-10-29 18:32:41 +00:00
|
|
|
byte order. These modes require different kernels and a different
|
2006-11-30 04:22:59 +00:00
|
|
|
Linux distribution. In general there is one preferred byteorder for a
|
2005-10-29 18:32:41 +00:00
|
|
|
particular system but some systems are just as commonly used in the
|
2007-05-09 05:12:20 +00:00
|
|
|
one or the other endianness.
|
2005-10-29 18:32:41 +00:00
|
|
|
|
|
|
|
config CPU_BIG_ENDIAN
|
|
|
|
bool "Big endian"
|
|
|
|
depends on SYS_SUPPORTS_BIG_ENDIAN
|
|
|
|
|
|
|
|
config CPU_LITTLE_ENDIAN
|
|
|
|
bool "Little endian"
|
|
|
|
depends on SYS_SUPPORTS_LITTLE_ENDIAN
|
|
|
|
|
|
|
|
endchoice
|
|
|
|
|
2010-07-24 01:41:43 +00:00
|
|
|
config EXPORT_UASM
|
|
|
|
bool
|
|
|
|
|
2007-02-09 17:08:58 +00:00
|
|
|
config SYS_SUPPORTS_APM_EMULATION
|
|
|
|
bool
|
|
|
|
|
2005-10-29 18:32:41 +00:00
|
|
|
config SYS_SUPPORTS_BIG_ENDIAN
|
|
|
|
bool
|
|
|
|
|
|
|
|
config SYS_SUPPORTS_LITTLE_ENDIAN
|
|
|
|
bool
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2009-05-28 00:47:46 +00:00
|
|
|
config SYS_SUPPORTS_HUGETLBFS
|
|
|
|
bool
|
|
|
|
depends on CPU_SUPPORTS_HUGEPAGES && 64BIT
|
|
|
|
default y
|
|
|
|
|
2012-10-16 22:48:10 +00:00
|
|
|
config MIPS_HUGE_TLB_SUPPORT
|
|
|
|
def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
|
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
config IRQ_CPU_RM7K
|
|
|
|
bool
|
|
|
|
|
2007-06-14 21:55:31 +00:00
|
|
|
config IRQ_MSP_SLP
|
|
|
|
bool
|
|
|
|
|
|
|
|
config IRQ_MSP_CIC
|
|
|
|
bool
|
|
|
|
|
2007-08-02 14:35:53 +00:00
|
|
|
config IRQ_TXX9
|
|
|
|
bool
|
|
|
|
|
2007-09-13 14:51:26 +00:00
|
|
|
config IRQ_GT641XX
|
|
|
|
bool
|
|
|
|
|
2007-03-14 12:51:26 +00:00
|
|
|
config PCI_GT64XXX_PCI0
|
2005-04-16 22:20:36 +00:00
|
|
|
bool
|
|
|
|
|
2007-06-14 21:55:31 +00:00
|
|
|
config NO_EXCEPT_FILL
|
|
|
|
bool
|
|
|
|
|
2009-03-13 20:17:57 +00:00
|
|
|
config SOC_EMMA2RH
|
|
|
|
bool
|
|
|
|
select CEVT_R4K
|
|
|
|
select CSRC_R4K
|
|
|
|
select DMA_NONCOHERENT
|
2015-05-26 16:20:06 +00:00
|
|
|
select IRQ_MIPS_CPU
|
2009-03-13 20:17:57 +00:00
|
|
|
select SWAP_IO_SPACE
|
|
|
|
select SYS_HAS_CPU_R5500
|
|
|
|
select SYS_SUPPORTS_32BIT_KERNEL
|
|
|
|
select SYS_SUPPORTS_64BIT_KERNEL
|
|
|
|
select SYS_SUPPORTS_BIG_ENDIAN
|
|
|
|
|
2008-06-16 14:49:21 +00:00
|
|
|
config SOC_PNX833X
|
|
|
|
bool
|
|
|
|
select CEVT_R4K
|
|
|
|
select CSRC_R4K
|
2015-05-26 16:20:06 +00:00
|
|
|
select IRQ_MIPS_CPU
|
2008-06-16 14:49:21 +00:00
|
|
|
select DMA_NONCOHERENT
|
|
|
|
select SYS_HAS_CPU_MIPS32_R2
|
|
|
|
select SYS_SUPPORTS_32BIT_KERNEL
|
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
|
|
|
select SYS_SUPPORTS_BIG_ENDIAN
|
2014-04-28 23:49:24 +00:00
|
|
|
select SYS_SUPPORTS_MIPS16
|
2008-06-16 14:49:21 +00:00
|
|
|
select CPU_MIPSR2_IRQ_VI
|
|
|
|
|
|
|
|
config SOC_PNX8335
|
|
|
|
bool
|
|
|
|
select SOC_PNX833X
|
|
|
|
|
2014-11-13 13:32:03 +00:00
|
|
|
config MIPS_SPRAM
|
|
|
|
bool
|
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
config SWAP_IO_SPACE
|
|
|
|
bool
|
|
|
|
|
2007-12-02 12:00:32 +00:00
|
|
|
config SGI_HAS_INDYDOG
|
|
|
|
bool
|
|
|
|
|
2008-07-10 18:29:55 +00:00
|
|
|
config SGI_HAS_HAL2
|
|
|
|
bool
|
|
|
|
|
2007-12-02 12:00:32 +00:00
|
|
|
config SGI_HAS_SEEQ
|
|
|
|
bool
|
|
|
|
|
|
|
|
config SGI_HAS_WD93
|
|
|
|
bool
|
|
|
|
|
|
|
|
config SGI_HAS_ZILOG
|
|
|
|
bool
|
|
|
|
|
|
|
|
config SGI_HAS_I8042
|
|
|
|
bool
|
|
|
|
|
|
|
|
config DEFAULT_SGI_PARTITION
|
|
|
|
bool
|
|
|
|
|
2012-11-15 19:48:50 +00:00
|
|
|
config FW_ARC32
|
2005-10-29 18:32:41 +00:00
|
|
|
bool
|
|
|
|
|
2013-03-25 09:39:54 +00:00
|
|
|
config FW_SNIPROM
|
2008-01-04 22:31:07 +00:00
|
|
|
bool
|
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
config BOOT_ELF32
|
|
|
|
bool
|
|
|
|
|
2014-01-14 17:54:38 +00:00
|
|
|
config MIPS_L1_CACHE_SHIFT_4
|
|
|
|
bool
|
|
|
|
|
|
|
|
config MIPS_L1_CACHE_SHIFT_5
|
|
|
|
bool
|
|
|
|
|
|
|
|
config MIPS_L1_CACHE_SHIFT_6
|
|
|
|
bool
|
|
|
|
|
|
|
|
config MIPS_L1_CACHE_SHIFT_7
|
|
|
|
bool
|
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
config MIPS_L1_CACHE_SHIFT
|
|
|
|
int
|
2014-01-14 17:54:39 +00:00
|
|
|
default "7" if MIPS_L1_CACHE_SHIFT_7
|
2014-12-25 17:49:09 +00:00
|
|
|
default "6" if MIPS_L1_CACHE_SHIFT_6
|
|
|
|
default "5" if MIPS_L1_CACHE_SHIFT_5
|
|
|
|
default "4" if MIPS_L1_CACHE_SHIFT_4
|
2005-04-16 22:20:36 +00:00
|
|
|
default "5"
|
|
|
|
|
|
|
|
config HAVE_STD_PC_SERIAL_PORT
|
|
|
|
bool
|
|
|
|
|
|
|
|
config ARC_CONSOLE
|
|
|
|
bool "ARC console support"
|
2007-12-02 12:00:32 +00:00
|
|
|
depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
|
2005-04-16 22:20:36 +00:00
|
|
|
|
|
|
|
config ARC_MEMORY
|
|
|
|
bool
|
2006-12-05 16:05:44 +00:00
|
|
|
depends on MACH_JAZZ || SNI_RM || SGI_IP32
|
2005-04-16 22:20:36 +00:00
|
|
|
default y
|
|
|
|
|
|
|
|
config ARC_PROMLIB
|
|
|
|
bool
|
2007-12-02 12:00:32 +00:00
|
|
|
depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32
|
2005-04-16 22:20:36 +00:00
|
|
|
default y
|
|
|
|
|
2012-11-15 19:48:50 +00:00
|
|
|
config FW_ARC64
|
2005-04-16 22:20:36 +00:00
|
|
|
bool
|
|
|
|
|
|
|
|
config BOOT_ELF64
|
|
|
|
bool
|
|
|
|
|
|
|
|
menu "CPU selection"
|
|
|
|
|
|
|
|
choice
|
|
|
|
prompt "CPU type"
|
|
|
|
default CPU_R4X00
|
|
|
|
|
2014-03-21 10:44:07 +00:00
|
|
|
config CPU_LOONGSON3
|
|
|
|
bool "Loongson 3 CPU"
|
|
|
|
depends on SYS_HAS_CPU_LOONGSON3
|
|
|
|
select CPU_SUPPORTS_64BIT_KERNEL
|
|
|
|
select CPU_SUPPORTS_HIGHMEM
|
|
|
|
select CPU_SUPPORTS_HUGEPAGES
|
|
|
|
select WEAK_ORDERING
|
|
|
|
select WEAK_REORDERING_BEYOND_LLSC
|
2016-03-03 01:45:09 +00:00
|
|
|
select MIPS_PGD_C0_CONTEXT
|
2016-04-19 09:23:22 +00:00
|
|
|
select GPIOLIB
|
2014-03-21 10:44:07 +00:00
|
|
|
help
|
|
|
|
The Loongson 3 processor implements the MIPS64R2 instruction
|
|
|
|
set with many extensions.
|
|
|
|
|
MIPS: Loongson-3: Introduce CONFIG_LOONGSON3_ENHANCEMENT
New Loongson 3 CPU (since Loongson-3A R2, as opposed to Loongson-3A R1,
Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as FTLB,
L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPv2 ASE, User Local
register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer), Fast
TLB refill support, etc.
This patch introduce a config option, CONFIG_LOONGSON3_ENHANCEMENT, to
enable those enhancements which are not probed at run time. If you want
a generic kernel to run on all Loongson 3 machines, please say 'N'
here. If you want a high-performance kernel to run on new Loongson 3
machines only, please say 'Y' here.
Some additional explanations:
1) SFB locates between core and L1 cache, it causes memory access out
of order, so writel/outl (and other similar functions) need a I/O
reorder barrier.
2) Loongson 3 has a bug that di instruction can not save the irqflag,
so arch_local_irq_save() is modified. Since CPU_MIPSR2 is selected
by CONFIG_LOONGSON3_ENHANCEMENT, generic kernel doesn't use ei/di
at all.
3) CPU_HAS_PREFETCH is selected by CONFIG_LOONGSON3_ENHANCEMENT, so
MIPS_CPU_PREFETCH (used by uasm) probing is also put in this patch.
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Cc: Steven J . Hill <sjhill@realitydiluted.com>
Cc: Fuxin Zhang <zhangfx@lemote.com>
Cc: Zhangjin Wu <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/12755/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-03-03 01:45:13 +00:00
|
|
|
config LOONGSON3_ENHANCEMENT
|
|
|
|
bool "New Loongson 3 CPU Enhancements"
|
|
|
|
default n
|
|
|
|
select CPU_MIPSR2
|
|
|
|
select CPU_HAS_PREFETCH
|
|
|
|
depends on CPU_LOONGSON3
|
|
|
|
help
|
|
|
|
New Loongson 3 CPU (since Loongson-3A R2, as opposed to Loongson-3A
|
|
|
|
R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
|
|
|
|
FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPv2 ASE, User
|
|
|
|
Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
|
|
|
|
Fast TLB refill support, etc.
|
|
|
|
|
|
|
|
This option enable those enhancements which are not probed at run
|
|
|
|
time. If you want a generic kernel to run on all Loongson 3 machines,
|
|
|
|
please say 'N' here. If you want a high-performance kernel to run on
|
|
|
|
new Loongson 3 machines only, please say 'Y' here.
|
|
|
|
|
2009-07-02 15:27:41 +00:00
|
|
|
config CPU_LOONGSON2E
|
|
|
|
bool "Loongson 2E"
|
|
|
|
depends on SYS_HAS_CPU_LOONGSON2E
|
|
|
|
select CPU_LOONGSON2
|
2007-06-06 06:52:43 +00:00
|
|
|
help
|
|
|
|
The Loongson 2E processor implements the MIPS III instruction set
|
|
|
|
with many extensions.
|
|
|
|
|
2011-03-31 01:57:33 +00:00
|
|
|
It has an internal FPGA northbridge, which is compatible to
|
2009-11-06 10:45:05 +00:00
|
|
|
bonito64.
|
|
|
|
|
|
|
|
config CPU_LOONGSON2F
|
|
|
|
bool "Loongson 2F"
|
|
|
|
depends on SYS_HAS_CPU_LOONGSON2F
|
|
|
|
select CPU_LOONGSON2
|
2016-04-19 09:23:22 +00:00
|
|
|
select GPIOLIB
|
2009-11-06 10:45:05 +00:00
|
|
|
help
|
|
|
|
The Loongson 2F processor implements the MIPS III instruction set
|
|
|
|
with many extensions.
|
|
|
|
|
|
|
|
Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
|
|
|
|
have a similar programming interface with FPGA northbridge used in
|
|
|
|
Loongson2E.
|
|
|
|
|
2012-07-25 14:17:24 +00:00
|
|
|
config CPU_LOONGSON1B
|
|
|
|
bool "Loongson 1B"
|
|
|
|
depends on SYS_HAS_CPU_LOONGSON1B
|
|
|
|
select CPU_LOONGSON1
|
2016-04-06 12:34:54 +00:00
|
|
|
select LEDS_GPIO_REGISTER
|
2012-07-25 14:17:24 +00:00
|
|
|
help
|
|
|
|
The Loongson 1B is a 32-bit SoC, which implements the MIPS32
|
|
|
|
release 2 instruction set.
|
|
|
|
|
2005-07-06 12:08:11 +00:00
|
|
|
config CPU_MIPS32_R1
|
|
|
|
bool "MIPS32 Release 1"
|
2005-10-20 21:33:09 +00:00
|
|
|
depends on SYS_HAS_CPU_MIPS32_R1
|
2005-07-06 12:08:11 +00:00
|
|
|
select CPU_HAS_PREFETCH
|
2005-08-10 15:17:11 +00:00
|
|
|
select CPU_SUPPORTS_32BIT_KERNEL
|
2006-03-05 00:45:33 +00:00
|
|
|
select CPU_SUPPORTS_HIGHMEM
|
2005-07-12 14:51:22 +00:00
|
|
|
help
|
2005-10-29 18:32:41 +00:00
|
|
|
Choose this option to build a kernel for release 1 or later of the
|
2005-07-12 14:51:22 +00:00
|
|
|
MIPS32 architecture. Most modern embedded systems with a 32-bit
|
|
|
|
MIPS processor are based on a MIPS32 processor. If you know the
|
|
|
|
specific type of processor in your system, choose those that one
|
|
|
|
otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
|
|
|
|
Release 2 of the MIPS32 architecture is available since several
|
|
|
|
years so chances are you even have a MIPS32 Release 2 processor
|
|
|
|
in which case you should choose CPU_MIPS32_R2 instead for better
|
|
|
|
performance.
|
|
|
|
|
|
|
|
config CPU_MIPS32_R2
|
|
|
|
bool "MIPS32 Release 2"
|
2005-10-20 21:33:09 +00:00
|
|
|
depends on SYS_HAS_CPU_MIPS32_R2
|
2005-07-12 14:51:22 +00:00
|
|
|
select CPU_HAS_PREFETCH
|
2005-08-10 15:17:11 +00:00
|
|
|
select CPU_SUPPORTS_32BIT_KERNEL
|
2006-03-05 00:45:33 +00:00
|
|
|
select CPU_SUPPORTS_HIGHMEM
|
2014-01-27 15:23:10 +00:00
|
|
|
select CPU_SUPPORTS_MSA
|
2012-11-22 02:33:59 +00:00
|
|
|
select HAVE_KVM
|
2005-07-06 12:08:11 +00:00
|
|
|
help
|
2005-10-29 18:32:41 +00:00
|
|
|
Choose this option to build a kernel for release 2 or later of the
|
2005-07-06 12:08:11 +00:00
|
|
|
MIPS32 architecture. Most modern embedded systems with a 32-bit
|
|
|
|
MIPS processor are based on a MIPS32 processor. If you know the
|
|
|
|
specific type of processor in your system, choose those that one
|
|
|
|
otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
|
|
|
|
|
2014-10-27 10:34:11 +00:00
|
|
|
config CPU_MIPS32_R6
|
2015-07-16 12:24:46 +00:00
|
|
|
bool "MIPS32 Release 6"
|
2014-10-27 10:34:11 +00:00
|
|
|
depends on SYS_HAS_CPU_MIPS32_R6
|
|
|
|
select CPU_HAS_PREFETCH
|
|
|
|
select CPU_SUPPORTS_32BIT_KERNEL
|
|
|
|
select CPU_SUPPORTS_HIGHMEM
|
|
|
|
select CPU_SUPPORTS_MSA
|
2014-11-13 11:25:27 +00:00
|
|
|
select GENERIC_CSUM
|
2014-10-27 10:34:11 +00:00
|
|
|
select HAVE_KVM
|
|
|
|
select MIPS_O32_FP64_SUPPORT
|
|
|
|
help
|
|
|
|
Choose this option to build a kernel for release 6 or later of the
|
|
|
|
MIPS32 architecture. New MIPS processors, starting with the Warrior
|
|
|
|
family, are based on a MIPS32r6 processor. If you own an older
|
|
|
|
processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
|
|
|
|
|
2005-07-06 12:08:11 +00:00
|
|
|
config CPU_MIPS64_R1
|
|
|
|
bool "MIPS64 Release 1"
|
2005-10-20 21:33:09 +00:00
|
|
|
depends on SYS_HAS_CPU_MIPS64_R1
|
2005-08-10 15:17:11 +00:00
|
|
|
select CPU_HAS_PREFETCH
|
2005-09-03 22:56:21 +00:00
|
|
|
select CPU_SUPPORTS_32BIT_KERNEL
|
|
|
|
select CPU_SUPPORTS_64BIT_KERNEL
|
2006-03-05 00:45:33 +00:00
|
|
|
select CPU_SUPPORTS_HIGHMEM
|
2009-05-28 00:47:46 +00:00
|
|
|
select CPU_SUPPORTS_HUGEPAGES
|
2005-07-06 12:08:11 +00:00
|
|
|
help
|
|
|
|
Choose this option to build a kernel for release 1 or later of the
|
|
|
|
MIPS64 architecture. Many modern embedded systems with a 64-bit
|
|
|
|
MIPS processor are based on a MIPS64 processor. If you know the
|
|
|
|
specific type of processor in your system, choose those that one
|
|
|
|
otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
|
2005-07-12 14:51:22 +00:00
|
|
|
Release 2 of the MIPS64 architecture is available since several
|
|
|
|
years so chances are you even have a MIPS64 Release 2 processor
|
|
|
|
in which case you should choose CPU_MIPS64_R2 instead for better
|
|
|
|
performance.
|
|
|
|
|
|
|
|
config CPU_MIPS64_R2
|
|
|
|
bool "MIPS64 Release 2"
|
2005-10-20 21:33:09 +00:00
|
|
|
depends on SYS_HAS_CPU_MIPS64_R2
|
2005-08-10 15:17:11 +00:00
|
|
|
select CPU_HAS_PREFETCH
|
2005-07-12 14:51:22 +00:00
|
|
|
select CPU_SUPPORTS_32BIT_KERNEL
|
|
|
|
select CPU_SUPPORTS_64BIT_KERNEL
|
2006-03-05 00:45:33 +00:00
|
|
|
select CPU_SUPPORTS_HIGHMEM
|
2009-05-28 00:47:46 +00:00
|
|
|
select CPU_SUPPORTS_HUGEPAGES
|
2014-01-27 15:23:10 +00:00
|
|
|
select CPU_SUPPORTS_MSA
|
2005-07-12 14:51:22 +00:00
|
|
|
help
|
|
|
|
Choose this option to build a kernel for release 2 or later of the
|
|
|
|
MIPS64 architecture. Many modern embedded systems with a 64-bit
|
|
|
|
MIPS processor are based on a MIPS64 processor. If you know the
|
|
|
|
specific type of processor in your system, choose those that one
|
|
|
|
otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2014-10-27 10:34:11 +00:00
|
|
|
config CPU_MIPS64_R6
|
2015-07-16 12:24:46 +00:00
|
|
|
bool "MIPS64 Release 6"
|
2014-10-27 10:34:11 +00:00
|
|
|
depends on SYS_HAS_CPU_MIPS64_R6
|
|
|
|
select CPU_HAS_PREFETCH
|
|
|
|
select CPU_SUPPORTS_32BIT_KERNEL
|
|
|
|
select CPU_SUPPORTS_64BIT_KERNEL
|
|
|
|
select CPU_SUPPORTS_HIGHMEM
|
|
|
|
select CPU_SUPPORTS_MSA
|
2014-11-13 11:25:27 +00:00
|
|
|
select GENERIC_CSUM
|
2015-07-10 15:00:24 +00:00
|
|
|
select MIPS_O32_FP64_SUPPORT if MIPS32_O32
|
2014-10-27 10:34:11 +00:00
|
|
|
help
|
|
|
|
Choose this option to build a kernel for release 6 or later of the
|
|
|
|
MIPS64 architecture. New MIPS processors, starting with the Warrior
|
|
|
|
family, are based on a MIPS64r6 processor. If you own an older
|
|
|
|
processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
|
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
config CPU_R3000
|
|
|
|
bool "R3000"
|
2005-10-20 21:33:09 +00:00
|
|
|
depends on SYS_HAS_CPU_R3000
|
2006-04-24 13:58:53 +00:00
|
|
|
select CPU_HAS_WB
|
2005-09-03 22:56:21 +00:00
|
|
|
select CPU_SUPPORTS_32BIT_KERNEL
|
2005-08-10 15:17:11 +00:00
|
|
|
select CPU_SUPPORTS_HIGHMEM
|
2005-04-16 22:20:36 +00:00
|
|
|
help
|
|
|
|
Please make sure to pick the right CPU type. Linux/MIPS is not
|
|
|
|
designed to be generic, i.e. Kernels compiled for R3000 CPUs will
|
|
|
|
*not* work on R4000 machines and vice versa. However, since most
|
|
|
|
of the supported machines have an R4000 (or similar) CPU, R4x00
|
|
|
|
might be a safe bet. If the resulting kernel does not work,
|
|
|
|
try to recompile with R3000.
|
|
|
|
|
|
|
|
config CPU_TX39XX
|
|
|
|
bool "R39XX"
|
2005-10-20 21:33:09 +00:00
|
|
|
depends on SYS_HAS_CPU_TX39XX
|
2005-09-03 22:56:21 +00:00
|
|
|
select CPU_SUPPORTS_32BIT_KERNEL
|
2005-04-16 22:20:36 +00:00
|
|
|
|
|
|
|
config CPU_VR41XX
|
|
|
|
bool "R41xx"
|
2005-10-20 21:33:09 +00:00
|
|
|
depends on SYS_HAS_CPU_VR41XX
|
2005-09-03 22:56:21 +00:00
|
|
|
select CPU_SUPPORTS_32BIT_KERNEL
|
|
|
|
select CPU_SUPPORTS_64BIT_KERNEL
|
2005-04-16 22:20:36 +00:00
|
|
|
help
|
2005-10-29 18:32:41 +00:00
|
|
|
The options selects support for the NEC VR4100 series of processors.
|
2005-04-16 22:20:36 +00:00
|
|
|
Only choose this option if you have one of these processors as a
|
|
|
|
kernel built with this option will not run on any other type of
|
|
|
|
processor or vice versa.
|
|
|
|
|
|
|
|
config CPU_R4300
|
|
|
|
bool "R4300"
|
2005-10-20 21:33:09 +00:00
|
|
|
depends on SYS_HAS_CPU_R4300
|
2005-09-03 22:56:21 +00:00
|
|
|
select CPU_SUPPORTS_32BIT_KERNEL
|
|
|
|
select CPU_SUPPORTS_64BIT_KERNEL
|
2005-04-16 22:20:36 +00:00
|
|
|
help
|
|
|
|
MIPS Technologies R4300-series processors.
|
|
|
|
|
|
|
|
config CPU_R4X00
|
|
|
|
bool "R4x00"
|
2005-10-20 21:33:09 +00:00
|
|
|
depends on SYS_HAS_CPU_R4X00
|
2005-09-03 22:56:21 +00:00
|
|
|
select CPU_SUPPORTS_32BIT_KERNEL
|
|
|
|
select CPU_SUPPORTS_64BIT_KERNEL
|
2012-10-18 11:54:15 +00:00
|
|
|
select CPU_SUPPORTS_HUGEPAGES
|
2005-04-16 22:20:36 +00:00
|
|
|
help
|
|
|
|
MIPS Technologies R4000-series processors other than 4300, including
|
|
|
|
the R4000, R4400, R4600, and 4700.
|
|
|
|
|
|
|
|
config CPU_TX49XX
|
|
|
|
bool "R49XX"
|
2005-10-20 21:33:09 +00:00
|
|
|
depends on SYS_HAS_CPU_TX49XX
|
2006-03-17 03:59:22 +00:00
|
|
|
select CPU_HAS_PREFETCH
|
2005-09-03 22:56:21 +00:00
|
|
|
select CPU_SUPPORTS_32BIT_KERNEL
|
|
|
|
select CPU_SUPPORTS_64BIT_KERNEL
|
2012-10-18 11:54:15 +00:00
|
|
|
select CPU_SUPPORTS_HUGEPAGES
|
2005-04-16 22:20:36 +00:00
|
|
|
|
|
|
|
config CPU_R5000
|
|
|
|
bool "R5000"
|
2005-10-20 21:33:09 +00:00
|
|
|
depends on SYS_HAS_CPU_R5000
|
2005-09-03 22:56:21 +00:00
|
|
|
select CPU_SUPPORTS_32BIT_KERNEL
|
|
|
|
select CPU_SUPPORTS_64BIT_KERNEL
|
2012-10-18 11:54:15 +00:00
|
|
|
select CPU_SUPPORTS_HUGEPAGES
|
2005-04-16 22:20:36 +00:00
|
|
|
help
|
|
|
|
MIPS Technologies R5000-series processors other than the Nevada.
|
|
|
|
|
|
|
|
config CPU_R5432
|
|
|
|
bool "R5432"
|
2005-10-20 21:33:09 +00:00
|
|
|
depends on SYS_HAS_CPU_R5432
|
2005-10-29 18:32:41 +00:00
|
|
|
select CPU_SUPPORTS_32BIT_KERNEL
|
|
|
|
select CPU_SUPPORTS_64BIT_KERNEL
|
2012-10-18 11:54:15 +00:00
|
|
|
select CPU_SUPPORTS_HUGEPAGES
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2008-10-23 16:27:57 +00:00
|
|
|
config CPU_R5500
|
|
|
|
bool "R5500"
|
|
|
|
depends on SYS_HAS_CPU_R5500
|
|
|
|
select CPU_SUPPORTS_32BIT_KERNEL
|
|
|
|
select CPU_SUPPORTS_64BIT_KERNEL
|
2009-05-28 00:47:46 +00:00
|
|
|
select CPU_SUPPORTS_HUGEPAGES
|
2008-10-23 16:27:57 +00:00
|
|
|
help
|
|
|
|
NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
|
|
|
|
instruction set.
|
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
config CPU_R6000
|
|
|
|
bool "R6000"
|
2005-10-20 21:33:09 +00:00
|
|
|
depends on SYS_HAS_CPU_R6000
|
2005-09-03 22:56:21 +00:00
|
|
|
select CPU_SUPPORTS_32BIT_KERNEL
|
2005-04-16 22:20:36 +00:00
|
|
|
help
|
|
|
|
MIPS Technologies R6000 and R6000A series processors. Note these
|
2006-06-20 16:15:20 +00:00
|
|
|
processors are extremely rare and the support for them is incomplete.
|
2005-04-16 22:20:36 +00:00
|
|
|
|
|
|
|
config CPU_NEVADA
|
|
|
|
bool "RM52xx"
|
2005-10-20 21:33:09 +00:00
|
|
|
depends on SYS_HAS_CPU_NEVADA
|
2005-09-03 22:56:21 +00:00
|
|
|
select CPU_SUPPORTS_32BIT_KERNEL
|
|
|
|
select CPU_SUPPORTS_64BIT_KERNEL
|
2012-10-18 11:54:15 +00:00
|
|
|
select CPU_SUPPORTS_HUGEPAGES
|
2005-04-16 22:20:36 +00:00
|
|
|
help
|
|
|
|
QED / PMC-Sierra RM52xx-series ("Nevada") processors.
|
|
|
|
|
|
|
|
config CPU_R8000
|
|
|
|
bool "R8000"
|
2005-10-20 21:33:09 +00:00
|
|
|
depends on SYS_HAS_CPU_R8000
|
2005-10-29 18:32:41 +00:00
|
|
|
select CPU_HAS_PREFETCH
|
2005-09-03 22:56:21 +00:00
|
|
|
select CPU_SUPPORTS_64BIT_KERNEL
|
2005-04-16 22:20:36 +00:00
|
|
|
help
|
|
|
|
MIPS Technologies R8000 processors. Note these processors are
|
|
|
|
uncommon and the support for them is incomplete.
|
|
|
|
|
|
|
|
config CPU_R10000
|
|
|
|
bool "R10000"
|
2005-10-20 21:33:09 +00:00
|
|
|
depends on SYS_HAS_CPU_R10000
|
2005-10-29 18:32:41 +00:00
|
|
|
select CPU_HAS_PREFETCH
|
2005-09-03 22:56:21 +00:00
|
|
|
select CPU_SUPPORTS_32BIT_KERNEL
|
|
|
|
select CPU_SUPPORTS_64BIT_KERNEL
|
2005-08-10 15:17:11 +00:00
|
|
|
select CPU_SUPPORTS_HIGHMEM
|
2012-10-18 11:54:15 +00:00
|
|
|
select CPU_SUPPORTS_HUGEPAGES
|
2005-04-16 22:20:36 +00:00
|
|
|
help
|
|
|
|
MIPS Technologies R10000-series processors.
|
|
|
|
|
|
|
|
config CPU_RM7000
|
|
|
|
bool "RM7000"
|
2005-10-20 21:33:09 +00:00
|
|
|
depends on SYS_HAS_CPU_RM7000
|
2005-10-29 18:32:41 +00:00
|
|
|
select CPU_HAS_PREFETCH
|
2005-09-03 22:56:21 +00:00
|
|
|
select CPU_SUPPORTS_32BIT_KERNEL
|
|
|
|
select CPU_SUPPORTS_64BIT_KERNEL
|
2005-08-10 15:17:11 +00:00
|
|
|
select CPU_SUPPORTS_HIGHMEM
|
2012-10-18 11:54:15 +00:00
|
|
|
select CPU_SUPPORTS_HUGEPAGES
|
2005-04-16 22:20:36 +00:00
|
|
|
|
|
|
|
config CPU_SB1
|
|
|
|
bool "SB1"
|
2005-10-20 21:33:09 +00:00
|
|
|
depends on SYS_HAS_CPU_SB1
|
2005-09-03 22:56:21 +00:00
|
|
|
select CPU_SUPPORTS_32BIT_KERNEL
|
|
|
|
select CPU_SUPPORTS_64BIT_KERNEL
|
2005-08-10 15:17:11 +00:00
|
|
|
select CPU_SUPPORTS_HIGHMEM
|
2012-10-18 11:54:15 +00:00
|
|
|
select CPU_SUPPORTS_HUGEPAGES
|
2006-10-31 03:45:07 +00:00
|
|
|
select WEAK_ORDERING
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2008-12-11 23:33:38 +00:00
|
|
|
config CPU_CAVIUM_OCTEON
|
|
|
|
bool "Cavium Octeon processor"
|
2009-02-02 19:30:59 +00:00
|
|
|
depends on SYS_HAS_CPU_CAVIUM_OCTEON
|
2008-12-11 23:33:38 +00:00
|
|
|
select CPU_HAS_PREFETCH
|
|
|
|
select CPU_SUPPORTS_64BIT_KERNEL
|
|
|
|
select WEAK_ORDERING
|
|
|
|
select CPU_SUPPORTS_HIGHMEM
|
2009-05-28 00:47:46 +00:00
|
|
|
select CPU_SUPPORTS_HUGEPAGES
|
2015-05-25 19:27:29 +00:00
|
|
|
select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
|
|
|
|
select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
|
2014-01-14 17:54:38 +00:00
|
|
|
select MIPS_L1_CACHE_SHIFT_7
|
2008-12-11 23:33:38 +00:00
|
|
|
help
|
|
|
|
The Cavium Octeon processor is a highly integrated chip containing
|
|
|
|
many ethernet hardware widgets for networking tasks. The processor
|
|
|
|
can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
|
|
|
|
Full details can be found at http://www.caviumnetworks.com.
|
|
|
|
|
2013-12-18 13:12:02 +00:00
|
|
|
config CPU_BMIPS
|
|
|
|
bool "Broadcom BMIPS"
|
|
|
|
depends on SYS_HAS_CPU_BMIPS
|
|
|
|
select CPU_MIPS32
|
2013-12-18 13:12:05 +00:00
|
|
|
select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
|
2013-12-18 13:12:02 +00:00
|
|
|
select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
|
|
|
|
select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
|
|
|
|
select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
|
|
|
|
select CPU_SUPPORTS_32BIT_KERNEL
|
|
|
|
select DMA_NONCOHERENT
|
2015-05-26 16:20:06 +00:00
|
|
|
select IRQ_MIPS_CPU
|
2013-12-18 13:12:02 +00:00
|
|
|
select SWAP_IO_SPACE
|
|
|
|
select WEAK_ORDERING
|
2010-10-17 17:56:53 +00:00
|
|
|
select CPU_SUPPORTS_HIGHMEM
|
2013-12-18 13:12:04 +00:00
|
|
|
select CPU_HAS_PREFETCH
|
2010-10-17 17:56:53 +00:00
|
|
|
help
|
2013-12-18 13:12:05 +00:00
|
|
|
Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
|
2010-10-17 17:56:53 +00:00
|
|
|
|
2011-05-06 20:06:57 +00:00
|
|
|
config CPU_XLR
|
|
|
|
bool "Netlogic XLR SoC"
|
|
|
|
depends on SYS_HAS_CPU_XLR
|
|
|
|
select CPU_SUPPORTS_32BIT_KERNEL
|
|
|
|
select CPU_SUPPORTS_64BIT_KERNEL
|
|
|
|
select CPU_SUPPORTS_HIGHMEM
|
2012-10-18 11:54:15 +00:00
|
|
|
select CPU_SUPPORTS_HUGEPAGES
|
2011-05-06 20:06:57 +00:00
|
|
|
select WEAK_ORDERING
|
|
|
|
select WEAK_REORDERING_BEYOND_LLSC
|
|
|
|
help
|
|
|
|
Netlogic Microsystems XLR/XLS processors.
|
2011-11-16 00:21:28 +00:00
|
|
|
|
|
|
|
config CPU_XLP
|
|
|
|
bool "Netlogic XLP SoC"
|
|
|
|
depends on SYS_HAS_CPU_XLP
|
|
|
|
select CPU_SUPPORTS_32BIT_KERNEL
|
|
|
|
select CPU_SUPPORTS_64BIT_KERNEL
|
|
|
|
select CPU_SUPPORTS_HIGHMEM
|
|
|
|
select WEAK_ORDERING
|
|
|
|
select WEAK_REORDERING_BEYOND_LLSC
|
|
|
|
select CPU_HAS_PREFETCH
|
2012-10-31 12:01:29 +00:00
|
|
|
select CPU_MIPSR2
|
2015-01-07 11:28:32 +00:00
|
|
|
select CPU_SUPPORTS_HUGEPAGES
|
2016-05-06 13:36:24 +00:00
|
|
|
select MIPS_ASID_BITS_VARIABLE
|
2011-11-16 00:21:28 +00:00
|
|
|
help
|
|
|
|
Netlogic Microsystems XLP processors.
|
2005-04-16 22:20:36 +00:00
|
|
|
endchoice
|
|
|
|
|
2013-12-03 10:22:26 +00:00
|
|
|
config CPU_MIPS32_3_5_FEATURES
|
|
|
|
bool "MIPS32 Release 3.5 Features"
|
|
|
|
depends on SYS_HAS_CPU_MIPS32_R3_5
|
2014-10-27 10:34:11 +00:00
|
|
|
depends on CPU_MIPS32_R2 || CPU_MIPS32_R6
|
2013-12-03 10:22:26 +00:00
|
|
|
help
|
|
|
|
Choose this option to build a kernel for release 2 or later of the
|
|
|
|
MIPS32 architecture including features from the 3.5 release such as
|
|
|
|
support for Enhanced Virtual Addressing (EVA).
|
|
|
|
|
|
|
|
config CPU_MIPS32_3_5_EVA
|
|
|
|
bool "Enhanced Virtual Addressing (EVA)"
|
|
|
|
depends on CPU_MIPS32_3_5_FEATURES
|
|
|
|
select EVA
|
|
|
|
default y
|
|
|
|
help
|
|
|
|
Choose this option if you want to enable the Enhanced Virtual
|
|
|
|
Addressing (EVA) on your MIPS32 core (such as proAptiv).
|
|
|
|
One of its primary benefits is an increase in the maximum size
|
|
|
|
of lowmem (up to 3GB). If unsure, say 'N' here.
|
|
|
|
|
2015-02-27 00:16:38 +00:00
|
|
|
config CPU_MIPS32_R5_FEATURES
|
|
|
|
bool "MIPS32 Release 5 Features"
|
|
|
|
depends on SYS_HAS_CPU_MIPS32_R5
|
|
|
|
depends on CPU_MIPS32_R2
|
|
|
|
help
|
|
|
|
Choose this option to build a kernel for release 2 or later of the
|
|
|
|
MIPS32 architecture including features from release 5 such as
|
|
|
|
support for Extended Physical Addressing (XPA).
|
|
|
|
|
|
|
|
config CPU_MIPS32_R5_XPA
|
|
|
|
bool "Extended Physical Addressing (XPA)"
|
|
|
|
depends on CPU_MIPS32_R5_FEATURES
|
|
|
|
depends on !EVA
|
|
|
|
depends on !PAGE_SIZE_4KB
|
|
|
|
depends on SYS_SUPPORTS_HIGHMEM
|
|
|
|
select XPA
|
|
|
|
select HIGHMEM
|
|
|
|
select ARCH_PHYS_ADDR_T_64BIT
|
|
|
|
default n
|
|
|
|
help
|
|
|
|
Choose this option if you want to enable the Extended Physical
|
|
|
|
Addressing (XPA) on your MIPS32 core (such as P5600 series). The
|
|
|
|
benefit is to increase physical addressing equal to or greater
|
|
|
|
than 40 bits. Note that this has the side effect of turning on
|
|
|
|
64-bit addressing which in turn makes the PTEs 64-bit in size.
|
|
|
|
If unsure, say 'N' here.
|
|
|
|
|
2010-04-10 12:04:42 +00:00
|
|
|
if CPU_LOONGSON2F
|
|
|
|
config CPU_NOP_WORKAROUNDS
|
|
|
|
bool
|
|
|
|
|
|
|
|
config CPU_JUMP_WORKAROUNDS
|
|
|
|
bool
|
|
|
|
|
|
|
|
config CPU_LOONGSON2F_WORKAROUNDS
|
|
|
|
bool "Loongson 2F Workarounds"
|
|
|
|
default y
|
|
|
|
select CPU_NOP_WORKAROUNDS
|
|
|
|
select CPU_JUMP_WORKAROUNDS
|
|
|
|
help
|
|
|
|
Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
|
|
|
|
require workarounds. Without workarounds the system may hang
|
|
|
|
unexpectedly. For more information please refer to the gas
|
|
|
|
-mfix-loongson2f-nop and -mfix-loongson2f-jump options.
|
|
|
|
|
|
|
|
Loongson 2F03 and later have fixed these issues and no workarounds
|
|
|
|
are needed. The workarounds have no significant side effect on them
|
|
|
|
but may decrease the performance of the system so this option should
|
|
|
|
be disabled unless the kernel is intended to be run on 2F01 or 2F02
|
|
|
|
systems.
|
|
|
|
|
|
|
|
If unsure, please say Y.
|
|
|
|
endif # CPU_LOONGSON2F
|
|
|
|
|
2009-10-14 10:12:16 +00:00
|
|
|
config SYS_SUPPORTS_ZBOOT
|
|
|
|
bool
|
|
|
|
select HAVE_KERNEL_GZIP
|
|
|
|
select HAVE_KERNEL_BZIP2
|
2013-09-16 15:55:20 +00:00
|
|
|
select HAVE_KERNEL_LZ4
|
2009-10-14 10:12:16 +00:00
|
|
|
select HAVE_KERNEL_LZMA
|
2010-01-15 12:34:46 +00:00
|
|
|
select HAVE_KERNEL_LZO
|
2013-09-11 10:51:41 +00:00
|
|
|
select HAVE_KERNEL_XZ
|
2009-10-14 10:12:16 +00:00
|
|
|
|
|
|
|
config SYS_SUPPORTS_ZBOOT_UART16550
|
|
|
|
bool
|
|
|
|
select SYS_SUPPORTS_ZBOOT
|
|
|
|
|
2015-12-10 09:57:21 +00:00
|
|
|
config SYS_SUPPORTS_ZBOOT_UART_PROM
|
|
|
|
bool
|
|
|
|
select SYS_SUPPORTS_ZBOOT
|
|
|
|
|
2009-07-02 15:27:41 +00:00
|
|
|
config CPU_LOONGSON2
|
|
|
|
bool
|
|
|
|
select CPU_SUPPORTS_32BIT_KERNEL
|
|
|
|
select CPU_SUPPORTS_64BIT_KERNEL
|
|
|
|
select CPU_SUPPORTS_HIGHMEM
|
2012-10-18 11:54:15 +00:00
|
|
|
select CPU_SUPPORTS_HUGEPAGES
|
2009-07-02 15:27:41 +00:00
|
|
|
|
2012-07-25 14:17:24 +00:00
|
|
|
config CPU_LOONGSON1
|
|
|
|
bool
|
|
|
|
select CPU_MIPS32
|
|
|
|
select CPU_MIPSR2
|
|
|
|
select CPU_HAS_PREFETCH
|
|
|
|
select CPU_SUPPORTS_32BIT_KERNEL
|
|
|
|
select CPU_SUPPORTS_HIGHMEM
|
2014-10-10 03:40:01 +00:00
|
|
|
select CPU_SUPPORTS_CPUFREQ
|
2012-07-25 14:17:24 +00:00
|
|
|
|
2013-12-18 13:12:05 +00:00
|
|
|
config CPU_BMIPS32_3300
|
2013-12-18 13:12:06 +00:00
|
|
|
select SMP_UP if SMP
|
2011-11-11 06:30:24 +00:00
|
|
|
bool
|
2013-12-18 13:12:02 +00:00
|
|
|
|
|
|
|
config CPU_BMIPS4350
|
|
|
|
bool
|
|
|
|
select SYS_SUPPORTS_SMP
|
|
|
|
select SYS_SUPPORTS_HOTPLUG_CPU
|
|
|
|
|
|
|
|
config CPU_BMIPS4380
|
|
|
|
bool
|
2014-10-21 04:27:58 +00:00
|
|
|
select MIPS_L1_CACHE_SHIFT_6
|
2013-12-18 13:12:02 +00:00
|
|
|
select SYS_SUPPORTS_SMP
|
|
|
|
select SYS_SUPPORTS_HOTPLUG_CPU
|
2016-02-09 20:55:53 +00:00
|
|
|
select CPU_HAS_RIXI
|
2013-12-18 13:12:02 +00:00
|
|
|
|
|
|
|
config CPU_BMIPS5000
|
|
|
|
bool
|
|
|
|
select MIPS_CPU_SCACHE
|
2014-10-21 04:27:58 +00:00
|
|
|
select MIPS_L1_CACHE_SHIFT_7
|
2013-12-18 13:12:02 +00:00
|
|
|
select SYS_SUPPORTS_SMP
|
|
|
|
select SYS_SUPPORTS_HOTPLUG_CPU
|
2016-02-09 20:55:53 +00:00
|
|
|
select CPU_HAS_RIXI
|
2011-11-11 06:30:24 +00:00
|
|
|
|
2014-03-21 10:44:07 +00:00
|
|
|
config SYS_HAS_CPU_LOONGSON3
|
|
|
|
bool
|
|
|
|
select CPU_SUPPORTS_CPUFREQ
|
2016-03-03 01:45:09 +00:00
|
|
|
select CPU_HAS_RIXI
|
2014-03-21 10:44:07 +00:00
|
|
|
|
2009-07-02 15:27:41 +00:00
|
|
|
config SYS_HAS_CPU_LOONGSON2E
|
2007-06-06 06:52:43 +00:00
|
|
|
bool
|
|
|
|
|
2009-11-06 10:45:05 +00:00
|
|
|
config SYS_HAS_CPU_LOONGSON2F
|
|
|
|
bool
|
2009-11-11 05:39:12 +00:00
|
|
|
select CPU_SUPPORTS_CPUFREQ
|
|
|
|
select CPU_SUPPORTS_ADDRWINCFG if 64BIT
|
2009-11-11 05:59:23 +00:00
|
|
|
select CPU_SUPPORTS_UNCACHED_ACCELERATED
|
2009-11-06 10:45:05 +00:00
|
|
|
|
2012-07-25 14:17:24 +00:00
|
|
|
config SYS_HAS_CPU_LOONGSON1B
|
|
|
|
bool
|
|
|
|
|
2005-10-20 21:33:09 +00:00
|
|
|
config SYS_HAS_CPU_MIPS32_R1
|
|
|
|
bool
|
|
|
|
|
|
|
|
config SYS_HAS_CPU_MIPS32_R2
|
|
|
|
bool
|
|
|
|
|
2013-12-03 10:22:26 +00:00
|
|
|
config SYS_HAS_CPU_MIPS32_R3_5
|
|
|
|
bool
|
|
|
|
|
2015-02-27 00:16:38 +00:00
|
|
|
config SYS_HAS_CPU_MIPS32_R5
|
|
|
|
bool
|
|
|
|
|
2014-10-27 10:34:11 +00:00
|
|
|
config SYS_HAS_CPU_MIPS32_R6
|
|
|
|
bool
|
|
|
|
|
2005-10-20 21:33:09 +00:00
|
|
|
config SYS_HAS_CPU_MIPS64_R1
|
|
|
|
bool
|
|
|
|
|
|
|
|
config SYS_HAS_CPU_MIPS64_R2
|
|
|
|
bool
|
|
|
|
|
2014-10-27 10:34:11 +00:00
|
|
|
config SYS_HAS_CPU_MIPS64_R6
|
|
|
|
bool
|
|
|
|
|
2005-10-20 21:33:09 +00:00
|
|
|
config SYS_HAS_CPU_R3000
|
|
|
|
bool
|
|
|
|
|
|
|
|
config SYS_HAS_CPU_TX39XX
|
|
|
|
bool
|
|
|
|
|
|
|
|
config SYS_HAS_CPU_VR41XX
|
|
|
|
bool
|
|
|
|
|
|
|
|
config SYS_HAS_CPU_R4300
|
|
|
|
bool
|
|
|
|
|
|
|
|
config SYS_HAS_CPU_R4X00
|
|
|
|
bool
|
|
|
|
|
|
|
|
config SYS_HAS_CPU_TX49XX
|
|
|
|
bool
|
|
|
|
|
|
|
|
config SYS_HAS_CPU_R5000
|
|
|
|
bool
|
|
|
|
|
|
|
|
config SYS_HAS_CPU_R5432
|
|
|
|
bool
|
|
|
|
|
2008-10-23 16:27:57 +00:00
|
|
|
config SYS_HAS_CPU_R5500
|
|
|
|
bool
|
|
|
|
|
2005-10-20 21:33:09 +00:00
|
|
|
config SYS_HAS_CPU_R6000
|
|
|
|
bool
|
|
|
|
|
|
|
|
config SYS_HAS_CPU_NEVADA
|
|
|
|
bool
|
|
|
|
|
|
|
|
config SYS_HAS_CPU_R8000
|
|
|
|
bool
|
|
|
|
|
|
|
|
config SYS_HAS_CPU_R10000
|
|
|
|
bool
|
|
|
|
|
|
|
|
config SYS_HAS_CPU_RM7000
|
|
|
|
bool
|
|
|
|
|
|
|
|
config SYS_HAS_CPU_SB1
|
|
|
|
bool
|
|
|
|
|
2009-02-02 19:30:59 +00:00
|
|
|
config SYS_HAS_CPU_CAVIUM_OCTEON
|
|
|
|
bool
|
|
|
|
|
2013-12-18 13:12:02 +00:00
|
|
|
config SYS_HAS_CPU_BMIPS
|
2010-10-17 17:56:53 +00:00
|
|
|
bool
|
|
|
|
|
2013-12-18 13:12:05 +00:00
|
|
|
config SYS_HAS_CPU_BMIPS32_3300
|
2010-10-17 17:56:53 +00:00
|
|
|
bool
|
2013-12-18 13:12:02 +00:00
|
|
|
select SYS_HAS_CPU_BMIPS
|
2010-10-17 17:56:53 +00:00
|
|
|
|
|
|
|
config SYS_HAS_CPU_BMIPS4350
|
|
|
|
bool
|
2013-12-18 13:12:02 +00:00
|
|
|
select SYS_HAS_CPU_BMIPS
|
2010-10-17 17:56:53 +00:00
|
|
|
|
|
|
|
config SYS_HAS_CPU_BMIPS4380
|
|
|
|
bool
|
2013-12-18 13:12:02 +00:00
|
|
|
select SYS_HAS_CPU_BMIPS
|
2010-10-17 17:56:53 +00:00
|
|
|
|
|
|
|
config SYS_HAS_CPU_BMIPS5000
|
|
|
|
bool
|
2013-12-18 13:12:02 +00:00
|
|
|
select SYS_HAS_CPU_BMIPS
|
2010-10-17 17:56:53 +00:00
|
|
|
|
2011-05-06 20:06:57 +00:00
|
|
|
config SYS_HAS_CPU_XLR
|
|
|
|
bool
|
|
|
|
|
2011-11-16 00:21:28 +00:00
|
|
|
config SYS_HAS_CPU_XLP
|
|
|
|
bool
|
|
|
|
|
2014-05-07 11:20:57 +00:00
|
|
|
config MIPS_MALTA_PM
|
|
|
|
depends on MIPS_MALTA
|
|
|
|
depends on PCI
|
|
|
|
bool
|
|
|
|
default y
|
|
|
|
|
2007-07-14 12:24:05 +00:00
|
|
|
#
|
|
|
|
# CPU may reorder R->R, R->W, W->R, W->W
|
|
|
|
# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
|
|
|
|
#
|
2006-10-31 03:45:07 +00:00
|
|
|
config WEAK_ORDERING
|
|
|
|
bool
|
2007-07-14 12:24:05 +00:00
|
|
|
|
|
|
|
#
|
|
|
|
# CPU may reorder reads and writes beyond LL/SC
|
|
|
|
# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
|
|
|
|
#
|
|
|
|
config WEAK_REORDERING_BEYOND_LLSC
|
|
|
|
bool
|
2005-10-29 18:32:41 +00:00
|
|
|
endmenu
|
|
|
|
|
|
|
|
#
|
2006-06-20 16:15:20 +00:00
|
|
|
# These two indicate any level of the MIPS32 and MIPS64 architecture
|
2005-10-29 18:32:41 +00:00
|
|
|
#
|
|
|
|
config CPU_MIPS32
|
|
|
|
bool
|
2014-10-27 10:34:11 +00:00
|
|
|
default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6
|
2005-10-29 18:32:41 +00:00
|
|
|
|
|
|
|
config CPU_MIPS64
|
|
|
|
bool
|
2014-10-27 10:34:11 +00:00
|
|
|
default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6
|
2005-10-29 18:32:41 +00:00
|
|
|
|
|
|
|
#
|
2006-06-20 16:15:20 +00:00
|
|
|
# These two indicate the revision of the architecture, either Release 1 or Release 2
|
2005-10-29 18:32:41 +00:00
|
|
|
#
|
|
|
|
config CPU_MIPSR1
|
|
|
|
bool
|
|
|
|
default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
|
|
|
|
|
|
|
|
config CPU_MIPSR2
|
|
|
|
bool
|
2008-12-11 23:33:38 +00:00
|
|
|
default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
|
2016-02-09 20:55:51 +00:00
|
|
|
select CPU_HAS_RIXI
|
2014-11-13 13:32:03 +00:00
|
|
|
select MIPS_SPRAM
|
2005-10-29 18:32:41 +00:00
|
|
|
|
2014-10-27 10:34:11 +00:00
|
|
|
config CPU_MIPSR6
|
|
|
|
bool
|
|
|
|
default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
|
2016-02-09 20:55:51 +00:00
|
|
|
select CPU_HAS_RIXI
|
2016-05-06 12:35:03 +00:00
|
|
|
select HAVE_ARCH_BITREVERSE
|
2016-05-06 13:36:24 +00:00
|
|
|
select MIPS_ASID_BITS_VARIABLE
|
2014-11-13 13:32:03 +00:00
|
|
|
select MIPS_SPRAM
|
2005-10-29 18:32:41 +00:00
|
|
|
|
2013-12-03 10:22:26 +00:00
|
|
|
config EVA
|
|
|
|
bool
|
|
|
|
|
2015-02-27 00:16:38 +00:00
|
|
|
config XPA
|
|
|
|
bool
|
|
|
|
|
2005-10-29 18:32:41 +00:00
|
|
|
config SYS_SUPPORTS_32BIT_KERNEL
|
|
|
|
bool
|
|
|
|
config SYS_SUPPORTS_64BIT_KERNEL
|
|
|
|
bool
|
|
|
|
config CPU_SUPPORTS_32BIT_KERNEL
|
|
|
|
bool
|
|
|
|
config CPU_SUPPORTS_64BIT_KERNEL
|
|
|
|
bool
|
2009-11-11 05:39:12 +00:00
|
|
|
config CPU_SUPPORTS_CPUFREQ
|
|
|
|
bool
|
|
|
|
config CPU_SUPPORTS_ADDRWINCFG
|
|
|
|
bool
|
2009-05-28 00:47:46 +00:00
|
|
|
config CPU_SUPPORTS_HUGEPAGES
|
|
|
|
bool
|
2009-11-11 05:59:23 +00:00
|
|
|
config CPU_SUPPORTS_UNCACHED_ACCELERATED
|
|
|
|
bool
|
2009-10-14 19:16:56 +00:00
|
|
|
config MIPS_PGD_C0_CONTEXT
|
|
|
|
bool
|
2012-10-31 12:01:29 +00:00
|
|
|
default y if 64BIT && CPU_MIPSR2 && !CPU_XLP
|
2005-10-29 18:32:41 +00:00
|
|
|
|
2008-09-23 07:04:26 +00:00
|
|
|
#
|
|
|
|
# Set to y for ptrace access to watch registers.
|
|
|
|
#
|
|
|
|
config HARDWARE_WATCHPOINTS
|
|
|
|
bool
|
2016-03-01 22:19:37 +00:00
|
|
|
default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
|
2008-09-23 07:04:26 +00:00
|
|
|
|
2005-10-29 18:32:41 +00:00
|
|
|
menu "Kernel type"
|
|
|
|
|
|
|
|
choice
|
|
|
|
prompt "Kernel code model"
|
|
|
|
help
|
|
|
|
You should only select this option if you have a workload that
|
|
|
|
actually benefits from 64-bit processing or if your machine has
|
|
|
|
large memory. You will only be presented a single option in this
|
|
|
|
menu if your system does not support both 32-bit and 64-bit kernels.
|
|
|
|
|
|
|
|
config 32BIT
|
|
|
|
bool "32-bit kernel"
|
|
|
|
depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
|
|
|
|
select TRAD_SIGNALS
|
|
|
|
help
|
|
|
|
Select this option if you want to build a 32-bit kernel.
|
2015-07-23 10:02:09 +00:00
|
|
|
|
2005-10-29 18:32:41 +00:00
|
|
|
config 64BIT
|
|
|
|
bool "64-bit kernel"
|
|
|
|
depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
|
|
|
|
help
|
|
|
|
Select this option if you want to build a 64-bit kernel.
|
|
|
|
|
|
|
|
endchoice
|
|
|
|
|
2012-11-22 02:33:59 +00:00
|
|
|
config KVM_GUEST
|
|
|
|
bool "KVM Guest Kernel"
|
2013-07-12 10:26:11 +00:00
|
|
|
depends on BROKEN_ON_SMP
|
2012-11-22 02:33:59 +00:00
|
|
|
help
|
2015-12-16 23:49:26 +00:00
|
|
|
Select this option if building a guest kernel for KVM (Trap & Emulate)
|
|
|
|
mode.
|
2012-11-22 02:33:59 +00:00
|
|
|
|
2014-05-29 09:16:36 +00:00
|
|
|
config KVM_GUEST_TIMER_FREQ
|
|
|
|
int "Count/Compare Timer Frequency (MHz)"
|
2012-11-22 02:33:59 +00:00
|
|
|
depends on KVM_GUEST
|
2014-05-29 09:16:36 +00:00
|
|
|
default 100
|
2012-11-22 02:33:59 +00:00
|
|
|
help
|
2014-05-29 09:16:36 +00:00
|
|
|
Set this to non-zero if building a guest kernel for KVM to skip RTC
|
|
|
|
emulation when determining guest CPU Frequency. Instead, the guest's
|
|
|
|
timer frequency is specified directly.
|
2012-11-22 02:33:59 +00:00
|
|
|
|
2015-05-15 01:34:43 +00:00
|
|
|
config MIPS_VA_BITS_48
|
|
|
|
bool "48 bits virtual memory"
|
|
|
|
depends on 64BIT
|
|
|
|
help
|
|
|
|
Support a maximum at least 48 bits of application virtual memory.
|
|
|
|
Default is 40 bits or less, depending on the CPU.
|
|
|
|
This option result in a small memory overhead for page tables.
|
|
|
|
This option is only supported with 16k and 64k page sizes.
|
|
|
|
If unsure, say N.
|
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
choice
|
|
|
|
prompt "Kernel page size"
|
|
|
|
default PAGE_SIZE_4KB
|
|
|
|
|
|
|
|
config PAGE_SIZE_4KB
|
|
|
|
bool "4kB"
|
2014-03-21 10:44:07 +00:00
|
|
|
depends on !CPU_LOONGSON2 && !CPU_LOONGSON3
|
2015-05-15 01:34:43 +00:00
|
|
|
depends on !MIPS_VA_BITS_48
|
2005-04-16 22:20:36 +00:00
|
|
|
help
|
|
|
|
This option select the standard 4kB Linux page size. On some
|
|
|
|
R3000-family processors this is the only available page size. Using
|
|
|
|
4kB page size will minimize memory consumption and is therefore
|
|
|
|
recommended for low memory systems.
|
|
|
|
|
|
|
|
config PAGE_SIZE_8KB
|
|
|
|
bool "8kB"
|
2013-01-17 02:53:19 +00:00
|
|
|
depends on CPU_R8000 || CPU_CAVIUM_OCTEON
|
2015-05-15 01:34:43 +00:00
|
|
|
depends on !MIPS_VA_BITS_48
|
2005-04-16 22:20:36 +00:00
|
|
|
help
|
|
|
|
Using 8kB page size will result in higher performance kernel at
|
|
|
|
the price of higher memory consumption. This option is available
|
2009-04-02 12:07:10 +00:00
|
|
|
only on R8000 and cnMIPS processors. Note that you will need a
|
|
|
|
suitable Linux distribution to support this.
|
2005-04-16 22:20:36 +00:00
|
|
|
|
|
|
|
config PAGE_SIZE_16KB
|
|
|
|
bool "16kB"
|
2006-05-17 13:04:30 +00:00
|
|
|
depends on !CPU_R3000 && !CPU_TX39XX
|
2005-04-16 22:20:36 +00:00
|
|
|
help
|
|
|
|
Using 16kB page size will result in higher performance kernel at
|
|
|
|
the price of higher memory consumption. This option is available on
|
2006-05-17 13:04:30 +00:00
|
|
|
all non-R3000 family processors. Note that you will need a suitable
|
|
|
|
Linux distribution to support this.
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2009-04-02 12:07:10 +00:00
|
|
|
config PAGE_SIZE_32KB
|
|
|
|
bool "32kB"
|
|
|
|
depends on CPU_CAVIUM_OCTEON
|
2015-05-15 01:34:43 +00:00
|
|
|
depends on !MIPS_VA_BITS_48
|
2009-04-02 12:07:10 +00:00
|
|
|
help
|
|
|
|
Using 32kB page size will result in higher performance kernel at
|
|
|
|
the price of higher memory consumption. This option is available
|
|
|
|
only on cnMIPS cores. Note that you will need a suitable Linux
|
|
|
|
distribution to support this.
|
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
config PAGE_SIZE_64KB
|
|
|
|
bool "64kB"
|
2016-02-03 09:32:22 +00:00
|
|
|
depends on !CPU_R3000 && !CPU_TX39XX && !CPU_R6000
|
2005-04-16 22:20:36 +00:00
|
|
|
help
|
|
|
|
Using 64kB page size will result in higher performance kernel at
|
|
|
|
the price of higher memory consumption. This option is available on
|
|
|
|
all non-R3000 family processor. Not that at the time of this
|
2006-05-17 13:04:30 +00:00
|
|
|
writing this option is still high experimental.
|
2005-04-16 22:20:36 +00:00
|
|
|
|
|
|
|
endchoice
|
|
|
|
|
2010-10-11 21:52:45 +00:00
|
|
|
config FORCE_MAX_ZONEORDER
|
|
|
|
int "Maximum zone order"
|
2014-01-21 11:22:35 +00:00
|
|
|
range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
|
|
|
|
default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
|
|
|
|
range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
|
|
|
|
default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
|
|
|
|
range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
|
|
|
|
default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
|
2010-10-11 21:52:45 +00:00
|
|
|
range 11 64
|
|
|
|
default "11"
|
|
|
|
help
|
|
|
|
The kernel memory allocator divides physically contiguous memory
|
|
|
|
blocks into "zones", where each zone is a power of two number of
|
|
|
|
pages. This option selects the largest power of two that the kernel
|
|
|
|
keeps in the memory allocator. If you need to allocate very large
|
|
|
|
blocks of physically contiguous memory, then you may need to
|
|
|
|
increase this value.
|
|
|
|
|
|
|
|
This config option is actually maximum order plus one. For example,
|
|
|
|
a value of 11 means that the largest free memory block is 2^10 pages.
|
|
|
|
|
|
|
|
The page size is not necessarily 4KB. Keep this in mind
|
|
|
|
when choosing a value for this option.
|
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
config BOARD_SCACHE
|
|
|
|
bool
|
|
|
|
|
|
|
|
config IP22_CPU_SCACHE
|
|
|
|
bool
|
|
|
|
select BOARD_SCACHE
|
|
|
|
|
2006-06-20 16:15:20 +00:00
|
|
|
#
|
|
|
|
# Support for a MIPS32 / MIPS64 style S-caches
|
|
|
|
#
|
|
|
|
config MIPS_CPU_SCACHE
|
|
|
|
bool
|
|
|
|
select BOARD_SCACHE
|
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
config R5000_CPU_SCACHE
|
|
|
|
bool
|
|
|
|
select BOARD_SCACHE
|
|
|
|
|
|
|
|
config RM7000_CPU_SCACHE
|
|
|
|
bool
|
|
|
|
select BOARD_SCACHE
|
|
|
|
|
|
|
|
config SIBYTE_DMA_PAGEOPS
|
|
|
|
bool "Use DMA to clear/copy pages"
|
|
|
|
depends on CPU_SB1
|
|
|
|
help
|
|
|
|
Instead of using the CPU to zero and copy pages, use a Data Mover
|
|
|
|
channel. These DMA channels are otherwise unused by the standard
|
|
|
|
SiByte Linux port. Seems to give a small performance benefit.
|
|
|
|
|
|
|
|
config CPU_HAS_PREFETCH
|
2005-08-05 14:28:54 +00:00
|
|
|
bool
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2012-01-31 17:18:43 +00:00
|
|
|
config CPU_GENERIC_DUMP_TLB
|
|
|
|
bool
|
|
|
|
default y if !(CPU_R3000 || CPU_R6000 || CPU_R8000 || CPU_TX39XX)
|
|
|
|
|
2012-01-31 17:18:44 +00:00
|
|
|
config CPU_R4K_FPU
|
|
|
|
bool
|
|
|
|
default y if !(CPU_R3000 || CPU_R6000 || CPU_TX39XX || CPU_CAVIUM_OCTEON)
|
|
|
|
|
2012-01-31 17:18:45 +00:00
|
|
|
config CPU_R4K_CACHE_TLB
|
|
|
|
bool
|
|
|
|
default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON)
|
|
|
|
|
2006-10-06 16:36:20 +00:00
|
|
|
config MIPS_MT_SMP
|
2014-04-08 10:59:10 +00:00
|
|
|
bool "MIPS MT SMP support (1 TC on each available VPE)"
|
2015-07-09 09:40:38 +00:00
|
|
|
depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6
|
2006-04-24 13:58:53 +00:00
|
|
|
select CPU_MIPSR2_IRQ_VI
|
2007-05-08 13:05:39 +00:00
|
|
|
select CPU_MIPSR2_IRQ_EI
|
2013-10-04 21:23:28 +00:00
|
|
|
select SYNC_R4K
|
2006-06-05 16:24:46 +00:00
|
|
|
select MIPS_MT
|
2006-04-05 08:45:45 +00:00
|
|
|
select SMP
|
2007-11-19 12:23:51 +00:00
|
|
|
select SMP_UP
|
2013-10-04 21:23:28 +00:00
|
|
|
select SYS_SUPPORTS_SMP
|
|
|
|
select SYS_SUPPORTS_SCHED_SMT
|
2012-07-13 20:44:53 +00:00
|
|
|
select MIPS_PERF_SHARED_TC_COUNTERS
|
2006-06-05 16:24:46 +00:00
|
|
|
help
|
2013-10-04 21:23:28 +00:00
|
|
|
This is a kernel model which is known as SMVP. This is supported
|
|
|
|
on cores with the MT ASE and uses the available VPEs to implement
|
|
|
|
virtual processors which supports SMP. This is equivalent to the
|
|
|
|
Intel Hyperthreading feature. For further information go to
|
|
|
|
<http://www.imgtec.com/mips/mips-multithreading.asp>.
|
2006-04-05 08:45:45 +00:00
|
|
|
|
2006-06-05 16:24:46 +00:00
|
|
|
config MIPS_MT
|
|
|
|
bool
|
|
|
|
|
2007-03-02 20:42:04 +00:00
|
|
|
config SCHED_SMT
|
|
|
|
bool "SMT (multithreading) scheduler support"
|
|
|
|
depends on SYS_SUPPORTS_SCHED_SMT
|
|
|
|
default n
|
|
|
|
help
|
|
|
|
SMT scheduler support improves the CPU scheduler's decision making
|
|
|
|
when dealing with MIPS MT enabled cores at a cost of slightly
|
|
|
|
increased overhead in some places. If unsure say N here.
|
|
|
|
|
|
|
|
config SYS_SUPPORTS_SCHED_SMT
|
|
|
|
bool
|
|
|
|
|
2006-06-05 16:24:46 +00:00
|
|
|
config SYS_SUPPORTS_MULTITHREADING
|
|
|
|
bool
|
|
|
|
|
2006-04-05 08:45:47 +00:00
|
|
|
config MIPS_MT_FPAFF
|
|
|
|
bool "Dynamic FPU affinity for FP-intensive threads"
|
|
|
|
default y
|
2014-05-23 14:29:44 +00:00
|
|
|
depends on MIPS_MT_SMP
|
2007-07-27 18:31:10 +00:00
|
|
|
|
2014-12-03 15:47:03 +00:00
|
|
|
config MIPSR2_TO_R6_EMULATOR
|
|
|
|
bool "MIPS R2-to-R6 emulator"
|
|
|
|
depends on CPU_MIPSR6 && !SMP
|
|
|
|
default y
|
|
|
|
help
|
|
|
|
Choose this option if you want to run non-R6 MIPS userland code.
|
|
|
|
Even if you say 'Y' here, the emulator will still be disabled by
|
2015-03-10 12:30:56 +00:00
|
|
|
default. You can enable it using the 'mipsr2emu' kernel option.
|
2014-12-03 15:47:03 +00:00
|
|
|
The only reason this is a build-time option is to save ~14K from the
|
|
|
|
final kernel image.
|
|
|
|
comment "MIPS R2-to-R6 emulator is only available for UP kernels"
|
|
|
|
depends on SMP && CPU_MIPSR6
|
|
|
|
|
2007-07-27 18:31:10 +00:00
|
|
|
config MIPS_VPE_LOADER
|
|
|
|
bool "VPE loader support."
|
2013-06-28 11:25:27 +00:00
|
|
|
depends on SYS_SUPPORTS_MULTITHREADING && MODULES
|
2007-07-27 18:31:10 +00:00
|
|
|
select CPU_MIPSR2_IRQ_VI
|
|
|
|
select CPU_MIPSR2_IRQ_EI
|
|
|
|
select MIPS_MT
|
|
|
|
help
|
|
|
|
Includes a loader for loading an elf relocatable object
|
|
|
|
onto another VPE and running it.
|
2006-04-05 08:45:47 +00:00
|
|
|
|
2013-10-30 20:52:07 +00:00
|
|
|
config MIPS_VPE_LOADER_CMP
|
|
|
|
bool
|
|
|
|
default "y"
|
|
|
|
depends on MIPS_VPE_LOADER && MIPS_CMP
|
|
|
|
|
2013-10-30 20:52:06 +00:00
|
|
|
config MIPS_VPE_LOADER_MT
|
|
|
|
bool
|
|
|
|
default "y"
|
|
|
|
depends on MIPS_VPE_LOADER && !MIPS_CMP
|
|
|
|
|
2005-07-14 15:57:16 +00:00
|
|
|
config MIPS_VPE_LOADER_TOM
|
|
|
|
bool "Load VPE program into memory hidden from linux"
|
|
|
|
depends on MIPS_VPE_LOADER
|
|
|
|
default y
|
|
|
|
help
|
|
|
|
The loader can use memory that is present but has been hidden from
|
|
|
|
Linux using the kernel command line option "mem=xxMB". It's up to
|
|
|
|
you to ensure the amount you put in the option and the space your
|
|
|
|
program requires is less or equal to the amount physically present.
|
|
|
|
|
|
|
|
config MIPS_VPE_APSP_API
|
2005-10-29 18:32:41 +00:00
|
|
|
bool "Enable support for AP/SP API (RTLX)"
|
|
|
|
depends on MIPS_VPE_LOADER
|
|
|
|
help
|
2005-07-14 15:57:16 +00:00
|
|
|
|
2014-01-01 15:29:03 +00:00
|
|
|
config MIPS_VPE_APSP_API_CMP
|
|
|
|
bool
|
|
|
|
default "y"
|
|
|
|
depends on MIPS_VPE_APSP_API && MIPS_CMP
|
|
|
|
|
2014-01-01 15:26:46 +00:00
|
|
|
config MIPS_VPE_APSP_API_MT
|
|
|
|
bool
|
|
|
|
default "y"
|
|
|
|
depends on MIPS_VPE_APSP_API && !MIPS_CMP
|
|
|
|
|
2008-10-03 23:06:29 +00:00
|
|
|
config MIPS_CMP
|
2014-01-15 10:32:00 +00:00
|
|
|
bool "MIPS CMP framework support (DEPRECATED)"
|
2015-07-09 09:40:38 +00:00
|
|
|
depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
|
2014-07-22 08:29:34 +00:00
|
|
|
select SMP
|
2009-06-17 23:40:34 +00:00
|
|
|
select SYNC_R4K
|
2014-07-22 08:29:34 +00:00
|
|
|
select SYS_SUPPORTS_SMP
|
2008-10-03 23:06:29 +00:00
|
|
|
select WEAK_ORDERING
|
|
|
|
default n
|
|
|
|
help
|
2014-01-15 10:31:58 +00:00
|
|
|
Select this if you are using a bootloader which implements the "CMP
|
|
|
|
framework" protocol (ie. YAMON) and want your kernel to make use of
|
|
|
|
its ability to start secondary CPUs.
|
2008-10-03 23:06:29 +00:00
|
|
|
|
2014-01-15 10:32:00 +00:00
|
|
|
Unless you have a specific need, you should use CONFIG_MIPS_CPS
|
|
|
|
instead of this.
|
|
|
|
|
2014-01-15 10:31:53 +00:00
|
|
|
config MIPS_CPS
|
|
|
|
bool "MIPS Coherent Processing System support"
|
2016-02-03 03:15:33 +00:00
|
|
|
depends on SYS_SUPPORTS_MIPS_CPS
|
2014-01-15 10:31:53 +00:00
|
|
|
select MIPS_CM
|
|
|
|
select MIPS_CPC
|
2014-04-14 13:13:57 +00:00
|
|
|
select MIPS_CPS_PM if HOTPLUG_CPU
|
2014-01-15 10:31:53 +00:00
|
|
|
select SMP
|
|
|
|
select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
|
2014-04-14 13:13:57 +00:00
|
|
|
select SYS_SUPPORTS_HOTPLUG_CPU
|
2014-01-15 10:31:53 +00:00
|
|
|
select SYS_SUPPORTS_SMP
|
|
|
|
select WEAK_ORDERING
|
|
|
|
help
|
|
|
|
Select this if you wish to run an SMP kernel across multiple cores
|
|
|
|
within a MIPS Coherent Processing System. When this option is
|
|
|
|
enabled the kernel will probe for other cores and boot them with
|
|
|
|
no external assistance. It is safe to enable this when hardware
|
|
|
|
support is unavailable.
|
|
|
|
|
2014-04-14 10:00:56 +00:00
|
|
|
config MIPS_CPS_PM
|
2014-09-18 15:09:49 +00:00
|
|
|
depends on MIPS_CPS
|
2014-07-09 11:48:19 +00:00
|
|
|
select MIPS_CPC
|
2014-04-14 10:00:56 +00:00
|
|
|
bool
|
|
|
|
|
2014-01-15 10:31:51 +00:00
|
|
|
config MIPS_CM
|
|
|
|
bool
|
|
|
|
|
2014-01-15 10:31:52 +00:00
|
|
|
config MIPS_CPC
|
|
|
|
bool
|
2008-10-03 23:06:29 +00:00
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
config SB1_PASS_2_WORKAROUNDS
|
|
|
|
bool
|
|
|
|
depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
|
|
|
|
default y
|
|
|
|
|
|
|
|
config SB1_PASS_2_1_WORKAROUNDS
|
|
|
|
bool
|
|
|
|
depends on CPU_SB1 && CPU_SB1_PASS_2
|
|
|
|
default y
|
|
|
|
|
2012-11-22 02:33:59 +00:00
|
|
|
|
2010-01-03 12:39:12 +00:00
|
|
|
config ARCH_PHYS_ADDR_T_64BIT
|
2014-11-21 23:16:48 +00:00
|
|
|
bool
|
2010-01-03 12:39:12 +00:00
|
|
|
|
2014-07-21 07:46:14 +00:00
|
|
|
choice
|
|
|
|
prompt "SmartMIPS or microMIPS ASE support"
|
|
|
|
|
|
|
|
config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
|
|
|
|
bool "None"
|
|
|
|
help
|
|
|
|
Select this if you want neither microMIPS nor SmartMIPS support
|
|
|
|
|
2007-02-02 16:41:47 +00:00
|
|
|
config CPU_HAS_SMARTMIPS
|
|
|
|
depends on SYS_SUPPORTS_SMARTMIPS
|
2014-07-21 07:46:14 +00:00
|
|
|
bool "SmartMIPS"
|
2007-02-02 16:41:47 +00:00
|
|
|
help
|
|
|
|
SmartMIPS is a extension of the MIPS32 architecture aimed at
|
|
|
|
increased security at both hardware and software level for
|
|
|
|
smartcards. Enabling this option will allow proper use of the
|
|
|
|
SmartMIPS instructions by Linux applications. However a kernel with
|
|
|
|
this option will not work on a MIPS core without SmartMIPS core. If
|
|
|
|
you don't know you probably don't have SmartMIPS and should say N
|
|
|
|
here.
|
|
|
|
|
2013-03-25 18:27:11 +00:00
|
|
|
config CPU_MICROMIPS
|
2014-10-27 10:34:11 +00:00
|
|
|
depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
|
2014-07-21 07:46:14 +00:00
|
|
|
bool "microMIPS"
|
2013-03-25 18:27:11 +00:00
|
|
|
help
|
|
|
|
When this option is enabled the kernel will be built using the
|
|
|
|
microMIPS ISA
|
|
|
|
|
2014-07-21 07:46:14 +00:00
|
|
|
endchoice
|
|
|
|
|
2014-01-27 15:23:10 +00:00
|
|
|
config CPU_HAS_MSA
|
2015-07-27 19:58:27 +00:00
|
|
|
bool "Support for the MIPS SIMD Architecture"
|
2014-01-27 15:23:10 +00:00
|
|
|
depends on CPU_SUPPORTS_MSA
|
2014-07-11 15:47:14 +00:00
|
|
|
depends on 64BIT || MIPS_O32_FP64_SUPPORT
|
2014-01-27 15:23:10 +00:00
|
|
|
help
|
|
|
|
MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
|
|
|
|
and a set of SIMD instructions to operate on them. When this option
|
2014-01-27 15:23:11 +00:00
|
|
|
is enabled the kernel will support allocating & switching MSA
|
|
|
|
vector register contexts. If you know that your kernel will only be
|
|
|
|
running on CPUs which do not support MSA or that your userland will
|
|
|
|
not be making use of it then you may wish to say N here to reduce
|
|
|
|
the size & complexity of your kernel.
|
2014-01-27 15:23:10 +00:00
|
|
|
|
|
|
|
If unsure, say Y.
|
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
config CPU_HAS_WB
|
2006-04-24 13:58:53 +00:00
|
|
|
bool
|
2005-07-14 15:57:16 +00:00
|
|
|
|
2011-11-16 01:25:45 +00:00
|
|
|
config XKS01
|
|
|
|
bool
|
|
|
|
|
2016-02-09 20:55:51 +00:00
|
|
|
config CPU_HAS_RIXI
|
|
|
|
bool
|
|
|
|
|
2006-06-05 16:24:46 +00:00
|
|
|
#
|
|
|
|
# Vectored interrupt mode is an R2 feature
|
|
|
|
#
|
2005-07-14 15:57:16 +00:00
|
|
|
config CPU_MIPSR2_IRQ_VI
|
2006-06-05 16:24:46 +00:00
|
|
|
bool
|
2005-07-14 15:57:16 +00:00
|
|
|
|
2006-06-05 16:24:46 +00:00
|
|
|
#
|
|
|
|
# Extended interrupt mode is an R2 feature
|
|
|
|
#
|
2005-07-14 15:57:16 +00:00
|
|
|
config CPU_MIPSR2_IRQ_EI
|
2006-06-05 16:24:46 +00:00
|
|
|
bool
|
2005-07-14 15:57:16 +00:00
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
config CPU_HAS_SYNC
|
|
|
|
bool
|
|
|
|
depends on !CPU_R3000
|
|
|
|
default y
|
|
|
|
|
2007-10-23 11:43:11 +00:00
|
|
|
#
|
|
|
|
# CPU non-features
|
|
|
|
#
|
|
|
|
config CPU_DADDI_WORKAROUNDS
|
|
|
|
bool
|
|
|
|
|
|
|
|
config CPU_R4000_WORKAROUNDS
|
|
|
|
bool
|
|
|
|
select CPU_R4400_WORKAROUNDS
|
|
|
|
|
|
|
|
config CPU_R4400_WORKAROUNDS
|
|
|
|
bool
|
|
|
|
|
2016-05-06 13:36:23 +00:00
|
|
|
config MIPS_ASID_SHIFT
|
|
|
|
int
|
|
|
|
default 6 if CPU_R3000 || CPU_TX39XX
|
|
|
|
default 4 if CPU_R8000
|
|
|
|
default 0
|
|
|
|
|
|
|
|
config MIPS_ASID_BITS
|
|
|
|
int
|
2016-05-06 13:36:24 +00:00
|
|
|
default 0 if MIPS_ASID_BITS_VARIABLE
|
2016-05-06 13:36:23 +00:00
|
|
|
default 6 if CPU_R3000 || CPU_TX39XX
|
|
|
|
default 8
|
|
|
|
|
2016-05-06 13:36:24 +00:00
|
|
|
config MIPS_ASID_BITS_VARIABLE
|
|
|
|
bool
|
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
#
|
|
|
|
# - Highmem only makes sense for the 32-bit kernel.
|
|
|
|
# - The current highmem code will only work properly on physically indexed
|
|
|
|
# caches such as R3000, SB1, R7000 or those that look like they're virtually
|
|
|
|
# indexed such as R4000/R4400 SC and MC versions or R10000. So for the
|
|
|
|
# moment we protect the user and offer the highmem option only on machines
|
|
|
|
# where it's known to be safe. This will not offer highmem on a few systems
|
|
|
|
# such as MIPS32 and MIPS64 CPUs which may have virtual and physically
|
|
|
|
# indexed CPUs but we're playing safe.
|
2005-08-10 15:17:11 +00:00
|
|
|
# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
|
|
|
|
# know they might have memory configurations that could make use of highmem
|
|
|
|
# support.
|
2005-04-16 22:20:36 +00:00
|
|
|
#
|
|
|
|
config HIGHMEM
|
|
|
|
bool "High Memory Support"
|
2013-12-03 10:22:26 +00:00
|
|
|
depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
|
2005-08-10 15:17:11 +00:00
|
|
|
|
|
|
|
config CPU_SUPPORTS_HIGHMEM
|
|
|
|
bool
|
|
|
|
|
|
|
|
config SYS_SUPPORTS_HIGHMEM
|
|
|
|
bool
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2007-02-02 16:41:47 +00:00
|
|
|
config SYS_SUPPORTS_SMARTMIPS
|
|
|
|
bool
|
|
|
|
|
2013-02-05 22:52:02 +00:00
|
|
|
config SYS_SUPPORTS_MICROMIPS
|
|
|
|
bool
|
|
|
|
|
2014-04-28 23:49:24 +00:00
|
|
|
config SYS_SUPPORTS_MIPS16
|
|
|
|
bool
|
|
|
|
help
|
|
|
|
This option must be set if a kernel might be executed on a MIPS16-
|
|
|
|
enabled CPU even if MIPS16 is not actually being used. In other
|
|
|
|
words, it makes the kernel MIPS16-tolerant.
|
|
|
|
|
2014-01-27 15:23:10 +00:00
|
|
|
config CPU_SUPPORTS_MSA
|
|
|
|
bool
|
|
|
|
|
2005-06-25 21:54:31 +00:00
|
|
|
config ARCH_FLATMEM_ENABLE
|
|
|
|
def_bool y
|
2009-12-01 06:55:42 +00:00
|
|
|
depends on !NUMA && !CPU_LOONGSON2
|
2005-06-25 21:54:31 +00:00
|
|
|
|
2006-06-11 22:03:08 +00:00
|
|
|
config ARCH_DISCONTIGMEM_ENABLE
|
|
|
|
bool
|
|
|
|
default y if SGI_IP27
|
|
|
|
help
|
2007-05-09 05:12:20 +00:00
|
|
|
Say Y to support efficient handling of discontiguous physical memory,
|
2006-06-11 22:03:08 +00:00
|
|
|
for architectures which are either NUMA (Non-Uniform Memory Access)
|
|
|
|
or have huge holes in the physical address space for other reasons.
|
|
|
|
See <file:Documentation/vm/numa> for more.
|
|
|
|
|
2006-07-02 15:09:47 +00:00
|
|
|
config ARCH_SPARSEMEM_ENABLE
|
|
|
|
bool
|
2006-07-04 16:22:44 +00:00
|
|
|
select SPARSEMEM_STATIC
|
2006-07-02 15:09:47 +00:00
|
|
|
|
2006-06-11 22:03:08 +00:00
|
|
|
config NUMA
|
|
|
|
bool "NUMA Support"
|
|
|
|
depends on SYS_SUPPORTS_NUMA
|
|
|
|
help
|
|
|
|
Say Y to compile the kernel to support NUMA (Non-Uniform Memory
|
|
|
|
Access). This option improves performance on systems with more
|
|
|
|
than two nodes; on two node systems it is generally better to
|
|
|
|
leave it disabled; on single node systems disable this option
|
|
|
|
disabled.
|
|
|
|
|
|
|
|
config SYS_SUPPORTS_NUMA
|
|
|
|
bool
|
|
|
|
|
2016-03-31 09:05:39 +00:00
|
|
|
config RELOCATABLE
|
|
|
|
bool "Relocatable kernel"
|
|
|
|
depends on SYS_SUPPORTS_RELOCATABLE && (CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_MIPS32_R6 || CPU_MIPS64_R6)
|
|
|
|
help
|
|
|
|
This builds a kernel image that retains relocation information
|
|
|
|
so it can be loaded someplace besides the default 1MB.
|
|
|
|
The relocations make the kernel binary about 15% larger,
|
|
|
|
but are discarded at runtime
|
|
|
|
|
2016-03-31 09:05:34 +00:00
|
|
|
config RELOCATION_TABLE_SIZE
|
|
|
|
hex "Relocation table size"
|
|
|
|
depends on RELOCATABLE
|
|
|
|
range 0x0 0x01000000
|
|
|
|
default "0x00100000"
|
|
|
|
---help---
|
|
|
|
A table of relocation data will be appended to the kernel binary
|
|
|
|
and parsed at boot to fix up the relocated kernel.
|
|
|
|
|
|
|
|
This option allows the amount of space reserved for the table to be
|
|
|
|
adjusted, although the default of 1Mb should be ok in most cases.
|
|
|
|
|
|
|
|
The build will fail and a valid size suggested if this is too small.
|
|
|
|
|
|
|
|
If unsure, leave at the default value.
|
|
|
|
|
2016-03-31 09:05:41 +00:00
|
|
|
config RANDOMIZE_BASE
|
|
|
|
bool "Randomize the address of the kernel image"
|
|
|
|
depends on RELOCATABLE
|
|
|
|
---help---
|
|
|
|
Randomizes the physical and virtual address at which the
|
|
|
|
kernel image is loaded, as a security feature that
|
|
|
|
deters exploit attempts relying on knowledge of the location
|
|
|
|
of kernel internals.
|
|
|
|
|
|
|
|
Entropy is generated using any coprocessor 0 registers available.
|
|
|
|
|
|
|
|
The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
|
|
|
|
|
|
|
|
If unsure, say N.
|
|
|
|
|
|
|
|
config RANDOMIZE_BASE_MAX_OFFSET
|
|
|
|
hex "Maximum kASLR offset" if EXPERT
|
|
|
|
depends on RANDOMIZE_BASE
|
|
|
|
range 0x0 0x40000000 if EVA || 64BIT
|
|
|
|
range 0x0 0x08000000
|
|
|
|
default "0x01000000"
|
|
|
|
---help---
|
|
|
|
When kASLR is active, this provides the maximum offset that will
|
|
|
|
be applied to the kernel image. It should be set according to the
|
|
|
|
amount of physical RAM available in the target system minus
|
|
|
|
PHYSICAL_START and must be a power of 2.
|
|
|
|
|
|
|
|
This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
|
|
|
|
EVA or 64-bit. The default is 16Mb.
|
|
|
|
|
2006-04-11 05:53:53 +00:00
|
|
|
config NODES_SHIFT
|
|
|
|
int
|
|
|
|
default "6"
|
|
|
|
depends on NEED_MULTIPLE_NODES
|
|
|
|
|
2010-10-12 11:37:22 +00:00
|
|
|
config HW_PERF_EVENTS
|
|
|
|
bool "Enable hardware performance counter support for perf events"
|
2016-02-19 23:42:11 +00:00
|
|
|
depends on PERF_EVENTS && !OPROFILE && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON3)
|
2010-10-12 11:37:22 +00:00
|
|
|
default y
|
|
|
|
help
|
|
|
|
Enable hardware performance counter support for perf events. If
|
|
|
|
disabled, perf events will use software events only.
|
|
|
|
|
2005-06-25 21:54:31 +00:00
|
|
|
source "mm/Kconfig"
|
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
config SMP
|
|
|
|
bool "Multi-Processing support"
|
2006-06-04 10:51:46 +00:00
|
|
|
depends on SYS_SUPPORTS_SMP
|
|
|
|
help
|
2005-04-16 22:20:36 +00:00
|
|
|
This enables support for systems with more than one CPU. If you have
|
2014-01-23 23:55:29 +00:00
|
|
|
a system with only one CPU, say N. If you have a system with more
|
|
|
|
than one CPU, say Y.
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2014-01-23 23:55:29 +00:00
|
|
|
If you say N here, the kernel will run on uni- and multiprocessor
|
2005-04-16 22:20:36 +00:00
|
|
|
machines, but will use only one CPU of a multiprocessor machine. If
|
|
|
|
you say Y here, the kernel will run on many, but not all,
|
2014-01-23 23:55:29 +00:00
|
|
|
uniprocessor machines. On a uniprocessor machine, the kernel
|
2005-04-16 22:20:36 +00:00
|
|
|
will run faster if you say N here.
|
|
|
|
|
|
|
|
People using multiprocessor machines who say Y here should also say
|
|
|
|
Y to "Enhanced Real Time Clock Support", below.
|
|
|
|
|
2008-02-03 13:50:21 +00:00
|
|
|
See also the SMP-HOWTO available at
|
|
|
|
<http://www.tldp.org/docs.html#howto>.
|
2005-04-16 22:20:36 +00:00
|
|
|
|
|
|
|
If you don't know what to do here, say N.
|
|
|
|
|
2016-07-07 07:50:40 +00:00
|
|
|
config HOTPLUG_CPU
|
|
|
|
bool "Support for hot-pluggable CPUs"
|
|
|
|
depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
|
|
|
|
help
|
|
|
|
Say Y here to allow turning CPUs off and on. CPUs can be
|
|
|
|
controlled through /sys/devices/system/cpu.
|
|
|
|
(Note: power management support will enable this option
|
|
|
|
automatically on SMP systems. )
|
|
|
|
Say N if you want to disable CPU hotplug.
|
|
|
|
|
2007-11-19 12:23:51 +00:00
|
|
|
config SMP_UP
|
|
|
|
bool
|
|
|
|
|
2008-10-03 23:06:29 +00:00
|
|
|
config SYS_SUPPORTS_MIPS_CMP
|
|
|
|
bool
|
|
|
|
|
2014-01-15 10:31:53 +00:00
|
|
|
config SYS_SUPPORTS_MIPS_CPS
|
|
|
|
bool
|
|
|
|
|
2006-06-04 10:51:46 +00:00
|
|
|
config SYS_SUPPORTS_SMP
|
|
|
|
bool
|
|
|
|
|
2007-02-06 16:53:15 +00:00
|
|
|
config NR_CPUS_DEFAULT_4
|
|
|
|
bool
|
|
|
|
|
|
|
|
config NR_CPUS_DEFAULT_8
|
|
|
|
bool
|
|
|
|
|
|
|
|
config NR_CPUS_DEFAULT_16
|
|
|
|
bool
|
|
|
|
|
|
|
|
config NR_CPUS_DEFAULT_32
|
|
|
|
bool
|
|
|
|
|
|
|
|
config NR_CPUS_DEFAULT_64
|
|
|
|
bool
|
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
config NR_CPUS
|
2014-04-29 14:37:40 +00:00
|
|
|
int "Maximum number of CPUs (2-256)"
|
|
|
|
range 2 256
|
2005-04-16 22:20:36 +00:00
|
|
|
depends on SMP
|
2007-02-06 16:53:15 +00:00
|
|
|
default "4" if NR_CPUS_DEFAULT_4
|
|
|
|
default "8" if NR_CPUS_DEFAULT_8
|
|
|
|
default "16" if NR_CPUS_DEFAULT_16
|
|
|
|
default "32" if NR_CPUS_DEFAULT_32
|
|
|
|
default "64" if NR_CPUS_DEFAULT_64
|
2005-04-16 22:20:36 +00:00
|
|
|
help
|
|
|
|
This allows you to specify the maximum number of CPUs which this
|
|
|
|
kernel will support. The maximum supported value is 32 for 32-bit
|
|
|
|
kernel and 64 for 64-bit kernels; the minimum value which makes
|
2007-03-17 16:01:39 +00:00
|
|
|
sense is 1 for Qemu (useful only for kernel debugging purposes)
|
|
|
|
and 2 for all others.
|
2005-04-16 22:20:36 +00:00
|
|
|
|
|
|
|
This is purely to save memory - each supported CPU adds
|
2007-03-17 16:01:39 +00:00
|
|
|
approximately eight kilobytes to the kernel image. For best
|
|
|
|
performance should round up your number of processors to the next
|
|
|
|
power of two.
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2012-07-13 20:44:53 +00:00
|
|
|
config MIPS_PERF_SHARED_TC_COUNTERS
|
|
|
|
bool
|
|
|
|
|
2006-06-19 15:19:13 +00:00
|
|
|
#
|
|
|
|
# Timer Interrupt Frequency Configuration
|
|
|
|
#
|
|
|
|
|
|
|
|
choice
|
|
|
|
prompt "Timer frequency"
|
|
|
|
default HZ_250
|
|
|
|
help
|
|
|
|
Allows the configuration of the timer frequency.
|
|
|
|
|
2015-09-22 17:16:39 +00:00
|
|
|
config HZ_24
|
|
|
|
bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
|
|
|
|
|
2006-06-19 15:19:13 +00:00
|
|
|
config HZ_48
|
2008-02-25 16:55:29 +00:00
|
|
|
bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
|
2006-06-19 15:19:13 +00:00
|
|
|
|
|
|
|
config HZ_100
|
|
|
|
bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
|
|
|
|
|
|
|
|
config HZ_128
|
|
|
|
bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
|
|
|
|
|
|
|
|
config HZ_250
|
|
|
|
bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
|
|
|
|
|
|
|
|
config HZ_256
|
|
|
|
bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
|
|
|
|
|
|
|
|
config HZ_1000
|
|
|
|
bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
|
|
|
|
|
|
|
|
config HZ_1024
|
|
|
|
bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
|
|
|
|
|
|
|
|
endchoice
|
|
|
|
|
2015-09-22 17:16:39 +00:00
|
|
|
config SYS_SUPPORTS_24HZ
|
|
|
|
bool
|
|
|
|
|
2006-06-19 15:19:13 +00:00
|
|
|
config SYS_SUPPORTS_48HZ
|
|
|
|
bool
|
|
|
|
|
|
|
|
config SYS_SUPPORTS_100HZ
|
|
|
|
bool
|
|
|
|
|
|
|
|
config SYS_SUPPORTS_128HZ
|
|
|
|
bool
|
|
|
|
|
|
|
|
config SYS_SUPPORTS_250HZ
|
|
|
|
bool
|
|
|
|
|
|
|
|
config SYS_SUPPORTS_256HZ
|
|
|
|
bool
|
|
|
|
|
|
|
|
config SYS_SUPPORTS_1000HZ
|
|
|
|
bool
|
|
|
|
|
|
|
|
config SYS_SUPPORTS_1024HZ
|
|
|
|
bool
|
|
|
|
|
|
|
|
config SYS_SUPPORTS_ARBIT_HZ
|
|
|
|
bool
|
2015-09-22 17:16:39 +00:00
|
|
|
default y if !SYS_SUPPORTS_24HZ && \
|
|
|
|
!SYS_SUPPORTS_48HZ && \
|
|
|
|
!SYS_SUPPORTS_100HZ && \
|
|
|
|
!SYS_SUPPORTS_128HZ && \
|
|
|
|
!SYS_SUPPORTS_250HZ && \
|
|
|
|
!SYS_SUPPORTS_256HZ && \
|
|
|
|
!SYS_SUPPORTS_1000HZ && \
|
2006-06-19 15:19:13 +00:00
|
|
|
!SYS_SUPPORTS_1024HZ
|
|
|
|
|
|
|
|
config HZ
|
|
|
|
int
|
2015-09-22 17:16:39 +00:00
|
|
|
default 24 if HZ_24
|
2006-06-19 15:19:13 +00:00
|
|
|
default 48 if HZ_48
|
|
|
|
default 100 if HZ_100
|
|
|
|
default 128 if HZ_128
|
|
|
|
default 250 if HZ_250
|
|
|
|
default 256 if HZ_256
|
|
|
|
default 1000 if HZ_1000
|
|
|
|
default 1024 if HZ_1024
|
|
|
|
|
2015-03-07 18:30:19 +00:00
|
|
|
config SCHED_HRTICK
|
|
|
|
def_bool HIGH_RES_TIMERS
|
|
|
|
|
2005-07-11 20:45:51 +00:00
|
|
|
source "kernel/Kconfig.preempt"
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2007-01-16 14:29:11 +00:00
|
|
|
config KEXEC
|
2013-01-17 02:53:19 +00:00
|
|
|
bool "Kexec system call"
|
2015-09-09 22:38:55 +00:00
|
|
|
select KEXEC_CORE
|
2007-01-16 14:29:11 +00:00
|
|
|
help
|
|
|
|
kexec is a system call that implements the ability to shutdown your
|
|
|
|
current kernel, and to start another kernel. It is like a reboot
|
2007-05-09 05:12:20 +00:00
|
|
|
but it is independent of the system firmware. And like a reboot
|
2007-01-16 14:29:11 +00:00
|
|
|
you can start any kernel with it, not just Linux.
|
|
|
|
|
2007-10-19 23:34:40 +00:00
|
|
|
The name comes from the similarity to the exec system call.
|
2007-01-16 14:29:11 +00:00
|
|
|
|
|
|
|
It is an ongoing process to be certain the hardware in a machine
|
|
|
|
is properly shutdown, so do not be surprised if this code does not
|
2013-08-20 19:38:03 +00:00
|
|
|
initially work for you. As of this writing the exact hardware
|
|
|
|
interface is strongly in flux, so no good recommendation can be
|
|
|
|
made.
|
2007-01-16 14:29:11 +00:00
|
|
|
|
2012-10-11 16:14:58 +00:00
|
|
|
config CRASH_DUMP
|
|
|
|
bool "Kernel crash dumps"
|
|
|
|
help
|
|
|
|
Generate crash dump after being started by kexec.
|
|
|
|
This should be normally only set in special crash dump kernels
|
|
|
|
which are loaded in the main kernel with kexec-tools into
|
|
|
|
a specially reserved region and then later executed after
|
|
|
|
a crash by kdump/kexec. The crash dump kernel must be compiled
|
|
|
|
to a memory address not used by the main kernel or firmware using
|
|
|
|
PHYSICAL_START.
|
|
|
|
|
|
|
|
config PHYSICAL_START
|
|
|
|
hex "Physical address where the kernel is loaded"
|
|
|
|
default "0xffffffff84000000" if 64BIT
|
|
|
|
default "0x84000000" if 32BIT
|
|
|
|
depends on CRASH_DUMP
|
|
|
|
help
|
|
|
|
This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
|
|
|
|
If you plan to use kernel for capturing the crash dump change
|
|
|
|
this value to start of the reserved region (the "X" value as
|
|
|
|
specified in the "crashkernel=YM@XM" command line boot parameter
|
|
|
|
passed to the panic-ed kernel).
|
|
|
|
|
2007-01-16 14:29:11 +00:00
|
|
|
config SECCOMP
|
|
|
|
bool "Enable seccomp to safely compute untrusted bytecode"
|
2007-07-25 15:19:33 +00:00
|
|
|
depends on PROC_FS
|
2007-01-16 14:29:11 +00:00
|
|
|
default y
|
|
|
|
help
|
|
|
|
This kernel feature is useful for number crunching applications
|
|
|
|
that may need to compute untrusted bytecode during their
|
|
|
|
execution. By using pipes or other transports made available to
|
|
|
|
the process as file descriptors supporting the read/write
|
|
|
|
syscalls, it's possible to isolate those applications in
|
|
|
|
their own address space using seccomp. Once seccomp is
|
|
|
|
enabled via /proc/<pid>/seccomp, it cannot be disabled
|
|
|
|
and the task is only allowed to execute a few safe syscalls
|
|
|
|
defined by each seccomp mode.
|
|
|
|
|
|
|
|
If unsure, say Y. Only embedded should say N here.
|
|
|
|
|
2013-11-22 13:12:07 +00:00
|
|
|
config MIPS_O32_FP64_SUPPORT
|
2015-07-27 19:58:27 +00:00
|
|
|
bool "Support for O32 binaries using 64-bit FP"
|
2013-11-22 13:12:07 +00:00
|
|
|
depends on 32BIT || MIPS32_O32
|
|
|
|
help
|
|
|
|
When this is enabled, the kernel will support use of 64-bit floating
|
|
|
|
point registers with binaries using the O32 ABI along with the
|
|
|
|
EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
|
|
|
|
32-bit MIPS systems this support is at the cost of increasing the
|
|
|
|
size and complexity of the compiled FPU emulator. Thus if you are
|
|
|
|
running a MIPS32 system and know that none of your userland binaries
|
|
|
|
will require 64-bit floating point, you may wish to reduce the size
|
|
|
|
of your kernel & potentially improve FP emulation performance by
|
|
|
|
saying N here.
|
|
|
|
|
2014-02-14 17:55:18 +00:00
|
|
|
Although binutils currently supports use of this flag the details
|
|
|
|
concerning its effect upon the O32 ABI in userland are still being
|
|
|
|
worked on. In order to avoid userland becoming dependant upon current
|
|
|
|
behaviour before the details have been finalised, this option should
|
|
|
|
be considered experimental and only enabled by those working upon
|
|
|
|
said details.
|
|
|
|
|
|
|
|
If unsure, say N.
|
2013-11-22 13:12:07 +00:00
|
|
|
|
2010-10-13 06:52:46 +00:00
|
|
|
config USE_OF
|
2012-09-18 09:28:54 +00:00
|
|
|
bool
|
2010-10-13 06:52:46 +00:00
|
|
|
select OF
|
2010-11-18 23:54:56 +00:00
|
|
|
select OF_EARLY_FLATTREE
|
2012-02-24 15:07:06 +00:00
|
|
|
select IRQ_DOMAIN
|
2010-10-13 06:52:46 +00:00
|
|
|
|
2014-08-21 20:04:20 +00:00
|
|
|
config BUILTIN_DTB
|
|
|
|
bool
|
|
|
|
|
2015-04-12 10:24:58 +00:00
|
|
|
choice
|
2015-10-12 11:13:01 +00:00
|
|
|
prompt "Kernel appended dtb support" if USE_OF
|
2015-04-12 10:24:58 +00:00
|
|
|
default MIPS_NO_APPENDED_DTB
|
|
|
|
|
|
|
|
config MIPS_NO_APPENDED_DTB
|
|
|
|
bool "None"
|
|
|
|
help
|
|
|
|
Do not enable appended dtb support.
|
|
|
|
|
2015-09-11 14:46:14 +00:00
|
|
|
config MIPS_ELF_APPENDED_DTB
|
|
|
|
bool "vmlinux"
|
|
|
|
help
|
|
|
|
With this option, the boot code will look for a device tree binary
|
|
|
|
DTB) included in the vmlinux ELF section .appended_dtb. By default
|
|
|
|
it is empty and the DTB can be appended using binutils command
|
|
|
|
objcopy:
|
|
|
|
|
|
|
|
objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
|
|
|
|
|
|
|
|
This is meant as a backward compatiblity convenience for those
|
|
|
|
systems with a bootloader that can't be upgraded to accommodate
|
|
|
|
the documented boot protocol using a device tree.
|
|
|
|
|
2015-04-12 10:24:58 +00:00
|
|
|
config MIPS_RAW_APPENDED_DTB
|
|
|
|
bool "vmlinux.bin"
|
|
|
|
help
|
|
|
|
With this option, the boot code will look for a device tree binary
|
|
|
|
DTB) appended to raw vmlinux.bin (without decompressor).
|
|
|
|
(e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
|
|
|
|
|
|
|
|
This is meant as a backward compatibility convenience for those
|
|
|
|
systems with a bootloader that can't be upgraded to accommodate
|
|
|
|
the documented boot protocol using a device tree.
|
|
|
|
|
|
|
|
Beware that there is very little in terms of protection against
|
|
|
|
this option being confused by leftover garbage in memory that might
|
|
|
|
look like a DTB header after a reboot if no actual DTB is appended
|
|
|
|
to vmlinux.bin. Do not leave this option active in a production kernel
|
|
|
|
if you don't intend to always append a DTB.
|
2015-04-12 10:24:59 +00:00
|
|
|
|
|
|
|
config MIPS_ZBOOT_APPENDED_DTB
|
|
|
|
bool "vmlinuz.bin"
|
|
|
|
depends on SYS_SUPPORTS_ZBOOT
|
|
|
|
help
|
|
|
|
With this option, the boot code will look for a device tree binary
|
|
|
|
DTB) appended to raw vmlinuz.bin (with decompressor).
|
|
|
|
(e.g. cat vmlinuz.bin <filename>.dtb > vmlinuz_w_dtb).
|
|
|
|
|
|
|
|
This is meant as a backward compatibility convenience for those
|
|
|
|
systems with a bootloader that can't be upgraded to accommodate
|
|
|
|
the documented boot protocol using a device tree.
|
|
|
|
|
|
|
|
Beware that there is very little in terms of protection against
|
|
|
|
this option being confused by leftover garbage in memory that might
|
|
|
|
look like a DTB header after a reboot if no actual DTB is appended
|
|
|
|
to vmlinuz.bin. Do not leave this option active in a production kernel
|
|
|
|
if you don't intend to always append a DTB.
|
2015-04-12 10:24:58 +00:00
|
|
|
endchoice
|
|
|
|
|
2015-10-12 11:13:02 +00:00
|
|
|
choice
|
|
|
|
prompt "Kernel command line type" if !CMDLINE_OVERRIDE
|
2015-10-12 11:13:03 +00:00
|
|
|
default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
|
|
|
|
!MIPS_MALTA && !MIPS_SEAD3 && \
|
|
|
|
!CAVIUM_OCTEON_SOC
|
2015-10-12 11:13:02 +00:00
|
|
|
default MIPS_CMDLINE_FROM_BOOTLOADER
|
|
|
|
|
|
|
|
config MIPS_CMDLINE_FROM_DTB
|
|
|
|
depends on USE_OF
|
|
|
|
bool "Dtb kernel arguments if available"
|
|
|
|
|
|
|
|
config MIPS_CMDLINE_DTB_EXTEND
|
|
|
|
depends on USE_OF
|
|
|
|
bool "Extend dtb kernel arguments with bootloader arguments"
|
|
|
|
|
|
|
|
config MIPS_CMDLINE_FROM_BOOTLOADER
|
|
|
|
bool "Bootloader kernel arguments if available"
|
2016-04-28 09:03:09 +00:00
|
|
|
|
|
|
|
config MIPS_CMDLINE_BUILTIN_EXTEND
|
|
|
|
depends on CMDLINE_BOOL
|
|
|
|
bool "Extend builtin kernel arguments with bootloader arguments"
|
2015-10-12 11:13:02 +00:00
|
|
|
endchoice
|
|
|
|
|
2005-10-29 18:32:41 +00:00
|
|
|
endmenu
|
|
|
|
|
2006-09-26 14:44:01 +00:00
|
|
|
config LOCKDEP_SUPPORT
|
|
|
|
bool
|
|
|
|
default y
|
|
|
|
|
|
|
|
config STACKTRACE_SUPPORT
|
|
|
|
bool
|
|
|
|
default y
|
|
|
|
|
2015-10-23 12:39:02 +00:00
|
|
|
config HAVE_LATENCYTOP_SUPPORT
|
|
|
|
bool
|
|
|
|
default y
|
|
|
|
|
2015-04-14 22:45:51 +00:00
|
|
|
config PGTABLE_LEVELS
|
|
|
|
int
|
|
|
|
default 3 if 64BIT && !PAGE_SIZE_64KB
|
|
|
|
default 2
|
|
|
|
|
2005-11-25 11:35:40 +00:00
|
|
|
source "init/Kconfig"
|
|
|
|
|
2008-10-19 03:27:21 +00:00
|
|
|
source "kernel/Kconfig.freezer"
|
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
|
|
|
|
|
2005-10-29 18:32:41 +00:00
|
|
|
config HW_HAS_EISA
|
|
|
|
bool
|
2005-04-16 22:20:36 +00:00
|
|
|
config HW_HAS_PCI
|
|
|
|
bool
|
|
|
|
|
|
|
|
config PCI
|
|
|
|
bool "Support for PCI controller"
|
|
|
|
depends on HW_HAS_PCI
|
2007-10-11 22:46:03 +00:00
|
|
|
select PCI_DOMAINS
|
2012-01-29 22:23:38 +00:00
|
|
|
select NO_GENERIC_PCI_IOPORT_MAP
|
2005-04-16 22:20:36 +00:00
|
|
|
help
|
|
|
|
Find out whether you have a PCI motherboard. PCI is the name of a
|
|
|
|
bus system, i.e. the way the CPU talks to the other stuff inside
|
|
|
|
your box. Other bus systems are ISA, EISA, or VESA. If you have PCI,
|
|
|
|
say Y, otherwise N.
|
|
|
|
|
2014-03-21 10:44:07 +00:00
|
|
|
config HT_PCI
|
|
|
|
bool "Support for HT-linked PCI"
|
|
|
|
default y
|
|
|
|
depends on CPU_LOONGSON3
|
|
|
|
select PCI
|
|
|
|
select PCI_DOMAINS
|
|
|
|
help
|
|
|
|
Loongson family machines use Hyper-Transport bus for inter-core
|
|
|
|
connection and device connection. The PCI bus is a subordinate
|
|
|
|
linked at HT. Choose Y for Loongson-3 based machines.
|
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
config PCI_DOMAINS
|
|
|
|
bool
|
|
|
|
|
|
|
|
source "drivers/pci/Kconfig"
|
|
|
|
|
|
|
|
#
|
|
|
|
# ISA support is now enabled via select. Too many systems still have the one
|
|
|
|
# or other ISA chip on the board that users don't know about so don't expect
|
|
|
|
# users to choose the right thing ...
|
|
|
|
#
|
|
|
|
config ISA
|
|
|
|
bool
|
|
|
|
|
|
|
|
config EISA
|
|
|
|
bool "EISA support"
|
2005-10-29 18:32:41 +00:00
|
|
|
depends on HW_HAS_EISA
|
2005-04-16 22:20:36 +00:00
|
|
|
select ISA
|
2006-11-30 01:14:51 +00:00
|
|
|
select GENERIC_ISA_DMA
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2005-04-16 22:20:36 +00:00
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---help---
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The Extended Industry Standard Architecture (EISA) bus was
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developed as an open alternative to the IBM MicroChannel bus.
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The EISA bus provided some of the features of the IBM MicroChannel
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bus while maintaining backward compatibility with cards made for
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the older ISA bus. The EISA bus saw limited use between 1988 and
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1995 when it was made obsolete by the PCI bus.
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Say Y here if you are building a kernel for an EISA-based machine.
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Otherwise, say N.
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source "drivers/eisa/Kconfig"
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config TC
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bool "TURBOchannel support"
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depends on MACH_DECSTATION
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help
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2010-10-16 17:36:23 +00:00
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TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
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processors. TURBOchannel programming specifications are available
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at:
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<ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
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and:
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<http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
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Linux driver support status is documented at:
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<http://www.linux-mips.org/wiki/DECstation>
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2005-04-16 22:20:36 +00:00
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config MMU
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bool
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default y
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2007-10-11 22:46:10 +00:00
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config I8253
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bool
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2011-05-08 18:03:03 +00:00
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select CLKSRC_I8253
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2011-06-09 13:08:27 +00:00
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select CLKEVT_I8253
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2009-11-16 17:32:58 +00:00
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select MIPS_EXTERNAL_TIMER
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2007-10-11 22:46:10 +00:00
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2013-06-12 08:54:11 +00:00
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config ZONE_DMA
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bool
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2007-11-03 02:05:43 +00:00
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config ZONE_DMA32
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bool
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2005-04-16 22:20:36 +00:00
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source "drivers/pcmcia/Kconfig"
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2011-03-23 23:43:03 +00:00
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config RAPIDIO
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2014-01-23 23:56:04 +00:00
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tristate "RapidIO support"
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2011-03-23 23:43:03 +00:00
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depends on PCI
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default n
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help
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If you say Y here, the kernel will include drivers and
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infrastructure code to support RapidIO interconnect devices.
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source "drivers/rapidio/Kconfig"
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2005-04-16 22:20:36 +00:00
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endmenu
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menu "Executable file formats"
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source "fs/Kconfig.binfmt"
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config TRAD_SIGNALS
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bool
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config MIPS32_COMPAT
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MIPS: Compat: Fix build error if CONFIG_MIPS32_COMPAT but no compat ABI.
In that case nor __NR_seccomp_*_32 symbols will be defined in
<asm/unistd.h> so the attempt to use it in kernel.seccomp.c will fail
with:
kernel/seccomp.c:565:2: error: '__NR_seccomp_read_32' undeclared here (not in a function)
__NR_seccomp_read_32, __NR_seccomp_write_32, __NR_seccomp_exit_32, __NR_seccomp_sigreturn_32,
^
kernel/seccomp.c:565:24: error: '__NR_seccomp_write_32' undeclared here (not in a function)
__NR_seccomp_read_32, __NR_seccomp_write_32, __NR_seccomp_exit_32, __NR_seccomp_sigreturn_32,
^
kernel/seccomp.c:565:47: error: '__NR_seccomp_exit_32' undeclared here (not in a function)
__NR_seccomp_read_32, __NR_seccomp_write_32, __NR_seccomp_exit_32, __NR_seccomp_sigreturn_32,
^
kernel/seccomp.c:565:69: error: '__NR_seccomp_sigreturn_32' undeclared here (not in a function)
__NR_seccomp_read_32, __NR_seccomp_write_32, __NR_seccomp_exit_32, __NR_seccomp_sigreturn_32,
Solved by changing the compat ABIs in kconfig to select MIPS32_COMPAT
directly. This also means the user no longer has to select MIPS32_COMPAT
before being able to see the ABI options.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-12-19 00:18:03 +00:00
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bool
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2005-04-16 22:20:36 +00:00
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config COMPAT
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bool
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2006-11-07 09:02:44 +00:00
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config SYSVIPC_COMPAT
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bool
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2005-04-16 22:20:36 +00:00
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config MIPS32_O32
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bool "Kernel support for o32 binaries"
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MIPS: Compat: Fix build error if CONFIG_MIPS32_COMPAT but no compat ABI.
In that case nor __NR_seccomp_*_32 symbols will be defined in
<asm/unistd.h> so the attempt to use it in kernel.seccomp.c will fail
with:
kernel/seccomp.c:565:2: error: '__NR_seccomp_read_32' undeclared here (not in a function)
__NR_seccomp_read_32, __NR_seccomp_write_32, __NR_seccomp_exit_32, __NR_seccomp_sigreturn_32,
^
kernel/seccomp.c:565:24: error: '__NR_seccomp_write_32' undeclared here (not in a function)
__NR_seccomp_read_32, __NR_seccomp_write_32, __NR_seccomp_exit_32, __NR_seccomp_sigreturn_32,
^
kernel/seccomp.c:565:47: error: '__NR_seccomp_exit_32' undeclared here (not in a function)
__NR_seccomp_read_32, __NR_seccomp_write_32, __NR_seccomp_exit_32, __NR_seccomp_sigreturn_32,
^
kernel/seccomp.c:565:69: error: '__NR_seccomp_sigreturn_32' undeclared here (not in a function)
__NR_seccomp_read_32, __NR_seccomp_write_32, __NR_seccomp_exit_32, __NR_seccomp_sigreturn_32,
Solved by changing the compat ABIs in kconfig to select MIPS32_COMPAT
directly. This also means the user no longer has to select MIPS32_COMPAT
before being able to see the ABI options.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-12-19 00:18:03 +00:00
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depends on 64BIT
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select ARCH_WANT_OLD_COMPAT_IPC
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select COMPAT
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select MIPS32_COMPAT
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select SYSVIPC_COMPAT if SYSVIPC
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2005-04-16 22:20:36 +00:00
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help
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Select this option if you want to run o32 binaries. These are pure
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32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
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existing binaries are in this format.
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If unsure, say Y.
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config MIPS32_N32
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bool "Kernel support for n32 binaries"
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2015-01-03 11:10:23 +00:00
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depends on 64BIT
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MIPS: Compat: Fix build error if CONFIG_MIPS32_COMPAT but no compat ABI.
In that case nor __NR_seccomp_*_32 symbols will be defined in
<asm/unistd.h> so the attempt to use it in kernel.seccomp.c will fail
with:
kernel/seccomp.c:565:2: error: '__NR_seccomp_read_32' undeclared here (not in a function)
__NR_seccomp_read_32, __NR_seccomp_write_32, __NR_seccomp_exit_32, __NR_seccomp_sigreturn_32,
^
kernel/seccomp.c:565:24: error: '__NR_seccomp_write_32' undeclared here (not in a function)
__NR_seccomp_read_32, __NR_seccomp_write_32, __NR_seccomp_exit_32, __NR_seccomp_sigreturn_32,
^
kernel/seccomp.c:565:47: error: '__NR_seccomp_exit_32' undeclared here (not in a function)
__NR_seccomp_read_32, __NR_seccomp_write_32, __NR_seccomp_exit_32, __NR_seccomp_sigreturn_32,
^
kernel/seccomp.c:565:69: error: '__NR_seccomp_sigreturn_32' undeclared here (not in a function)
__NR_seccomp_read_32, __NR_seccomp_write_32, __NR_seccomp_exit_32, __NR_seccomp_sigreturn_32,
Solved by changing the compat ABIs in kconfig to select MIPS32_COMPAT
directly. This also means the user no longer has to select MIPS32_COMPAT
before being able to see the ABI options.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-12-19 00:18:03 +00:00
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select COMPAT
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select MIPS32_COMPAT
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select SYSVIPC_COMPAT if SYSVIPC
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2005-04-16 22:20:36 +00:00
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help
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Select this option if you want to run n32 binaries. These are
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64-bit binaries using 32-bit quantities for addressing and certain
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data that would normally be 64-bit. They are used in special
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cases.
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If unsure, say N.
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config BINFMT_ELF32
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bool
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default y if MIPS32_O32 || MIPS32_N32
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2016-05-23 23:22:26 +00:00
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select ELFCORE
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2005-04-16 22:20:36 +00:00
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2007-02-09 17:08:58 +00:00
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endmenu
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menu "Power management options"
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2009-06-04 12:27:10 +00:00
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config ARCH_HIBERNATION_POSSIBLE
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def_bool y
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2009-07-02 10:48:07 +00:00
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depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
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2009-06-04 12:27:10 +00:00
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2007-12-08 01:14:00 +00:00
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config ARCH_SUSPEND_POSSIBLE
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def_bool y
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2009-07-02 10:48:07 +00:00
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depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
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2007-12-08 01:14:00 +00:00
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2007-02-09 17:08:58 +00:00
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source "kernel/power/Kconfig"
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2006-06-05 15:43:10 +00:00
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2005-04-16 22:20:36 +00:00
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endmenu
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2013-04-04 12:54:21 +00:00
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config MIPS_EXTERNAL_TIMER
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bool
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menu "CPU Power Management"
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2014-04-14 15:24:22 +00:00
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if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
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2013-04-04 12:54:21 +00:00
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source "drivers/cpufreq/Kconfig"
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endif
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2009-11-16 17:32:58 +00:00
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2014-04-14 15:24:22 +00:00
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source "drivers/cpuidle/Kconfig"
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endmenu
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2005-07-12 04:03:49 +00:00
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source "net/Kconfig"
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2005-04-16 22:20:36 +00:00
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source "drivers/Kconfig"
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2012-11-15 09:35:42 +00:00
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source "drivers/firmware/Kconfig"
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2005-04-16 22:20:36 +00:00
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source "fs/Kconfig"
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source "arch/mips/Kconfig.debug"
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source "security/Kconfig"
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source "crypto/Kconfig"
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source "lib/Kconfig"
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2012-11-22 02:33:59 +00:00
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source "arch/mips/kvm/Kconfig"
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