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MIPS: BCM63XX: select correct MIPS_L1_CACHE_SHIFT value
Broadcom BCM63xx DSL SoCs have a L1-cache line size of 16 bytes (shift value of 4) instead of the currently configured 32 bytes L1-cache line size. Reported-by: Daniel Gonzalez <dgcbueu@gmail.com> Signed-off-by: Florian Fainelli <florian@openwrt.org>
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@ -138,6 +138,7 @@ config BCM63XX
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select SWAP_IO_SPACE
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select ARCH_REQUIRE_GPIOLIB
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select HAVE_CLK
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select MIPS_L1_CACHE_SHIFT_4
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help
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Support for BCM63XX based boards
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