u-boot/arch/riscv
Heinrich Schuchardt 3fbcfaa6f3 riscv: add missing SBI extension definitions
Add the System Reset Extension and the Hart State Management Extension
definitions.

Add missing RFENCE Extension enum values.

The SBI 0.1 extension constants are needed for the sbi command. Remove
an #ifdef.

Cf. https://github.com/riscv/riscv-sbi-doc/blob/master/riscv-sbi.adoc

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-10-07 16:08:23 +08:00
..
cpu board: sifive: use ccache driver instead of helper function 2021-09-07 10:34:29 +08:00
dts board: sifive: drop stuff related to unmatched revision 1 2021-07-21 16:39:57 +08:00
include/asm riscv: add missing SBI extension definitions 2021-10-07 16:08:23 +08:00
lib riscv: Fix setting no-map in reserved memory nodes 2021-10-07 16:08:23 +08:00
config.mk kconfig / kbuild: Re-sync with Linux 4.19 2020-04-10 11:18:32 -04:00
Kconfig Prepare v2021.10-rc4 2021-09-16 10:29:40 -04:00
Makefile riscv: add Kconfig entries for the code model 2018-12-18 09:56:26 +08:00