Release v1.3.3

Update CHANGELOG for release.

Signed-off-by: Wolfgang Denk <wd@denx.de>

MAINTAINERS

@@ -607,7 +607,7 @@ Thomas Lange <thomas@corelatus.se>
 	dbau1x00		MIPS32 Au1000
 	gth2			MIPS32 Au1000
 
-Vlad Lungu <vlad@comsys.ro>
+Vlad Lungu <vlad.lungu@windriver.com>
 	qemu_mips		MIPS32
 
 #########################################################################

MAKEALL

@@ -42,6 +42,7 @@ LIST_5xxx="		\
 	fo300		\
 	icecube_5100	\
 	icecube_5200	\
+	inka4x0		\
 	lite5200b	\
 	mcc200		\
 	mecp5200	\
@@ -305,6 +306,7 @@ LIST_8260="		\
 	TQM8260_AC	\
 	TQM8260_AD	\
 	TQM8260_AE	\
+	TQM8272		\
 	ZPC1900		\
 "
 

Makefile

@@ -24,7 +24,7 @@
 VERSION = 1
 PATCHLEVEL = 3
 SUBLEVEL = 3
-EXTRAVERSION = -rc2
+EXTRAVERSION =
 U_BOOT_VERSION = $(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)
 VERSION_FILE = $(obj)include/version_autogenerated.h
 
@@ -201,7 +201,6 @@ OBJS := $(addprefix $(obj),$(OBJS))
 LIBS  = lib_generic/libgeneric.a
 LIBS += $(shell if [ -f board/$(VENDOR)/common/Makefile ]; then echo \
 	"board/$(VENDOR)/common/lib$(VENDOR).a"; fi)
-LIBS += board/$(BOARDDIR)/lib$(BOARD).a
 LIBS += cpu/$(CPU)/lib$(CPU).a
 ifdef SOC
 LIBS += cpu/$(CPU)/$(SOC)/lib$(SOC).a
@@ -248,6 +247,9 @@ LIBS += post/libpost.a
 LIBS := $(addprefix $(obj),$(LIBS))
 .PHONY : $(LIBS) $(VERSION_FILE)
 
+LIBBOARD = board/$(BOARDDIR)/lib$(BOARD).a
+LIBBOARD := $(addprefix $(obj),$(LIBBOARD))
+
 # Add GCC lib
 PLATFORM_LIBS += -L $(shell dirname `$(CC) $(CFLAGS) -print-libgcc-file-name`) -lgcc
 
@@ -270,7 +272,7 @@ U_BOOT_ONENAND = $(obj)u-boot-onenand.bin
 endif
 
 __OBJS := $(subst $(obj),,$(OBJS))
-__LIBS := $(subst $(obj),,$(LIBS))
+__LIBS := $(subst $(obj),,$(LIBS)) $(subst $(obj),,$(LIBBOARD))
 
 #########################################################################
 #########################################################################
@@ -313,8 +315,9 @@ $(obj)u-boot.sha1:	$(obj)u-boot.bin
 $(obj)u-boot.dis:	$(obj)u-boot
 		$(OBJDUMP) -d $< > $@
 
-$(obj)u-boot:		depend $(SUBDIRS) $(OBJS) $(LIBS) $(LDSCRIPT)
-		UNDEF_SYM=`$(OBJDUMP) -x $(LIBS) |sed  -n -e 's/.*\($(SYM_PREFIX)__u_boot_cmd_.*\)/-u\1/p'|sort|uniq`;\
+$(obj)u-boot:		depend $(SUBDIRS) $(OBJS) $(LIBBOARD) $(LIBS) $(LDSCRIPT)
+		UNDEF_SYM=`$(OBJDUMP) -x $(LIBBOARD) $(LIBS) | \
+		sed  -n -e 's/.*\($(SYM_PREFIX)__u_boot_cmd_.*\)/-u\1/p'|sort|uniq`;\
 		cd $(LNDIR) && $(LD) $(LDFLAGS) $$UNDEF_SYM $(__OBJS) \
 			--start-group $(__LIBS) --end-group $(PLATFORM_LIBS) \
 			-Map u-boot.map -o u-boot
@@ -325,6 +328,9 @@ $(OBJS):	depend $(obj)include/autoconf.mk
 $(LIBS):	depend $(obj)include/autoconf.mk
 		$(MAKE) -C $(dir $(subst $(obj),,$@))
 
+$(LIBBOARD):	depend $(LIBS) $(obj)include/autoconf.mk
+		$(MAKE) -C $(dir $(subst $(obj),,$@))
+
 $(SUBDIRS):	depend $(obj)include/autoconf.mk
 		$(MAKE) -C $@ all
 
@@ -346,11 +352,9 @@ $(U_BOOT_ONENAND):	$(ONENAND_IPL) $(obj)u-boot.bin $(obj)include/autoconf.mk
 		cat $(obj)onenand_ipl/onenand-ipl-4k.bin $(obj)u-boot.bin > $(obj)u-boot-flexonenand.bin
 
 $(VERSION_FILE):
-		@( echo -n "#define U_BOOT_VERSION \"U-Boot " ; \
-		echo -n "$(U_BOOT_VERSION)" ; \
-		echo -n $(shell $(CONFIG_SHELL) $(TOPDIR)/tools/setlocalversion \
-			 $(TOPDIR)) ; \
-		echo "\"" ) > $@.tmp
+		@( printf '#define U_BOOT_VERSION "U-Boot %s%s"\n' "$(U_BOOT_VERSION)" \
+		 '$(shell $(CONFIG_SHELL) $(TOPDIR)/tools/setlocalversion $(TOPDIR))' \
+		 ) > $@.tmp
 		@cmp -s $@ $@.tmp && rm -f $@.tmp || mv -f $@.tmp $@
 
 gdbtools:
@@ -420,13 +424,19 @@ $(obj)System.map:	$(obj)u-boot
 # This target actually generates 2 files; autoconf.mk and autoconf.mk.dep.
 # the dep file is only include in this top level makefile to determine when
 # to regenerate the autoconf.mk file.
-$(obj)include/autoconf.mk: $(obj)include/config.h $(VERSION_FILE)
-	@$(XECHO) Generating include/autoconf.mk ; \
+$(obj)include/autoconf.mk.dep: $(obj)include/config.h include/common.h
+	@$(XECHO) Generating $@ ; \
 	set -e ; \
 	: Generate the dependancies ; \
-	$(CC) -x c -M $(HOST_CFLAGS) $(CPPFLAGS) -MQ $@ include/common.h > $@.dep ; \
+	$(CC) -x c -DDO_DEPS_ONLY -M $(HOST_CFLAGS) $(CPPFLAGS) \
+		-MQ $(obj)include/autoconf.mk include/common.h > $@
+
+$(obj)include/autoconf.mk: $(obj)include/config.h
+	@$(XECHO) Generating $@ ; \
+	set -e ; \
 	: Extract the config macros ; \
-	$(CPP) $(CFLAGS) -dM include/common.h | sed -n -f tools/scripts/define2mk.sed > $@
+	$(CPP) $(CFLAGS) -DDO_DEPS_ONLY -dM include/common.h | \
+		sed -n -f tools/scripts/define2mk.sed > $@
 
 sinclude $(obj)include/autoconf.mk.dep
 

README

@@ -623,7 +623,6 @@ The following options need to be configured:
 		CONFIG_CMD_SPI		* SPI serial bus support
 		CONFIG_CMD_USB		* USB support
 		CONFIG_CMD_VFD		* VFD support (TRAB)
-		CONFIG_CMD_BSP		* Board SPecific functions
 		CONFIG_CMD_CDP		* Cisco Discover Protocol support
 		CONFIG_CMD_FSL		* Microblaze FSL support
 

api/api.c

@@ -30,6 +30,7 @@
 #include <command.h>
 #include <common.h>
 #include <malloc.h>
+#include <environment.h>
 #include <linux/types.h>
 #include <api_public.h>
 
@@ -40,7 +41,6 @@
 
 /* U-Boot routines needed */
 extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
-extern uchar *env_get_addr(int);
 
 /*****************************************************************************
  *
@@ -582,7 +582,7 @@ int syscall(int call, int *retval, ...)
 	va_list	ap;
 	int rv;
 
-	if (call < 0 || call >= calls_no || calls_table[call] == NULL) {
+	if (call < 0 || call >= calls_no) {
 		debugf("invalid call #%d\n", call);
 		return 0;
 	}

board/BuS/EB+MCF-EV123/config.mk

@@ -22,7 +22,7 @@
 # MA 02111-1307 USA
 #
 
-sinclude $(TOPDIR)/board/$(BOARDDIR)/textbase.mk
+sinclude $(OBJTREE)/board/$(BOARDDIR)/textbase.mk
 ifndef TEXT_BASE
 TEXT_BASE = 0xFE000000
 endif

board/amcc/acadia/config.mk

@@ -28,7 +28,7 @@
 sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
 
 ifndef TEXT_BASE
-TEXT_BASE = 0xFFFC0000
+TEXT_BASE = 0xFFF80000
 endif
 
 ifeq ($(debug),1)

board/amcc/canyonlands/canyonlands.c

@@ -476,8 +476,37 @@ void ft_board_setup(void *blob, bd_t *bd)
 	val[3] = gd->bd->bi_flashsize;
 	rc = fdt_find_and_setprop(blob, "/plb/opb/ebc", "ranges",
 				  val, sizeof(val), 1);
-	if (rc)
+	if (rc) {
 		printf("Unable to update property NOR mapping, err=%s\n",
 		       fdt_strerror(rc));
+	}
+
+	if (gd->board_type == BOARD_CANYONLANDS_SATA) {
+		/*
+		 * When SATA is selected we need to disable the first PCIe
+		 * node in the device tree, so that Linux doesn't initialize
+		 * it.
+		 */
+		rc = fdt_find_and_setprop(blob, "/plb/pciex@d00000000", "status",
+					  "disabled", sizeof("disabled"), 1);
+		if (rc) {
+			printf("Unable to update property status in PCIe node, err=%s\n",
+			       fdt_strerror(rc));
+		}
+	}
+
+	if (gd->board_type == BOARD_CANYONLANDS_PCIE) {
+		/*
+		 * When PCIe is selected we need to disable the SATA
+		 * node in the device tree, so that Linux doesn't initialize
+		 * it.
+		 */
+		rc = fdt_find_and_setprop(blob, "/plb/sata@bffd1000", "status",
+					  "disabled", sizeof("disabled"), 1);
+		if (rc) {
+			printf("Unable to update property status in PCIe node, err=%s\n",
+			       fdt_strerror(rc));
+		}
+	}
 }
 #endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */

board/amcc/canyonlands/config.mk

@@ -24,20 +24,12 @@
 # AMCC 460EX/460GT Evaluation Board (Canyonlands) board
 #
 
-sinclude $(TOPDIR)/board/$(BOARDDIR)/config.tmp
+sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
 
 ifndef TEXT_BASE
 TEXT_BASE = 0xFFFA0000
 endif
 
-ifeq ($(CONFIG_NAND_U_BOOT),y)
-LDSCRIPT = $(TOPDIR)/board/$(BOARDDIR)/u-boot-nand.lds
-endif
-
-ifeq ($(CONFIG_PCIBOOT_U_BOOT),y)
-LDSCRIPT = $(TOPDIR)/board/$(BOARDDIR)/u-boot-nand.lds
-endif
-
 PLATFORM_CPPFLAGS += -DCONFIG_440=1
 
 ifeq ($(debug),1)

board/amcc/kilauea/kilauea.c

@@ -230,14 +230,22 @@ int misc_init_r(void)
 	return 0;
 }
 
-int board_emac_count(void)
+static int is_405exr(void)
 {
 	u32 pvr = get_pvr();
 
+	if (pvr & 0x00000004)
+		return 0;		/* bit 2 set -> 405EX */
+
+	return 1;			/* bit 2 cleared -> 405EXr */
+}
+
+int board_emac_count(void)
+{
 	/*
 	 * 405EXr only has one EMAC interface, 405EX has two
 	 */
-	if ((pvr == PVR_405EXR1_RA) || (pvr == PVR_405EXR2_RA))
+	if (is_405exr())
 		return 1;
 	else
 		return 2;
@@ -245,12 +253,10 @@ int board_emac_count(void)
 
 static int board_pcie_count(void)
 {
-	u32 pvr = get_pvr();
-
 	/*
 	 * 405EXr only has one EMAC interface, 405EX has two
 	 */
-	if ((pvr == PVR_405EXR1_RA) || (pvr == PVR_405EXR2_RA))
+	if (is_405exr())
 		return 1;
 	else
 		return 2;
@@ -259,9 +265,8 @@ static int board_pcie_count(void)
 int checkboard (void)
 {
 	char *s = getenv("serial#");
-	u32 pvr = get_pvr();
 
-	if ((pvr == PVR_405EXR1_RA) || (pvr == PVR_405EXR2_RA))
+	if (is_405exr())
 		printf("Board: Haleakala - AMCC PPC405EXr Evaluation Board");
 	else
 		printf("Board: Kilauea - AMCC PPC405EX Evaluation Board");

board/amcc/yosemite/yosemite.c

@@ -26,6 +26,8 @@
 #include <asm/processor.h>
 #include <asm/io.h>
 #include <spd_sdram.h>
+#include <libfdt.h>
+#include <fdt_support.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -554,3 +556,24 @@ void board_reset(void)
 	/* give reset to BCSR */
 	*(unsigned char *)(CFG_BCSR_BASE | 0x06) = 0x09;
 }
+
+#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
+void ft_board_setup(void *blob, bd_t *bd)
+{
+	u32 val[4];
+	int rc;
+
+	ft_cpu_setup(blob, bd);
+
+	/* Fixup NOR mapping */
+	val[0] = 0;				/* chip select number */
+	val[1] = 0;				/* always 0 */
+	val[2] = gd->bd->bi_flashstart;
+	val[3] = gd->bd->bi_flashsize;
+	rc = fdt_find_and_setprop(blob, "/plb/opb/ebc", "ranges",
+				  val, sizeof(val), 1);
+	if (rc)
+		printf("Unable to update property NOR mapping, err=%s\n",
+		       fdt_strerror(rc));
+}
+#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */

board/atmel/at91cap9adk/Makefile

@@ -1,6 +1,6 @@
 #
 # (C) Copyright 2003-2008
-# Wolfgang Denk, DENX Software Engineering, wd <at> denx.de.
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 #
 # See file CREDITS for list of people who contributed to this
 # project.

board/atmel/at91cap9adk/at91cap9adk.c

@@ -1,6 +1,6 @@
 /*
  * (C) Copyright 2007-2008
- * Stelian Pop <stelian.pop <at> leadtechdesign.com>
+ * Stelian Pop <stelian.pop@leadtechdesign.com>
  * Lead Tech Design <www.leadtechdesign.com>
  *
  * See file CREDITS for list of people who contributed to this
@@ -25,7 +25,7 @@
 #include <common.h>
 #include <asm/arch/at91cap9.h>
 #include <asm/arch/at91cap9_matrix.h>
-#include <asm/arch/at91sam926x_mc.h>
+#include <asm/arch/at91sam9_smc.h>
 #include <asm/arch/at91_pmc.h>
 #include <asm/arch/at91_rstc.h>
 #include <asm/arch/gpio.h>

board/atmel/at91cap9adk/led.c

@@ -1,6 +1,6 @@
 /*
  * (C) Copyright 2007-2008
- * Stelian Pop <stelian.pop <at> leadtechdesign.com>
+ * Stelian Pop <stelian.pop@leadtechdesign.com>
  * Lead Tech Design <www.leadtechdesign.com>
  *
  * See file CREDITS for list of people who contributed to this

board/atmel/at91cap9adk/nand.c

@@ -1,6 +1,6 @@
 /*
  * (C) Copyright 2007-2008
- * Stelian Pop <stelian.pop <at> leadtechdesign.com>
+ * Stelian Pop <stelian.pop@leadtechdesign.com>
  * Lead Tech Design <www.leadtechdesign.com>
  *
  * (C) Copyright 2006 ATMEL Rousset, Lacressonniere Nicolas

board/atmel/at91cap9adk/partition.c

@@ -1,4 +1,6 @@
 /*
+ * (C) Copyright 2008
+ * Ulf Samuelsson <ulf@atmel.com>
  *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License as

board/atmel/at91cap9adk/u-boot.lds

@@ -1,6 +1,6 @@
 /*
  * (C) Copyright 2002
- * Gary Jennejohn, DENX Software Engineering, <gj <at> denx.de>
+ * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
  *
  * See file CREDITS for list of people who contributed to this
  * project.

board/atmel/at91rm9200dk/partition.c

@@ -1,4 +1,6 @@
 /*
+ * (C) Copyright 2008
+ * Ulf Samuelsson <ulf@atmel.com>
  *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License as

board/atmel/at91sam9260ek/Makefile

@@ -1,6 +1,6 @@
 #
 # (C) Copyright 2003-2008
-# Wolfgang Denk, DENX Software Engineering, wd <at> denx.de.
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 #
 # See file CREDITS for list of people who contributed to this
 # project.

board/atmel/at91sam9260ek/at91sam9260ek.c

@@ -1,6 +1,6 @@
 /*
  * (C) Copyright 2007-2008
- * Stelian Pop <stelian.pop <at> leadtechdesign.com>
+ * Stelian Pop <stelian.pop@leadtechdesign.com>
  * Lead Tech Design <www.leadtechdesign.com>
  *
  * See file CREDITS for list of people who contributed to this
@@ -25,7 +25,7 @@
 #include <common.h>
 #include <asm/arch/at91sam9260.h>
 #include <asm/arch/at91sam9260_matrix.h>
-#include <asm/arch/at91sam926x_mc.h>
+#include <asm/arch/at91sam9_smc.h>
 #include <asm/arch/at91_pmc.h>
 #include <asm/arch/at91_rstc.h>
 #include <asm/arch/gpio.h>

board/atmel/at91sam9260ek/led.c

@@ -1,6 +1,6 @@
 /*
  * (C) Copyright 2007-2008
- * Stelian Pop <stelian.pop <at> leadtechdesign.com>
+ * Stelian Pop <stelian.pop@leadtechdesign.com>
  * Lead Tech Design <www.leadtechdesign.com>
  *
  * See file CREDITS for list of people who contributed to this

board/atmel/at91sam9260ek/nand.c

@@ -1,6 +1,6 @@
 /*
  * (C) Copyright 2007-2008
- * Stelian Pop <stelian.pop <at> leadtechdesign.com>
+ * Stelian Pop <stelian.pop@leadtechdesign.com>
  * Lead Tech Design <www.leadtechdesign.com>
  *
  * (C) Copyright 2006 ATMEL Rousset, Lacressonniere Nicolas

board/atmel/at91sam9260ek/partition.c

@@ -1,4 +1,6 @@
 /*
+ * (C) Copyright 2008
+ * Ulf Samuelsson <ulf@atmel.com>
  *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License as

board/atmel/at91sam9260ek/u-boot.lds

@@ -1,6 +1,6 @@
 /*
  * (C) Copyright 2002
- * Gary Jennejohn, DENX Software Engineering, <gj <at> denx.de>
+ * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
  *
  * See file CREDITS for list of people who contributed to this
  * project.

board/esd/mecp5200/config.mk

@@ -32,7 +32,7 @@
 #	0x00100000   boot from RAM (for testing only)
 #
 
-sinclude $(TOPDIR)/board/$(BOARDDIR)/config.tmp
+sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
 
 ifndef TEXT_BASE
 ## Standard: boot high

board/freescale/mpc8548cds/mpc8548cds.c

@@ -59,6 +59,7 @@ int checkboard (void)
 	uint pci_slot = get_pci_slot ();
 
 	uint cpu_board_rev = get_cpu_board_revision ();
+	uint svr;
 
 	printf ("Board: CDS Version 0x%02x, PCI Slot %d\n",
 		get_board_version (), pci_slot);
@@ -71,12 +72,16 @@ int checkboard (void)
 	 */
 	local_bus_init ();
 
+	svr = get_svr();
+
 	/*
 	 * Fix CPU2 errata: A core hang possible while executing a
 	 * msync instruction and a snoopable transaction from an I/O
 	 * master tagged to make quick forward progress is present.
+	 * Fixed in Silicon Rev.2.1
 	 */
-	ecm->eebpcr |= (1 << 16);
+	if (!(SVR_MAJ(svr) >= 2 && SVR_MIN(svr) >= 1))
+		ecm->eebpcr |= (1 << 16);
 
 	/*
 	 * Hack TSEC 3 and 4 IO voltages.

board/freescale/mpc8610hpcd/config.mk

@@ -22,4 +22,4 @@
 TEXT_BASE = 0xfff00000
 
 PLATFORM_CPPFLAGS += -DCONFIG_MPC86xx=1
-PLATFORM_CPPFLAGS += -DCONFIG_MPC8610=1 -maltivec -mabi=altivec -msoft-float -O2
+PLATFORM_CPPFLAGS += -DCONFIG_MPC8610=1 -maltivec -mabi=altivec -msoft-float

board/linkstation/Makefile

@@ -23,18 +23,21 @@
 
 include $(TOPDIR)/config.mk
 
-LIB	= lib$(BOARD).a
+LIB	= $(obj)lib$(BOARD).a
 
 OBJS	= $(BOARD).o ide.o hwctl.o avr.o
 
-$(LIB):	.depend $(OBJS) $(SOBJS)
-	$(AR) crv $@ $(OBJS) $(SOBJS)
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(OBJS))
+
+$(LIB):	$(obj).depend $(OBJS)
+	$(AR) crv $@ $(OBJS)
 
 #########################################################################
 
-.depend:	Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
-		$(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
 
-sinclude .depend
+sinclude $(obj).depend
 
 #########################################################################

board/linkstation/config.mk

@@ -35,7 +35,7 @@
 #       0x07F00000   boot from RAM
 #
 
-sinclude $(TOPDIR)/board/$(BOARDDIR)/config.tmp
+sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
 
 ifndef TEXT_BASE
 # For flash image - all models

board/munices/config.mk

@@ -29,7 +29,7 @@
 #	0xFFF00000   boot high (standard configuration)
 #
 
-sinclude $(TOPDIR)/board/$(BOARDDIR)/config.tmp
+sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
 
 ifndef TEXT_BASE
 TEXT_BASE = 0xFFF00000

board/mx31ads/lowlevel_init.S

@@ -220,7 +220,7 @@ lowlevel_init:
 	mov	r1, #CS4_BASE
 	ldrh	r1, [r1, #0x2]
 	/* Is 27MHz switch set? */
-	ands	r1, r1, #0x16
+	ands	r1, r1, #0x10
 
 	/* 532-133-66.5 */
 	ldr	r0, =CCM_BASE

board/qemu-mips/README

@@ -1,4 +1,4 @@
-By Vlad Lungu vlad@comsys.ro 2007-Oct-01
+By Vlad Lungu vlad.lungu@windriver.com 2007-Oct-01
 ----------------------------------------
 Qemu is a full system emulator. See
 
@@ -9,3 +9,7 @@ Limitations & comments
 Supports the "-m mips" configuration of qemu: serial,NE2000,IDE.
 Support is big endian only for now (or at least this is what I tested).
 Derived from au1x00 with a lot of things cut out.
+
+Supports emulated flash (patch Jean-Christophe PLAGNIOL-VILLARD) with
+recent qemu versions. When using emulated flash, launch with
+-pflash <filename> and erase mips_bios.bin.

board/qemu-mips/qemu-mips.c

@@ -1,6 +1,6 @@
 /*
  * (C) Copyright 2007
- * Vlad Lungu vlad@comsys.ro
+ * Vlad Lungu vlad.lungu@windriver.com
  *
  * See file CREDITS for list of people who contributed to this
  * project.

board/sc520_cdp/sc520_cdp_asm.S

@@ -76,8 +76,8 @@ done:   movb	$0x88, %al
 	jmp 	*%ebp		     /* return to caller */
 
 
-.globl __show_boot_progress
-__show_boot_progress:
+.globl show_boot_progress
+show_boot_progress:
 	out	%al, $0x80
 	xchg	%al, %ah
 	movw	$0x680, %dx

board/sc520_spunk/Makefile

@@ -36,7 +36,7 @@ OBJS	:= $(addprefix $(obj),$(COBJS))
 SOBJS	:= $(addprefix $(obj),$(SOBJS))
 
 $(LIB):	$(obj).depend $(OBJS) $(SOBJS)
-	$(AR) $(ARFLAGS) $@ $(OBJS)
+	$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
 
 clean:
 	rm -f $(SOBJS) $(OBJS)

board/sc520_spunk/flash.c

@@ -33,7 +33,6 @@
 #define PROBE_BUFFER_SIZE 1024
 static unsigned char buffer[PROBE_BUFFER_SIZE];
 
-
 #define SC520_MAX_FLASH_BANKS  1
 #define SC520_FLASH_BANK0_BASE 0x38000000  /* BOOTCS */
 #define SC520_FLASH_BANKSIZE   0x8000000
@@ -62,7 +61,6 @@ flash_info_t    flash_info[SC520_MAX_FLASH_BANKS];
 /*-----------------------------------------------------------------------
  */
 
-
 static u32 _probe_flash(u32 addr, u32 bw, int il)
 {
 	u32 result=0;
@@ -180,7 +178,6 @@ static u32 _probe_flash(u32 addr, u32 bw, int il)
 		break;
 	}
 
-
 	return result;
 }
 
@@ -215,11 +212,9 @@ static int identify_flash(unsigned address, int width)
 		enable_interrupts();
 	}
 
-
 	vendor = res >> 16;
 	device = res & 0xffff;
 
-
 	return res;
 }
 
@@ -385,7 +380,6 @@ void flash_print_info(flash_info_t *info)
 		break;
 	}
 
-
 	printf("  Size: %ld MB in %d Sectors\n",
 	       info->size >> 20, info->sector_count);
 
@@ -399,13 +393,13 @@ void flash_print_info(flash_info_t *info)
 	}
 	printf ("\n");
 
-	done:
+done:
+	return;
 }
 
 /*-----------------------------------------------------------------------
  */
 
-
 static u32 _amd_erase_flash(u32 addr, u32 sector)
 {
 	unsigned elapsed;
@@ -467,7 +461,6 @@ static u32 _intel_erase_flash(u32 addr, u32 sector)
 	*(volatile u16*)(addr + sector) = 0x0020;   /* erase setup */
 	*(volatile u16*)(addr + sector) = 0x00D0;   /* erase confirm */
 
-
 	/* Wait at least 80us - let's wait 1 ms */
 	__udelay(1000);
 
@@ -486,7 +479,6 @@ static u32 _intel_erase_flash(u32 addr, u32 sector)
 	return 0;
 }
 
-
 extern int _intel_erase_flash_end;
 asm ("_intel_erase_flash_end:\n"
      ".long 0\n");
@@ -548,7 +540,6 @@ int flash_erase(flash_info_t *info, int s_first, int s_last)
 		printf ("\n");
 	}
 
-
 	/* Start erase on unprotected sectors */
 	for (sect = s_first; sect<=s_last; sect++) {
 
@@ -566,7 +557,6 @@ int flash_erase(flash_info_t *info, int s_first, int s_last)
 				enable_interrupts();
 			}
 
-
 			if (res) {
 				printf("Erase timed out, sector %d\n", sect);
 				return res;
@@ -576,7 +566,6 @@ int flash_erase(flash_info_t *info, int s_first, int s_last)
 		}
 	}
 
-
 	return 0;
 }
 
@@ -586,11 +575,11 @@ int flash_erase(flash_info_t *info, int s_first, int s_last)
  * 1 - write timeout
  * 2 - Flash not erased
  */
-static int _amd_write_word(unsigned start, unsigned dest, unsigned data)
+static int _amd_write_word(unsigned start, unsigned dest, u16 data)
 {
-	volatile u16 *addr2 = (u16*)start;
-	volatile u16 *dest2 = (u16*)dest;
-	volatile u16 *data2 = (u16*)&data;
+	volatile u16 *addr2 = (volatile u16*)start;
+	volatile u16 *dest2 = (volatile u16*)dest;
+	volatile u16 *data2 = (volatile u16*)&data;
 	int i;
 	unsigned elapsed;
 
@@ -601,7 +590,6 @@ static int _amd_write_word(unsigned start, unsigned dest, unsigned data)
 
 	for (i = 0; i < 2; i++) {
 
-
 		addr2[0x5555] = 0x00AA;
 		addr2[0x2aaa] = 0x0055;
 		addr2[0x5555] = 0x00A0;
@@ -630,7 +618,6 @@ extern int _amd_write_word_end;
 asm ("_amd_write_word_end:\n"
      ".long 0\n");
 
-
 static int _intel_write_word(unsigned start, unsigned dest, unsigned data)
 {
 	int i;
@@ -663,14 +650,12 @@ static int _intel_write_word(unsigned start, unsigned dest, unsigned data)
 
 
 	return 0;
-
 }
 
 extern int _intel_write_word_end;
 asm ("_intel_write_word_end:\n"
      ".long 0\n");
 
-
 /*-----------------------------------------------------------------------
  * Copy memory to flash, returns:
  * 0 - OK
@@ -715,10 +700,8 @@ int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
 		return 3;
 	}
 
-
 	wp = (addr & ~3);	/* get lower word aligned address */
 
-
 	/*
 	 * handle unaligned start bytes
 	 */
@@ -805,5 +788,4 @@ int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
 	}
 
 	return rc;
-
 }

board/sc520_spunk/sc520_spunk_asm.S

@@ -73,8 +73,8 @@ done:   movl    $0xfffefc32,%edx
 	jmp 	*%ebp		     /* return to caller */
 
 
-.globl __show_boot_progress
-__show_boot_progress:
+.globl show_boot_progress
+show_boot_progress:
 	movl    $0xfffefc32,%edx
 	xorw    $0xffff, %ax
 	movw    %ax,(%edx)

board/tqm8272/Makefile

@@ -1,5 +1,5 @@
 #
-# (C) Copyright 2001
+# (C) Copyright 2001-2008
 # Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 #
 # See file CREDITS for list of people who contributed to this
@@ -22,19 +22,26 @@
 #
 
 include $(TOPDIR)/config.mk
+ifneq ($(OBJTREE),$(SRCTREE))
+$(shell mkdir -p $(obj)../tqm8xx/)
+endif
 
-LIB	= lib$(BOARD).a
+LIB	= $(obj)lib$(BOARD).a
 
-OBJS	= $(BOARD).o ../tqm8xx/load_sernum_ethaddr.o
+COBJS	= $(BOARD).o ../tqm8xx/load_sernum_ethaddr.o
 
-$(LIB):	.depend $(OBJS)
-	$(AR) crv $@ $(OBJS)
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))
+
+$(LIB):	$(obj).depend $(OBJS)
+	$(AR) $(ARFLAGS) $@ $(OBJS)
 
 #########################################################################
 
-.depend:	Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
-		$(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
 
-sinclude .depend
+sinclude $(obj).depend
 
 #########################################################################

board/trizepsiv/eeprom.c

@@ -24,7 +24,6 @@
 #include <common.h>
 #include <command.h>
 
-static unsigned char srom[128];
 extern u16 read_srom_word(int);
 extern void write_srom_word(int offset, u16 val);
 

board/v38b/config.mk

@@ -25,7 +25,7 @@
 # MarelV38B board
 #
 
-sinclude $(TOPDIR)/board/$(BOARDDIR)/config.tmp
+sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
 
 TEXT_BASE = 0xFF000000
 

common/cmd_bootm.c

@@ -433,17 +433,6 @@ static int fit_check_kernel (const void *fit, int os_noffset, int verify)
 	}
 	show_boot_progress (105);
 
-#ifdef CONFIG_LOGBUFFER
-#ifndef CONFIG_ALT_LB_ADDR
-	kbd=gd->bd;
-	/* Prevent initrd from overwriting logbuffer */
-	if (initrd_high < (kbd->bi_memsize-LOGBUFF_LEN-LOGBUFF_OVERHEAD))
-		initrd_high = kbd->bi_memsize-LOGBUFF_LEN-LOGBUFF_OVERHEAD;
-	debug ("## Logbuffer at 0x%08lX ", kbd->bi_memsize-LOGBUFF_LEN);
-#else
-	debug ("## Logbuffer at 0x%08lX ", CONFIG_ALT_LB_ADDR);
-#endif
-#endif
 	if (!fit_image_check_target_arch (fit, os_noffset)) {
 		puts ("Unsupported Architecture\n");
 		show_boot_progress (-105);

common/cmd_ide.c

@@ -52,10 +52,6 @@
 # include <status_led.h>
 #endif
 
-#ifndef __PPC__
-#include <asm/io.h>
-#endif
-
 #ifdef CONFIG_IDE_8xx_DIRECT
 DECLARE_GLOBAL_DATA_PTR;
 #endif

common/cmd_nand.c

@@ -110,7 +110,7 @@ arg_off_size(int argc, char *argv[], nand_info_t *nand, ulong *off, size_t *size
 			}
 			*off = part->offset;
 			if (argc >= 2) {
-				if (!(str2long(argv[1], size))) {
+				if (!(str2long(argv[1], (ulong *)size))) {
 					printf("'%s' is not a number\n", argv[1]);
 					return -1;
 				}

common/cmd_nvedit.c

@@ -68,16 +68,6 @@ DECLARE_GLOBAL_DATA_PTR;
 /************************************************************************
 ************************************************************************/
 
-/* Function that returns a pointer to a value from the environment */
-/* (Only memory version supported / needed). */
-extern uchar *env_get_addr(int);
-
-/* Function that updates CRC of the enironment */
-extern void env_crc_update (void);
-
-/************************************************************************
-************************************************************************/
-
 /*
  * Table with supported baudrates (defined in config_xyz.h)
  */

common/env_common.c

@@ -50,6 +50,7 @@ extern void env_relocate_spec (void);
 extern uchar env_get_char_spec(int);
 
 static uchar env_get_char_init (int index);
+uchar (*env_get_char)(int) = env_get_char_init;
 
 /************************************************************************
  * Default settings to be used when no valid environment is found
@@ -181,19 +182,6 @@ uchar env_get_char_memory (int index)
 }
 #endif
 
-uchar env_get_char (int index)
-{
-	uchar c;
-
-	/* if relocated to RAM */
-	if (gd->flags & GD_FLG_RELOC)
-		c = env_get_char_memory(index);
-	else
-		c = env_get_char_init(index);
-
-	return (c);
-}
-
 uchar *env_get_addr (int index)
 {
 	if (gd->env_valid) {
@@ -227,6 +215,11 @@ void env_relocate (void)
 	DEBUGF ("%s[%d] malloced ENV at %p\n", __FUNCTION__,__LINE__,env_ptr);
 #endif
 
+	/*
+	 * After relocation to RAM, we can always use the "memory" functions
+	 */
+	env_get_char = env_get_char_memory;
+
 	if (gd->env_valid == 0) {
 #if defined(CONFIG_GTH)	|| defined(CFG_ENV_IS_NOWHERE)	/* Environment not changable */
 		puts ("Using default environment\n\n");

common/env_eeprom.c

@@ -38,9 +38,6 @@ env_t *env_ptr = NULL;
 
 char * env_name_spec = "EEPROM";
 
-extern uchar env_get_char_memory (int index);
-
-
 uchar env_get_char_spec (int index)
 {
 	uchar c;

common/env_flash.c

@@ -378,7 +378,9 @@ void env_relocate_spec (void)
 		puts ("*** Warning - some problems detected "
 		      "reading environment; recovered successfully\n\n");
 #endif /* CFG_ENV_ADDR_REDUND */
+#ifdef CMD_SAVEENV
 	memcpy (env_ptr, (void*)flash_addr, CFG_ENV_SIZE);
+#endif
 #endif /* ! ENV_IS_EMBEDDED || CFG_ENV_ADDR_REDUND */
 }
 

common/env_nand.c

@@ -102,7 +102,7 @@ uchar env_get_char_spec (int index)
 int env_init(void)
 {
 #if defined(ENV_IS_EMBEDDED)
-	ulong total;
+	size_t total;
 	int crc1_ok = 0, crc2_ok = 0;
 	env_t *tmp_env1, *tmp_env2;
 
@@ -188,7 +188,7 @@ int saveenv(void)
 #else /* ! CFG_ENV_OFFSET_REDUND */
 int saveenv(void)
 {
-	ulong total;
+	size_t total;
 	int ret = 0;
 
 	puts ("Erasing Nand...");
@@ -268,7 +268,7 @@ void env_relocate_spec (void)
 void env_relocate_spec (void)
 {
 #if !defined(ENV_IS_EMBEDDED)
-	ulong total;
+	size_t total;
 	int ret;
 
 	total = CFG_ENV_SIZE;

common/env_nvram.c

@@ -63,8 +63,6 @@ char * env_name_spec = "NVRAM";
 extern uchar default_environment[];
 extern int default_environment_size;
 
-extern uchar env_get_char_memory (int index);
-
 #ifdef CONFIG_AMIGAONEG3SE
 uchar env_get_char_spec (int index)
 {

common/ft_build.c

@@ -396,7 +396,6 @@ void *ft_get_prop(void *bphp, const char *propname, int *szp)
 
 /********************************************************************/
 
-
 void ft_setup(void *blob, bd_t * bd, ulong initrd_start, ulong initrd_end)
 {
 	u32 *p;

common/image.c

@@ -23,7 +23,6 @@
  * MA 02111-1307 USA
  */
 
-
 #ifndef USE_HOSTCC
 #include <common.h>
 #include <watchdog.h>
@@ -36,10 +35,6 @@
 #include <dataflash.h>
 #endif
 
-#ifdef CONFIG_LOGBUFFER
-#include <logbuff.h>
-#endif
-
 #if defined(CONFIG_TIMESTAMP) || defined(CONFIG_CMD_DATE)
 #include <rtc.h>
 #endif
@@ -93,6 +88,7 @@ static table_entry_t uimage_arch[] = {
 	{	IH_ARCH_MIPS64,		"mips64",	"MIPS 64 Bit",	},
 	{	IH_ARCH_NIOS,		"nios",		"NIOS",		},
 	{	IH_ARCH_NIOS2,		"nios2",	"NIOS II",	},
+	{	IH_ARCH_PPC,		"powerpc",	"PowerPC",	},
 	{	IH_ARCH_PPC,		"ppc",		"PowerPC",	},
 	{	IH_ARCH_S390,		"s390",		"IBM S390",	},
 	{	IH_ARCH_SH,		"sh",		"SuperH",	},
@@ -241,7 +237,7 @@ void image_multi_getimg (image_header_t *hdr, ulong idx,
 {
 	int i;
 	uint32_t *size;
-	ulong offset, tail, count, img_data;
+	ulong offset, count, img_data;
 
 	/* get number of component */
 	count = image_multi_count (hdr);
@@ -257,19 +253,15 @@ void image_multi_getimg (image_header_t *hdr, ulong idx,
 	if (idx < count) {
 		*len = uimage_to_cpu (size[idx]);
 		offset = 0;
-		tail = 0;
 
 		/* go over all indices preceding requested component idx */
 		for (i = 0; i < idx; i++) {
-			/* add up i-th component size */
-			offset += uimage_to_cpu (size[i]);
-
-			/* add up alignment for i-th component */
-			tail += (4 - uimage_to_cpu (size[i]) % 4);
+			/* add up i-th component size, rounding up to 4 bytes */
+			offset += (uimage_to_cpu (size[i]) + 3) & ~3 ;
 		}
 
 		/* calculate idx-th component data address */
-		*data = img_data + offset + tail;
+		*data = img_data + offset;
 	} else {
 		*len = 0;
 		*data = 0;

common/main.c

@@ -40,7 +40,7 @@
 
 #include <post.h>
 
-#if defined(CONFIG_SILENT_CONSOLE) || defined(CONFIG_POST)
+#if defined(CONFIG_SILENT_CONSOLE) || defined(CONFIG_POST) || defined(CONFIG_CMDLINE_EDITING)
 DECLARE_GLOBAL_DATA_PTR;
 #endif
 
@@ -67,11 +67,9 @@ static int abortboot(int);
 
 char        console_buffer[CFG_CBSIZE];		/* console I/O buffer	*/
 
-#ifndef CONFIG_CMDLINE_EDITING
 static char * delete_char (char *buffer, char *p, int *colp, int *np, int plen);
 static char erase_seq[] = "\b \b";		/* erase sequence	*/
 static char   tab_seq[] = "        ";		/* used to expand TABs	*/
-#endif /* CONFIG_CMDLINE_EDITING */
 
 #ifdef CONFIG_BOOT_RETRY_TIME
 static uint64_t endtime = 0;  /* must be set, default is instant timeout */
@@ -947,11 +945,26 @@ int readline_into_buffer (const char *const prompt, char * buffer)
 		initted = 1;
 	}
 
-	puts (prompt);
 
-	rc = cread_line(prompt, p, &len);
-	return rc < 0 ? rc : len;
-#else
+	/*
+	 * History uses a global array which is not
+	 * writable until after relocation to RAM.
+	 * Revert to non-history version if still
+	 * running from flash.
+	 */
+	if (gd->flags & GD_FLG_RELOC) {
+		if (!initted) {
+			hist_init();
+			initted = 1;
+		}
+
+		puts (prompt);
+
+		rc = cread_line(prompt, p, &len);
+		return rc < 0 ? rc : len;
+
+	} else {
+#endif	/* CONFIG_CMDLINE_EDITING */
 	char * p_buf = p;
 	int	n = 0;				/* buffer index		*/
 	int	plen = 0;			/* prompt length	*/
@@ -1047,12 +1060,13 @@ int readline_into_buffer (const char *const prompt, char * buffer)
 			}
 		}
 	}
-#endif /* CONFIG_CMDLINE_EDITING */
+#ifdef CONFIG_CMDLINE_EDITING
+	}
+#endif
 }
 
 /****************************************************************************/
 
-#ifndef CONFIG_CMDLINE_EDITING
 static char * delete_char (char *buffer, char *p, int *colp, int *np, int plen)
 {
 	char *s;
@@ -1082,7 +1096,6 @@ static char * delete_char (char *buffer, char *p, int *colp, int *np, int plen)
 	(*np)--;
 	return (p);
 }
-#endif /* CONFIG_CMDLINE_EDITING */
 
 /****************************************************************************/
 

config.mk

@@ -69,27 +69,6 @@ PLATFORM_CPPFLAGS+= -D__ARM__
 endif
 endif
 
-# Load generated board configuration
-sinclude $(OBJTREE)/include/autoconf.mk
-
-ifdef	ARCH
-sinclude $(TOPDIR)/$(ARCH)_config.mk	# include architecture dependend rules
-endif
-ifdef	CPU
-sinclude $(TOPDIR)/cpu/$(CPU)/config.mk	# include  CPU	specific rules
-endif
-ifdef	SOC
-sinclude $(TOPDIR)/cpu/$(CPU)/$(SOC)/config.mk	# include  SoC	specific rules
-endif
-ifdef	VENDOR
-BOARDDIR = $(VENDOR)/$(BOARD)
-else
-BOARDDIR = $(BOARD)
-endif
-ifdef	BOARD
-sinclude $(TOPDIR)/board/$(BOARDDIR)/config.mk	# include board specific rules
-endif
-
 #########################################################################
 
 CONFIG_SHELL	:= $(shell if [ -x "$$BASH" ]; then echo $$BASH; \
@@ -127,6 +106,31 @@ OBJCOPY = $(CROSS_COMPILE)objcopy
 OBJDUMP = $(CROSS_COMPILE)objdump
 RANLIB	= $(CROSS_COMPILE)RANLIB
 
+#########################################################################
+
+# Load generated board configuration
+sinclude $(OBJTREE)/include/autoconf.mk
+
+ifdef	ARCH
+sinclude $(TOPDIR)/$(ARCH)_config.mk	# include architecture dependend rules
+endif
+ifdef	CPU
+sinclude $(TOPDIR)/cpu/$(CPU)/config.mk	# include  CPU	specific rules
+endif
+ifdef	SOC
+sinclude $(TOPDIR)/cpu/$(CPU)/$(SOC)/config.mk	# include  SoC	specific rules
+endif
+ifdef	VENDOR
+BOARDDIR = $(VENDOR)/$(BOARD)
+else
+BOARDDIR = $(BOARD)
+endif
+ifdef	BOARD
+sinclude $(TOPDIR)/board/$(BOARDDIR)/config.mk	# include board specific rules
+endif
+
+#########################################################################
+
 ifneq (,$(findstring s,$(MAKEFLAGS)))
 ARFLAGS = cr
 else

cpu/74xx_7xx/cache.S

@@ -329,14 +329,28 @@ _GLOBAL(dcache_status)
 	blr
 
 /*
- * Invalidate L2 cache using L2I and polling L2IP
+ * Invalidate L2 cache using L2I and polling L2IP or L2I
  */
 _GLOBAL(l2cache_invalidate)
 	sync
+	mfspr r3, l2cr
 	oris	r3, r3, L2CR_L2I@h
 	sync
 	mtspr	l2cr, r3
 	sync
+	mfspr r3, PVR
+	sync
+	rlwinm r3, r3, 16,16,31
+	cmpli 0,r3,0x8000  /* 7451, 7441 */
+	beq 0,inv_7450
+	cmpli 0,r3,0x8001  /* 7455, 7445 */
+	beq 0,inv_7450
+	cmpli 0,r3,0x8002  /* 7457, 7447 */
+	beq 0,inv_7450
+	cmpli 0,r3,0x8003  /* 7447A */
+	beq 0,inv_7450
+	cmpli 0,r3,0x8004  /* 7448 */
+	beq 0,inv_7450
 invl2:
 	mfspr	r3, l2cr
 	andi.	r3, r3, L2CR_L2IP
@@ -348,6 +362,11 @@ invl2:
 	mtspr	l2cr, r3
 	sync
 	blr
+inv_7450:
+	mfspr	r3, l2cr
+	andis. r3, r3, L2CR_L2I@h
+	bne inv_7450
+	blr
 
 /*
  * Enable L2 cache

cpu/arm1136/mx31/generic.c

@@ -39,7 +39,7 @@ static u32 mx31_decode_pll(u32 reg, u32 infreq)
 		(mfd * pd)) << 10;
 }
 
-u32 mx31_get_mpl_dpdgck_clk(void)
+static u32 mx31_get_mpl_dpdgck_clk(void)
 {
 	u32 infreq;
 
@@ -51,7 +51,7 @@ u32 mx31_get_mpl_dpdgck_clk(void)
 	return mx31_decode_pll(__REG(CCM_MPCTL), infreq);
 }
 
-u32 mx31_get_mcu_main_clk(void)
+static u32 mx31_get_mcu_main_clk(void)
 {
 	/* For now we assume mpl_dpdgck_clk == mcu_main_clk
 	 * which should be correct for most boards

cpu/arm920t/s3c24x0/usb.c

@@ -69,4 +69,4 @@ int usb_cpu_init_fail (void)
 }
 
 # endif /* defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410) */
-#endif /* defined(CONFIG_USB_OHCI) && defined(CFG_USB_OHCI_CPU_INIT) */
+#endif /* defined(CONFIG_USB_OHCI_NEW) && defined(CFG_USB_OHCI_CPU_INIT) */

cpu/arm926ejs/at91sam9/Makefile

@@ -1,6 +1,6 @@
 #
 # (C) Copyright 2000-2008
-# Wolfgang Denk, DENX Software Engineering, wd <at> denx.de.
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 #
 # See file CREDITS for list of people who contributed to this
 # project.

cpu/arm926ejs/at91sam9/ether.c

@@ -1,6 +1,6 @@
 /*
  * (C) Copyright 2007-2008
- * Stelian Pop <stelian.pop <at> leadtechdesign.com>
+ * Stelian Pop <stelian.pop@leadtechdesign.com>
  * Lead Tech Design <www.leadtechdesign.com>
  *
  * See file CREDITS for list of people who contributed to this

cpu/arm926ejs/at91sam9/lowlevel_init.S

@@ -2,7 +2,7 @@
  * AT91CAP9/SAM9 setup stuff
  *
  * (C) Copyright 2007-2008
- * Stelian Pop <stelian.pop <at> leadtechdesign.com>
+ * Stelian Pop <stelian.pop@leadtechdesign.com>
  * Lead Tech Design <www.leadtechdesign.com>
  *
  * See file CREDITS for list of people who contributed to this

cpu/arm926ejs/at91sam9/timer.c

@@ -1,6 +1,6 @@
 /*
  * (C) Copyright 2007-2008
- * Stelian Pop <stelian.pop <at> leadtechdesign.com>
+ * Stelian Pop <stelian.pop@leadtechdesign.com>
  * Lead Tech Design <www.leadtechdesign.com>
  *
  * See file CREDITS for list of people who contributed to this

cpu/arm926ejs/at91sam9/usb.c

@@ -1,6 +1,6 @@
 /*
  * (C) Copyright 2006
- * DENX Software Engineering <mk <at> denx.de>
+ * DENX Software Engineering <mk@denx.de>
  *
  * See file CREDITS for list of people who contributed to this
  * project.

cpu/i386/start.S

@@ -55,7 +55,7 @@ early_board_init_ret:
 	/* so we try to indicate progress */
 	movw	$0x01, %ax
 	movl	$.progress0, %ebp
-	jmp	__show_boot_progress
+	jmp	show_boot_progress
 .progress0:
 
 	/* size memory */
@@ -74,7 +74,7 @@ mem_init_ret:
 	/* indicate (lack of) progress */
 	movw	$0x81, %ax
 	movl	$.progress0a, %ebp
-	jmp	__show_boot_progress
+	jmp	show_boot_progress
 .progress0a:
 	jmp 	die
 mem_ok:
@@ -82,7 +82,7 @@ mem_ok:
 	/* indicate progress */
 	movw	$0x02, %ax
 	movl	$.progress1, %ebp
-	jmp	__show_boot_progress
+	jmp	show_boot_progress
 .progress1:
 
 	/* create a stack after the bss */
@@ -104,7 +104,7 @@ no_stack:
 	/* indicate (lack of) progress */
 	movw	$0x82, %ax
 	movl	$.progress1a, %ebp
-	jmp	__show_boot_progress
+	jmp	show_boot_progress
 .progress1a:
 	jmp die
 
@@ -113,7 +113,7 @@ stack_ok:
 	/* indicate progress */
 	movw	$0x03, %ax
 	movl	$.progress2, %ebp
-	jmp	__show_boot_progress
+	jmp	show_boot_progress
 .progress2:
 
 	/* copy data section to ram, size must be 4-byte aligned */
@@ -136,7 +136,7 @@ data_fail:
 	/* indicate (lack of) progress */
 	movw	$0x83, %ax
 	movl	$.progress2a, %ebp
-	jmp	__show_boot_progress
+	jmp	show_boot_progress
 .progress2a:
 	jmp 	die
 
@@ -145,7 +145,7 @@ data_ok:
 	/* indicate progress */
 	movw	$0x04, %ax
 	movl	$.progress3, %ebp
-	jmp	__show_boot_progress
+	jmp	show_boot_progress
 .progress3:
 
 	/* clear bss section in ram, size must be 4-byte aligned  */
@@ -168,7 +168,7 @@ bss_fail:
 	/* indicate (lack of) progress */
 	movw	$0x84, %ax
 	movl	$.progress3a, %ebp
-	jmp	__show_boot_progress
+	jmp	show_boot_progress
 .progress3a:
 	jmp 	die
 
@@ -180,7 +180,7 @@ bss_ok:
 	/* indicate progress */
 	movw	$0x05, %ax
 	movl	$.progress4, %ebp
-	jmp	__show_boot_progress
+	jmp	show_boot_progress
 .progress4:
 
 	call	start_i386boot  /* Enter, U-boot! */
@@ -188,7 +188,7 @@ bss_ok:
 	/* indicate (lack of) progress */
 	movw	$0x85, %ax
 	movl	$.progress4a, %ebp
-	jmp	__show_boot_progress
+	jmp	show_boot_progress
 .progress4a:
 
 die:	hlt

cpu/mips/cache.S

@@ -240,14 +240,16 @@ NESTED(mips_cache_reset, 0, ra)
 	 */
 	move	a1, t2
 	move	a2, t4
-	bal	mips_init_icache
+	PTR_LA	t7, mips_init_icache
+	jalr	t7
 
 	/*
 	 * then initialize D-cache.
 	 */
 	move	a1, t3
 	move	a2, t5
-	bal	mips_init_dcache
+	PTR_LA	t7, mips_init_dcache
+	jalr	t7
 
 	jr	RA
 	END(mips_cache_reset)
@@ -285,6 +287,22 @@ LEAF(dcache_disable)
 	jr	ra
 	END(dcache_disable)
 
+/*******************************************************************************
+*
+* dcache_enable - enable cache
+*
+* RETURNS: N/A
+*
+*/
+LEAF(dcache_enable)
+	mfc0	t0, CP0_CONFIG
+	ori	t0, CONF_CM_CMASK
+	xori	t0, CONF_CM_CMASK
+	ori	t0, CONF_CM_CACHABLE_NONCOHERENT
+	mtc0	t0, CP0_CONFIG
+	jr	ra
+	END(dcache_enable)
+
 #ifdef CFG_INIT_RAM_LOCK_MIPS
 /*******************************************************************************
 *

cpu/mips/config.mk

@@ -20,7 +20,7 @@
 # Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 # MA 02111-1307 USA
 #
-v=$(shell $(AS) --version |grep "GNU assembler" |cut -d. -f2)
+v=$(shell $(AS) --version | grep 'GNU assembler' | egrep -o '2\.[0-9\.]+' | cut -d. -f2)
 MIPSFLAGS:=$(shell \
 if [ "$v" -lt "14" ]; then \
 	echo "-mcpu=4kc"; \

cpu/mips/start.S

@@ -345,7 +345,8 @@ relocate_code:
 	jr	t0
 	nop
 
-	.gpword	_GLOBAL_OFFSET_TABLE_	/* _GLOBAL_OFFSET_TABLE_ - _gp	*/
+	.word 	_gp
+	.word	_GLOBAL_OFFSET_TABLE_
 	.word	uboot_end_data
 	.word	uboot_end
 	.word	num_got_entries
@@ -358,8 +359,10 @@ in_ram:
 	 * generated by GNU ld. Skip these reserved entries from relocation.
 	 */
 	lw	t3, -4(t0)	/* t3 <-- num_got_entries	*/
-	lw	t4, -16(t0)	/* t4 <-- (_GLOBAL_OFFSET_TABLE_ - _gp)	*/
-	add	t4, t4, gp	/* t4 now holds _GLOBAL_OFFSET_TABLE_	*/
+	lw	t4, -16(t0)	/* t4 <-- _GLOBAL_OFFSET_TABLE_	*/
+	lw	t5, -20(t0)	/* t5 <-- _gp	*/
+	sub	t4, t5		/* compute offset*/
+	add	t4, t4, gp	/* t4 now holds relocated _GLOBAL_OFFSET_TABLE_	*/
 	addi	t4, t4, 8	/* Skipping first two entries.	*/
 	li	t2, 2
 1:

cpu/mpc86xx/cache.S

@@ -338,7 +338,7 @@ _GLOBAL(l2cache_invalidate)
 
 invl2:
 	mfspr	r3, l2cr
-	andi.	r3, r3, L2CR_L2I@h
+	andis.	r3, r3, L2CR_L2I@h
 	bne	invl2
 	blr
 

cpu/mpc86xx/speed.c

@@ -105,8 +105,20 @@ int get_clocks(void)
 	get_sys_info(&sys_info);
 	gd->cpu_clk = sys_info.freqProcessor;
 	gd->bus_clk = sys_info.freqSystemBus;
+
+	/*
+	 * The base clock for I2C depends on the actual SOC.  Unfortunately,
+	 * there is no pattern that can be used to determine the frequency, so
+	 * the only choice is to look up the actual SOC number and use the value
+	 * for that SOC. This information is taken from application note
+	 * AN2919.
+	 */
+#ifdef CONFIG_MPC8610
 	gd->i2c1_clk = sys_info.freqSystemBus;
-	gd->i2c2_clk = sys_info.freqSystemBus;
+#else
+	gd->i2c1_clk = sys_info.freqSystemBus / 2;
+#endif
+	gd->i2c2_clk = gd->i2c1_clk;
 
 	if (gd->cpu_clk != 0)
 		return 0;

cpu/ppc4xx/44x_spd_ddr2.c

@@ -1,7 +1,10 @@
 /*
  * cpu/ppc4xx/44x_spd_ddr2.c
  * This SPD SDRAM detection code supports AMCC PPC44x cpu's with a
- * DDR2 controller (non Denali Core). Those are 440SP/SPe.
+ * DDR2 controller (non Denali Core). Those currently are:
+ *
+ * 405:		405EX
+ * 440/460:	440SP/440SPe/460EX/460GT
  *
  * (C) Copyright 2007-2008
  * Stefan Roese, DENX Software Engineering, sr@denx.de.
@@ -2078,7 +2081,7 @@ static void program_bxcf(unsigned long *dimm_populated,
 				if (num_banks == 4)
 					ind = 0;
 				else
-					ind = 5;
+					ind = 5 << 8;
 				switch (num_col_addr) {
 				case 0x08:
 					mode |= (SDRAM_BXCF_M_AM_0 + ind);

cpu/ppc4xx/cpu.c

@@ -346,6 +346,26 @@ int checkcpu (void)
 		strcpy(addstr, "No Security support");
 		break;
 
+	case PVR_405EX1_RC:
+		puts("EX Rev. C");
+		strcpy(addstr, "Security support");
+		break;
+
+	case PVR_405EX2_RC:
+		puts("EX Rev. C");
+		strcpy(addstr, "No Security support");
+		break;
+
+	case PVR_405EXR1_RC:
+		puts("EXr Rev. C");
+		strcpy(addstr, "Security support");
+		break;
+
+	case PVR_405EXR2_RC:
+		puts("EXr Rev. C");
+		strcpy(addstr, "No Security support");
+		break;
+
 #if defined(CONFIG_440)
 	case PVR_440GP_RB:
 		puts("GP Rev. B");

cpu/ppc4xx/fdt.c

@@ -1,5 +1,5 @@
 /*
- * (C) Copyright 2007
+ * (C) Copyright 2007-2008
  * Stefan Roese, DENX Software Engineering, sr@denx.de.
  *
  * See file CREDITS for list of people who contributed to this
@@ -27,7 +27,7 @@
 #include <asm/cache.h>
 #include <ppc4xx.h>
 
-#if defined(CONFIG_OF_LIBFDT)
+#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
 #include <libfdt.h>
 #include <libfdt_env.h>
 #include <fdt_support.h>
@@ -35,6 +35,26 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+void __ft_board_setup(void *blob, bd_t *bd)
+{
+	u32 val[4];
+	int rc;
+
+	ft_cpu_setup(blob, bd);
+
+	/* Fixup NOR mapping */
+	val[0] = 0;				/* chip select number */
+	val[1] = 0;				/* always 0 */
+	val[2] = gd->bd->bi_flashstart;
+	val[3] = gd->bd->bi_flashsize;
+	rc = fdt_find_and_setprop(blob, "/plb/opb/ebc", "ranges",
+				  val, sizeof(val), 1);
+	if (rc)
+		printf("Unable to update property NOR mapping, err=%s\n",
+		       fdt_strerror(rc));
+}
+void ft_board_setup(void *blob, bd_t *bd) __attribute__((weak, alias("__ft_board_setup")));
+
 /*
  * Fixup all PCIe nodes by setting the device_type property
  * to "pci-endpoint" instead is "pci" for endpoint ports.
@@ -109,4 +129,4 @@ void ft_cpu_setup(void *blob, bd_t *bd)
 	 */
 	fdt_pcie_setup(blob);
 }
-#endif /* CONFIG_OF_LIBFDT */
+#endif /* CONFIG_OF_LIBFDT && CONFIG_OF_BOARD_SETUP */

cpu/ppc4xx/speed.c

@@ -238,7 +238,7 @@ static u8 pll_fbdv_multi_bits[] = {
 	/* values for:  101 - 200 */
 	0x78, 0xf1, 0x62, 0xc5, 0x0a, 0x94, 0x28, 0xd0, 0x21, 0xc3,
 	0x06, 0x8c, 0x18, 0xb0, 0x60, 0xc1, 0x02, 0x84, 0x08, 0x90,
-	0x20, 0xc0, 0x01, 0x83, 0x77, 0xff, 0x1f, 0xbf, 0x7f, 0xfe,
+	0x20, 0xc0, 0x01, 0x83, 0x07, 0x8f, 0x1f, 0xbf, 0x7f, 0xfe,
 	0x7d, 0xfa, 0x75, 0xea, 0x55, 0xaa, 0x54, 0xa9, 0x53, 0xa6,
 	0x4c, 0x99, 0x33, 0xe7, 0x4e, 0x9d, 0x3b, 0xf7, 0x6e, 0xdd,
 	0x3a, 0xf4, 0x69, 0xd2, 0x25, 0xcb, 0x16, 0xac, 0x58, 0xb1,

cpu/pxa/start.S

@@ -166,17 +166,13 @@ _start_armboot: .word start_armboot
 /*									    */
 /****************************************************************************/
 /* mk@tbd: Fix this! */
-#if defined(CONFIG_PXA250) || defined(CONFIG_CPU_MONAHANS)
+#undef RCSR
 #undef ICMR
 #undef OSMR3
 #undef OSCR
 #undef OWER
 #undef OIER
-#endif /* CONFIG_PXA250 || CONFIG_CPU_MONAHANS */
-#ifdef CONFIG_PXA250
-#undef RCSR
 #undef CCCR
-#endif /* CONFIG_PXA250 */
 
 /* Interrupt-Controller base address					    */
 IC_BASE:	   .word	   0x40d00000

disk/part.c

@@ -109,44 +109,45 @@ void dev_print (block_dev_desc_t *dev_desc)
 	lbaint_t lba512;
 #endif
 
-	if (dev_desc->type==DEV_TYPE_UNKNOWN) {
-		puts ("not available\n");
-		return;
-	}
-	if (dev_desc->if_type==IF_TYPE_SCSI)  {
-		printf ("(%d:%d) ", dev_desc->target,dev_desc->lun);
-	}
-	if (dev_desc->if_type==IF_TYPE_IDE) {
-		printf ("Model: %s Firm: %s Ser#: %s\n",
-			dev_desc->vendor,
-			dev_desc->revision,
-			dev_desc->product);
-	}
-	if (dev_desc->if_type==IF_TYPE_SATA) {
-		printf ("Model: %s Firm: %s Ser#: %s\n",
-			dev_desc->vendor,
-			dev_desc->revision,
-			dev_desc->product);
-	} else {
-		printf ("Vendor: %s Prod.: %s Rev: %s\n",
+	switch (dev_desc->type) {
+	case IF_TYPE_SCSI:
+		printf ("(%d:%d) Vendor: %s Prod.: %s Rev: %s\n",
+			dev_desc->target,dev_desc->lun,
 			dev_desc->vendor,
 			dev_desc->product,
 			dev_desc->revision);
+		break;
+	case IF_TYPE_IDE:
+	case IF_TYPE_SATA:
+		printf ("Model: %s Firm: %s Ser#: %s\n",
+			dev_desc->vendor,
+			dev_desc->revision,
+			dev_desc->product);
+		break;
+	case DEV_TYPE_UNKNOWN:
+	default:
+		puts ("not available\n");
+		return;
 	}
 	puts ("            Type: ");
 	if (dev_desc->removable)
 		puts ("Removable ");
 	switch (dev_desc->type & 0x1F) {
-		case DEV_TYPE_HARDDISK: puts ("Hard Disk");
-					break;
-		case DEV_TYPE_CDROM: 	puts ("CD ROM");
-					break;
-		case DEV_TYPE_OPDISK: 	puts ("Optical Device");
-					break;
-		case DEV_TYPE_TAPE: 	puts ("Tape");
-					break;
-		default:		printf ("# %02X #", dev_desc->type & 0x1F);
-					break;
+	case DEV_TYPE_HARDDISK:
+		puts ("Hard Disk");
+		break;
+	case DEV_TYPE_CDROM:
+		puts ("CD ROM");
+		break;
+	case DEV_TYPE_OPDISK:
+		puts ("Optical Device");
+		break;
+	case DEV_TYPE_TAPE:
+		puts ("Tape");
+		break;
+	default:
+		printf ("# %02X #", dev_desc->type & 0x1F);
+		break;
 	}
 	puts ("\n");
 	if ((dev_desc->lba * dev_desc->blksz)>0L) {
@@ -281,20 +282,27 @@ static void print_part_header (const char *type, block_dev_desc_t * dev_desc)
 {
 	puts ("\nPartition Map for ");
 	switch (dev_desc->if_type) {
-		case IF_TYPE_IDE:  	puts ("IDE");
-					break;
-		case IF_TYPE_SATA:	puts ("SATA");
-					break;
-		case IF_TYPE_SCSI: 	puts ("SCSI");
-					break;
-		case IF_TYPE_ATAPI:	puts ("ATAPI");
-					break;
-		case IF_TYPE_USB:	puts ("USB");
-					break;
-		case IF_TYPE_DOC:	puts ("DOC");
-					break;
-		default: 		puts ("UNKNOWN");
-					break;
+	case IF_TYPE_IDE:
+		puts ("IDE");
+		break;
+	case IF_TYPE_SATA:
+		puts ("SATA");
+		break;
+	case IF_TYPE_SCSI:
+		puts ("SCSI");
+		break;
+	case IF_TYPE_ATAPI:
+		puts ("ATAPI");
+		break;
+	case IF_TYPE_USB:
+		puts ("USB");
+		break;
+	case IF_TYPE_DOC:
+		puts ("DOC");
+		break;
+	default:
+		puts ("UNKNOWN");
+		break;
 	}
 	printf (" device %d  --   Partition Type: %s\n\n",
 			dev_desc->dev, type);

doc/README.nand-boot-ppc440

@@ -9,7 +9,7 @@ The PPC440EP(x)/GR(x) cpu's can boot directly from NAND FLASH,
 completely without NOR FLASH. This can be done by using the NAND
 boot feature of the 440 NAND flash controller (NDFC).
 
-Here a short desciption of the different boot stages:
+Here a short description of the different boot stages:
 
 a) IPL (Initial Program Loader, integrated inside CPU)
 ------------------------------------------------------

doc/README.qemu_mips

@@ -0,0 +1,18 @@
+
+Notes for the Qemu MIPS port
+
+Example usage:
+
+# ln -s u-boot.bin mips_bios.bin
+start it:
+qemu-system-mips -L . /dev/null -nographic
+
+or
+
+if you use a qemu version after commit 4224
+
+create image:
+# dd of=flash bs=1k count=4k if=/dev/zero
+# dd of=flash bs=1k conv=notrunc if=u-boot.bin
+start it:
+# qemu-system-mips -pflash flash -monitor null -nographic

drivers/mtd/onenand/onenand_base.c

@@ -21,7 +21,7 @@
 #include <asm/errno.h>
 
 /* It should access 16-bit instead of 8-bit */
-static inline void *memcpy(void *dst, const void *src, unsigned int len)
+static inline void *memcpy_16(void *dst, const void *src, unsigned int len)
 {
 	void *ret = dst;
 	short *d = dst;
@@ -358,7 +358,7 @@ static int onenand_read_bufferram(struct mtd_info *mtd, int area,
 	bufferram = this->base + area;
 	bufferram += onenand_bufferram_offset(mtd, area);
 
-	memcpy(buffer, bufferram + offset, count);
+	memcpy_16(buffer, bufferram + offset, count);
 
 	return 0;
 }
@@ -385,7 +385,7 @@ static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
 
 	this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
 
-	memcpy(buffer, bufferram + offset, count);
+	memcpy_16(buffer, bufferram + offset, count);
 
 	this->mmcontrol(mtd, 0);
 
@@ -412,7 +412,7 @@ static int onenand_write_bufferram(struct mtd_info *mtd, int area,
 	bufferram = this->base + area;
 	bufferram += onenand_bufferram_offset(mtd, area);
 
-	memcpy(bufferram + offset, buffer, count);
+	memcpy_16(bufferram + offset, buffer, count);
 
 	return 0;
 }

drivers/net/fsl_mcdmafec.c

@@ -95,7 +95,11 @@ struct fec_info_dma fec_info[] = {
 	 0,			/* duplex and speed */
 	 0,			/* phy name */
 	 0,			/* phy name init */
+#ifdef CFG_DMA_USE_INTSRAM
+	 DBUF_LENGTH,		/* RX BD */
+#else
 	 0,			/* RX BD */
+#endif
 	 0,			/* TX BD */
 	 0,			/* rx Index */
 	 0,			/* tx Index */
@@ -164,7 +168,8 @@ static void dbg_fec_regs(struct eth_device *dev)
 }
 #endif
 
-static void set_fec_duplex_speed(volatile fecdma_t * fecp, bd_t * bd, int dup_spd)
+static void set_fec_duplex_speed(volatile fecdma_t * fecp, bd_t * bd,
+				 int dup_spd)
 {
 	if ((dup_spd >> 16) == FULL) {
 		/* Set maximum frame length */
@@ -513,6 +518,9 @@ int mcdmafec_initialize(bd_t * bis)
 {
 	struct eth_device *dev;
 	int i;
+#ifdef CFG_DMA_USE_INTSRAM
+	u32 tmp = CFG_INTSRAM + 0x2000;
+#endif
 
 	for (i = 0; i < sizeof(fec_info) / sizeof(fec_info[0]); i++) {
 
@@ -533,6 +541,17 @@ int mcdmafec_initialize(bd_t * bis)
 		dev->recv = fec_recv;
 
 		/* setup Receive and Transmit buffer descriptor */
+#ifdef CFG_DMA_USE_INTSRAM
+		fec_info[i].rxbd = (int)fec_info[i].rxbd + tmp;
+		tmp = fec_info[i].rxbd;
+		fec_info[i].txbd =
+		    (int)fec_info[i].txbd + tmp + (PKTBUFSRX * sizeof(cbd_t));
+		tmp = fec_info[i].txbd;
+		fec_info[i].txbuf =
+		    (int)fec_info[i].txbuf + tmp +
+		    (CFG_TX_ETH_BUFFER * sizeof(cbd_t));
+		tmp = fec_info[i].txbuf;
+#else
 		fec_info[i].rxbd =
 		    (cbd_t *) memalign(CFG_CACHELINE_SIZE,
 				       (PKTBUFSRX * sizeof(cbd_t)));
@@ -541,6 +560,7 @@ int mcdmafec_initialize(bd_t * bis)
 				       (CFG_TX_ETH_BUFFER * sizeof(cbd_t)));
 		fec_info[i].txbuf =
 		    (char *)memalign(CFG_CACHELINE_SIZE, DBUF_LENGTH);
+#endif
 
 #ifdef ET_DEBUG
 		printf("rxbd %x txbd %x\n",

drivers/net/smc911x.c

@@ -1,7 +1,7 @@
 /*
  * SMSC LAN9[12]1[567] Network driver
  *
- * (c) 2007 Pengutronix, Sascha Hauer <s.hauer <at> pengutronix.de>
+ * (c) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
  *
  * See file CREDITS for list of people who contributed to this
  * project.

drivers/net/tsec.c

@@ -1277,6 +1277,12 @@ struct phy_info phy_info_VSC8601 = {
 				{MIIM_CONTROL, MIIM_CONTROL_INIT, &mii_cr_init},
 #ifdef CFG_VSC8601_SKEWFIX
 				{MIIM_VSC8601_EPHY_CON,MIIM_VSC8601_EPHY_CON_INIT_SKEW,NULL},
+#if defined(CFG_VSC8601_SKEW_TX) && defined(CFG_VSC8601_SKEW_RX)
+				{MIIM_EXT_PAGE_ACCESS,1,NULL},
+#define VSC8101_SKEW	(CFG_VSC8601_SKEW_TX<<14)|(CFG_VSC8601_SKEW_RX<<12)
+				{MIIM_VSC8601_SKEW_CTRL,VSC8101_SKEW,NULL},
+				{MIIM_EXT_PAGE_ACCESS,0,NULL},
+#endif
 #endif
 				{miim_end,}
 				 },

drivers/net/tsec.h

@@ -112,6 +112,8 @@
 #define MIIM_GBIT_CONTROL	0x9
 #define MIIM_GBIT_CONTROL_INIT	0xe00
 
+#define MIIM_EXT_PAGE_ACCESS	0x1f
+
 /* Broadcom BCM54xx -- taken from linux sungem_phy */
 #define MIIM_BCM54xx_AUXSTATUS			0x19
 #define MIIM_BCM54xx_AUXSTATUS_LINKMODE_MASK	0x0700
@@ -161,8 +163,9 @@
 
 /* Entry for Vitesse VSC8601 regs starts here (Not complete) */
 /* Vitesse VSC8601 Extended PHY Control Register 1 */
-#define MIIM_VSC8601_EPHY_CON			0x17
+#define MIIM_VSC8601_EPHY_CON		0x17
 #define MIIM_VSC8601_EPHY_CON_INIT_SKEW	0x1120
+#define MIIM_VSC8601_SKEW_CTRL		0x1c
 
 /* 88E1011 PHY Status Register */
 #define MIIM_88E1011_PHY_STATUS         0x11
@@ -177,9 +180,9 @@
 #define MIIM_88E1011_PHY_MDI_X_AUTO	0x0060
 
 /* 88E1111 PHY LED Control Register */
-#define MIIM_88E1111_PHY_LED_CONTROL   24
-#define MIIM_88E1111_PHY_LED_DIRECT    0x4100
-#define MIIM_88E1111_PHY_LED_COMBINE   0x411C
+#define MIIM_88E1111_PHY_LED_CONTROL	24
+#define MIIM_88E1111_PHY_LED_DIRECT	0x4100
+#define MIIM_88E1111_PHY_LED_COMBINE	0x411C
 
 /* 88E1145 Extended PHY Specific Control Register */
 #define MIIM_88E1145_PHY_EXT_CR 20

drivers/pci/pci.c

@@ -221,7 +221,7 @@ pci_dev_t pci_find_device(unsigned int vendor, unsigned int device, int index)
  */
 
 unsigned long pci_hose_phys_to_bus (struct pci_controller *hose,
-				    unsigned long phys_addr,
+				    phys_addr_t phys_addr,
 				    unsigned long flags)
 {
 	struct pci_region *res;
@@ -253,9 +253,9 @@ Done:
 	return 0;
 }
 
-unsigned long pci_hose_bus_to_phys(struct pci_controller* hose,
-				   unsigned long bus_addr,
-				   unsigned long flags)
+phys_addr_t pci_hose_bus_to_phys(struct pci_controller* hose,
+				 unsigned long bus_addr,
+				 unsigned long flags)
 {
 	struct pci_region *res;
 	int i;
@@ -425,9 +425,6 @@ int pci_hose_scan_bus(struct pci_controller *hose, int bus)
 	     dev <  PCI_BDF(bus,PCI_MAX_PCI_DEVICES-1,PCI_MAX_PCI_FUNCTIONS-1);
 	     dev += PCI_BDF(0,0,1))
 	{
-
-	/* Bus 0 is not necessarily PCI bridge. */
-#if defined(CONFIG_PCI_SKIP_HOST_BRIDGE)
 		/* Skip our host bridge */
 		if ( dev == PCI_BDF(hose->first_busno,0,0) ) {
 #if defined(CONFIG_PCI_CONFIG_HOST_BRIDGE)              /* don't skip host bridge */
@@ -437,11 +434,10 @@ int pci_hose_scan_bus(struct pci_controller *hose, int bus)
 			if (getenv("pciconfighost") == NULL) {
 				continue; /* Skip our host bridge */
 			}
-#else /* CONFIG_PCI_CONFIG_HOST_BRIDGE */
+#else
 			continue; /* Skip our host bridge */
-#endif /* CONFIG_PCI_CONFIG_HOST_BRIDGE */
+#endif
 		}
-#endif /* CONFIG_PCI_SKIP_HOST_BRIDGE */
 
 		if (PCI_FUNC(dev) && !found_multi)
 			continue;
@@ -477,11 +473,8 @@ int pci_hose_scan_bus(struct pci_controller *hose, int bus)
 				hose->fixup_irq(hose, dev);
 
 #ifdef CONFIG_PCI_SCAN_SHOW
-#if defined(CONFIG_PCI_SKIP_HOST_BRIDGE)
 			/* Skip our host bridge */
-			if ( dev != PCI_BDF(hose->first_busno,0,0) )
-#endif
-			{
+			if ( dev != PCI_BDF(hose->first_busno,0,0) ) {
 			    unsigned char int_line;
 
 			    pci_hose_read_config_byte(hose, dev, PCI_INTERRUPT_LINE,

drivers/pcmcia/Makefile

@@ -25,6 +25,7 @@ include $(TOPDIR)/config.mk
 
 LIB 	:= $(obj)libpcmcia.a
 
+COBJS-$(CONFIG_I82365) += i82365.o
 COBJS-y += mpc8xx_pcmcia.o
 COBJS-y += pxa_pcmcia.o
 COBJS-y += rpx_pcmcia.o

drivers/pcmcia/i82365.c

@@ -31,8 +31,6 @@
 
 #include <common.h>
 
-#ifdef CONFIG_I82365
-
 #include <command.h>
 #include <pci.h>
 #include <pcmcia.h>
@@ -1010,5 +1008,3 @@ static void i82365_dump_regions (pci_dev_t dev)
 		ide[4], ide[5], ide[6], ide[7]);
 }
 #endif	/* DEBUG */
-
-#endif /* CONFIG_I82365 */

drivers/pcmcia/pxa_pcmcia.c

@@ -35,8 +35,10 @@ int pcmcia_on (void)
 	debug ("%s\n", __FUNCTION__);
 
 	i = 0;
-	while (reg_arr[i])
-		*((volatile unsigned int *) reg_arr[i++]) |= reg_arr[i++];
+	while (reg_arr[i]) {
+		(*(volatile unsigned int *) reg_arr[i]) |= reg_arr[i + 1];
+		i += 2;
+	}
 	udelay (1000);
 
 	debug ("%s: programmed mem controller \n", __FUNCTION__);
@@ -44,7 +46,7 @@ int pcmcia_on (void)
 #ifdef CONFIG_EXADRON1
 
 /*define useful BCR masks */
-#define BCR_CF_INIT_VAL  		    0x00007230
+#define BCR_CF_INIT_VAL			    0x00007230
 #define BCR_CF_PWRON_BUSOFF_RESETOFF_VAL    0x00007231
 #define BCR_CF_PWRON_BUSOFF_RESETON_VAL     0x00007233
 #define BCR_CF_PWRON_BUSON_RESETON_VAL      0x00007213

drivers/rtc/m41t62.c

@@ -81,7 +81,7 @@ int rtc_get(struct rtc_time *tm)
 	tm->tm_hour = BCD2BIN(buf[M41T62_REG_HOUR] & 0x3f);
 	tm->tm_mday = BCD2BIN(buf[M41T62_REG_DAY] & 0x3f);
 	tm->tm_wday = buf[M41T62_REG_WDAY] & 0x07;
-	tm->tm_mon = BCD2BIN(buf[M41T62_REG_MON] & 0x1f) - 1;
+	tm->tm_mon = BCD2BIN(buf[M41T62_REG_MON] & 0x1f);
 
 	/* assume 20YY not 19YY, and ignore the Century Bit */
 	/* U-Boot needs to add 1900 here */
@@ -119,7 +119,7 @@ void rtc_set(struct rtc_time *tm)
 	buf[M41T62_REG_DAY] =
 		BIN2BCD(tm->tm_mday) | (buf[M41T62_REG_DAY] & ~0x3f);
 	buf[M41T62_REG_MON] =
-		BIN2BCD(tm->tm_mon + 1) | (buf[M41T62_REG_MON] & ~0x1f);
+		BIN2BCD(tm->tm_mon) | (buf[M41T62_REG_MON] & ~0x1f);
 	/* assume 20YY not 19YY */
 	buf[M41T62_REG_YEAR] = BIN2BCD(tm->tm_year % 100);
 

examples/.gitignore

@@ -1,5 +1,9 @@
+/82559_eeprom
 /hello_world
 /interrupt
+/mem_to_mem_idma2intr
+/test_burst
+/timer
 /sched
 /smc91111_eeprom
 *.bin

include/.gitignore

@@ -1,7 +1,7 @@
 /autoconf.mk*
 /asm
-/asm-blackfin/arch
-/asm-ppc/arch
+/asm-*/arch
+/asm-*/proc
 /bmp_logo.h
 /config.h
 /config.mk

include/asm-arm/arch-at91sam9/at91_pio.h

@@ -1,5 +1,5 @@
 /*
- * include/asm-arm/arch-at91/at91_pio.h
+ * [origin: Linux kernel include/asm-arm/arch-at91/at91_pio.h]
  *
  * Copyright (C) 2005 Ivan Kokshaysky
  * Copyright (C) SAN People

include/asm-arm/arch-at91sam9/at91_pit.h

@@ -1,5 +1,8 @@
 /*
- * include/asm-arm/arch-at91/at91_pit.h
+ * [origin: Linux kernel include/asm-arm/arch-at91/at91_pit.h]
+ *
+ * Copyright (C) 2007 Andrew Victor
+ * Copyright (C) 2007 Atmel Corporation.
  *
  * Periodic Interval Timer (PIT) - System peripherals regsters.
  * Based on AT91SAM9261 datasheet revision D.

include/asm-arm/arch-at91sam9/at91_pmc.h

@@ -1,5 +1,5 @@
 /*
- * include/asm-arm/arch-at91/at91_pmc.h
+ * [origin: Linux kernel include/asm-arm/arch-at91/at91_pmc.h]
  *
  * Copyright (C) 2005 Ivan Kokshaysky
  * Copyright (C) SAN People

include/asm-arm/arch-at91sam9/at91_rstc.h

@@ -1,5 +1,8 @@
 /*
- * include/asm-arm/arch-at91/at91_rstc.h
+ * [origin: Linux kernel include/asm-arm/arch-at91/at91_rstc.h]
+ *
+ * Copyright (C) 2007 Andrew Victor
+ * Copyright (C) 2007 Atmel Corporation.
  *
  * Reset Controller (RSTC) - System peripherals regsters.
  * Based on AT91SAM9261 datasheet revision D.

include/asm-arm/arch-at91sam9/at91_spi.h

@@ -1,5 +1,5 @@
 /*
- * include/asm-arm/arch-at91/at91_spi.h
+ * [origin: Linux kernel include/asm-arm/arch-at91/at91_spi.h]
  *
  * Copyright (C) 2005 Ivan Kokshaysky
  * Copyright (C) SAN People

include/asm-arm/arch-at91sam9/at91cap9.h

@@ -1,5 +1,5 @@
 /*
- * include/asm-arm/arch-at91/at91cap9.h
+ * [origin: Linux kernel include/asm-arm/arch-at91/at91cap9.h]
  *
  *  Copyright (C) 2007 Stelian Pop <stelian.pop@leadtechdesign.com>
  *  Copyright (C) 2007 Lead Tech Design <www.leadtechdesign.com>

include/asm-arm/arch-at91sam9/at91cap9_matrix.h

@@ -1,5 +1,5 @@
 /*
- * include/asm-arm/arch-at91/at91cap9_matrix.h
+ * [origin: Linux kernel include/asm-arm/arch-at91/at91cap9_matrix.h]
  *
  *  Copyright (C) 2007 Stelian Pop <stelian.pop@leadtechdesign.com>
  *  Copyright (C) 2007 Lead Tech Design <www.leadtechdesign.com>

include/asm-arm/arch-at91sam9/at91sam9260.h

@@ -1,5 +1,5 @@
 /*
- * include/asm-arm/arch-at91/at91sam9260.h
+ * [origin: Linux kernel include/asm-arm/arch-at91/at91sam9260.h]
  *
  * (C) 2006 Andrew Victor
  *

include/asm-arm/arch-at91sam9/at91sam9260_matrix.h

@@ -1,5 +1,7 @@
 /*
- * include/asm-arm/arch-at91/at91sam9260_matrix.h
+ * [origin: Linux kernel include/asm-arm/arch-at91/at91sam9260_matrix.h]
+ *
+ * Copyright (C) 2007 Atmel Corporation.
  *
  * Memory Controllers (MATRIX, EBI) - System peripherals registers.
  * Based on AT91SAM9260 datasheet revision B.

include/asm-arm/arch-at91sam9/at91sam926x_mc.h

@@ -1,140 +0,0 @@
-/*
- * include/asm-arm/arch-at91/at91sam926x_mc.h
- *
- * Memory Controllers (SMC, SDRAMC) - System peripherals registers.
- * Based on AT91SAM9261 datasheet revision D.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#ifndef AT91SAM926x_MC_H
-#define AT91SAM926x_MC_H
-
-/* SDRAM Controller (SDRAMC) registers */
-#define AT91_SDRAMC_MR		(AT91_SDRAMC + 0x00)	/* SDRAM Controller Mode Register */
-#define		AT91_SDRAMC_MODE	(0xf << 0)		/* Command Mode */
-#define			AT91_SDRAMC_MODE_NORMAL		0
-#define			AT91_SDRAMC_MODE_NOP		1
-#define			AT91_SDRAMC_MODE_PRECHARGE	2
-#define			AT91_SDRAMC_MODE_LMR		3
-#define			AT91_SDRAMC_MODE_REFRESH	4
-#define			AT91_SDRAMC_MODE_EXT_LMR	5
-#define			AT91_SDRAMC_MODE_DEEP		6
-
-#define AT91_SDRAMC_TR		(AT91_SDRAMC + 0x04)	/* SDRAM Controller Refresh Timer Register */
-#define		AT91_SDRAMC_COUNT	(0xfff << 0)		/* Refresh Timer Counter */
-
-#define AT91_SDRAMC_CR		(AT91_SDRAMC + 0x08)	/* SDRAM Controller Configuration Register */
-#define		AT91_SDRAMC_NC		(3 << 0)		/* Number of Column Bits */
-#define			AT91_SDRAMC_NC_8	(0 << 0)
-#define			AT91_SDRAMC_NC_9	(1 << 0)
-#define			AT91_SDRAMC_NC_10	(2 << 0)
-#define			AT91_SDRAMC_NC_11	(3 << 0)
-#define		AT91_SDRAMC_NR		(3 << 2)		/* Number of Row Bits */
-#define			AT91_SDRAMC_NR_11	(0 << 2)
-#define			AT91_SDRAMC_NR_12	(1 << 2)
-#define			AT91_SDRAMC_NR_13	(2 << 2)
-#define		AT91_SDRAMC_NB		(1 << 4)		/* Number of Banks */
-#define			AT91_SDRAMC_NB_2	(0 << 4)
-#define			AT91_SDRAMC_NB_4	(1 << 4)
-#define		AT91_SDRAMC_CAS		(3 << 5)		/* CAS Latency */
-#define			AT91_SDRAMC_CAS_1	(1 << 5)
-#define			AT91_SDRAMC_CAS_2	(2 << 5)
-#define			AT91_SDRAMC_CAS_3	(3 << 5)
-#define		AT91_SDRAMC_DBW		(1 << 7)		/* Data Bus Width */
-#define			AT91_SDRAMC_DBW_32	(0 << 7)
-#define			AT91_SDRAMC_DBW_16	(1 << 7)
-#define		AT91_SDRAMC_TWR		(0xf <<  8)		/* Write Recovery Delay */
-#define		AT91_SDRAMC_TRC		(0xf << 12)		/* Row Cycle Delay */
-#define		AT91_SDRAMC_TRP		(0xf << 16)		/* Row Precharge Delay */
-#define		AT91_SDRAMC_TRCD	(0xf << 20)		/* Row to Column Delay */
-#define		AT91_SDRAMC_TRAS	(0xf << 24)		/* Active to Precharge Delay */
-#define		AT91_SDRAMC_TXSR	(0xf << 28)		/* Exit Self Refresh to Active Delay */
-
-#define AT91_SDRAMC_LPR		(AT91_SDRAMC + 0x10)	/* SDRAM Controller Low Power Register */
-#define		AT91_SDRAMC_LPCB		(3 << 0)	/* Low-power Configurations */
-#define			AT91_SDRAMC_LPCB_DISABLE		0
-#define			AT91_SDRAMC_LPCB_SELF_REFRESH		1
-#define			AT91_SDRAMC_LPCB_POWER_DOWN		2
-#define			AT91_SDRAMC_LPCB_DEEP_POWER_DOWN	3
-#define		AT91_SDRAMC_PASR		(7 << 4)	/* Partial Array Self Refresh */
-#define		AT91_SDRAMC_TCSR		(3 << 8)	/* Temperature Compensated Self Refresh */
-#define		AT91_SDRAMC_DS			(3 << 10)	/* Drive Strenght */
-#define		AT91_SDRAMC_TIMEOUT		(3 << 12)	/* Time to define when Low Power Mode is enabled */
-#define			AT91_SDRAMC_TIMEOUT_0_CLK_CYCLES	(0 << 12)
-#define			AT91_SDRAMC_TIMEOUT_64_CLK_CYCLES	(1 << 12)
-#define			AT91_SDRAMC_TIMEOUT_128_CLK_CYCLES	(2 << 12)
-
-#define AT91_SDRAMC_IER		(AT91_SDRAMC + 0x14)	/* SDRAM Controller Interrupt Enable Register */
-#define AT91_SDRAMC_IDR		(AT91_SDRAMC + 0x18)	/* SDRAM Controller Interrupt Disable Register */
-#define AT91_SDRAMC_IMR		(AT91_SDRAMC + 0x1C)	/* SDRAM Controller Interrupt Mask Register */
-#define AT91_SDRAMC_ISR		(AT91_SDRAMC + 0x20)	/* SDRAM Controller Interrupt Status Register */
-#define		AT91_SDRAMC_RES		(1 << 0)		/* Refresh Error Status */
-
-#define AT91_SDRAMC_MDR		(AT91_SDRAMC + 0x24)	/* SDRAM Memory Device Register */
-#define		AT91_SDRAMC_MD		(3 << 0)		/* Memory Device Type */
-#define			AT91_SDRAMC_MD_SDRAM		0
-#define			AT91_SDRAMC_MD_LOW_POWER_SDRAM	1
-
-/* Static Memory Controller (SMC) registers */
-#define AT91_SMC_SETUP(n)	(AT91_SMC + 0x00 + ((n)*0x10))	/* Setup Register for CS n */
-#define		AT91_SMC_NWESETUP	(0x3f << 0)			/* NWE Setup Length */
-#define			AT91_SMC_NWESETUP_(x)	((x) << 0)
-#define		AT91_SMC_NCS_WRSETUP	(0x3f << 8)			/* NCS Setup Length in Write Access */
-#define			AT91_SMC_NCS_WRSETUP_(x)	((x) << 8)
-#define		AT91_SMC_NRDSETUP	(0x3f << 16)			/* NRD Setup Length */
-#define			AT91_SMC_NRDSETUP_(x)	((x) << 16)
-#define		AT91_SMC_NCS_RDSETUP	(0x3f << 24)			/* NCS Setup Length in Read Access */
-#define			AT91_SMC_NCS_RDSETUP_(x)	((x) << 24)
-
-#define AT91_SMC_PULSE(n)	(AT91_SMC + 0x04 + ((n)*0x10))	/* Pulse Register for CS n */
-#define		AT91_SMC_NWEPULSE	(0x7f <<  0)			/* NWE Pulse Length */
-#define			AT91_SMC_NWEPULSE_(x)	((x) << 0)
-#define		AT91_SMC_NCS_WRPULSE	(0x7f <<  8)			/* NCS Pulse Length in Write Access */
-#define			AT91_SMC_NCS_WRPULSE_(x)((x) << 8)
-#define		AT91_SMC_NRDPULSE	(0x7f << 16)			/* NRD Pulse Length */
-#define			AT91_SMC_NRDPULSE_(x)	((x) << 16)
-#define		AT91_SMC_NCS_RDPULSE	(0x7f << 24)			/* NCS Pulse Length in Read Access */
-#define			AT91_SMC_NCS_RDPULSE_(x)((x) << 24)
-
-#define AT91_SMC_CYCLE(n)	(AT91_SMC + 0x08 + ((n)*0x10))	/* Cycle Register for CS n */
-#define		AT91_SMC_NWECYCLE	(0x1ff << 0 )			/* Total Write Cycle Length */
-#define			AT91_SMC_NWECYCLE_(x)	((x) << 0)
-#define		AT91_SMC_NRDCYCLE	(0x1ff << 16)			/* Total Read Cycle Length */
-#define			AT91_SMC_NRDCYCLE_(x)	((x) << 16)
-
-#define AT91_SMC_MODE(n)	(AT91_SMC + 0x0c + ((n)*0x10))	/* Mode Register for CS n */
-#define		AT91_SMC_READMODE	(1 <<  0)			/* Read Mode */
-#define		AT91_SMC_WRITEMODE	(1 <<  1)			/* Write Mode */
-#define		AT91_SMC_EXNWMODE	(3 <<  4)			/* NWAIT Mode */
-#define			AT91_SMC_EXNWMODE_DISABLE	(0 << 4)
-#define			AT91_SMC_EXNWMODE_FROZEN	(2 << 4)
-#define			AT91_SMC_EXNWMODE_READY		(3 << 4)
-#define		AT91_SMC_BAT		(1 <<  8)			/* Byte Access Type */
-#define			AT91_SMC_BAT_SELECT		(0 << 8)
-#define			AT91_SMC_BAT_WRITE		(1 << 8)
-#define		AT91_SMC_DBW		(3 << 12)			/* Data Bus Width */
-#define			AT91_SMC_DBW_8			(0 << 12)
-#define			AT91_SMC_DBW_16			(1 << 12)
-#define			AT91_SMC_DBW_32			(2 << 12)
-#define		AT91_SMC_TDF		(0xf << 16)			/* Data Float Time. */
-#define			AT91_SMC_TDF_(x)		((x) << 16)
-#define		AT91_SMC_TDFMODE	(1 << 20)			/* TDF Optimization - Enabled */
-#define		AT91_SMC_PMEN		(1 << 24)			/* Page Mode Enabled */
-#define		AT91_SMC_PS		(3 << 28)			/* Page Size */
-#define			AT91_SMC_PS_4			(0 << 28)
-#define			AT91_SMC_PS_8			(1 << 28)
-#define			AT91_SMC_PS_16			(2 << 28)
-#define			AT91_SMC_PS_32			(3 << 28)
-
-#if defined(AT91_SMC1)		/* The AT91SAM9263 has 2 Static Memory contollers */
-#define AT91_SMC1_SETUP(n)	(AT91_SMC1 + 0x00 + ((n)*0x10))	/* Setup Register for CS n */
-#define AT91_SMC1_PULSE(n)	(AT91_SMC1 + 0x04 + ((n)*0x10))	/* Pulse Register for CS n */
-#define AT91_SMC1_CYCLE(n)	(AT91_SMC1 + 0x08 + ((n)*0x10))	/* Cycle Register for CS n */
-#define AT91_SMC1_MODE(n)	(AT91_SMC1 + 0x0c + ((n)*0x10))	/* Mode Register for CS n */
-#endif
-
-#endif

include/asm-arm/arch-at91sam9/at91sam9_smc.h

@@ -0,0 +1,76 @@
+/*
+ * [origin: Linux kernel include/asm-arm/arch-at91/at91sam9_smc.h]
+ *
+ * Copyright (C) 2007 Andrew Victor
+ * Copyright (C) 2007 Atmel Corporation.
+ *
+ * Static Memory Controllers (SMC) - System peripherals registers.
+ * Based on AT91SAM9261 datasheet revision D.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef AT91SAM9_SMC_H
+#define AT91SAM9_SMC_H
+
+#define AT91_SMC_SETUP(n)	(AT91_SMC + 0x00 + ((n)*0x10))	/* Setup Register for CS n */
+#define		AT91_SMC_NWESETUP	(0x3f << 0)			/* NWE Setup Length */
+#define			AT91_SMC_NWESETUP_(x)	((x) << 0)
+#define		AT91_SMC_NCS_WRSETUP	(0x3f << 8)			/* NCS Setup Length in Write Access */
+#define			AT91_SMC_NCS_WRSETUP_(x)	((x) << 8)
+#define		AT91_SMC_NRDSETUP	(0x3f << 16)			/* NRD Setup Length */
+#define			AT91_SMC_NRDSETUP_(x)	((x) << 16)
+#define		AT91_SMC_NCS_RDSETUP	(0x3f << 24)			/* NCS Setup Length in Read Access */
+#define			AT91_SMC_NCS_RDSETUP_(x)	((x) << 24)
+
+#define AT91_SMC_PULSE(n)	(AT91_SMC + 0x04 + ((n)*0x10))	/* Pulse Register for CS n */
+#define		AT91_SMC_NWEPULSE	(0x7f <<  0)			/* NWE Pulse Length */
+#define			AT91_SMC_NWEPULSE_(x)	((x) << 0)
+#define		AT91_SMC_NCS_WRPULSE	(0x7f <<  8)			/* NCS Pulse Length in Write Access */
+#define			AT91_SMC_NCS_WRPULSE_(x)((x) << 8)
+#define		AT91_SMC_NRDPULSE	(0x7f << 16)			/* NRD Pulse Length */
+#define			AT91_SMC_NRDPULSE_(x)	((x) << 16)
+#define		AT91_SMC_NCS_RDPULSE	(0x7f << 24)			/* NCS Pulse Length in Read Access */
+#define			AT91_SMC_NCS_RDPULSE_(x)((x) << 24)
+
+#define AT91_SMC_CYCLE(n)	(AT91_SMC + 0x08 + ((n)*0x10))	/* Cycle Register for CS n */
+#define		AT91_SMC_NWECYCLE	(0x1ff << 0 )			/* Total Write Cycle Length */
+#define			AT91_SMC_NWECYCLE_(x)	((x) << 0)
+#define		AT91_SMC_NRDCYCLE	(0x1ff << 16)			/* Total Read Cycle Length */
+#define			AT91_SMC_NRDCYCLE_(x)	((x) << 16)
+
+#define AT91_SMC_MODE(n)	(AT91_SMC + 0x0c + ((n)*0x10))	/* Mode Register for CS n */
+#define		AT91_SMC_READMODE	(1 <<  0)			/* Read Mode */
+#define		AT91_SMC_WRITEMODE	(1 <<  1)			/* Write Mode */
+#define		AT91_SMC_EXNWMODE	(3 <<  4)			/* NWAIT Mode */
+#define			AT91_SMC_EXNWMODE_DISABLE	(0 << 4)
+#define			AT91_SMC_EXNWMODE_FROZEN	(2 << 4)
+#define			AT91_SMC_EXNWMODE_READY		(3 << 4)
+#define		AT91_SMC_BAT		(1 <<  8)			/* Byte Access Type */
+#define			AT91_SMC_BAT_SELECT		(0 << 8)
+#define			AT91_SMC_BAT_WRITE		(1 << 8)
+#define		AT91_SMC_DBW		(3 << 12)			/* Data Bus Width */
+#define			AT91_SMC_DBW_8			(0 << 12)
+#define			AT91_SMC_DBW_16			(1 << 12)
+#define			AT91_SMC_DBW_32			(2 << 12)
+#define		AT91_SMC_TDF		(0xf << 16)			/* Data Float Time. */
+#define			AT91_SMC_TDF_(x)		((x) << 16)
+#define		AT91_SMC_TDFMODE	(1 << 20)			/* TDF Optimization - Enabled */
+#define		AT91_SMC_PMEN		(1 << 24)			/* Page Mode Enabled */
+#define		AT91_SMC_PS		(3 << 28)			/* Page Size */
+#define			AT91_SMC_PS_4			(0 << 28)
+#define			AT91_SMC_PS_8			(1 << 28)
+#define			AT91_SMC_PS_16			(2 << 28)
+#define			AT91_SMC_PS_32			(3 << 28)
+
+#if defined(AT91_SMC1)		/* The AT91SAM9263 has 2 Static Memory contollers */
+#define AT91_SMC1_SETUP(n)	(AT91_SMC1 + 0x00 + ((n)*0x10))	/* Setup Register for CS n */
+#define AT91_SMC1_PULSE(n)	(AT91_SMC1 + 0x04 + ((n)*0x10))	/* Pulse Register for CS n */
+#define AT91_SMC1_CYCLE(n)	(AT91_SMC1 + 0x08 + ((n)*0x10))	/* Cycle Register for CS n */
+#define AT91_SMC1_MODE(n)	(AT91_SMC1 + 0x0c + ((n)*0x10))	/* Mode Register for CS n */
+#endif
+
+#endif

include/asm-arm/arch-at91sam9/clk.h

@@ -1,6 +1,6 @@
 /*
  * (C) Copyright 2007
- * Stelian Pop <stelian.pop <at> leadtechdesign.com>
+ * Stelian Pop <stelian.pop@leadtechdesign.com>
  * Lead Tech Design <www.leadtechdesign.com>
  *
  * See file CREDITS for list of people who contributed to this