* Patch by Martin Krause, 09 Oct 2003:

Fixes for TRAB board
  - /board/trab/rs485.c: correct baudrate
  - /board/trab/cmd_trab.c: bug fix for problem with timer overflow in
    udelay(); fix some timing problems with adc controller
  - /board/trab/trab_fkt.c: add new commands: gain, eeprom and power;
    modify commands: touch and buzzer

* Disable CONFIG_SUPPORT_VFAT when used with CONFIG_AUTO_UPDATE
  (quick & dirty workaround for rogue pointer problem in get_vfatname());
  Use direct function calls for auto_update instead of hush commands

CHANGELOG

@@ -2,6 +2,97 @@
 Changes for U-Boot 1.0.0:
 ======================================================================
 
+* Patch by Martin Krause, 09 Oct 2003:
+  Fixes for TRAB board
+  - /board/trab/rs485.c: correct baudrate
+  - /board/trab/cmd_trab.c: bug fix for problem with timer overflow in 
+    udelay(); fix some timing problems with adc controller
+  - /board/trab/trab_fkt.c: add new commands: gain, eeprom and power;
+    modify commands: touch and buzzer
+
+* Disable CONFIG_SUPPORT_VFAT when used with CONFIG_AUTO_UPDATE
+  (quick & dirty workaround for rogue pointer problem in get_vfatname());
+  Use direct function calls for auto_update instead of hush commands
+
+* Patch by Scott McNutt, 04 Oct 2003:
+  - add support for Altera Nios-32 CPU
+  - add support for Nios Cyclone Development Kit (DK-1C20)
+
+* Patch by Steven Scholz, 29 Sep 2003:
+  - A second parameter for bootm overwrites the load address for
+    "Standalone Application" images.
+  - bootm sets environment variable "filesize" to the resulting
+    (uncompressed) data length for "Standalone Application" images
+    when autostart is set to "no". Now you can do something like
+	if bootm $fpgadata $some_free_ram ; then
+		fpga load 0 $some_free_ram $filesize
+	fi
+
+* Patch by Denis Peter, 25 Sept 2003:
+  add support for the MIP405 Rev. C board
+
+* Patch by Yuli Barcohen, 25 Sep 2003:
+  add support for Zephyr Engineering ZPC.1900 board
+
+* Patch by Anders Larsen, 23 Sep 2003:
+  add CMD_PORTIO to CFG_CMD_NONSTD (commands in question are only
+  implemented for the x86 architecture)
+
+* Patch by Sangmoon Kim, 23 Sep 2003:
+  fix pll_pci_to_mem_multiplier table for MPC8245
+
+* Patch by Anders Larsen, 22 Sep 2003:
+  enable timed autoboot on PXA
+
+* Patch by David Müller, 22 Sep 2003:
+  - add $(CFLAGS) to "-print-libgcc-filename" so compiler driver
+    returns correct libgcc file path
+  - "latency" reduction of busy-loop waiting to improve "U-Boot" boot
+    time on s3c24x0 systems
+
+* Patch by Jon Diekema, 19 Sep 2003:
+  - Add CFG_FAULT_ECHO_LINK_DOWN option to echo the inverted Ethernet
+    link state to the fault LED.
+  - In NetLoop, make the Fault LED reflect the link status.  The link
+    status gets updated on entry, and on timeouts.
+     
+* Patch by Anders Larsen, 18 Sep 2003:
+  allow mkimage to build and run on Cygwin-hosted systems
+
+* Patch by Frank Müller, 18 Sep 2003:
+  use bi_intfreq instead of bi_busfreq to compute fec_mii_speed in
+  cpu/mpc8xx/fec.c
+
+* Patch by Pantelis Antoniou, 16 Sep 2003:
+  add tool to compute fileds in the PLPRCR register for MPC86x
+
+* Use IH_TYPE_FILESYSTEM for TRAB "disk" images.
+
+* Fix build problems under FreeBSD
+
+* Add generic filesystem image type
+
+* Make fatload set filesize environment variable
+
+* enable basic / medium / high-end configurations for PPChameleonEVB
+  board; fix NAND code
+
+* enable TFTP client code to specify to the server the desired
+  timeout value (see RFC-2349)
+
+* Improve SDRAM setup for TRAB board
+
+* Suppress all output with splashscreen configured only if "splashimage"
+  is set
+
+* Fix problems with I2C support for mpc5200
+
+* Adapt TRAB configuration and auto_update to new memory layout
+
+* Add configuration for wtk board
+
+* Add support for the Sharp LQ065T9DR51U LCD display
+
 * Patch by Rune Torgersen, 17 Sep 2003:
   - Fixes for MPC8266 default config
   - Allow eth_loopback_test() on 8260 to use a subset of the FCC's
@@ -85,6 +176,14 @@ Changes for U-Boot 1.0.0:
 Changes for U-Boot 0.4.8:
 ======================================================================
 
+<<<<<<< CHANGELOG
+<<<<<<< CHANGELOG
+<<<<<<< CHANGELOG
+* Add I2C and RTC support for RMU board
+
+=======
+=======
+=======
 * Patches by Denis Peter, 9 Sep 2003:
   add FAT support for IDE, SCSI and USB
 
@@ -117,6 +216,7 @@ Changes for U-Boot 0.4.8:
 
 * Avoid flicker on TRAB's VFD
 
+>>>>>>> 1.130
 * Add support for SK98xx driver
 
 * Add PCI support for SL8245 board
@@ -162,6 +262,7 @@ Changes for U-Boot 0.4.7:
 * Add GCC library to examples/Makefile so GCC utility functions will
   be resolved, too
 
+>>>>>>> 1.118
 * Add I2C and RTC support for RMU board using software I2C driver
   (because of better response to iprobe command); fix problem with
   "reset" command
@@ -170,6 +271,7 @@ Changes for U-Boot 0.4.7:
   Added CONFIG_BOOTP_DNS2 and CONFIG_BOOTP_SEND_HOSTNAME to
   CONFIG_BOOTP_MAKS (see README).
 
+>>>>>>> 1.112
 * Fix ICU862 environment problem
 
 * Fix RAM size detection for RMU board

CREDITS

@@ -219,6 +219,10 @@ N: David M
 E: d.mueller@elsoft.ch
 D: Support for Samsung ARM920T SMDK2410 eval board
 
+N: Scott McNutt
+E: smcnutt@psyent.com
+D: Support for Altera Nios-32 CPU, for Nios Cyclone Development Kit (DK-1C20)
+
 N: Rolf Offermanns
 E: rof@sysgo.de
 D: Initial support for SSV-DNP1110, SMC91111 driver

MAINTAINERS

@@ -25,6 +25,10 @@ Pantelis Antoniou <panto@intracom.gr>
 
 	NETVIA			MPC8xx
 
+Yuli Barcohen <yuli@arabellasw.com>
+
+	ZPC1900			MPC8265
+
 Jerry Van Baren <gerald.vanbaren@smiths-aerospace.com>
 
 	sacsng			MPC8260
@@ -333,6 +337,17 @@ Wolfgang Denk <wd@denx.de>
 	incaip			MIPS32 4Kc
 	purple			MIPS64 5Kc
 
+#########################################################################
+# Nios-32 Systems:							#
+#									#
+# Maintainer Name, Email Address					#
+#	Board			CPU					#
+#########################################################################
+
+Scott McNutt <smcnutt@psyent.com>
+
+	DK1C20			Nios-32
+
 #########################################################################
 # End of MAINTAINERS list						#
 #########################################################################

MAKEALL

@@ -82,7 +82,7 @@ LIST_8260="	\
 	gw8260		hymod		IPHASE4539	MPC8260ADS	\
 	MPC8266ADS	PM826		ppmc8260	RPXsuper	\
 	rsdproto	sacsng		sbc8260		SCM		\
-	TQM8260_AC	TQM8260_AD	TQM8260_AE			\
+	TQM8260_AC	TQM8260_AD	TQM8260_AE	ZPC1900		\
 "
 
 #########################################################################

Makefile

@@ -69,6 +69,9 @@ endif
 ifeq ($(ARCH),mips)
 CROSS_COMPILE = mips_4KC-
 endif
+ifeq ($(ARCH),nios)
+CROSS_COMPILE = nios-elf-
+endif
 endif
 endif
 
@@ -118,7 +121,7 @@ LIBS += post/libpost.a post/cpu/libcpu.a
 LIBS += common/libcommon.a
 LIBS += lib_generic/libgeneric.a
 # Add GCC lib
-PLATFORM_LIBS += -L $(shell dirname `$(CC) -print-libgcc-file-name`) -lgcc
+PLATFORM_LIBS += -L $(shell dirname `$(CC) $(CFLAGS) -print-libgcc-file-name`) -lgcc
 
 #########################################################################
 #########################################################################
@@ -470,9 +473,15 @@ v37_config:	unconfig
 	@echo "#define CONFIG_SHARP_LQ084V1DG21" >>include/config.h
 	@./mkconfig $(@:_config=) ppc mpc8xx v37
 
+wtk_config:	unconfig
+	@echo "#define CONFIG_LCD" >include/config.h
+	@echo "#define CONFIG_SHARP_LQ065T9DR51U" >>include/config.h
+	@./mkconfig -a TQM823L ppc mpc8xx tqm8xx
+
 #########################################################################
 ## PPC4xx Systems
 #########################################################################
+xtract_4xx = $(subst _MODEL_BA,,$(subst _MODEL_ME,,$(subst _MODEL_HI,,$(subst _config,,$1))))
 
 ADCIOP_config:	unconfig
 	@./mkconfig $(@:_config=) ppc ppc4xx adciop esd
@@ -552,8 +561,24 @@ PLU405_config:	unconfig
 PMC405_config:	unconfig
 	@./mkconfig $(@:_config=) ppc ppc4xx pmc405 esd
 
+PPChameleonEVB_MODEL_BA_config	\
+PPChameleonEVB_MODEL_ME_config	\
+PPChameleonEVB_MODEL_HI_config	\
 PPChameleonEVB_config:	unconfig
-	@./mkconfig $(@:_config=) ppc ppc4xx PPChameleonEVB dave
+	@ >include/config.h
+	@[ -z "$(findstring _MODEL_BA,$@)" ] || \
+		{ echo "#define CONFIG_PPCHAMELEON_MODULE_MODEL 0" >>include/config.h ; \
+		  echo "... BASIC model" ; \
+		}
+	@[ -z "$(findstring _MODEL_ME,$@)" ] || \
+		{ echo "#define CONFIG_PPCHAMELEON_MODULE_MODEL 1" >>include/config.h ; \
+		  echo "... MEDIUM model" ; \
+		}
+	@[ -z "$(findstring _MODEL_HI,$@)" ] || \
+		{ echo "#define CONFIG_PPCHAMELEON_MODULE_MODEL 2" >>include/config.h ; \
+		  echo "... HIGH-END model" ; \
+		}
+	@./mkconfig -a $(call xtract_4xx,$@) ppc ppc4xx PPChameleonEVB dave
 
 VOH405_config:	unconfig
 	@./mkconfig $(@:_config=) ppc ppc4xx voh405 esd
@@ -620,6 +645,9 @@ utx8245_config: unconfig
 ## MPC8260 Systems
 #########################################################################
 
+atc_config:	unconfig
+	@./mkconfig $(@:_config=) ppc mpc8260 atc
+
 cogent_mpc8260_config:	unconfig
 	@./mkconfig $(@:_config=) ppc mpc8260 cogent
 
@@ -743,8 +771,8 @@ TQM8265_AA_config:  unconfig
 	fi
 	@./mkconfig -a TQM8260 ppc mpc8260 tqm8260
 
-atc_config:	unconfig
-	@./mkconfig $(@:_config=) ppc mpc8260 atc
+ZPC1900_config: unconfig
+	@./mkconfig $(@:_config=) ppc mpc8260 zpc1900
 
 #########################################################################
 ## 74xx/7xx Systems
@@ -916,6 +944,17 @@ incaip_config: unconfig
 purple_config :		unconfig
 	@./mkconfig $(@:_config=) mips mips purple
 
+#========================================================================
+# Nios
+#========================================================================
+#########################################################################
+## Nios32
+#########################################################################
+
+DK1C20_config:	unconfig
+	@./mkconfig $(@:_config=) nios nios dk1c20
+
+
 #########################################################################
 #########################################################################
 

README

@@ -239,6 +239,7 @@ Directory Hierarchy:
 - board/westel/	Files specific to boards manufactured by Westel Wireless
 - board/westel/amx860	Files specific to AMX860     boards
 - board/utx8245	Files specific to UTX8245   boards
+- board/zpc1900	Files specific to Zephyr Engineering ZPC.1900 board
 
 Software Configuration:
 =======================
@@ -355,7 +356,7 @@ The following options need to be configured:
 		CONFIG_IAD210,     CONFIG_RPXlite,    CONFIG_sbc8260,
 		CONFIG_EBONY,      CONFIG_sacsng,     CONFIG_FPS860L,
 		CONFIG_V37,        CONFIG_ELPT860,    CONFIG_CMI,
-		CONFIG_NETVIA,     CONFIG_RBC823
+		CONFIG_NETVIA,     CONFIG_RBC823,     CONFIG_ZPC1900
 
 		ARM based boards:
 		-----------------
@@ -393,7 +394,7 @@ The following options need to be configured:
 		Possible values are:
 			CFG_8260ADS	- original MPC8260ADS
 			CFG_8266ADS	- MPC8266ADS (untested)
-			CFG_PQ2FADS	- PQ2FADS-ZU
+			CFG_PQ2FADS	- PQ2FADS-ZU or PQ2FADS-VR
 
 
 - MPC824X Family Member (if CONFIG_MPC824X is defined)
@@ -1749,6 +1750,14 @@ Note: once the monitor has been relocated, then it will complain if
 the default environment is used; a new CRC is computed as soon as you
 use the "saveenv" command to store a valid environment.
 
+- CFG_FAULT_ECHO_LINK_DOWN:
+	        Echo the inverted Ethernet link state to the fault LED.
+
+		Note: If this option is active, then CFG_FAULT_MII_ADDR
+		      also needs to be defined.
+
+- CFG_FAULT_MII_ADDR:
+	        MII address of the PHY to check for the Ethernet link state.
 
 Low Level (hardware related) configuration options:
 ---------------------------------------------------
@@ -1935,7 +1944,8 @@ configurations; the following names are supported:
     GEN860T_config	  EBONY_config		FPS860L_config
     ELPT860_config	  cmi_mpc5xx_config	NETVIA_config
     at91rm9200dk_config	  omap1510inn_config	MPC8260ADS_config
-    omap1610inn_config
+    omap1610inn_config	  ZPC1900_config
+
 Note: for some board special configuration names may exist; check  if
       additional  information is available from the board vendor; for
       instance, the TQM8xxL systems run normally at 50 MHz and use  a

board/dave/PPChameleonEVB/PPChameleonEVB.c

@@ -261,10 +261,13 @@ nand_probe(ulong physadr);
 void
 nand_init(void)
 {
-	ulong totlen;
+	ulong totlen = 0;
 
+#if (CONFIG_PPCHAMELEON_MODULE_MODEL == CONFIG_PPCHAMELEON_MODULE_ME) || \
+    (CONFIG_PPCHAMELEON_MODULE_MODEL == CONFIG_PPCHAMELEON_MODULE_HI)
 	debug ("Probing at 0x%.8x\n", CFG_NAND0_BASE);
-	totlen = nand_probe (CFG_NAND0_BASE);
+	totlen += nand_probe (CFG_NAND0_BASE);
+#endif	/* CONFIG_PPCHAMELEON_MODULE_ME, CONFIG_PPCHAMELEON_MODULE_HI */
 
 	debug ("Probing at 0x%.8x\n", CFG_NAND1_BASE);
 	totlen += nand_probe (CFG_NAND1_BASE);

board/dk1c20/Makefile

@@ -0,0 +1,48 @@
+#
+# (C) Copyright 2001
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= lib$(BOARD).a
+
+OBJS	:= $(BOARD).o flash.o
+
+SOBJS  = vectors.o
+
+$(LIB):	$(OBJS) $(SOBJS)
+	$(AR) crv $@ $^
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+.depend:	Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+		$(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+-include .depend
+
+#########################################################################

board/dk1c20/config.mk

@@ -0,0 +1,30 @@
+#
+# (C) Copyright 2003
+# Psyent Corporation
+# Scott McNutt <smcnutt@psyent.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+TEXT_BASE = 0x018c0000
+
+ifeq ($(debug),1)
+PLATFORM_CPPFLAGS += -DDEBUG
+endif
+

board/dk1c20/dk1c20.c

@@ -0,0 +1,45 @@
+/*
+ * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+void _default_hdlr (void)
+{
+	printf ("default_hdlr\n");
+}
+
+int board_pre_init (void)
+{
+	return 0;
+}
+
+int checkboard (void)
+{
+	puts ("Board: Altera Nios 1C20 Development Kit\n");
+	return 0;
+}
+
+long int initdram (int board_type)
+{
+	return (0);
+}

board/dk1c20/flash.c

@@ -0,0 +1,226 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+
+#include <common.h>
+#include <nios.h>
+
+/*---------------------------------------------------------------------*/
+#define BANKSZ	(8 * 1024 * 1024)
+#define SECTSZ	(64 * 1024)
+#define USERFLASH (2 * 1024 * 1024)	/* bottom 2 MB for user */
+
+flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
+
+#define FLASH_WORD_SIZE unsigned char
+
+/*---------------------------------------------------------------------*/
+
+unsigned long flash_init (void)
+{
+	int i;
+	unsigned long addr;
+	flash_info_t *fli = &flash_info[0];
+
+	fli->size = BANKSZ;
+	fli->sector_count = CFG_MAX_FLASH_SECT;
+	fli->flash_id = FLASH_MAN_AMD;
+
+	addr = CFG_FLASH_BASE;
+	for (i = 0; i < fli->sector_count; ++i) {
+		fli->start[i] = addr;
+		addr += SECTSZ;
+
+		/* Protect all but 2 MByte user area */
+		if (addr < (CFG_FLASH_BASE + USERFLASH))
+			fli->protect[i] = 0;
+		else
+			fli->protect[i] = 1;
+	}
+
+	return (BANKSZ);
+}
+
+/*--------------------------------------------------------------------*/
+void flash_print_info (flash_info_t * info)
+{
+	int i, k;
+	unsigned long size;
+	int erased;
+	volatile unsigned char *flash;
+
+	printf ("  Size: %ld KB in %d Sectors\n",
+		info->size >> 10, info->sector_count);
+	printf ("  Sector Start Addresses:");
+	for (i = 0; i < info->sector_count; ++i) {
+
+		/* Check if whole sector is erased */
+		if (i != (info->sector_count - 1))
+			size = info->start[i + 1] - info->start[i];
+		else
+			size = info->start[0] + info->size - info->start[i];
+		erased = 1;
+		flash = (volatile unsigned char *) info->start[i];
+		for (k = 0; k < size; k++) {
+			if (*flash++ != 0xff) {
+				erased = 0;
+				break;
+			}
+		}
+
+		/* Print the info */
+		if ((i % 5) == 0)
+			printf ("\n   ");
+		printf (" %08lX%s%s", info->start[i], erased ? " E" : "  ",
+			info->protect[i] ? "RO " : "   ");
+	}
+	printf ("\n");
+}
+
+/*-------------------------------------------------------------------*/
+
+
+int flash_erase (flash_info_t * info, int s_first, int s_last)
+{
+	volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *) (info->start[0]);
+	volatile FLASH_WORD_SIZE *addr2;
+	int prot, sect;
+	int any = 0;
+	unsigned oldpri;
+	ulong start;
+
+	/* Some sanity checking */
+	if ((s_first < 0) || (s_first > s_last)) {
+		printf ("- no sectors to erase\n");
+		return 1;
+	}
+
+	prot = 0;
+	for (sect = s_first; sect <= s_last; ++sect) {
+		if (info->protect[sect]) {
+			prot++;
+		}
+	}
+	if (prot) {
+		printf ("- Warning: %d protected sectors will not be erased!\n",
+			prot);
+	} else {
+		printf ("\n");
+	}
+
+	/* NOTE: disabling interrupts on Nios can be very bad since it
+	 * also disables the LO_LIMIT exception. It's better here to
+	 * set the interrupt priority to 3 & restore it when we're done.
+	 */
+	oldpri = ipri (3);
+
+	/* It's ok to erase multiple sectors provided we don't delay more
+	 * than 50 usec between cmds ... at which point the erase time-out
+	 * occurs. So don't go and put printf() calls in the loop ... it
+	 * won't be very helpful ;-)
+	 */
+	for (sect = s_first; sect <= s_last; sect++) {
+		if (info->protect[sect] == 0) {	/* not protected */
+			addr2 = (FLASH_WORD_SIZE *) (info->start[sect]);
+			*addr = 0xaa;
+			*addr = 0x55;
+			*addr = 0x80;
+			*addr = 0xaa;
+			*addr = 0x55;
+			*addr2 = 0x30;
+			any = 1;
+		}
+	}
+
+	/* Now just wait for 0xff & provide some user feedback while
+	 * we wait.
+	 */
+	if (any) {
+		addr2 = (FLASH_WORD_SIZE *) (info->start[sect]);
+		start = get_timer (0);
+		while (*addr2 != 0xff) {
+			udelay (1000 * 1000);
+			putc ('.');
+			if (get_timer (start) > CFG_FLASH_ERASE_TOUT) {
+				printf ("timeout\n");
+				return 1;
+			}
+		}
+		printf ("\n");
+	}
+
+	/* Restore interrupt priority */
+	ipri (oldpri);
+
+	return 0;
+}
+
+/*-----------------------------------------------------------------------
+ * Copy memory to flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+
+int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
+{
+
+	vu_char *cmd = (vu_char *) info->start[0];
+	vu_char *dst = (vu_char *) addr;
+	unsigned char b;
+	unsigned oldpri;
+	ulong start;
+
+	while (cnt) {
+		/* Check for sufficient erase */
+		b = *src;
+		if ((*dst & b) != b) {
+			printf ("%02x : %02x\n", *dst, b);
+			return (2);
+		}
+
+		/* Disable interrupts other than window underflow
+		 * (interrupt priority 2)
+		 */
+		oldpri = ipri (3);
+		*cmd = 0xaa;
+		*cmd = 0x55;
+		*cmd = 0xa0;
+		*dst = b;
+
+		/* Verify write */
+		start = get_timer (0);
+		while (*dst != b) {
+			if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
+				ipri (oldpri);
+				return 1;
+			}
+		}
+		dst++;
+		src++;
+		cnt--;
+		ipri (oldpri);
+	}
+
+	return (0);
+}

board/dk1c20/u-boot.lds

@@ -0,0 +1,70 @@
+/*
+ * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+
+OUTPUT_FORMAT("elf32-nios")
+OUTPUT_ARCH(nios)
+ENTRY(_start)
+
+SECTIONS
+{
+	.text :
+	{
+	  cpu/nios/start.o (.text)
+	  *(.text)
+	}
+        __text_end = .;
+
+        . = ALIGN(4);
+        .rodata :
+	{
+		*(.rodata)
+	}
+	__rodata_end = .;
+
+        . = ALIGN(4);
+        .data :
+	{
+		*(.data)
+	}
+	. = ALIGN(4);
+	__data_end = .;
+
+	__u_boot_cmd_start = .;
+	.u_boot_cmd :
+	{
+		*(.u_boot_cmd)
+	}
+	. = ALIGN(4);
+	__u_boot_cmd_end = .;
+
+	__bss_start = .;
+        . = ALIGN(4);
+        .bss :
+	{
+		*(.bss)
+	}
+	. = ALIGN(4);
+	__bss_end = .;
+}
+

board/dk1c20/vectors.S

@@ -0,0 +1,124 @@
+/*
+ * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+
+/*************************************************************************
+ * Exception Vector Table
+ *
+ * This could have gone in the cpu soure tree, but the whole point of
+ * Nios is customization -- and polluting the cpu source tree with
+ * board-specific ifdef's really defeats the purpose, no? With this in
+ * the board-specific tree, each board has the freedom to organize
+ * vectors/traps, etc anyway it wants. The init code copies this table
+ * to the proper location.
+ *
+ * Each board can do what it likes here. But there are four "standard"
+ * handlers availble:
+ *
+ *	_cwp_lolimit	-Handles register window underflows.
+ *	_cwp_hilimit	-Handles register window overflows.
+ *	_timebase_int	-Increments the timebase.
+ *	_def_xhandler	-Default exception handler.
+ *
+ * _timebase_int handles a Nios Timer interrupt and increments the
+ * timestamp used for the get_timer(), reset_timer(), etc. routines. It
+ * expects the timer to be configured like the standard-32 low priority
+ * timer.
+ *
+ * _def_xhandler dispatches exceptions/traps via the external_interrupt()
+ * routine. This lets you use the irq_install_handler() and handle your
+ * interrupts/traps with code written in C.
+ ************************************************************************/
+
+	.data
+	.global _vectors
+	.align	4
+_vectors:
+
+	.long	_def_xhandler@h		/* Vector 0  - NMI */
+	.long	_cwp_lolimit@h		/* Vector 1  -  underflow */
+	.long	_cwp_hilimit@h		/* Vector 2  - overflow	*/
+
+	.long	_def_xhandler@h		/* Vector 3 - GNUPro debug */
+	.long	_def_xhandler@h		/* Vector 4 - GNUPro debug */
+	.long	_def_xhandler@h		/* Vector 5 - GNUPro debug */
+	.long	_def_xhandler@h		/* Vector 6 - future reserved */
+	.long	_def_xhandler@h		/* Vector 7 - future reserved */
+	.long	_def_xhandler@h		/* Vector 8 - future reserved */
+	.long	_def_xhandler@h		/* Vector 9 - future reserved */
+	.long	_def_xhandler@h		/* Vector 10 - future reserved */
+	.long	_def_xhandler@h		/* Vector 11 - future reserved */
+	.long	_def_xhandler@h		/* Vector 12 - future reserved */
+	.long	_def_xhandler@h		/* Vector 13 - future reserved */
+	.long	_def_xhandler@h		/* Vector 14 - future reserved */
+	.long	_def_xhandler@h		/* Vector 15 - future reserved */
+	.long	_def_xhandler@h		/* Vector 16 */
+	.long	_def_xhandler@h		/* Vector 17 */
+	.long	_def_xhandler@h		/* Vector 18 */
+	.long	_def_xhandler@h		/* Vector 19 */
+	.long	_def_xhandler@h		/* Vector 20 */
+	.long	_def_xhandler@h		/* Vector 21 */
+	.long	_def_xhandler@h		/* Vector 22 */
+	.long	_def_xhandler@h		/* Vector 23 */
+	.long	_def_xhandler@h		/* Vector 24 */
+	.long	_def_xhandler@h		/* Vector 25 */
+	.long	_def_xhandler@h		/* Vector 26 */
+	.long	_def_xhandler@h		/* Vector 27 */
+	.long	_def_xhandler@h		/* Vector 28 */
+	.long	_def_xhandler@h		/* Vector 29 */
+	.long	_def_xhandler@h		/* Vector 30 */
+	.long	_def_xhandler@h		/* Vector 31 */
+	.long	_def_xhandler@h		/* Vector 32 */
+	.long	_def_xhandler@h		/* Vector 33 */
+	.long	_def_xhandler@h		/* Vector 34 */
+	.long	_def_xhandler@h		/* Vector 35 */
+	.long	_def_xhandler@h		/* Vector 36 */
+	.long	_def_xhandler@h		/* Vector 37 */
+	.long	_def_xhandler@h		/* Vector 38 */
+	.long	_def_xhandler@h		/* Vector 39 */
+	.long	_def_xhandler@h		/* Vector 40 */
+	.long	_def_xhandler@h		/* Vector 41 */
+	.long	_def_xhandler@h		/* Vector 42 */
+	.long	_def_xhandler@h		/* Vector 43 */
+	.long	_def_xhandler@h		/* Vector 44 */
+	.long	_def_xhandler@h		/* Vector 45 */
+	.long	_def_xhandler@h		/* Vector 46 */
+	.long	_def_xhandler@h		/* Vector 47 */
+	.long	_def_xhandler@h		/* Vector 48 */
+	.long	_def_xhandler@h		/* Vector 49 */
+	.long	_timebase_int@h		/* Vector 50 - lopri timer*/
+	.long	_def_xhandler@h		/* Vector 51 */
+	.long	_def_xhandler@h		/* Vector 52 */
+	.long	_def_xhandler@h		/* Vector 53 */
+	.long	_def_xhandler@h		/* Vector 54 */
+	.long	_def_xhandler@h		/* Vector 55 */
+	.long	_def_xhandler@h		/* Vector 56 */
+	.long	_def_xhandler@h		/* Vector 57 */
+	.long	_def_xhandler@h		/* Vector 58 */
+	.long	_def_xhandler@h		/* Vector 59 */
+	.long	_def_xhandler@h		/* Vector 60 */
+	.long	_def_xhandler@h		/* Vector 61 */
+	.long	_def_xhandler@h		/* Vector 62 */
+	.long	_def_xhandler@h		/* Vector 63 */
+
+

board/mpl/common/flash.c

@@ -155,7 +155,7 @@ void setup_cs_reloc(void)
 
 unsigned long flash_init (void)
 {
-	unsigned long size_b0, size_b1,flashcr;
+	unsigned long size_b0, size_b1,flashcr, size_reg;
 	int mode, i;
 	extern char version_string;
 	char *p=&version_string;
@@ -196,6 +196,21 @@ unsigned long flash_init (void)
 	size_b1 = 0 ;
 	flash_info[0].size = size_b0;
 	/* set up flash cs according to the size */
+	size_reg=(flash_info[0].size >>20);
+	switch (size_reg) {
+		case 0:
+		case 1: i=0; break; /* <= 1MB */
+		case 2: i=1; break; /* = 2MB */
+		case 4: i=2; break; /* = 4MB */
+		case 8: i=3; break; /* = 8MB */
+		case 16: i=4; break; /* = 16MB */
+		case 32: i=5; break; /* = 32MB */
+		case 64: i=6; break; /* = 64MB */
+		case 128: i=7; break; /*= 128MB */
+		default: 
+			printf("\n #### ERROR, wrong size %ld MByte reset board #####\n",size_reg);
+			while(1);
+	}
 	if(mode & BOOT_MPS) {
 		/* flash is on CS1 */
 		mtdcr(ebccfga, pb1cr);
@@ -203,7 +218,7 @@ unsigned long flash_init (void)
 		/* we map the flash high in every case */
 		flashcr&=0x0001FFFF; /* mask out address bits */
 		flashcr|= ((0-flash_info[0].size) & 0xFFF00000); /* start addr */
-		flashcr|= (((flash_info[0].size >>21) & 0x07) << 17); /* size addr */
+		flashcr|= (i << 17); /* size addr */
 		mtdcr(ebccfga, pb1cr);
 		mtdcr(ebccfgd, flashcr);
 	}
@@ -214,7 +229,7 @@ unsigned long flash_init (void)
 		/* we map the flash high in every case */
 		flashcr&=0x0001FFFF; /* mask out address bits */
 		flashcr|= ((0-flash_info[0].size) & 0xFFF00000); /* start addr */
-		flashcr|= (((flash_info[0].size >>21) & 0x07) << 17); /* size addr */
+		flashcr|= (i << 17); /* size addr */
 		mtdcr(ebccfga, pb0cr);
 		mtdcr(ebccfgd, flashcr);
 	}

board/mpl/mip405/mip405.c

@@ -167,6 +167,15 @@ const sdram_t sdram_table[] = {
 		3,	/* Address Mode = 3 */
 		5,	/* size value */
 		1},	/* ECC enabled */
+	{ 0x2f,	/* Rev C, 128MByte -3 Board */
+		3,	/* Case Latenty = 3 */
+		3,	/* trp 20ns / 7.5 ns datain[27] */
+		3,	/* trcd 20ns /7.5 ns (datain[29]) */
+		6,	/* tras 44ns /7.5 ns  (datain[30]) */
+		4,	/* tcpt 44 - 20ns = 24ns */
+		3,	/* Address Mode = 3 */
+		5,	/* size value */
+		1},	/* ECC enabled */
 	{ 0xff, /* terminator */
 	  0xff,
 	  0xff,
@@ -550,7 +559,8 @@ void get_pcbrev_var(unsigned char *pcbrev, unsigned char *var)
 		tmp >>= 1;
 	}
 	rc++;
-	if((((bc>>4) & 0xf)==0x1) /* Rev B PCB with */
+	if((  (((bc>>4) & 0xf)==0x2) /* Rev C PCB or */
+	   || (((bc>>4) & 0xf)==0x1)) /* Rev B PCB with */
 		&& (rc==0x1))     /* Population Option 1 is a -3 */
 		rc=3;
 	*pcbrev=(bc >> 4) & 0xf;

board/trab/auto_update.c

@@ -105,14 +105,14 @@ struct flash_layout
 #define AU_FL_APP_ND		0x005BFFFF
 #define AU_FL_DISK_ST		0x005C0000
 #define AU_FL_DISK_ND		0x00FFFFFF
-#else						/*  8 MB Flash, 16 MB RAM */
+#else						/*  8 MB Flash, 32 MB RAM */
 #define AU_FL_FIRMWARE_ST	0x00000000
-#define AU_FL_FIRMWARE_ND	0x0003FFFF
-#define AU_FL_KERNEL_ST		0x00040000
-#define AU_FL_KERNEL_ND		0x0011FFFF
-#define AU_FL_APP_ST		0x00120000
-#define AU_FL_APP_ND		0x003FFFFF
-#define AU_FL_DISK_ST		0x00400000
+#define AU_FL_FIRMWARE_ND	0x0005FFFF
+#define AU_FL_KERNEL_ST		0x00060000
+#define AU_FL_KERNEL_ND		0x0013FFFF
+#define AU_FL_APP_ST		0x00140000
+#define AU_FL_APP_ND		0x0067FFFF
+#define AU_FL_DISK_ST		0x00680000
 #define AU_FL_DISK_ND		0x007DFFFF
 #define AU_FL_VFD_ST		0x007E0000
 #define AU_FL_VFD_ND		0x007FFFFF
@@ -183,11 +183,9 @@ struct flash_layout aufl_layout[AU_MAXFILES - 3] = { \
 #define FIDX_TO_LIDX(idx) ((idx) - 2)
 
 /* where to load files into memory */
-#define LOAD_ADDR ((unsigned char *)0x0C100100)
-/* where to build strings in memory - 256 bytes should be enough */
-#define STRING_ADDR ((char *)0x0C100000)
-/* the disk is the largest image */
-#define MAX_LOADSZ ausize[IDX_DISK]
+#define LOAD_ADDR ((unsigned char *)0x0C100000)
+/* the app is the largest image */
+#define MAX_LOADSZ ausize[IDX_APP]
 
 /* externals */
 extern int fat_register_device(block_dev_desc_t *, int);
@@ -199,6 +197,9 @@ extern int i2c_write (uchar, uint, int , uchar* , int);
 extern int trab_vfd (ulong);
 extern int transfer_pic(unsigned char, unsigned char *, int, int);
 #endif
+extern int flash_sect_erase(ulong, ulong);
+extern int flash_sect_protect (int, ulong, ulong);
+extern int flash_write (uchar *, ulong, ulong);
 /* change char* to void* to shutup the compiler */
 extern int i2c_write_multiple (uchar, uint, int, void *, int);
 extern int i2c_read_multiple (uchar, uint, int, void *, int);
@@ -222,7 +223,7 @@ au_check_valid(int idx, long nbytes)
 #endif
 	if (ntohl(hdr->ih_magic) != IH_MAGIC ||
 	    hdr->ih_arch != IH_CPU_ARM ||
-	    nbytes < ntohl(hdr->ih_size))
+	    nbytes != (sizeof(*hdr) + ntohl(hdr->ih_size)))
 	{
 		printf ("Image %s bad MAGIC or ARCH or SIZE\n", aufile[idx]);
 		return -1;
@@ -254,9 +255,11 @@ au_check_valid(int idx, long nbytes)
 		printf ("Image %s wrong type\n", aufile[idx]);
 		return -1;
 	}
-	if ((idx == IDX_DISK || idx == IDX_APP)
-		&& (hdr->ih_type != IH_TYPE_RAMDISK))
-	{
+	if ((idx == IDX_DISK) && (hdr->ih_type != IH_TYPE_FILESYSTEM)) {
+		printf ("Image %s wrong type\n", aufile[idx]);
+		return -1;
+	}
+	if ((idx == IDX_APP) && (hdr->ih_type != IH_TYPE_RAMDISK)) {
 		printf ("Image %s wrong type\n", aufile[idx]);
 		return -1;
 	}
@@ -269,8 +272,14 @@ au_check_valid(int idx, long nbytes)
 	/* special case for prepare.img */
 	if (idx == IDX_PREPARE)
 		return 0;
-	/* check the size does not exceed space in flash */
-	if ((ausize[idx] != 0) && (ausize[idx] < ntohl(hdr->ih_size))) {
+	/* recycle checksum */
+	checksum = ntohl(hdr->ih_size);
+	/* for kernel and app the image header must also fit into flash */
+	if (idx != IDX_DISK)
+		checksum += sizeof(*hdr);
+	/* check the size does not exceed space in flash. HUSH scripts */
+	/* all have ausize[] set to 0 */
+	if ((ausize[idx] != 0) && (ausize[idx] < checksum)) {
 		printf ("Image %s is bigger than FLASH\n", aufile[idx]);
 		return -1;
 	}
@@ -297,13 +306,12 @@ au_check_valid(int idx, long nbytes)
 #define POWER_OFF (1 << 1)
 
 int
-au_do_update(int idx, long sz, int repeat)
+au_do_update(int idx, long sz)
 {
 	image_header_t *hdr;
 	char *addr;
 	long start, end;
-	char *strbuf = STRING_ADDR;
-	int off;
+	int off, rc;
 	uint nbytes;
 
 	hdr = (image_header_t *)LOAD_ADDR;
@@ -313,9 +321,12 @@ au_do_update(int idx, long sz, int repeat)
 
 	/* execute a script */
 	if (hdr->ih_type == IH_TYPE_SCRIPT) {
-		addr = (char *)((char *)hdr + sizeof(*hdr) + 8);
-		parse_string_outer(addr,
-			FLAG_PARSE_SEMICOLON | FLAG_EXIT_FROM_LOOP);
+		addr = (char *)((char *)hdr + sizeof(*hdr));
+		/* stick a NULL at the end of the script, otherwise */
+		/* parse_string_outer() runs off the end. */
+		addr[ntohl(hdr->ih_size)] = 0;
+		addr += 8;
+		parse_string_outer(addr, FLAG_PARSE_SEMICOLON);
 		return 0;
 	}
 
@@ -331,25 +342,17 @@ au_do_update(int idx, long sz, int repeat)
 		start = aufl_layout[1].start;
 		end = aufl_layout[1].end;
 #endif
-		debug ("protect off %lx %lx\n", start, end);
-		sprintf(strbuf, "protect off %lx %lx\n", start, end);
-		parse_string_outer(strbuf,
-			FLAG_PARSE_SEMICOLON | FLAG_EXIT_FROM_LOOP);
+		flash_sect_protect(0, start, end);
 	}
 
 	/*
-	 * erase the address range. Multiple erases seem to cause
-	 * problems.
+	 * erase the address range.
 	 */
-	if (repeat == 0) {
-		debug ("erase %lx %lx\n", start, end);
-		sprintf(strbuf, "erase %lx %lx\n", start, end);
-		parse_string_outer(strbuf,
-			FLAG_PARSE_SEMICOLON | FLAG_EXIT_FROM_LOOP);
-	}
+	debug ("flash_sect_erase(%lx, %lx);\n", start, end);
+	flash_sect_erase(start, end);
 	wait_ms(100);
-	/* strip the header - except for the kernel */
-	if (idx == IDX_FIRMWARE || idx == IDX_DISK || idx == IDX_APP) {
+	/* strip the header - except for the kernel and app */
+	if (idx == IDX_FIRMWARE || idx == IDX_DISK) {
 		addr = (char *)((char *)hdr + sizeof(*hdr));
 #ifdef AU_UPDATE_TEST
 		/* copy it to where Linux goes */
@@ -365,10 +368,12 @@ au_do_update(int idx, long sz, int repeat)
 	}
 
 	/* copy the data from RAM to FLASH */
-	debug ("cp.b %p %lx %x\n", addr, start, nbytes);
-	sprintf(strbuf, "cp.b %p %lx %x\n", addr, start, nbytes);
-	parse_string_outer(strbuf,
-		FLAG_PARSE_SEMICOLON | FLAG_EXIT_FROM_LOOP);
+	debug ("flash_write(%p, %lx %x)\n", addr, start, nbytes);
+	rc = flash_write(addr, start, nbytes);
+	if (rc != 0) {
+		printf("Flashing failed due to error %d\n", rc);
+		return -1;
+	}
 
 	/* check the dcrc of the copy */
 	if (crc32 (0, (char *)(start + off), ntohl(hdr->ih_size)) != ntohl(hdr->ih_dcrc)) {
@@ -378,12 +383,8 @@ au_do_update(int idx, long sz, int repeat)
 
 	/* protect the address range */
 	/* this assumes that ONLY the firmware is protected! */
-	if (idx == IDX_FIRMWARE) {
-		debug ("protect on %lx %lx\n", start, end);
-		sprintf(strbuf, "protect on %lx %lx\n", start, end);
-		parse_string_outer(strbuf,
-			FLAG_PARSE_SEMICOLON | FLAG_EXIT_FROM_LOOP);
-	}
+	if (idx == IDX_FIRMWARE)
+		flash_sect_protect(1, start, end);
 	return 0;
 }
 
@@ -485,42 +486,58 @@ do_auto_update(void)
 	 * now check whether start and end are defined using environment
 	 * variables.
 	 */
-	start = end = 0;
+	start = -1;
+	end = 0;
 	env = getenv("firmware_st");
 	if (env != NULL)
 		start = simple_strtoul(env, NULL, 16);
 	env = getenv("firmware_nd");
 	if (env != NULL)
 		end = simple_strtoul(env, NULL, 16);
-	if (start && end && end > start)
+	if (start >= 0 && end && end > start) {
 		ausize[IDX_FIRMWARE] = (end + 1) - start;
-	start = end = 0;
+		aufl_layout[0].start = start;
+		aufl_layout[0].end = end;
+	}
+	start = -1;
+	end = 0;
 	env = getenv("kernel_st");
 	if (env != NULL)
 		start = simple_strtoul(env, NULL, 16);
 	env = getenv("kernel_nd");
 	if (env != NULL)
 		end = simple_strtoul(env, NULL, 16);
-	if (start && end && end > start)
+	if (start >= 0 && end && end > start) {
 		ausize[IDX_KERNEL] = (end + 1) - start;
-	start = end = 0;
+		aufl_layout[1].start = start;
+		aufl_layout[1].end = end;
+	}
+	start = -1;
+	end = 0;
 	env = getenv("app_st");
 	if (env != NULL)
 		start = simple_strtoul(env, NULL, 16);
 	env = getenv("app_nd");
 	if (env != NULL)
 		end = simple_strtoul(env, NULL, 16);
-	if (start && end && end > start)
+	if (start >= 0 && end && end > start) {
 		ausize[IDX_APP] = (end + 1) - start;
-	start = end = 0;
+		aufl_layout[2].start = start;
+		aufl_layout[2].end = end;
+	}
+	start = -1;
+	end = 0;
 	env = getenv("disk_st");
 	if (env != NULL)
 		start = simple_strtoul(env, NULL, 16);
 	env = getenv("disk_nd");
 	if (env != NULL)
 		end = simple_strtoul(env, NULL, 16);
-	if (start && end && end > start)
+	if (start >= 0 && end && end > start) {
 		ausize[IDX_DISK] = (end + 1) - start;
+		aufl_layout[3].start = start;
+		aufl_layout[3].end = end;
+	}
 	/* make sure that we see CTRL-C and save the old state */
 	old_ctrlc = disable_ctrlc(0);
 
@@ -564,7 +581,7 @@ do_auto_update(void)
 		cnt = 0;
 		got_ctrlc = 0;
 		do {
-			res = au_do_update(i, sz, cnt);
+			res = au_do_update(i, sz);
 			/* let the user break out of the loop */
 			if (ctrlc() || had_ctrlc()) {
 				clear_ctrlc();
@@ -585,6 +602,9 @@ do_auto_update(void)
 		 */
 		if (got_ctrlc == 0)
 			au_update_eeprom(i);
+		else
+			/* enable the power switch */
+			*CPLD_VFD_BK &= ~POWER_OFF;
 	}
 	usb_stop();
 	/* restore the old state */

board/trab/memsetup.S

@@ -104,12 +104,12 @@
 #ifndef CONFIG_RAM_16MB		/* 32 MB RAM */
 /* Bank6 */
 #define	B6_MT	0x3	/* SDRAM */
-#define	B6_Trcd	0x1	/* 3clk */
+#define	B6_Trcd	0x0	/* 2clk */
 #define	B6_SCAN	0x1	/* 9 bit */
 
 /* Bank7 */
 #define	B7_MT	0x3	/* SDRAM */
-#define	B7_Trcd	0x1	/* 3clk */
+#define	B7_Trcd	0x0	/* 2clk */
 #define	B7_SCAN	0x1	/* 9 bit */
 #else	/* CONFIG_RAM_16MB	=  16 MB RAM */
 /* Bank6 */
@@ -178,5 +178,5 @@ SMRDATA:
 #else	/* CONFIG_RAM_16MB	=  16 MB RAM */
 	.word	0x17	/* BUSWIDTH=32, SCLK power saving mode, BANKSIZE 16M/16M */
 #endif	/* CONFIG_RAM_16MB */
-	.word	0x30	/* MRSR6, CL=3clk */
-	.word	0x30	/* MRSR7 */
+	.word	0x20	/* MRSR6, CL=2clk */
+	.word	0x20	/* MRSR7 */

board/trab/rs485.c

@@ -47,8 +47,8 @@ static void rs485_setbrg (void)
 	unsigned int reg = 0;
 
 	/* value is calculated so : (int)(PCLK/16./baudrate) -1 */
-        /* reg = (33000000 / (16 * gd->baudrate)) - 1; */
-        reg = (33000000 / (16 * 38.400)) - 1;
+	/* reg = (33000000 / (16 * gd->baudrate)) - 1; */
+	reg = (33000000 / (16 * 38400)) - 1;
 
 	/* FIFO enable, Tx/Rx FIFO clear */
 	uart->UFCON = 0x07;
@@ -67,18 +67,18 @@ static void rs485_setbrg (void)
 
 static void rs485_cfgio (void)
 {
-        S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
+	S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
 
-        gpio->PFCON &= ~(0x3 << 2);
-        gpio->PFCON |=  (0x2 << 2); /* configure GPF1 as RXD1 */
+	gpio->PFCON &= ~(0x3 << 2);
+	gpio->PFCON |=  (0x2 << 2); /* configure GPF1 as RXD1 */
 
-        gpio->PFCON &= ~(0x3 << 6);
-        gpio->PFCON |=  (0x2 << 6); /* configure GPF3 as TXD1 */
+	gpio->PFCON &= ~(0x3 << 6);
+	gpio->PFCON |=  (0x2 << 6); /* configure GPF3 as TXD1 */
 
-        gpio->PFUP |= (1 << 1); /* disable pullup on GPF1 */
-        gpio->PFUP |= (1 << 3); /* disable pullup on GPF3 */
+	gpio->PFUP |= (1 << 1); /* disable pullup on GPF1 */
+	gpio->PFUP |= (1 << 3); /* disable pullup on GPF3 */
 
-        gpio->PACON &= ~(1 << 11); /* set GPA11 (RS485_DE) to output */
+	gpio->PACON &= ~(1 << 11); /* set GPA11 (RS485_DE) to output */
 }
 
 /*
@@ -88,8 +88,8 @@ static void rs485_cfgio (void)
  */
 int rs485_init (void)
 {
-        rs485_cfgio ();
-        rs485_setbrg ();
+	rs485_cfgio ();
+	rs485_setbrg ();
 
 	return (0);
 }
@@ -168,13 +168,13 @@ static void set_rs485re(unsigned char rs485re_state)
 
 static void set_rs485de(unsigned char rs485de_state)
 {
-        S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
+	S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
 
-        /* This is on PORT A bit 11 */
-        if(rs485de_state)
-                gpio->PADAT |= (1 << 11);
-        else
-                gpio->PADAT &= ~(1 << 11);
+	/* This is on PORT A bit 11 */
+	if(rs485de_state)
+		gpio->PADAT |= (1 << 11);
+	else
+		gpio->PADAT &= ~(1 << 11);
 }
 
 

board/zpc1900/Makefile

@@ -0,0 +1,47 @@
+
+#
+# (C) Copyright 2001
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= lib$(BOARD).a
+
+OBJS	:= $(BOARD).o flash.o
+
+$(LIB):	$(OBJS) $(SOBJS)
+	$(AR) crv $@ $(OBJS)
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+.depend:	Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+		$(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+-include .depend
+
+#########################################################################

board/zpc1900/config.mk

@@ -0,0 +1,31 @@
+#
+# (C) Copyright 2001
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# Modified by, Yuli Barcohen, Arabella Software Ltd. <yuli@arabellasw.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+#
+# ZPC.1900 board
+#
+
+TEXT_BASE = 0xFFF00000
+#TEXT_BASE = 0x03000000

board/zpc1900/flash.c

@@ -0,0 +1,818 @@
+/*
+ * (C) Copyright 2002
+ * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
+ *
+ * Copyright (C) 2003 Arabella Software Ltd.
+ * Yuli Barcohen <yuli@arabellasw.com>
+ * Modified to work with AMD flashes
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/processor.h>
+
+#undef  DEBUG_FLASH
+/*
+ * This file implements a Common Flash Interface (CFI) driver for U-Boot.
+ * The width of the port and the width of the chips are determined at initialization.
+ * These widths are used to calculate the address for access CFI data structures.
+ * It has been tested on an Intel Strataflash implementation and AMD 29F016D.
+ *
+ * References
+ * JEDEC Standard JESD68 - Common Flash Interface (CFI)
+ * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
+ * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
+ * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
+ *
+ * TODO
+ *
+ * Use Primary Extended Query table (PRI) and Alternate Algorithm Query
+ * Table (ALT) to determine if protection is available
+ *
+ * Add support for other command sets Use the PRI and ALT to determine command set
+ * Verify erase and program timeouts.
+ */
+
+#define FLASH_CMD_CFI			0x98
+#define FLASH_CMD_READ_ID		0x90
+#define FLASH_CMD_RESET			0xff
+#define FLASH_CMD_BLOCK_ERASE		0x20
+#define FLASH_CMD_ERASE_CONFIRM		0xD0
+#define FLASH_CMD_WRITE			0x40
+#define FLASH_CMD_PROTECT		0x60
+#define FLASH_CMD_PROTECT_SET		0x01
+#define FLASH_CMD_PROTECT_CLEAR		0xD0
+#define FLASH_CMD_CLEAR_STATUS		0x50
+#define FLASH_CMD_WRITE_TO_BUFFER       0xE8
+#define FLASH_CMD_WRITE_BUFFER_CONFIRM  0xD0
+
+#define FLASH_STATUS_DONE		0x80
+#define FLASH_STATUS_ESS		0x40
+#define FLASH_STATUS_ECLBS		0x20
+#define FLASH_STATUS_PSLBS		0x10
+#define FLASH_STATUS_VPENS		0x08
+#define FLASH_STATUS_PSS		0x04
+#define FLASH_STATUS_DPS		0x02
+#define FLASH_STATUS_R			0x01
+#define FLASH_STATUS_PROTECT		0x01
+
+#define AMD_CMD_RESET			0xF0
+#define AMD_CMD_WRITE			0xA0
+#define AMD_CMD_ERASE_START		0x80
+#define AMD_CMD_ERASE_SECTOR		0x30
+
+#define AMD_STATUS_TOGGLE		0x40
+#define AMD_STATUS_ERROR		0x20
+
+#define FLASH_OFFSET_CFI		0x55
+#define FLASH_OFFSET_CFI_RESP		0x10
+#define FLASH_OFFSET_WTOUT		0x1F
+#define FLASH_OFFSET_WBTOUT             0x20
+#define FLASH_OFFSET_ETOUT		0x21
+#define FLASH_OFFSET_CETOUT             0x22
+#define FLASH_OFFSET_WMAX_TOUT		0x23
+#define FLASH_OFFSET_WBMAX_TOUT         0x24
+#define FLASH_OFFSET_EMAX_TOUT		0x25
+#define FLASH_OFFSET_CEMAX_TOUT         0x26
+#define FLASH_OFFSET_SIZE		0x27
+#define FLASH_OFFSET_INTERFACE          0x28
+#define FLASH_OFFSET_BUFFER_SIZE        0x2A
+#define FLASH_OFFSET_NUM_ERASE_REGIONS	0x2C
+#define FLASH_OFFSET_ERASE_REGIONS	0x2D
+#define FLASH_OFFSET_PROTECT		0x02
+#define FLASH_OFFSET_USER_PROTECTION    0x85
+#define FLASH_OFFSET_INTEL_PROTECTION   0x81
+
+
+#define FLASH_MAN_CFI			0x01000000
+
+
+typedef union {
+	unsigned char c;
+	unsigned short w;
+	unsigned long l;
+} cfiword_t;
+
+typedef union {
+	volatile unsigned char  *cp;
+	volatile unsigned short *wp;
+	volatile unsigned long  *lp;
+} cfiptr_t;
+
+#define NUM_ERASE_REGIONS 4
+
+static ulong bank_base[CFG_MAX_FLASH_BANKS] = CFG_FLASH_BANKS_LIST;
+
+flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips	*/
+
+/*-----------------------------------------------------------------------
+ * Functions
+ */
+
+
+static void flash_add_byte(flash_info_t *info, cfiword_t * cword, uchar c);
+static void flash_make_cmd(flash_info_t * info, uchar cmd, void * cmdbuf);
+static void flash_write_cmd(flash_info_t * info, int sect, uint offset, uchar cmd);
+static void flash_unlock_seq(flash_info_t *info);
+static int flash_isequal(flash_info_t * info, int sect, uint offset, uchar cmd);
+static int flash_isset(flash_info_t * info, int sect, uint offset, uchar cmd);
+static int flash_toggle(flash_info_t * info, int sect, uint offset, uchar cmd);
+static int flash_detect_cfi(flash_info_t * info);
+static ulong flash_get_size (ulong base, int banknum);
+static int flash_write_cfiword (flash_info_t *info, ulong dest, cfiword_t cword);
+static int flash_full_status_check(flash_info_t * info, ulong sector, ulong tout, char * prompt);
+#ifdef CFG_FLASH_USE_BUFFER_WRITE
+static int flash_write_cfibuffer(flash_info_t * info, ulong dest, uchar * cp, int len);
+#endif
+/*-----------------------------------------------------------------------
+ * create an address based on the offset and the port width
+ */
+inline uchar * flash_make_addr(flash_info_t * info, int sect, uint offset)
+{
+	return ((uchar *)(info->start[sect] + (offset * info->portwidth)));
+}
+/*-----------------------------------------------------------------------
+ * read a character at a port width address
+ */
+inline uchar flash_read_uchar(flash_info_t * info, uint offset)
+{
+	uchar *cp;
+	cp = flash_make_addr(info, 0, offset);
+	return (cp[info->portwidth - 1]);
+}
+
+/*-----------------------------------------------------------------------
+ * read a short word by swapping for ppc format.
+ */
+ushort flash_read_ushort(flash_info_t * info, int sect,  uint offset)
+{
+    uchar * addr;
+
+    addr = flash_make_addr(info, sect, offset);
+    return ((addr[(2*info->portwidth) - 1] << 8) | addr[info->portwidth - 1]);
+
+}
+
+/*-----------------------------------------------------------------------
+ * read a long word by picking the least significant byte of each maiximum
+ * port size word. Swap for ppc format.
+ */
+ulong flash_read_long(flash_info_t * info, int sect,  uint offset)
+{
+    uchar * addr;
+
+    addr = flash_make_addr(info, sect, offset);
+    return ( (addr[(2*info->portwidth) - 1] << 24 ) | (addr[(info->portwidth) -1] << 16) |
+	    (addr[(4*info->portwidth) - 1] << 8) | addr[(3*info->portwidth) - 1]);
+
+}
+
+/*-----------------------------------------------------------------------
+ */
+unsigned long flash_init (void)
+{
+	unsigned long size = 0;
+	int i;
+
+	/* Init: no FLASHes known */
+	for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
+		flash_info[i].flash_id = FLASH_UNKNOWN;
+		size += flash_info[i].size = flash_get_size(bank_base[i], i);
+		if (flash_info[i].flash_id == FLASH_UNKNOWN) {
+			printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",
+				i, flash_info[i].size, flash_info[i].size << 20);
+		}
+	}
+
+	/* Monitor protection ON by default */
+#if (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
+	flash_protect(FLAG_PROTECT_SET,
+		      CFG_MONITOR_BASE,
+		      CFG_MONITOR_BASE + monitor_flash_len - 1,
+		      &flash_info[0]);
+#endif
+
+	return (size);
+}
+
+/*-----------------------------------------------------------------------
+ */
+int flash_erase (flash_info_t *info, int s_first, int s_last)
+{
+	int rcode = 0;
+	int prot;
+	int sect;
+
+	if( info->flash_id != FLASH_MAN_CFI) {
+		printf ("Can't erase unknown flash type - aborted\n");
+		return 1;
+	}
+	if ((s_first < 0) || (s_first > s_last)) {
+		printf ("- no sectors to erase\n");
+		return 1;
+	}
+
+	prot = 0;
+	for (sect=s_first; sect<=s_last; ++sect) {
+		if (info->protect[sect]) {
+			prot++;
+		}
+	}
+	if (prot) {
+		printf ("- Warning: %d protected sectors will not be erased!\n",
+			prot);
+	} else {
+		printf ("\n");
+	}
+
+
+	for (sect = s_first; sect<=s_last; sect++) {
+		if (info->protect[sect] == 0) { /* not protected */
+#ifdef INTEL_COMMANDS
+			flash_write_cmd(info, sect, 0, FLASH_CMD_CLEAR_STATUS);
+			flash_write_cmd(info, sect, 0, FLASH_CMD_BLOCK_ERASE);
+			flash_write_cmd(info, sect, 0, FLASH_CMD_ERASE_CONFIRM);
+#else
+			flash_unlock_seq(info);
+			flash_write_cmd(info, sect, 0x555, AMD_CMD_ERASE_START);
+			flash_unlock_seq(info);
+			flash_write_cmd(info, sect, 0, AMD_CMD_ERASE_SECTOR);
+#endif
+
+			if(flash_full_status_check(info, sect, info->erase_blk_tout, "erase")) {
+				rcode = 1;
+			} else
+				printf(".");
+		}
+	}
+	printf (" done\n");
+	return rcode;
+}
+
+/*-----------------------------------------------------------------------
+ */
+void flash_print_info  (flash_info_t *info)
+{
+	int i;
+
+	if (info->flash_id != FLASH_MAN_CFI) {
+		printf ("missing or unknown FLASH type\n");
+		return;
+	}
+
+	printf("CFI conformant FLASH (%d x %d)",
+	       (info->portwidth	 << 3 ), (info->chipwidth  << 3 ));
+	printf ("  Size: %ld MB in %d Sectors\n",
+		info->size >> 20, info->sector_count);
+	printf(" Erase timeout %ld ms, write timeout %ld ms, buffer write timeout %ld ms, buffer size %d\n",
+	       info->erase_blk_tout, info->write_tout, info->buffer_write_tout, info->buffer_size);
+
+	printf ("  Sector Start Addresses:");
+	for (i=0; i<info->sector_count; ++i) {
+		if ((i % 5) == 0)
+			printf ("\n");
+		printf (" %08lX%5s",
+			info->start[i],
+			info->protect[i] ? " (RO)" : " "
+			);
+	}
+	printf ("\n");
+	return;
+}
+
+/*-----------------------------------------------------------------------
+ * Copy memory to flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
+{
+	ulong wp;
+	ulong cp;
+	int aln;
+	cfiword_t cword;
+	int i, rc;
+
+	/* get lower aligned address */
+	wp = (addr & ~(info->portwidth - 1));
+
+	/* handle unaligned start */
+	if((aln = addr - wp) != 0) {
+		cword.l = 0;
+		cp = wp;
+		for(i=0;i<aln; ++i, ++cp)
+			flash_add_byte(info, &cword, (*(uchar *)cp));
+
+		for(; (i< info->portwidth) && (cnt > 0) ; i++) {
+			flash_add_byte(info, &cword, *src++);
+			cnt--;
+			cp++;
+		}
+		for(; (cnt == 0) && (i < info->portwidth); ++i, ++cp)
+			flash_add_byte(info, &cword, (*(uchar *)cp));
+		if((rc = flash_write_cfiword(info, wp, cword)) != 0)
+			return rc;
+		wp = cp;
+	}
+
+#ifdef CFG_FLASH_USE_BUFFER_WRITE
+	while(cnt >= info->portwidth) {
+		i = info->buffer_size > cnt? cnt: info->buffer_size;
+		if((rc = flash_write_cfibuffer(info, wp, src,i)) != ERR_OK)
+			return rc;
+		wp += i;
+		src += i;
+		cnt -=i;
+	}
+#else
+	/* handle the aligned part */
+	while(cnt >= info->portwidth) {
+		cword.l = 0;
+		for(i = 0; i < info->portwidth; i++) {
+			flash_add_byte(info, &cword, *src++);
+		}
+		if((rc = flash_write_cfiword(info, wp, cword)) != 0)
+			return rc;
+		wp += info->portwidth;
+		cnt -= info->portwidth;
+	}
+#endif /* CFG_FLASH_USE_BUFFER_WRITE */
+	if (cnt == 0) {
+		return (0);
+	}
+
+	/*
+	 * handle unaligned tail bytes
+	 */
+	cword.l = 0;
+	for (i=0, cp=wp; (i<info->portwidth) && (cnt>0); ++i, ++cp) {
+		flash_add_byte(info, &cword, *src++);
+		--cnt;
+	}
+	for (; i<info->portwidth; ++i, ++cp) {
+		flash_add_byte(info, & cword, (*(uchar *)cp));
+	}
+
+	return flash_write_cfiword(info, wp, cword);
+}
+
+/*-----------------------------------------------------------------------
+ */
+#ifdef CFG_FLASH_PROTECTION
+
+int flash_real_protect(flash_info_t *info, long sector, int prot)
+{
+	int retcode = 0;
+
+	flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
+	flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT);
+	if(prot)
+		flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT_SET);
+	else
+		flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
+
+	if((retcode = flash_full_status_check(info, sector, info->erase_blk_tout,
+					 prot?"protect":"unprotect")) == 0) {
+
+		info->protect[sector] = prot;
+		/* Intel's unprotect unprotects all locking */
+		if(prot == 0) {
+			int i;
+			for(i = 0 ; i<info->sector_count; i++) {
+				if(info->protect[i])
+					flash_real_protect(info, i, 1);
+			}
+		}
+	}
+
+	return retcode;
+}
+
+#endif /* CFG_FLASH_PROTECTION */
+/*-----------------------------------------------------------------------
+ *  wait for XSR.7 to be set. Time out with an error if it does not.
+ *  This routine does not set the flash to read-array mode.
+ */
+static int flash_status_check(flash_info_t * info, ulong sector, ulong tout, char * prompt)
+{
+	ulong start;
+
+	/* Wait for command completion */
+	start = get_timer (0);
+	while (
+#ifdef INTEL_COMMANDS
+		!flash_isset(info, sector, 0, FLASH_STATUS_DONE)
+#else
+		flash_toggle(info, sector, 0, AMD_STATUS_TOGGLE)
+#endif
+	      ) {
+		if (get_timer(start) > info->erase_blk_tout) {
+			printf("Flash %s timeout at address %lx\n", prompt, info->start[sector]);
+#ifdef INTEL_COMMANDS
+			flash_write_cmd(info, sector, 0, FLASH_CMD_RESET);
+#else
+			flash_write_cmd(info, sector, 0, AMD_CMD_RESET);
+#endif
+			return ERR_TIMOUT;
+		}
+	}
+	return ERR_OK;
+}
+/*-----------------------------------------------------------------------
+ * Wait for XSR.7 to be set, if it times out print an error, otherwise do a full status check.
+ * This routine sets the flash to read-array mode.
+ */
+static int flash_full_status_check(flash_info_t * info, ulong sector, ulong tout, char * prompt)
+{
+	int retcode;
+	retcode = flash_status_check(info, sector, tout, prompt);
+#ifdef INTEL_COMMANDS
+	if((retcode == ERR_OK) && !flash_isequal(info,sector, 0, FLASH_STATUS_DONE)) {
+		retcode = ERR_INVAL;
+		printf("Flash %s error at address %lx\n", prompt,info->start[sector]);
+		if(flash_isset(info, sector, 0, FLASH_STATUS_ECLBS | FLASH_STATUS_PSLBS)){
+			printf("Command Sequence Error.\n");
+		} else if(flash_isset(info, sector, 0, FLASH_STATUS_ECLBS)){
+			printf("Block Erase Error.\n");
+		        retcode = ERR_NOT_ERASED;
+		} else if (flash_isset(info, sector, 0, FLASH_STATUS_PSLBS)) {
+			printf("Locking Error\n");
+		}
+		if(flash_isset(info, sector, 0, FLASH_STATUS_DPS)){
+			printf("Block locked.\n");
+			retcode = ERR_PROTECTED;
+		}
+		if(flash_isset(info, sector, 0, FLASH_STATUS_VPENS))
+			printf("Vpp Low Error.\n");
+	}
+	flash_write_cmd(info, sector, 0, FLASH_CMD_RESET);
+#endif
+	return retcode;
+}
+/*-----------------------------------------------------------------------
+ */
+static void flash_add_byte(flash_info_t *info, cfiword_t * cword, uchar c)
+{
+	switch(info->portwidth) {
+	case FLASH_CFI_8BIT:
+		cword->c = c;
+		break;
+	case FLASH_CFI_16BIT:
+		cword->w = (cword->w << 8) | c;
+		break;
+	case FLASH_CFI_32BIT:
+		cword->l = (cword->l << 8) | c;
+	}
+}
+
+
+/*-----------------------------------------------------------------------
+ * make a proper sized command based on the port and chip widths
+ */
+static void flash_make_cmd(flash_info_t * info, uchar cmd, void * cmdbuf)
+{
+	int i;
+	uchar *cp = (uchar *)cmdbuf;
+	for(i=0; i< info->portwidth; i++)
+		*cp++ = ((i+1) % info->chipwidth) ? '\0':cmd;
+}
+
+/*
+ * Write a proper sized command to the correct address
+ */
+static void flash_write_cmd(flash_info_t * info, int sect, uint offset, uchar cmd)
+{
+
+	volatile cfiptr_t addr;
+	cfiword_t cword;
+	addr.cp = flash_make_addr(info, sect, offset);
+	flash_make_cmd(info, cmd, &cword);
+	switch(info->portwidth) {
+	case FLASH_CFI_8BIT:
+		*addr.cp = cword.c;
+		break;
+	case FLASH_CFI_16BIT:
+		*addr.wp = cword.w;
+		break;
+	case FLASH_CFI_32BIT:
+		*addr.lp = cword.l;
+		break;
+	}
+}
+
+static void flash_unlock_seq(flash_info_t *info)
+{
+	flash_write_cmd(info, 0, 0x555, 0xAA);
+	flash_write_cmd(info, 0, 0x2AA, 0x55);
+}
+/*-----------------------------------------------------------------------
+ */
+static int flash_isequal(flash_info_t * info, int sect, uint offset, uchar cmd)
+{
+	cfiptr_t cptr;
+	cfiword_t cword;
+	int retval;
+	cptr.cp = flash_make_addr(info, sect, offset);
+	flash_make_cmd(info, cmd, &cword);
+	switch(info->portwidth) {
+	case FLASH_CFI_8BIT:
+		retval = (cptr.cp[0] == cword.c);
+		break;
+	case FLASH_CFI_16BIT:
+		retval = (cptr.wp[0] == cword.w);
+		break;
+	case FLASH_CFI_32BIT:
+		retval = (cptr.lp[0] == cword.l);
+		break;
+	default:
+		retval = 0;
+		break;
+	}
+	return retval;
+}
+/*-----------------------------------------------------------------------
+ */
+static int flash_isset(flash_info_t * info, int sect, uint offset, uchar cmd)
+{
+	cfiptr_t cptr;
+	cfiword_t cword;
+	int retval;
+	cptr.cp = flash_make_addr(info, sect, offset);
+	flash_make_cmd(info, cmd, &cword);
+	switch(info->portwidth) {
+	case FLASH_CFI_8BIT:
+		retval = ((cptr.cp[0] & cword.c) == cword.c);
+		break;
+	case FLASH_CFI_16BIT:
+		retval = ((cptr.wp[0] & cword.w) == cword.w);
+		break;
+	case FLASH_CFI_32BIT:
+		retval = ((cptr.lp[0] & cword.l) == cword.l);
+		break;
+	default:
+		retval = 0;
+		break;
+	}
+	return retval;
+}
+
+/*-----------------------------------------------------------------------
+ */
+static int flash_toggle(flash_info_t * info, int sect, uint offset, uchar cmd)
+{
+	cfiptr_t cptr;
+	cfiword_t cword;
+	int retval;
+	cptr.cp = flash_make_addr(info, sect, offset);
+	flash_make_cmd(info, cmd, &cword);
+	switch(info->portwidth) {
+	case FLASH_CFI_8BIT:
+		retval = ((cptr.cp[0] & cword.c) != (cptr.cp[0] & cword.c));
+		break;
+	case FLASH_CFI_16BIT:
+		retval = ((cptr.wp[0] & cword.w) != (cptr.wp[0] & cword.w));
+		break;
+	case FLASH_CFI_32BIT:
+		retval = ((cptr.lp[0] & cword.l) != (cptr.lp[0] & cword.l));
+		break;
+	default:
+		retval = 0;
+		break;
+	}
+	return retval;
+}
+
+/*-----------------------------------------------------------------------
+ * detect if flash is compatible with the Common Flash Interface (CFI)
+ * http://www.jedec.org/download/search/jesd68.pdf
+ *
+*/
+static int flash_detect_cfi(flash_info_t * info)
+{
+
+	for(info->portwidth=FLASH_CFI_8BIT; info->portwidth <= FLASH_CFI_32BIT;
+	    info->portwidth <<= 1) {
+		for(info->chipwidth =FLASH_CFI_BY8;
+		    info->chipwidth <= info->portwidth;
+		    info->chipwidth <<= 1) {
+			flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
+			flash_write_cmd(info, 0, FLASH_OFFSET_CFI, FLASH_CMD_CFI);
+			if(flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP,'Q') &&
+			   flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') &&
+			   flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y'))
+				return 1;
+		}
+	}
+	return 0;
+}
+/*
+ * The following code cannot be run from FLASH!
+ *
+ */
+static ulong flash_get_size (ulong base, int banknum)
+{
+	flash_info_t * info = &flash_info[banknum];
+	int i, j;
+	int sect_cnt;
+	unsigned long sector;
+	unsigned long tmp;
+	int size_ratio;
+	uchar num_erase_regions;
+	int  erase_region_size;
+	int  erase_region_count;
+
+	info->start[0] = base;
+
+	if(flash_detect_cfi(info)){
+		size_ratio = info->portwidth / info->chipwidth;
+		num_erase_regions = flash_read_uchar(info, FLASH_OFFSET_NUM_ERASE_REGIONS);
+#ifdef DEBUG_FLASH
+		printf("found %d erase regions\n", num_erase_regions);
+#endif
+		sect_cnt = 0;
+		sector = base;
+		for(i = 0 ; i < num_erase_regions; i++) {
+			if(i > NUM_ERASE_REGIONS) {
+				printf("%d erase regions found, only %d used\n",
+				       num_erase_regions, NUM_ERASE_REGIONS);
+				break;
+			}
+			tmp = flash_read_long(info, 0, FLASH_OFFSET_ERASE_REGIONS);
+			erase_region_size = (tmp & 0xffff)? ((tmp & 0xffff) * 256): 128;
+			tmp >>= 16;
+			erase_region_count = (tmp & 0xffff) +1;
+			for(j = 0; j< erase_region_count; j++) {
+				info->start[sect_cnt] = sector;
+				sector += (erase_region_size * size_ratio);
+				info->protect[sect_cnt] = flash_isset(info, sect_cnt, FLASH_OFFSET_PROTECT, FLASH_STATUS_PROTECT);
+				sect_cnt++;
+			}
+		}
+
+		info->sector_count = sect_cnt;
+		/* multiply the size by the number of chips */
+		info->size = (1 << flash_read_uchar(info, FLASH_OFFSET_SIZE)) * size_ratio;
+		info->buffer_size = (1 << flash_read_ushort(info, 0, FLASH_OFFSET_BUFFER_SIZE));
+		tmp = 1 << flash_read_uchar(info, FLASH_OFFSET_ETOUT);
+		info->erase_blk_tout = (tmp * (1 << flash_read_uchar(info, FLASH_OFFSET_EMAX_TOUT)));
+		tmp = 1 << flash_read_uchar(info, FLASH_OFFSET_WBTOUT);
+		info->buffer_write_tout = (tmp * (1 << flash_read_uchar(info, FLASH_OFFSET_WBMAX_TOUT)));
+		tmp = 1 << flash_read_uchar(info, FLASH_OFFSET_WTOUT);
+		info->write_tout = (tmp * (1 << flash_read_uchar(info, FLASH_OFFSET_WMAX_TOUT)))/ 1000;
+		info->flash_id = FLASH_MAN_CFI;
+	}
+
+	flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
+	return(info->size);
+}
+
+
+/*-----------------------------------------------------------------------
+ */
+static int flash_write_cfiword (flash_info_t *info, ulong dest, cfiword_t cword)
+{
+
+	cfiptr_t ctladdr;
+	cfiptr_t cptr;
+	int flag;
+
+	ctladdr.cp = flash_make_addr(info, 0, 0);
+	cptr.cp = (uchar *)dest;
+
+
+	/* Check if Flash is (sufficiently) erased */
+	switch(info->portwidth) {
+	case FLASH_CFI_8BIT:
+		flag = ((cptr.cp[0] & cword.c) == cword.c);
+		break;
+	case FLASH_CFI_16BIT:
+		flag = ((cptr.wp[0] & cword.w) == cword.w);
+		break;
+	case FLASH_CFI_32BIT:
+		flag = ((cptr.lp[0] & cword.l)	== cword.l);
+		break;
+	default:
+		return 2;
+	}
+	if(!flag)
+		return 2;
+
+	/* Disable interrupts which might cause a timeout here */
+	flag = disable_interrupts();
+
+#ifdef INTEL_COMMANDS
+	flash_write_cmd(info, 0, 0, FLASH_CMD_CLEAR_STATUS);
+	flash_write_cmd(info, 0, 0, FLASH_CMD_WRITE);
+#else
+	flash_unlock_seq(info);
+	flash_write_cmd(info, 0, 0x555, AMD_CMD_WRITE);
+#endif
+
+	switch(info->portwidth) {
+	case FLASH_CFI_8BIT:
+		cptr.cp[0] = cword.c;
+		break;
+	case FLASH_CFI_16BIT:
+		cptr.wp[0] = cword.w;
+		break;
+	case FLASH_CFI_32BIT:
+		cptr.lp[0] = cword.l;
+		break;
+	}
+
+	/* re-enable interrupts if necessary */
+	if(flag)
+		enable_interrupts();
+
+	return flash_full_status_check(info, 0, info->write_tout, "write");
+}
+
+#ifdef CFG_FLASH_USE_BUFFER_WRITE
+
+/* loop through the sectors from the highest address
+ * when the passed address is greater or equal to the sector address
+ * we have a match
+ */
+static int find_sector(flash_info_t *info, ulong addr)
+{
+	int sector;
+	for(sector = info->sector_count - 1; sector >= 0; sector--) {
+		if(addr >= info->start[sector])
+			break;
+	}
+	return sector;
+}
+
+static int flash_write_cfibuffer(flash_info_t * info, ulong dest, uchar * cp, int len)
+{
+
+	int sector;
+	int cnt;
+	int retcode;
+	volatile cfiptr_t src;
+	volatile cfiptr_t dst;
+
+	src.cp = cp;
+	dst.cp = (uchar *)dest;
+	sector = find_sector(info, dest);
+	flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
+	flash_write_cmd(info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER);
+	if((retcode = flash_status_check(info, sector, info->buffer_write_tout,
+					 "write to buffer")) == ERR_OK) {
+		switch(info->portwidth) {
+		case FLASH_CFI_8BIT:
+			cnt = len;
+			break;
+		case FLASH_CFI_16BIT:
+			cnt = len >> 1;
+			break;
+		case FLASH_CFI_32BIT:
+			cnt = len >> 2;
+			break;
+		default:
+			return ERR_INVAL;
+			break;
+		}
+		flash_write_cmd(info, sector, 0, (uchar)cnt-1);
+		while(cnt-- > 0) {
+			switch(info->portwidth) {
+			case FLASH_CFI_8BIT:
+				*dst.cp++ = *src.cp++;
+				break;
+			case FLASH_CFI_16BIT:
+				*dst.wp++ = *src.wp++;
+				break;
+			case FLASH_CFI_32BIT:
+				*dst.lp++ = *src.lp++;
+				break;
+			default:
+				return ERR_INVAL;
+				break;
+			}
+		}
+		flash_write_cmd(info, sector, 0, FLASH_CMD_WRITE_BUFFER_CONFIRM);
+		retcode = flash_full_status_check(info, sector, info->buffer_write_tout,
+					     "buffer write");
+	}
+	flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
+	return retcode;
+}
+#endif /* CFG_USE_FLASH_BUFFER_WRITE */

board/zpc1900/u-boot.lds

@@ -0,0 +1,122 @@
+/*
+ * (C) Copyright 2001
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * Modified by Yuli Barcohen <yuli@arabellasw.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+SECTIONS
+{
+  /* Read-only sections, merged into text segment: */
+  . = + SIZEOF_HEADERS;
+  .interp : { *(.interp) }
+  .hash          : { *(.hash)		}
+  .dynsym        : { *(.dynsym)		}
+  .dynstr        : { *(.dynstr)		}
+  .rel.text      : { *(.rel.text)		}
+  .rela.text     : { *(.rela.text) 	}
+  .rel.data      : { *(.rel.data)		}
+  .rela.data     : { *(.rela.data) 	}
+  .rel.rodata    : { *(.rel.rodata) 	}
+  .rela.rodata   : { *(.rela.rodata) 	}
+  .rel.got       : { *(.rel.got)		}
+  .rela.got      : { *(.rela.got)		}
+  .rel.ctors     : { *(.rel.ctors)	}
+  .rela.ctors    : { *(.rela.ctors)	}
+  .rel.dtors     : { *(.rel.dtors)	}
+  .rela.dtors    : { *(.rela.dtors)	}
+  .rel.bss       : { *(.rel.bss)		}
+  .rela.bss      : { *(.rela.bss)		}
+  .rel.plt       : { *(.rel.plt)		}
+  .rela.plt      : { *(.rela.plt)		}
+  .init          : { *(.init)	}
+  .plt : { *(.plt) }
+  .text      :
+  {
+    cpu/mpc8260/start.o	(.text)
+    *(.text)
+    *(.fixup)
+    *(.got1)
+    . = ALIGN(16);
+    *(.rodata)
+    *(.rodata1)
+    *(.rodata.str1.4)
+  }
+  .fini      : { *(.fini)    } =0
+  .ctors     : { *(.ctors)   }
+  .dtors     : { *(.dtors)   }
+
+  /* Read-write section, merged into data segment: */
+  . = (. + 0x0FFF) & 0xFFFFF000;
+  _erotext = .;
+  PROVIDE (erotext = .);
+  .reloc   :
+  {
+    *(.got)
+    _GOT2_TABLE_ = .;
+    *(.got2)
+    _FIXUP_TABLE_ = .;
+    *(.fixup)
+  }
+  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
+  __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
+
+  .data    :
+  {
+    *(.data)
+    *(.data1)
+    *(.sdata)
+    *(.sdata2)
+    *(.dynamic)
+    CONSTRUCTORS
+  }
+  _edata  =  .;
+  PROVIDE (edata = .);
+
+  __u_boot_cmd_start = .;
+  .u_boot_cmd : { *(.u_boot_cmd) }
+  __u_boot_cmd_end = .;
+
+
+  __start___ex_table = .;
+  __ex_table : { *(__ex_table) }
+  __stop___ex_table = .;
+
+  . = ALIGN(4096);
+  __init_begin = .;
+  .text.init : { *(.text.init) }
+  .data.init : { *(.data.init) }
+  . = ALIGN(4096);
+  __init_end = .;
+
+  __bss_start = .;
+  .bss       :
+  {
+   *(.sbss) *(.scommon)
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+  }
+  _end = . ;
+  PROVIDE (end = .);
+}
+ENTRY(_start)

board/zpc1900/zpc1900.c

@@ -0,0 +1,308 @@
+/*
+ * (C) Copyright 2001-2003
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * (C) Copyright 2003 Arabella Software Ltd.
+ * Yuli Barcohen <yuli@arabellasw.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <ioports.h>
+#include <mpc8260.h>
+#include <asm/m8260_pci.h>
+#include <i2c.h>
+#include <spd.h>
+#include <miiphy.h>
+
+/*
+ * I/O Port configuration table
+ *
+ * if conf is 1, then that port pin will be configured at boot time
+ * according to the five values podr/pdir/ppar/psor/pdat for that entry
+ */
+
+const iop_conf_t iop_conf_tab[4][32] = {
+
+    /* Port A */
+    {	/*	      conf ppar psor pdir podr pdat */
+	/* PA31 */ {   0,   1,   0,   1,   0,   0   }, /* FCC1 TxENB  */
+	/* PA30 */ {   0,   1,   0,   0,   0,   0   }, /* FCC1 TxClav */
+	/* PA29 */ {   0,   1,   0,   1,   0,   0   }, /* FCC1 TxSOC  */
+	/* PA28 */ {   0,   1,   0,   1,   0,   0   }, /* FCC1 RxENB  */
+	/* PA27 */ {   0,   1,   0,   0,   0,   0   }, /* FCC1 RxSOC  */
+	/* PA26 */ {   0,   1,   0,   0,   0,   0   }, /* FCC1 RxClav */
+	/* PA25 */ {   0,   1,   0,   1,   0,   0   }, /* FCC1 ATMTXD[0] */
+	/* PA24 */ {   0,   1,   0,   1,   0,   0   }, /* FCC1 ATMTXD[1] */
+	/* PA23 */ {   0,   1,   0,   1,   0,   0   }, /* FCC1 ATMTXD[2] */
+	/* PA22 */ {   0,   1,   0,   1,   0,   0   }, /* FCC1 ATMTXD[3] */
+	/* PA21 */ {   0,   1,   0,   1,   0,   0   }, /* FCC1 ATMTXD[4] */
+	/* PA20 */ {   0,   1,   0,   1,   0,   0   }, /* FCC1 ATMTXD[5] */
+	/* PA19 */ {   0,   1,   0,   1,   0,   0   }, /* FCC1 ATMTXD[6] */
+	/* PA18 */ {   0,   1,   0,   1,   0,   0   }, /* FCC1 ATMTXD[7] */
+	/* PA17 */ {   0,   1,   0,   0,   0,   0   }, /* FCC1 ATMRXD[7] */
+	/* PA16 */ {   0,   1,   0,   0,   0,   0   }, /* FCC1 ATMRXD[6] */
+	/* PA15 */ {   0,   1,   0,   0,   0,   0   }, /* FCC1 ATMRXD[5] */
+	/* PA14 */ {   0,   1,   0,   0,   0,   0   }, /* FCC1 ATMRXD[4] */
+	/* PA13 */ {   0,   1,   0,   0,   0,   0   }, /* FCC1 ATMRXD[3] */
+	/* PA12 */ {   0,   1,   0,   0,   0,   0   }, /* FCC1 ATMRXD[2] */
+	/* PA11 */ {   0,   1,   0,   0,   0,   0   }, /* FCC1 ATMRXD[1] */
+	/* PA10 */ {   0,   1,   0,   0,   0,   0   }, /* FCC1 ATMRXD[0] */
+	/* PA9  */ {   0,   1,   1,   1,   0,   0   }, /* SMC2 TXD */
+	/* PA8  */ {   0,   1,   1,   0,   0,   0   }, /* SMC2 RXD */
+	/* PA7  */ {   0,   0,   0,   0,   0,   0   }, /* PA7 */
+	/* PA6  */ {   0,   0,   0,   0,   0,   0   }, /* PA6 */
+	/* PA5  */ {   0,   0,   0,   0,   0,   0   }, /* PA5 */
+	/* PA4  */ {   0,   0,   0,   0,   0,   0   }, /* PA4 */
+	/* PA3  */ {   0,   0,   0,   0,   0,   0   }, /* PA3 */
+	/* PA2  */ {   0,   0,   0,   0,   0,   0   }, /* PA2 */
+	/* PA1  */ {   0,   0,   0,   0,   0,   0   }, /* PA1 */
+	/* PA0  */ {   0,   0,   0,   0,   0,   0   }  /* PA0 */
+    },
+
+    /* Port B */
+    {   /*	      conf ppar psor pdir podr pdat */
+	/* PB31 */ {   1,   1,   0,   1,   0,   0   }, /* FCC2 MII TX_ER  */
+	/* PB30 */ {   1,   1,   0,   0,   0,   0   }, /* FCC2 MII RX_DV  */
+	/* PB29 */ {   1,   1,   1,   1,   0,   0   }, /* FCC2 MII TX_EN  */
+	/* PB28 */ {   1,   1,   0,   0,   0,   0   }, /* FCC2 MII RX_ER  */
+	/* PB27 */ {   1,   1,   0,   0,   0,   0   }, /* FCC2 MII COL    */
+	/* PB26 */ {   1,   1,   0,   0,   0,   0   }, /* FCC2 MII CRS    */
+	/* PB25 */ {   1,   1,   0,   1,   0,   0   }, /* FCC2 MII TxD[3] */
+	/* PB24 */ {   1,   1,   0,   1,   0,   0   }, /* FCC2 MII TxD[2] */
+	/* PB23 */ {   1,   1,   0,   1,   0,   0   }, /* FCC2 MII TxD[1] */
+	/* PB22 */ {   1,   1,   0,   1,   0,   0   }, /* FCC2 MII TxD[0] */
+	/* PB21 */ {   1,   1,   0,   0,   0,   0   }, /* FCC2 MII RxD[0] */
+	/* PB20 */ {   1,   1,   0,   0,   0,   0   }, /* FCC2 MII RxD[1] */
+	/* PB19 */ {   1,   1,   0,   0,   0,   0   }, /* FCC2 MII RxD[2] */
+	/* PB18 */ {   1,   1,   0,   0,   0,   0   }, /* FCC2 MII RxD[3] */
+	/* PB17 */ {   0,   1,   0,   0,   0,   0   }, /* FCC3:RX_DIV */
+	/* PB16 */ {   0,   1,   0,   0,   0,   0   }, /* FCC3:RX_ERR */
+	/* PB15 */ {   0,   1,   0,   1,   0,   0   }, /* FCC3:TX_ERR */
+	/* PB14 */ {   0,   1,   0,   1,   0,   0   }, /* FCC3:TX_EN  */
+	/* PB13 */ {   0,   1,   0,   0,   0,   0   }, /* FCC3:COL */
+	/* PB12 */ {   0,   1,   0,   0,   0,   0   }, /* FCC3:CRS */
+	/* PB11 */ {   0,   1,   0,   0,   0,   0   }, /* FCC3:RXD */
+	/* PB10 */ {   0,   1,   0,   0,   0,   0   }, /* FCC3:RXD */
+	/* PB9  */ {   0,   1,   0,   0,   0,   0   }, /* FCC3:RXD */
+	/* PB8  */ {   0,   1,   0,   0,   0,   0   }, /* FCC3:RXD */
+	/* PB7  */ {   0,   1,   0,   1,   0,   0   }, /* FCC3:TXD */
+	/* PB6  */ {   0,   1,   0,   1,   0,   0   }, /* FCC3:TXD */
+	/* PB5  */ {   0,   1,   0,   1,   0,   0   }, /* FCC3:TXD */
+	/* PB4  */ {   0,   1,   0,   1,   0,   0   }, /* FCC3:TXD */
+	/* PB3  */ {   0,   0,   0,   0,   0,   0   }, /* pin doesn't exist */
+	/* PB2  */ {   0,   0,   0,   0,   0,   0   }, /* pin doesn't exist */
+	/* PB1  */ {   0,   0,   0,   0,   0,   0   }, /* pin doesn't exist */
+	/* PB0  */ {   0,   0,   0,   0,   0,   0   }  /* pin doesn't exist */
+    },
+
+    /* Port C */
+    {   /*	      conf ppar psor pdir podr pdat */
+	/* PC31 */ {   0,   0,   0,   0,   0,   0   }, /* PC31 */
+	/* PC30 */ {   0,   0,   0,   0,   0,   0   }, /* PC30 */
+	/* PC29 */ {   0,   1,   1,   0,   0,   0   }, /* SCC1 EN CLSN */
+	/* PC28 */ {   0,   0,   0,   0,   0,   0   }, /* PC28 */
+	/* PC27 */ {   0,   0,   0,   0,   0,   0   }, /* PC27 */
+	/* PC26 */ {   0,   0,   0,   0,   0,   0   }, /* PC26 */
+	/* PC25 */ {   0,   0,   0,   0,   0,   0   }, /* PC25 */
+	/* PC24 */ {   0,   0,   0,   0,   0,   0   }, /* PC24 */
+	/* PC23 */ {   0,   1,   0,   0,   0,   0   }, /* SCC1 EN RXCLK */
+	/* PC22 */ {   0,   1,   0,   0,   0,   0   }, /* SCC1 EN TXCLK */
+	/* PC21 */ {   0,   0,   0,   0,   0,   0   }, /* PC21 */
+	/* PC20 */ {   0,   0,   0,   0,   0,   0   }, /* PC20 */
+	/* PC19 */ {   1,   1,   0,   0,   0,   0   }, /* FCC2 MII Rx Clock (CLK13) */
+	/* PC18 */ {   1,   1,   0,   0,   0,   0   }, /* FCC2 MII Tx Clock (CLK14) */
+	/* PC17 */ {   0,   0,   0,   0,   0,   0   }, /* PC17 */
+	/* PC16 */ {   0,   0,   0,   0,   0,   0   }, /* PC16 */
+	/* PC15 */ {   0,   0,   0,   0,   0,   0   }, /* PC15 */
+	/* PC14 */ {   0,   1,   0,   0,   0,   0   }, /* SCC1 EN RENA */
+	/* PC13 */ {   0,   0,   0,   0,   0,   0   }, /* PC13 */
+	/* PC12 */ {   0,   0,   0,   0,   0,   0   }, /* PC12 */
+	/* PC11 */ {   0,   0,   0,   0,   0,   0   }, /* PC11 */
+	/* PC10 */ {   1,   0,   0,   1,   0,   0   }, /* LXT972 MDC */
+	/* PC9  */ {   1,   0,   0,   0,   0,   0   }, /* LXT972 MDIO */
+	/* PC8  */ {   0,   0,   0,   0,   0,   0   }, /* PC8 */
+	/* PC7  */ {   0,   0,   0,   0,   0,   0   }, /* PC7 */
+	/* PC6  */ {   0,   0,   0,   0,   0,   0   }, /* PC6 */
+	/* PC5  */ {   0,   0,   0,   0,   0,   0   }, /* PC5 */
+	/* PC4  */ {   0,   0,   0,   0,   0,   0   }, /* PC4 */
+	/* PC3  */ {   0,   0,   0,   0,   0,   0   }, /* PC3 */
+	/* PC2  */ {   0,   0,   0,   0,   0,   0   }, /* PC2 */
+	/* PC1  */ {   0,   0,   0,   0,   0,   0   }, /* PC1 */
+	/* PC0  */ {   0,   0,   0,   0,   0,   0   }, /* PC0 */
+    },
+
+    /* Port D */
+    {   /*	      conf ppar psor pdir podr pdat */
+	/* PD31 */ {   0,   1,   0,   0,   0,   0   }, /* SCC1 EN RxD  */
+	/* PD30 */ {   0,   1,   1,   1,   0,   0   }, /* SCC1 EN TxD  */
+	/* PD29 */ {   0,   1,   0,   1,   0,   0   }, /* SCC1 EN TENA */
+	/* PD28 */ {   0,   0,   0,   0,   0,   0   }, /* PD28 */
+	/* PD27 */ {   0,   0,   0,   0,   0,   0   }, /* PD27 */
+	/* PD26 */ {   0,   0,   0,   0,   0,   0   }, /* PD26 */
+	/* PD25 */ {   0,   0,   0,   0,   0,   0   }, /* PD25 */
+	/* PD24 */ {   0,   0,   0,   0,   0,   0   }, /* PD24 */
+	/* PD23 */ {   0,   0,   0,   0,   0,   0   }, /* PD23 */
+	/* PD22 */ {   0,   0,   0,   0,   0,   0   }, /* PD22 */
+	/* PD21 */ {   0,   0,   0,   0,   0,   0   }, /* PD21 */
+	/* PD20 */ {   0,   0,   0,   0,   0,   0   }, /* PD20 */
+	/* PD19 */ {   0,   0,   0,   0,   0,   0   }, /* PD19 */
+	/* PD18 */ {   0,   0,   0,   0,   0,   0   }, /* PD18 */
+	/* PD17 */ {   0,   1,   0,   0,   0,   0   }, /* FCC1 ATMRXPRTY */
+	/* PD16 */ {   0,   1,   0,   1,   0,   0   }, /* FCC1 ATMTXPRTY */
+	/* PD15 */ {   1,   1,   1,   0,   1,   0   }, /* I2C SDA */
+	/* PD14 */ {   1,   1,   1,   0,   1,   0   }, /* I2C SCL */
+	/* PD13 */ {   0,   0,   0,   0,   0,   0   }, /* PD13 */
+	/* PD12 */ {   0,   0,   0,   0,   0,   0   }, /* PD12 */
+	/* PD11 */ {   0,   0,   0,   0,   0,   0   }, /* PD11 */
+	/* PD10 */ {   0,   0,   0,   0,   0,   0   }, /* PD10 */
+	/* PD9  */ {   1,   1,   0,   1,   0,   0   }, /* SMC1 TXD */
+	/* PD8  */ {   1,   1,   0,   0,   0,   0   }, /* SMC1 RXD */
+	/* PD7  */ {   0,   0,   0,   0,   0,   0   }, /* PD7 */
+	/* PD6  */ {   0,   0,   0,   0,   0,   0   }, /* PD6 */
+	/* PD5  */ {   0,   0,   0,   0,   0,   0   }, /* PD5 */
+	/* PD4  */ {   0,   0,   0,   0,   0,   0   }, /* PD4 */
+	/* PD3  */ {   0,   0,   0,   0,   0,   0   }, /* pin doesn't exist */
+	/* PD2  */ {   0,   0,   0,   0,   0,   0   }, /* pin doesn't exist */
+	/* PD1  */ {   0,   0,   0,   0,   0,   0   }, /* pin doesn't exist */
+	/* PD0  */ {   0,   0,   0,   0,   0,   0   }  /* pin doesn't exist */
+    }
+};
+
+#ifdef CFG_NVRAM_ACCESS_ROUTINE
+void *nvram_read(void *dest, long src, size_t count)
+{
+	return memcpy(dest, (const void *)src, count);
+}
+
+void nvram_write(long dest, const void *src, size_t count)
+{
+	vu_char     *p1 = (vu_char *)(CFG_EEPROM + 0x1555);
+	vu_char     *p2 = (vu_char *)(CFG_EEPROM + 0x0AAA);
+	vu_char     *d = (vu_char *)dest;
+	const uchar *s = (const uchar *)src;
+
+	/* Unprotect the EEPROM */
+	*p1 = 0xAA;
+	*p2 = 0x55;
+	*p1 = 0x80;
+	*p1 = 0xAA;
+	*p2 = 0x55;
+	*p1 = 0x20;
+	udelay(10000);
+
+	/* Write the data to the EEPROM */
+	while (count--) {
+		*d++ = *s++;
+		while (*(d - 1) != *(s - 1))
+			/* wait */;
+	}
+
+	/* Protect the EEPROM */
+	*p1 = 0xAA;
+	*p2 = 0x55;
+	*p1 = 0xA0;
+	udelay(10000);
+}
+#endif /* CFG_NVRAM_ACCESS_ROUTINE */
+
+long int initdram(int board_type)
+{
+	vu_char *bcsr = (vu_char *)CFG_BCSR;
+	volatile immap_t *immap = (immap_t *)CFG_IMMR;
+	volatile memctl8260_t *memctl = &immap->im_memctl;
+	vu_char *ramaddr;
+	uchar c = 0xFF;
+	long int msize = CFG_SDRAM_SIZE;
+	uint psdmr = CFG_PSDMR;
+	int i;
+
+	if (bcsr[4] & BCSR_PCI_MODE) { /* PCI mode selected by JP9 */
+		immap->im_clkrst.car_sccr |= M826X_SCCR_PCI_MODE_EN;
+		immap->im_siu_conf.sc_siumcr =
+			(immap->im_siu_conf.sc_siumcr & ~SIUMCR_LBPC11)
+			| SIUMCR_LBPC01;
+	}
+
+#ifndef CFG_RAMBOOT
+	immap->im_siu_conf.sc_ppc_acr  = 0x03;
+	immap->im_siu_conf.sc_ppc_alrh = 0x30126745;
+	immap->im_siu_conf.sc_tescr1   = 0x00004000;
+
+	memctl->memc_mptpr = CFG_MPTPR;
+
+#ifdef CFG_LSDRAM_BASE
+	/*
+	  Initialise local bus SDRAM only if the pins
+	  are configured as local bus pins and not as PCI.
+	*/
+	if ((immap->im_siu_conf.sc_siumcr & SIUMCR_LBPC11) == SIUMCR_LBPC00) {
+		memctl->memc_lsrt  = CFG_LSRT;
+		memctl->memc_or4   = 0xFFC01480;
+		memctl->memc_br4   = CFG_LSDRAM_BASE | 0x00001861;
+		memctl->memc_lsdmr = CFG_LSDMR | PSDMR_OP_PREA;
+		ramaddr = (vu_char *)CFG_LSDRAM_BASE;
+		*ramaddr = c;
+		memctl->memc_lsdmr = CFG_LSDMR | PSDMR_OP_CBRR;
+		for (i = 0; i < 8; i++)
+			*ramaddr = c;
+		memctl->memc_lsdmr = CFG_LSDMR | PSDMR_OP_MRW;
+		*ramaddr = c;
+		memctl->memc_lsdmr = CFG_LSDMR | PSDMR_RFEN;
+	}
+#endif /* CFG_LSDRAM_BASE */
+
+	/* Initialise 60x bus SDRAM */
+	memctl->memc_psrt = CFG_PSRT;
+	memctl->memc_or2  = 0xFC0028C0;
+	memctl->memc_br2  = CFG_SDRAM_BASE | 0x00000041;
+	/*
+	 * The mode data for Mode Register Write command must appear on
+	 * the address lines during a mode-set cycle. It is driven by
+	 * the memory controller, in single PowerQUICC II mode,
+	 * according to PSDMR[CL] and PSDMR[BL] fields. In
+	 * 60x-compatible mode, software must drive the correct value on
+	 * the address lines. BL=0 because for 64-bit port size burst
+	 * length must be 4.
+	 */
+	ramaddr = (vu_char *)(CFG_SDRAM_BASE |
+			      ((psdmr & PSDMR_CL_MSK) << 7) | 0x10);
+	memctl->memc_psdmr = psdmr | PSDMR_OP_PREA; /* Precharge all banks */
+	*ramaddr = c;
+	memctl->memc_psdmr = psdmr | PSDMR_OP_CBRR; /* CBR refresh */
+	for (i = 0; i < 8; i++)
+		*ramaddr = c;
+	memctl->memc_psdmr = psdmr | PSDMR_OP_MRW;  /* Mode Register write */
+	*ramaddr = c;
+	memctl->memc_psdmr = psdmr | PSDMR_RFEN;    /* Refresh enable */
+	*ramaddr = c;
+#endif /* CFG_RAMBOOT */
+
+	/* Return total 60x bus SDRAM size */
+	return msize * 1024 * 1024;
+}
+
+int checkboard(void)
+{
+	vu_char *bcsr = (vu_char *)CFG_BCSR;
+
+	printf("Board: Zephyr ZPC.1900 Rev. %c\n", bcsr[2] + 0x40);
+	return 0;
+}

common/cmd_bdinfo.c

@@ -95,6 +95,33 @@ int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	return 0;
 }
 
+#elif defined(CONFIG_NIOS) /* NIOS*/
+
+int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+	DECLARE_GLOBAL_DATA_PTR;
+
+	int i;
+	bd_t *bd = gd->bd;
+
+	print_num ("memstart",		(ulong)bd->bi_memstart);
+	print_num ("memsize",		(ulong)bd->bi_memsize);
+	print_num ("flashstart",	(ulong)bd->bi_flashstart);
+	print_num ("flashsize",		(ulong)bd->bi_flashsize);
+	print_num ("flashoffset",	(ulong)bd->bi_flashoffset);
+
+	printf ("ethaddr     =");
+	for (i=0; i<6; ++i) {
+		printf ("%c%02X", i ? ':' : ' ', bd->bi_enetaddr[i]);
+	}
+	printf ("\nip_addr     = ");
+	print_IPaddr (bd->bi_ip_addr);
+	printf ("\nbaudrate    = %ld bps\n", bd->bi_baudrate);
+
+	return 0;
+}
+
+
 #else /* ! PPC, which leaves MIPS */
 
 int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])

common/cmd_boot.c

@@ -59,7 +59,14 @@ int do_go (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	 */
 	argv[0] = (char *)gd;
 #endif
+#if !defined(CONFIG_NIOS)
 	rc = ((ulong (*)(int, char *[]))addr) (--argc, &argv[1]);
+#else
+	/*
+	 * Nios function pointers are address >> 1
+	 */
+	rc = ((ulong (*)(int, char *[]))(addr>>1)) (--argc, &argv[1]);
+#endif
 	if (rc != 0) rcode = 1;
 
 	printf ("## Application terminated, rc = 0x%lX\n", rc);

common/cmd_bootm.c

@@ -235,6 +235,8 @@ int do_bootm (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	if (hdr->ih_arch != IH_CPU_I386)
 #elif defined(__mips__)
 	if (hdr->ih_arch != IH_CPU_MIPS)
+#elif defined(__nios__)
+	if (hdr->ih_arch != IH_CPU_NIOS)
 #else
 # error Unknown CPU type
 #endif
@@ -247,6 +249,10 @@ int do_bootm (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 
 	switch (hdr->ih_type) {
 	case IH_TYPE_STANDALONE:	name = "Standalone Application";
+					/* A second argument overwrites the load address */
+					if (argc > 2) {
+						hdr->ih_load = simple_strtoul(argv[2], NULL, 16);
+					}
 					break;
 	case IH_TYPE_KERNEL:		name = "Kernel Image";
 					break;
@@ -347,8 +353,12 @@ int do_bootm (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 		/* load (and uncompress), but don't start if "autostart"
 		 * is set to "no"
 		 */
-		if (((s = getenv("autostart")) != NULL) && (strcmp(s,"no") == 0))
+		if (((s = getenv("autostart")) != NULL) && (strcmp(s,"no") == 0)) {
+			char buf[32];
+			sprintf(buf, "%lX", len);
+			setenv("filesize", buf);
 			return 0;
+		}
 		appl = (int (*)(cmd_tbl_t *, int, int, char *[]))ntohl(hdr->ih_ep);
 		(*appl)(cmdtp, flag, argc-1, &argv[1]);
 		return 0;

common/cmd_fat.c

@@ -74,6 +74,7 @@ int do_fat_fsload (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	long size;
 	unsigned long offset;
 	unsigned long count;
+	char buf [12];
 	block_dev_desc_t *dev_desc=NULL;
 	int dev=0;
 	int part=1;
@@ -107,11 +108,15 @@ int do_fat_fsload (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 		count = 0;
 	size = file_fat_read (argv[4], (unsigned char *) offset, count);
 
-	if(size==-1)
+	if(size==-1) {
 		printf("\n** Unable to read \"%s\" from %s %d:%d **\n",argv[4],argv[1],dev,part);
-	else
+	} else {
 		printf ("\n%ld bytes read\n", size);
 
+		sprintf(buf, "%lX", size);
+		setenv("filesize", buf);
+	}
+
 	return size;
 }
 

common/cmd_fdos.c

@@ -43,7 +43,7 @@ int do_fdosboot(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
     char *ep;
     int size;
     int rcode = 0;
-    char buf [10];
+    char buf [12];
     int drive = CFG_FDC_DRIVE_NUMBER;
 
     /* pre-set load_addr */

common/console.c

@@ -488,8 +488,10 @@ int console_init_r (void)
 	int i, items = ListNumItems (devlist);
 
 #ifdef CONFIG_SPLASH_SCREEN
-	/* suppress all output if splash screen is enabled */
-	outputdev = search_device (DEV_FLAGS_OUTPUT, "nulldev");
+	/* suppress all output if splash screen is enabled and we have
+           a bmp to display                                            */
+	if (getenv("splashimage") != NULL)
+		outputdev = search_device (DEV_FLAGS_OUTPUT, "nulldev");
 #endif
 
 	/* Scan devices looking for input and output devices */

common/miiphyutil.c

@@ -169,4 +169,27 @@ int miiphy_duplex (unsigned char addr)
 	}
 }
 
+#ifdef CFG_FAULT_ECHO_LINK_DOWN
+/*****************************************************************************
+ *
+ * Determine link status
+ */
+int miiphy_link (unsigned char addr)
+{
+	unsigned short reg;
+
+	if (miiphy_read (addr, PHY_BMSR, &reg)) {
+		printf ("PHY_BMSR read failed, assuming no link\n");
+		return (0);
+	}
+
+	/* Determine if a link is active */
+	if ((reg & PHY_BMSR_LS) != 0) {
+		return (1);
+	} else {
+		return (0);
+	}
+}
+#endif
+
 #endif /* CONFIG_MII || (CONFIG_COMMANDS & CFG_CMD_MII) */

cpu/arm920t/usb_ohci.c

@@ -51,8 +51,6 @@
 #define	OHCI_CONTROL_INIT \
 	(OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
 
-#define OHCI_UNLINK_TIMEOUT	(CFG_HZ / 10)
-
 #define readl(a) (*((vu_long *)(a)))
 #define writel(a, b) (*((vu_long *)(b)) = ((vu_long)a))
 
@@ -85,6 +83,10 @@ struct ohci_hcca *phcca;
 struct ohci_device ohci_dev;
 /* urb_priv */
 urb_priv_t urb_priv;
+/* RHSC flag */
+int got_rhsc;
+/* device which was disconnected */
+struct usb_device *devgone;
 
 /*-------------------------------------------------------------------------*/
 
@@ -952,8 +954,29 @@ static unsigned char root_hub_str_index1[] =
 
 /* request to virtual root hub */
 
-static int ohci_submit_rh_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
-		int transfer_len, struct devrequest *cmd)
+int rh_check_port_status(ohci_t *controller)
+{
+	__u32 temp, ndp, i;
+	int res;
+
+	res = -1;
+	temp = roothub_a (controller);
+	ndp = (temp & RH_A_NDP);
+	for (i = 0; i < ndp; i++) {
+		temp = roothub_portstatus (controller, i);
+		/* check for a device disconnect */
+		if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
+			(RH_PS_PESC | RH_PS_CSC)) &&
+			((temp & RH_PS_CCS) == 0)) {
+			res = i;
+			break;
+		}
+	}
+	return res;
+}
+
+static int ohci_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
+		void *buffer, int transfer_len, struct devrequest *cmd)
 {
 	void * data = buffer;
 	int leni = transfer_len;
@@ -1178,6 +1201,12 @@ int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
 	int maxsize = usb_maxpacket(dev, pipe);
 	int timeout;
 
+	/* device pulled? Shortcut the action. */
+	if (devgone == dev) {
+		dev->status = USB_ST_CRC_ERR;
+		return 0;
+	}
+
 #ifdef DEBUG
 	urb_priv.actual_length = 0;
 	pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
@@ -1210,7 +1239,7 @@ int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
 		/* check whether the controller is done */
 		stat = hc_interrupt();
 		if (stat < 0) {
-			stat = 1;
+			stat = USB_ST_CRC_ERR;
 			break;
 		}
 		if (stat >= 0 && stat != 0xff) {
@@ -1220,11 +1249,33 @@ int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
 		if (--timeout) {
 			wait_ms(1);
 		} else {
-			err("CTL:TIMEOUT");
-			stat = 1;
+			err("CTL:TIMEOUT ");
+			stat = USB_ST_CRC_ERR;
 			break;
 		}
 	}
+	/* we got an Root Hub Status Change interrupt */
+	if (got_rhsc) {
+#ifdef DEBUG
+		ohci_dump_roothub (&gohci, 1);
+#endif
+		got_rhsc = 0;
+		/* abuse timeout */
+		timeout = rh_check_port_status(&gohci);
+		if (timeout >= 0) {
+#if 0 /* this does nothing useful, but leave it here in case that changes */
+			/* the called routine adds 1 to the passed value */
+			usb_hub_port_connect_change(gohci.rh.dev, timeout - 1);
+#endif
+			/*
+			 * XXX
+			 * This is potentially dangerous because it assumes
+			 * that only one device is ever plugged in!
+			 */
+			devgone = dev;
+		}
+	}
+
 	dev->status = stat;
   	dev->act_len = transfer_len;
 
@@ -1264,10 +1315,12 @@ int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
 			pipe);
 		return -1;
 	}
-	if (((pipe >> 8) & 0x7f) == gohci.rh.devnum)
+	if (((pipe >> 8) & 0x7f) == gohci.rh.devnum) {
+		gohci.rh.dev = dev;
 		/* root hub - redirect */
 		return ohci_submit_rh_msg(dev, pipe, buffer, transfer_len,
 			setup);
+	}
 
 	return submit_common_msg(dev, pipe, buffer, transfer_len, setup, 0);
 }
@@ -1356,9 +1409,17 @@ static int hc_start (ohci_t * ohci)
 	ohci->disabled = 0;
  	writel (ohci->hc_control, &ohci->regs->control);
 
-	/* Choose the interrupts we care about now, others later on demand */
-	mask = OHCI_INTR_MIE | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
+	/* disable all interrupts */
+	mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
+			OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
+			OHCI_INTR_OC | OHCI_INTR_MIE);
+	writel (mask, &ohci->regs->intrdisable);
+	/* clear all interrupts */
+	mask &= ~OHCI_INTR_MIE;
 	writel (mask, &ohci->regs->intrstatus);
+	/* Choose the interrupts we care about now  - but w/o MIE */
+	mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
+	writel (mask, &ohci->regs->intrenable);
 
 #ifdef	OHCI_USE_NPS
 	/* required for AMD-756 and some Mac platforms */
@@ -1397,6 +1458,10 @@ hc_interrupt (void)
 
 	/* dbg("Interrupt: %x frame: %x", ints, le16_to_cpu (ohci->hcca->frame_no)); */
 
+	if (ints & OHCI_INTR_RHSC) {
+		got_rhsc = 1;
+	}
+
 	if (ints & OHCI_INTR_UE) {
 		ohci->disabled++;
 		err ("OHCI Unrecoverable Error, controller usb-%s disabled",

cpu/mpc5xxx/fec.c

@@ -424,7 +424,9 @@ static int mpc5xxx_fec_init(struct eth_device *dev, bd_t * bis)
 #endif
 			} while (!(phyStatus & 0x0004));	/* !link up */
 
+#if (DEBUG & 0x2)
 			printf ("done.\n");
+#endif
 		} else {	/* MII100 */
 			/*
 			 * Set the auto-negotiation advertisement register bits

cpu/mpc5xxx/i2c.c

@@ -28,15 +28,22 @@
 #include <mpc5xxx.h>
 #include <i2c.h>
 
-#ifdef CFG_I2C_MODULE
+#if (CFG_I2C_MODULE == 2)
 #define I2C_BASE	MPC5XXX_I2C2
-#else
+#elif (CFG_I2C_MODULE == 1)
 #define I2C_BASE	MPC5XXX_I2C1
+#else
+#error CFG_I2C_MODULE is not properly configured
 #endif
 
 #define I2C_TIMEOUT	100
 #define I2C_RETRIES	3
 
+struct mpc5xxx_i2c_tap {
+	int scl2tap;
+	int tap2tap;
+};
+
 static int  mpc_reg_in    (volatile u32 *reg);
 static void mpc_reg_out   (volatile u32 *reg, int val, int mask);
 static int  wait_for_bb   (void);
@@ -44,6 +51,7 @@ static int  wait_for_pin  (int *status);
 static int  do_address    (uchar chip, char rdwr_flag);
 static int  send_bytes    (uchar chip, char *buf, int len);
 static int  receive_bytes (uchar chip, char *buf, int len);
+static int  mpc_get_fdr   (int);
 
 static int mpc_reg_in(volatile u32 *reg)
 {
@@ -207,7 +215,7 @@ void i2c_init(int speed, int saddr)
 
 	/* Set clock
 	 */
-	mpc_reg_out(&regs->mfdr, speed, 0);
+	mpc_reg_out(&regs->mfdr, mpc_get_fdr(speed), 0);
 
 	/* Enable module
 	 */
@@ -217,6 +225,50 @@ void i2c_init(int speed, int saddr)
 	return;
 }
 
+static int mpc_get_fdr(int speed)
+{
+	DECLARE_GLOBAL_DATA_PTR;
+	static int fdr = -1;
+	static int best_speed = 0;
+
+	if (fdr == -1) {
+		ulong ipb, scl;
+		ulong bestmatch = 0xffffffffUL;
+		int best_i = 0, best_j = 0, i, j;
+		int SCL_Tap[] = { 9, 10, 12, 15, 5, 6, 7, 8};
+		struct mpc5xxx_i2c_tap scltap[] = {
+			{4, 1},
+			{4, 2},
+			{6, 4},
+			{6, 8},
+			{14, 16},
+			{30, 32},
+			{62, 64},
+			{126, 128}
+		};
+
+		ipb = gd->ipb_clk;
+		for (i = 7; i >= 0; i--) {
+			for (j = 7; j >= 0; j--) {
+				scl = 2 * (scltap[j].scl2tap + 
+					(SCL_Tap[i] - 1) * scltap[j].tap2tap + 2);
+				if (ipb <= speed*scl) {
+					if ((speed*scl - ipb) < bestmatch) {
+						bestmatch = speed*scl - ipb;
+						best_i = i;
+						best_j = j;
+						best_speed = ipb/scl;
+					}
+				}
+			}
+		}
+		fdr = (best_i & 3) | ((best_i & 4) << 3) | (best_j << 2);
+		printf("%d kHz, ", best_speed / 1000);
+	}
+
+	return fdr;
+}
+
 int i2c_probe(uchar chip)
 {
 	struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;

cpu/mpc824x/speed.c

@@ -61,8 +61,8 @@ short pll_pci_to_mem_multiplier[] = {
 	25,  0, 10,  0, 15, 15,  0,  0,
 #elif defined(CONFIG_MPC8245)
 	30, 30, 10, 10, 20, 10, 10, 10,
-	10, 20, 20, 15, 20, 15, 20,  0,
-	30,  0, 15, 40, 20, 25, 20, 40,
+	10, 20, 20, 15, 20, 15, 20, 30,
+	30, 40, 15, 40, 20, 25, 20, 40,
 	25, 20, 10, 20, 15, 15, 15,  0,
 #else
 #error Specific type of MPC824x must be defined (i.e. CONFIG_MPC8240)

cpu/mpc8260/cpu.c

@@ -119,6 +119,9 @@ int checkcpu (void)
 	case 0x0062:
 		printf ("B.1 4K25A");
 		break;
+	case 0x0064:
+		printf ("C.0 5K25A");
+		break;
 	case 0x0A00:
 		printf ("0.0 0K49M");
 		break;

cpu/mpc8xx/fec.c

@@ -348,7 +348,7 @@ static int fec_init(struct eth_device* dev, bd_t * bd)
 	 * This MDC frequency is equal to system clock / (2 * MII_SPEED).
 	 * Then MII_SPEED = system_clock / 2 * 2,5 Mhz.
 	 */
-	fecp->fec_mii_speed = ((bd->bi_busfreq + 4999999) / 5000000) << 1;
+	fecp->fec_mii_speed = ((bd->bi_intfreq + 4999999) / 5000000) << 1;
 
 #if !defined(CONFIG_ICU862) && !defined(CONFIG_IAD210)
 	/* Configure all of port D for MII.
@@ -612,7 +612,7 @@ void mii_init (void)
 	 * This MDC frequency is equal to system clock / (2 * MII_SPEED).
 	 * Then MII_SPEED = system_clock / 2 * 2,5 Mhz.
 	 */
-	fecp->fec_mii_speed = ((bd->bi_busfreq + 4999999) / 5000000) << 1;
+	fecp->fec_mii_speed = ((bd->bi_intfreq + 4999999) / 5000000) << 1;
 
 #if !defined(CONFIG_ICU862) && !defined(CONFIG_IAD210)
 	/* Configure all of port D for MII.

cpu/mpc8xx/lcd.c

@@ -224,6 +224,18 @@ static vidinfo_t panel_info = {
 };
 #endif /* CONFIG_SHARP_LQ64D341 */
 
+#ifdef CONFIG_SHARP_LQ065T9DR51U
+/*
+ * Sharp LQ065T9DR51U display, 400x240. Active, color, single scan.
+ */
+static vidinfo_t panel_info = {
+    400, 240, 143, 79, CFG_HIGH, CFG_HIGH, CFG_HIGH, CFG_HIGH, CFG_HIGH,
+    3, 0, 0, 1, 1, 248, 4, 0, 35
+		/* wbl, vpw, lcdac, wbf */
+};
+#define LCD_INFO_BELOW_LOGO
+#endif /* CONFIG_SHARP_LQ065T9DR51U */
+
 #ifdef CONFIG_SHARP_LQ084V1DG21
 /*
  * Sharp LQ084V1DG21 display, 640x480. Active, color, single scan.

cpu/nios/Makefile

@@ -0,0 +1,44 @@
+#
+# (C) Copyright 2000
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= lib$(CPU).a
+
+START	= start.o
+AOBJS	= traps.o
+OBJS	= cpu.o interrupts.o serial.o
+
+all:	.depend $(START) $(LIB)
+
+$(LIB):	$(OBJS) $(AOBJS)
+	$(AR) crv $@ $(OBJS) $(AOBJS)
+
+#########################################################################
+
+.depend: Makefile $(START:.o=.S) $(OBJS:.o=.c) $(AOBJS:.o=.S)
+	$(CC) -M $(CFLAGS) $(START:.o=.S) $(OBJS:.o=.c) $(AOBJS:.o=.S) > $@
+
+sinclude .depend
+
+#########################################################################

cpu/nios/config.mk

@@ -0,0 +1,25 @@
+#
+# (C) Copyright 2000
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+PLATFORM_RELFLAGS +=
+

cpu/nios/cpu.c

@@ -0,0 +1,78 @@
+/*
+ * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <nios.h>
+
+
+int checkcpu (void)
+{
+	unsigned val;
+	unsigned rev_major;
+	unsigned rev_minor;
+	short nregs, hi_limit, lo_limit;
+
+	/* Get cpu version info */
+	val = rdctl (CTL_CPU_ID);
+	printf ("CPU: ");
+	printf ("%s", (val & 0x00008000) ? "Nios-16 " : "Nios-32 ");
+	rev_major = (val>>12) & 0x07;
+	rev_minor = val & 0x0f;
+	printf ("Rev. %d.%02d (0x%04x)", rev_major, rev_minor,
+			val & 0xffff);
+	if (rev_major == 0x08)
+		printf (" [OpenCore (R) Plus]");
+	printf ("\n");
+
+	/* Check register file */
+	val = rdctl (CTL_WVALID);
+	lo_limit = val & 0x01f;
+	hi_limit = (val>>5) & 0x1f;
+	nregs = (hi_limit + 2) * 16;
+	printf ("Reg file size: %d LO_LIMIT/HI_LIMIT: %d/%d\n",
+		nregs, lo_limit, hi_limit);
+
+	return (0);
+}
+
+
+int do_reset (void)
+{
+	/* trap 0 does the trick ... at least with the OCI debug
+	 * present -- haven't tested without it yet (stm).
+	 */
+	disable_interrupts ();
+	ipri (1);
+	asm volatile ("trap 0\n");
+
+	/* No return ;-) */
+
+	return(0);
+}
+
+
+#if defined(CONFIG_WATCHDOG)
+void watchdog_reset (void)
+{
+}
+#endif /* CONFIG_WATCHDOG */

cpu/nios/interrupts.c

@@ -0,0 +1,184 @@
+/*
+ * (C) Copyright 2000-2002
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+
+#include <nios.h>
+#include <nios-io.h>
+#include <asm/ptrace.h>
+#include <common.h>
+#include <command.h>
+
+/****************************************************************************/
+
+struct	irq_action {
+	interrupt_handler_t *handler;
+	void *arg;
+	int count;
+};
+
+static struct irq_action irq_vecs[64];
+
+/*************************************************************************/
+volatile ulong timestamp = 0;
+
+void reset_timer (void)
+{
+	timestamp = 0;
+}
+
+ulong get_timer (ulong base)
+{
+	return (timestamp - base);
+}
+
+void set_timer (ulong t)
+{
+	timestamp = t;
+}
+
+
+/* The board must handle this interrupt if a timer is not
+ * provided.
+ */
+#if defined(CFG_NIOS_TMRBASE)
+void timer_interrupt (struct pt_regs *regs)
+{
+	/* Interrupt is cleared by writing anything to the
+	 * status register.
+	 */
+	nios_timer_t *tmr = (nios_timer_t *)CFG_NIOS_TMRBASE;
+	tmr->status = 0;
+	timestamp += CFG_NIOS_TMRMS;
+}
+#endif
+
+/*************************************************************************/
+int disable_interrupts (void)
+{
+	int val = 0;
+
+	/* Writing anything to CLR_IE disables interrupts */
+	val = rdctl (CTL_STATUS);
+	wrctl (CTL_CLR_IE, 0);
+	return (val & STATUS_IE);
+}
+
+void enable_interrupts( void )
+{
+	/* Writing anything SET_IE enables interrupts */
+	wrctl (CTL_SET_IE, 0);
+}
+
+void external_interrupt (struct pt_regs *regs)
+{
+	unsigned vec;
+
+	vec = (regs->status & STATUS_IPRI) >> 9;	/* ipri */
+
+	irq_vecs[vec].count++;
+	if (irq_vecs[vec].handler != NULL) {
+		(*irq_vecs[vec].handler)(irq_vecs[vec].arg);
+	} else {
+		/* A sad side-effect of masking a bogus interrupt is
+		 * that lower priority interrupts will also be disabled.
+		 * This is probably not what we want ... so hang insted.
+		 */
+		printf ("Unhandled interrupt: 0x%x\n", vec);
+		disable_interrupts ();
+		hang ();
+	}
+}
+
+/*************************************************************************/
+int interrupt_init (void)
+{
+	int vec;
+
+#if defined(CFG_NIOS_TMRBASE)
+	nios_timer_t *tmr = (nios_timer_t *)CFG_NIOS_TMRBASE;
+
+	tmr->control &= ~NIOS_TIMER_ITO;
+	tmr->control |= NIOS_TIMER_STOP;
+#endif
+
+	for (vec=0; vec<64; vec++ ) {
+		irq_vecs[vec].handler = NULL;
+		irq_vecs[vec].arg = NULL;
+		irq_vecs[vec].count = 0;
+	}
+
+	/* Need timus interruptus -- start the lopri timer */
+#if defined(CFG_NIOS_TMRBASE)
+	tmr->control |= ( NIOS_TIMER_ITO |
+			  NIOS_TIMER_CONT |
+			  NIOS_TIMER_START );
+	ipri (CFG_NIOS_TMRIRQ + 1);
+#endif
+	enable_interrupts ();
+	return (0);
+}
+
+void irq_install_handler (int vec, interrupt_handler_t *handler, void *arg)
+{
+	struct irq_action *irqa = irq_vecs;
+	int   i = vec;
+	int flag;
+
+	if (irqa[i].handler != NULL) {
+		printf ("Interrupt vector %d: handler 0x%x "
+			"replacing 0x%x\n",
+			vec, (uint)handler, (uint)irqa[i].handler);
+	}
+
+	flag = disable_interrupts ();
+	irqa[i].handler = handler;
+	irqa[i].arg = arg;
+	if (flag )
+		enable_interrupts ();
+}
+
+/*************************************************************************/
+#if (CONFIG_COMMANDS & CFG_CMD_IRQ)
+int do_irqinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+	int vec;
+
+	printf ("\nInterrupt-Information:\n");
+	printf ("Nr  Routine   Arg       CouIt's ok to cnt\n");
+
+	for (vec=0; vec<64; vec++) {
+		if (irq_vecs[vec].handler != NULL) {
+			printf ("%02d  %08lx  %08lx  %d\n",
+				vec,
+				(ulong)irq_vecs[vec].handler<<1,
+				(ulong)irq_vecs[vec].arg,
+				irq_vecs[vec].count);
+		}
+	}
+
+	return (0);
+}
+#endif  /* CONFIG_COMMANDS & CFG_CMD_IRQ */

cpu/nios/serial.c

@@ -0,0 +1,86 @@
+/*
+ * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+
+#include <common.h>
+#include <nios-io.h>
+
+
+static nios_uart_t *uart = (nios_uart_t *)CFG_NIOS_CONSOLE;
+
+#if defined(CFG_NIOS_FIXEDBAUD)
+
+/* Everything's already setup for fixed-baud PTF
+ * assignment
+ */
+void serial_setbrg( void ){ return; }
+int serial_init( void ) { return(0);}
+
+#else
+
+void serial_setbrg( void )
+{
+	DECLARE_GLOBAL_DATA_PTR;
+	unsigned div;
+
+	div = (CONFIG_SYS_CLK_FREQ/gd->baudrate)-1;
+	uart->divisor = div;
+	return;
+}
+
+int serial_init( void )
+{
+	serial_setbrg();
+	return(0);
+}
+
+#endif /* CFG_NIOS_FIXEDBAUD */
+
+
+void serial_putc( char c )
+{
+	if (c == '\n')
+		serial_putc('\r');
+	while( (uart->status & NIOS_UART_TRDY) == 0 )
+		;
+	uart->txdata = (unsigned char)c;
+}
+
+void serial_puts( const char *s )
+{
+	while( *s != 0 ) {
+		serial_putc( *s++ );
+	}
+}
+
+int serial_tstc( void )
+{
+	return( uart->status & NIOS_UART_RRDY);
+}
+
+int serial_getc( void )
+{
+	while( serial_tstc() == 0 )
+		;
+	return( uart->rxdata & 0x00ff );
+}

cpu/nios/start.S

@@ -0,0 +1,186 @@
+/*
+ * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+
+#include <config.h>
+#include <version.h>
+
+#if !defined(CONFIG_IDENT_STRING)
+#define CONFIG_IDENT_STRING ""
+#endif
+
+#define STATUS_INIT	0x8600		/* IE=1, IPRI=2 */
+
+/*************************************************************************
+ * RESTART
+ ************************************************************************/
+
+	.text
+	.global _start
+
+_start:
+	bsr	0f
+	nop
+	.long	_start
+
+	/* GERMS -- The "standard-32" configuration GERMS monitor looks
+	 * for the string "Nios" at flash_base + 0xc (actually it only
+	 * tests for 'N', 'i'). You can leave support for this in place
+	 * as it's only a few words.
+	 */
+	. = _start + 0x000c
+	.string "Nios"
+
+	.align 4
+0:
+	/*
+	 * Early setup -- set cwp = HI_LIMIT, IPRI = 2, IE = 1 to
+	 * enable underflow exceptions. Disable cache.
+	 * NOTE: %o7 has return addr -- save in %g7 use later.
+	 */
+	mov	%g7, %o7
+
+	pfx	2			/* WVALID */
+	rdctl	%g0
+	lsri	%g0, 1
+	pfx	%hi(STATUS_INIT)
+	or	%g0, %lo(STATUS_INIT)
+	wrctl	%g0			/* update status */
+	nop
+
+	/*
+	 * STACK
+	 */
+	pfx	%hi(CFG_INIT_SP)
+	movi	%sp, %lo(CFG_INIT_SP)
+	pfx	%xhi(CFG_INIT_SP)
+	movhi	%sp, %xlo(CFG_INIT_SP)
+	mov	%fp, %sp
+
+	pfx	%hi(4*16)
+	subi	%sp, %lo(4*16)		/* Space for reg window mgmt */
+
+	/*
+	 * RELOCATE -- %g7 has return addr from bsr at _start.
+	 */
+	pfx	%hi(__u_boot_cmd_end)
+	movi	%g5, %lo(__u_boot_cmd_end)
+	pfx	%xhi(__u_boot_cmd_end)
+	movhi	%g5, %xlo(__u_boot_cmd_end) /* %g5 <- end address */
+
+	lsli	%g7, 1			/* mem = retaddr << 1 */
+	mov	%g6, %g7
+	subi	%g6, 4			/* %g6 <- src addr */
+	ld	%g7, [%g7]		/* %g7 <- dst addr */
+
+1:	cmp	%g7, %g5
+	skps	cc_nz
+	br	2f
+	nop				/* delay slot */
+
+	ld	%g0, [%g6]
+	addi	%g6, 4			/* src++ */
+	st	[%g7], %g0
+	addi	%g7, 4			/* dst++ */
+	br	1b
+	nop				/* delay slot */
+2:
+
+	/*
+	 * Jump to relocation address
+	 */
+	 pfx	%hi(reloc@h)
+	 movi	%g0, %lo(reloc@h)
+	 pfx	%xhi(reloc@h)
+	 movhi	%g0, %xlo(reloc@h)
+	 jmp	%g0
+reloc:
+
+	/*
+	 * CLEAR BSS
+	 */
+	pfx	%hi(__bss_end)
+	movi	%g5, %lo(__bss_end)
+	pfx	%xhi(__bss_end)
+	movhi	%g5, %xlo(__bss_end)	/* %g5 <- end address */
+	pfx	%hi(__bss_start)
+	movi	%g7, %lo(__bss_start)
+	pfx	%xhi(__bss_start)
+	movhi	%g7, %xlo(__bss_start)	/* %g7 <- end address */
+
+	movi	%g0, 0
+3:	cmp	%g7, %g5
+	skps	cc_nz
+	br	4f
+	nop				/* delay slot */
+
+	st	[%g7], %g0
+	addi	%g7, 4			/* (delay slot) dst++ */
+	br	3b
+	nop				/* delay slot */
+4:
+
+	/*
+	 * Call board_init -- never returns
+	 */
+	pfx	%hi(board_init@h)
+	movi	%g1, %lo(board_init@h)
+	pfx	%xhi(board_init@h)
+	movhi	%g1, %xlo(board_init@h)
+	call	%g1
+	nop				/* Delaly slot */
+	/* NEVER RETURNS */
+
+/*
+ * dly_clks -- Nios doesn't have a time/clk reference for simple
+ * delay loops, so we do our best by counting instruction cycles.
+ * A control register that counts system clock cycles would be
+ * a handy feature -- hint for Altera ;-)
+ */
+ 	.globl dly_clks
+	/* Each loop is 4 instructions as delay slot is always
+	 * executed. Each instruction is approximately 4 clocks
+	 * (according to some lame info from Altera). So ...
+	 * ... each loop is about 16 clocks.
+	 */
+
+dly_clks:
+	lsri	%o0, 4			/* cnt/16 */
+
+8:	skprnz	%o0
+	br	9f
+	subi	%o0, 1			/* cnt--, Delay slot */
+	br	8b
+	nop
+
+9:	lret
+	nop				/* Delay slot */
+
+
+	.data
+	.globl	version_string
+
+version_string:
+	.ascii U_BOOT_VERSION
+	.ascii " (", __DATE__, " - ", __TIME__, ")"
+	.ascii CONFIG_IDENT_STRING, "\0"

cpu/nios/traps.S

@@ -0,0 +1,559 @@
+/*
+ * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+
+/*************************************************************************
+ * Register window underflow
+ *
+ * The register window underflow exception occurs whenever the lowest
+ * valid register window is in use (CWP=LO_LIMIT) and a save instruction
+ * is issued. The save moves CWP below LO_LIMIT, %sp is set as normal,
+ * then the exception is generated prior to executing the instruction
+ * after the save.
+ ************************************************************************/
+	.text
+	.global _cwp_lolimit
+	.align	4
+
+_cwp_lolimit:
+
+	/* Sixteen words are always allocated by the compiler in every
+	 * procedure's stack frame, always starting at %sp, for saving
+	 * 'in' and 'local' registers on a window overflow.
+	 *
+	 * Save the 'global' and 'in' regs on stack. They are restored
+	 * at cwp = HI_LIMIT. The 'local' regs aren't in-use at this point.
+	 */
+	sts	[%sp,0], %g0		/* Save 'global' regs*/
+	sts	[%sp,1], %g1
+	sts	[%sp,2], %g2
+	sts	[%sp,3], %g3
+	sts	[%sp,4], %g4
+	sts	[%sp,5], %g5
+	sts	[%sp,6], %g6
+	sts	[%sp,7], %g7
+
+	sts	[%sp,8], %i0		/* Save 'in' regs */
+	sts	[%sp,9], %i1
+	sts	[%sp,10], %i2
+	sts	[%sp,11], %i3
+	sts	[%sp,12], %i4
+	sts	[%sp,13], %i5
+	sts	[%sp,14], %i6
+	sts	[%sp,15], %i7
+
+	/* Save current %sp and return address in a global so they are
+	 * available at cwp = HI_LIMIT ... where the 'global'/'in' regs
+	 * are restored. NOTE: %sp changes with cwp.
+	 */
+	mov	%g7, %o7
+	mov	%g6, %sp
+
+	/* Get LO_LIMIT/HI_LIMIT to know where to start & stop. Note: in
+	 * the underflow exception, cwp is __NOT__ guaranteed to be zero.
+	 * If the OCI debug module is enabled the reset value for LO_LIMIT
+	 * is 2, not 1 -- so cwp can be 1 or 0.
+	 */
+	pfx	2			/* WVALID */
+	rdctl	%g1
+	mov	%g2, %g1
+	pfx	0
+	and	%g1, 0x1f		/* g1 <- LO_LIMIT */
+	lsri	%g2, 5
+	pfx	0
+	and	%g2,0x1f		/* g2 <- HI_LIMIT */
+
+	/* Set istatus so cwp = HI_LIMIT after tret
+	 */
+	movi	%g5, 0x1f
+	lsli	%g5, 4
+	not	%g5			/* mask to clr cwp */
+	pfx	1			/* istatus */
+	rdctl	%g0
+	and	%g0, %g5		/* clear cwp field */
+
+	mov	%g4, %g2
+	lsli	%g4, 4
+	or	%g0, %g4		/* cwp = HI_LIMIT */
+	pfx	1
+	wrctl	%g0			/* update istatus */
+
+	/* Now move up the register file, saving as we go. When loop
+	 * is first entered, %g1 is at LO_LIMIT.
+	 */
+0:
+	restore				/* cwp++ */
+	sts	[%sp,0], %l0		/* Save "local" regs*/
+	sts	[%sp,1], %l1
+	sts	[%sp,2], %l2
+	sts	[%sp,3], %l3
+	sts	[%sp,4], %l4
+	sts	[%sp,5], %l5
+	sts	[%sp,6], %l6
+	sts	[%sp,7], %l7
+
+	sts	[%sp,8], %i0		/* Save 'in' regs */
+	sts	[%sp,9], %i1
+	sts	[%sp,10], %i2
+	sts	[%sp,11], %i3
+	sts	[%sp,12], %i4
+	sts	[%sp,13], %i5
+	sts	[%sp,14], %i6
+	sts	[%sp,15], %i7
+
+	cmp	%g1, %g2		/* cwp == HI_LIMIT ? */
+	skps	cc_ne			/* if so, we're done */
+	br	1f
+	nop				/* delay slot */
+
+	inc	%g1			/* g1 <- cwp++ */
+	br	0b
+	nop				/* delay slot */
+
+	/* At this point cwp = HI_LIMIT, so the global/in regs that were
+	 * in place when the underflow occurred must be restored using
+	 * the original stack pointer (saved in g6).
+	 */
+1:
+	mov	%o7, %g7		/* restore return addr */
+	mov	%sp, %g6		/* Restore original sp */
+
+	lds	%g0, [%sp,0]		/* Restore 'global' regs*/
+	lds	%g1, [%sp,1]
+	lds	%g2, [%sp,2]
+	lds	%g3, [%sp,3]
+	lds	%g4, [%sp,4]
+	lds	%g5, [%sp,5]
+	lds	%g6, [%sp,6]
+	lds	%g7, [%sp,7]
+
+	lds	%i0, [%sp,8]		/* Restore 'in' regs*/
+	lds	%i1, [%sp,9]
+	lds	%i2, [%sp,10]
+	lds	%i3, [%sp,11]
+	lds	%i4, [%sp,12]
+	lds	%i5, [%sp,13]
+	lds	%i6, [%sp,14]
+	lds	%i7, [%sp,15]
+
+	tret	%o7			/* All done */
+
+/*************************************************************************
+ * Register window overflow
+ *
+ * The register window overflow exception occurs whenever the highest
+ * valid register window is in use (cwp = HI_LIMIT) and a restore
+ * instruction is issued. Control is transferred to the overflow handler
+ * before the instruction following restore is executed.
+ *
+ * When a register window overflow exception is taken, the exception
+ * handler sees cwp at HI_LIMIT.
+ ************************************************************************/
+	.text
+	.global _cwp_hilimit
+	.align	4
+
+_cwp_hilimit:
+
+	/* Save 'global'/'in' regs on the stack -- will restore when cwp
+	 * is at LO_LIMIT. Locals don't need saving as they are going away.
+	 */
+	sts	[%sp,0], %g0		/* Save "global" regs*/
+	sts	[%sp,1], %g1
+	sts	[%sp,2], %g2
+	sts	[%sp,3], %g3
+	sts	[%sp,4], %g4
+	sts	[%sp,5], %g5
+	sts	[%sp,6], %g6
+	sts	[%sp,7], %g7
+
+	sts	[%sp,8], %i0		/* Save 'in' regs */
+	sts	[%sp,9], %i1
+	sts	[%sp,10], %i2
+	sts	[%sp,11], %i3
+	sts	[%sp,12], %i4
+	sts	[%sp,13], %i5
+	sts	[%sp,14], %i6
+	sts	[%sp,15], %i7
+
+	/* The current %sp must be available in global to restore regs
+	 * saved on stack. Need return addr as well ;-)
+	 */
+	mov	%g7, %o7
+	mov	%g6, %sp
+
+	/* Get HI_LIMIT & LO_LIMIT
+	 */
+	pfx	2			/* WVALID */
+	rdctl	%g1
+	mov	%g2, %g1
+	pfx	0
+	and	%g1, 0x1f		/* g1 <- LO_LIMIT */
+	lsri	%g2, 5
+	pfx	0
+	and	%g2,0x1f		/* g2 <- HI_LIMIT */
+
+	/* Set istatus so cwp = LO_LIMIT after tret
+	 */
+	movi	%g5, 0x1f
+	lsli	%g5, 4
+	not	%g5			/* mask to clr cwp */
+	pfx	1			/* istatus */
+	rdctl	%g0
+	and	%g0, %g5		/* clear cwp field */
+
+	mov	%g4, %g1		/* g4 <- LO_LIMIT */
+	lsli	%g4, 4
+	or	%g0, %g4		/* cwp = LO_LIMIT */
+	pfx	1
+	wrctl	%g0			/* update istatus */
+
+	/* Move to cwp = LO_LIMIT-1 and restore 'in' regs.
+	 */
+	subi	%g4,(1 << 4)		/* g4 <- LO_LIMIT - 1 */
+	rdctl	%g0
+	and	%g0, %g5		/* clear cwp field */
+	or	%g0, %g4		/* cwp = LO_LIMIT - 1 */
+	wrctl	%g0			/* update status */
+	nop
+
+	mov	%sp, %g6		/* Restore sp */
+	lds	%i0, [%sp,8]		/* Restore 'in' regs */
+	lds	%i1, [%sp,9]
+	lds	%i2, [%sp,10]
+	lds	%i3, [%sp,11]
+	lds	%i4, [%sp,12]
+	lds	%i5, [%sp,13]
+	lds	%i6, [%sp,14]		/* sp in next window */
+	lds	%i7, [%sp,15]
+
+	/* Starting at LO_LIMIT-1, move up the register file, restoring
+	 * along the way.
+	 */
+0:
+	restore				/* cwp++ */
+	lds	%l0, [%sp,0]		/* Restore 'local' regs*/
+	lds	%l1, [%sp,1]
+	lds	%l2, [%sp,2]
+	lds	%l3, [%sp,3]
+	lds	%l4, [%sp,4]
+	lds	%l5, [%sp,5]
+	lds	%l6, [%sp,6]
+	lds	%l7, [%sp,7]
+
+	lds	%i0, [%sp,8]		/* Restore 'in' regs */
+	lds	%i1, [%sp,9]
+	lds	%i2, [%sp,10]
+	lds	%i3, [%sp,11]
+	lds	%i4, [%sp,12]
+	lds	%i5, [%sp,13]
+	lds	%i6, [%sp,14]		/* sp in next window */
+	lds	%i7, [%sp,15]
+
+	cmp	%g1, %g2		/* cwp == HI_LIMIT ? */
+	skps	cc_ne			/* if so, we're done */
+	br	1f
+	nop				/* delay slot */
+
+	inc	%g1			/* cwp++ */
+	br	0b
+	nop				/* delay slot */
+
+	/* All windows have been updated at this point, but the globals
+	 * still need to be restored. Go to cwp = LO_LIMIT-1 to get
+	 * some registers to use.
+	 */
+1:
+	rdctl	%g0
+	and	%g0, %g5		/* clear cwp field */
+	or	%g0, %g4		/* cwp = LO_LIMIT - 1 */
+	wrctl	%g0			/* update status */
+	nop
+
+	/* Now there are some registers available to use in restoring
+	 * the globals.
+	 */
+	mov	%sp, %g6
+	mov	%o7, %g7
+
+	lds	%g0, [%sp,0]		/* Restore "global" regs*/
+	lds	%g1, [%sp,1]
+	lds	%g2, [%sp,2]
+	lds	%g3, [%sp,3]
+	lds	%g4, [%sp,4]
+	lds	%g5, [%sp,5]
+	lds	%g6, [%sp,6]
+	lds	%g7, [%sp,7]
+
+	/* The tret moves istatus -> status. istatus was already set for
+	 * cwp = LO_LIMIT.
+	 */
+
+	tret	%o7			/* done */
+
+/*************************************************************************
+ * Default exception handler
+ *
+ * The default handler passes control to external_interrupt(). So trap
+ * or hardware interrupt hanlders can be installed using the familiar
+ * irq_install_handler().
+ *
+ * Here, the stack is fixed-up and cwp is incremented prior to calling
+ * external_interrupt(). This lets the underflow and overflow handlers
+ * operate normally during the exception.
+ ************************************************************************/
+	.text
+	.global _def_xhandler
+	.align	4
+
+_def_xhandler:
+
+	/* Allocate some stack space: 16 words at %sp to accomodate
+	 * a reg window underflow, 8 words to save interrupted task's
+	 * 'out' regs (which are now the 'in' regs), 8 words to preserve
+	 * the 'global' regs and 3 words to save the return address,
+	 * status and istatus. istatus must be saved in the event an
+	 * underflow occurs in a dispatched handler. status is saved so
+	 * a handler can access it on stack.
+	 */
+	pfx	%hi((16+16+3) * 4)
+	subi	%fp, %lo((16+16+3) * 4)
+	mov	%sp, %fp
+
+	/* Save the 'global' regs and the interrupted task's 'out' regs
+	 * (our 'in' regs) along with the return addr, status & istatus.
+	 * First 16 words are for underflow exception.
+	 */
+	rdctl	%l0			/* status */
+	pfx	1			/* istatus */
+	rdctl	%l1
+
+	sts	[%sp,16+0], %g0		/* Save 'global' regs*/
+	sts	[%sp,16+1], %g1
+	sts	[%sp,16+2], %g2
+	sts	[%sp,16+3], %g3
+	sts	[%sp,16+4], %g4
+	sts	[%sp,16+5], %g5
+	sts	[%sp,16+6], %g6
+	sts	[%sp,16+7], %g7
+
+	sts	[%sp,16+8], %i0		/* Save 'in' regs */
+	sts	[%sp,16+9], %i1
+	sts	[%sp,16+10], %i2
+	sts	[%sp,16+11], %i3
+	sts	[%sp,16+12], %i4
+	sts	[%sp,16+13], %i5
+	sts	[%sp,16+14], %i6
+	sts	[%sp,16+15], %i7
+
+	sts	[%sp,16+16], %l0	/* status */
+	sts	[%sp,16+17], %l1	/* istatus */
+	sts	[%sp,16+18], %o7	/* return addr */
+
+	/* Move to cwp+1 ... this guarantees cwp is at or above LO_LIMIT.
+	 * Need to set IPRI=3 and IE=1 to enable underflow exceptions.
+	 * NOTE: only the 'out' regs have been saved ... can't touch
+	 * the 'in' or 'local' here.
+	 */
+	restore				/* cwp++ */
+	rdctl	%o0			/* o0 <- status */
+
+	pfx	%hi(0x7e00)
+	movi	%o1, %lo(0x7e00)
+	not	%o1
+	and	%o0, %o1		/* clear IPRI */
+
+	pfx	%hi(0x8600)
+	movi	%o1, %lo(0x8600)
+	or	%o0, %o1		/* IPRI=3, IE=1 */
+
+	wrctl	%o0			/* o0 -> status */
+	nop
+
+	/* It's ok to call a C routine now since cwp >= LO_LIMIT,
+	 * interrupt task's registers are/will be preserved, and
+	 * underflow exceptions can be handled.
+	 */
+	pfx	%hi(external_interrupt@h)
+	movi	%o1, %lo(external_interrupt@h)
+	pfx	%xhi(external_interrupt@h)
+	movhi	%o1, %xlo(external_interrupt@h)
+	bgen	%o0, 4+2		/* 16 * 4 */
+	add	%o0, %sp		/* Ptr to regs */
+	call	%o1
+	nop
+
+	/* Move back to the exception register window, restore the 'out'
+	 * registers, then return from exception.
+	 */
+	rdctl	%o0			/* o0 <- status */
+	subi	%o0, 16
+	wrctl	%o0			/* cwp-- */
+	nop
+
+	mov	%sp, %fp
+	lds	%g0, [%sp,16+0]		/* Restore 'global' regs*/
+	lds	%g1, [%sp,16+1]
+	lds	%g2, [%sp,16+2]
+	lds	%g3, [%sp,16+3]
+	lds	%g4, [%sp,16+4]
+	lds	%g5, [%sp,16+5]
+	lds	%g6, [%sp,16+6]
+	lds	%g7, [%sp,16+7]
+
+	lds	%i0, [%sp,16+8]		/* Restore 'in' regs*/
+	lds	%i1, [%sp,16+9]
+	lds	%i2, [%sp,16+10]
+	lds	%i3, [%sp,16+11]
+	lds	%i4, [%sp,16+12]
+	lds	%i5, [%sp,16+13]
+	lds	%i6, [%sp,16+14]
+	lds	%i7, [%sp,16+15]
+
+	lds	%l0, [%sp,16+16]	/* status */
+	lds	%l1, [%sp,16+17]	/* istatus */
+	lds	%o7, [%sp,16+18]	/* return addr */
+
+	pfx	1
+	wrctl	%l1			/* restore istatus */
+
+	pfx	%hi((16+16+3) * 4)
+	addi	%sp, %lo((16+16+3) * 4)
+	mov	%fp, %sp
+
+	tret	%o7			/* Done */
+
+
+/*************************************************************************
+ * Timebase Timer Interrupt -- This has identical structure to above,
+ * but calls timer_interrupt().  Doing it this way keeps things similar
+ * to other architectures (e.g. ppc).
+ ************************************************************************/
+	.text
+	.global _timebase_int
+	.align	4
+
+_timebase_int:
+
+	/* Allocate  stack space.
+	 */
+	pfx	%hi((16+16+3) * 4)
+	subi	%fp, %lo((16+16+3) * 4)
+	mov	%sp, %fp
+
+	/* Save the 'global' regs & 'out' regs (our 'in' regs)
+	 */
+	rdctl	%l0			/* status */
+	pfx	1			/* istatus */
+	rdctl	%l1
+
+	sts	[%sp,16+0], %g0		/* Save 'global' regs*/
+	sts	[%sp,16+1], %g1
+	sts	[%sp,16+2], %g2
+	sts	[%sp,16+3], %g3
+	sts	[%sp,16+4], %g4
+	sts	[%sp,16+5], %g5
+	sts	[%sp,16+6], %g6
+	sts	[%sp,16+7], %g7
+
+	sts	[%sp,16+8], %i0		/* Save 'in' regs */
+	sts	[%sp,16+9], %i1
+	sts	[%sp,16+10], %i2
+	sts	[%sp,16+11], %i3
+	sts	[%sp,16+12], %i4
+	sts	[%sp,16+13], %i5
+	sts	[%sp,16+14], %i6
+	sts	[%sp,16+15], %i7
+
+	sts	[%sp,16+16], %l0	/* status */
+	sts	[%sp,16+17], %l1	/* istatus */
+	sts	[%sp,16+18], %o7	/* return addr */
+
+	/* Move to cwp+1.
+	 */
+	restore				/* cwp++ */
+	rdctl	%o0			/* o0 <- status */
+
+	pfx	%hi(0x7e00)
+	movi	%o1, %lo(0x7e00)
+	not	%o1
+	and	%o0, %o1		/* clear IPRI */
+
+	pfx	%hi(0x8600)
+	movi	%o1, %lo(0x8600)
+	or	%o0, %o1		/* IPRI=3, IE=1 */
+
+	wrctl	%o0			/* o0 -> status */
+	nop
+
+	/* Call timer_interrupt()
+	 */
+	pfx	%hi(timer_interrupt@h)
+	movi	%o1, %lo(timer_interrupt@h)
+	pfx	%xhi(timer_interrupt@h)
+	movhi	%o1, %xlo(timer_interrupt@h)
+	bgen	%o0, 4+2		/* 16 * 4 */
+	add	%o0, %sp		/* Ptr to regs */
+	call	%o1
+	nop
+
+	/* Move back to the exception register window, restore the 'out'
+	 * registers, then return from exception.
+	 */
+	rdctl	%o0			/* o0 <- status */
+	subi	%o0, 16
+	wrctl	%o0			/* cwp-- */
+	nop
+
+	mov	%sp, %fp
+	lds	%g0, [%sp,16+0]		/* Restore 'global' regs*/
+	lds	%g1, [%sp,16+1]
+	lds	%g2, [%sp,16+2]
+	lds	%g3, [%sp,16+3]
+	lds	%g4, [%sp,16+4]
+	lds	%g5, [%sp,16+5]
+	lds	%g6, [%sp,16+6]
+	lds	%g7, [%sp,16+7]
+
+	lds	%i0, [%sp,16+8]		/* Restore 'in' regs*/
+	lds	%i1, [%sp,16+9]
+	lds	%i2, [%sp,16+10]
+	lds	%i3, [%sp,16+11]
+	lds	%i4, [%sp,16+12]
+	lds	%i5, [%sp,16+13]
+	lds	%i6, [%sp,16+14]
+	lds	%i7, [%sp,16+15]
+
+	lds	%l0, [%sp,16+16]	/* status */
+	lds	%l1, [%sp,16+17]	/* istatus */
+	lds	%o7, [%sp,16+18]	/* return addr */
+
+	pfx	1
+	wrctl	%l1			/* restore istatus */
+
+	pfx	%hi((16+16+3) * 4)
+	addi	%sp, %lo((16+16+3) * 4)
+	mov	%fp, %sp
+
+	tret	%o7			/* Done */

cpu/pxa/interrupts.c

@@ -202,3 +202,23 @@ void udelay_masked (unsigned long usec)
 	while (tmo >= get_timer_masked ())
 		/*NOP*/;
 }
+
+/*
+ * This function is derived from PowerPC code (read timebase as long long).
+ * On ARM it just returns the timer value.
+ */
+unsigned long long get_ticks(void)
+{
+	return get_timer(0);
+}
+
+/*
+ * This function is derived from PowerPC code (timebase clock frequency).
+ * On ARM it returns the number of timer ticks per second.
+ */
+ulong get_tbclk (void)
+{
+	ulong tbclk;
+	tbclk = CFG_HZ;
+	return tbclk;
+}

doc/README.dk1c20

@@ -0,0 +1,84 @@
+
+			 Nios Development Kit
+			   Cyclone Editions
+
+		    Last Update: October 4, 2003
+====================================================================
+
+This file contains information regarding U-Boot and the Altera
+Nios Development Kit, Cyclone Edition (DK-1C20). For general Nios
+information see doc/README.nios.
+
+For those interested in contributing ... see HELP WANTED section
+in doc/README.nios.
+
+
+Files
+------
+	board/dk1c20/*
+	include/configs/DK1C20.h
+
+Memory Organization
+--------------------
+
+  	-The heap is placed below the monitor (U-Boot code).
+  	-Global data is placed below the heap.
+  	-The stack is placed below global data (&grows down).
+
+Misc
+-----
+
+The hello_world example works fine.
+
+
+Programming U-Boot into FLASH with GERMS
+-----------------------------------------
+The current version of the DK-1C20 port occupies less than
+60 KByte. So everything will fit into a single Flash sector.
+To program U-Boot into the DK-1C20 flash using GERMS do the
+following:
+
+1. From the command line, download U-Boot using the nios-run:
+
+	$ nios-run -r u-boot.srec
+
+This takes about 45 seconds (GERMS is not very speedy here).
+After u-boot is downloaded it will be executed. You should
+see the following:
+
+    U-Boot 1.0.0-pre (Oct  4 2003 - 07:39:24)
+
+    CPU: Nios-32 Rev. 3.08 (0x3018)
+    Reg file size: 256 LO_LIMIT/HI_LIMIT: 2/14
+    Board: Altera Nios 1C20 Development Kit
+    In:    serial
+    Out:   serial
+    Err:   serial
+    ==>
+
+
+2. Quit nios-run and start your terminal application (e.g. start
+Hyperterminal or minicom).
+
+3. From the U-Boot command prompt, erase a sector of flash at 0x40000:
+
+    ==> erase 40000 4ffff
+
+4. Download the u-boot code to RAM. When using Hyperterminal, do the
+following:
+
+ --From the u-boot command prompt start a binary download to SRAM:
+
+    ==> loadb 800000
+
+ --Download u-boot.bin using kermit.
+
+5. Copy the binary image from SRAM to flash:
+
+    ==> cp.b 800000 40000 10000
+
+U-Boot will now automatically start when the board is powered on or
+reset using the Standard-32 configuration. To start U-Boot with the
+Safe-32 configuration, enter the following GERMS command:
+
+    + g 40000

doc/README.nios

@@ -0,0 +1,196 @@
+
+			   U-Boot for Nios-32
+
+		    Last Update: October 4, 2003
+====================================================================
+
+This file contains information regarding U-Boot and the Altera
+Nios CPU. For information regarding U-Boot and the Nios Development
+Kit, Cyclone Edition (DK-1C20), see doc/README.dk1c20.
+
+For those interested in contributing ... see HELP WANTED below.
+
+
+1. OVERVIEW
+------------
+
+U-Boot has been successfully tested on the Nios Cyclone development
+board using both the 'safe' and 'standard 32' configurations with
+Nios CPU revision 3.08 (CPU_ID = 0x3008). U-Boot can be used with
+or without the GERMS monitor. The initial version of U-Boot for the
+Cyclone development kit is about 60 Kbyte and will fit in a single
+sector of on-board FLASH. Only the Nios 32-bit CPU is supported.
+
+1.1 GERMS Monitor
+------------------
+If GERMS is just not enough, then U-Boot is a great antibiotic.
+You will be very pleased with its high degree of configurability
+and its rich feature set.
+
+A few of the most obvious limitations of GERMS are overcome by
+using U-Boot (See 'Brain Damage'). Most notably, you can use
+minicom or Hyperterminal (duh).
+
+1.2 Altera Source Code
+-----------------------
+The Nios port does NOT include ANY sources that Altera has the
+copyright. This was a conscious decision ... not an accident.
+The Altera license is not clear in terms of distributing Altera
+sources (when altera silicon is not involved). This isn't really
+a problem as little, if any, of the Altera source contains
+features that are not already available in U-Boot.
+
+The Nios port also does not use the long-winded peripheral
+structure definitions from the Nios SDK.
+
+
+
+2. CONFIGURATION OPTIONS/SETTINGS
+----------------------------------
+
+2.1 Nios-specific Options/Settings
+-----------------------------------
+All configuration options/settings that are specific to Nios begin
+with "CONFIG_NIOS_" or "CFG_NIOS_". The following is a list of
+currently defined Nios-specific options/parameters. If any options
+are related to Standard-32 Nios SDK excalibur.h definitions, the
+related definition follows the description).
+
+
+CONFIG_NIOS -- defined for all Nios-32 boards.
+
+CFG_NIOS_CONSOLE -- the base address of the console UART.
+	(standard-32: na_uart1_base).
+
+CFG_NIOS_FIXEDBAUD -- defined if the console UART PTF fixed_baud
+	parameter is set to '1'.
+
+CFG_NIOS_MULT_HW -- use full hardware multiply (not yet implemented).
+
+CFG_NIOS_MULT_MSTEP -- use hardware assisted multiply using the
+	MSTEP instruction (not yet implemented).
+
+CFG_NIOS_TMRBASE -- the base address of the timer used to support
+	xxx_timer routines (e.g. set_timer(), get_timer(), etc.).
+	(standard-32: na_lo_priority_timer2_base).
+
+CFG_NIOS_TMRIRQ -- the interrupt request (vector number) assigned to
+	the timer. (standard-32: na_low_priority_timer2_irq).
+
+CFG_NIOS_TMRMS -- the period of the timer in milliseconds.
+
+2.2 Differences in U-Boot Options/Settings
+-------------------------------------------
+Some 'standard' U-Boot options/settings are treated differently in
+the Nios port. These are described below.
+
+CFG_GBL_DATA_OFFSET -- in the Nios port, this is the offset of the
+	global data structure in the Nios memory space. More simply,
+	the address of global data.
+
+
+3. ASSEMBLY CODING
+-------------------
+
+In browsing the assembly source files, you may notice the absence
+of the 'magic macros' (e.g. MOVIA, MOVIP, ADDIP etc.). This is
+deliberate. The documentation for the magic macros is scant and
+it is hard to find ... it does not appear in the Nios programmer's
+manual, nor does it appear in the assembler manual. Regardless,
+the macros actually do very little to improve readability anyway.
+
+With this in mind, all assembler modules use only instructions that
+appear in the Nios programmer's manual OR are directly supported
+by the nios-elf toolchain. For example, the 'dec %rB' instruction
+is an alias for 'subi %rB,1' that is supported by the assembler
+but does not appear in the programmer's manual.
+
+
+4. BRAIN DAMAGE
+----------------
+
+This section describes some of the unfortunate and avoidable aspects
+of working with the Nios CPU ... and some things you can do to
+reduce your pain.
+
+4.1 GERMS doesn't work with Hyperterminal
+------------------------------------------
+GERMS doesn't do CR/LF mapping that is compatible with Hyperterminal
+(or minicom) -- geez. Regardless of you opion of Hyperterminal, this
+sad design decision is remedied by using U-Boot.
+
+4.2 cygwin Incompatibility
+---------------------------
+The version of cygwin distributed with the nios GNUPro toolchain is
+out-of-date and incompatible with the latest cygwin distributions.
+In addition, many of the standard utilities are very dated as well.
+If you try to download and build the lastest version of grep for
+example, you'll quickly realize that a native gcc is not available
+(the next topic) which leads to U-Boot build problems (following
+topic).
+
+The solution ... well, you can wait for Altera ... or build as
+set of tools for linux.
+
+4.3 No native gcc
+------------------
+I'm not sure how this one slipped through the cracks ... but it is
+a real pain. Basically, if you want to build anything for the native
+environment -- forget it! A native (cygwin) gcc is not distributed,
+and the old version of cygwin makes locating one challenging.
+
+The solution ... same as above. Just download the gcc source from
+Altera and build up a set of cross tools for your favorite linux
+distro.
+
+4.4 Can't build default U-Boot
+-------------------------------
+By default, when you build U-Boot you will be building some native
+tools along with the target elf, bin, and srec files. Without a
+native gcc, this (obviously) causes problems.
+
+For developers using the Altera cygwin tools you can remove the
+'tools' directory from SUBDIRS in the top-level Makefile. You will
+also have to edit common/Makefile:
+
+Replace:
+environment.o: environment.c ../tools/envcrc
+	$(CC) $(AFLAGS) -Wa,--no-warn \
+		-DENV_CRC=$(shell ../tools/envcrc) \
+		-c -o $@ environment.c
+
+With:
+environment.o: environment.c ../tools/envcrc
+	$(CC) $(AFLAGS) -Wa,--no-warn \
+		-DENV_CRC=0 \
+		-c -o $@ environment.c
+
+BTW, thats a 'zero' ... not the letter 'O'.
+
+
+5. HELP WANTED
+---------------
+
+There are plenty of areas where help is needed. Here's are some ideas
+for those interested in contributing:
+
+-SMC 91C111 support. E.g. add in tftpboot, etc.
+
+-CompactFlash. Port & test CF/FAT.
+
+-ASMI support. Use ASMI for environment, etc.
+
+-Bedbug. Develop bedbug for Nios ... or at least provide a disassemble
+ command.
+
+-Add boot support for ucLinux (niosnommu).
+
+-Implement (don't copy Altera code) the __mulxx routines using the
+ MSTEP and MUL instructions (e.g. CFG_NIOS_MULT_HW and CFG_NIOS_MULT_MSTEP).
+
+
+
+Regards,
+
+--Scott
+<smcnutt@psyent.com>

drivers/s3c24x0_i2c.c

@@ -91,359 +91,357 @@ static void SetI2CSCL(int x)
 }
 
 
-static int WaitForXfer(void)
+static int WaitForXfer (void)
 {
-    S3C24X0_I2C * const i2c = S3C24X0_GetBase_I2C();
-    int i, status;
+	S3C24X0_I2C *const i2c = S3C24X0_GetBase_I2C ();
+	int i, status;
 
-    i = I2C_TIMEOUT * 1000;
-    status = i2c->IICCON;
-    while ((i > 0) && !(status & I2CCON_IRPND)) {
-	udelay(1000);
+	i = I2C_TIMEOUT * 10000;
 	status = i2c->IICCON;
-	i--;
-    }
+	while ((i > 0) && !(status & I2CCON_IRPND)) {
+		udelay (100);
+		status = i2c->IICCON;
+		i--;
+	}
 
-    return(status & I2CCON_IRPND) ? I2C_OK : I2C_NOK_TOUT;
+	return (status & I2CCON_IRPND) ? I2C_OK : I2C_NOK_TOUT;
 }
 
-static int IsACK(void)
+static int IsACK (void)
 {
-    S3C24X0_I2C * const i2c = S3C24X0_GetBase_I2C();
+	S3C24X0_I2C *const i2c = S3C24X0_GetBase_I2C ();
 
-    return(!(i2c->IICSTAT & I2CSTAT_NACK));
+	return (!(i2c->IICSTAT & I2CSTAT_NACK));
 }
 
-static void ReadWriteByte(void)
+static void ReadWriteByte (void)
 {
-    S3C24X0_I2C * const i2c = S3C24X0_GetBase_I2C();
+	S3C24X0_I2C *const i2c = S3C24X0_GetBase_I2C ();
 
-    i2c->IICCON &= ~I2CCON_IRPND;
+	i2c->IICCON &= ~I2CCON_IRPND;
 }
 
 void i2c_init (int speed, int slaveadd)
 {
-    S3C24X0_I2C * const i2c = S3C24X0_GetBase_I2C();
-    S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
-    ulong freq, pres = 16, div;
-    int i, status;
+	S3C24X0_I2C *const i2c = S3C24X0_GetBase_I2C ();
+	S3C24X0_GPIO *const gpio = S3C24X0_GetBase_GPIO ();
+	ulong freq, pres = 16, div;
+	int i, status;
 
-    /* wait for some time to give previous transfer a chance to finish */
+	/* wait for some time to give previous transfer a chance to finish */
 
-    i = I2C_TIMEOUT * 1000;
-    status = i2c->IICSTAT;
-    while ((i > 0) && (status & I2CSTAT_BSY)) {
-	udelay(1000);
+	i = I2C_TIMEOUT * 1000;
 	status = i2c->IICSTAT;
-	i--;
-    }
-
-    if ((status & I2CSTAT_BSY) || GetI2CSDA() == 0) {
-#ifdef CONFIG_S3C2410
-	ulong old_gpecon = gpio->GPECON;
-#endif
-#ifdef CONFIG_S3C2400
-	ulong old_gpecon = gpio->PGCON;
-#endif
-	/* bus still busy probably by (most) previously interrupted transfer */
-
-#ifdef CONFIG_S3C2410
-	/* set I2CSDA and I2CSCL (GPE15, GPE14) to GPIO */
-	gpio->GPECON = (gpio->GPECON & ~0xF0000000) | 0x10000000;
-#endif
-#ifdef CONFIG_S3C2400
-	/* set I2CSDA and I2CSCL (PG5, PG6) to GPIO */
-	gpio->PGCON = (gpio->PGCON & ~0x00003c00) | 0x00000c00;
-#endif
-
-	/* toggle I2CSCL until bus idle */
-	SetI2CSCL(0); udelay(1000);
-	i = 10;
-	while ((i > 0) && (GetI2CSDA() != 1)) {
-		SetI2CSCL(1); udelay(1000);
-		SetI2CSCL(0); udelay(1000);
+	while ((i > 0) && (status & I2CSTAT_BSY)) {
+		udelay (1000);
+		status = i2c->IICSTAT;
 		i--;
 	}
-	SetI2CSCL(1); udelay(1000);
 
-	/* restore pin functions */
+	if ((status & I2CSTAT_BSY) || GetI2CSDA () == 0) {
 #ifdef CONFIG_S3C2410
-	gpio->GPECON = old_gpecon;
+		ulong old_gpecon = gpio->GPECON;
 #endif
 #ifdef CONFIG_S3C2400
-	gpio->PGCON = old_gpecon;
+		ulong old_gpecon = gpio->PGCON;
 #endif
-    }
+		/* bus still busy probably by (most) previously interrupted transfer */
 
-    /* calculate prescaler and divisor values */
-    freq = get_PCLK();
-    if ((freq / pres / (16+1)) > speed)
-	/* set prescaler to 512 */
-	pres = 512;
+#ifdef CONFIG_S3C2410
+		/* set I2CSDA and I2CSCL (GPE15, GPE14) to GPIO */
+		gpio->GPECON = (gpio->GPECON & ~0xF0000000) | 0x10000000;
+#endif
+#ifdef CONFIG_S3C2400
+		/* set I2CSDA and I2CSCL (PG5, PG6) to GPIO */
+		gpio->PGCON = (gpio->PGCON & ~0x00003c00) | 0x00000c00;
+#endif
 
-    div = 0;
-    while ((freq / pres / (div+1)) > speed)
-	div++;
+		/* toggle I2CSCL until bus idle */
+		SetI2CSCL (0);
+		udelay (1000);
+		i = 10;
+		while ((i > 0) && (GetI2CSDA () != 1)) {
+			SetI2CSCL (1);
+			udelay (1000);
+			SetI2CSCL (0);
+			udelay (1000);
+			i--;
+		}
+		SetI2CSCL (1);
+		udelay (1000);
 
-    /* set prescaler, divisor according to freq, also set
-       ACKGEN, IRQ */
-    i2c->IICCON = (div & 0x0F) | 0xA0 | ((pres == 512) ? 0x40 : 0);
+		/* restore pin functions */
+#ifdef CONFIG_S3C2410
+		gpio->GPECON = old_gpecon;
+#endif
+#ifdef CONFIG_S3C2400
+		gpio->PGCON = old_gpecon;
+#endif
+	}
 
-    /* init to SLAVE REVEIVE and set slaveaddr */
-    i2c->IICSTAT = 0;
-    i2c->IICADD = slaveadd;
-    /* program Master Transmit (and implicit STOP) */
-    i2c->IICSTAT = I2C_MODE_MT | I2C_TXRX_ENA;
+	/* calculate prescaler and divisor values */
+	freq = get_PCLK ();
+	if ((freq / pres / (16 + 1)) > speed)
+		/* set prescaler to 512 */
+		pres = 512;
+
+	div = 0;
+	while ((freq / pres / (div + 1)) > speed)
+		div++;
+
+	/* set prescaler, divisor according to freq, also set
+	 * ACKGEN, IRQ */
+	i2c->IICCON = (div & 0x0F) | 0xA0 | ((pres == 512) ? 0x40 : 0);
+
+	/* init to SLAVE REVEIVE and set slaveaddr */
+	i2c->IICSTAT = 0;
+	i2c->IICADD = slaveadd;
+	/* program Master Transmit (and implicit STOP) */
+	i2c->IICSTAT = I2C_MODE_MT | I2C_TXRX_ENA;
 
 }
 
 /*
-  cmd_type is 0 for write 1 for read.
-
-  addr_len can take any value from 0-255, it is only limited
-  by the char, we could make it larger if needed. If it is
-  0 we skip the address write cycle.
-
-*/
+ * cmd_type is 0 for write, 1 for read.
+ *
+ * addr_len can take any value from 0-255, it is only limited
+ * by the char, we could make it larger if needed. If it is
+ * 0 we skip the address write cycle.
+ */
 static
-int i2c_transfer(unsigned char cmd_type,
-		 unsigned char chip,
-		 unsigned char addr[],
-		 unsigned char addr_len,
-		 unsigned char data[],
-		 unsigned short data_len)
+int i2c_transfer (unsigned char cmd_type,
+		  unsigned char chip,
+		  unsigned char addr[],
+		  unsigned char addr_len,
+		  unsigned char data[], unsigned short data_len)
 {
-    S3C24X0_I2C * const i2c = S3C24X0_GetBase_I2C();
-    int i, status, result;
+	S3C24X0_I2C *const i2c = S3C24X0_GetBase_I2C ();
+	int i, status, result;
 
-    if (data == 0 || data_len == 0) {
-	/*Don't support data transfer of no length or to address 0*/
-	printf( "i2c_transfer: bad call\n" );
-	return I2C_NOK;
-    }
+	if (data == 0 || data_len == 0) {
+		/*Don't support data transfer of no length or to address 0 */
+		printf ("i2c_transfer: bad call\n");
+		return I2C_NOK;
+	}
 
-    /*CheckDelay(); */
-
-    /* Check I2C bus idle */
-    i = I2C_TIMEOUT * 1000;
-    status = i2c->IICSTAT;
-    while ((i > 0) && (status & I2CSTAT_BSY)) {
-	udelay(1000);
+	/* Check I2C bus idle */
+	i = I2C_TIMEOUT * 1000;
 	status = i2c->IICSTAT;
-	i--;
-    }
+	while ((i > 0) && (status & I2CSTAT_BSY)) {
+		udelay (1000);
+		status = i2c->IICSTAT;
+		i--;
+	}
 
+	if (status & I2CSTAT_BSY)
+		return I2C_NOK_TOUT;
 
-    if (status & I2CSTAT_BSY) {
-	result = I2C_NOK_TOUT;
-	return(result);
-    }
+	i2c->IICCON |= 0x80;
+	result = I2C_OK;
 
-    i2c->IICCON |= 0x80;
-
-    result = I2C_OK;
-
-    switch (cmd_type) {
+	switch (cmd_type) {
 	case I2C_WRITE:
-	    if (addr && addr_len) {
-		i2c->IICDS = chip;
-		/* send START */
-		i2c->IICSTAT = I2C_MODE_MT | I2C_TXRX_ENA | I2C_START_STOP;
-		i = 0;
-		while ((i < addr_len) && (result == I2C_OK)) {
-		    result = WaitForXfer();
-		    i2c->IICDS = addr[i];
-		    ReadWriteByte();
-		    i++;
+		if (addr && addr_len) {
+			i2c->IICDS = chip;
+			/* send START */
+			i2c->IICSTAT = I2C_MODE_MT | I2C_TXRX_ENA | I2C_START_STOP;
+			i = 0;
+			while ((i < addr_len) && (result == I2C_OK)) {
+				result = WaitForXfer ();
+				i2c->IICDS = addr[i];
+				ReadWriteByte ();
+				i++;
+			}
+			i = 0;
+			while ((i < data_len) && (result == I2C_OK)) {
+				result = WaitForXfer ();
+				i2c->IICDS = data[i];
+				ReadWriteByte ();
+				i++;
+			}
+		} else {
+			i2c->IICDS = chip;
+			/* send START */
+			i2c->IICSTAT = I2C_MODE_MT | I2C_TXRX_ENA | I2C_START_STOP;
+			i = 0;
+			while ((i < data_len) && (result = I2C_OK)) {
+				result = WaitForXfer ();
+				i2c->IICDS = data[i];
+				ReadWriteByte ();
+				i++;
+			}
 		}
-		i = 0;
-		while ((i < data_len) && (result == I2C_OK)) {
-		    result = WaitForXfer();
-		    i2c->IICDS = data[i];
-		    ReadWriteByte();
-		    i++;
-		}
-	    } else {
-		i2c->IICDS = chip;
-		/* send START */
-		i2c->IICSTAT = I2C_MODE_MT | I2C_TXRX_ENA | I2C_START_STOP;
-		i = 0;
-		while ((i < data_len) && (result = I2C_OK)) {
-		    result = WaitForXfer();
-		    i2c->IICDS = data[i];
-		    ReadWriteByte();
-		    i++;
-		}
-	    }
 
-	    if (result == I2C_OK)
-		result = WaitForXfer();
+		if (result == I2C_OK)
+			result = WaitForXfer ();
 
-	    /* send STOP */
-	    i2c->IICSTAT = I2C_MODE_MR | I2C_TXRX_ENA;
-	    ReadWriteByte();
-	    break;
+		/* send STOP */
+		i2c->IICSTAT = I2C_MODE_MR | I2C_TXRX_ENA;
+		ReadWriteByte ();
+		break;
 
 	case I2C_READ:
-	    if (addr && addr_len) {
-		i2c->IICSTAT = I2C_MODE_MT | I2C_TXRX_ENA;
-		i2c->IICDS = chip;
-		/* send START */
-		i2c->IICSTAT |= I2C_START_STOP;
-		result = WaitForXfer();
-		if (IsACK()) {
-		    i = 0;
-		    while ((i < addr_len) && (result == I2C_OK)) {
-			i2c->IICDS = addr[i];
-			ReadWriteByte();
-			result = WaitForXfer();
-			i++;
-		    }
+		if (addr && addr_len) {
+			i2c->IICSTAT = I2C_MODE_MT | I2C_TXRX_ENA;
+			i2c->IICDS = chip;
+			/* send START */
+			i2c->IICSTAT |= I2C_START_STOP;
+			result = WaitForXfer ();
+			if (IsACK ()) {
+				i = 0;
+				while ((i < addr_len) && (result == I2C_OK)) {
+					i2c->IICDS = addr[i];
+					ReadWriteByte ();
+					result = WaitForXfer ();
+					i++;
+				}
+
+				i2c->IICDS = chip;
+				/* resend START */
+				i2c->IICSTAT =  I2C_MODE_MR | I2C_TXRX_ENA |
+						I2C_START_STOP;
+				ReadWriteByte ();
+				result = WaitForXfer ();
+				i = 0;
+				while ((i < data_len) && (result == I2C_OK)) {
+					/* disable ACK for final READ */
+					if (i == data_len - 1)
+						i2c->IICCON &= ~0x80;
+					ReadWriteByte ();
+					result = WaitForXfer ();
+					data[i] = i2c->IICDS;
+					i++;
+				}
+			} else {
+				result = I2C_NACK;
+			}
 
-		    i2c->IICDS = chip;
-		    /* resend START */
-		    i2c->IICSTAT = I2C_MODE_MR | I2C_TXRX_ENA | I2C_START_STOP;
-		    ReadWriteByte();
-		    result = WaitForXfer();
-		    i = 0;
-		    while ((i < data_len) && (result == I2C_OK)) {
-			/* disable ACK for final READ */
-			if (i == data_len - 1)
-			    i2c->IICCON &= ~0x80;
-			ReadWriteByte();
-			result = WaitForXfer();
-			data[i] = i2c->IICDS;
-			i++;
-		    }
 		} else {
-		    result = I2C_NACK;
+			i2c->IICSTAT = I2C_MODE_MR | I2C_TXRX_ENA;
+			i2c->IICDS = chip;
+			/* send START */
+			i2c->IICSTAT |= I2C_START_STOP;
+			result = WaitForXfer ();
+
+			if (IsACK ()) {
+				i = 0;
+				while ((i < data_len) && (result == I2C_OK)) {
+					/* disable ACK for final READ */
+					if (i == data_len - 1)
+						i2c->IICCON &= ~0x80;
+					ReadWriteByte ();
+					result = WaitForXfer ();
+					data[i] = i2c->IICDS;
+					i++;
+				}
+			} else {
+				result = I2C_NACK;
+			}
 		}
 
-	    } else {
+		/* send STOP */
 		i2c->IICSTAT = I2C_MODE_MR | I2C_TXRX_ENA;
-		i2c->IICDS = chip;
-		/* send START */
-		i2c->IICSTAT |= I2C_START_STOP;
-		result = WaitForXfer();
-
-		if (IsACK()) {
-		    i = 0;
-		    while ((i < data_len) && (result == I2C_OK)) {
-			/* disable ACK for final READ */
-			if (i == data_len - 1)
-			    i2c->IICCON &= ~0x80;
-			ReadWriteByte();
-			result = WaitForXfer();
-			data[i] = i2c->IICDS;
-			i++;
-		    }
-		} else {
-		    result = I2C_NACK;
-		}
-	    }
-
-	    /* send STOP */
-	    i2c->IICSTAT = I2C_MODE_MR | I2C_TXRX_ENA;
-	    ReadWriteByte();
-	    break;
+		ReadWriteByte ();
+		break;
 
 	default:
-	    printf( "i2c_transfer: bad call\n" );
-	    result = I2C_NOK;
-	    break;
-    }
+		printf ("i2c_transfer: bad call\n");
+		result = I2C_NOK;
+		break;
+	}
 
-    return (result);
+	return (result);
 }
 
 int i2c_probe (uchar chip)
 {
-    uchar buf[1];
+	uchar buf[1];
 
-    buf[0] = 0;
+	buf[0] = 0;
 
-    /*
-     * What is needed is to send the chip address and verify that the
-     * address was <ACK>ed (i.e. there was a chip at that address which
-     * drove the data line low).
-     */
-    return(i2c_transfer (I2C_READ, chip << 1, 0, 0, buf, 1) != I2C_OK);
+	/*
+	 * What is needed is to send the chip address and verify that the
+	 * address was <ACK>ed (i.e. there was a chip at that address which
+	 * drove the data line low).
+	 */
+	return (i2c_transfer (I2C_READ, chip << 1, 0, 0, buf, 1) != I2C_OK);
 }
 
 int i2c_read (uchar chip, uint addr, int alen, uchar * buffer, int len)
 {
-    uchar xaddr[4];
-    int ret;
+	uchar xaddr[4];
+	int ret;
 
-    if ( alen > 4 ) {
-	printf ("I2C read: addr len %d not supported\n", alen);
-	return 1;
-    }
-
-    if ( alen > 0 ) {
-	xaddr[0] = (addr >> 24) & 0xFF;
-	xaddr[1] = (addr >> 16) & 0xFF;
-	xaddr[2] = (addr >> 8) & 0xFF;
-	xaddr[3] = addr & 0xFF;
-    }
+	if (alen > 4) {
+		printf ("I2C read: addr len %d not supported\n", alen);
+		return 1;
+	}
 
+	if (alen > 0) {
+		xaddr[0] = (addr >> 24) & 0xFF;
+		xaddr[1] = (addr >> 16) & 0xFF;
+		xaddr[2] = (addr >> 8) & 0xFF;
+		xaddr[3] = addr & 0xFF;
+	}
 
 #ifdef CFG_I2C_EEPROM_ADDR_OVERFLOW
-    /*
-     * EEPROM chips that implement "address overflow" are ones
-     * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
-     * address and the extra bits end up in the "chip address"
-     * bit slots. This makes a 24WC08 (1Kbyte) chip look like
-     * four 256 byte chips.
-     *
-     * Note that we consider the length of the address field to
-     * still be one byte because the extra address bits are
-     * hidden in the chip address.
-     */
-    if( alen > 0 )
-	chip |= ((addr >> (alen * 8)) & CFG_I2C_EEPROM_ADDR_OVERFLOW);
+	/*
+	 * EEPROM chips that implement "address overflow" are ones
+	 * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
+	 * address and the extra bits end up in the "chip address"
+	 * bit slots. This makes a 24WC08 (1Kbyte) chip look like
+	 * four 256 byte chips.
+	 *
+	 * Note that we consider the length of the address field to
+	 * still be one byte because the extra address bits are
+	 * hidden in the chip address.
+	 */
+	if (alen > 0)
+		chip |= ((addr >> (alen * 8)) & CFG_I2C_EEPROM_ADDR_OVERFLOW);
 #endif
-    if( (ret = i2c_transfer(I2C_READ, chip<<1, &xaddr[4-alen], alen, buffer, len )) != 0) {
-	printf( "I2c read: failed %d\n", ret);
-	return 1;
-    }
-    return 0;
+	if ((ret =
+	     i2c_transfer (I2C_READ, chip << 1, &xaddr[4 - alen], alen,
+			   buffer, len)) != 0) {
+		printf ("I2c read: failed %d\n", ret);
+		return 1;
+	}
+	return 0;
 }
 
 int i2c_write (uchar chip, uint addr, int alen, uchar * buffer, int len)
 {
-    uchar xaddr[4];
+	uchar xaddr[4];
 
-    if ( alen > 4 ) {
-	printf ("I2C write: addr len %d not supported\n", alen);
-	return 1;
-    }
-
-    if ( alen > 0 ) {
-	xaddr[0] = (addr >> 24) & 0xFF;
-	xaddr[1] = (addr >> 16) & 0xFF;
-	xaddr[2] = (addr >> 8) & 0xFF;
-	xaddr[3] = addr & 0xFF;
-    }
+	if (alen > 4) {
+		printf ("I2C write: addr len %d not supported\n", alen);
+		return 1;
+	}
 
+	if (alen > 0) {
+		xaddr[0] = (addr >> 24) & 0xFF;
+		xaddr[1] = (addr >> 16) & 0xFF;
+		xaddr[2] = (addr >> 8) & 0xFF;
+		xaddr[3] = addr & 0xFF;
+	}
 #ifdef CFG_I2C_EEPROM_ADDR_OVERFLOW
-    /*
-     * EEPROM chips that implement "address overflow" are ones
-     * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
-     * address and the extra bits end up in the "chip address"
-     * bit slots. This makes a 24WC08 (1Kbyte) chip look like
-     * four 256 byte chips.
-     *
-     * Note that we consider the length of the address field to
-     * still be one byte because the extra address bits are
-     * hidden in the chip address.
-     */
-    if( alen > 0 )
-	chip |= ((addr >> (alen * 8)) & CFG_I2C_EEPROM_ADDR_OVERFLOW);
+	/*
+	 * EEPROM chips that implement "address overflow" are ones
+	 * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
+	 * address and the extra bits end up in the "chip address"
+	 * bit slots. This makes a 24WC08 (1Kbyte) chip look like
+	 * four 256 byte chips.
+	 *
+	 * Note that we consider the length of the address field to
+	 * still be one byte because the extra address bits are
+	 * hidden in the chip address.
+	 */
+	if (alen > 0)
+		chip |= ((addr >> (alen * 8)) & CFG_I2C_EEPROM_ADDR_OVERFLOW);
 #endif
-    return (i2c_transfer(I2C_WRITE, chip<<1, &xaddr[4-alen], alen, buffer, len ) != 0);
+	return (i2c_transfer
+		(I2C_WRITE, chip << 1, &xaddr[4 - alen], alen, buffer,
+		 len) != 0);
 }
-
 #endif	/* CONFIG_HARD_I2C */
 
 #endif /* CONFIG_DRIVER_S3C24X0_I2C */

examples/Makefile

@@ -37,6 +37,10 @@ ifeq ($(ARCH),mips)
 LOAD_ADDR = 0x80200000 -T mips.lds
 endif
 
+ifeq ($(ARCH),nios)
+LOAD_ADDR = 0x01000000 -L $(gcclibdir)/m32 -T nios.lds
+endif
+
 include $(TOPDIR)/config.mk
 
 SREC	= hello_world.srec

examples/nios.lds

@@ -0,0 +1,61 @@
+/*
+ * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+
+OUTPUT_FORMAT("elf32-nios")
+OUTPUT_ARCH(nios)
+ENTRY(_start)
+
+SECTIONS
+{
+	.text :
+	{
+	  *(.text)
+	}
+        __text_end = .;
+
+        . = ALIGN(4);
+        .rodata :
+	{
+		*(.rodata)
+	}
+	__rodata_end = .;
+
+        . = ALIGN(4);
+        .data :
+	{
+		*(.data)
+	}
+	. = ALIGN(4);
+	__data_end = .;
+
+	__bss_start = .;
+        . = ALIGN(4);
+        .bss :
+	{
+		*(.bss)
+	}
+	. = ALIGN(4);
+	__bss_end = .;
+}
+

examples/stubs.c

@@ -61,6 +61,23 @@ gd_t *global_data;
 "	lw	$25, %1($25)\n"		\
 "	jr	$25\n"			\
 	: : "i"(offsetof(gd_t, jt)), "i"(XF_ ## x * sizeof(void *)) : "t9");
+#elif defined(CONFIG_NIOS)
+/*
+ * %g7 holds the pointer to the global_data. %g0 is call clobbered.
+ */
+#define EXPORT_FUNC(x) \
+	asm volatile (			\
+"	.globl " #x "\n"		\
+#x ":\n"				\
+"	pfx	%%hi(%0)\n"		\
+"	movi	%%g0, %%lo(%0)\n"	\
+"	add	%%g0, %%g7\n"		\
+"	ld	%%g0, [%%g0]\n"		\
+"	pfx	%1\n"			\
+"	ld	%%g0, [%%g0]\n"		\
+"	jmp	%%g0\n"			\
+"	nop	\n"			\
+	: : "i"(offsetof(gd_t, jt)), "i"(XF_ ## x) : "r0");
 #else
 #error stubs definition missing for this architecture
 #endif

fs/fat/fat.c

@@ -33,6 +33,11 @@
 
 #if (CONFIG_COMMANDS & CFG_CMD_FAT)
 
+#ifdef CONFIG_AUTO_UPDATE
+/* the VFAT code has a bug which breaks auto update */
+#undef CONFIG_SUPPORT_VFAT
+#endif
+
 /*
  * Convert a string to lowercase.
  */

include/asm-nios/bitops.h

@@ -0,0 +1,37 @@
+/*
+ * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _ASM_NIOS_BITOPS_H_
+#define _ASM_NIOS_BITOPS_H_
+
+
+extern void set_bit(int nr, volatile void * a);
+extern void clear_bit(int nr, volatile void * a);
+extern int test_and_clear_bit(int nr, volatile void * a);
+extern void change_bit(unsigned long nr, volatile void *addr);
+extern int test_and_set_bit(int nr, volatile void * a);
+extern int test_and_change_bit(int nr, volatile void * addr);
+extern int test_bit(int nr, volatile void * a);
+extern int ffs(int i);
+
+#endif /* _ASM_NIOS_BITOPS_H */

include/asm-nios/byteorder.h

@@ -0,0 +1,31 @@
+/*
+* (C) Copyright 2003, Psyent Corporation <www.psyent.com>
+* Scott McNutt <smcnutt@psyent.com>
+*
+* See file CREDITS for list of people who contributed to this
+* project.
+*
+* This program is free software; you can redistribute it and/or
+* modify it under the terms of the GNU General Public License as
+* published by the Free Software Foundation; either version 2 of
+* the License, or (at your option) any later version.
+*
+* This program is distributed in the hope that it will be useful,
+* but WITHOUT ANY WARRANTY; without even the implied warranty of
+* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+* GNU General Public License for more details.
+*
+* You should have received a copy of the GNU General Public License
+* along with this program; if not, write to the Free Software
+* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+* MA 02111-1307 USA
+*/
+
+#ifndef __ASM_NIOS_BYTEORDER_H
+#define __ASM_NIOS_BYTEORDER_H
+
+#include <asm/types.h>
+#include <linux/byteorder/little_endian.h>
+
+#endif
+

include/asm-nios/global_data.h

@@ -0,0 +1,46 @@
+/*
+ * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef	__ASM_NIOS_GLOBALDATA_H
+#define __ASM_NIOS_GLOBALDATA_H
+
+typedef	struct	global_data {
+	bd_t		*bd;
+	unsigned long	flags;
+	unsigned long	baudrate;
+	unsigned long	cpu_clk;	/* CPU clock in Hz!		*/
+	unsigned long	have_console;	/* serial_init() was called */
+	unsigned long	ram_size;	/* RAM size */
+	unsigned long	reloc_off;	/* Relocation Offset */
+	unsigned long	env_addr;	/* Address  of Environment struct */
+	unsigned long	env_valid;	/* Checksum of Environment valid */
+	void		**jt;		/* Standalone app jump table */
+} gd_t;
+
+/* flags */
+#define	GD_FLG_RELOC	0x00001		/* Code was relocated to RAM		*/
+#define	GD_FLG_DEVINIT	0x00002		/* Devices have been initialized	*/
+
+#define DECLARE_GLOBAL_DATA_PTR     register gd_t *gd asm ("%g7")
+
+#endif /* __ASM_NIOS_GLOBALDATA_H */

include/asm-nios/io.h

@@ -0,0 +1 @@
+/*FIXME: Implement this! */

include/asm-nios/posix_types.h

@@ -0,0 +1,63 @@
+#ifndef __ASM_NIOS_POSIX_TYPES_H
+#define __ASM_NIOS_POSIX_TYPES_H
+
+/*
+ * This file is generally used by user-level software, so you need to
+ * be a little careful about namespace pollution etc.  Also, we cannot
+ * assume GCC is being used.
+ */
+
+typedef unsigned short	__kernel_dev_t;
+typedef unsigned long	__kernel_ino_t;
+typedef unsigned short	__kernel_mode_t;
+typedef unsigned short	__kernel_nlink_t;
+typedef long		__kernel_off_t;
+typedef int		__kernel_pid_t;
+typedef unsigned short	__kernel_ipc_pid_t;
+typedef unsigned short	__kernel_uid_t;
+typedef unsigned short	__kernel_gid_t;
+typedef unsigned long	__kernel_size_t;
+typedef int		__kernel_ssize_t;
+typedef int		__kernel_ptrdiff_t;
+typedef long		__kernel_time_t;
+typedef long		__kernel_suseconds_t;
+typedef long		__kernel_clock_t;
+typedef int		__kernel_daddr_t;
+typedef char *		__kernel_caddr_t;
+typedef unsigned short	__kernel_uid16_t;
+typedef unsigned short	__kernel_gid16_t;
+typedef unsigned int	__kernel_uid32_t;
+typedef unsigned int	__kernel_gid32_t;
+
+typedef unsigned short	__kernel_old_uid_t;
+typedef unsigned short	__kernel_old_gid_t;
+
+#ifdef __GNUC__
+typedef long long	__kernel_loff_t;
+#endif
+
+typedef struct {
+#if defined(__KERNEL__) || defined(__USE_ALL)
+	int	val[2];
+#else /* !defined(__KERNEL__) && !defined(__USE_ALL) */
+	int	__val[2];
+#endif /* !defined(__KERNEL__) && !defined(__USE_ALL) */
+} __kernel_fsid_t;
+
+#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2)
+
+#undef	__FD_SET
+#define	__FD_SET(d, set)	((set)->fds_bits[__FDELT(d)] |= __FDMASK(d))
+
+#undef	__FD_CLR
+#define	__FD_CLR(d, set)	((set)->fds_bits[__FDELT(d)] &= ~__FDMASK(d))
+
+#undef	__FD_ISSET
+#define	__FD_ISSET(d, set)	((set)->fds_bits[__FDELT(d)] & __FDMASK(d))
+
+#undef	__FD_ZERO
+#define __FD_ZERO(fdsetp) (memset (fdsetp, 0, sizeof(*(fd_set *)fdsetp)))
+
+#endif /* defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) */
+
+#endif

include/asm-nios/processor.h

@@ -0,0 +1 @@
+/* FIXME: Implement this! */

include/asm-nios/psr.h

@@ -0,0 +1,29 @@
+/*
+ * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _NIOS_PSR_H
+#define _NIOS_PSR_H
+
+
+
+#endif /* _NIOS_PSR_H */

include/asm-nios/ptrace.h

@@ -0,0 +1,36 @@
+/*
+ * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _NIOS_PTRACE_H
+#define _NIOS_PTRACE_H
+
+struct pt_regs {
+	unsigned global[8];
+	unsigned in[8];
+	unsigned status;
+	unsigned istatus;
+	unsigned retaddr;
+};
+
+
+#endif /* _NIOS_PTRACE_H */

include/asm-nios/string.h

@@ -0,0 +1,25 @@
+#ifndef __ASM_NIOS_STRING_H
+#define __ASM_NIOS_STRING_H
+
+#undef __HAVE_ARCH_STRRCHR
+extern char * strrchr(const char * s, int c);
+
+#undef __HAVE_ARCH_STRCHR
+extern char * strchr(const char * s, int c);
+
+#undef __HAVE_ARCH_MEMCPY
+extern void * memcpy(void *, const void *, __kernel_size_t);
+
+#undef __HAVE_ARCH_MEMMOVE
+extern void * memmove(void *, const void *, __kernel_size_t);
+
+#undef __HAVE_ARCH_MEMCHR
+extern void * memchr(const void *, int, __kernel_size_t);
+
+#undef __HAVE_ARCH_MEMSET
+extern void * memset(void *, int, __kernel_size_t);
+
+#undef __HAVE_ARCH_MEMZERO
+extern void memzero(void *ptr, __kernel_size_t n);
+
+#endif

include/asm-nios/system.h

@@ -0,0 +1,4 @@
+#ifndef _ASM_NIOS_SYSTEM_H_
+#define _ASM_NIOS_SYSTEM_H_
+
+#endif /* _ASM_NIOS_SYSTEM_H */

include/asm-nios/types.h

@@ -0,0 +1,57 @@
+#ifndef _NIOS_TYPES_H
+#define _NIOS_TYPES_H
+
+/*
+ * This file is never included by application software unless
+ * explicitly requested (e.g., via linux/types.h) in which case the
+ * application is Linux specific so (user-) name space pollution is
+ * not a major issue.  However, for interoperability, libraries still
+ * need to be careful to avoid a name clashes.
+ */
+
+typedef unsigned short umode_t;
+
+/*
+ * __xx is ok: it doesn't pollute the POSIX namespace. Use these in the
+ * header files exported to user space
+ */
+
+typedef __signed__ char __s8;
+typedef unsigned char __u8;
+
+typedef __signed__ short __s16;
+typedef unsigned short __u16;
+
+typedef __signed__ int __s32;
+typedef unsigned int __u32;
+
+#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
+typedef __signed__ long long __s64;
+typedef unsigned long long __u64;
+#endif
+
+/*
+ * These aren't exported outside the kernel to avoid name space clashes
+ */
+#ifdef __KERNEL__
+
+typedef signed char s8;
+typedef unsigned char u8;
+
+typedef signed short s16;
+typedef unsigned short u16;
+
+typedef signed int s32;
+typedef unsigned int u32;
+
+typedef signed long long s64;
+typedef unsigned long long u64;
+
+#define BITS_PER_LONG 32
+
+/* Dma addresses are 32-bits wide.  */
+
+typedef u32 dma_addr_t;
+#endif /* __KERNEL__ */
+
+#endif /* _NIOS_TYPES_H */

include/asm-nios/u-boot.h

@@ -0,0 +1,42 @@
+/*
+ * (C) Copyright 2003
+ * Psyent Corporation
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _U_BOOT_H_
+#define _U_BOOT_H_
+
+typedef struct bd_info {
+	unsigned long	bi_memstart;	/* start of DRAM memory */
+	unsigned long	bi_memsize;	/* size	 of DRAM memory in bytes */
+	unsigned long	bi_flashstart;	/* start of FLASH memory */
+	unsigned long	bi_flashsize;	/* size	 of FLASH memory */
+	unsigned long	bi_flashoffset; /* reserved area for startup monitor */
+	unsigned long	bi_sramstart;	/* start of SRAM memory */
+	unsigned long	bi_sramsize;	/* size	 of SRAM memory */
+	unsigned long	bi_ip_addr;	/* IP Address */
+	unsigned char	bi_enetaddr[6]; /* Ethernet adress */
+	unsigned long	bi_baudrate;	/* Console Baudrate */
+} bd_t;
+
+
+#endif	/* _U_BOOT_H_ */

include/cmd_confdefs.h

@@ -120,6 +120,7 @@
 			CFG_CMD_PCI	| \
 			CFG_CMD_PCMCIA	| \
 			CFG_CMD_PING	| \
+			CFG_CMD_PORTIO	| \
 			CFG_CMD_REGINFO | \
 			CFG_CMD_SAVES	| \
 			CFG_CMD_SCSI	| \

include/configs/DK1C20.h

@@ -0,0 +1,171 @@
+/*
+ * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*------------------------------------------------------------------------
+ * BOARD/CPU -- TOP-LEVEL
+ *----------------------------------------------------------------------*/
+#define CONFIG_NIOS		1		/* NIOS-32 core		*/
+#define	CONFIG_DK1C20		1		/* Cyclone DK-1C20 board*/
+#define CONFIG_SYS_CLK_FREQ	50000000	/* 50 MHz core clock	*/
+
+/*------------------------------------------------------------------------
+ * BASE ADDRESSES
+ *----------------------------------------------------------------------*/
+#define CFG_FLASH_BASE		0x00000000	/* Flash memory base	*/
+#define CFG_SRAM_BASE		0x00800000	/* External SRAM	*/
+#define CFG_SRAM_SIZE		0x00100000	/* 1 MByte 		*/
+#define CFG_SDRAM_BASE		0x01000000	/* SDRAM base addr	*/
+#define CFG_SDRAM_SIZE		0x01000000	/* 16 MByte		*/
+#define CFG_VECT_BASE		0x008fff00	/* Vector table addr	*/
+
+/*------------------------------------------------------------------------
+ * MEMORY ORGANIZATION - For the most part, you can put things pretty
+ * much anywhere. This is pretty flexible for Nios. So here we make some
+ * arbitrary choices & assume that the monitor is placed at the end of
+ * a memory resource (so you must make sure TEXT_BASE is chosen
+ * appropriately).
+ *
+ * 	-The heap is placed below the monitor.
+ * 	-Global data is placed below the heap.
+ * 	-The stack is placed below global data (&grows down).
+ *----------------------------------------------------------------------*/
+#define CFG_MONITOR_LEN		(256 * 1024)	/* Reserve 256k		*/
+#define CFG_ENV_SIZE		0x10000		/* 64 KByte (1 sector)	*/
+#define CFG_GBL_DATA_SIZE	128		/* Global data size rsvd*/
+#define CFG_MALLOC_LEN		(CFG_ENV_SIZE + 128*1024)
+
+#define CFG_MONITOR_BASE	TEXT_BASE
+#define CFG_MALLOC_BASE		(CFG_MONITOR_BASE - CFG_MALLOC_LEN)
+#define CFG_GBL_DATA_OFFSET	(CFG_MALLOC_BASE -CFG_GBL_DATA_SIZE)
+#define CFG_INIT_SP		CFG_GBL_DATA_OFFSET
+
+/*------------------------------------------------------------------------
+ * FLASH
+ *----------------------------------------------------------------------*/
+#define CFG_MAX_FLASH_SECT	128		/* Max # sects per bank */
+#define CFG_MAX_FLASH_BANKS	1		/* Max # of flash banks */
+#define CFG_FLASH_ERASE_TOUT	8000		/* Erase timeout (msec) */
+#define CFG_FLASH_WRITE_TOUT	100		/* Write timeout (msec) */
+
+/*------------------------------------------------------------------------
+ * ENVIRONMENT
+ *----------------------------------------------------------------------*/
+#define	CFG_ENV_IS_IN_FLASH	1		/* Environment in flash */
+#define CFG_ENV_ADDR		0x00000000	/* Mem addr of env	*/
+#define CONFIG_ENV_OVERWRITE			/* Serial/eth change Ok */
+
+/*------------------------------------------------------------------------
+ * CONSOLE
+ *----------------------------------------------------------------------*/
+#define CFG_NIOS_CONSOLE	0x00920900	/* Cons uart base addr	*/
+#define CFG_NIOS_FIXEDBAUD	1		/* Baudrate is fixed	*/
+#define CFG_BAUDRATE_TABLE  { 9600, 19200, 38400, 57600, 115200 }
+#define CONFIG_BAUDRATE		115200
+
+/*------------------------------------------------------------------------
+ * TIMER FOR TIMEBASE -- Nios doesn't have the equivalent of ppc  PIT,
+ * so an avalon bus timer is required.
+ *----------------------------------------------------------------------*/
+#define CFG_NIOS_TMRBASE	0x009209e0
+#define CFG_NIOS_TMRIRQ		50
+#define CFG_NIOS_TMRMS		10
+
+/*------------------------------------------------------------------------
+ * Ethernet -- needs work!
+ *----------------------------------------------------------------------*/
+#if 0
+#define CONFIG_DRIVER_SMC91111			/* Using SMC91c111	*/
+#define CONFIG_SMC91111_BASE	0x00910000	/* Base address		*/
+#undef  CONFIG_SMC91111_EXT_PHY			/* No external PHY	*/
+#define CONFIG_SMC_USE_32_BIT	1		/* 32-bit i/f		*/
+#endif
+
+#define CONFIG_ETHADDR		08:00:3e:26:0a:5b
+#define CONFIG_NETMASK		255.255.255.0
+#define CONFIG_IPADDR		192.168.2.21
+#define CONFIG_SERVERIP		192.168.2.16
+
+/*------------------------------------------------------------------------
+ * COMMANDS
+ *----------------------------------------------------------------------*/
+#define CONFIG_COMMANDS		(CFG_CMD_ALL & ~( \
+				 CFG_CMD_ASKENV | \
+				 CFG_CMD_BEDBUG | \
+				 CFG_CMD_BMP	| \
+				 CFG_CMD_BSP	| \
+				 CFG_CMD_CACHE	| \
+				 CFG_CMD_DATE	| \
+				 CFG_CMD_DOC	| \
+				 CFG_CMD_DTT	| \
+				 CFG_CMD_EEPROM | \
+				 CFG_CMD_ELF    | \
+				 CFG_CMD_FAT	| \
+				 CFG_CMD_FDC	| \
+				 CFG_CMD_FDOS	| \
+				 CFG_CMD_HWFLOW	| \
+				 CFG_CMD_IDE	| \
+				 CFG_CMD_I2C	| \
+				 CFG_CMD_JFFS2	| \
+				 CFG_CMD_KGDB	| \
+				 CFG_CMD_NAND	| \
+				 CFG_CMD_NET	| \
+				 CFG_CMD_MMC	| \
+				 CFG_CMD_MII	| \
+				 CFG_CMD_PCI	| \
+				 CFG_CMD_PCMCIA | \
+				 CFG_CMD_SCSI	| \
+				 CFG_CMD_SPI	| \
+				 CFG_CMD_VFD	| \
+				 CFG_CMD_USB	) )
+
+
+#include <cmd_confdefs.h>
+
+/*------------------------------------------------------------------------
+ * KGDB
+ *----------------------------------------------------------------------*/
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#define CONFIG_KGDB_BAUDRATE	9600
+#endif
+
+/*------------------------------------------------------------------------
+ * MISC
+ *----------------------------------------------------------------------*/
+#define	CFG_LONGHELP				/* undef to save memory		*/
+#define	CFG_PROMPT		"==> "	/* Monitor Command Prompt	*/
+#define	CFG_CBSIZE		256		/* Console I/O Buffer Size	*/
+#define	CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define	CFG_MAXARGS		16		/* max number of command args	*/
+#define CFG_BARGSIZE		CFG_CBSIZE	/* Boot Argument Buffer Size	*/
+#undef  CFG_CLKS_IN_HZ
+#define	CFG_HZ			1562500
+#define CFG_LOAD_ADDR		0x00800000	/* Default load address */
+
+#define CFG_MEMTEST_START	0x00000000
+#define CFG_MEMTEST_END		0x00000000
+
+
+#endif	/* __CONFIG_H */

include/configs/IceCube.h

@@ -107,13 +107,9 @@
  * I2C configuration
  */
 #define CONFIG_HARD_I2C		1	/* I2C with hardware support */
-#define CFG_I2C_MODULE		1	/* If defined then I2C module #2 is used
-					 * otherwise I2C module #1 is used */
-#ifdef CONFIG_MPC5200
-#define CFG_I2C_SPEED		0x3D	/* 86KHz given 133MHz IPBI */
-#else
-#define CFG_I2C_SPEED		0x35	/* 86KHz given 33MHz IPBI */
-#endif
+#define CFG_I2C_MODULE		2	/* Select I2C module #1 or #2 */
+
+#define CFG_I2C_SPEED		100000 /* 100 kHz */
 #define CFG_I2C_SLAVE		0x7F
 
 /*
@@ -122,7 +118,7 @@
 #define CFG_I2C_EEPROM_ADDR		0x50	/* 1010000x */
 #define CFG_I2C_EEPROM_ADDR_LEN		1
 #define CFG_EEPROM_PAGE_WRITE_BITS	3
-#define CFG_EEPROM_PAGE_WRITE_DELAY_MS	35
+#define CFG_EEPROM_PAGE_WRITE_DELAY_MS	70
 
 /*
  * Flash configuration
@@ -191,7 +187,7 @@
 /*
  * GPIO configuration
  */
-#define CFG_GPS_PORT_CONFIG	0x00000004
+#define CFG_GPS_PORT_CONFIG	0x10000004
 
 /*
  * Miscellaneous configurable options

include/configs/PPChameleonEVB.h

@@ -1,9 +1,12 @@
 /*
- * (C) Copyright 2001-2003
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
+ * (C) Copyright 2003
+ * DAVE Srl
  *
- * See file CREDITS for list of people who contributed to this
- * project.
+ * http://www.dave-tech.it
+ * http://www.wawnet.biz
+ * mailto:info@wawnet.biz
+ *
+ * Credits: Stefan Roese, Wolfgang Denk
  *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License as
@@ -28,6 +31,13 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#define CONFIG_PPCHAMELEON_MODULE_BA	0	/* Basic    Model */	
+#define CONFIG_PPCHAMELEON_MODULE_ME	1	/* Medium   Model */
+#define CONFIG_PPCHAMELEON_MODULE_HI	2	/* High-End Model */
+#ifndef	CONFIG_PPCHAMELEON_MODULE_MODEL
+#define	CONFIG_PPCHAMELEON_MODULE_MODEL	CONFIG_PPCHAMELEON_MODULE_BA
+#endif
+
 /*
  * Debug stuff
  */
@@ -150,6 +160,7 @@
 
 #define CFG_MAX_NAND_DEVICE	2	/* Max number of NAND devices		*/
 #define SECTORSIZE 512
+#define NAND_NO_RB
 
 #define ADDR_COLUMN 1
 #define ADDR_PAGE 2
@@ -248,19 +259,15 @@
         } \
 } while(0)
 
+#ifdef NAND_NO_RB
+/* constant delay (see also tR in the datasheet) */
 #define NAND_WAIT_READY(nand) do { \
-	ulong mask = 0; \
-	switch ((ulong)(((struct nand_chip *)nand)->IO_ADDR)) { \
-	case CFG_NAND0_BASE: \
-		mask = CFG_NAND0_RDY; \
-		break; \
-	case CFG_NAND1_BASE: \
-		mask = CFG_NAND1_RDY; \
-		break; \
-	} \
-	while (!(in32(GPIO0_IR) & mask)) \
-		; \
+	udelay(12); \
 } while (0)
+#else
+/* use the R/B pin */
+/* TBD */
+#endif
 
 #define WRITE_NAND_COMMAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)(d); } while(0)
 #define WRITE_NAND_ADDRESS(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)(d); } while(0)

include/configs/ZPC1900.h

@@ -0,0 +1,283 @@
+/*
+ * Copyright (C) 2003 Arabella Software Ltd.
+ * Yuli Barcohen <yuli@arabellasw.com>
+ *
+ * U-Boot configuration for Zephyr Engineering ZPC.1900 board.
+ * This port was developed and tested on Revision C board.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#define CONFIG_MPC8260		1	/* This is an MPC8260 CPU      */
+#define CONFIG_ZPC1900		1	/* ...on Zephyr ZPC.1900 board */
+#define CPU_ID_STR		"MPC8265"
+
+#undef DEBUG
+
+#undef CONFIG_BOARD_PRE_INIT		/* Don't call board_pre_init   */
+
+/* Allow serial number (serial) and MAC address (ethaddr) to be overwritten */
+#define CONFIG_ENV_OVERWRITE
+
+/*
+ * Select serial console configuration
+ *
+ * If either CONFIG_CONS_ON_SMC or CONFIG_CONS_ON_SCC is selected, then
+ * CONFIG_CONS_INDEX must be set to the channel number (1-2 for SMC, 1-4
+ * for SCC).
+ */
+#define	CONFIG_CONS_ON_SMC		/* Console is on SMC         */
+#undef  CONFIG_CONS_ON_SCC		/* It's not on SCC           */
+#undef	CONFIG_CONS_NONE		/* It's not on external UART */
+#define CONFIG_CONS_INDEX	1	/* SMC1 is used for console  */
+
+/*
+ * Select ethernet configuration
+ *
+ * If either CONFIG_ETHER_ON_SCC or CONFIG_ETHER_ON_FCC is selected,
+ * then CONFIG_ETHER_INDEX must be set to the channel number (1-4 for
+ * SCC, 1-3 for FCC)
+ *
+ * If CONFIG_ETHER_NONE is defined, then either the ethernet routines
+ * must be defined elsewhere (as for the console), or CFG_CMD_NET must
+ * be removed from CONFIG_COMMANDS to remove support for networking.
+ */
+#undef	CONFIG_ETHER_ON_SCC		/* Ethernet is not on SCC */
+#define CONFIG_ETHER_ON_FCC		/* Ethernet is on FCC     */
+#undef	CONFIG_ETHER_NONE		/* No external Ethernet   */
+
+#ifdef CONFIG_ETHER_ON_FCC
+
+#define CONFIG_ETHER_INDEX	2	/* FCC2 is used for Ethernet */
+
+#if (CONFIG_ETHER_INDEX == 2)
+/*
+ * - Rx clock is CLK13
+ * - Tx clock is CLK14
+ * - Select bus for bd/buffers (see 28-13)
+ * - Full duplex
+ */
+# define CFG_CMXFCR_MASK	(CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK)
+# define CFG_CMXFCR_VALUE	(CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14)
+# define CFG_CPMFCR_RAMTYPE	0
+# define CFG_FCC_PSMR		(FCC_PSMR_FDE | FCC_PSMR_LPB)
+
+#endif	/* CONFIG_ETHER_INDEX */
+
+#define CONFIG_MII			/* MII PHY management        */
+#define CONFIG_BITBANGMII		/* Bit-banged MDIO interface */
+/*
+ * GPIO pins used for bit-banged MII communications
+ */
+#define MDIO_PORT	2		/* Port C */
+#define MDIO_ACTIVE	(iop->pdir |=  0x00400000)
+#define MDIO_TRISTATE	(iop->pdir &= ~0x00400000)
+#define MDIO_READ	((iop->pdat &  0x00400000) != 0)
+
+#define MDIO(bit)	if(bit) iop->pdat |=  0x00400000; \
+			else	iop->pdat &= ~0x00400000
+
+#define MDC(bit)	if(bit) iop->pdat |=  0x00200000; \
+			else	iop->pdat &= ~0x00200000
+
+#define MIIDELAY	udelay(1)
+
+#endif /* CONFIG_ETHER_ON_FCC */
+
+#ifndef CONFIG_8260_CLKIN
+#define CONFIG_8260_CLKIN	66666666	/* in Hz */
+#endif
+
+#define CONFIG_BAUDRATE		9600
+
+#define CONFIG_COMMANDS		(CFG_CMD_ALL & ~( \
+				 CFG_CMD_BEDBUG | \
+				 CFG_CMD_BMP	| \
+				 CFG_CMD_BSP	| \
+				 CFG_CMD_DATE	| \
+				 CFG_CMD_DOC	| \
+				 CFG_CMD_DTT	| \
+				 CFG_CMD_EEPROM | \
+				 CFG_CMD_ELF    | \
+				 CFG_CMD_FAT    | \
+				 CFG_CMD_FDC	| \
+				 CFG_CMD_FDOS	| \
+				 CFG_CMD_HWFLOW	| \
+				 CFG_CMD_I2C	| \
+				 CFG_CMD_IDE	| \
+				 CFG_CMD_JFFS2	| \
+				 CFG_CMD_KGDB	| \
+				 CFG_CMD_MMC	| \
+				 CFG_CMD_NAND	| \
+				 CFG_CMD_PCI	| \
+				 CFG_CMD_PCMCIA | \
+				 CFG_CMD_SCSI	| \
+				 CFG_CMD_SPI	| \
+				 CFG_CMD_USB	| \
+				 CFG_CMD_VFD    ) )
+
+/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
+#include <cmd_confdefs.h>
+
+#define CONFIG_BOOTDELAY	5	/* autoboot after 5 seconds */
+#define CONFIG_BOOTCOMMAND	"dhcp;bootm"	/* autoboot command */
+#define CONFIG_BOOTARGS		"root=/dev/nfs rw ip=:::::eth0:dhcp"
+
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#undef	CONFIG_KGDB_ON_SMC		/* define if kgdb on SMC */
+#define CONFIG_KGDB_ON_SCC		/* define if kgdb on SCC */
+#undef	CONFIG_KGDB_NONE		/* define if kgdb on something else */
+#define CONFIG_KGDB_INDEX	2	/* which serial channel for kgdb */
+#define CONFIG_KGDB_BAUDRATE	115200	/* speed to run kgdb serial port at */
+#endif
+
+#define CONFIG_BZIP2	/* include support for bzip2 compressed images */
+#undef	CONFIG_WATCHDOG	/* disable platform specific watchdog */
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CFG_HUSH_PARSER
+#define CFG_PROMPT_HUSH_PS2 "> "
+#define CFG_LONGHELP			/* undef to save memory	    */
+#define CFG_PROMPT	"=> "		/* Monitor Command Prompt   */
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#define CFG_CBSIZE	1024		/* Console I/O Buffer Size  */
+#else
+#define CFG_CBSIZE	256			/* Console I/O Buffer Size  */
+#endif
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16)	/* Print Buffer Size  */
+#define CFG_MAXARGS		16		/* max number of command args */
+#define CFG_BARGSIZE		CFG_CBSIZE	/* Boot Argument Buffer Size  */
+
+#define CFG_MEMTEST_START	0x00100000	/* memtest works on */
+#define CFG_MEMTEST_END		0x00f00000	/* 1 ... 15 MB in DRAM	*/
+
+#define CFG_LOAD_ADDR		0x100000	/* default load address */
+
+#define CFG_HZ			1000	/* decrementer freq: 1 ms ticks */
+
+#define CFG_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200, 230400 }
+
+#define CFG_FLASH_BASE		0xFFE00000
+#define CFG_FLASH_CFI
+#define CFG_MAX_FLASH_BANKS	1	/* max num of flash banks	*/
+#define CFG_MAX_FLASH_SECT	32	/* max num of sects on one chip */
+
+#define CFG_DEFAULT_IMMR	0x0F010000
+
+#define CFG_IMMR		0xF0000000
+#define CFG_SDRAM_BASE		0x00000000
+#define CFG_SDRAM_SIZE		64
+#define CFG_FLSIMM_BASE		0xFC000000
+#define CFG_LSDRAM_BASE		0xFE000000
+#define CFG_BCSR		0xFEA00000
+#define CFG_EEPROM		0xFEB00000
+
+#define CFG_FLASH_BANKS_LIST	{ CFG_FLASH_BASE }
+
+#define BCSR_PCI_MODE		0x01
+
+#define CFG_INIT_RAM_ADDR	CFG_IMMR
+#define CFG_INIT_RAM_END	0x4000	/* End of used area in DPRAM	*/
+#define CFG_GBL_DATA_SIZE	128	/* size in bytes reserved for initial data */
+#define CFG_GBL_DATA_OFFSET	(CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
+#define CFG_INIT_SP_OFFSET	CFG_GBL_DATA_OFFSET
+
+/* Hard reset configuration word */
+#define CFG_HRCW_MASTER		(HRCW_EBM | HRCW_BPS01                    |\
+				 HRCW_L2CPC10 | HRCW_DPPC00 | HRCW_ISB010 |\
+				 HRCW_APPC10                              |\
+				 HRCW_MODCK_H0101                          \
+				) /* 0x14820205 */
+/* No slaves */
+#define CFG_HRCW_SLAVE1 	0
+#define CFG_HRCW_SLAVE2 	0
+#define CFG_HRCW_SLAVE3 	0
+#define CFG_HRCW_SLAVE4 	0
+#define CFG_HRCW_SLAVE5 	0
+#define CFG_HRCW_SLAVE6 	0
+#define CFG_HRCW_SLAVE7 	0
+
+#define BOOTFLAG_COLD		0x01	/* Normal Power-On: Boot from FLASH */
+#define BOOTFLAG_WARM		0x02	/* Software reboot                  */
+
+#define CFG_MONITOR_BASE	TEXT_BASE
+#if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
+#define CFG_RAMBOOT
+#endif
+
+#define CFG_MONITOR_LEN		(256 << 10)	/* Reserve 256 kB for Monitor	*/
+#define CFG_MALLOC_LEN		(4096 << 10)	/* Reserve 4 MB for malloc()	*/
+#define CFG_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux */
+
+#if !defined(CFG_ENV_IS_IN_FLASH) && !defined(CFG_ENV_IS_IN_NVRAM)
+#define CFG_ENV_IS_IN_NVRAM	1
+#endif
+
+#ifdef CFG_ENV_IS_IN_FLASH
+#  define CFG_ENV_SECT_SIZE	0x10000
+#  define CFG_ENV_ADDR		(CFG_MONITOR_BASE + CFG_ENV_SECT_SIZE)
+#else
+#  define CFG_ENV_ADDR		(CFG_EEPROM + 0x400)
+#  define CFG_ENV_SIZE		0x200
+#  define CFG_NVRAM_ACCESS_ROUTINE
+#endif
+
+#define CFG_CACHELINE_SIZE	32	/* For MPC8260 CPU */
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#  define CFG_CACHELINE_SHIFT	5	/* log base 2 of the above value */
+#endif
+
+#define CFG_HID0_INIT		0
+#define CFG_HID0_FINAL		(HID0_ICE | HID0_IFEM | HID0_ABE )
+
+#define CFG_HID2		0
+
+#define CFG_SIUMCR		0x42200000
+#define CFG_SYPCR		0xFFFFFFC3
+#define CFG_BCR			0x90400000
+#define CFG_SCCR		SCCR_DFBRG01
+
+#define CFG_RMR			RMR_CSRE
+#define CFG_TMCNTSC		(TMCNTSC_SEC|TMCNTSC_ALR|TMCNTSC_TCF|TMCNTSC_TCE)
+#define CFG_PISCR		(PISCR_PS|PISCR_PTF|PISCR_PTE)
+#define CFG_RCCR		0
+
+#define CFG_PSDMR		0x014EB45A
+#define CFG_PSRT		0x0C
+#define CFG_LSDMR		0x008AB552
+#define CFG_LSRT		0x0E
+#define CFG_MPTPR		0x4000
+
+#define CFG_BR0_PRELIM		CFG_FLASH_BASE | 0x00000801
+#define CFG_OR0_PRELIM		0xFFE00856
+#define CFG_BR5_PRELIM		CFG_EEPROM | 0x00000801
+#define CFG_OR5_PRELIM		0xFFFF03F6
+#define CFG_BR6_PRELIM		CFG_FLSIMM_BASE | 0x00000801
+#define CFG_OR6_PRELIM		0xFE000856
+#define CFG_BR7_PRELIM		CFG_BCSR | 0x00000801
+#define CFG_OR7_PRELIM		0xFFFF83F6
+
+#define CFG_RESET_ADDRESS	0xC0000000
+
+#endif /* __CONFIG_H */

include/configs/trab.h

@@ -28,8 +28,8 @@
 
 #ifdef CONFIG_OLD_VERSION		/* Old configuration:		*/
 #define	CONFIG_RAM_16MB			/*	16 MB SDRAM		*/
-#define CONFIG_FLASH_8MB		/*	 8 MB Flash		*/
 #endif
+#define CONFIG_FLASH_8MB		/*	 8 MB Flash		*/
 
 /*
  * If we are developing, we might want to start armboot from ram
@@ -182,7 +182,7 @@
 #define CONFIG_IPADDR		192.168.3.68
 #define CONFIG_HOSTNAME		trab
 #define CONFIG_SERVERIP		192.168.3.1
-#define CONFIG_BOOTCOMMAND	"run flash_nfs"
+#define CONFIG_BOOTCOMMAND	"burn_in"
 
 #ifndef CONFIG_FLASH_8MB	/* current config: 16 MB flash */
 #ifdef CFG_HUSH_PARSER
@@ -331,9 +331,13 @@
 #define CONFIG_MISC_INIT_R		/* have misc_init_r() function	*/
 
 /*-----------------------------------------------------------------------
- * burn-in test stuff
+ * burn-in test stuff.
+ *  
+ * BURN_IN_CYCLE_DELAY defines the seconds to wait between each burn-in cycle
+ * Because the burn-in test itself causes also an delay of about 4 seconds,
+ * this time must be subtracted from the desired overall burn-in cycle time.
  */
-#define BURN_IN_CYCLE_DELAY	20	/* delay in sec between burn-in test cycles */
+#define BURN_IN_CYCLE_DELAY	296	/* seconds between burn-in cycles */
 
 /*-----------------------------------------------------------------------
  * Stack sizes

include/elf.h

@@ -43,13 +43,6 @@
 #include <stdint.h>
 #endif
 
-#ifdef __CYGWIN__
-#include <sys/types.h>
-typedef unsigned long int uint32_t;
-typedef unsigned short    uint16_t;
-typedef unsigned char     uint8_t;
-#endif /* __CYGWIN__ */
-
 /*
  *  This version doesn't work for 64-bit ABIs - Erik.
  */

include/image.h

@@ -65,6 +65,7 @@
 #define IH_CPU_SPARC		10	/* Sparc	*/
 #define IH_CPU_SPARC64		11	/* Sparc 64 Bit */
 #define	IH_CPU_M68K		12	/* M68K		*/
+#define	IH_CPU_NIOS		13	/* Nios-32	*/
 
 /*
  * Image Types
@@ -112,6 +113,7 @@
 #define IH_TYPE_MULTI		4	/* Multi-File Image		*/
 #define IH_TYPE_FIRMWARE	5	/* Firmware Image		*/
 #define IH_TYPE_SCRIPT		6	/* Script file			*/
+#define IH_TYPE_FILESYSTEM	7	/* Filesystem Image (any type)	*/
 
 /*
  * Compression Types
@@ -123,11 +125,6 @@
 #define IH_MAGIC	0x27051956	/* Image Magic Number		*/
 #define IH_NMLEN		32	/* Image Name Length		*/
 
-#ifdef __CYGWIN__
-typedef unsigned long uint32_t;
-typedef unsigned char uint8_t;
-#endif /* __CYGWIN__ */
-
 /*
  * all data in network byte order (aka natural aka bigendian)
  */

include/miiphy.h

@@ -46,6 +46,9 @@ int  miiphy_info(unsigned char addr, unsigned int  *oui, unsigned char *model,
 int  miiphy_reset(unsigned char addr);
 int  miiphy_speed(unsigned char addr);
 int  miiphy_duplex(unsigned char addr);
+#ifdef CFG_FAULT_ECHO_LINK_DOWN
+int  miiphy_link(unsigned char addr);
+#endif
 
 
 /* phy seed setup */

include/nios-io.h

@@ -0,0 +1,96 @@
+/*
+ * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*************************************************************************
+ * Altera Nios Standard Peripherals
+ ************************************************************************/
+
+#ifndef __NIOSIO_H__
+#define __NIOSIO_H__
+
+/*------------------------------------------------------------------------
+ * UART
+ *----------------------------------------------------------------------*/
+typedef volatile struct nios_uart_t {
+	unsigned	rxdata;		/* Rx data reg */
+	unsigned	txdata;		/* Tx data reg */
+	unsigned	status;		/* Status reg */
+	unsigned	control;	/* Control reg */
+	unsigned	divisor;	/* Baud rate divisor reg */
+	unsigned	endofpacket;	/* End-of-packet reg */
+}nios_uart_t;
+
+/* status register */
+#define NIOS_UART_PE		(1 << 0)	/* parity error */
+#define NIOS_UART_FE		(1 << 1)	/* frame error */
+#define NIOS_UART_BRK		(1 << 2)	/* break detect */
+#define NIOS_UART_ROE		(1 << 3)	/* rx overrun */
+#define NIOS_UART_TOE		(1 << 4)	/* tx overrun */
+#define NIOS_UART_TMT		(1 << 5)	/* tx empty */
+#define NIOS_UART_TRDY		(1 << 6)	/* tx ready */
+#define NIOS_UART_RRDY		(1 << 7)	/* rx ready */
+#define NIOS_UART_E		(1 << 8)	/* exception */
+#define NIOS_UART_DCTS		(1 << 10)	/* cts change */
+#define NIOS_UART_CTS		(1 << 11)	/* cts */
+#define NIOS_UART_EOP		(1 << 12)	/* eop detected */
+
+/* control register */
+#define NIOS_UART_IPE		(1 << 0)	/* parity error int ena*/
+#define NIOS_UART_IFE		(1 << 1)	/* frame error int ena */
+#define NIOS_UART_IBRK		(1 << 2)	/* break detect int ena */
+#define NIOS_UART_IROE		(1 << 3)	/* rx overrun int ena */
+#define NIOS_UART_ITOE		(1 << 4)	/* tx overrun int ena */
+#define NIOS_UART_ITMT		(1 << 5)	/* tx empty int ena */
+#define NIOS_UART_ITRDY		(1 << 6)	/* tx ready int ena */
+#define NIOS_UART_IRRDY		(1 << 7)	/* rx ready int ena */
+#define NIOS_UART_IE		(1 << 8)	/* exception int ena */
+#define NIOS_UART_TBRK		(1 << 9)	/* transmit break */
+#define NIOS_UART_IDCTS		(1 << 10)	/* cts change int ena */
+#define NIOS_UART_RTS		(1 << 11)	/* rts */
+#define NIOS_UART_IEOP		(1 << 12)	/* eop detected int ena */
+
+
+/*------------------------------------------------------------------------
+ * TIMER
+ *----------------------------------------------------------------------*/
+typedef volatile struct nios_timer_t {
+	unsigned	status;			/* Timer status reg */
+	unsigned	control;		/* Timer control reg */
+	unsigned	periodl;		/* Timeout period low */
+	unsigned	periodh;		/* Timeout period high */
+	unsigned	snapl;			/* Snapshot low */
+	unsigned	snaph;			/* Snapshot high */
+}nios_timer_t;
+
+/* status register */
+#define NIOS_TIMER_TO		(1 << 0)	/* Timeout */
+#define NIOS_TIMER_RUN		(1 << 1)	/* Timer running */
+
+/* control register */
+#define NIOS_TIMER_ITO		(1 << 0)	/* Timeout int ena */
+#define NIOS_TIMER_CONT		(1 << 1)	/* Continuous mode */
+#define NIOS_TIMER_START	(1 << 2)	/* Start timer */
+#define NIOS_TIMER_STOP		(1 << 3)	/* Stop timer */
+
+#endif /* __NIOSIO_H__ */
+

include/nios.h

@@ -0,0 +1,77 @@
+/*
+ * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __NIOS_H__
+#define __NIOS_H__
+
+/*------------------------------------------------------------------------
+ * Control registers -- use with wrctl() & rdctl()
+ *----------------------------------------------------------------------*/
+#define CTL_STATUS	0x00		/* Processor status		*/
+#define CTL_ISTATUS	0x01		/* Saved status (exception)	*/
+#define CTL_WVALID	0x02		/* Valid window limit		*/
+#define CTL_ICACHE	0x05		/* I-cache line-invalidate	*/
+#define CTL_CPU_ID	0x06		/* CPU version id		*/
+#define CTL_DCACHE	0x07		/* D-cache line-invalidate	*/
+#define CTL_CLR_IE	0x08		/* Interrupt clear (disable)	*/
+#define CTL_SET_IE	0x09		/* Interrupt set (enable)	*/
+
+/*------------------------------------------------------------------------
+ * Access to control regs
+ *----------------------------------------------------------------------*/
+#define _str_(s)	#s
+
+#define rdctl(reg)\
+	({unsigned int val;\
+	asm volatile( "pfx " _str_(reg) "\n\t rdctl %0"\
+		: "=r" (val) ); val;})
+
+#define wrctl(reg,val)\
+	asm volatile( "pfx " _str_(reg) "\n\t wrctl %0 \n\t nop"\
+		: : "r" (val))
+
+/*------------------------------------------------------------------------
+ * Control reg bit masks
+ *----------------------------------------------------------------------*/
+#define STATUS_DC	(1<<17)		/* Data cache enable		*/
+#define STATUS_IC	(1<<16)		/* Instruction cache enable	*/
+#define STATUS_IE	(1<<15)		/* Interrupt enable		*/
+#define STATUS_IPRI	(0x3f<<9)	/* Interrupt priority		*/
+#define STATUS_CWP	(0x1f<<4)	/* Current window pointer	*/
+#define STATUS_N	(1<<3)		/* Condition code: negative	*/
+#define STATUS_V	(1<<2)		/* Condition code: overflow	*/
+#define STATUS_Z	(1<<1)		/* Condition code: zero		*/
+#define STATUS_C	(1<<0)		/* Condition code: carry/borrow */
+
+static inline unsigned ipri( unsigned prio )
+{
+	unsigned tmp;
+	unsigned status = rdctl(CTL_STATUS);
+	prio = (prio << 9) & STATUS_IPRI;
+	tmp = (status & ~STATUS_IPRI) | prio;
+	wrctl(CTL_STATUS,tmp);
+	return( (status & STATUS_IPRI) >> 9);
+}
+
+
+#endif /* __NIOS_H__ */

lib_nios/Makefile

@@ -0,0 +1,44 @@
+#
+# (C) Copyright 2000
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= lib$(ARCH).a
+
+AOBJS	=
+
+COBJS	= board.o cache.o divmod.o nios_linux.o mult.o time.o
+
+OBJS	= $(AOBJS) $(COBJS)
+
+$(LIB):	.depend $(OBJS)
+	$(AR) crv $@ $(OBJS)
+
+#########################################################################
+
+.depend:	Makefile $(AOBJS:.o=.S) $(COBJS:.o=.c)
+		$(CC) -M $(CFLAGS) $(AOBJS:.o=.S) $(COBJS:.o=.c) > $@
+
+sinclude .depend
+
+#########################################################################

lib_nios/board.c

@@ -0,0 +1,166 @@
+/*
+ * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * (C) Copyright 2000-2002
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <devices.h>
+#include <watchdog.h>
+
+
+/*
+ * All attempts to come up with a "common" initialization sequence
+ * that works for all boards and architectures failed: some of the
+ * requirements are just _too_ different. To get rid of the resulting
+ * mess of board dependend #ifdef'ed code we now make the whole
+ * initialization sequence configurable to the user.
+ *
+ * The requirements for any new initalization function is simple: it
+ * receives a pointer to the "global data" structure as it's only
+ * argument, and returns an integer return code, where 0 means
+ * "continue" and != 0 means "fatal error, hang the system".
+ */
+
+
+extern void malloc_bin_reloc (void);
+typedef int (init_fnc_t) (void);
+extern unsigned _vectors[];
+
+/*
+ * Begin and End of memory area for malloc(), and current "brk"
+ */
+static	ulong	mem_malloc_start = 0;
+static	ulong	mem_malloc_end	 = 0;
+static	ulong	mem_malloc_brk	 = 0;
+
+/*
+ * The Malloc area is immediately below the monitor copy in RAM
+ */
+static void mem_malloc_init (void)
+{
+	mem_malloc_start = CFG_MALLOC_BASE;
+	mem_malloc_end = mem_malloc_start + CFG_MALLOC_LEN;
+	mem_malloc_brk = mem_malloc_start;
+	memset ((void *) mem_malloc_start,
+		0,
+		mem_malloc_end - mem_malloc_start);
+}
+
+void *sbrk (ptrdiff_t increment)
+{
+	ulong old = mem_malloc_brk;
+	ulong new = old + increment;
+
+	if ((new < mem_malloc_start) || (new > mem_malloc_end)) {
+		return (NULL);
+	}
+	mem_malloc_brk = new;
+	return ((void *) old);
+}
+
+
+/************************************************************************
+ * Initialization sequence						*
+ ***********************************************************************/
+
+init_fnc_t *init_sequence[] = {
+
+#if defined(CONFIG_BOARD_PRE_INIT)
+	board_pre_init,		/* Call board-specific init code early.*/
+#endif
+
+	env_init,
+	serial_init,
+	console_init_f,
+	display_options,
+	checkcpu,
+	checkboard,
+	NULL,			/* Terminate this list */
+};
+
+
+/***********************************************************************/
+void board_init (void)
+{
+	DECLARE_GLOBAL_DATA_PTR;
+
+	bd_t *bd;
+	init_fnc_t **init_fnc_ptr;
+
+	/* Pointer is writable since we allocated a register for it.
+	 * Nios treats CFG_GBL_DATA_OFFSET as an address.
+	 */
+	gd = (gd_t *)CFG_GBL_DATA_OFFSET;
+	memset( gd, 0, CFG_GBL_DATA_SIZE );
+
+	/* Copy exception vectors to the correct location.
+	 */
+	memcpy( (void *)CFG_VECT_BASE, _vectors, 256 );
+
+	gd->bd = (bd_t *)(gd+1);	/* At end of global data */
+	gd->baudrate = CONFIG_BAUDRATE;
+	gd->cpu_clk = CONFIG_SYS_CLK_FREQ;
+
+	bd = gd->bd;
+	bd->bi_memstart	= CFG_SDRAM_BASE;
+	bd->bi_memsize = CFG_SDRAM_SIZE;
+	bd->bi_flashstart = CFG_FLASH_BASE;
+	bd->bi_sramstart= CFG_SRAM_BASE;
+	bd->bi_sramsize	= CFG_SRAM_SIZE;
+	bd->bi_baudrate	= CONFIG_BAUDRATE;
+
+	for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) {
+		if ((*init_fnc_ptr) () != 0) {
+			hang ();
+		}
+	}
+
+	bd->bi_flashsize = flash_init();
+
+	mem_malloc_init();
+	malloc_bin_reloc();
+	env_relocate();
+
+	devices_init();
+	jumptable_init();
+	console_init_r();
+	/*
+	 */
+
+	interrupt_init ();
+	/* main_loop */
+	for (;;) {
+		WATCHDOG_RESET ();
+		main_loop ();
+	}
+}
+
+
+/***********************************************************************/
+
+void hang (void)
+{
+	puts("### ERROR ### Please reset board ###\n");
+	for (;;);
+}

lib_nios/cache.c

@@ -0,0 +1,32 @@
+/*
+ * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+
+void flush_cache (ulong addr, ulong size)
+{
+	/* Nios cache is write-thru -- nothing to do here.
+	 */
+	return;
+}

lib_nios/divmod.c

@@ -0,0 +1,101 @@
+/*
+ * This file is part of GNU CC.
+ *
+ * GNU CC is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published
+ * by the Free Software Foundation; either version 2, or (at your
+ * option) any later version.
+ *
+ * GNU CC is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public
+ * License along with GNU CC; see the file COPYING.  If not, write
+ * to the Free Software Foundation, 59 Temple Place - Suite 330,
+ * Boston, MA 02111-1307, USA.
+ */
+
+
+#include "math.h"
+
+USItype udivmodsi4 (USItype num, USItype den, word_type modwanted)
+{
+	USItype bit = 1;
+	USItype res = 0;
+
+	while (den < num && bit && !(den & (1L << 31))) {
+		den <<= 1;
+		bit <<= 1;
+	}
+	while (bit) {
+		if (num >= den) {
+			num -= den;
+			res |= bit;
+		}
+		bit >>= 1;
+		den >>= 1;
+	}
+	if (modwanted)
+		return num;
+	return res;
+}
+
+
+SItype __divsi3 (SItype a, SItype b)
+{
+	word_type neg = 0;
+	SItype res;
+
+	if (a < 0) {
+		a = -a;
+		neg = !neg;
+	}
+
+	if (b < 0) {
+		b = -b;
+		neg = !neg;
+	}
+
+	res = udivmodsi4 (a, b, 0);
+
+	if (neg)
+		res = -res;
+
+	return res;
+}
+
+
+SItype __modsi3 (SItype a, SItype b)
+{
+	word_type neg = 0;
+	SItype res;
+
+	if (a < 0) {
+		a = -a;
+		neg = 1;
+	}
+
+	if (b < 0)
+		b = -b;
+
+	res = udivmodsi4 (a, b, 1);
+
+	if (neg)
+		res = -res;
+
+	return res;
+}
+
+
+SItype __udivsi3 (SItype a, SItype b)
+{
+	return udivmodsi4 (a, b, 0);
+}
+
+
+SItype __umodsi3 (SItype a, SItype b)
+{
+	return udivmodsi4 (a, b, 1);
+}

lib_nios/math.h

@@ -0,0 +1,16 @@
+#define BITS_PER_UNIT	8
+
+typedef 	 int HItype		__attribute__ ((mode (HI)));
+typedef unsigned int UHItype		__attribute__ ((mode (HI)));
+
+typedef		 int SItype		__attribute__ ((mode (SI)));
+typedef unsigned int USItype		__attribute__ ((mode (SI)));
+
+typedef int word_type			__attribute__ ((mode (__word__)));
+
+struct SIstruct {HItype low, high;};
+
+typedef union {
+	struct SIstruct s;
+	SItype ll;
+} SIunion;

lib_nios/mult.c

@@ -0,0 +1,56 @@
+/*
+ * This file is part of GNU CC.
+ *
+ * GNU CC is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published
+ * by the Free Software Foundation; either version 2, or (at your
+ * option) any later version.
+ *
+ * GNU CC is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public
+ * License along with GNU CC; see the file COPYING.  If not, write
+ * to the Free Software Foundation, 59 Temple Place - Suite 330,
+ * Boston, MA 02111-1307, USA.
+ */
+
+
+#include <common.h>
+
+#if !defined(CFG_NIOS_MULT_HW) && !defined(CFG_NIOS_MULT_MSTEP)
+
+#include "math.h"
+
+USItype __mulsi3 (USItype a, USItype b)
+{
+	USItype c = 0;
+
+	while (a != 0) {
+		if (a & 1)
+			c += b;
+		a >>= 1;
+		b <<= 1;
+	}
+
+	return c;
+}
+
+
+UHItype __mulhi3 (UHItype a, UHItype b)
+{
+	UHItype c = 0;
+
+	while (a != 0) {
+		if (a & 1)
+			c += b;
+		a >>= 1;
+		b <<= 1;
+	}
+
+	return c;
+}
+
+#endif /*!defined(CFG_NIOS_MULT_HW) && !defined(CFG_NIOS_MULT_MSTEP) */

lib_nios/nios_linux.c

@@ -0,0 +1,34 @@
+/*
+ * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <command.h>
+
+/* FIXME: Once we find a stable version of uC-linux for nios
+ * we can get this working. ;-)
+ *
+ */
+void do_bootm_linux(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[],
+		ulong addr, ulong *len_ptr, int   verify)
+{
+}

lib_nios/time.c

@@ -0,0 +1,37 @@
+/*
+ * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+
+extern void dly_clks( unsigned long ticks );
+
+void udelay(unsigned long usec)
+{
+	/* The Nios core doesn't have a timebase, so we do our
+	 * best for now and call a low-level loop that counts
+	 * cpu clocks.
+	 */
+	unsigned long cnt = (CONFIG_SYS_CLK_FREQ/1000000) * usec;
+	dly_clks (cnt);
+}

net/net.c

@@ -65,6 +65,10 @@
 #include "bootp.h"
 #include "tftp.h"
 #include "rarp.h"
+#ifdef CONFIG_STATUS_LED
+#include <status_led.h>
+#include <miiphy.h>
+#endif
 
 #if (CONFIG_COMMANDS & CFG_CMD_NET)
 
@@ -361,6 +365,18 @@ restart:
 		break;
 	}
 
+#if defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII)
+#if defined(CFG_FAULT_ECHO_LINK_DOWN) && defined(CONFIG_STATUS_LED) && defined(STATUS_LED_RED)
+	/*
+	 * Echo the inverted link state to the fault LED. 
+	 */
+	if(miiphy_link(CFG_FAULT_MII_ADDR)) {
+		status_led_set (STATUS_LED_RED, STATUS_LED_OFF);
+	} else {
+		status_led_set (STATUS_LED_RED, STATUS_LED_ON);
+	}
+#endif /* CFG_FAULT_ECHO_LINK_DOWN, ... */
+#endif /* CONFIG_MII, ... */
 
 	/*
 	 *	Main packet reception loop.  Loop receiving packets until
@@ -398,6 +414,18 @@ restart:
 		if (timeHandler && ((get_timer(0) - timeStart) > timeDelta)) {
 			thand_f *x;
 
+#if defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII)
+#if defined(CFG_FAULT_ECHO_LINK_DOWN) && defined(CONFIG_STATUS_LED) && defined(STATUS_LED_RED)
+			/*
+			 * Echo the inverted link state to the fault LED. 
+			 */
+			if(miiphy_link(CFG_FAULT_MII_ADDR)) {
+				status_led_set (STATUS_LED_RED, STATUS_LED_OFF);
+			} else {
+				status_led_set (STATUS_LED_RED, STATUS_LED_ON);
+			}
+#endif /* CFG_FAULT_ECHO_LINK_DOWN, ... */
+#endif /* CONFIG_MII, ... */
 			x = timeHandler;
 			timeHandler = (thand_f *)0;
 			(*x)();

net/tftp.c

@@ -15,7 +15,7 @@
 #if (CONFIG_COMMANDS & CFG_CMD_NET)
 
 #define WELL_KNOWN_PORT	69		/* Well known TFTP port #		*/
-#define TIMEOUT		2		/* Seconds to timeout for a lost pkt	*/
+#define TIMEOUT		5		/* Seconds to timeout for a lost pkt	*/
 #ifndef	CONFIG_NET_RETRY_COUNT
 # define TIMEOUT_COUNT	10		/* # of timeouts before giving up  */
 #else
@@ -32,6 +32,7 @@
 #define TFTP_DATA	3
 #define TFTP_ACK	4
 #define TFTP_ERROR	5
+#define TFTP_OACK	6
 
 
 static int	TftpServerPort;		/* The UDP port at their end		*/
@@ -44,6 +45,7 @@ static int	TftpState;
 #define STATE_DATA	2
 #define STATE_TOO_LARGE	3
 #define STATE_BAD_MAGIC	4
+#define STATE_OACK	5
 
 #define DEFAULT_NAME_LEN	(8 + 4 + 1)
 static char default_filename[DEFAULT_NAME_LEN];
@@ -113,10 +115,18 @@ TftpSend (void)
 		pkt += strlen(tftp_filename) + 1;
 		strcpy ((char *)pkt, "octet");
 		pkt += 5 /*strlen("octet")*/ + 1;
+		strcpy ((char *)pkt, "timeout");
+		pkt += 7 /*strlen("timeout")*/ + 1;
+		sprintf((char *)pkt, "%d", TIMEOUT);
+#ifdef ET_DEBUG
+		printf("send option \"timeout %s\"\n", (char *)pkt);
+#endif
+		pkt += strlen((char *)pkt) + 1;
 		len = pkt - xp;
 		break;
 
 	case STATE_DATA:
+	case STATE_OACK:
 		xp = pkt;
 		*((ushort *)pkt)++ = htons(TFTP_ACK);
 		*((ushort *)pkt)++ = htons(TftpBlock);
@@ -173,6 +183,14 @@ TftpHandler (uchar * pkt, unsigned dest, unsigned src, unsigned len)
 	default:
 		break;
 
+	case TFTP_OACK:
+#ifdef ET_DEBUG
+		printf("Got OACK: %s %s\n", pkt, pkt+strlen(pkt)+1);
+#endif
+		TftpState = STATE_OACK;
+		TftpServerPort = src;
+		TftpSend (); /* Send ACK */
+		break;
 	case TFTP_DATA:
 		if (len < 2)
 			return;
@@ -184,7 +202,13 @@ TftpHandler (uchar * pkt, unsigned dest, unsigned src, unsigned len)
 			puts ("\n\t ");
 		}
 
+#ifdef ET_DEBUG
 		if (TftpState == STATE_RRQ) {
+			printf("Server did not acknowledge timeout option!\n");
+		}
+#endif
+
+		if (TftpState == STATE_RRQ || TftpState == STATE_OACK) {
 			TftpState = STATE_DATA;
 			TftpServerPort = src;
 			TftpLastBlock = 0;
@@ -305,6 +329,7 @@ TftpStart (void)
 	TftpTimeoutCount = 0;
 	TftpState = STATE_RRQ;
 	TftpOurPort = 1024 + (get_timer(0) % 3072);
+	TftpBlock = 0;
 
 	/* zero out server ether in case the server ip has changed */
 	memset(NetServerEther, 0, 6);

nios_config.mk

@@ -0,0 +1,25 @@
+#
+# (C) Copyright 2003
+# Psyent Corporation <www.psyent.com>
+# Scott McNutt <smcnutt@psyent.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+PLATFORM_CPPFLAGS += -m32 -DCONFIG_NIOS -ffixed-g7

tools/Makefile

@@ -30,6 +30,12 @@ BINS   += inca-swap-bytes$(SFX)
 OBJS   += inca-swap-bytes.o
 endif
 
+# Don't build by default
+#ifeq ($(ARCH),ppc)
+#BINS   += mpc86x_clk$(SFX)
+#OBJS   += mpc86x_clk.o
+#endif
+
 LOGO_H	= $(TOPDIR)/include/bmp_logo.h
 
 ifeq ($(LOGO_BMP),)
@@ -136,6 +142,10 @@ inca-swap-bytes$(SFX):	inca-swap-bytes.o
 		$(CC) $(CFLAGS) $(HOST_LDFLAGS) -o $@ $^
 		$(STRIP) $@
 
+mpc86x_clk$(SFX):	mpc86x_clk.o
+		$(CC) $(CFLAGS) $(HOST_LDFLAGS) -o $@ $^
+		$(STRIP) $@
+
 envcrc.o:	envcrc.c
 		$(CC) -g $(CFLAGS) -c $<
 
@@ -151,6 +161,9 @@ gen_eth_addr.o:	gen_eth_addr.c
 inca-swap-bytes.o:	inca-swap-bytes.c
 		$(CC) -g $(CFLAGS) -c $<
 
+mpc86x_clk.o:	mpc86x_clk.c
+		$(CC) -g $(CFLAGS) -c $<
+
 subdirs:
 ifeq ($(TOOLSUBDIRS),)
 		@:

tools/mkimage.c

@@ -110,6 +110,7 @@ table_entry_t type_name[] = {
     {	IH_TYPE_MULTI,	    "multi",	  "Multi-File Image",	},
     {	IH_TYPE_FIRMWARE,   "firmware",	  "Firmware",		},
     {	IH_TYPE_SCRIPT,     "script",	  "Script",		},
+    {	IH_TYPE_FILESYSTEM, "filesystem", "Filesystem Image",	},
     {	-1,		    "",		  "",			},
 };
 
@@ -267,7 +268,7 @@ NXTARG:		;
 	imagefile = *argv;
 
 	if (lflag) {
-		ifd = open(imagefile, O_RDONLY);
+		ifd = open(imagefile, O_RDONLY|O_BINARY);
 	} else {
 		ifd = open(imagefile, O_RDWR|O_CREAT|O_TRUNC|O_BINARY, 0666);
 	}
@@ -421,7 +422,7 @@ NXTARG:		;
 	}
 
 	/* We're a bit of paranoid */
-#if defined(_POSIX_SYNCHRONIZED_IO) && !defined(__sun__)
+#if defined(_POSIX_SYNCHRONIZED_IO) && !defined(__sun__) && !defined(__FreeBSD__)
 	(void) fdatasync (ifd);
 #else
 	(void) fsync (ifd);
@@ -471,7 +472,7 @@ NXTARG:		;
 	(void) munmap((void *)ptr, sbuf.st_size);
 
 	/* We're a bit of paranoid */
-#if defined(_POSIX_SYNCHRONIZED_IO) && !defined(__sun__)
+#if defined(_POSIX_SYNCHRONIZED_IO) && !defined(__sun__) && !defined(__FreeBSD__)
 	(void) fdatasync (ifd);
 #else
 	(void) fsync (ifd);
@@ -501,7 +502,7 @@ copy_file (int ifd, const char *datafile, int pad)
 		fprintf (stderr, "Adding Image %s\n", datafile);
 	}
 
-	if ((dfd = open(datafile, O_RDONLY)) < 0) {
+	if ((dfd = open(datafile, O_RDONLY|O_BINARY)) < 0) {
 		fprintf (stderr, "%s: Can't open %s: %s\n",
 			cmdname, datafile, strerror(errno));
 		exit (EXIT_FAILURE);

tools/mpc86x_clk.c

@@ -0,0 +1,218 @@
+/*
+ * (C) Copyright 2003 Intracom S.A.
+ * Pantelis Antoniou <panto@intracom.gr>
+ *
+ * This little program makes an exhaustive search for the
+ * correct terms of pdf, mfi, mfn, mfd, s, dbrmo, in PLPRCR.
+ * The goal is to produce a gclk2 from a xin input, while respecting
+ * all the restrictions on their combination.
+ *
+ * Generaly you select the first row of the produced table.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+
+#include <stdio.h>
+#include <stdlib.h>
+
+#define DPREF_MIN	 10000000
+#define DPREF_MAX	 32000000
+
+#define DPGDCK_MAX	320000000
+#define DPGDCK_MIN	160000000
+
+#define S_MIN		0
+#define S_MAX		2
+
+#define MFI_MIN		5
+#define MFI_MAX		15
+
+#define MFN_MIN		0
+#define MFN_MAX		15
+
+#define MFD_MIN		0
+#define MFD_MAX		31
+
+#define MF_MIN		5
+#define MF_MAX		15
+
+#define PDF_MIN		0
+#define PDF_MAX		15
+
+#define GCLK2_MAX	150000000
+
+static int calculate (int xin, int target_clock,
+		      int ppm, int pdf, int mfi, int mfn, int mfd, int s,
+		      int *dprefp, int *dpgdckp, int *jdbckp,
+		      int *gclk2p, int *dbrmop)
+{
+	unsigned int dpref, dpgdck, jdbck, gclk2, t1, t2, dbrmo;
+
+	/* valid MFI? */
+	if (mfi < MFI_MIN)
+		return -1;
+
+	/* valid num, denum? */
+	if (mfn > 0 && mfn >= mfd)
+		return -1;
+
+	dpref = xin / (pdf + 1);
+
+	/* valid dpef? */
+	if (dpref < DPREF_MIN || dpref > DPREF_MAX)
+		return -1;
+
+	if (mfn == 0) {
+		dpgdck  = (2 * mfi * xin) / (pdf + 1) ;
+		dbrmo = 0;
+	} else {
+		/* 5 <= mfi + (mfn / mfd + 1) <= 15 */
+		t1 = mfd + 1;
+		t2 = mfi * t1 + mfn;
+		if ( MF_MIN * t1 > t2 || MF_MAX * t1 < t2)
+			return -1;
+
+		dpgdck  = (unsigned int)(2 * (mfi * mfd + mfi + mfn) *
+				(unsigned int)xin) /
+				((mfd + 1) * (pdf + 1));
+
+		dbrmo = 10 * mfn < (mfd + 1);
+	}
+
+	/* valid dpgclk? */
+	if (dpgdck < DPGDCK_MIN || dpgdck > DPGDCK_MAX)
+		return -1;
+
+	jdbck = dpgdck >> s;
+	gclk2 = jdbck / 2;
+
+	/* valid gclk2 */
+	if (gclk2 > GCLK2_MAX)
+		return -1;
+
+	t1 = abs(gclk2 - target_clock);
+
+	/* XXX max 1MHz dev. in clock */
+	if (t1 > 1000000)
+		return -1;
+
+	/* dev within range (XXX gclk2 scaled to avoid overflow) */
+	if (t1 * 1000 > (unsigned int)ppm * (gclk2 / 1000))
+		return -1;
+
+	*dprefp = dpref;
+	*dpgdckp = dpgdck;
+	*jdbckp = jdbck;
+	*gclk2p = gclk2;
+	*dbrmop = dbrmo;
+
+	return gclk2;
+}
+
+int conf_clock(int xin, int target_clock, int ppm)
+{
+	int pdf, s, mfn, mfd, mfi;
+	int dpref, dpgdck, jdbck, gclk2, xout, dbrmo;
+	int found = 0;
+
+	/* integer multipliers */
+	for (pdf = PDF_MIN; pdf <= PDF_MAX; pdf++) {
+		for (mfi = MFI_MIN; mfi <= MFI_MAX; mfi++) {
+			for (s = 0; s <= S_MAX; s++) {
+				xout = calculate(xin, target_clock,
+						 ppm, pdf, mfi, 0, 0, s,
+						 &dpref, &dpgdck, &jdbck,
+						 &gclk2, &dbrmo);
+				if (xout < 0)
+					continue;
+
+				if (found == 0) {
+					printf("pdf mfi mfn mfd s dbrmo     dpref    dpgdck     jdbck     gclk2 exact?\n");
+					printf("--- --- --- --- - -----     -----    ------     -----     ----- ------\n");
+				}
+
+				printf("%3d %3d --- --- %1d %5d %9d %9d %9d %9d%s\n",
+					pdf, mfi, s, dbrmo,
+					dpref, dpgdck, jdbck, gclk2,
+					gclk2 == target_clock ? "    YES" : "");
+
+				found++;
+			}
+		}
+	}
+
+	/* fractional multipliers */
+	for (pdf = PDF_MIN; pdf <= PDF_MAX; pdf++) {
+		for (mfi = MFI_MIN; mfi <= MFI_MAX; mfi++) {
+			for (mfn = 1; mfn <= MFN_MAX; mfn++) {
+				for (mfd = 1; mfd <= MFD_MAX; mfd++) {
+					for (s = 0; s <= S_MAX; s++) {
+						xout = calculate(xin, target_clock,
+							    ppm, pdf, mfi, mfn, mfd, s,
+							    &dpref, &dpgdck, &jdbck,
+							    &gclk2, &dbrmo);
+						if (xout < 0)
+							continue;
+
+						if (found == 0) {
+							printf("pdf mfi mfn mfd s dbrmo     dpref    dpgdck     jdbck     gclk2 exact?\n");
+							printf("--- --- --- --- - -----     -----    ------     -----     ----- ------\n");
+						}
+
+						printf("%3d %3d %3d %3d %1d %5d %9d %9d %9d %9d%s\n",
+							pdf, mfi, mfn, mfd, s,
+							dbrmo, dpref, dpgdck, jdbck, gclk2,
+							gclk2 == target_clock ? "    YES" : "");
+
+						found++;
+					}
+				}
+			}
+
+		}
+	}
+
+	return found;
+}
+
+int main(int argc, char *argv[])
+{
+	int xin, want_gclk2, found, ppm = 100;
+
+	if (argc < 3) {
+		fprintf(stderr, "usage: mpc86x_clk <xin> <want_gclk2> [ppm]\n");
+		fprintf(stderr, "       default ppm is 100\n");
+		return 10;
+	}
+
+	xin  = atoi(argv[1]);
+	want_gclk2 = atoi(argv[2]);
+	if (argc >= 4)
+		ppm = atoi(argv[3]);
+
+	found = conf_clock(xin, want_gclk2, ppm);
+	if (found <= 0) {
+		fprintf(stderr, "cannot produce gclk2 %d from xin %d\n",
+			want_gclk2, xin);
+		return EXIT_FAILURE;
+	}
+
+	return EXIT_SUCCESS;
+}