Commit Graph

15001 Commits

Author SHA1 Message Date
Siva Durga Prasad Paladugu
686a2791b6 clk: versal: Add clock driver support
This patch adds clock driver support for Versal
platform. The clock driver queries and performs
clock operations using PLM firmware by communicating
with it using SMC calls.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-28 11:25:30 +02:00
Harini Katakam
e33bed4aac net: phy: ti: Use auto MDI crossover for SGMII
Use auto MDI crossover for SGMII to support all cable setups.
Also correct MDIX mask bit.

Signed-off-by: Harini Katakam <harini.katakam@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-28 11:25:30 +02:00
T Karthik Reddy
5deb244953 mmc: zynq_sdhci: Move UHS mode macros
This patch moves UHS mode macros from mmc.h to zynq_sdhci.c.
Moving UHS mode macros in mmc.h avoids redefinition of macros when
xenon_sdhci.c is compiled.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-28 11:25:30 +02:00
T Karthik Reddy
2f9a216c72 mmc: sdhci: Read sdhci card detect properties from DT
This patch reads card detect properties from device tree.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-28 11:25:30 +02:00
T Karthik Reddy
4d41f637b4 mmc: sdhci: Implement SDHCI card detect
Card detect function implemented for SDHCI framework.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-28 11:25:30 +02:00
Siva Durga Prasad Paladugu
c744e9e6f6 mtd: spi: Split read transactions per bank
The patch splits the read transaction into multiple
read transactions which means incase of read requested
across multiple banks, it splits and sends one read per
bank. This can be enabled using new config option
CONFIG_SPI_FLASH_SPLIT_READ.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-04 12:48:10 +02:00
Siva Durga Prasad Paladugu
b3e44ab427 mmc: sdhci: Move ZYNQ_HISPD_BROKEN to Kconfig
This patch moves CONFIG_ZYNQ_HISPD_BROKEN to Kconfig

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-04 12:47:15 +02:00
Wojciech Tatarski
c379a08eb5 spi: zynqmp_gqspi: do not round immediate_data field
Immediate_data is 8 bit value in generic FIFO command. When fields
data_xfer=1 and exponent=0 this field specifies the absolute number of data
bytes to read into the RXFIFO. Values from range 0xfd to 0xff are rounded
up to 0x100. It causes overwriting the next bit field which is data_xfer.
According to Zynq US+ TRM only DMA transfers should be word aligned. So
there is no reason to round up the immediate_data field.

Signed-off-by: Wojciech Tatarski <wtatarski@antmicro.com>
Signed-off-by: Tomasz Gorochowik <tgorochowik@antmicro.com>
Tested-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-04 12:47:15 +02:00
Wojciech Tatarski
d7432d93b4 spi: zynqmp_gqspi: DMA transfers should be world aligned
According to Zynq US+ TRM all the data transfers are word aligned. So
there is no reason to round up size of DMA transfer to ARCH_DMA_MINALIGN
(0x40)

Signed-off-by: Wojciech Tatarski <wtatarski@antmicro.com>
Signed-off-by: Tomasz Gorochowik <tgorochowik@antmicro.com>
Tested-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-04 12:47:15 +02:00
T Karthik Reddy
08d9db9b5c drivers: usb: dwc3: setup phy before dwc3 core soft reset
Phy setup should be done before dwc3 soft core reset as it is done
in linux & this fixes unreliable detection of usb cable on host side.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-04 12:47:15 +02:00
T Karthik Reddy
67f7f4461a usb: composite: add BOS descriptor support to composite framework
To add usb-3.0 support to peripheral device add BOS & SS capability
descriptors to gadget composite framework.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-04 12:47:15 +02:00
Siva Durga Prasad Paladugu
9bafead6b7 mtd: spi_flash: Add device mt35ux02g to spi flash ids list
This patch adds new spi flash device mt35ux02g to spi
flash ids table.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-04 12:47:15 +02:00
Siva Durga Prasad Paladugu
9ba61fc244 spi: Add support for 4Byte addressing commands
Thsi patch adds support for 4-byte addressing Read, write
and erase commands.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
2019-06-04 12:47:15 +02:00
Siva Durga Prasad Paladugu
c879ab6c71 spi: cadence_qspi: Fix stig write issue
This patch fixes the stig programming issue by checking
the status and flag status register register for every
write.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
2019-06-04 12:47:15 +02:00
Siva Durga Prasad Paladugu
2eed60a06a usb: dwc3: Add versal compatibility string to dwc3 glue ids
Xilinx Versal platform uses dwc3 and hence its compatible string
needs to be added to dwc3 glue ids.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-04 12:44:49 +02:00
Siva Durga Prasad Paladugu
0b5d399336 usb: dwc3: Read phy suspend quirk from DT
This patch reads the suspend phy quirk from DT property
"snps,dis_u2_susphy_quirk" and update in dwc3 structure.
This suspend phy quirk will disable suspend functionality
of phy.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-04 12:44:49 +02:00
Michal Simek
b187660f2e net: gem: Remove DECLARE_GLOBAL_DATA_PTR from gem driver
GD is not used anywhere that's why there is no reason to have this macro
in the driver.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-04 12:44:49 +02:00
Siva Durga Prasad Paladugu
ae80b8ce89 mtd: spi: Add octal read flag for part mt35xu512g
This patch adds octal read support for flash
mt35xu512g.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-04 12:44:49 +02:00
Michal Simek
1e436da456 net: gem: Remove phy autodetection code
There is no reason to detect phy when core is doing it for us.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Series-to: uboot
---
Based on https://lists.denx.de/pipermail/u-boot/2019-March/363225.html
2019-06-04 12:44:49 +02:00
Hannes Schmelzer
f89b5cc3ef net: phy: implement fallback mechanism for negative phy adresses
Negative phy-addresses can occour if the caller function was not able to
determine a valid phy address (from device-tree for example). In this
case we catch this here and search for ANY phy device on the given mdio-
bus.

Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-04 12:44:49 +02:00
Vikhyat Goyal
7b3b24ddbe mtd: spi: Add support for Macronix flash parts
Adds support for mx25u51245f,mx66u2g45g and mx66l2g45g flash parts.

Signed-off-by: Vikhyat Goyal <vikhyat.goyal@xilinx.com>
Acked-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-04-16 10:42:25 +02:00
Siva Durga Prasad Paladugu
6cb094f4bd usb: dwc3: Handle case where setup_phy is not needed
If CONFIG_PHY is not enabled then the dwc3_setup_phy()
returns ENOTSUPP which can be still valid and intentional
so modify error check to handle this -ENOTSUPP.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-04-01 10:51:55 +02:00
Jean-Jacques Hiblot
b43da3d470 usb: udc-uclass: Fixed problem when no alias is defined in DT
commit 801f1fa442 "dm: usb: udc: Use SEQ_ALIAS to index the USB gadget
ports" changed the way the udevice if found. It uses the alias to find
a udevice for a given USB port number. In the commit log it was stated
that if no alias is provided, the bind order will be used instead. However
it doesn't work. Fixing this by adding a call to uclass_get_device() if
uclass_get_device_by_seq() fails.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Tested-by: Vignesh R <vigneshr@ti.com>
2019-04-01 10:51:55 +02:00
Siva Durga Prasad Paladugu
fea5b86e04 net: zynq_gem: Modify phy supported features after max-speed was set
The phydev supported features were reset in phy_set_supported() so,
move the setting of driver supported features after this so that it
wont lost in phy_set_supported().

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-27 15:49:19 +01:00
T Karthik Reddy
dd625be2e7 drivers: mtd: spi: Check SPI_TX_QUAD mode if RD_QUADIO flag is set
This patch checks for SPI_TX_QUAD mode if RD_QUADIO flag is set, as
RD_QUADIO uses 4 lines for TX. If SPI_TX_QUAD mode is not set then
CMD_READ_QUAD_IO_FAST should not be used.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-27 15:49:19 +01:00
Siva Durga Prasad Paladugu
13eb663508 arm: zynq: Add an info message about post config
Post configuration cant be run at u-boot as u-boot
didn't has any info about the design.So,this patch
adds an info message that post config was not run
and needs to be run manually if needed.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-25 15:39:06 +01:00
Siva Durga Prasad Paladugu
cebc700b71 spi: zynqmp_gqspi: Fix tap delay values
There is no need of read modify write for tapdelay settings
ans hence remove the read operations while setting tapdelays.
Also, correct tapdelay value settings at 40MHZ by modifying
the if check to <= instead of <.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-22 11:24:27 +01:00
Siva Durga Prasad Paladugu
3aa57bd9e2 net: phy: ti: Use ofnode api to read phy property
Fix incorrect read of phy property "ti,6-wire-mode"
by using ofnode api instead of dev read.
All other phy properties in of_init() routine were
also read using ofnode APIs.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-22 11:24:07 +01:00
Siva Durga Prasad Paladugu
8563ced8a0 net: phy: xilinx_gmii2rgmii: Fill node pointer for external phy
This patch fills external phy node pointer so that it will
be used in its driver to read its phy properties from DT.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-16 14:02:37 +01:00
Siva Durga Prasad Paladugu
bf09e558d1 net: phy: xilinx_gmii2rgmii: Define readext and writeext routines
This patch defines writeext and readext routines and hooks
them for xilinx gmii2rgmii phy driver. These routines will
invokes corresponding external phy routines if defined.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-16 14:02:37 +01:00
Siva Durga Prasad Paladugu
b351de58a9 net: phy: micrel_ksz90x1: switch to use ofnode apis
phydev->node is phy node, phydev->dev->node is controller
and that current code is likely reading the properties from
controller node and not from phy. So, Use PHY API phy_get_ofnode()
helper to get PHY DT node and use ofnode_read_u32_default() to
read properties in phy node.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Changes for v2:
- Updated description
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-16 14:02:37 +01:00
Michal Simek
602f217c49 phy: ti: Init node before reading
There is a need to fill node before clk_output_sel is setup.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
2019-03-16 13:42:50 +01:00
T Karthik Reddy
bd7859cacf drivers: crypto: rsa_mod_exp: Add manual relocation for ops->mod_exp()
This patch adds manual relocation for Modular Exponentiation if
CONFIG_NEEDS_MANUAL_RELOC is enabled.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-16 11:09:53 +01:00
Siva Durga Prasad Paladugu
4b04f47297 net: phy: Define init routine and register generic phy driver
This patch define init routine for generic phy driver and registers it
using phy_register as this generic phy driver also needs to be relocated
incase of manual reloc.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-15 17:43:22 +01:00
Siva Durga Prasad Paladugu
6bc04dc1d6 net: phy: ti: Add support for 6-wire mode in SGMII configuration
This patch adds 6 wire mode supports which enables SGMII clock
to MAC from phy. The drivers gets this 6 wire mode info by reading
the property "ti,6-wire-mode" from DT.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-15 14:53:20 +01:00
Siva Durga Prasad Paladugu
1d44a0b44b net: xilinx_axiemac: Fill the phy node pointer in phydev
This patch assings the phynode pointer to the phydev node
as it is needed later in the corresponding phy driver to read
phy properties from DT.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-15 14:53:20 +01:00
T Karthik Reddy
ebf24fb076 fpga: zynqpl: Flush dcache only for non-bitstream data
In case of aes decryption destination address range must be flushed
before transferring decrypted data to destination.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-13 15:19:21 +01:00
T Karthik Reddy
a3d1bdb137 fpga: zynqpl: Check fpga config completion
This patch checks fpga config completion when a bitstream is loaded
into PL.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-13 15:19:21 +01:00
T Karthik Reddy
8658eadb39 fpga: zynqpl: Add bstype argument to zynq_decrypt_load()
This patch adds 'bstype' argument to zynq_decrypt_load() to specify whether
the input source is a bitstream/non-bitstream/partial bitstream image.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-13 15:19:21 +01:00
Siva Durga Prasad Paladugu
b266b3847f i2c: i2c_cdns: Fix below warnings with checker tool
This patch fixes below warnings found with checker tool.
The variable len in i2c_msg struct is of unsigned type
and it is received as recv_count which is unsigned type
but it is checked with < 0 which is always false, hence
removed it.
The local variable curr_recv_count is declared as signed
type and compared aginst unsigned recv_count which is
incorrect. This is fixed by declaring it as unsigned type.

drivers/i2c/i2c-cdns.c: In function ‘cdns_i2c_read_data’:
drivers/i2c/i2c-cdns.c:317:18: warning: comparison of
unsigned expression < 0 is always false [-Wtype-limits]
  if ((recv_count < 0))
                  ^
drivers/i2c/i2c-cdns.c:340:24: warning: comparison of
integer expressions of different signedness:
‘u32’ {aka ‘unsigned int’} and ‘int’ [-Wsign-compare]
  updatetx = recv_count > curr_recv_count;
                        ^
drivers/i2c/i2c-cdns.c:361:39: warning: comparison of
integer expressions of different signedness:
‘u32’ {aka ‘unsigned int’} and ‘int’ [-Wsign-compare]
    while (readl(&regs->transfer_size) !=

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-13 15:19:21 +01:00
Siva Durga Prasad Paladugu
01ab10f790 i2c: i2c_cdns: Add support for handling arbitration lost
This patch adds support for handling arbitration lost
in case of multi master mode. When an arbitration lost
is detected, it retries for 10 times before failing.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-12 12:53:01 +01:00
Siva Durga Prasad Paladugu
505b978dab i2c: i2c_cdns: Fix clearing of all interrupts
The arbitration lost interrupt was not getting cleared
while clearing interrupts. This patch fixes this by adding
arbitration lost interrupt as well during clear. This patch
also removes hardcoded value and defined a macro for it.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-12 12:53:01 +01:00
Siva Durga Prasad Paladugu
225e20a440 spi: zynqmp_gqspi: Fix tap delay values at 100MHz and 150MHz
This patch fixes the tap delay values to be set at 100MHz and 150MHz
as per TRM by fixing the if condition to use <= instead of <.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-12 12:53:01 +01:00
Siva Durga Prasad Paladugu
195c620e34 net: phy: xilinx_gmii2rgmii: Add check for external phy detection
Add check if an external phy is detected or not before proceeding
further to config the external phy. This patch fixes the issue of
u-boot hang or reset, if u-boot is not able to communicate with
external connected over gmiitorgmii bridge.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-02-27 08:53:11 +01:00
Siva Durga Prasad Paladugu
e118badbd6 net: phy: Fix return value check phy_probe
Don't ignore return value of phy_probe() call as
the probe may fail and it needs to be reported.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-02-27 08:53:11 +01:00
Siva Durga Prasad Paladugu
260ac1c66d net: phy: Reloc next and prev pointers inside phy_drivers
This patch relocates the pointers inside phy_drivers incase
of manual reloc. Without this reloc, these points to invalid
pre relocation address and hence causes exception or hang.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-02-27 08:53:11 +01:00
T Karthik Reddy
5f40810b66 drivers: mtd: spi: Add support for ISSI flash parts
This patch adds support for IS25LP512M, IS25WP512M flash parts.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-02-27 08:53:10 +01:00
Rajan Vaja
69a41b3e90 firmware: Add Xilinx ZynqMP firmware driver
Add simple ZynqMP firmware drive to populate
child nodes under zynqmp_firmware DT node.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-02-27 08:53:09 +01:00
Michal Simek
e3a6f1b5f3 phy: net: Check that input interface type is gmii
There can't be any other interface as input. Only gmii is allowed.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-02-27 08:53:09 +01:00
Michal Simek
25815c99c0 phy: gmii2rgmii: Hardcode rgmii interface type
gmii can't be passed to phy driver because from bridge should come up
rgmii.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-02-27 08:53:09 +01:00