Commit Graph

57230 Commits

Author SHA1 Message Date
Sai Krishna Potthuri
7d02f7d087 dts: versal: Updated OSPI node properties
This patch updates the following properties in ospi node
-> reg - Linux driver expects AHB base addr in reg property.
       - Fixed length of controller register set.
-> interrupt - Corrected the interrupt number for ospi.
-> cdns,fifo-depth - Corrected ospi fifo-depth property.

Signed-off-by: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>
2019-07-02 09:52:49 +05:30
Ravi Patel
1293783c2f arm64: versal: Add power domain for OSPI and WDT
Add power domain property for OSPI and WDT node.

Signed-off-by: Ravi Patel <ravi.patel@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-28 14:24:54 +02:00
Jyotheeswar Reddy Mutthareddyvari
157d34cb37 mtd: spi_flash: Add device mt35xu01g to spi flash ids list
This patch adds new spi flash device mt35xu01g to spi
flash ids table.

Signed-off-by: Jyotheeswar Reddy Mutthareddyvari <jyotheeswar.reddy.mutthareddyvari@xilinx.com>
2019-06-28 11:44:34 +02:00
Izhar Ameer Shaikh
8e841bd828 arm64: versal: Add frequency scaling support
Add CPU Operating Performance Points (OPP) table and ACPU clock for
cpu0. This is needed by cpufreq driver to manage CPU frequency scaling.

e.g.
In the design if we have 72 as the multiplier and 33.333 MHz as the ref
frequency:

pllfreq = 33.33*72 = 2399.76 MHz
It is the pll output.

Now, with the integral divisors we can achieve:

2399.76 / 2 = 1199.88 MHz
2399.76 / 3 = 799.92 MHz
2399.76 / 4 = 599.94 MHz
2399.76 / 5 = 479.95 MHz
2399.76 / 6 = 399.96 MHz
2399.76 / 7 = 342.82 MHz
etc.

Therefore, some of them are chosen to be in the device tree.

For more reference: https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18841831/CPU+frequency+scaling

Signed-off-by: Izhar Ameer Shaikh <izhar.ameer.shaikh@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-28 11:34:14 +02:00
Michal Simek
100650c719 arm64: versal: Switch all versal platform to firmware clocks
Do not use fixed clock and move to firmware managed clocks for all current
platforms. versal-fixed.dtsi can be removed at this point.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-28 11:34:14 +02:00
Michal Simek
aaf29c99b4 arm64: versal: Add missing dt-bindings headers for clk and power
Add missing files.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-28 11:34:14 +02:00
Michal Simek
d7d74e566a arm64: versal: Add description for a2197-e-revA board
It is pretty much subset of a2197-p with some differences.
It is the first evaluation/customer board with Versal.
Also called vck190.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-28 11:34:14 +02:00
Michal Simek
b9f455a361 arm64: zynqmp: Add support for a2197-e-revA board
Add support for System Controller available on a2197-e board.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-28 11:34:14 +02:00
Michal Simek
c532ac554c arm64: versal: Add description for a2197-p x-prc-05
Description is done without schematics only based on spec. It needs to be
validated when HW is ready.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-28 11:25:30 +02:00
Michal Simek
81c679c753 arm64: zynqmp: Add x-prc-01/02/03/04 revA support from SC
Add i2c accessible devices with description.
There is versal specific eeprom and i2c-gpio controller.

SE3 has also clock chip present.

Also remove x-prc description from SC dts.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-28 11:25:30 +02:00
Michal Simek
ca0e5926ab arm64: versal: Add description for a2197-p x-prc-04
Add description based on specification and schematics.
All FIXMEs should be fixed when HW is ready.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-28 11:25:30 +02:00
Michal Simek
941476300b arm64: versal: Add description for a2197-p x-prc-03
Add description based on specification and schematics.
All FIXMEs should be fixed when HW is ready.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-28 11:25:30 +02:00
Siva Durga Prasad Paladugu
9e29b1e9e6 arm64: zynqmp: Add new jtag distro boot command
This patch adds new jtag distro boot command to look for bootscript file in
DDR and execute it first incase of jtag bootmode.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-28 11:25:30 +02:00
Siva Durga Prasad Paladugu
ff6a6dd00b arm64: zynqmp: Update scriptaddr value to 512MB
This patch updates scriptaddr value to 512MB as having it at 32MB has high
chance of script corruption incase of bigger kernel.

Be aware that 512MB is used for SPL malloc area that's why images should be
loaded after SPL (the best after u-boot relocation).

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-28 11:25:30 +02:00
Siva Durga Prasad Paladugu
c13047ee50 arm64: versal: Add new jtag distro boot command
This patch adds new jtag distro boot command to look for bootscript file
in DDR and execute it first incase of jtag bootmode.
This patch also updates scriptaddr to 512MB as there is high of script
corruption incase of bigger kernel image.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-28 11:25:30 +02:00
Siva Durga Prasad Paladugu
88b1ef1bfb arm64: versal: Remove unneeded configs
The PSCI_RESET and EXPERT are not needed for mini
configurations so remove them to save space.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-28 11:25:30 +02:00
Srinivas Goud
9451cef333 arm64: versal: Enable watchdog node
This patch enable watchdog module in the versal system.

Signed-off-by: Srinivas Goud <srinivas.goud@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-28 11:25:30 +02:00
Srinivas Goud
2a18c735d4 arm64: versal: Set watchdog default timeout
This patch sets the watchdog timeout-sec property to 60 seconds as default value.

Signed-off-by: Srinivas Goud <srinivas.goud@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-28 11:25:30 +02:00
Michal Simek
7c6358ddbd arm64: zynqmp: Remove some FIXME from System Controller
Remove some FIXMEs from DT. All of them are checked and not needed now.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-28 11:25:30 +02:00
Michal Simek
360e42d493 arm64: zynqmp: Sync si570 setup and clock names
Setup proper si570 names and default factory setup.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-28 11:25:30 +02:00
Michal Simek
dae3ac3945 arm64: zynqmp: Fix ina226/u12 setup for System Controller
Linux driver is not capable to handle 10Ohm shunt resistor.
That's why setup 1Ohm and setup proper calculation in user space.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-28 11:25:30 +02:00
Michal Simek
a328908755 arm64: zynqmp: Enable serdes driver for usb3.0
Enable PHY serdes driver for usb3.0.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-28 11:25:30 +02:00
Siva Durga Prasad Paladugu
326f70d9d9 spi: ospi: Update ospi node with required properties
This patch updates ospi node with all required
properties for ospi.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-28 11:25:30 +02:00
Siva Durga Prasad Paladugu
e606c2f4e9 dts: versal: Update AHB trigger address for ospi node
This patch updates the AHB trigger adress that will be used by
the DAC/INDAC controllers for data transfers.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-28 11:25:30 +02:00
Siva Durga Prasad Paladugu
6104fd5f07 arm64: versal: Enable clock driver support for versal
This ptach enables clock driver support for Versal
platform.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
2019-06-28 11:25:30 +02:00
Siva Durga Prasad Paladugu
686a2791b6 clk: versal: Add clock driver support
This patch adds clock driver support for Versal
platform. The clock driver queries and performs
clock operations using PLM firmware by communicating
with it using SMC calls.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-28 11:25:30 +02:00
Anurag Kumar Vulisha
440f4f44eb arm64: versal: Add GFLADJ quirks for correcting SOF generation to DWC3
Add quirk for adjusting the GFLADJ register (global frame length
adjustment register) to trigger SOFs exactly at 125us time period.

Signed-off-by: Anurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-28 11:25:30 +02:00
Amit Sunil Dhamne
621acfb3be arm64: versal: Enable RTC node for a2197-x-prc-01
Enable RTC node. RTC is used as a wakeup source for APU suspend-resume
use case. Also add alias for "rtc" as "rtc0".

Signed-off-by: Amit Sunil Dhamne <amit.sunil.dhamne@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-28 11:25:30 +02:00
T Karthik Reddy
4cdd856faa zynqmp: Set sd boot device number to sdbootdev
In case of multiple sd devices to identify proper sd boot device
assign "sdbootdev" variable with device sequence number. While
auto-booting "sdboot" picks appropriate sd device from "sdbootdev".
	This fix is for old way auto-boot process, it will be
deprecated in 2020.1 & all the functionality will be removed.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Raju Kumar Pothuraju <raju.kumar-pothuraju@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-28 11:25:30 +02:00
Michal Simek
8cf1a218bf xilinx: Add missing headers
make W=1 indicates that there are missing headers.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-28 11:25:30 +02:00
Luca Ceresoli
12fa4e2e39 tools: zynqmp_psu_init_minimize.sh: fix return lines coding style
Remove unneeded parenthess around return value. E.g.:
    return (0);   ->   return 0;

Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-28 11:25:30 +02:00
Harini Katakam
e33bed4aac net: phy: ti: Use auto MDI crossover for SGMII
Use auto MDI crossover for SGMII to support all cable setups.
Also correct MDIX mask bit.

Signed-off-by: Harini Katakam <harini.katakam@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-28 11:25:30 +02:00
T Karthik Reddy
5deb244953 mmc: zynq_sdhci: Move UHS mode macros
This patch moves UHS mode macros from mmc.h to zynq_sdhci.c.
Moving UHS mode macros in mmc.h avoids redefinition of macros when
xenon_sdhci.c is compiled.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-28 11:25:30 +02:00
T Karthik Reddy
2f9a216c72 mmc: sdhci: Read sdhci card detect properties from DT
This patch reads card detect properties from device tree.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-28 11:25:30 +02:00
T Karthik Reddy
4d41f637b4 mmc: sdhci: Implement SDHCI card detect
Card detect function implemented for SDHCI framework.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-28 11:25:30 +02:00
Michal Simek
26722abf2f arm64: versal: Add support for vc-d-d1760-01
Add support for the first data center card. Only memory and uart is
specified for initial bringup.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-28 11:25:30 +02:00
Siva Durga Prasad Paladugu
51dfed0c18 mmc: zynq_sdhci: Fix SD at 25MHz
High speeds were broken in versal. This patch workarounds the issue and operates
SD in 25MHz.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-28 11:25:30 +02:00
Michal Simek
3e136a2702 arm64: versal: Add a2197 base board support with x-prc01/02 cards
There is generic defconfig designed for autodetection (not added yet)
and then separate defconfigs directly used for certain x-prc card.

Octal SPI dts is added but not wired for x-prc specific defconfig.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Harini Katakam <harini.katakam@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
2019-06-28 11:25:30 +02:00
Michal Simek
c1cf1a3d98 arm64: versal: Add platform detection code to versal_virt
Detect which platform U-Boot is running at and based on that choose DTS
file which U-Boot uses for own configuration.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-06 15:00:35 +02:00
Michal Simek
30f6180c99 arm64: zynqmp: Add DT for zcu216 revA board
Add preliminary support for zcu216 board.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-06 14:49:03 +02:00
Michal Simek
a52a805d61 arm64: zynqmp: Add a2197 memory board revA
Similar to processor board but i2c structure is completely different.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-06 14:01:14 +02:00
Michal Simek
ee9b308483 arm64: zynqmp: Add System Controller for a2197-g/p
Similar SCs but different wiring.

- dc_i2c is connected to X-PRC cards that's why label is required to have
  an option to hook up some devices.
- Exactly identify i2c devices on x-prc boards.
  In case of missing i2c connection devices won't be accessible.
- USB 0 should be device mode with super speed.
- USB 1 should be host mode.
- Fix i2c mux reset pin entry - commented, not verified.
- Fix i2c1 eeprom compatible string - it is an ST 128Kbit device.
  Need to use atmel fallback.
- Fix si570 I2C slave address and add corresponding part numbers.
- Enable AMS for system monitoring.
- phy reset property should be commented because it will throw a
  warning dump when called from context that can sleep.
  No support for phys property (zynqmp phy driver) with SGMII.
  Add is-internal-pcspma property required by uboot.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Harini Katakam <harini.katakam@xilinx.com>
2019-06-06 13:56:50 +02:00
Michal Simek
4b1a740aef arm64: zynqmp: Add generic a2197 system controller config
Add generic configuration for a2197-p/-m/-g boards.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-06 13:46:52 +02:00
Michal Simek
8e10a95228 arm64: zynqmp: Add board detection based on FRU
Identification depends on eeprom with FRU content.

For example 2 eeproms to check.
chosen {
	xlnx,eeprom = <&eeprom>, <&eeprom2>;
};

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-06 13:46:52 +02:00
Michal Simek
e78bcec604 cmd: fru: Add fru to versal maintainer fragment
Just record responsiblity.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-06 13:46:52 +02:00
Michal Simek
0837acee9b cmd: fru: Add basic fru format generator
Idea is to have something what can be used for board bringup from
generic board perspective.

There is a violation compare to spec that FRU ID is ASCII8 instead of
binary format but this is really for having something to pass boot and
boot to OS which has better generating options.
Also time should be filled properly.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-06 13:46:52 +02:00
Michal Simek
1cf538f832 cmd: fru: Simplify do_fru_capture()
Remove ret and check already recorded maximum number of args via
cmdtp->maxargs.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-06 13:46:52 +02:00
Michal Simek
291b2ec0cc cmd: fru: Use the same format in long help
Use the same format for both capture/display options.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-06 13:46:52 +02:00
Michal Simek
c718031b55 cmd: fru: Also write terminating char to arrays
There is a need to also end up strings with terminating char \0 to be
able to reread different structures.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-06 13:46:52 +02:00
Michal Simek
70c975fe77 cmd: fru: Fix structure format for board info
Origin code was targeting product area which is not what will be used at
first place.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-06 13:46:52 +02:00