Commit Graph

16 Commits

Author SHA1 Message Date
Siew Chin Lim
6bf1249a92 configs: socfpga: soc64: Move CONFIG_BOOTCOMMAND to defconfig
CONFIG_BOOTCOMMAND have been moved to Kconfig.boot. This patch
move the CONFIG_BOOTCOMMAND macro from socfpga_soc64_common.h to
*_defconfig file for both Stratix 10 and Agilex.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
2021-03-08 10:59:11 +08:00
Tom Rini
53def460d2 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-11-30 12:50:32 -05:00
Tom Rini
cdeb7b8f98 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-10-29 10:48:01 -04:00
Chee Hong Ang
269564ccf4 arm: socfpga: soc64: Remove CONFIG_OF_EMBED
CONFIG_OF_EMBED was primarily enabled to support the S10/Agilex
spl hex file requirements.  Since this option now produces a
warning during build, and the spl hex can be created using
alternate methods, CONFIG_OF_EMBED is no longer needed.

Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
2020-10-09 17:53:16 +08:00
Chee Hong Ang
5bbeaaefec arm: socfpga: soc64: Disable CONFIG_PSCI_RESET
Don't invoke 'SYSTEM_RESET' PSCI function because PSCI
function calls are not supported by u-boot running in EL3.

Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-10-09 17:53:14 +08:00
Chee Hong Ang
2473e13bb8 arm: socfpga: Use DM watchdog timer
All SoCFPGA platforms (except Cyclone V) are now switching
to CONFIG_WDT (driver model for watchdog timer drivers)
from CONFIG_HW_WATCHDOG.

Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-10-09 17:53:12 +08:00
Chin Liang See
f833d6a4ce configs: socfpga: soc64: Avoid SPL enter infinite loop during exception
In current implementation, any exception would trigger a CPU reset.
But a bad written SPL would cause infinite loop where the system
will reload the same SPL instead of loading factory safe image.

Hence this patch is to ensure any exception will cause a hang. At this
moment, watchdog shall be triggered and Remote System Update mechanism
shall load the next production image or factory safe image.

Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-10-09 17:53:11 +08:00
Tom Rini
554e5514ac configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-08-10 15:31:07 -04:00
Tom Rini
6e7d7aa2e2 Merge branch 'next'
Merge all outstanding changes from the current next branch in now that
we have released.
2020-07-06 15:46:38 -04:00
Tom Rini
c5a6e9f8b8 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-06 13:54:25 -04:00
Tom Rini
8f74e659c4 spi: Enable missing CONFIG_SPL_DM_SPI support
Due to how the Makefile logic is we currently get DM_SPI support in SPL
enabled by having DM_SPI enabled for full U-Boot but not having
CONFIG_SPL_DM_SPI set.  Add this missing option to boards that were
inadvertently making use of it.

Cc: Adam Ford <aford173@gmail.com>
Cc: Akash Gajjar <akash@openedev.com>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Andy Yan <andy.yan@rock-chips.com>
Cc: Anup Patel <anup.patel@wdc.com>
Cc: Atish Patra <atish.patra@wdc.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Chee Hong Ang <chee.hong.ang@intel.com>
Cc: Chin-Liang See <clsee@altera.com>
Cc: Dalon Westergreen <dwesterg@gmail.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Klaus Goger <klaus.goger@theobroma-systems.com>
Cc: Levin Du <djw@t-chip.com.cn>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Luca Ceresoli <luca@lucaceresoli.net>
Cc: Marek Vasut <marex@denx.de>
Cc: Michal Simek <monstr@monstr.eu>
Cc: Mike Looijmans <mike.looijmans@topic.nl>
Cc: Nicolas Ferre <nicolas.ferre@microchip.com>
Cc: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Peter Robinson <pbrobinson@gmail.com>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Cc: Suniel Mahesh <sunil@amarulasolutions.com>
Cc: Vitaly Andrianov <vitalya@ti.com>
Cc: Wolfgang Grandegger <wg@aries-embedded.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
2020-06-26 10:29:27 -04:00
Tom Rini
44a666a848 Convert CONFIG_BOOTARGS to Kconfig
This converts the following to Kconfig:
   CONFIG_BOOTARGS

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-26 10:29:05 -04:00
Ashok Reddy Soma
702de89cc6 treewide: mem: Move mtest related defines to Kconfig
Move below defines which are used by mtest utility to Kconfig.
CONFIG_SYS_MEMTEST_START
CONFIG_SYS_MEMTEST_END

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
[trini: Fix kmcoge5ne board, re-run migration as well]
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-05-08 12:02:56 -04:00
Tom Rini
556fd590db configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-04-28 16:15:47 -04:00
Tom Rini
052170c6a0 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-01-22 13:38:00 -05:00
Ley Foon Tan
a76b711dea arm: socfpga: agilex: Enable Agilex SoC build
Add build support for Agilex SoC.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07 14:38:34 +01:00