Commit Graph

39982 Commits

Author SHA1 Message Date
Michal Simek
4444cb2c19 ARM64: zynqmp: Add support for DFU from SPL
SPL needs to have bigger stack size because of USB.
Simple malloc needs to be disabled because dfu code requires different
allocation functions. There is no space in OCM that's why random place
in DDR is used.

BOOTD must be disabled because it is causing compilation error.

All variables are disabled and used only variables valid for DFU because
they are simple huge. Including automatic variables added by
CONFIG_ENV_VARS_UBOOT_CONFIG.
Hardcode addresses for u-boot, atf, kernel and dtb
just for SPL DFU code.

Enable SPL DFU for zcu100.
Create new usb_dfu_spl variable just to run Linux kernel loaded in SPL.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-10-26 09:13:56 +02:00
Michal Simek
6ff9ae77b1 ARM: Add new BOOT_DEVICE_DFU boot mode
This enum is needed when SPL_DFU is enabled.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-10-26 09:13:51 +02:00
Michal Simek
979dbcbc8a cmd: dfu: Add error handling for board_usb_init
board_usb_init() can failed and error should be handled properly.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Reviewed-by: Heiko Schocher<hs@denx.de>
2016-10-26 09:12:03 +02:00
Sanchayan Maity
e228a327ea cmd: dfu: Add error handling for failed registration
Without this, if g_dnl_register() fails, DFU code continues on
blindly and crashes. This fix makes it simply print an error
message instead.

Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
[l.majewski@samsung.com - some manual tweaks needed]
2016-09-21 08:46:33 +02:00
B, Ravi
381c5052d7 dra7x: boot: add dfu bootmode support
This patch enables the DFU boot mode support
for dra7x platform.

Signed-off-by: Ravi Babu <ravibabu@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-09-21 08:46:33 +02:00
B, Ravi
5e7be994c6 spl: dfu: adding dfu support functions for SPL-DFU
Adding support functions to run dfu spl commands.

Signed-off-by: Ravi Babu <ravibabu@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-09-21 08:46:33 +02:00
B, Ravi
284cdf2043 common: dfu: saperate the dfu common functionality
The cmd_dfu functionality is been used by both SPL and
u-boot, saperating the core dfu functionality moving
it to common/dfu.c.

Signed-off-by: Ravi Babu <ravibabu@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-09-21 08:46:33 +02:00
B, Ravi
3cd4d7fcdc spl: dfu: add dfu support in SPL
Traditionally the DFU support is available only
as part 2nd stage boot loader(u-boot) and DFU
is not supported in SPL.

The SPL-DFU feature is useful for boards which
does not have MMC/SD, ethernet boot mechanism
to boot the board and only has USB inteface.

This patch add DFU support in SPL with RAM
memory device support to load and execute u-boot.
And then leverage full functionality DFU in
u-boot to flash boot inital binary images to
factory or bare-metal boards to memory devices
like SPI, eMMC, MMC/SD card using USB interface.

This SPL-DFU support can be enabled through
Menuconfig->Boot Images->Enable SPL-DFU support

Signed-off-by: Ravi Babu <ravibabu@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-09-21 08:46:33 +02:00
Michal Simek
548b390e39 ARM64: zynqmp: Move BSS location to the beginning of ram
With SPL_DFU support memory layout needs to be cleanup
that's why move bss to the start of memory.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-09-21 08:46:33 +02:00
Michal Simek
ce7f1a302f ARM64: zynqmp: Fix kernel location to fit with Image entry point
This fix is required for getting dfu up and running.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-09-21 08:46:32 +02:00
Siva Durga Prasad Paladugu
972c9a62c2 qspi: zynqmp: Restrict baud rate value to max value
Restrict baud rate disvisor value to max possible
baud rate value. This fixes the baud rate value overflow
condition which results in programming the incorrect baud
rate divisor value.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-09-21 08:46:32 +02:00
Siva Durga Prasad Paladugu
95e11f6eb4 zynqmp: Add support for SD1 with level shifters bootmode
Add support for SD1 with level shifters bootmode.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-09-21 08:46:32 +02:00
Siva Durga Prasad Paladugu
aebea9d20a spi: xilinx_spi: Correct the fifo-depth calculation
Correctly fill the fifo depth by passing correct node in getting
it from device tree. This fixes the issue of hanging in a loop while
reading environment from spi flash during boot up which is caused by
commit "spi: xilinx_spi: Modify transfer logic for quad mode"
(sha1: c638e0e80e)

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-08-29 09:41:20 +02:00
Siva Durga Prasad Paladugu
3a322798be nand: arasan_nfc: Clear ecc on bit while sending read command
Clear ecc ON bit while sending read command as all types
of read command(like reading spare) doesnt need ECC to be
enabled. It has been anyway taken care in other places
whereever required using arasan_nand_enable_ecc().

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-08-25 14:18:00 +02:00
Siva Durga Prasad Paladugu
b660199bd5 zynqmp: Get chipid from ATF using SMC
Get the chipid from ATF using SMC as ATF
is supporting it now.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-08-24 11:36:03 +02:00
Siva Durga Prasad Paladugu
979a06b6da fpga: zynqmp: Add support to load PL bistream
Update PL bitstream load support by updating the
smc arguments as per latest ATF changes.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-08-24 11:36:03 +02:00
Siva Durga Prasad Paladugu
c638e0e80e spi: xilinx_spi: Modify transfer logic for quad mode
Modify the transfer logic to get it working for both single
and quad modes. The controller expects 4 dummy bytes for
quad read and also expects the txfifo filled with full command
and required args before starting the transfer. This fixes
an issue in reading from device using quad read command.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-08-24 11:36:03 +02:00
Michal Simek
79aec35770 ARM: zynq: Extend malloc len for zc702
There is an issue in SPL with insufficient malloc space.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-08-24 11:36:03 +02:00
Sai Pavan Boddu
5c56eae699 microblaze: Make the board configuration name user definable
Add a prompt for editing in menuconfig

Signed-off-by: Sai Pavan Boddu <saipava@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-08-18 08:14:23 +02:00
Michal Simek
831fe38981 ARM64: Add early support for zcu100
DTS file contains a lot of FIXMEs which need to be validated prior board
bring-up.

Board has 1GB memory
Uart over extension connector MIO 8/9.
DP - used fixed clock for LG monitor.

Enable SPL: (Generated May 25th)
/group/siv2/work/ronaldo/kevant/alto/vnc/vnc1_0/hw/hwflow_local/clk/
Vivado:
/proj/xbuilds/2016.3_0513_1/installs/lin64/Vivado/2016.3/settings64.sh
Disabled DDR init from psu_init - broken.

Also with disabled internal pull-ups on pin 76 and 77.

GT description for USBs and DP.
Reference input clock for USB is commit from CLK lane 0
and for DP from lane 1 that's why LANE_NUM reflects that.
Lane 0 - PS_MGTREFCLK0, Lane 1 - PS_MGTREFCLK1.
USB GTs are disabled because ULPI PHY reset in Linux also causing reset
for spi/wifi/bt chips.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-08-18 08:14:22 +02:00
Michal Simek
cc572440ce ARM64: zynqmp: Fix USB ulpi phy sequence
It should be enough to call low(5us)->high pulse for all cases
to provide proper reset. There is no need to call high->low->high.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-08-18 08:14:22 +02:00
Michal Simek
a69057857a ARM64: zynqmp: Add support for USB ulpi phy reset via mode pins
Mode pins can be used as output for reset. Xilinx boards are using
this feature as additional way how to reset USB phys and also others
chips on the boards.
Mode1 is used on all these boards for this feature.
Let SPL toggle reset on this pin by default.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-08-18 08:14:22 +02:00
Andreas Bießmann
f06ff337ac image-fit: fix fit_image_load() OS check
Commit 62afc60188 introduced fpga image load via
bootm but broke the OS check in fit_image_load().

This commit removes following compiler warning:

---8<---
In file included from tools/common/image-fit.c:1:
/Volumes/devel/u-boot/tools/../common/image-fit.c:1715:39: warning: use of logical '||' with constant operand [-Wconstant-logical-operand]
        os_ok = image_type == IH_TYPE_FLATDT || IH_TYPE_FPGA ||
                                             ^  ~~~~~~~~~~~~
/Volumes/devel/u-boot/tools/../common/image-fit.c:1715:39: note: use '|' for a bitwise operation
        os_ok = image_type == IH_TYPE_FLATDT || IH_TYPE_FPGA ||
                                             ^~
                                             |
1 warning generated.
--->8---

Signed-off-by: Andreas Bießmann <andreas@biessmann.org>
Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-08-18 08:14:22 +02:00
Michal Simek
1dbd51d7c7 ARM64: zynqmp: Wire up PSCI reset
Using PSCI to reset the system.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-08-18 08:14:22 +02:00
Michal Simek
06f630ae01 libfdt: Introduce new ARCH_FIXUP_FDT option
Add new Kconfig option to disable arch_fixup_fdt() calls for cases where
U-Boot shouldn't update memory setup in DTB file.
One example of usage of this option is to boot OS with different memory
setup than U-Boot use.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-08-18 08:14:22 +02:00
Michal Simek
88dc2b982f Revert "libfdt: Add option to disable arch_fixup_fdt() calls"
This reverts commit fd03516f7b.

This patch went to mainline with positive logic that's why revert this
patch and apply mainline one instead.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-08-18 08:14:22 +02:00
Siva Durga Prasad Paladugu
ea5dd79c07 zynqmp: Remove unnnecessary board config file for DC4
Remove unnecessary board specific config file for DC4
board.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-08-18 08:14:22 +02:00
Siva Durga Prasad Paladugu
277a2832ca zynqmp: Move config IDENT_STRING to defconfig
Move config IDENT_STRING to defconfig for all
zynqmp boards

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-08-18 08:14:22 +02:00
Siva Durga Prasad Paladugu
8284789a55 Kconfig: Added new kconfig entry for IDENT_STRING
Added new Kconfig entry for config IDENT_STRING.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-08-18 08:14:21 +02:00
Michal Simek
69c900cd99 ARM64: zynqmp: Wire up both USBs available on ZynqMP
The second USB wasn't enabled. This patch fixes it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-08-18 08:14:21 +02:00
Michal Simek
2bd4b7571b ARM64: zynqmp: Fix psu_init_gpl* violations
psu_init_gpl.c/h have pretty bad quality which requires additional fixes
to remove all reported warnings. Also coding style is bad.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-08-18 08:14:21 +02:00
Michal Simek
dd60951492 ARM64: zynqmp: Update psu_init_gpl* files for v2 silicon
Update configuration for 15eg silicon instead of 9eg v1.

Also with manual patch:
"xilinx_zynqmp_zcu102: Set QSPI clock divisor to "9""
(sha1: 39ba61813b)

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-08-18 08:13:37 +02:00
Mike Looijmans
39ba61813b xilinx_zynqmp_zcu102: Set QSPI clock divisor to "9"
The zynqmp_qspi driver assumes that the QSPI clock runs at 166666666 Hz,
set the divisor such that this is true. The IOPLL runs at 1500, so a
divisor of 0x0c would results in 125MHz.

The optimal divisor for the zcu102 would be "7", which would run the
clock at 214MHz and could thus generate almost 108MHz which is the max
clock rate for the flash chips on the board.

Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Acked-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-08-03 10:07:23 +02:00
Alistair Francis
cbf8681149 ARM64: zynqmp: Update Xen boot commands
Update the Xen boot commands to add in all the required options for hardware
boot and QEMU boot.

Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-08-02 06:45:28 +02:00
Soren Brinkmann
ca0cd73f4a ARM64: zynqmp: Fix stack pointer initialization
This partly reverts commit:
"ARM64: zynqmp: Add SPL support support"
(sha1: e6a9ed04e7)

Stack can rewrite ATF code.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-07-28 09:46:18 +02:00
Michal Simek
fa8d43cb18 ARM: zynq: Fix cc108 support
There is incorrect reference to cc108 SPL
and also fix dts file to be aligned with the latest bitstream for this
board.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-07-28 08:06:08 +02:00
Siva Durga Prasad Paladugu
fd060eeb92 zynq: defconfig: Remove unnecessary board specifc config files
Remove unnecessary board specifc config files for
zynq boards(microzed, picozed, ZC770(all), zed) and point
to zynq common config file.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-07-28 08:06:08 +02:00
Siva Durga Prasad Paladugu
7cae2cbdc6 zynq: config: Enable CONFIG_NAND_ZYNQ through Kconfig
Enable config CONFIG_NAND_ZYNQ through kconfig for Zynq
XM011 board.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-07-28 08:06:08 +02:00
Siva Durga Prasad Paladugu
2009b20bf0 Kconfig: Move option CONFIG_NAND_ZYNQ to Kconfig
Move config option CONFIG_NAND_ZYNQ as Kconfig
option. All the board which needs to enable this
option canbe done through Kconfig.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-07-28 08:06:08 +02:00
Siva Durga Prasad Paladugu
3afa05577a zynq: config: Enable CONFIG_SYS_NO_FLASH through defconfig
Enable config CONFIG_SYS_NO_FLASH through defconfig
for all zynq boards.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-07-28 08:06:04 +02:00
Siva Durga Prasad Paladugu
6bfa89f817 Kconfig: Move option CONFIG_SYS_NO_FLASH to Kconfig
Move config option CONFIG_SYS_NO_FLASH as Kconfig
option. All the boards which needs to enable this
option can be done through defconfigs

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-07-28 08:05:20 +02:00
Michal Simek
12eac7d84b ARM64: zynqmp: Define config USB_STORAGE through defconfig
Define config USB_STORAGE through defconfig for all
Xilinx ZynqMP boards.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-07-28 08:05:20 +02:00
Siva Durga Prasad Paladugu
874f505b5a usb: zynq: Define config USB_STORAGE through defconfig
Define config USB_STORAGE through defconfig for all
respective zynq boards

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-07-28 08:05:16 +02:00
Siva Durga Prasad Paladugu
4bdf806c10 usb: Kconfig: Add Kconfigs entry USB_EHCI_ZYNQ
Add Kconfig entry config option for USB_EHCI_ZYNQ
and update the same to enable for all zynq boards
which supports USB

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-07-28 08:03:12 +02:00
Michal Simek
c741eb41a3 ARM: zynq: Remove untested RSA configuration
It is getting hard and hard to keep all defconfigs
up2date that's why remove all RSA defconfigs which are not regularly
tested. Keep only zc702 with RSA support.

Any board can support it by enabling
CONFIG_CMD_ZYNQ_AES=y
CONFIG_CMD_ZYNQ_RSA=y

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-07-28 08:00:46 +02:00
Michal Simek
dc882379ee ARM64: zynqmp: Remove undef from mini configuration
The patch:
"ARM64: zynqmp: Remove CONFIG_BOOTP_SERVERIP"
(sha1: a8b6a156c0)
removed symbol that's why there is no need to have undef
in mini configuration.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-07-27 14:47:24 +02:00
Michal Simek
a43986b14c ARM: zynq: Remove CONFIG_BOOTP_SERVERIP
Do the same change which was done in ZynqMP by:
"ARM64: zynqmp: Remove CONFIG_BOOTP_SERVERIP"
(sha1: a8b6a156c0)

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-07-27 14:47:24 +02:00
Michal Simek
2fb8acd73b test/py: net_boot: Align timeout for reaching prompt
Align the first test with the second one to have the same timeout.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-07-25 08:00:41 +02:00
Mike Looijmans
de8499de2c ARM64: zynqmp: Make booting from SD possible without uEnv.txt
When booting from SD card, the kernel cannot find any rootfs.
It only works if you provide a "uEnv.txt" file on the SD card that
patches the bootargs.

If uEnv.txt does not exist, assume that the rootfs is on the second
partition of the SD card (or mmc device). To make this work, rename
"sdroot" to "sdroot0" so a simple script can switch between sd0 and sd1.

Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-07-22 15:22:44 +02:00
Michal Simek
c3e053062b ARM64: zynqmp: Add missing loadbootenv_addr
Variable as incorrectly removed by:
"Merge tag 'v2016.05' into master"
(sha1: d61a4869f8)

This patch take it back to the origin value.

Reported-by: Alexey Firago <alexey_firago@mentor.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-07-22 15:22:44 +02:00