ARM64: zynqmp: Add SPL support support
Support RAM and MMC boot mode in SPL also with SPL_FIT images. In MMC boot mode two boot options are available: 1) Boot flow with ATF(EL3) and full U-Boot(EL2): aarch64-linux-gnu-objcopy -O binary bl31.elf bl31.bin mkimage -A arm64 -O linux -T kernel -C none -a 0xfffe5000 -e 0xfffe5000 -d bl31.bin atf.ub cp spl/boot.bin <sdcard fat partition> cp atf.ub <sdcard fat partition> cp u-boot.bin <sdcard fat partition> 2) Boot flow with full U-Boot(EL3): cp spl/boot.bin <sdcard> cp u-boot*.img <sdcard> 3) emmc boot mode dd if=/dev/zero of=sd.img bs=1024 count=1024 parted sd.img mktable msdos parted sd.img mkpart p fat32 0% 100% kpartx -a sd.img mkfs.vfat /dev/mapper/loop0p1 mount /dev/mapper/loop0p1 /mnt/ cp spl/boot.bin /mnt cp u-boot.img /mnt cp u-boot.bin /mnt cp atf.ub /mnt umount /dev/mapper/loop0p1 kpartx -d sd.img cp sd.img /tftpboot/ and program it via u-boot tftpb 10000 sd.img mmcinfo mmc write 10000 0 $filesize mmc rescan mmc part ls mmc 0 psu_init() function contains low level SoC setup generated for every HW design by Xilinx design tools. xil_io.h is only supporting file to fix all dependencies from tools. The same solution was used on Xilinx Zynq. The patch also change CONFIG_SYS_INIT_SP_ADDR to the end of OCM which stays at the same location all the time. Bootrom expects starting address to be at 0xfffc0000 that's why this address is SPL_TEXT_BASE. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This commit is contained in:
parent
c9811e14cf
commit
e6a9ed04e7
arch/arm
board/xilinx/zynqmp
include/configs
@ -594,6 +594,7 @@ config ARCH_ZYNQMP
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select DM
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select OF_CONTROL
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select DM_SERIAL
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select SUPPORT_SPL
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config TEGRA
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bool "NVIDIA Tegra"
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@ -9,3 +9,4 @@ obj-y += clk.o
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obj-y += cpu.o
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obj-$(CONFIG_MP) += mp.o
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obj-y += slcr.o
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obj-$(CONFIG_SPL_BUILD) += spl.o
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107
arch/arm/cpu/armv8/zynqmp/spl.c
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107
arch/arm/cpu/armv8/zynqmp/spl.c
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@ -0,0 +1,107 @@
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/*
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* Copyright 2015 - 2016 Xilinx, Inc.
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*
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* Michal Simek <michal.simek@xilinx.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <debug_uart.h>
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#include <spl.h>
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#include <asm/io.h>
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#include <asm/spl.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/sys_proto.h>
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void board_init_f(ulong dummy)
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{
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psu_init();
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board_early_init_r();
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#ifdef CONFIG_DEBUG_UART
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/* Uart debug for sure */
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debug_uart_init();
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puts("Debug uart enabled\n"); /* or printch() */
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#endif
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/* Delay is required for clocks to be propagated */
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udelay(1000000);
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/* Clear the BSS */
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memset(__bss_start, 0, __bss_end - __bss_start);
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/* No need to call timer init - it is empty for ZynqMP */
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board_init_r(NULL, 0);
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}
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#ifdef CONFIG_SPL_BOARD_INIT
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void spl_board_init(void)
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{
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preloader_console_init();
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board_init();
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}
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#endif
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u32 spl_boot_device(void)
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{
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u32 reg = 0;
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u8 bootmode;
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reg = readl(&crlapb_base->boot_mode);
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bootmode = reg & BOOT_MODES_MASK;
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switch (bootmode) {
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case JTAG_MODE:
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return BOOT_DEVICE_RAM;
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#ifdef CONFIG_SPL_MMC_SUPPORT
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case EMMC_MODE:
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case SD_MODE:
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case SD_MODE1:
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return BOOT_DEVICE_MMC1;
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#endif
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default:
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printf("Invalid Boot Mode:0x%x\n", bootmode);
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break;
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}
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return 0;
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}
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u32 spl_boot_mode(void)
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{
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switch (spl_boot_device()) {
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case BOOT_DEVICE_RAM:
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return 0;
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case BOOT_DEVICE_MMC1:
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return MMCSD_MODE_FS;
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default:
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puts("spl: error: unsupported device\n");
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hang();
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}
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}
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__weak void psu_init(void)
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{
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/*
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* This function is overridden by the one in
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* board/xilinx/zynqmp/(platform)/psu_init_gpl.c, if it exists.
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*/
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}
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#ifdef CONFIG_SPL_OS_BOOT
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int spl_start_uboot(void)
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{
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return 0;
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}
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#endif
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#ifdef CONFIG_SPL_LOAD_FIT
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int board_fit_config_name_match(const char *name)
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{
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/* Just empty function now - can't decide what to choose */
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debug("%s: %s\n", __func__, name);
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return 0;
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}
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#endif
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@ -17,4 +17,6 @@ int zynq_slcr_get_mio_pin_status(const char *periph);
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unsigned int zynqmp_get_silicon_version(void);
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void psu_init(void);
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#endif /* _ASM_ARCH_SYS_PROTO_H */
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@ -1,8 +1,29 @@
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#
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# (C) Copyright 2014 - 2015 Xilinx, Inc.
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# (C) Copyright 2014 - 2016 Xilinx, Inc.
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# Michal Simek <michal.simek@xilinx.com>
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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obj-y := zynqmp.o
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hw-platform-y :=$(shell echo $(CONFIG_SYS_CONFIG_NAME))
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init-objs := $(if $(wildcard $(srctree)/$(src)/$(hw-platform-y)/psu_init_gpl.c),\
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$(hw-platform-y)/psu_init_gpl.o)
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ifeq ($(init-objs),)
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ifneq ($(wildcard $(srctree)/$(src)/psu_init_gpl.c),)
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init-objs := psu_init_gpl.o
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$(if $(CONFIG_SPL_BUILD),\
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$(warning Put custom psu_init_gpl.c/h to board/xilinx/zynqmp/custom_hw_platform/))
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endif
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endif
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obj-$(CONFIG_SPL_BUILD) += $(init-objs)
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# Suppress "warning: function declaration isn't a prototype"
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CFLAGS_REMOVE_psu_init_gpl.o := -Wstrict-prototypes
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# To include xil_io.h
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CFLAGS_psu_init_gpl.o := -I$(srctree)/$(src)
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35
board/xilinx/zynqmp/xil_io.h
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35
board/xilinx/zynqmp/xil_io.h
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@ -0,0 +1,35 @@
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/*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef XIL_IO_H /* prevent circular inclusions */
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#define XIL_IO_H
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/* FIXME remove this when vivado is fixed */
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#include <asm/io.h>
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#define xil_printf(...)
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void Xil_ICacheEnable(void)
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{}
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void Xil_DCacheEnable(void)
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{}
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void Xil_ICacheDisable(void)
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{}
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void Xil_DCacheDisable(void)
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{}
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void Xil_Out32(unsigned long addr, unsigned long val)
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{
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writel(val, addr);
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}
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int Xil_In32(unsigned long addr)
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{
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return readl(addr);
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}
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#endif /* XIL_IO_H */
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@ -41,7 +41,7 @@
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# define CONFIG_IDENT_STRING " Xilinx ZynqMP"
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#endif
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#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
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#define CONFIG_SYS_INIT_SP_ADDR 0xfffffffc
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/* Generic Timer Definitions - setup in EL3. Setup by ATF for other cases */
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#if !defined(COUNTER_FREQUENCY)
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@ -65,7 +65,9 @@
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#define CONFIG_CMD_ENV
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#define CONFIG_DOS_PARTITION
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#define CONFIG_EFI_PARTITION
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#define CONFIG_ISO_PARTITION
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#ifndef CONFIG_SPL_BUILD
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# define CONFIG_ISO_PARTITION
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#endif
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#define CONFIG_MP
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/* BOOTP options */
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@ -228,4 +230,41 @@
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#define CONFIG_BOARD_EARLY_INIT_R
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#define CONFIG_CLOCKS
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#define CONFIG_SPL_TEXT_BASE 0xfffc0000
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#define CONFIG_SPL_MAX_SIZE 0x20000
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/* Just random location in OCM */
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#define CONFIG_SPL_BSS_START_ADDR 0x1000000
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#define CONFIG_SPL_BSS_MAX_SIZE 0x2000000
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#define CONFIG_SPL_FRAMEWORK
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#define CONFIG_SPL_LIBCOMMON_SUPPORT
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#define CONFIG_SPL_LIBGENERIC_SUPPORT
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#define CONFIG_SPL_SERIAL_SUPPORT
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#define CONFIG_SPL_BOARD_INIT
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#define CONFIG_SPL_RAM_DEVICE
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#define CONFIG_SPL_OS_BOOT
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/* u-boot is like dtb */
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#define CONFIG_SPL_FS_LOAD_ARGS_NAME "u-boot.bin"
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#define CONFIG_SYS_SPL_ARGS_ADDR 0x8000000
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/* ATF is my kernel image */
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#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "atf.ub"
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/* FIT load address for RAM boot */
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#define CONFIG_SPL_LOAD_FIT_ADDRESS 0x10000000
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/* MMC support */
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#ifdef CONFIG_ZYNQ_SDHCI
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# define CONFIG_SPL_MMC_SUPPORT
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# define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
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# define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0 /* unused */
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# define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0 /* unused */
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# define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0 /* unused */
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# define CONFIG_SPL_LIBDISK_SUPPORT
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# define CONFIG_SPL_FAT_SUPPORT
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# define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
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#endif
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#endif /* __XILINX_ZYNQMP_H */
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