Update zynqmp dts files to sync with upstream binding.
Below DT nodes are updated:
* Firmware
* Clock
* zynqmp-power
* Power domain
* Reset
* Pinctrl
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add simple ZynqMP firmware drive to populate
child nodes under zynqmp_firmware DT node.
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The DP83867 strap control workaround is already present in the
driver - use the same quirk.
Signed-off-by: Harini Katakam <harini.katakam@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
distro boot expects that fdtfile name is setup for alternative DTB.
Create this file based on the first platform compatible string.
This should ensure that one rootfs can store multiple DTBs for different
boards.
Reflect structure which is used in Linux kernel. It means dtbs are
strored in xilinx folder.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
This patch adds reset-on-timeout to FPD WDT which will trigger an
interrupt to PMU when watchdog expiry happens and PMU takes the
necessary action. If this property is not enabled, reason will not be
known when watchdog expiry happens.
This patch also modifies the default timeout to 60 seconds. Reason is
that if u-boot enables WDT, it will set the timeout to 10 seconds and
this is not enough to boot till Linux and start the WDT application in
Linux. 60 seconds is the maximum safest value to boot till Linux and
start the WDT application.
Users need to change this timeout value to fit their needs.
Signed-off-by: Mounika Grace Akula <mounika.grace.akula@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The idle-states binding documentation[1] mentions that the
'entry-method' property is required on 64-bit platforms and must be
set to "psci".
Linux commit a13f18f59d26 ("Documentation: arm: Fix typo in the idle-states
bindings examples") attempted to fix this earlier but clearly more is
needed.
Linux docs:
Documentation/devicetree/bindings/arm/idle-states.txt (see
idle-states node)
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Acked-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The current dt entry for the ocm performance monitor specifies
that there are 4 slots. This is incorrect. Page 372 of the
zynqmp trm describes the number of slots each apm supports.
Signed-off-by: Daniel Steger <daniel.steger@xilinx.com>
Reviewed-by: Shubhrajyoti Datta <Shubhrajyoti.datta@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
SMMU adds overhead in mapping/un-mapping of DMA buffers. It
will degrade performance numbers for some of the peripherals.
Disabling SMMU to avoid the same.
Please check Xilinx documentation for more information.
Signed-off-by: Mubin Usman Sayyed <mubin.usman.sayyed@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Drivers dependent on IOMMU expect SMMU to be probed first and
in PM flow, suspended last and resumed first.
This can ideally be achieved by adding PM support in arm-smmu and
maintaining the above expected order. This series on LKML proposes
the same:
https://patchwork.ozlabs.org/cover/885035/
But this is still under review and would require pulling in more
framework changes on the current xilinx tree. Hence this patch
provides a temporary fix until the above solution is finalized.
The expected order is maintained by moving SMMU node outside amba node
in the devicetree.
Signed-off-by: Harini Katakam <harini.katakam@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
As per the zc1275 design x1 mode is enabled so changing the
spi-rx-bus-width property to x1.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The current zynqmp.dtsi does not include the axi performance
monitors for the lpd, cci, or ddr. This set of patches adds
in the missing dt entries for the ps apms.
Signed-off-by: Daniel Steger <daniel.steger@xilinx.com>
Reviewed-by: Shubhrajyoti Datta <Shubhrajyoti.datta@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
FPD watchdog clock should not be used for LPD watchdog. This patch
modifies the same to use the proper clock for LPD watchdog.
Signed-off-by: Mounika Grace Akula <mounika.grace.akula@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch is required to fix binding of gem interface clocks to
system-level clock IDs that have changed. The gem0 clock IDs are now:
1) Clock ID 45 represents GEM0_TX clock
2) Clock ID 49 represents GEM0_RX clock
3) Clock ID 104 represents GEM0_REF clock
Clock IDs for other gems changed similarly, e.g. for i in {1, 2, 3}
GEMi_TX = GEM0_TX + i, etc. Other clock IDs have not changed.
Signed-off-by: Mirela Simonovic <mirela.simonovic@aggios.com>
Acked-by: Will Wong <willw@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Replace the current value of the model property by a more accurate
description of each board (which includes the manufacturer), as some
of the boards had the same value ("Xilinx Zynq")
Signed-off-by: Luis Araneda <luaraneda@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Both boards are made by Avnet, Inc. So add an additional
value to the compatible property
Signed-off-by: Luis Araneda <luaraneda@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
All options have been moved to Kconfig and there is no need to have
board header files. Mini configurations require them that's why they are
still there.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
SPD autodetection hasn't been enabled that's why there is zero size
difference if that options are enabled/disabled.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Replace SDHCI controller listing by Kconfig symbol to let SPL know that
this board is using multiple SDHCIs controllers.
Kconfig help message should explain why this is needed.
Origin symbols were used in full u-boot but with moving to distro boot
this was fixed already.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch adds distro boot commands for qspi, ospi and mmc.
The distro boot commands now reads the script from flash offset
of 63.5MB for qspi and ospi and executes it. For mmc its same
as generic distro boot command. As either one of the qspi or ospi can
exist on hardware, defined a single distroboot command as xspi
that works for both.
Setup default location via script_offset_f to 63.5MB to match the most
xilinx reference boards for qspi, ospi for now.
512kB allocated space for script size (script_size_f) should be more
than enough to cover custom boot logic.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch adds new mini target for versal.
This configuration is very minimal in size which runs
from OCM. It contains support for mtest which can be
used for running DDR memory tests.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch adds new mini configuration for Versal
which has only ospi enabled. This mini configration
is required to run u-boot from on chip memory with
ospi support.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch adds new mini configuration for Versal
which has only qspi enabled. This mini configration
is required to run u-boot from on chip memory with
qspi support. This patch also adds all supported qspi
configurations for this mini version.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch adds support for OSPI driver to Versal platforms.
It uses cadence qspi driver with octal support and defines
DMA hooks that are required for performing DMA read operations.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch adds Octal read support by setting the octal instruction
type in the read instruction register if controller supports it.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch supports page programming using STIG write. This is needed
if controller support only STIG writes for page program instead of
regular indirect write support. So, this patch gets the controller
capability from dt using "cdns,is-stig-pgm" property. This patch also
modifies stig write routine to support for page programming.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch adds support for DMA read operation if controller
supports it which is determined by reading DT property "cdns,is-dma".
This patch provides hooks for vendor specific DMA routines as the
cadence qspi controller supports external DMA which is vendor specific.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch adds support for Micron OSPI flash device MT35Xl512.
This device supports Octal Read commands along with regular
SPI and Quad commands.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
