global: Migrate CONFIG_PME_PLAT_CLK_DIV to CFG
Perform a simple rename of CONFIG_PME_PLAT_CLK_DIV to CFG_PME_PLAT_CLK_DIV Signed-off-by: Tom Rini <trini@konsulko.com>
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@@ -67,7 +67,7 @@ void get_sys_info(sys_info_t *sys_info)
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[14] = 4, /* CC4 PPL / 4 */
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};
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uint i, freq_c_pll[CONFIG_SYS_FSL_NUM_CC_PLLS];
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#if !defined(CFG_FM_PLAT_CLK_DIV) || !defined(CONFIG_PME_PLAT_CLK_DIV)
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#if !defined(CFG_FM_PLAT_CLK_DIV) || !defined(CFG_PME_PLAT_CLK_DIV)
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uint rcw_tmp;
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#endif
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uint ratio[CONFIG_SYS_FSL_NUM_CC_PLLS];
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@@ -206,7 +206,7 @@ void get_sys_info(sys_info_t *sys_info)
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#define FM1_CLK_SEL 0x1c000000
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#define FM1_CLK_SHIFT 26
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#endif
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#if !defined(CFG_FM_PLAT_CLK_DIV) || !defined(CONFIG_PME_PLAT_CLK_DIV)
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#if !defined(CFG_FM_PLAT_CLK_DIV) || !defined(CFG_PME_PLAT_CLK_DIV)
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#if defined(CONFIG_ARCH_T1024)
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rcw_tmp = in_be32(&gur->rcwsr[15]) - 4;
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#else
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@@ -215,7 +215,7 @@ void get_sys_info(sys_info_t *sys_info)
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#endif
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#ifdef CONFIG_SYS_DPAA_PME
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#ifndef CONFIG_PME_PLAT_CLK_DIV
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#ifndef CFG_PME_PLAT_CLK_DIV
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switch ((rcw_tmp & PME_CLK_SEL) >> PME_CLK_SHIFT) {
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case 1:
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sys_info->freq_pme = freq_c_pll[CFG_SYS_PME_CLK];
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@@ -144,8 +144,8 @@
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#define CONFIG_SYS_FSL_SRDS_1
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#define CFG_SYS_NUM_FMAN 1
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#define CFG_SYS_NUM_FM1_DTSEC 5
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#define CONFIG_PME_PLAT_CLK_DIV 2
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#define CFG_SYS_PME_CLK CONFIG_PME_PLAT_CLK_DIV
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#define CFG_PME_PLAT_CLK_DIV 2
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#define CFG_SYS_PME_CLK CFG_PME_PLAT_CLK_DIV
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#define CONFIG_SYS_FSL_IFC_BANK_COUNT 8
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#define CFG_FM_PLAT_CLK_DIV 1
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#define CFG_SYS_FM1_CLK CFG_FM_PLAT_CLK_DIV
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@@ -182,8 +182,8 @@
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#define CFG_SYS_FSL_SRIO_OB_WIN_NUM 9
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#define CFG_SYS_FSL_SRIO_IB_WIN_NUM 5
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#endif
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#define CONFIG_PME_PLAT_CLK_DIV 1
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#define CFG_SYS_PME_CLK CONFIG_PME_PLAT_CLK_DIV
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#define CFG_PME_PLAT_CLK_DIV 1
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#define CFG_SYS_PME_CLK CFG_PME_PLAT_CLK_DIV
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#define CFG_SYS_FM1_CLK 0
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#define CONFIG_SYS_FSL_IFC_BANK_COUNT 8
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#define CFG_SYS_FM_MURAM_SIZE 0x28000
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