global: Migrate CONFIG_PL01x_PORTS to CFG
Perform a simple rename of CONFIG_PL01x_PORTS to CFG_PL01x_PORTS Signed-off-by: Tom Rini <trini@konsulko.com>
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@ -418,7 +418,7 @@ The following options need to be configured:
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If you have Amba PrimeCell PL011 UARTs, set this variable to
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the clock speed of the UARTs.
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CONFIG_PL01x_PORTS
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CFG_PL01x_PORTS
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If you have Amba PrimeCell PL010 or PL011 UARTs on your board,
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define this to a list of base addresses for each (supported)
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@ -29,7 +29,7 @@ DECLARE_GLOBAL_DATA_PTR;
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#ifndef CONFIG_DM_SERIAL
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static volatile unsigned char *const port[] = CONFIG_PL01x_PORTS;
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static volatile unsigned char *const port[] = CFG_PL01x_PORTS;
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static enum pl01x_type pl01x_type __section(".data");
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static struct pl01x_regs *base_regs __section(".data");
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#define NUM_PORTS (sizeof(port)/sizeof(port[0]))
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@ -45,7 +45,7 @@
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#define CFG_SYS_SERIAL2 0x21e0000
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#define CFG_SYS_SERIAL3 0x21f0000
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/*below might needs to be removed*/
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#define CONFIG_PL01x_PORTS {(void *)CFG_SYS_SERIAL0, \
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#define CFG_PL01x_PORTS {(void *)CFG_SYS_SERIAL0, \
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(void *)CFG_SYS_SERIAL1, \
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(void *)CFG_SYS_SERIAL2, \
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(void *)CFG_SYS_SERIAL3 }
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@ -78,7 +78,7 @@
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* Conflicts with AUART driver which can be set by board.
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*/
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#define CFG_PL011_CLOCK 24000000
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#define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE }
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#define CFG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE }
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/* Default baudrate can be overridden by board! */
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/* NAND */
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@ -77,7 +77,7 @@
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* serial console configuration
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*/
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#define CFG_PL011_CLOCK 50000000
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#define CONFIG_PL01x_PORTS {(void *)PHY_BASEADDR_UART0, \
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#define CFG_PL01x_PORTS {(void *)PHY_BASEADDR_UART0, \
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(void *)PHY_BASEADDR_UART1, \
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(void *)PHY_BASEADDR_UART2, \
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(void *)PHY_BASEADDR_UART3}
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@ -32,7 +32,7 @@
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/* Serial (pl011) */
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#define UART_CLK (62500000)
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#define CFG_PL011_CLOCK UART_CLK
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#define CONFIG_PL01x_PORTS {(void *)(0x2a400000)}
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#define CFG_PL01x_PORTS {(void *)(0x2a400000)}
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/* Support MTD */
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#define CFG_SYS_FLASH_BASE (0x08000000)
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@ -117,7 +117,7 @@
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/* PL011 Serial Configuration */
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#define CFG_PL011_CLOCK 24000000
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#define CONFIG_PL01x_PORTS {(void *)CFG_SYS_SERIAL0, \
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#define CFG_PL01x_PORTS {(void *)CFG_SYS_SERIAL0, \
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(void *)CFG_SYS_SERIAL1}
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#define CFG_SYS_SERIAL0 V2M_UART0
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