arm64: dts: k3: Add u-boot specific nodes
Add the minimum dt nodes required to boot. These nodes will get deleted as kernel gets these nodes added in the main dts files. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
This commit is contained in:
Lokesh Vutla
Tom Rini
parent
ea8ad1d9b6
commit
853f7f5018
203
arch/arm/dts/k3-am654-base-board-u-boot.dtsi
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203
arch/arm/dts/k3-am654-base-board-u-boot.dtsi
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
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*/
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#include <dt-bindings/pinctrl/k3-am65.h>
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/ {
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chosen {
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stdout-path = "serial2:115200n8";
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};
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aliases {
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serial2 = &main_uart0;
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};
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};
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&cbass_main{
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u-boot,dm-spl;
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secure_proxy: secure_proxy@32c00000 {
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compatible = "ti,am654-secure-proxy";
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#mbox-cells = <1>;
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reg-names = "target_data", "rt", "scfg";
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reg = <0x32c00000 0x100000>,
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<0x32400000 0x100000>,
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<0x32800000 0x100000>;
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interrupt-names = "rx_011";
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interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
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};
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dmsc: dmsc {
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compatible = "ti,k2g-sci";
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ti,host-id = <12>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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/*
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* In case of rare platforms that does not use am6 as
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* system master, use /delete-property/
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*/
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ti,system-reboot-controller;
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mbox-names = "rx", "tx";
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mboxes= <&secure_proxy 11>,
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<&secure_proxy 13>;
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k3_pds: power-controller {
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compatible = "ti,sci-pm-domain";
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#power-domain-cells = <1>;
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};
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k3_clks: clocks {
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compatible = "ti,k2g-sci-clk";
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#clock-cells = <2>;
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};
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k3_reset: reset-controller {
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compatible = "ti,sci-reset";
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#reset-cells = <2>;
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};
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k3_sysreset: sysreset-controller {
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compatible = "ti,sci-sysreset";
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};
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};
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main_pmx0: pinmux@11c000 {
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compatible = "pinctrl-single";
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reg = <0x11c000 0x2e4>;
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#pinctrl-cells = <1>;
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pinctrl-single,register-width = <32>;
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pinctrl-single,function-mask = <0xffffffff>;
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};
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main_pmx1: pinmux@11c2e8 {
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compatible = "pinctrl-single";
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reg = <0x11c2e8 0x24>;
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#pinctrl-cells = <1>;
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pinctrl-single,register-width = <32>;
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pinctrl-single,function-mask = <0xffffffff>;
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};
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main_uart0: serial@2800000 {
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compatible = "ti,am654-uart", "ti,omap4-uart", "ns16550a";
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reg = <0x02800000 0x100>;
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reg-shift = <2>;
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reg-io-width = <4>;
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interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
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clock-frequency = <48000000>;
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current-speed = <115200>;
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status = "disabled";
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u-boot,dm-pre-reloc;
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};
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sdhci0: sdhci@04F80000 {
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compatible = "arasan,sdhci-5.1";
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reg = <0x4F80000 0x1000>,
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<0x4F90000 0x400>;
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clocks = <&k3_clks 47 1>;
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power-domains = <&k3_pds 47>;
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max-frequency = <25000000>;
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};
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sdhci1: sdhci@04FA0000 {
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compatible = "arasan,sdhci-5.1";
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reg = <0x4FA0000 0x1000>,
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<0x4FB0000 0x400>;
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clocks = <&k3_clks 48 1>;
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power-domains = <&k3_pds 48>;
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max-frequency = <25000000>;
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};
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};
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&secure_proxy {
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u-boot,dm-spl;
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};
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&dmsc {
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u-boot,dm-spl;
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};
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&k3_pds {
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u-boot,dm-spl;
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};
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&k3_clks {
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u-boot,dm-spl;
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};
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&k3_reset {
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u-boot,dm-spl;
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};
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&main_pmx0 {
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u-boot,dm-spl;
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main_uart0_pins_default: main_uart0_pins_default {
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pinctrl-single,pins = <
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AM65X_IOPAD(0x01e4, PIN_INPUT | MUX_MODE0) /* (AF11) UART0_RXD */
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AM65X_IOPAD(0x01e8, PIN_OUTPUT | MUX_MODE0) /* (AE11) UART0_TXD */
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AM65X_IOPAD(0x01ec, PIN_INPUT | MUX_MODE0) /* (AG11) UART0_CTSn */
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AM65X_IOPAD(0x01f0, PIN_OUTPUT | MUX_MODE0) /* (AD11) UART0_RTSn */
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>;
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};
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main_mmc0_pins_default: main_mmc0_pins_default {
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pinctrl-single,pins = <
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AM65X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN | MUX_MODE0) /* (B25) MMC0_CLK */
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AM65X_IOPAD(0x01aC, PIN_INPUT_PULLUP | MUX_MODE0) /* (B27) MMC0_CMD */
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AM65X_IOPAD(0x01a4, PIN_INPUT_PULLUP | MUX_MODE0) /* (A26) MMC0_DAT0 */
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AM65X_IOPAD(0x01a0, PIN_INPUT_PULLUP | MUX_MODE0) /* (E25) MMC0_DAT1 */
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AM65X_IOPAD(0x019c, PIN_INPUT_PULLUP | MUX_MODE0) /* (C26) MMC0_DAT2 */
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AM65X_IOPAD(0x0198, PIN_INPUT_PULLUP | MUX_MODE0) /* (A25) MMC0_DAT3 */
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AM65X_IOPAD(0x0194, PIN_INPUT_PULLUP | MUX_MODE0) /* (E24) MMC0_DAT4 */
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AM65X_IOPAD(0x0190, PIN_INPUT_PULLUP | MUX_MODE0) /* (A24) MMC0_DAT5 */
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AM65X_IOPAD(0x018c, PIN_INPUT_PULLUP | MUX_MODE0) /* (B26) MMC0_DAT6 */
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AM65X_IOPAD(0x0188, PIN_INPUT_PULLUP | MUX_MODE0) /* (D25) MMC0_DAT7 */
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AM65X_IOPAD(0x01b0, PIN_INPUT | MUX_MODE0) /* (C25) MMC0_DS */
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>;
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};
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main_mmc1_pins_default: main_mmc1_pins_default {
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pinctrl-single,pins = <
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AM65X_IOPAD(0x02d4, PIN_INPUT_PULLDOWN | MUX_MODE0) /* (C27) MMC1_CLK */
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AM65X_IOPAD(0x02d8, PIN_INPUT_PULLUP | MUX_MODE0) /* (C28) MMC1_CMD */
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AM65X_IOPAD(0x02d0, PIN_INPUT_PULLUP | MUX_MODE0) /* (D28) MMC1_DAT0 */
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AM65X_IOPAD(0x02cc, PIN_INPUT_PULLUP | MUX_MODE0) /* (E27) MMC1_DAT1 */
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AM65X_IOPAD(0x02c8, PIN_INPUT_PULLUP | MUX_MODE0) /* (D26) MMC1_DAT2 */
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AM65X_IOPAD(0x02c4, PIN_INPUT_PULLUP | MUX_MODE0) /* (D27) MMC1_DAT3 */
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AM65X_IOPAD(0x02dc, PIN_INPUT_PULLUP | MUX_MODE0) /* (B24) MMC1_SDCD */
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AM65X_IOPAD(0x02e0, PIN_INPUT | MUX_MODE0) /* (C24) MMC1_SDWP */
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>;
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};
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};
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&main_pmx1 {
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u-boot,dm-spl;
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};
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&main_uart0 {
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u-boot,dm-spl;
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pinctrl-names = "default";
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pinctrl-0 = <&main_uart0_pins_default>;
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status = "okay";
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};
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&sdhci0 {
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u-boot,dm-spl;
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status = "okay";
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non-removable;
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bus-width = <8>;
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pinctrl-names = "default";
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pinctrl-0 = <&main_mmc0_pins_default>;
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};
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&sdhci1 {
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u-boot,dm-spl;
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&main_mmc1_pins_default>;
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sdhci-caps-mask = <0x7 0x0>;
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};
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49
include/dt-bindings/pinctrl/k3-am65.h
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include/dt-bindings/pinctrl/k3-am65.h
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* This header provides constants for TI K3-AM65 pinctrl bindings.
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*
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* Copyright (C) 2018 Texas Instruments
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*/
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#ifndef _DT_BINDINGS_PINCTRL_TI_K3_AM65_H
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#define _DT_BINDINGS_PINCTRL_TI_K3_AM65_H
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/* K3 mux mode options for each pin. See TRM for options */
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#define MUX_MODE0 0
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#define MUX_MODE1 1
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#define MUX_MODE2 2
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#define MUX_MODE3 3
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#define MUX_MODE4 4
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#define MUX_MODE5 5
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#define MUX_MODE6 6
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#define MUX_MODE7 7
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#define MUX_MODE15 15
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#define PULL_DISABLE (1 << 16)
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#define PULL_UP (1 << 17)
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#define INPUT_EN (1 << 18)
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#define SLEWCTRL_200MHZ 0
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#define SLEWCTRL_150MHZ (1 << 19)
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#define SLEWCTRL_100MHZ (2 << 19)
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#define SLEWCTRL_50MHZ (3 << 19)
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#define TX_DIS (1 << 21)
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#define ISO_OVR (1 << 22)
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#define ISO_BYPASS (1 << 23)
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#define DS_EN (1 << 24)
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#define DS_INPUT (1 << 25)
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#define DS_FORCE_OUT_HIGH (1 << 26)
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#define DS_PULL_UP_DOWN_EN 0
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#define DS_PULL_UP_DOWN_DIS (1 << 27)
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#define DS_PULL_UP_SEL (1 << 28)
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#define WAKEUP_ENABLE (1 << 29)
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#define PIN_OUTPUT (PULL_DISABLE)
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#define PIN_OUTPUT_PULLUP (PULL_UP)
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#define PIN_OUTPUT_PULLDOWN 0
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#define PIN_INPUT (INPUT_EN | PULL_DISABLE)
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#define PIN_INPUT_PULLUP (INPUT_EN | PULL_UP)
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#define PIN_INPUT_PULLDOWN (INPUT_EN)
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#define AM65X_IOPAD(pa, val) (((pa) & 0x1fff)) (val)
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#define AM65X_WKUP_IOPAD(pa, val) (((pa) & 0x1fff)) (val)
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#endif
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