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Merge branch 'master' into next

Browse Source 
Merge in v2022.07-rc5.
This commit is contained in:
Tom Rini
2022-06-20 14:40:59 -04:00
parent 78533a1ce8 568a226f87
commit 52af0101be
86 changed files with 2052 additions and 217 deletions
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6
drivers/cache/cache-ncore.c vendored
View File

@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2019 Intel Corporation <www.intel.com>
* Copyright (C) 2019-2022 Intel Corporation <www.intel.com>
*
*/
#include <dm.h>
@@ -81,8 +81,8 @@ static void ncore_ccu_init_dirs(void __iomem *base)
hang();
}
/* Enable snoop filter, a bit per snoop filter */
setbits_le32((ulong)CCU_DIR_REG_ADDR(base, DIRUSFER, i),
/* Disable snoop filter, a bit per snoop filter */
clrbits_le32((ulong)CCU_DIR_REG_ADDR(base, DIRUSFER, i),
BIT(f));
}
}

8
drivers/clk/imx/clk-imx8mp.c
View File

@@ -122,15 +122,15 @@ static const char *imx8mp_gic_sels[] = {"clock-osc-24m", "sys_pll2_200m", "sys_p
"sys_pll2_100m", "sys_pll1_800m",
"sys_pll2_500m", "clk_ext4", "audio_pll2_out" };
static const char *imx8mp_ecspi1_sels[] = {"clock-osc_24m", "sys_pll2_200m", "sys_pll1_40m",
static const char *imx8mp_ecspi1_sels[] = {"clock-osc-24m", "sys_pll2_200m", "sys_pll1_40m",
"sys_pll1_160m", "sys_pll1_800m", "sys_pll3_out",
"sys_pll2_250m", "audio_pll2_out", };
static const char *imx8mp_ecspi2_sels[] = {"clock-osc_24m", "sys_pll2_200m", "sys_pll1_40m",
static const char *imx8mp_ecspi2_sels[] = {"clock-osc-24m", "sys_pll2_200m", "sys_pll1_40m",
"sys_pll1_160m", "sys_pll1_800m", "sys_pll3_out",
"sys_pll2_250m", "audio_pll2_out", };
static const char *imx8mp_ecspi3_sels[] = {"clock-osc_24m", "sys_pll2_200m", "sys_pll1_40m",
static const char *imx8mp_ecspi3_sels[] = {"clock-osc-24m", "sys_pll2_200m", "sys_pll1_40m",
"sys_pll1_160m", "sys_pll1_800m", "sys_pll3_out",
"sys_pll2_250m", "audio_pll2_out", };
@@ -300,7 +300,7 @@ static int imx8mp_clk_probe(struct udevice *dev)
clk_dm(IMX8MP_CLK_UART2_ROOT, imx_clk_gate4("uart2_root_clk", "uart2", base + 0x44a0, 0));
clk_dm(IMX8MP_CLK_UART3_ROOT, imx_clk_gate4("uart3_root_clk", "uart3", base + 0x44b0, 0));
clk_dm(IMX8MP_CLK_UART4_ROOT, imx_clk_gate4("uart4_root_clk", "uart4", base + 0x44c0, 0));
clk_dm(IMX8MP_CLK_USB_ROOT, imx_clk_gate4("usb_root_clk", "osc_32k", base + 0x44d0, 0));
clk_dm(IMX8MP_CLK_USB_ROOT, imx_clk_gate4("usb_root_clk", "usb_core_ref", base + 0x44d0, 0));
clk_dm(IMX8MP_CLK_USB_PHY_ROOT, imx_clk_gate4("usb_phy_root_clk", "usb_phy_ref", base + 0x44f0, 0));
clk_dm(IMX8MP_CLK_USDHC1_ROOT, imx_clk_gate4("usdhc1_root_clk", "usdhc1", base + 0x4510, 0));
clk_dm(IMX8MP_CLK_USDHC2_ROOT, imx_clk_gate4("usdhc2_root_clk", "usdhc2", base + 0x4520, 0));

6
drivers/crypto/fsl/fsl_hash.c
View File

@@ -176,12 +176,6 @@ int caam_hash(const unsigned char *pbuf, unsigned int buf_len,
uint32_t *desc;
unsigned int size;
if (!IS_ALIGNED((uintptr_t)pbuf, ARCH_DMA_MINALIGN) ||
!IS_ALIGNED((uintptr_t)pout, ARCH_DMA_MINALIGN)) {
puts("Error: Address arguments are not aligned\n");
return -EINVAL;
}
desc = malloc_cache_aligned(sizeof(int) * MAX_CAAM_DESCSIZE);
if (!desc) {
debug("Not enough memory for descriptor allocation\n");

4
drivers/ddr/altera/sdram_n5x.c
View File

@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
/*
* Copyright (C) 2020-2021 Intel Corporation <www.intel.com>
* Copyright (C) 2020-2022 Intel Corporation <www.intel.com>
*
*/

4
drivers/ddr/altera/sdram_s10.c
View File

@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2016-2018 Intel Corporation <www.intel.com>
* Copyright (C) 2016-2022 Intel Corporation <www.intel.com>
*
*/
@@ -277,7 +277,7 @@ int sdram_mmr_init_full(struct udevice *dev)
DDR_SCH_DEVTODEV);
/* assigning the SDRAM size */
unsigned long long size = sdram_calculate_size(plat);
phys_size_t size = sdram_calculate_size(plat);
/* If the size is invalid, use default Config size */
if (size <= 0)
hw_size = PHYS_SDRAM_1_SIZE;

5
drivers/ddr/altera/sdram_soc64.c
View File

@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2016-2021 Intel Corporation <www.intel.com>
* Copyright (C) 2016-2022 Intel Corporation <www.intel.com>
*
*/
@@ -239,7 +239,8 @@ phys_size_t sdram_calculate_size(struct altera_sdram_plat *plat)
{
u32 dramaddrw = hmc_readl(plat, DRAMADDRW);
phys_size_t size = 1 << (DRAMADDRW_CFG_CS_ADDR_WIDTH(dramaddrw) +
phys_size_t size = (phys_size_t)1 <<
(DRAMADDRW_CFG_CS_ADDR_WIDTH(dramaddrw) +
DRAMADDRW_CFG_BANK_GRP_ADDR_WIDTH(dramaddrw) +
DRAMADDRW_CFG_BANK_ADDR_WIDTH(dramaddrw) +
DRAMADDRW_CFG_ROW_ADDR_WIDTH(dramaddrw) +

2
drivers/ddr/altera/sdram_soc64.h
View File

@@ -53,7 +53,7 @@ struct altera_sdram_plat {
#define DDR_HMC_INTSTAT_DERRPENA_SET_MSK BIT(1)
#define DDR_HMC_INTSTAT_ADDRMTCFLG_SET_MSK BIT(16)
#define DDR_HMC_INTMODE_INTMODE_SET_MSK BIT(0)
#define DDR_HMC_RSTHANDSHAKE_MASK 0x000000ff
#define DDR_HMC_RSTHANDSHAKE_MASK 0x0000000f
#define DDR_HMC_CORE2SEQ_INT_REQ 0xF
#define DDR_HMC_SEQ2CORE_INT_RESP_MASK BIT(3)
#define DDR_HMC_HPSINTFCSEL_ENABLE_MASK 0x001f1f1f

1
drivers/i2c/tegra_i2c.c
View File

@@ -514,6 +514,7 @@ static const struct dm_i2c_ops tegra_i2c_ops = {
static const struct udevice_id tegra_i2c_ids[] = {
{ .compatible = "nvidia,tegra114-i2c", .data = TYPE_114 },
{ .compatible = "nvidia,tegra124-i2c", .data = TYPE_114 },
{ .compatible = "nvidia,tegra20-i2c", .data = TYPE_STD },
{ .compatible = "nvidia,tegra20-i2c-dvc", .data = TYPE_DVC },
{ }

9
drivers/misc/Kconfig
View File

@@ -439,6 +439,15 @@ config TEST_DRV
model. This should only be enabled for testing as it is not useful for
anything else.
config USB_HUB_USB251XB
tristate "USB251XB Hub Controller Configuration Driver"
depends on I2C
help
This option enables support for configuration via SMBus of the
Microchip USB251x/xBi USB 2.0 Hub Controller series. Configuration
parameters may be set in devicetree or platform data.
Say Y or M here if you need to configure such a device via SMBus.
config TWL4030_LED
bool "Enable TWL4030 LED controller"
help

1
drivers/misc/Makefile
View File

@@ -21,6 +21,7 @@ endif
ifdef CONFIG_$(SPL_)DM_I2C
ifndef CONFIG_SPL_BUILD
obj-$(CONFIG_SANDBOX) += i2c_eeprom_emul.o
obj-$(CONFIG_USB_HUB_USB251XB) += usb251xb.o
endif
endif
ifdef CONFIG_SPL_OF_PLATDATA

605
drivers/misc/usb251xb.c Normal file
View File

@@ -0,0 +1,605 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Driver for Microchip USB251xB USB 2.0 Hi-Speed Hub Controller
* Configuration via SMBus.
*
* Copyright (c) 2017 SKIDATA AG
*
* This work is based on the USB3503 driver by Dongjin Kim and
* a not-accepted patch by Fabien Lahoudere, see:
* https://patchwork.kernel.org/patch/9257715/
*/
#include <common.h>
#include <asm/gpio.h>
#include <dm.h>
#include <dm/device_compat.h>
#include <errno.h>
#include <i2c.h>
#include <linux/delay.h>
#include <linux/utf.h>
#include <power/regulator.h>
/* Internal Register Set Addresses & Default Values acc. to DS00001692C */
#define USB251XB_ADDR_VENDOR_ID_LSB 0x00
#define USB251XB_ADDR_VENDOR_ID_MSB 0x01
#define USB251XB_DEF_VENDOR_ID 0x0424
#define USB251XB_ADDR_PRODUCT_ID_LSB 0x02
#define USB251XB_ADDR_PRODUCT_ID_MSB 0x03
#define USB251XB_ADDR_DEVICE_ID_LSB 0x04
#define USB251XB_ADDR_DEVICE_ID_MSB 0x05
#define USB251XB_DEF_DEVICE_ID 0x0BB3
#define USB251XB_ADDR_CONFIG_DATA_1 0x06
#define USB251XB_DEF_CONFIG_DATA_1 0x9B
#define USB251XB_ADDR_CONFIG_DATA_2 0x07
#define USB251XB_DEF_CONFIG_DATA_2 0x20
#define USB251XB_ADDR_CONFIG_DATA_3 0x08
#define USB251XB_DEF_CONFIG_DATA_3 0x02
#define USB251XB_ADDR_NON_REMOVABLE_DEVICES 0x09
#define USB251XB_DEF_NON_REMOVABLE_DEVICES 0x00
#define USB251XB_ADDR_PORT_DISABLE_SELF 0x0A
#define USB251XB_DEF_PORT_DISABLE_SELF 0x00
#define USB251XB_ADDR_PORT_DISABLE_BUS 0x0B
#define USB251XB_DEF_PORT_DISABLE_BUS 0x00
#define USB251XB_ADDR_MAX_POWER_SELF 0x0C
#define USB251XB_DEF_MAX_POWER_SELF 0x01
#define USB251XB_ADDR_MAX_POWER_BUS 0x0D
#define USB251XB_DEF_MAX_POWER_BUS 0x32
#define USB251XB_ADDR_MAX_CURRENT_SELF 0x0E
#define USB251XB_DEF_MAX_CURRENT_SELF 0x01
#define USB251XB_ADDR_MAX_CURRENT_BUS 0x0F
#define USB251XB_DEF_MAX_CURRENT_BUS 0x32
#define USB251XB_ADDR_POWER_ON_TIME 0x10
#define USB251XB_DEF_POWER_ON_TIME 0x32
#define USB251XB_ADDR_LANGUAGE_ID_HIGH 0x11
#define USB251XB_ADDR_LANGUAGE_ID_LOW 0x12
#define USB251XB_DEF_LANGUAGE_ID 0x0000
#define USB251XB_STRING_BUFSIZE 62
#define USB251XB_ADDR_MANUFACTURER_STRING_LEN 0x13
#define USB251XB_ADDR_MANUFACTURER_STRING 0x16
#define USB251XB_DEF_MANUFACTURER_STRING "Microchip"
#define USB251XB_ADDR_PRODUCT_STRING_LEN 0x14
#define USB251XB_ADDR_PRODUCT_STRING 0x54
#define USB251XB_ADDR_SERIAL_STRING_LEN 0x15
#define USB251XB_ADDR_SERIAL_STRING 0x92
#define USB251XB_DEF_SERIAL_STRING ""
#define USB251XB_ADDR_BATTERY_CHARGING_ENABLE 0xD0
#define USB251XB_DEF_BATTERY_CHARGING_ENABLE 0x00
#define USB251XB_ADDR_BOOST_UP 0xF6
#define USB251XB_DEF_BOOST_UP 0x00
#define USB251XB_ADDR_BOOST_57 0xF7
#define USB251XB_DEF_BOOST_57 0x00
#define USB251XB_ADDR_BOOST_14 0xF8
#define USB251XB_DEF_BOOST_14 0x00
#define USB251XB_ADDR_PORT_SWAP 0xFA
#define USB251XB_DEF_PORT_SWAP 0x00
#define USB251XB_ADDR_PORT_MAP_12 0xFB
#define USB251XB_DEF_PORT_MAP_12 0x00
#define USB251XB_ADDR_PORT_MAP_34 0xFC
#define USB251XB_DEF_PORT_MAP_34 0x00 /* USB251{3B/i,4B/i,7/i} only */
#define USB251XB_ADDR_PORT_MAP_56 0xFD
#define USB251XB_DEF_PORT_MAP_56 0x00 /* USB2517/i only */
#define USB251XB_ADDR_PORT_MAP_7 0xFE
#define USB251XB_DEF_PORT_MAP_7 0x00 /* USB2517/i only */
#define USB251XB_ADDR_STATUS_COMMAND 0xFF
#define USB251XB_STATUS_COMMAND_SMBUS_DOWN 0x04
#define USB251XB_STATUS_COMMAND_RESET 0x02
#define USB251XB_STATUS_COMMAND_ATTACH 0x01
#define USB251XB_I2C_REG_SZ 0x100
#define USB251XB_I2C_WRITE_SZ 0x10
#define DRIVER_NAME "usb251xb"
#define DRIVER_DESC "Microchip USB 2.0 Hi-Speed Hub Controller"
struct usb251xb {
struct device *dev;
struct i2c_client *i2c;
struct udevice *vdd;
u8 skip_config;
struct gpio_desc gpio_reset;
u32 vendor_id;
u32 product_id;
u32 device_id;
u8 conf_data1;
u8 conf_data2;
u8 conf_data3;
u8 non_rem_dev;
u8 port_disable_sp;
u8 port_disable_bp;
u8 max_power_sp;
u8 max_power_bp;
u8 max_current_sp;
u8 max_current_bp;
u8 power_on_time;
u32 lang_id;
u8 manufacturer_len;
u8 product_len;
u8 serial_len;
s16 manufacturer[USB251XB_STRING_BUFSIZE];
s16 product[USB251XB_STRING_BUFSIZE];
s16 serial[USB251XB_STRING_BUFSIZE];
u8 bat_charge_en;
u32 boost_up;
u8 boost_57;
u8 boost_14;
u8 port_swap;
u8 port_map12;
u8 port_map34;
u8 port_map56;
u8 port_map7;
u8 status;
};
struct usb251xb_data {
u16 product_id;
u8 port_cnt;
bool led_support;
bool bat_support;
char product_str[USB251XB_STRING_BUFSIZE / 2]; /* ASCII string */
};
static const struct usb251xb_data usb2422_data = {
.product_id = 0x2422,
.port_cnt = 2,
.led_support = false,
.bat_support = true,
.product_str = "USB2422",
};
static const struct usb251xb_data usb2512b_data = {
.product_id = 0x2512,
.port_cnt = 2,
.led_support = false,
.bat_support = true,
.product_str = "USB2512B",
};
static const struct usb251xb_data usb2512bi_data = {
.product_id = 0x2512,
.port_cnt = 2,
.led_support = false,
.bat_support = true,
.product_str = "USB2512Bi",
};
static const struct usb251xb_data usb2513b_data = {
.product_id = 0x2513,
.port_cnt = 3,
.led_support = false,
.bat_support = true,
.product_str = "USB2513B",
};
static const struct usb251xb_data usb2513bi_data = {
.product_id = 0x2513,
.port_cnt = 3,
.led_support = false,
.bat_support = true,
.product_str = "USB2513Bi",
};
static const struct usb251xb_data usb2514b_data = {
.product_id = 0x2514,
.port_cnt = 4,
.led_support = false,
.bat_support = true,
.product_str = "USB2514B",
};
static const struct usb251xb_data usb2514bi_data = {
.product_id = 0x2514,
.port_cnt = 4,
.led_support = false,
.bat_support = true,
.product_str = "USB2514Bi",
};
static const struct usb251xb_data usb2517_data = {
.product_id = 0x2517,
.port_cnt = 7,
.led_support = true,
.bat_support = false,
.product_str = "USB2517",
};
static const struct usb251xb_data usb2517i_data = {
.product_id = 0x2517,
.port_cnt = 7,
.led_support = true,
.bat_support = false,
.product_str = "USB2517i",
};
static void usb251xb_reset(struct usb251xb *hub)
{
dm_gpio_set_value(&hub->gpio_reset, 1);
udelay(10); /* >=1us RESET_N asserted */
dm_gpio_set_value(&hub->gpio_reset, 0);
/* wait for hub recovery/stabilization */
udelay(750); /* >=500us after RESET_N deasserted */
}
static int usb251xb_connect(struct udevice *dev)
{
struct usb251xb *hub = dev_get_priv(dev);
char i2c_wb[USB251XB_I2C_REG_SZ];
int err, i;
memset(i2c_wb, 0, USB251XB_I2C_REG_SZ);
if (hub->skip_config) {
dev_info(dev, "Skip hub configuration, only attach.\n");
i2c_wb[0] = 0x01;
i2c_wb[1] = USB251XB_STATUS_COMMAND_ATTACH;
usb251xb_reset(hub);
err = dm_i2c_write(dev, USB251XB_ADDR_STATUS_COMMAND, i2c_wb, 2);
if (err) {
dev_err(dev, "attaching hub failed: %d\n", err);
return err;
}
return 0;
}
i2c_wb[USB251XB_ADDR_VENDOR_ID_MSB] = (hub->vendor_id >> 8) & 0xFF;
i2c_wb[USB251XB_ADDR_VENDOR_ID_LSB] = hub->vendor_id & 0xFF;
i2c_wb[USB251XB_ADDR_PRODUCT_ID_MSB] = (hub->product_id >> 8) & 0xFF;
i2c_wb[USB251XB_ADDR_PRODUCT_ID_LSB] = hub->product_id & 0xFF;
i2c_wb[USB251XB_ADDR_DEVICE_ID_MSB] = (hub->device_id >> 8) & 0xFF;
i2c_wb[USB251XB_ADDR_DEVICE_ID_LSB] = hub->device_id & 0xFF;
i2c_wb[USB251XB_ADDR_CONFIG_DATA_1] = hub->conf_data1;
i2c_wb[USB251XB_ADDR_CONFIG_DATA_2] = hub->conf_data2;
i2c_wb[USB251XB_ADDR_CONFIG_DATA_3] = hub->conf_data3;
i2c_wb[USB251XB_ADDR_NON_REMOVABLE_DEVICES] = hub->non_rem_dev;
i2c_wb[USB251XB_ADDR_PORT_DISABLE_SELF] = hub->port_disable_sp;
i2c_wb[USB251XB_ADDR_PORT_DISABLE_BUS] = hub->port_disable_bp;
i2c_wb[USB251XB_ADDR_MAX_POWER_SELF] = hub->max_power_sp;
i2c_wb[USB251XB_ADDR_MAX_POWER_BUS] = hub->max_power_bp;
i2c_wb[USB251XB_ADDR_MAX_CURRENT_SELF] = hub->max_current_sp;
i2c_wb[USB251XB_ADDR_MAX_CURRENT_BUS] = hub->max_current_bp;
i2c_wb[USB251XB_ADDR_POWER_ON_TIME] = hub->power_on_time;
i2c_wb[USB251XB_ADDR_LANGUAGE_ID_HIGH] = (hub->lang_id >> 8) & 0xFF;
i2c_wb[USB251XB_ADDR_LANGUAGE_ID_LOW] = hub->lang_id & 0xFF;
i2c_wb[USB251XB_ADDR_MANUFACTURER_STRING_LEN] = hub->manufacturer_len;
i2c_wb[USB251XB_ADDR_PRODUCT_STRING_LEN] = hub->product_len;
i2c_wb[USB251XB_ADDR_SERIAL_STRING_LEN] = hub->serial_len;
memcpy(&i2c_wb[USB251XB_ADDR_MANUFACTURER_STRING], hub->manufacturer,
USB251XB_STRING_BUFSIZE);
memcpy(&i2c_wb[USB251XB_ADDR_SERIAL_STRING], hub->serial,
USB251XB_STRING_BUFSIZE);
memcpy(&i2c_wb[USB251XB_ADDR_PRODUCT_STRING], hub->product,
USB251XB_STRING_BUFSIZE);
i2c_wb[USB251XB_ADDR_BATTERY_CHARGING_ENABLE] = hub->bat_charge_en;
i2c_wb[USB251XB_ADDR_BOOST_UP] = hub->boost_up;
i2c_wb[USB251XB_ADDR_BOOST_57] = hub->boost_57;
i2c_wb[USB251XB_ADDR_BOOST_14] = hub->boost_14;
i2c_wb[USB251XB_ADDR_PORT_SWAP] = hub->port_swap;
i2c_wb[USB251XB_ADDR_PORT_MAP_12] = hub->port_map12;
i2c_wb[USB251XB_ADDR_PORT_MAP_34] = hub->port_map34;
i2c_wb[USB251XB_ADDR_PORT_MAP_56] = hub->port_map56;
i2c_wb[USB251XB_ADDR_PORT_MAP_7] = hub->port_map7;
i2c_wb[USB251XB_ADDR_STATUS_COMMAND] = USB251XB_STATUS_COMMAND_ATTACH;
usb251xb_reset(hub);
/* write registers */
for (i = 0; i < (USB251XB_I2C_REG_SZ / USB251XB_I2C_WRITE_SZ); i++) {
int offset = i * USB251XB_I2C_WRITE_SZ;
char wbuf[USB251XB_I2C_WRITE_SZ + 1];
/* The first data byte transferred tells the hub how many data
* bytes will follow (byte count).
*/
wbuf[0] = USB251XB_I2C_WRITE_SZ;
memcpy(&wbuf[1], &i2c_wb[offset], USB251XB_I2C_WRITE_SZ);
dev_dbg(dev, "writing %d byte block %d to 0x%02X\n",
USB251XB_I2C_WRITE_SZ, i, offset);
err = dm_i2c_write(dev, offset, wbuf, USB251XB_I2C_WRITE_SZ + 1);
if (err)
goto out_err;
}
dev_info(dev, "Hub configuration was successful.\n");
return 0;
out_err:
dev_err(dev, "configuring block %d failed: %d\n", i, err);
return err;
}
static int usb251xb_probe(struct udevice *dev)
{
struct usb251xb *hub = dev_get_priv(dev);
int err;
if (IS_ENABLED(CONFIG_DM_REGULATOR) && hub->vdd) {
err = regulator_set_enable(hub->vdd, true);
if (err)
return err;
}
err = usb251xb_connect(dev);
if (err) {
dev_err(dev, "Failed to connect hub (%d)\n", err);
return err;
}
dev_info(dev, "Hub probed successfully\n");
return 0;
}
static void usb251xb_get_ports_field(struct udevice *dev,
const char *prop_name, u8 port_cnt,
bool ds_only, u8 *fld)
{
u32 i, port;
int ret;
for (i = 0; i < port_cnt; i++) {
ret = dev_read_u32_index(dev, prop_name, i, &port);
if (ret)
continue;
if (port >= ds_only ? 1 : 0 && port <= port_cnt)
*fld |= BIT(port);
else
dev_warn(dev, "port %u doesn't exist\n", port);
}
}
static int usb251xb_of_to_plat(struct udevice *dev)
{
struct usb251xb_data *data =
(struct usb251xb_data *)dev_get_driver_data(dev);
struct usb251xb *hub = dev_get_priv(dev);
char str[USB251XB_STRING_BUFSIZE / 2];
const char *cproperty_char;
u32 property_u32 = 0;
int len, err;
if (dev_read_bool(dev, "skip-config"))
hub->skip_config = 1;
else
hub->skip_config = 0;
err = gpio_request_by_name(dev, "reset-gpios", 0, &hub->gpio_reset,
GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE);
if (err && err != -ENOENT) {
dev_err(dev, "unable to request GPIO reset pin (%d)\n", err);
return err;
}
if (IS_ENABLED(CONFIG_DM_REGULATOR)) {
err = device_get_supply_regulator(dev, "vdd-supply",
&hub->vdd);
if (err && err != -ENOENT) {
dev_err(dev, "Warning: cannot get power supply\n");
return err;
}
}
if (dev_read_u32(dev, "vendor-id", &hub->vendor_id))
hub->vendor_id = USB251XB_DEF_VENDOR_ID;
if (dev_read_u32(dev, "product-id", &hub->product_id))
hub->product_id = data->product_id;
if (dev_read_u32(dev, "device-id", &hub->device_id))
hub->device_id = USB251XB_DEF_DEVICE_ID;
hub->conf_data1 = USB251XB_DEF_CONFIG_DATA_1;
if (dev_read_bool(dev, "self-powered")) {
hub->conf_data1 |= BIT(7);
/* Configure Over-Current sens when self-powered */
hub->conf_data1 &= ~BIT(2);
if (dev_read_bool(dev, "ganged-sensing"))
hub->conf_data1 &= ~BIT(1);
else if (dev_read_bool(dev, "individual-sensing"))
hub->conf_data1 |= BIT(1);
} else if (dev_read_bool(dev, "bus-powered")) {
hub->conf_data1 &= ~BIT(7);
/* Disable Over-Current sense when bus-powered */
hub->conf_data1 |= BIT(2);
}
if (dev_read_bool(dev, "disable-hi-speed"))
hub->conf_data1 |= BIT(5);
if (dev_read_bool(dev, "multi-tt"))
hub->conf_data1 |= BIT(4);
else if (dev_read_bool(dev, "single-tt"))
hub->conf_data1 &= ~BIT(4);
if (dev_read_bool(dev, "disable-eop"))
hub->conf_data1 |= BIT(3);
if (dev_read_bool(dev, "individual-port-switching"))
hub->conf_data1 |= BIT(0);
else if (dev_read_bool(dev, "ganged-port-switching"))
hub->conf_data1 &= ~BIT(0);
hub->conf_data2 = USB251XB_DEF_CONFIG_DATA_2;
if (dev_read_bool(dev, "dynamic-power-switching"))
hub->conf_data2 |= BIT(7);
if (!dev_read_u32(dev, "oc-delay-us", &property_u32)) {
if (property_u32 == 100) {
/* 100 us*/
hub->conf_data2 &= ~BIT(5);
hub->conf_data2 &= ~BIT(4);
} else if (property_u32 == 4000) {
/* 4 ms */
hub->conf_data2 &= ~BIT(5);
hub->conf_data2 |= BIT(4);
} else if (property_u32 == 16000) {
/* 16 ms */
hub->conf_data2 |= BIT(5);
hub->conf_data2 |= BIT(4);
} else {
/* 8 ms (DEFAULT) */
hub->conf_data2 |= BIT(5);
hub->conf_data2 &= ~BIT(4);
}
}
if (dev_read_bool(dev, "compound-device"))
hub->conf_data2 |= BIT(3);
hub->conf_data3 = USB251XB_DEF_CONFIG_DATA_3;
if (dev_read_bool(dev, "port-mapping-mode"))
hub->conf_data3 |= BIT(3);
if (data->led_support && dev_read_bool(dev, "led-usb-mode"))
hub->conf_data3 &= ~BIT(1);
if (dev_read_bool(dev, "string-support"))
hub->conf_data3 |= BIT(0);
hub->non_rem_dev = USB251XB_DEF_NON_REMOVABLE_DEVICES;
usb251xb_get_ports_field(dev, "non-removable-ports", data->port_cnt,
true, &hub->non_rem_dev);
hub->port_disable_sp = USB251XB_DEF_PORT_DISABLE_SELF;
usb251xb_get_ports_field(dev, "sp-disabled-ports", data->port_cnt,
true, &hub->port_disable_sp);
hub->port_disable_bp = USB251XB_DEF_PORT_DISABLE_BUS;
usb251xb_get_ports_field(dev, "bp-disabled-ports", data->port_cnt,
true, &hub->port_disable_bp);
hub->max_power_sp = USB251XB_DEF_MAX_POWER_SELF;
if (!dev_read_u32(dev, "sp-max-total-current-microamp", &property_u32))
hub->max_power_sp = min_t(u8, property_u32 / 2000, 50);
hub->max_power_bp = USB251XB_DEF_MAX_POWER_BUS;
if (!dev_read_u32(dev, "bp-max-total-current-microamp", &property_u32))
hub->max_power_bp = min_t(u8, property_u32 / 2000, 255);
hub->max_current_sp = USB251XB_DEF_MAX_CURRENT_SELF;
if (!dev_read_u32(dev, "sp-max-removable-current-microamp",
&property_u32))
hub->max_current_sp = min_t(u8, property_u32 / 2000, 50);
hub->max_current_bp = USB251XB_DEF_MAX_CURRENT_BUS;
if (!dev_read_u32(dev, "bp-max-removable-current-microamp",
&property_u32))
hub->max_current_bp = min_t(u8, property_u32 / 2000, 255);
hub->power_on_time = USB251XB_DEF_POWER_ON_TIME;
if (!dev_read_u32(dev, "power-on-time-ms", &property_u32))
hub->power_on_time = min_t(u8, property_u32 / 2, 255);
if (dev_read_u32(dev, "language-id", &hub->lang_id))
hub->lang_id = USB251XB_DEF_LANGUAGE_ID;
if (!dev_read_u32(dev, "boost-up", &hub->boost_up))
hub->boost_up = USB251XB_DEF_BOOST_UP;
cproperty_char = dev_read_string(dev, "manufacturer");
strlcpy(str, cproperty_char ? : USB251XB_DEF_MANUFACTURER_STRING,
sizeof(str));
hub->manufacturer_len = strlen(str) & 0xFF;
memset(hub->manufacturer, 0, USB251XB_STRING_BUFSIZE);
len = min_t(size_t, USB251XB_STRING_BUFSIZE / 2, strlen(str));
len = utf8_to_utf16le(str, hub->manufacturer, len);
cproperty_char = dev_read_string(dev, "product");
strlcpy(str, cproperty_char ? : data->product_str, sizeof(str));
hub->product_len = strlen(str) & 0xFF;
memset(hub->product, 0, USB251XB_STRING_BUFSIZE);
len = min_t(size_t, USB251XB_STRING_BUFSIZE / 2, strlen(str));
len = utf8_to_utf16le(str, hub->product, len);
cproperty_char = dev_read_string(dev, "serial");
strlcpy(str, cproperty_char ? : USB251XB_DEF_SERIAL_STRING,
sizeof(str));
hub->serial_len = strlen(str) & 0xFF;
memset(hub->serial, 0, USB251XB_STRING_BUFSIZE);
len = min_t(size_t, USB251XB_STRING_BUFSIZE / 2, strlen(str));
len = utf8_to_utf16le(str, hub->serial, len);
/*
* The datasheet documents the register as 'Port Swap' but in real the
* register controls the USB DP/DM signal swapping for each port.
*/
hub->port_swap = USB251XB_DEF_PORT_SWAP;
usb251xb_get_ports_field(dev, "swap-dx-lanes", data->port_cnt,
false, &hub->port_swap);
/* The following parameters are currently not exposed to devicetree, but
* may be as soon as needed.
*/
hub->bat_charge_en = USB251XB_DEF_BATTERY_CHARGING_ENABLE;
hub->boost_57 = USB251XB_DEF_BOOST_57;
hub->boost_14 = USB251XB_DEF_BOOST_14;
hub->port_map12 = USB251XB_DEF_PORT_MAP_12;
hub->port_map34 = USB251XB_DEF_PORT_MAP_34;
hub->port_map56 = USB251XB_DEF_PORT_MAP_56;
hub->port_map7 = USB251XB_DEF_PORT_MAP_7;
return 0;
}
static const struct udevice_id usb251xb_of_match[] = {
{
.compatible = "microchip,usb2422",
.data = (ulong)&usb2422_data,
}, {
.compatible = "microchip,usb2512b",
.data = (ulong)&usb2512b_data,
}, {
.compatible = "microchip,usb2512bi",
.data = (ulong)&usb2512bi_data,
}, {
.compatible = "microchip,usb2513b",
.data = (ulong)&usb2513b_data,
}, {
.compatible = "microchip,usb2513bi",
.data = (ulong)&usb2513bi_data,
}, {
.compatible = "microchip,usb2514b",
.data = (ulong)&usb2514b_data,
}, {
.compatible = "microchip,usb2514bi",
.data = (ulong)&usb2514bi_data,
}, {
.compatible = "microchip,usb2517",
.data = (ulong)&usb2517_data,
}, {
.compatible = "microchip,usb2517i",
.data = (ulong)&usb2517i_data,
}
};
U_BOOT_DRIVER(usb251xb) = {
.name = "usb251xb",
.id = UCLASS_MISC,
.of_match = usb251xb_of_match,
.of_to_plat = usb251xb_of_to_plat,
.probe = usb251xb_probe,
.priv_auto = sizeof(struct usb251xb),
};

50
drivers/mmc/fsl_esdhc_imx.c
View File

@@ -1060,6 +1060,30 @@ static int esdhc_getcd_common(struct fsl_esdhc_priv *priv)
return timeout > 0;
}
static int esdhc_wait_dat0_common(struct fsl_esdhc_priv *priv, int state,
int timeout_us)
{
struct fsl_esdhc *regs = priv->esdhc_regs;
int ret, err;
u32 tmp;
/* make sure the card clock keep on */
esdhc_setbits32(&regs->vendorspec, VENDORSPEC_FRC_SDCLK_ON);
ret = readx_poll_timeout(esdhc_read32, &regs->prsstat, tmp,
!!(tmp & PRSSTAT_DAT0) == !!state,
timeout_us);
/* change to default setting, let host control the card clock */
esdhc_clrbits32(&regs->vendorspec, VENDORSPEC_FRC_SDCLK_ON);
err = readx_poll_timeout(esdhc_read32, &regs->prsstat, tmp, tmp & PRSSTAT_SDOFF, 100);
if (err)
pr_warn("card clock not gate off as expect.\n");
return ret;
}
static int esdhc_reset(struct fsl_esdhc *regs)
{
ulong start;
@@ -1109,11 +1133,19 @@ static int esdhc_set_ios(struct mmc *mmc)
return esdhc_set_ios_common(priv, mmc);
}
static int esdhc_wait_dat0(struct mmc *mmc, int state, int timeout_us)
{
struct fsl_esdhc_priv *priv = mmc->priv;
return esdhc_wait_dat0_common(priv, state, timeout_us);
}
static const struct mmc_ops esdhc_ops = {
.getcd = esdhc_getcd,
.init = esdhc_init,
.send_cmd = esdhc_send_cmd,
.set_ios = esdhc_set_ios,
.wait_dat0 = esdhc_wait_dat0,
};
#endif
@@ -1576,25 +1608,9 @@ static int __maybe_unused fsl_esdhc_set_enhanced_strobe(struct udevice *dev)
static int fsl_esdhc_wait_dat0(struct udevice *dev, int state,
int timeout_us)
{
int ret, err;
u32 tmp;
struct fsl_esdhc_priv *priv = dev_get_priv(dev);
struct fsl_esdhc *regs = priv->esdhc_regs;
/* make sure the card clock keep on */
esdhc_setbits32(&regs->vendorspec, VENDORSPEC_FRC_SDCLK_ON);
ret = readx_poll_timeout(esdhc_read32, &regs->prsstat, tmp,
!!(tmp & PRSSTAT_DAT0) == !!state,
timeout_us);
/* change to default setting, let host control the card clock */
esdhc_clrbits32(&regs->vendorspec, VENDORSPEC_FRC_SDCLK_ON);
err = readx_poll_timeout(esdhc_read32, &regs->prsstat, tmp, tmp & PRSSTAT_SDOFF, 100);
if (err)
dev_warn(dev, "card clock not gate off as expect.\n");
return ret;
return esdhc_wait_dat0_common(priv, state, timeout_us);
}
static const struct dm_mmc_ops fsl_esdhc_ops = {

3
drivers/mmc/mmc.c
View File

@@ -34,6 +34,9 @@ static int mmc_set_signal_voltage(struct mmc *mmc, uint signal_voltage);
static int mmc_wait_dat0(struct mmc *mmc, int state, int timeout_us)
{
if (mmc->cfg->ops->wait_dat0)
return mmc->cfg->ops->wait_dat0(mmc, state, timeout_us);
return -ENOSYS;
}

2
drivers/mmc/mmc_write.c
View File

@@ -102,7 +102,7 @@ ulong mmc_berase(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt)
"The erase range would be change to "
"0x" LBAF "~0x" LBAF "\n\n",
mmc->erase_grp_size, start & ~(mmc->erase_grp_size - 1),
((start + blkcnt + mmc->erase_grp_size)
((start + blkcnt + mmc->erase_grp_size - 1)
& ~(mmc->erase_grp_size - 1)) - 1);
while (blk < blkcnt) {

64
drivers/net/phy/adin.c
View File

@@ -4,6 +4,7 @@
*
* Copyright 2019 Analog Devices Inc.
* Copyright 2022 Variscite Ltd.
* Copyright 2022 Josua Mayer <josua@solid-run.com>
*/
#include <common.h>
#include <phy.h>
@@ -13,6 +14,16 @@
#define PHY_ID_ADIN1300 0x0283bc30
#define ADIN1300_EXT_REG_PTR 0x10
#define ADIN1300_EXT_REG_DATA 0x11
#define ADIN1300_GE_CLK_CFG_REG 0xff1f
#define ADIN1300_GE_CLK_CFG_MASK GENMASK(5, 0)
#define ADIN1300_GE_CLK_CFG_RCVR_125 BIT(5)
#define ADIN1300_GE_CLK_CFG_FREE_125 BIT(4)
#define ADIN1300_GE_CLK_CFG_REF_EN BIT(3)
#define ADIN1300_GE_CLK_CFG_HRT_RCVR BIT(2)
#define ADIN1300_GE_CLK_CFG_HRT_FREE BIT(1)
#define ADIN1300_GE_CLK_CFG_25 BIT(0)
#define ADIN1300_GE_RGMII_CFG 0xff23
#define ADIN1300_GE_RGMII_RX_MSK GENMASK(8, 6)
#define ADIN1300_GE_RGMII_RX_SEL(x) \
@@ -100,27 +111,27 @@ static u32 adin_get_reg_value(struct phy_device *phydev,
* The function gets phy-mode string from property 'adi,phy-mode-override'
* and return its index in phy_interface_strings table, or -1 in error case.
*/
int adin_get_phy_mode_override(struct phy_device *phydev)
phy_interface_t adin_get_phy_mode_override(struct phy_device *phydev)
{
ofnode node = phy_get_ofnode(phydev);
const char *phy_mode_override;
const char *prop_phy_mode_override = "adi,phy-mode-override";
int override_interface;
int i;
phy_mode_override = ofnode_read_string(node, prop_phy_mode_override);
if (!phy_mode_override)
return -ENODEV;
return PHY_INTERFACE_MODE_NA;
debug("%s: %s = '%s'\n",
__func__, prop_phy_mode_override, phy_mode_override);
override_interface = phy_get_interface_by_name(phy_mode_override);
for (i = 0; i < PHY_INTERFACE_MODE_MAX; i++)
if (!strcmp(phy_mode_override, phy_interface_strings[i]))
return (phy_interface_t) i;
if (override_interface < 0)
printf("%s: %s = '%s' is not valid\n",
__func__, prop_phy_mode_override, phy_mode_override);
printf("%s: Invalid PHY interface '%s'\n", __func__, phy_mode_override);
return override_interface;
return PHY_INTERFACE_MODE_NA;
}
static u16 adin_ext_read(struct phy_device *phydev, const u32 regnum)
@@ -144,14 +155,41 @@ static int adin_ext_write(struct phy_device *phydev, const u32 regnum, const u16
return phy_write(phydev, MDIO_DEVAD_NONE, ADIN1300_EXT_REG_DATA, val);
}
static int adin_config_clk_out(struct phy_device *phydev)
{
ofnode node = phy_get_ofnode(phydev);
const char *val = NULL;
u8 sel = 0;
val = ofnode_read_string(node, "adi,phy-output-clock");
if (!val) {
/* property not present, do not enable GP_CLK pin */
} else if (strcmp(val, "25mhz-reference") == 0) {
sel |= ADIN1300_GE_CLK_CFG_25;
} else if (strcmp(val, "125mhz-free-running") == 0) {
sel |= ADIN1300_GE_CLK_CFG_FREE_125;
} else if (strcmp(val, "adaptive-free-running") == 0) {
sel |= ADIN1300_GE_CLK_CFG_HRT_FREE;
} else {
pr_err("%s: invalid adi,phy-output-clock\n", __func__);
return -EINVAL;
}
if (ofnode_read_bool(node, "adi,phy-output-reference-clock"))
sel |= ADIN1300_GE_CLK_CFG_REF_EN;
return adin_ext_write(phydev, ADIN1300_GE_CLK_CFG_REG,
ADIN1300_GE_CLK_CFG_MASK & sel);
}
static int adin_config_rgmii_mode(struct phy_device *phydev)
{
u16 reg_val;
u32 val;
int phy_mode_override = adin_get_phy_mode_override(phydev);
phy_interface_t phy_mode_override = adin_get_phy_mode_override(phydev);
if (phy_mode_override >= 0) {
phydev->interface = (phy_interface_t) phy_mode_override;
if (phy_mode_override != PHY_INTERFACE_MODE_NA) {
phydev->interface = phy_mode_override;
}
reg_val = adin_ext_read(phydev, ADIN1300_GE_RGMII_CFG);
@@ -202,6 +240,10 @@ static int adin1300_config(struct phy_device *phydev)
printf("ADIN1300 PHY detected at addr %d\n", phydev->addr);
ret = adin_config_clk_out(phydev);
if (ret < 0)
return ret;
ret = adin_config_rgmii_mode(phydev);
if (ret < 0)

4
drivers/pci/pci_tegra.c
View File

@@ -455,7 +455,7 @@ static int tegra_pcie_parse_port_info(ofnode node, uint *index, uint *lanes)
err = ofnode_read_u32_default(node, "nvidia,num-lanes", -1);
if (err < 0) {
pr_err("failed to parse \"nvidia,num-lanes\" property");
pr_err("failed to parse \"nvidia,num-lanes\" property\n");
return err;
}
@@ -463,7 +463,7 @@ static int tegra_pcie_parse_port_info(ofnode node, uint *index, uint *lanes)
err = ofnode_read_pci_addr(node, 0, "reg", &addr);
if (err < 0) {
pr_err("failed to parse \"reg\" property");
pr_err("failed to parse \"reg\" property\n");
return err;
}

4
drivers/power/pmic/Kconfig
View File

@@ -158,13 +158,15 @@ config SPL_DM_PMIC_MP5416
config DM_PMIC_PCA9450
bool "Enable Driver Model for PMIC PCA9450"
depends on DM_I2C
help
This config enables implementation of driver-model pmic uclass features
for PMIC PCA9450. The driver implements read/write operations.
config SPL_DM_PMIC_PCA9450
bool "Enable Driver Model for PMIC PCA9450"
bool "Enable Driver Model for PMIC PCA9450 in SPL"
depends on SPL_DM_PMIC
depends on SPL_DM_I2C
help
This config enables implementation of driver-model pmic uclass features
for PMIC PCA9450 in SPL. The driver implements read/write operations.

3
drivers/spi/nxp_fspi.c
View File

@@ -866,9 +866,6 @@ static int nxp_fspi_default_setup(struct nxp_fspi *f)
u32 reg;
#if CONFIG_IS_ENABLED(CLK)
/* disable and unprepare clock to avoid glitch pass to controller */
nxp_fspi_clk_disable_unprep(f);
/* the default frequency, we will change it later if necessary. */
ret = clk_set_rate(&f->clk, 20000000);
if (ret < 0)

4
drivers/usb/host/ehci-generic.c
View File

@@ -69,7 +69,7 @@ static int ehci_usb_probe(struct udevice *dev)
err = 0;
ret = clk_get_bulk(dev, &priv->clocks);
if (ret) {
if (ret && ret != -ENOENT) {
dev_err(dev, "Failed to get clocks (ret=%d)\n", ret);
return ret;
}
@@ -81,7 +81,7 @@ static int ehci_usb_probe(struct udevice *dev)
}
err = reset_get_bulk(dev, &priv->resets);
if (err) {
if (ret && ret != -ENOENT) {
dev_err(dev, "Failed to get resets (err=%d)\n", err);
goto clk_err;
}

6
drivers/usb/host/xhci-mtk.c
View File

@@ -122,11 +122,13 @@ static int xhci_mtk_host_disable(struct mtk_xhci *mtk)
/* power down all u3 ports */
for (i = 0; i < mtk->num_u3ports; i++)
setbits_le32(mtk->ippc + IPPC_U3_CTRL(i), CTRL_U3_PORT_PDN);
setbits_le32(mtk->ippc + IPPC_U3_CTRL(i),
CTRL_U3_PORT_PDN | CTRL_U3_PORT_DIS);
/* power down all u2 ports */
for (i = 0; i < mtk->num_u2ports; i++)
setbits_le32(mtk->ippc + IPPC_U2_CTRL(i), CTRL_U2_PORT_PDN);
setbits_le32(mtk->ippc + IPPC_U2_CTRL(i),
CTRL_U2_PORT_PDN | CTRL_U2_PORT_DIS);
/* power down host ip */
setbits_le32(mtk->ippc + IPPC_IP_PW_CTRL1, CTRL1_IP_HOST_PDN);

1
drivers/video/tegra124/dp.c
View File

@@ -1609,6 +1609,7 @@ static int dp_tegra_probe(struct udevice *dev)
static const struct udevice_id tegra_dp_ids[] = {
{ .compatible = "nvidia,tegra124-dpaux" },
{ .compatible = "nvidia,tegra210-dpaux" },
{ }
};