From 93216276f532c9eed2126860a678a6b4d77dc358 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 6 Jun 2022 09:31:27 +0200 Subject: [PATCH 01/68] xilinx: fru: Replace spaces with \0 in detected revision Also fix board revision field where spaces are used instead of \0. The same change was done for board name by commit 530560b6f8eb ("xilinx: fru: Replace spaces with \0 in detected name"). Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/e069e5134e57899e859786ad8ba48721df6df752.1653911444.git.michal.simek@amd.com --- board/xilinx/common/board.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/board/xilinx/common/board.c b/board/xilinx/common/board.c index 5be3090c31..629a6ee036 100644 --- a/board/xilinx/common/board.c +++ b/board/xilinx/common/board.c @@ -245,6 +245,10 @@ static int xilinx_read_eeprom_fru(struct udevice *dev, char *name, } strncpy(desc->revision, (char *)fru_data.brd.rev, sizeof(desc->revision)); + for (i = 0; i < sizeof(desc->revision); i++) { + if (desc->revision[i] == ' ') + desc->revision[i] = '\0'; + } strncpy(desc->serial, (char *)fru_data.brd.serial_number, sizeof(desc->serial)); From 06ceff70bf040536163d5010c7560e5846f063c6 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Thu, 28 Apr 2022 13:33:09 +0200 Subject: [PATCH 02/68] watchdog: Fix SPL build with watchdog disabled in asm files MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Allow to compile assembler files in SPL build which calls WATCHDOG_RESET function when watchdog is disabled in SPL and enabled in U-Boot proper. This issue was fixed in past by commit 7fbd42f5afc4 ("watchdog: Handle SPL build with watchdog disabled") for C source files, but not for assembler source files. Currently the only assembler source file which calls WATCHDOG_RESET is arch/powerpc/lib/ticks.S, so this patch affects and fixes powerpc SPL builds. Signed-off-by: Pali Rohár Reviewed-by: Stefan Roese --- include/watchdog.h | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/include/watchdog.h b/include/watchdog.h index 14fa5fda25..813cc8f2a5 100644 --- a/include/watchdog.h +++ b/include/watchdog.h @@ -49,7 +49,13 @@ int init_func_watchdog_reset(void); */ #if defined(CONFIG_WATCHDOG) #if defined(__ASSEMBLY__) - #define WATCHDOG_RESET bl watchdog_reset + /* Don't require the watchdog to be enabled in SPL */ + #if defined(CONFIG_SPL_BUILD) && \ + !defined(CONFIG_SPL_WATCHDOG) + #define WATCHDOG_RESET /*XXX DO_NOT_DEL_THIS_COMMENT*/ + #else + #define WATCHDOG_RESET bl watchdog_reset + #endif #else /* Don't require the watchdog to be enabled in SPL */ #if defined(CONFIG_SPL_BUILD) && \ From fe8e8af36c46dd6381d64b174bd6b5e1283a5294 Mon Sep 17 00:00:00 2001 From: Chunfeng Yun Date: Fri, 27 May 2022 09:52:09 +0800 Subject: [PATCH 03/68] usb: xhci-mtk: disable all ports when disable host controller This is used to avoid the ports status of IPPC being brought in kernel stage, it may cause ports error especially when the xhci controller is a component of dual-role controller. Reported-by: Yun-Chien Yu Signed-off-by: Chunfeng Yun --- drivers/usb/host/xhci-mtk.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/usb/host/xhci-mtk.c b/drivers/usb/host/xhci-mtk.c index 18b4f55d89..3838a990ec 100644 --- a/drivers/usb/host/xhci-mtk.c +++ b/drivers/usb/host/xhci-mtk.c @@ -122,11 +122,13 @@ static int xhci_mtk_host_disable(struct mtk_xhci *mtk) /* power down all u3 ports */ for (i = 0; i < mtk->num_u3ports; i++) - setbits_le32(mtk->ippc + IPPC_U3_CTRL(i), CTRL_U3_PORT_PDN); + setbits_le32(mtk->ippc + IPPC_U3_CTRL(i), + CTRL_U3_PORT_PDN | CTRL_U3_PORT_DIS); /* power down all u2 ports */ for (i = 0; i < mtk->num_u2ports; i++) - setbits_le32(mtk->ippc + IPPC_U2_CTRL(i), CTRL_U2_PORT_PDN); + setbits_le32(mtk->ippc + IPPC_U2_CTRL(i), + CTRL_U2_PORT_PDN | CTRL_U2_PORT_DIS); /* power down host ip */ setbits_le32(mtk->ippc + IPPC_IP_PW_CTRL1, CTRL1_IP_HOST_PDN); From 02544db9a7ffd352129f51c8987fc5a6e2b31a8b Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 10 Apr 2022 06:27:14 +0200 Subject: [PATCH 04/68] misc: Port USB251xB/xBi Hi-Speed Hub Controller Driver from Linux This patch adds a driver for configuration of the Microchip USB251xB/xBi USB 2.0 hub controller series with USB 2.0 upstream connectivity, SMBus configuration interface and two to four USB 2.0 downstream ports. This is ported from Linux as of Linux kernel commit 5c2b9c61ae5d8 ("usb: usb251xb: add boost-up property support") Signed-off-by: Marek Vasut Cc: Bin Meng Cc: Michal Simek Cc: Simon Glass --- drivers/misc/Kconfig | 9 + drivers/misc/Makefile | 1 + drivers/misc/usb251xb.c | 605 ++++++++++++++++++++++++++++++++++++++++ 3 files changed, 615 insertions(+) create mode 100644 drivers/misc/usb251xb.c diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index 85ae7f62e9..007c72819f 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -409,6 +409,15 @@ config TEST_DRV model. This should only be enabled for testing as it is not useful for anything else. +config USB_HUB_USB251XB + tristate "USB251XB Hub Controller Configuration Driver" + depends on I2C + help + This option enables support for configuration via SMBus of the + Microchip USB251x/xBi USB 2.0 Hub Controller series. Configuration + parameters may be set in devicetree or platform data. + Say Y or M here if you need to configure such a device via SMBus. + config TWL4030_LED bool "Enable TWL4030 LED controller" help diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index 7a6047f64f..b9c54bdd99 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -20,6 +20,7 @@ endif ifdef CONFIG_$(SPL_)DM_I2C ifndef CONFIG_SPL_BUILD obj-$(CONFIG_SANDBOX) += i2c_eeprom_emul.o +obj-$(CONFIG_USB_HUB_USB251XB) += usb251xb.o endif endif ifdef CONFIG_SPL_OF_PLATDATA diff --git a/drivers/misc/usb251xb.c b/drivers/misc/usb251xb.c new file mode 100644 index 0000000000..077edc2504 --- /dev/null +++ b/drivers/misc/usb251xb.c @@ -0,0 +1,605 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Driver for Microchip USB251xB USB 2.0 Hi-Speed Hub Controller + * Configuration via SMBus. + * + * Copyright (c) 2017 SKIDATA AG + * + * This work is based on the USB3503 driver by Dongjin Kim and + * a not-accepted patch by Fabien Lahoudere, see: + * https://patchwork.kernel.org/patch/9257715/ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* Internal Register Set Addresses & Default Values acc. to DS00001692C */ +#define USB251XB_ADDR_VENDOR_ID_LSB 0x00 +#define USB251XB_ADDR_VENDOR_ID_MSB 0x01 +#define USB251XB_DEF_VENDOR_ID 0x0424 + +#define USB251XB_ADDR_PRODUCT_ID_LSB 0x02 +#define USB251XB_ADDR_PRODUCT_ID_MSB 0x03 + +#define USB251XB_ADDR_DEVICE_ID_LSB 0x04 +#define USB251XB_ADDR_DEVICE_ID_MSB 0x05 +#define USB251XB_DEF_DEVICE_ID 0x0BB3 + +#define USB251XB_ADDR_CONFIG_DATA_1 0x06 +#define USB251XB_DEF_CONFIG_DATA_1 0x9B +#define USB251XB_ADDR_CONFIG_DATA_2 0x07 +#define USB251XB_DEF_CONFIG_DATA_2 0x20 +#define USB251XB_ADDR_CONFIG_DATA_3 0x08 +#define USB251XB_DEF_CONFIG_DATA_3 0x02 + +#define USB251XB_ADDR_NON_REMOVABLE_DEVICES 0x09 +#define USB251XB_DEF_NON_REMOVABLE_DEVICES 0x00 + +#define USB251XB_ADDR_PORT_DISABLE_SELF 0x0A +#define USB251XB_DEF_PORT_DISABLE_SELF 0x00 +#define USB251XB_ADDR_PORT_DISABLE_BUS 0x0B +#define USB251XB_DEF_PORT_DISABLE_BUS 0x00 + +#define USB251XB_ADDR_MAX_POWER_SELF 0x0C +#define USB251XB_DEF_MAX_POWER_SELF 0x01 +#define USB251XB_ADDR_MAX_POWER_BUS 0x0D +#define USB251XB_DEF_MAX_POWER_BUS 0x32 + +#define USB251XB_ADDR_MAX_CURRENT_SELF 0x0E +#define USB251XB_DEF_MAX_CURRENT_SELF 0x01 +#define USB251XB_ADDR_MAX_CURRENT_BUS 0x0F +#define USB251XB_DEF_MAX_CURRENT_BUS 0x32 + +#define USB251XB_ADDR_POWER_ON_TIME 0x10 +#define USB251XB_DEF_POWER_ON_TIME 0x32 + +#define USB251XB_ADDR_LANGUAGE_ID_HIGH 0x11 +#define USB251XB_ADDR_LANGUAGE_ID_LOW 0x12 +#define USB251XB_DEF_LANGUAGE_ID 0x0000 + +#define USB251XB_STRING_BUFSIZE 62 +#define USB251XB_ADDR_MANUFACTURER_STRING_LEN 0x13 +#define USB251XB_ADDR_MANUFACTURER_STRING 0x16 +#define USB251XB_DEF_MANUFACTURER_STRING "Microchip" + +#define USB251XB_ADDR_PRODUCT_STRING_LEN 0x14 +#define USB251XB_ADDR_PRODUCT_STRING 0x54 + +#define USB251XB_ADDR_SERIAL_STRING_LEN 0x15 +#define USB251XB_ADDR_SERIAL_STRING 0x92 +#define USB251XB_DEF_SERIAL_STRING "" + +#define USB251XB_ADDR_BATTERY_CHARGING_ENABLE 0xD0 +#define USB251XB_DEF_BATTERY_CHARGING_ENABLE 0x00 + +#define USB251XB_ADDR_BOOST_UP 0xF6 +#define USB251XB_DEF_BOOST_UP 0x00 +#define USB251XB_ADDR_BOOST_57 0xF7 +#define USB251XB_DEF_BOOST_57 0x00 +#define USB251XB_ADDR_BOOST_14 0xF8 +#define USB251XB_DEF_BOOST_14 0x00 + +#define USB251XB_ADDR_PORT_SWAP 0xFA +#define USB251XB_DEF_PORT_SWAP 0x00 + +#define USB251XB_ADDR_PORT_MAP_12 0xFB +#define USB251XB_DEF_PORT_MAP_12 0x00 +#define USB251XB_ADDR_PORT_MAP_34 0xFC +#define USB251XB_DEF_PORT_MAP_34 0x00 /* USB251{3B/i,4B/i,7/i} only */ +#define USB251XB_ADDR_PORT_MAP_56 0xFD +#define USB251XB_DEF_PORT_MAP_56 0x00 /* USB2517/i only */ +#define USB251XB_ADDR_PORT_MAP_7 0xFE +#define USB251XB_DEF_PORT_MAP_7 0x00 /* USB2517/i only */ + +#define USB251XB_ADDR_STATUS_COMMAND 0xFF +#define USB251XB_STATUS_COMMAND_SMBUS_DOWN 0x04 +#define USB251XB_STATUS_COMMAND_RESET 0x02 +#define USB251XB_STATUS_COMMAND_ATTACH 0x01 + +#define USB251XB_I2C_REG_SZ 0x100 +#define USB251XB_I2C_WRITE_SZ 0x10 + +#define DRIVER_NAME "usb251xb" +#define DRIVER_DESC "Microchip USB 2.0 Hi-Speed Hub Controller" + +struct usb251xb { + struct device *dev; + struct i2c_client *i2c; + struct udevice *vdd; + u8 skip_config; + struct gpio_desc gpio_reset; + u32 vendor_id; + u32 product_id; + u32 device_id; + u8 conf_data1; + u8 conf_data2; + u8 conf_data3; + u8 non_rem_dev; + u8 port_disable_sp; + u8 port_disable_bp; + u8 max_power_sp; + u8 max_power_bp; + u8 max_current_sp; + u8 max_current_bp; + u8 power_on_time; + u32 lang_id; + u8 manufacturer_len; + u8 product_len; + u8 serial_len; + s16 manufacturer[USB251XB_STRING_BUFSIZE]; + s16 product[USB251XB_STRING_BUFSIZE]; + s16 serial[USB251XB_STRING_BUFSIZE]; + u8 bat_charge_en; + u32 boost_up; + u8 boost_57; + u8 boost_14; + u8 port_swap; + u8 port_map12; + u8 port_map34; + u8 port_map56; + u8 port_map7; + u8 status; +}; + +struct usb251xb_data { + u16 product_id; + u8 port_cnt; + bool led_support; + bool bat_support; + char product_str[USB251XB_STRING_BUFSIZE / 2]; /* ASCII string */ +}; + +static const struct usb251xb_data usb2422_data = { + .product_id = 0x2422, + .port_cnt = 2, + .led_support = false, + .bat_support = true, + .product_str = "USB2422", +}; + +static const struct usb251xb_data usb2512b_data = { + .product_id = 0x2512, + .port_cnt = 2, + .led_support = false, + .bat_support = true, + .product_str = "USB2512B", +}; + +static const struct usb251xb_data usb2512bi_data = { + .product_id = 0x2512, + .port_cnt = 2, + .led_support = false, + .bat_support = true, + .product_str = "USB2512Bi", +}; + +static const struct usb251xb_data usb2513b_data = { + .product_id = 0x2513, + .port_cnt = 3, + .led_support = false, + .bat_support = true, + .product_str = "USB2513B", +}; + +static const struct usb251xb_data usb2513bi_data = { + .product_id = 0x2513, + .port_cnt = 3, + .led_support = false, + .bat_support = true, + .product_str = "USB2513Bi", +}; + +static const struct usb251xb_data usb2514b_data = { + .product_id = 0x2514, + .port_cnt = 4, + .led_support = false, + .bat_support = true, + .product_str = "USB2514B", +}; + +static const struct usb251xb_data usb2514bi_data = { + .product_id = 0x2514, + .port_cnt = 4, + .led_support = false, + .bat_support = true, + .product_str = "USB2514Bi", +}; + +static const struct usb251xb_data usb2517_data = { + .product_id = 0x2517, + .port_cnt = 7, + .led_support = true, + .bat_support = false, + .product_str = "USB2517", +}; + +static const struct usb251xb_data usb2517i_data = { + .product_id = 0x2517, + .port_cnt = 7, + .led_support = true, + .bat_support = false, + .product_str = "USB2517i", +}; + +static void usb251xb_reset(struct usb251xb *hub) +{ + dm_gpio_set_value(&hub->gpio_reset, 1); + udelay(10); /* >=1us RESET_N asserted */ + dm_gpio_set_value(&hub->gpio_reset, 0); + + /* wait for hub recovery/stabilization */ + udelay(750); /* >=500us after RESET_N deasserted */ +} + +static int usb251xb_connect(struct udevice *dev) +{ + struct usb251xb *hub = dev_get_priv(dev); + char i2c_wb[USB251XB_I2C_REG_SZ]; + int err, i; + + memset(i2c_wb, 0, USB251XB_I2C_REG_SZ); + + if (hub->skip_config) { + dev_info(dev, "Skip hub configuration, only attach.\n"); + i2c_wb[0] = 0x01; + i2c_wb[1] = USB251XB_STATUS_COMMAND_ATTACH; + + usb251xb_reset(hub); + + err = dm_i2c_write(dev, USB251XB_ADDR_STATUS_COMMAND, i2c_wb, 2); + if (err) { + dev_err(dev, "attaching hub failed: %d\n", err); + return err; + } + return 0; + } + + i2c_wb[USB251XB_ADDR_VENDOR_ID_MSB] = (hub->vendor_id >> 8) & 0xFF; + i2c_wb[USB251XB_ADDR_VENDOR_ID_LSB] = hub->vendor_id & 0xFF; + i2c_wb[USB251XB_ADDR_PRODUCT_ID_MSB] = (hub->product_id >> 8) & 0xFF; + i2c_wb[USB251XB_ADDR_PRODUCT_ID_LSB] = hub->product_id & 0xFF; + i2c_wb[USB251XB_ADDR_DEVICE_ID_MSB] = (hub->device_id >> 8) & 0xFF; + i2c_wb[USB251XB_ADDR_DEVICE_ID_LSB] = hub->device_id & 0xFF; + i2c_wb[USB251XB_ADDR_CONFIG_DATA_1] = hub->conf_data1; + i2c_wb[USB251XB_ADDR_CONFIG_DATA_2] = hub->conf_data2; + i2c_wb[USB251XB_ADDR_CONFIG_DATA_3] = hub->conf_data3; + i2c_wb[USB251XB_ADDR_NON_REMOVABLE_DEVICES] = hub->non_rem_dev; + i2c_wb[USB251XB_ADDR_PORT_DISABLE_SELF] = hub->port_disable_sp; + i2c_wb[USB251XB_ADDR_PORT_DISABLE_BUS] = hub->port_disable_bp; + i2c_wb[USB251XB_ADDR_MAX_POWER_SELF] = hub->max_power_sp; + i2c_wb[USB251XB_ADDR_MAX_POWER_BUS] = hub->max_power_bp; + i2c_wb[USB251XB_ADDR_MAX_CURRENT_SELF] = hub->max_current_sp; + i2c_wb[USB251XB_ADDR_MAX_CURRENT_BUS] = hub->max_current_bp; + i2c_wb[USB251XB_ADDR_POWER_ON_TIME] = hub->power_on_time; + i2c_wb[USB251XB_ADDR_LANGUAGE_ID_HIGH] = (hub->lang_id >> 8) & 0xFF; + i2c_wb[USB251XB_ADDR_LANGUAGE_ID_LOW] = hub->lang_id & 0xFF; + i2c_wb[USB251XB_ADDR_MANUFACTURER_STRING_LEN] = hub->manufacturer_len; + i2c_wb[USB251XB_ADDR_PRODUCT_STRING_LEN] = hub->product_len; + i2c_wb[USB251XB_ADDR_SERIAL_STRING_LEN] = hub->serial_len; + memcpy(&i2c_wb[USB251XB_ADDR_MANUFACTURER_STRING], hub->manufacturer, + USB251XB_STRING_BUFSIZE); + memcpy(&i2c_wb[USB251XB_ADDR_SERIAL_STRING], hub->serial, + USB251XB_STRING_BUFSIZE); + memcpy(&i2c_wb[USB251XB_ADDR_PRODUCT_STRING], hub->product, + USB251XB_STRING_BUFSIZE); + i2c_wb[USB251XB_ADDR_BATTERY_CHARGING_ENABLE] = hub->bat_charge_en; + i2c_wb[USB251XB_ADDR_BOOST_UP] = hub->boost_up; + i2c_wb[USB251XB_ADDR_BOOST_57] = hub->boost_57; + i2c_wb[USB251XB_ADDR_BOOST_14] = hub->boost_14; + i2c_wb[USB251XB_ADDR_PORT_SWAP] = hub->port_swap; + i2c_wb[USB251XB_ADDR_PORT_MAP_12] = hub->port_map12; + i2c_wb[USB251XB_ADDR_PORT_MAP_34] = hub->port_map34; + i2c_wb[USB251XB_ADDR_PORT_MAP_56] = hub->port_map56; + i2c_wb[USB251XB_ADDR_PORT_MAP_7] = hub->port_map7; + i2c_wb[USB251XB_ADDR_STATUS_COMMAND] = USB251XB_STATUS_COMMAND_ATTACH; + + usb251xb_reset(hub); + + /* write registers */ + for (i = 0; i < (USB251XB_I2C_REG_SZ / USB251XB_I2C_WRITE_SZ); i++) { + int offset = i * USB251XB_I2C_WRITE_SZ; + char wbuf[USB251XB_I2C_WRITE_SZ + 1]; + + /* The first data byte transferred tells the hub how many data + * bytes will follow (byte count). + */ + wbuf[0] = USB251XB_I2C_WRITE_SZ; + memcpy(&wbuf[1], &i2c_wb[offset], USB251XB_I2C_WRITE_SZ); + + dev_dbg(dev, "writing %d byte block %d to 0x%02X\n", + USB251XB_I2C_WRITE_SZ, i, offset); + + err = dm_i2c_write(dev, offset, wbuf, USB251XB_I2C_WRITE_SZ + 1); + if (err) + goto out_err; + } + + dev_info(dev, "Hub configuration was successful.\n"); + return 0; + +out_err: + dev_err(dev, "configuring block %d failed: %d\n", i, err); + return err; +} + +static int usb251xb_probe(struct udevice *dev) +{ + struct usb251xb *hub = dev_get_priv(dev); + int err; + + if (IS_ENABLED(CONFIG_DM_REGULATOR) && hub->vdd) { + err = regulator_set_enable(hub->vdd, true); + if (err) + return err; + } + + err = usb251xb_connect(dev); + if (err) { + dev_err(dev, "Failed to connect hub (%d)\n", err); + return err; + } + + dev_info(dev, "Hub probed successfully\n"); + + return 0; +} + +static void usb251xb_get_ports_field(struct udevice *dev, + const char *prop_name, u8 port_cnt, + bool ds_only, u8 *fld) +{ + u32 i, port; + int ret; + + for (i = 0; i < port_cnt; i++) { + ret = dev_read_u32_index(dev, prop_name, i, &port); + if (ret) + continue; + if (port >= ds_only ? 1 : 0 && port <= port_cnt) + *fld |= BIT(port); + else + dev_warn(dev, "port %u doesn't exist\n", port); + } +} + +static int usb251xb_of_to_plat(struct udevice *dev) +{ + struct usb251xb_data *data = + (struct usb251xb_data *)dev_get_driver_data(dev); + struct usb251xb *hub = dev_get_priv(dev); + char str[USB251XB_STRING_BUFSIZE / 2]; + const char *cproperty_char; + u32 property_u32 = 0; + int len, err; + + if (dev_read_bool(dev, "skip-config")) + hub->skip_config = 1; + else + hub->skip_config = 0; + + err = gpio_request_by_name(dev, "reset-gpios", 0, &hub->gpio_reset, + GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE); + if (err && err != -ENOENT) { + dev_err(dev, "unable to request GPIO reset pin (%d)\n", err); + return err; + } + + if (IS_ENABLED(CONFIG_DM_REGULATOR)) { + err = device_get_supply_regulator(dev, "vdd-supply", + &hub->vdd); + if (err && err != -ENOENT) { + dev_err(dev, "Warning: cannot get power supply\n"); + return err; + } + } + + if (dev_read_u32(dev, "vendor-id", &hub->vendor_id)) + hub->vendor_id = USB251XB_DEF_VENDOR_ID; + + if (dev_read_u32(dev, "product-id", &hub->product_id)) + hub->product_id = data->product_id; + + if (dev_read_u32(dev, "device-id", &hub->device_id)) + hub->device_id = USB251XB_DEF_DEVICE_ID; + + hub->conf_data1 = USB251XB_DEF_CONFIG_DATA_1; + if (dev_read_bool(dev, "self-powered")) { + hub->conf_data1 |= BIT(7); + + /* Configure Over-Current sens when self-powered */ + hub->conf_data1 &= ~BIT(2); + if (dev_read_bool(dev, "ganged-sensing")) + hub->conf_data1 &= ~BIT(1); + else if (dev_read_bool(dev, "individual-sensing")) + hub->conf_data1 |= BIT(1); + } else if (dev_read_bool(dev, "bus-powered")) { + hub->conf_data1 &= ~BIT(7); + + /* Disable Over-Current sense when bus-powered */ + hub->conf_data1 |= BIT(2); + } + + if (dev_read_bool(dev, "disable-hi-speed")) + hub->conf_data1 |= BIT(5); + + if (dev_read_bool(dev, "multi-tt")) + hub->conf_data1 |= BIT(4); + else if (dev_read_bool(dev, "single-tt")) + hub->conf_data1 &= ~BIT(4); + + if (dev_read_bool(dev, "disable-eop")) + hub->conf_data1 |= BIT(3); + + if (dev_read_bool(dev, "individual-port-switching")) + hub->conf_data1 |= BIT(0); + else if (dev_read_bool(dev, "ganged-port-switching")) + hub->conf_data1 &= ~BIT(0); + + hub->conf_data2 = USB251XB_DEF_CONFIG_DATA_2; + if (dev_read_bool(dev, "dynamic-power-switching")) + hub->conf_data2 |= BIT(7); + + if (!dev_read_u32(dev, "oc-delay-us", &property_u32)) { + if (property_u32 == 100) { + /* 100 us*/ + hub->conf_data2 &= ~BIT(5); + hub->conf_data2 &= ~BIT(4); + } else if (property_u32 == 4000) { + /* 4 ms */ + hub->conf_data2 &= ~BIT(5); + hub->conf_data2 |= BIT(4); + } else if (property_u32 == 16000) { + /* 16 ms */ + hub->conf_data2 |= BIT(5); + hub->conf_data2 |= BIT(4); + } else { + /* 8 ms (DEFAULT) */ + hub->conf_data2 |= BIT(5); + hub->conf_data2 &= ~BIT(4); + } + } + + if (dev_read_bool(dev, "compound-device")) + hub->conf_data2 |= BIT(3); + + hub->conf_data3 = USB251XB_DEF_CONFIG_DATA_3; + if (dev_read_bool(dev, "port-mapping-mode")) + hub->conf_data3 |= BIT(3); + + if (data->led_support && dev_read_bool(dev, "led-usb-mode")) + hub->conf_data3 &= ~BIT(1); + + if (dev_read_bool(dev, "string-support")) + hub->conf_data3 |= BIT(0); + + hub->non_rem_dev = USB251XB_DEF_NON_REMOVABLE_DEVICES; + usb251xb_get_ports_field(dev, "non-removable-ports", data->port_cnt, + true, &hub->non_rem_dev); + + hub->port_disable_sp = USB251XB_DEF_PORT_DISABLE_SELF; + usb251xb_get_ports_field(dev, "sp-disabled-ports", data->port_cnt, + true, &hub->port_disable_sp); + + hub->port_disable_bp = USB251XB_DEF_PORT_DISABLE_BUS; + usb251xb_get_ports_field(dev, "bp-disabled-ports", data->port_cnt, + true, &hub->port_disable_bp); + + hub->max_power_sp = USB251XB_DEF_MAX_POWER_SELF; + if (!dev_read_u32(dev, "sp-max-total-current-microamp", &property_u32)) + hub->max_power_sp = min_t(u8, property_u32 / 2000, 50); + + hub->max_power_bp = USB251XB_DEF_MAX_POWER_BUS; + if (!dev_read_u32(dev, "bp-max-total-current-microamp", &property_u32)) + hub->max_power_bp = min_t(u8, property_u32 / 2000, 255); + + hub->max_current_sp = USB251XB_DEF_MAX_CURRENT_SELF; + if (!dev_read_u32(dev, "sp-max-removable-current-microamp", + &property_u32)) + hub->max_current_sp = min_t(u8, property_u32 / 2000, 50); + + hub->max_current_bp = USB251XB_DEF_MAX_CURRENT_BUS; + if (!dev_read_u32(dev, "bp-max-removable-current-microamp", + &property_u32)) + hub->max_current_bp = min_t(u8, property_u32 / 2000, 255); + + hub->power_on_time = USB251XB_DEF_POWER_ON_TIME; + if (!dev_read_u32(dev, "power-on-time-ms", &property_u32)) + hub->power_on_time = min_t(u8, property_u32 / 2, 255); + + if (dev_read_u32(dev, "language-id", &hub->lang_id)) + hub->lang_id = USB251XB_DEF_LANGUAGE_ID; + + if (!dev_read_u32(dev, "boost-up", &hub->boost_up)) + hub->boost_up = USB251XB_DEF_BOOST_UP; + + cproperty_char = dev_read_string(dev, "manufacturer"); + strlcpy(str, cproperty_char ? : USB251XB_DEF_MANUFACTURER_STRING, + sizeof(str)); + hub->manufacturer_len = strlen(str) & 0xFF; + memset(hub->manufacturer, 0, USB251XB_STRING_BUFSIZE); + len = min_t(size_t, USB251XB_STRING_BUFSIZE / 2, strlen(str)); + len = utf8_to_utf16le(str, hub->manufacturer, len); + + cproperty_char = dev_read_string(dev, "product"); + strlcpy(str, cproperty_char ? : data->product_str, sizeof(str)); + hub->product_len = strlen(str) & 0xFF; + memset(hub->product, 0, USB251XB_STRING_BUFSIZE); + len = min_t(size_t, USB251XB_STRING_BUFSIZE / 2, strlen(str)); + len = utf8_to_utf16le(str, hub->product, len); + + cproperty_char = dev_read_string(dev, "serial"); + strlcpy(str, cproperty_char ? : USB251XB_DEF_SERIAL_STRING, + sizeof(str)); + hub->serial_len = strlen(str) & 0xFF; + memset(hub->serial, 0, USB251XB_STRING_BUFSIZE); + len = min_t(size_t, USB251XB_STRING_BUFSIZE / 2, strlen(str)); + len = utf8_to_utf16le(str, hub->serial, len); + + /* + * The datasheet documents the register as 'Port Swap' but in real the + * register controls the USB DP/DM signal swapping for each port. + */ + hub->port_swap = USB251XB_DEF_PORT_SWAP; + usb251xb_get_ports_field(dev, "swap-dx-lanes", data->port_cnt, + false, &hub->port_swap); + + /* The following parameters are currently not exposed to devicetree, but + * may be as soon as needed. + */ + hub->bat_charge_en = USB251XB_DEF_BATTERY_CHARGING_ENABLE; + hub->boost_57 = USB251XB_DEF_BOOST_57; + hub->boost_14 = USB251XB_DEF_BOOST_14; + hub->port_map12 = USB251XB_DEF_PORT_MAP_12; + hub->port_map34 = USB251XB_DEF_PORT_MAP_34; + hub->port_map56 = USB251XB_DEF_PORT_MAP_56; + hub->port_map7 = USB251XB_DEF_PORT_MAP_7; + + return 0; +} + +static const struct udevice_id usb251xb_of_match[] = { + { + .compatible = "microchip,usb2422", + .data = (ulong)&usb2422_data, + }, { + .compatible = "microchip,usb2512b", + .data = (ulong)&usb2512b_data, + }, { + .compatible = "microchip,usb2512bi", + .data = (ulong)&usb2512bi_data, + }, { + .compatible = "microchip,usb2513b", + .data = (ulong)&usb2513b_data, + }, { + .compatible = "microchip,usb2513bi", + .data = (ulong)&usb2513bi_data, + }, { + .compatible = "microchip,usb2514b", + .data = (ulong)&usb2514b_data, + }, { + .compatible = "microchip,usb2514bi", + .data = (ulong)&usb2514bi_data, + }, { + .compatible = "microchip,usb2517", + .data = (ulong)&usb2517_data, + }, { + .compatible = "microchip,usb2517i", + .data = (ulong)&usb2517i_data, + } +}; + +U_BOOT_DRIVER(usb251xb) = { + .name = "usb251xb", + .id = UCLASS_MISC, + .of_match = usb251xb_of_match, + .of_to_plat = usb251xb_of_to_plat, + .probe = usb251xb_probe, + .priv_auto = sizeof(struct usb251xb), +}; From 119fafdefb81677dc629b79263672e9457849c61 Mon Sep 17 00:00:00 2001 From: Sughosh Ganu Date: Wed, 1 Jun 2022 23:30:39 +0530 Subject: [PATCH 05/68] EFI: Do not consider OsIndications variable if CONFIG_EFI_IGNORE_OSINDICATIONS is enabled The EFI_IGNORE_OSINDICATIONS config symbol was introduced as a mechanism to have capsule updates work even on platforms where the SetVariable runtime service was not supported. The current logic requires the OsIndications variable to have been set to a 64 bit value even when the EFI_IGNORE_OSINDICATIONS config is enabled. Return an error code on not being able to read the variable only when EFI_IGNORE_OSINDICATIONS is not enabled. Signed-off-by: Sughosh Ganu Reviewed-by: Heinrich Schuchardt --- lib/efi_loader/efi_capsule.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/lib/efi_loader/efi_capsule.c b/lib/efi_loader/efi_capsule.c index c76a5f3570..a6b98f066a 100644 --- a/lib/efi_loader/efi_capsule.c +++ b/lib/efi_loader/efi_capsule.c @@ -1058,14 +1058,15 @@ static void efi_capsule_scan_done(void) */ static efi_status_t check_run_capsules(void) { - u64 os_indications; + u64 os_indications = 0x0; efi_uintn_t size; efi_status_t r; size = sizeof(os_indications); r = efi_get_variable_int(u"OsIndications", &efi_global_variable_guid, NULL, &size, &os_indications, NULL); - if (r != EFI_SUCCESS || size != sizeof(os_indications)) + if (!IS_ENABLED(CONFIG_EFI_IGNORE_OSINDICATIONS) && + (r != EFI_SUCCESS || size != sizeof(os_indications))) return EFI_NOT_FOUND; if (os_indications & @@ -1084,7 +1085,7 @@ static efi_status_t check_run_capsules(void) return EFI_SUCCESS; } else if (IS_ENABLED(CONFIG_EFI_IGNORE_OSINDICATIONS)) { return EFI_SUCCESS; - } else { + } else { return EFI_NOT_FOUND; } } From 556a12654a3350113edbd826cbcdde4c03cb7f20 Mon Sep 17 00:00:00 2001 From: Sughosh Ganu Date: Wed, 1 Jun 2022 23:30:41 +0530 Subject: [PATCH 06/68] EFI: FMP: Use a common GetImageInfo function for FIT and raw images The GetImageInfo function definitions for the FIT images and raw images are the same. Use a common function for the both the Firmware Management Protocol(FMP) instances for raw and FIT images. Signed-off-by: Sughosh Ganu Reviewed-by: Heinrich Schuchardt --- lib/efi_loader/efi_firmware.c | 80 ++++++----------------------------- 1 file changed, 14 insertions(+), 66 deletions(-) diff --git a/lib/efi_loader/efi_firmware.c b/lib/efi_loader/efi_firmware.c index 0ce6c1e34f..30cafd15ca 100644 --- a/lib/efi_loader/efi_firmware.c +++ b/lib/efi_loader/efi_firmware.c @@ -241,18 +241,8 @@ efi_status_t efi_firmware_capsule_authenticate(const void **p_image, return EFI_SUCCESS; } -#ifdef CONFIG_EFI_CAPSULE_FIRMWARE_FIT -/* - * This FIRMWARE_MANAGEMENT_PROTOCOL driver provides a firmware update - * method with existing FIT image format, and handles - * - multiple regions of firmware via DFU - * but doesn't support - * - versioning of firmware image - * - package information - */ - /** - * efi_firmware_fit_get_image_info - return information about the current + * efi_firmware_get_image_info - return information about the current * firmware image * @this: Protocol instance * @image_info_size: Size of @image_info @@ -270,7 +260,7 @@ efi_status_t efi_firmware_capsule_authenticate(const void **p_image, * Return status code */ static -efi_status_t EFIAPI efi_firmware_fit_get_image_info( +efi_status_t EFIAPI efi_firmware_get_image_info( struct efi_firmware_management_protocol *this, efi_uintn_t *image_info_size, struct efi_firmware_image_descriptor *image_info, @@ -303,6 +293,16 @@ efi_status_t EFIAPI efi_firmware_fit_get_image_info( return EFI_EXIT(ret); } +#ifdef CONFIG_EFI_CAPSULE_FIRMWARE_FIT +/* + * This FIRMWARE_MANAGEMENT_PROTOCOL driver provides a firmware update + * method with existing FIT image format, and handles + * - multiple regions of firmware via DFU + * but doesn't support + * - versioning of firmware image + * - package information + */ + /** * efi_firmware_fit_set_image - update the firmware image * @this: Protocol instance @@ -348,7 +348,7 @@ efi_status_t EFIAPI efi_firmware_fit_set_image( } const struct efi_firmware_management_protocol efi_fmp_fit = { - .get_image_info = efi_firmware_fit_get_image_info, + .get_image_info = efi_firmware_get_image_info, .get_image = efi_firmware_get_image_unsupported, .set_image = efi_firmware_fit_set_image, .check_image = efi_firmware_check_image_unsupported, @@ -363,58 +363,6 @@ const struct efi_firmware_management_protocol efi_fmp_fit = { * method with raw data. */ -/** - * efi_firmware_raw_get_image_info - return information about the current - * firmware image - * @this: Protocol instance - * @image_info_size: Size of @image_info - * @image_info: Image information - * @descriptor_version: Pointer to version number - * @descriptor_count: Pointer to number of descriptors - * @descriptor_size: Pointer to descriptor size - * @package_version: Package version - * @package_version_name: Package version's name - * - * Return information bout the current firmware image in @image_info. - * @image_info will consist of a number of descriptors. - * Each descriptor will be created based on "dfu_alt_info" variable. - * - * Return status code - */ -static -efi_status_t EFIAPI efi_firmware_raw_get_image_info( - struct efi_firmware_management_protocol *this, - efi_uintn_t *image_info_size, - struct efi_firmware_image_descriptor *image_info, - u32 *descriptor_version, - u8 *descriptor_count, - efi_uintn_t *descriptor_size, - u32 *package_version, - u16 **package_version_name) -{ - efi_status_t ret = EFI_SUCCESS; - - EFI_ENTRY("%p %p %p %p %p %p %p %p\n", this, - image_info_size, image_info, - descriptor_version, descriptor_count, descriptor_size, - package_version, package_version_name); - - if (!image_info_size) - return EFI_EXIT(EFI_INVALID_PARAMETER); - - if (*image_info_size && - (!image_info || !descriptor_version || !descriptor_count || - !descriptor_size || !package_version || !package_version_name)) - return EFI_EXIT(EFI_INVALID_PARAMETER); - - ret = efi_fill_image_desc_array(image_info_size, image_info, - descriptor_version, descriptor_count, - descriptor_size, package_version, - package_version_name); - - return EFI_EXIT(ret); -} - /** * efi_firmware_raw_set_image - update the firmware image * @this: Protocol instance @@ -461,7 +409,7 @@ efi_status_t EFIAPI efi_firmware_raw_set_image( } const struct efi_firmware_management_protocol efi_fmp_raw = { - .get_image_info = efi_firmware_raw_get_image_info, + .get_image_info = efi_firmware_get_image_info, .get_image = efi_firmware_get_image_unsupported, .set_image = efi_firmware_raw_set_image, .check_image = efi_firmware_check_image_unsupported, From 3a0654ecd0d6a39406e6fe91f7a40ce589594ae9 Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Fri, 10 Jun 2022 18:24:48 +0200 Subject: [PATCH 07/68] efi_loader: correctly identify binary name Only on the sandbox the default EFI binary name (e.g. BOOTX64.EFI) must match the host architecture. In all other cases we must use the target architecture. Use #elif where appropriate. Reported-by: Vagrant Cascadian Signed-off-by: Heinrich Schuchardt --- include/efi_default_filename.h | 43 +++++++++++++++++++++------------- 1 file changed, 27 insertions(+), 16 deletions(-) diff --git a/include/efi_default_filename.h b/include/efi_default_filename.h index 13b9de8754..77932984b5 100644 --- a/include/efi_default_filename.h +++ b/include/efi_default_filename.h @@ -5,6 +5,7 @@ * file name is defined in this include. * * Copyright (c) 2022, Heinrich Schuchardt + * Copyright (c) 2022, Linaro Limited */ #ifndef _EFI_DEFAULT_FILENAME_H @@ -14,32 +15,42 @@ #undef BOOTEFI_NAME +#ifdef CONFIG_SANDBOX + #if HOST_ARCH == HOST_ARCH_X86_64 #define BOOTEFI_NAME "BOOTX64.EFI" -#endif - -#if HOST_ARCH == HOST_ARCH_X86 +#elif HOST_ARCH == HOST_ARCH_X86 #define BOOTEFI_NAME "BOOTIA32.EFI" -#endif - -#if HOST_ARCH == HOST_ARCH_AARCH64 +#elif HOST_ARCH == HOST_ARCH_AARCH64 #define BOOTEFI_NAME "BOOTAA64.EFI" -#endif - -#if HOST_ARCH == HOST_ARCH_ARM +#elif HOST_ARCH == HOST_ARCH_ARM #define BOOTEFI_NAME "BOOTARM.EFI" -#endif - -#if HOST_ARCH == HOST_ARCH_RISCV32 +#elif HOST_ARCH == HOST_ARCH_RISCV32 #define BOOTEFI_NAME "BOOTRISCV32.EFI" -#endif - -#if HOST_ARCH == HOST_ARCH_RISCV64 +#elif HOST_ARCH == HOST_ARCH_RISCV64 #define BOOTEFI_NAME "BOOTRISCV64.EFI" +#else +#error Unsupported UEFI architecture #endif -#ifndef BOOTEFI_NAME +#else + +#if defined(CONFIG_ARM64) +#define BOOTEFI_NAME "BOOTAA64.EFI" +#elif defined(CONFIG_ARM) +#define BOOTEFI_NAME "BOOTARM.EFI" +#elif defined(CONFIG_X86_64) +#define BOOTEFI_NAME "BOOTX64.EFI" +#elif defined(CONFIG_X86) +#define BOOTEFI_NAME "BOOTIA32.EFI" +#elif defined(CONFIG_ARCH_RV32I) +#define BOOTEFI_NAME "BOOTRISCV32.EFI" +#elif defined(CONFIG_ARCH_RV64I) +#define BOOTEFI_NAME "BOOTRISCV64.EFI" +#else #error Unsupported UEFI architecture #endif #endif + +#endif From 178667b34bf0aa5312727eba6612b3500adad4a3 Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Sat, 11 Jun 2022 05:22:07 +0000 Subject: [PATCH 08/68] efi_loader: allow booting from short dev only DP Allow booting from a short form device-path without file path, e.g. /HD(1,GPT,5ef79931-a1aa-4c70-9d67-611e8f69eafd,0x800,0x1000) Signed-off-by: Heinrich Schuchardt --- lib/efi_loader/efi_bootmgr.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/lib/efi_loader/efi_bootmgr.c b/lib/efi_loader/efi_bootmgr.c index 93f6590530..9b65f34035 100644 --- a/lib/efi_loader/efi_bootmgr.c +++ b/lib/efi_loader/efi_bootmgr.c @@ -44,7 +44,7 @@ static const struct efi_runtime_services *rs; static struct efi_device_path *expand_media_path(struct efi_device_path *device_path) { - struct efi_device_path *dp, *full_path; + struct efi_device_path *dp, *rem, *full_path; efi_handle_t handle; efi_status_t ret; @@ -57,11 +57,10 @@ struct efi_device_path *expand_media_path(struct efi_device_path *device_path) * booting from removable media. */ dp = device_path; - ret = EFI_CALL(efi_locate_device_path( - &efi_simple_file_system_protocol_guid, - &dp, &handle)); + handle = efi_dp_find_obj(dp, &efi_simple_file_system_protocol_guid, + &rem); if (ret == EFI_SUCCESS) { - if (dp->type == DEVICE_PATH_TYPE_END) { + if (rem->type == DEVICE_PATH_TYPE_END) { dp = efi_dp_from_file(NULL, 0, "/EFI/BOOT/" BOOTEFI_NAME); full_path = efi_dp_append(device_path, dp); From 72fa9cd59edcf99cb32c05604d2a904018acd30a Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Sat, 11 Jun 2022 05:22:08 +0000 Subject: [PATCH 09/68] efi_loader: create boot options without file path Allow the efidebug command to create boot options without file path, e.g. efidebug boot add -b 0001 'short dev only' host 0:1 '' efidebug boot add -B 0002 'long dev only' host 0:1 '' Signed-off-by: Heinrich Schuchardt --- lib/efi_loader/efi_bootmgr.c | 3 +-- lib/efi_loader/efi_device_path.c | 33 +++++++++++++++++++++++--------- 2 files changed, 25 insertions(+), 11 deletions(-) diff --git a/lib/efi_loader/efi_bootmgr.c b/lib/efi_loader/efi_bootmgr.c index 9b65f34035..234073ecb7 100644 --- a/lib/efi_loader/efi_bootmgr.c +++ b/lib/efi_loader/efi_bootmgr.c @@ -46,7 +46,6 @@ struct efi_device_path *expand_media_path(struct efi_device_path *device_path) { struct efi_device_path *dp, *rem, *full_path; efi_handle_t handle; - efi_status_t ret; if (!device_path) return NULL; @@ -59,7 +58,7 @@ struct efi_device_path *expand_media_path(struct efi_device_path *device_path) dp = device_path; handle = efi_dp_find_obj(dp, &efi_simple_file_system_protocol_guid, &rem); - if (ret == EFI_SUCCESS) { + if (handle) { if (rem->type == DEVICE_PATH_TYPE_END) { dp = efi_dp_from_file(NULL, 0, "/EFI/BOOT/" BOOTEFI_NAME); diff --git a/lib/efi_loader/efi_device_path.c b/lib/efi_loader/efi_device_path.c index 50a988c561..171661b897 100644 --- a/lib/efi_loader/efi_device_path.c +++ b/lib/efi_loader/efi_device_path.c @@ -973,9 +973,22 @@ static void path_to_uefi(void *uefi, const char *src) *pos = 0; } -/* - * If desc is NULL, this creates a path with only the file component, - * otherwise it creates a full path with both device and file components +/** + * efi_dp_from_file() - create device path for file + * + * The function creates a device path from the block descriptor @desc and the + * partition number @part and appends a device path node created describing the + * file path @path. + * + * If @desc is NULL, the device path will not contain nodes describing the + * partition. + * If @path is an empty string "", the device path will not contain a node + * for the file path. + * + * @desc: block device descriptor or NULL + * @part: partition number + * @path: file path on partition or "" + * Return: device path or NULL in case of an error */ struct efi_device_path *efi_dp_from_file(struct blk_desc *desc, int part, const char *path) @@ -1002,12 +1015,14 @@ struct efi_device_path *efi_dp_from_file(struct blk_desc *desc, int part, buf = dp_part_fill(buf, desc, part); /* add file-path: */ - fp = buf; - fp->dp.type = DEVICE_PATH_TYPE_MEDIA_DEVICE; - fp->dp.sub_type = DEVICE_PATH_SUB_TYPE_FILE_PATH; - fp->dp.length = (u16)fpsize; - path_to_uefi(fp->str, path); - buf += fpsize; + if (*path) { + fp = buf; + fp->dp.type = DEVICE_PATH_TYPE_MEDIA_DEVICE; + fp->dp.sub_type = DEVICE_PATH_SUB_TYPE_FILE_PATH; + fp->dp.length = (u16)fpsize; + path_to_uefi(fp->str, path); + buf += fpsize; + } *((struct efi_device_path *)buf) = END; From 5b060e465e0d286c271002c42bf8b274a0540692 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 3 May 2022 09:29:21 +0100 Subject: [PATCH 10/68] ARM: tegra: XUSB padctl: Add new lines for errors Add new lines for error messages to make them easier to read. Signed-off-by: Peter Robinson Signed-off-by: Tom Warren --- arch/arm/mach-tegra/xusb-padctl-common.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm/mach-tegra/xusb-padctl-common.c b/arch/arm/mach-tegra/xusb-padctl-common.c index e56e27c8b6..8bdd44ad7a 100644 --- a/arch/arm/mach-tegra/xusb-padctl-common.c +++ b/arch/arm/mach-tegra/xusb-padctl-common.c @@ -84,7 +84,7 @@ tegra_xusb_padctl_group_parse_dt(struct tegra_xusb_padctl *padctl, len = ofnode_read_string_count(node, "nvidia,lanes"); if (len < 0) { - pr_err("failed to parse \"nvidia,lanes\" property"); + pr_err("failed to parse \"nvidia,lanes\" property\n"); return -EINVAL; } @@ -94,7 +94,7 @@ tegra_xusb_padctl_group_parse_dt(struct tegra_xusb_padctl *padctl, ret = ofnode_read_string_index(node, "nvidia,lanes", i, &group->pins[i]); if (ret) { - pr_err("failed to read string from \"nvidia,lanes\" property"); + pr_err("failed to read string from \"nvidia,lanes\" property\n"); return -EINVAL; } } @@ -104,7 +104,7 @@ tegra_xusb_padctl_group_parse_dt(struct tegra_xusb_padctl *padctl, ret = ofnode_read_string_index(node, "nvidia,function", 0, &group->func); if (ret) { - pr_err("failed to parse \"nvidia,func\" property"); + pr_err("failed to parse \"nvidia,func\" property\n"); return -EINVAL; } @@ -232,7 +232,7 @@ tegra_xusb_padctl_config_parse_dt(struct tegra_xusb_padctl *padctl, err = tegra_xusb_padctl_group_parse_dt(padctl, group, subnode); if (err < 0) { - pr_err("failed to parse group %s", group->name); + pr_err("failed to parse group %s\n", group->name); return err; } @@ -261,7 +261,7 @@ static int tegra_xusb_padctl_parse_dt(struct tegra_xusb_padctl *padctl, err = tegra_xusb_padctl_config_parse_dt(padctl, config, subnode); if (err < 0) { - pr_err("failed to parse entry %s: %d", + pr_err("failed to parse entry %s: %d\n", config->name, err); continue; } @@ -289,7 +289,7 @@ int tegra_xusb_process_nodes(ofnode nodes[], unsigned int count, err = tegra_xusb_padctl_parse_dt(&padctl, nodes[i]); if (err < 0) { - pr_err("failed to parse DT: %d", err); + pr_err("failed to parse DT: %d\n", err); continue; } From b5cf255f739db6c1b14e0037853921884c8da2b8 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 3 May 2022 09:29:22 +0100 Subject: [PATCH 11/68] pci: tegra: Update error prints with new lines Add new lines to make errorr messages easier to read. Signed-off-by: Peter Robinson Signed-off-by: Tom Warren --- drivers/pci/pci_tegra.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/pci/pci_tegra.c b/drivers/pci/pci_tegra.c index f8d66c0e1c..bc489d5ec8 100644 --- a/drivers/pci/pci_tegra.c +++ b/drivers/pci/pci_tegra.c @@ -455,7 +455,7 @@ static int tegra_pcie_parse_port_info(ofnode node, uint *index, uint *lanes) err = ofnode_read_u32_default(node, "nvidia,num-lanes", -1); if (err < 0) { - pr_err("failed to parse \"nvidia,num-lanes\" property"); + pr_err("failed to parse \"nvidia,num-lanes\" property\n"); return err; } @@ -463,7 +463,7 @@ static int tegra_pcie_parse_port_info(ofnode node, uint *index, uint *lanes) err = ofnode_read_pci_addr(node, 0, "reg", &addr); if (err < 0) { - pr_err("failed to parse \"reg\" property"); + pr_err("failed to parse \"reg\" property\n"); return err; } From 0d2105ae5e32ef5c87246054b2638fe50e62448c Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 3 May 2022 09:32:54 +0100 Subject: [PATCH 12/68] arm: tegra: Update some DT compatibles Some of the DT compatibles have changed upstream so add new DT compatibles to ensure things continue to keep working if the device trees are updated. Signed-off-by: Peter Robinson Signed-off-by: Tom Warren --- drivers/i2c/tegra_i2c.c | 1 + drivers/video/tegra124/dp.c | 1 + 2 files changed, 2 insertions(+) diff --git a/drivers/i2c/tegra_i2c.c b/drivers/i2c/tegra_i2c.c index 1e74484542..2394e9d0fb 100644 --- a/drivers/i2c/tegra_i2c.c +++ b/drivers/i2c/tegra_i2c.c @@ -514,6 +514,7 @@ static const struct dm_i2c_ops tegra_i2c_ops = { static const struct udevice_id tegra_i2c_ids[] = { { .compatible = "nvidia,tegra114-i2c", .data = TYPE_114 }, + { .compatible = "nvidia,tegra124-i2c", .data = TYPE_114 }, { .compatible = "nvidia,tegra20-i2c", .data = TYPE_STD }, { .compatible = "nvidia,tegra20-i2c-dvc", .data = TYPE_DVC }, { } diff --git a/drivers/video/tegra124/dp.c b/drivers/video/tegra124/dp.c index 8f5116fe7c..ee4f09a0c4 100644 --- a/drivers/video/tegra124/dp.c +++ b/drivers/video/tegra124/dp.c @@ -1609,6 +1609,7 @@ static int dp_tegra_probe(struct udevice *dev) static const struct udevice_id tegra_dp_ids[] = { { .compatible = "nvidia,tegra124-dpaux" }, + { .compatible = "nvidia,tegra210-dpaux" }, { } }; From 8f27bf114ef48e681f00fcb38ad48d4ab581d0ca Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Sat, 21 May 2022 12:42:46 +0200 Subject: [PATCH 13/68] board: apalis_t30/tk1/colibri_t20/t30: integrate mac address via dt Use device tree to set MAC address of the Ethernet chip. Signed-off-by: Marcel Ziswiler Signed-off-by: Tom Warren --- board/toradex/apalis-tk1/apalis-tk1.c | 19 +++++++++++++++++++ board/toradex/apalis_t30/apalis_t30.c | 20 ++++++++++++++++++++ board/toradex/colibri_t20/colibri_t20.c | 19 +++++++++++++++++++ board/toradex/colibri_t30/colibri_t30.c | 20 ++++++++++++++++++++ 4 files changed, 78 insertions(+) diff --git a/board/toradex/apalis-tk1/apalis-tk1.c b/board/toradex/apalis-tk1/apalis-tk1.c index ccf665b211..86b10400ff 100644 --- a/board/toradex/apalis-tk1/apalis-tk1.c +++ b/board/toradex/apalis-tk1/apalis-tk1.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -99,6 +100,24 @@ int checkboard(void) #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) int ft_board_setup(void *blob, struct bd_info *bd) { + u8 enetaddr[6]; + + /* MAC addr */ + if (eth_env_get_enetaddr("ethaddr", enetaddr)) { + int err = fdt_find_and_setprop(blob, + "/pcie@1003000/pci@2,0/ethernet@0,0", + "local-mac-address", enetaddr, 6, 0); + + /* Older device trees might have used a different node name */ + if (err < 0) + err = fdt_find_and_setprop(blob, + "/pcie@1003000/pci@2,0/pcie@0", + "local-mac-address", enetaddr, 6, 0); + + if (err >= 0) + puts(" MAC address updated...\n"); + } + return ft_common_board_setup(blob, bd); } #endif diff --git a/board/toradex/apalis_t30/apalis_t30.c b/board/toradex/apalis_t30/apalis_t30.c index 0396eea56b..ef71270d9f 100644 --- a/board/toradex/apalis_t30/apalis_t30.c +++ b/board/toradex/apalis_t30/apalis_t30.c @@ -5,6 +5,7 @@ */ #include +#include #include #include #include @@ -16,6 +17,7 @@ #include #include #include +#include #include #include #include "../common/tdx-common.h" @@ -54,6 +56,24 @@ int checkboard(void) #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) int ft_board_setup(void *blob, struct bd_info *bd) { + u8 enetaddr[6]; + + /* MAC addr */ + if (eth_env_get_enetaddr("ethaddr", enetaddr)) { + int err = fdt_find_and_setprop(blob, + "/pcie@3000/pci@3,0/ethernet@0,0", + "local-mac-address", enetaddr, 6, 0); + + /* Older device trees might have used a different node name */ + if (err < 0) + err = fdt_find_and_setprop(blob, + "/pcie@3000/pci@3,0/pcie@0", + "local-mac-address", enetaddr, 6, 0); + + if (err >= 0) + puts(" MAC address updated...\n"); + } + return ft_common_board_setup(blob, bd); } #endif diff --git a/board/toradex/colibri_t20/colibri_t20.c b/board/toradex/colibri_t20/colibri_t20.c index 73ef4d2db3..c58d2021cd 100644 --- a/board/toradex/colibri_t20/colibri_t20.c +++ b/board/toradex/colibri_t20/colibri_t20.c @@ -4,6 +4,7 @@ */ #include +#include #include #include #include @@ -81,6 +82,24 @@ int checkboard(void) #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) int ft_board_setup(void *blob, struct bd_info *bd) { + u8 enetaddr[6]; + + /* MAC addr */ + if (eth_env_get_enetaddr("ethaddr", enetaddr)) { + int err = fdt_find_and_setprop(blob, + "/usb@7d004000/ethernet@1", + "local-mac-address", enetaddr, 6, 0); + + /* Older device trees might have used a different node name */ + if (err < 0) + err = fdt_find_and_setprop(blob, + "/usb@7d004000/asix@1", + "local-mac-address", enetaddr, 6, 0); + + if (err >= 0) + puts(" MAC address updated...\n"); + } + return ft_common_board_setup(blob, bd); } #endif diff --git a/board/toradex/colibri_t30/colibri_t30.c b/board/toradex/colibri_t30/colibri_t30.c index 20cbb75a36..b6b004669c 100644 --- a/board/toradex/colibri_t30/colibri_t30.c +++ b/board/toradex/colibri_t30/colibri_t30.c @@ -5,6 +5,7 @@ */ #include +#include #include #include #include @@ -12,6 +13,7 @@ #include #include #include +#include #include #include #include "pinmux-config-colibri_t30.h" @@ -36,6 +38,24 @@ int checkboard(void) #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) int ft_board_setup(void *blob, struct bd_info *bd) { + u8 enetaddr[6]; + + /* MAC addr */ + if (eth_env_get_enetaddr("ethaddr", enetaddr)) { + int err = fdt_find_and_setprop(blob, + "/usb@7d004000/ethernet@1", + "local-mac-address", enetaddr, 6, 0); + + /* Older device trees might have used a different node name */ + if (err < 0) + err = fdt_find_and_setprop(blob, + "/usb@7d004000/asix@1", + "local-mac-address", enetaddr, 6, 0); + + if (err >= 0) + puts(" MAC address updated...\n"); + } + return ft_common_board_setup(blob, bd); } #endif From 752bea3ca4d095e4da948c643fc6d6ea7427c773 Mon Sep 17 00:00:00 2001 From: Rasmus Villemoes Date: Tue, 3 May 2022 10:58:06 +0200 Subject: [PATCH 14/68] pmic: pca9450: add DM_I2C dependencies in Kconfig The pca9450 driver uses dm_i2c_{read,write}, which are (unsurprisingly) only available with DM_I2C. Make sure one can't create an unbuildable .config by adding proper dependencies. While here, append "in SPL" to the prompt for the SPL_ variant so it doesn't read the same as the one for the non-SPL_ variant. Signed-off-by: Rasmus Villemoes Reviewed-by: Jaehoon Chung --- drivers/power/pmic/Kconfig | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/power/pmic/Kconfig b/drivers/power/pmic/Kconfig index bb3960020d..66b16b06e0 100644 --- a/drivers/power/pmic/Kconfig +++ b/drivers/power/pmic/Kconfig @@ -158,13 +158,15 @@ config SPL_DM_PMIC_MP5416 config DM_PMIC_PCA9450 bool "Enable Driver Model for PMIC PCA9450" + depends on DM_I2C help This config enables implementation of driver-model pmic uclass features for PMIC PCA9450. The driver implements read/write operations. config SPL_DM_PMIC_PCA9450 - bool "Enable Driver Model for PMIC PCA9450" + bool "Enable Driver Model for PMIC PCA9450 in SPL" depends on SPL_DM_PMIC + depends on SPL_DM_I2C help This config enables implementation of driver-model pmic uclass features for PMIC PCA9450 in SPL. The driver implements read/write operations. From c18e5fb055ab789f58434e3cb432582adee0134c Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Tue, 14 Jun 2022 13:59:23 -0400 Subject: [PATCH 15/68] dtoc: Update test_src_scan.py for new tegra compatibles This test was written to match up with the list of compatibles in drivers/i2c/tegra_i2c.c so adding another one requires the test to be updated to match. Fixes: 0d2105ae5e32 ("arm: tegra: Update some DT compatibles") Signed-off-by: Tom Rini --- tools/dtoc/test_src_scan.py | 1 + 1 file changed, 1 insertion(+) diff --git a/tools/dtoc/test_src_scan.py b/tools/dtoc/test_src_scan.py index bdfa669d81..f93cd7f5a3 100644 --- a/tools/dtoc/test_src_scan.py +++ b/tools/dtoc/test_src_scan.py @@ -151,6 +151,7 @@ class TestSrcScan(unittest.TestCase): self.assertEqual('UCLASS_I2C', drv.uclass_id) self.assertEqual( {'nvidia,tegra114-i2c': 'TYPE_114', + 'nvidia,tegra124-i2c': 'TYPE_114', 'nvidia,tegra20-i2c': 'TYPE_STD', 'nvidia,tegra20-i2c-dvc': 'TYPE_DVC'}, drv.compat) self.assertEqual('i2c_bus', drv.priv) From e104a9f8eb9f105c784e4b8addb5147001de0df6 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Tue, 3 May 2022 16:03:04 -0300 Subject: [PATCH 16/68] imx8mn_evk: Add the missing spl.bin entry The generated flash.bin does not boot the imx8mn evk LPDDR4 variant as it misses the spl.bin description in binman. Add its entry to fix the boot on the imx8mn evk LPDDR4 variant. Signed-off-by: Fabio Estevam Tested-by: Arti Zirk Reviewed-by: Alper Nebi Yasak --- arch/arm/dts/imx8mn-evk-u-boot.dtsi | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/arm/dts/imx8mn-evk-u-boot.dtsi b/arch/arm/dts/imx8mn-evk-u-boot.dtsi index 3db46d4cbc..593cf06eb9 100644 --- a/arch/arm/dts/imx8mn-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mn-evk-u-boot.dtsi @@ -58,7 +58,9 @@ }; - flash { + spl { + filename = "spl.bin"; + mkimage { args = "-n spl/u-boot-spl.cfgout -T imx8mimage -e 0x912000"; From 4941035143a467bb356af7bfe6bfe3f04b2186f1 Mon Sep 17 00:00:00 2001 From: Philippe Schenker Date: Mon, 9 May 2022 18:58:15 +0200 Subject: [PATCH 17/68] toradex: tdx-cfg-block: add new 8gb apalis-imx8 0067: Apalis iMX8 QuadMax 8GB Wi-Fi / BT IT This module is identical to its 4GB counterpart 0037: Apalis iMX8 QuadMax 4GB Wi-Fi / BT IT except for the RAM size. Signed-off-by: Philippe Schenker Reviewed-by: Francesco Dolcini Acked-by: Marcel Ziswiler --- board/toradex/common/tdx-cfg-block.c | 18 ++++++++++++++++-- board/toradex/common/tdx-cfg-block.h | 1 + 2 files changed, 17 insertions(+), 2 deletions(-) diff --git a/board/toradex/common/tdx-cfg-block.c b/board/toradex/common/tdx-cfg-block.c index 9c87289ae9..6c8cf4592d 100644 --- a/board/toradex/common/tdx-cfg-block.c +++ b/board/toradex/common/tdx-cfg-block.c @@ -144,6 +144,7 @@ const char * const toradex_modules[] = { [64] = "Verdin iMX8M Plus Quad 2GB Wi-Fi / BT IT", [65] = "Verdin iMX8M Plus QuadLite 1GB IT", [66] = "Verdin iMX8M Plus Quad 8GB Wi-Fi / BT", + [67] = "Apalis iMX8 QuadMax 8GB Wi-Fi / BT IT", }; const char * const toradex_carrier_boards[] = { @@ -359,6 +360,7 @@ static int get_cfgblock_interactive(void) char *soc; char it = 'n'; char wb = 'n'; + char mem8g = 'n'; int len = 0; /* Unknown module by default */ @@ -377,6 +379,14 @@ static int get_cfgblock_interactive(void) sprintf(message, "Does the module have Wi-Fi / Bluetooth? [y/N] "); len = cli_readline(message); wb = console_buffer[0]; + +#if defined(CONFIG_TARGET_APALIS_IMX8) + if ((wb == 'y' || wb == 'Y') && (it == 'y' || it == 'Y')) { + sprintf(message, "Does your module have 8GB of RAM? [y/N] "); + len = cli_readline(message); + mem8g = console_buffer[0]; + } +#endif #endif soc = env_get("soc"); @@ -430,8 +440,12 @@ static int get_cfgblock_interactive(void) tdx_hw_tag.prodid = COLIBRI_IMX7S; else if (is_cpu_type(MXC_CPU_IMX8QM)) { if (it == 'y' || it == 'Y') { - if (wb == 'y' || wb == 'Y') - tdx_hw_tag.prodid = APALIS_IMX8QM_WIFI_BT_IT; + if (wb == 'y' || wb == 'Y') { + if (mem8g == 'y' || mem8g == 'Y') + tdx_hw_tag.prodid = APALIS_IMX8QM_8GB_WIFI_BT_IT; + else + tdx_hw_tag.prodid = APALIS_IMX8QM_WIFI_BT_IT; + } else tdx_hw_tag.prodid = APALIS_IMX8QM_IT; } else { diff --git a/board/toradex/common/tdx-cfg-block.h b/board/toradex/common/tdx-cfg-block.h index ddcf699748..43e662e41d 100644 --- a/board/toradex/common/tdx-cfg-block.h +++ b/board/toradex/common/tdx-cfg-block.h @@ -87,6 +87,7 @@ enum { VERDIN_IMX8MPQ_2GB_WIFI_BT_IT, VERDIN_IMX8MPQL_IT, /* 65 */ VERDIN_IMX8MPQ_8GB_WIFI_BT, + APALIS_IMX8QM_8GB_WIFI_BT_IT, }; enum { From 0da8dde6343fb91628794f9772b119bc7241c8a1 Mon Sep 17 00:00:00 2001 From: Philippe Schenker Date: Mon, 9 May 2022 18:58:16 +0200 Subject: [PATCH 18/68] board: apalis-imx8: add new 8gb product variant Add the new Apalis iMX8 product variant 0067: Apalis iMX8 QuadMax 8GB Wi-Fi / BT IT the only difference to the product 0037 Apalis iMX8 QuadMax 4GB Wi-Fi / BT IT is the 8gb of RAM. Toradex strategy to choose the correct RAM timing in SCFW is by fuses in the user area telling which RAM timing to load. This commit makes use of this information to set the correct size of the RAM and therefore distinguish between the new 0067 and 0037 product Signed-off-by: Philippe Schenker Reviewed-by: Francesco Dolcini Acked-by: Marcel Ziswiler --- board/toradex/apalis-imx8/apalis-imx8.c | 81 +++++++++++++++++++++++-- 1 file changed, 77 insertions(+), 4 deletions(-) diff --git a/board/toradex/apalis-imx8/apalis-imx8.c b/board/toradex/apalis-imx8/apalis-imx8.c index 04877fcd94..408198843f 100644 --- a/board/toradex/apalis-imx8/apalis-imx8.c +++ b/board/toradex/apalis-imx8/apalis-imx8.c @@ -18,6 +18,7 @@ #include #include #include +#include #include "../common/tdx-cfg-block.h" @@ -28,22 +29,75 @@ DECLARE_GLOBAL_DATA_PTR; (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | \ (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT)) +#define TDX_USER_FUSE_BLOCK1_A 276 +#define TDX_USER_FUSE_BLOCK1_B 277 +#define TDX_USER_FUSE_BLOCK2_A 278 +#define TDX_USER_FUSE_BLOCK2_B 279 + static iomux_cfg_t uart1_pads[] = { SC_P_UART1_RX | MUX_PAD_CTRL(UART_PAD_CTRL), SC_P_UART1_TX | MUX_PAD_CTRL(UART_PAD_CTRL), }; +struct tdx_user_fuses { + u16 pid4; + u16 vers; + u8 ramid; +}; + static void setup_iomux_uart(void) { imx8_iomux_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); } +static uint32_t do_get_tdx_user_fuse(int a, int b) +{ + sc_err_t sciErr; + u32 val_a = 0; + u32 val_b = 0; + + sciErr = sc_misc_otp_fuse_read(-1, a, &val_a); + if (sciErr != SC_ERR_NONE) { + printf("Error reading out user fuse %d\n", a); + return 0; + } + + sciErr = sc_misc_otp_fuse_read(-1, b, &val_b); + if (sciErr != SC_ERR_NONE) { + printf("Error reading out user fuse %d\n", b); + return 0; + } + + return ((val_a & 0xffff) << 16) | (val_b & 0xffff); +} + +static void get_tdx_user_fuse(struct tdx_user_fuses *tdxuserfuse) +{ + u32 fuse_block; + + fuse_block = do_get_tdx_user_fuse(TDX_USER_FUSE_BLOCK2_A, + TDX_USER_FUSE_BLOCK2_B); + + /* + * Fuse block 2 acts as a backup area, if this reads 0 we want to + * use fuse block 1 + */ + if (fuse_block == 0) + fuse_block = do_get_tdx_user_fuse(TDX_USER_FUSE_BLOCK1_A, + TDX_USER_FUSE_BLOCK1_B); + + tdxuserfuse->pid4 = (fuse_block >> 18) & GENMASK(13, 0); + tdxuserfuse->vers = (fuse_block >> 4) & GENMASK(13, 0); + tdxuserfuse->ramid = fuse_block & GENMASK(3, 0); +} + void board_mem_get_layout(u64 *phys_sdram_1_start, u64 *phys_sdram_1_size, u64 *phys_sdram_2_start, u64 *phys_sdram_2_size) { u32 is_quadplus = 0, val = 0; + struct tdx_user_fuses tdxramfuses; sc_err_t scierr = sc_misc_otp_fuse_read(-1, 6, &val); if (scierr == SC_ERR_NONE) { @@ -51,14 +105,33 @@ void board_mem_get_layout(u64 *phys_sdram_1_start, is_quadplus = ((val >> 4) & 0x3) != 0x0; } + get_tdx_user_fuse(&tdxramfuses); + *phys_sdram_1_start = PHYS_SDRAM_1; *phys_sdram_1_size = PHYS_SDRAM_1_SIZE; *phys_sdram_2_start = PHYS_SDRAM_2; - if (is_quadplus) - /* Our QP based SKUs only have 2 GB RAM (PHYS_SDRAM_1_SIZE) */ + + switch (tdxramfuses.ramid) { + case 1: + *phys_sdram_2_size = SZ_2G; + break; + case 2: *phys_sdram_2_size = 0x0UL; - else - *phys_sdram_2_size = PHYS_SDRAM_2_SIZE; + break; + case 3: + *phys_sdram_2_size = SZ_2G; + break; + case 4: + *phys_sdram_2_size = SZ_4G + SZ_2G; + break; + default: + if (is_quadplus) + /* Our QP based SKUs only have 2 GB RAM (PHYS_SDRAM_1_SIZE) */ + *phys_sdram_2_size = 0x0UL; + else + *phys_sdram_2_size = PHYS_SDRAM_2_SIZE; + break; + } } int board_early_init_f(void) From 827ded0e82e5a000cfb4e7bd2697a320c65d835a Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Tue, 17 May 2022 13:23:09 -0300 Subject: [PATCH 19/68] imx8mn_evk: Add Ethernet support to the LPDDR4 variant The imx8mn-ddr4-evk board has Ethernet support already, but the lpddr4 board does not. Add Ethernet support for the LPDDR4 variant too. Signed-off-by: Fabio Estevam --- configs/imx8mn_evk_defconfig | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/configs/imx8mn_evk_defconfig b/configs/imx8mn_evk_defconfig index c18c19fa14..52954b0463 100644 --- a/configs/imx8mn_evk_defconfig +++ b/configs/imx8mn_evk_defconfig @@ -46,6 +46,9 @@ CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_CMD_REGULATOR=y CONFIG_CMD_EXT4_WRITE=y @@ -70,7 +73,12 @@ CONFIG_MMC_HS400_SUPPORT=y CONFIG_SPL_MMC_HS400_SUPPORT=y CONFIG_FSL_USDHC=y CONFIG_PHYLIB=y +CONFIG_PHY_ATHEROS=y CONFIG_DM_ETH=y +CONFIG_DM_ETH_PHY=y +CONFIG_PHY_GIGE=y +CONFIG_FEC_MXC=y +CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_IMX8M=y From 4cc25cd5ce6923ccd0a6164703bcbde0216fd77d Mon Sep 17 00:00:00 2001 From: Nate Drude Date: Thu, 19 May 2022 12:31:56 +0300 Subject: [PATCH 20/68] phy: adin: fix broken support for adi, phy-mode-override Currently, the adin driver fails to compile. The original patch introducing the adin driver used the function phy_get_interface_by_name to support the adi,phy-mode-override property. Unfortunately, a few days before the adin patch was accepted, another patch removed support for phy_get_interface_by_name: https://github.com/u-boot/u-boot/commit/123ca114e07ecf28aa2538748d733e2b22d8b8b5 This patch refactors adin_get_phy_mode_override, implementing the logic in the new function, ofnode_read_phy_mode, from the patch above. Signed-off-by: Nate Drude Tested-by: Josua Mayer Signed-off-by: Josua Mayer --- drivers/net/phy/adin.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/drivers/net/phy/adin.c b/drivers/net/phy/adin.c index cff841ab3d..e60f288b9b 100644 --- a/drivers/net/phy/adin.c +++ b/drivers/net/phy/adin.c @@ -100,27 +100,27 @@ static u32 adin_get_reg_value(struct phy_device *phydev, * The function gets phy-mode string from property 'adi,phy-mode-override' * and return its index in phy_interface_strings table, or -1 in error case. */ -int adin_get_phy_mode_override(struct phy_device *phydev) +phy_interface_t adin_get_phy_mode_override(struct phy_device *phydev) { ofnode node = phy_get_ofnode(phydev); const char *phy_mode_override; const char *prop_phy_mode_override = "adi,phy-mode-override"; - int override_interface; + int i; phy_mode_override = ofnode_read_string(node, prop_phy_mode_override); if (!phy_mode_override) - return -ENODEV; + return PHY_INTERFACE_MODE_NA; debug("%s: %s = '%s'\n", __func__, prop_phy_mode_override, phy_mode_override); - override_interface = phy_get_interface_by_name(phy_mode_override); + for (i = 0; i < PHY_INTERFACE_MODE_MAX; i++) + if (!strcmp(phy_mode_override, phy_interface_strings[i])) + return (phy_interface_t) i; - if (override_interface < 0) - printf("%s: %s = '%s' is not valid\n", - __func__, prop_phy_mode_override, phy_mode_override); + printf("%s: Invalid PHY interface '%s'\n", __func__, phy_mode_override); - return override_interface; + return PHY_INTERFACE_MODE_NA; } static u16 adin_ext_read(struct phy_device *phydev, const u32 regnum) @@ -148,10 +148,10 @@ static int adin_config_rgmii_mode(struct phy_device *phydev) { u16 reg_val; u32 val; - int phy_mode_override = adin_get_phy_mode_override(phydev); + phy_interface_t phy_mode_override = adin_get_phy_mode_override(phydev); - if (phy_mode_override >= 0) { - phydev->interface = (phy_interface_t) phy_mode_override; + if (phy_mode_override != PHY_INTERFACE_MODE_NA) { + phydev->interface = phy_mode_override; } reg_val = adin_ext_read(phydev, ADIN1300_GE_RGMII_CFG); From 54337abb141d898ae114f51619531cf905d5b0b5 Mon Sep 17 00:00:00 2001 From: Josua Mayer Date: Thu, 19 May 2022 12:31:57 +0300 Subject: [PATCH 21/68] phy: adin: add support for clock output The ADIN1300 supports generating certain clocks on its GP_CLK pin, as well as providing the reference clock on CLK25_REF. Add support for selecting the clock via device-tree properties. This patch is based on the Linux implementation for this feature, which has been added to netdev/net-next.git [1]. [2] https://patchwork.kernel.org/project/netdevbpf/cover/20220517085143.3749-1-josua@solid-run.com/ Signed-off-by: Josua Mayer --- drivers/net/phy/adin.c | 42 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 42 insertions(+) diff --git a/drivers/net/phy/adin.c b/drivers/net/phy/adin.c index e60f288b9b..a5bfd960d9 100644 --- a/drivers/net/phy/adin.c +++ b/drivers/net/phy/adin.c @@ -4,6 +4,7 @@ * * Copyright 2019 Analog Devices Inc. * Copyright 2022 Variscite Ltd. + * Copyright 2022 Josua Mayer */ #include #include @@ -13,6 +14,16 @@ #define PHY_ID_ADIN1300 0x0283bc30 #define ADIN1300_EXT_REG_PTR 0x10 #define ADIN1300_EXT_REG_DATA 0x11 + +#define ADIN1300_GE_CLK_CFG_REG 0xff1f +#define ADIN1300_GE_CLK_CFG_MASK GENMASK(5, 0) +#define ADIN1300_GE_CLK_CFG_RCVR_125 BIT(5) +#define ADIN1300_GE_CLK_CFG_FREE_125 BIT(4) +#define ADIN1300_GE_CLK_CFG_REF_EN BIT(3) +#define ADIN1300_GE_CLK_CFG_HRT_RCVR BIT(2) +#define ADIN1300_GE_CLK_CFG_HRT_FREE BIT(1) +#define ADIN1300_GE_CLK_CFG_25 BIT(0) + #define ADIN1300_GE_RGMII_CFG 0xff23 #define ADIN1300_GE_RGMII_RX_MSK GENMASK(8, 6) #define ADIN1300_GE_RGMII_RX_SEL(x) \ @@ -144,6 +155,33 @@ static int adin_ext_write(struct phy_device *phydev, const u32 regnum, const u16 return phy_write(phydev, MDIO_DEVAD_NONE, ADIN1300_EXT_REG_DATA, val); } +static int adin_config_clk_out(struct phy_device *phydev) +{ + ofnode node = phy_get_ofnode(phydev); + const char *val = NULL; + u8 sel = 0; + + val = ofnode_read_string(node, "adi,phy-output-clock"); + if (!val) { + /* property not present, do not enable GP_CLK pin */ + } else if (strcmp(val, "25mhz-reference") == 0) { + sel |= ADIN1300_GE_CLK_CFG_25; + } else if (strcmp(val, "125mhz-free-running") == 0) { + sel |= ADIN1300_GE_CLK_CFG_FREE_125; + } else if (strcmp(val, "adaptive-free-running") == 0) { + sel |= ADIN1300_GE_CLK_CFG_HRT_FREE; + } else { + pr_err("%s: invalid adi,phy-output-clock\n", __func__); + return -EINVAL; + } + + if (ofnode_read_bool(node, "adi,phy-output-reference-clock")) + sel |= ADIN1300_GE_CLK_CFG_REF_EN; + + return adin_ext_write(phydev, ADIN1300_GE_CLK_CFG_REG, + ADIN1300_GE_CLK_CFG_MASK & sel); +} + static int adin_config_rgmii_mode(struct phy_device *phydev) { u16 reg_val; @@ -202,6 +240,10 @@ static int adin1300_config(struct phy_device *phydev) printf("ADIN1300 PHY detected at addr %d\n", phydev->addr); + ret = adin_config_clk_out(phydev); + if (ret < 0) + return ret; + ret = adin_config_rgmii_mode(phydev); if (ret < 0) From 17baba4682001cc11446ff8406c63850b46edf72 Mon Sep 17 00:00:00 2001 From: Josua Mayer Date: Thu, 19 May 2022 12:31:58 +0300 Subject: [PATCH 22/68] ARM: dts: imx6qdl-sr-som: add support for alternate phy addresses The Cubox has an unstable phy address - which can appear at either address 0 (intended) or 4 (unintended). SoM revision 1.9 has replaced the ar8035 phy with an adin1300, which will always appear at address 1. Change the reg property of the phy node to the magic value 0xffffffff, which indicates to the generic phy driver that all addresses should be probed. That allows the same node (which is pinned by phy-handle) to match either the AR8035 PHY at both possible addresses, as well as the new one at address 1. Also add the new adi,phy-output-clock property for enabling the 125MHz clock used by the fec ethernet controller, as submitted to Linux [1]. Linux solves this problem differently: For the ar8035 phy it will probe both phy nodes in device-tree in order, and use the one that succeeds. For the new adin1300 it expects U-Boot to patch the status field in the DTB before booting While at it also sync the reset-delay with the upstream Linux dtb. [1] https://patchwork.kernel.org/project/netdevbpf/patch/20220428082848.12191-4-josua@solid-run.com/ Signed-off-by: Josua Mayer --- arch/arm/dts/imx6qdl-sr-som.dtsi | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/arch/arm/dts/imx6qdl-sr-som.dtsi b/arch/arm/dts/imx6qdl-sr-som.dtsi index b06577808f..c20bed2721 100644 --- a/arch/arm/dts/imx6qdl-sr-som.dtsi +++ b/arch/arm/dts/imx6qdl-sr-som.dtsi @@ -55,7 +55,13 @@ pinctrl-0 = <&pinctrl_microsom_enet_ar8035>; phy-handle = <&phy>; phy-mode = "rgmii-id"; - phy-reset-duration = <2>; + + /* + * The PHY seems to require a long-enough reset duration to avoid + * some rare issues where the PHY gets stuck in an inconsistent and + * non-functional state at boot-up. 10ms proved to be fine . + */ + phy-reset-duration = <10>; phy-reset-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; status = "okay"; @@ -64,8 +70,15 @@ #size-cells = <0>; phy: ethernet-phy@0 { - reg = <0>; + /* + * The PHY can appear either: + * - AR8035: at address 0 or 4 + * - ADIN1300: at address 1 + * Actual address being detected at runtime. + */ + reg = <0xffffffff>; qca,clk-out-frequency = <125000000>; + adi,phy-output-clock = "125mhz-free-running"; }; }; }; From 741ce3084efffee6b43b88a389caf0f64eaf80e8 Mon Sep 17 00:00:00 2001 From: Josua Mayer Date: Thu, 19 May 2022 12:31:59 +0300 Subject: [PATCH 23/68] mx6cuboxi: fixup dtb ethernet phy nodes before booting an OS SoM revision 1.9 has replaced the ar8035 phy address 0 with an adin1300 at address 1. Because early SoMs had a hardware flaw, the ar8035 can also appear at address 4 - making it a total of 3 phy nodes in the DTB. To avoid confusing Linux with probe errors, fixup the dtb to only enable the phy node that is detected at runtime. Signed-off-by: Josua Mayer --- board/solidrun/mx6cuboxi/mx6cuboxi.c | 78 ++++++++++++++++++++++++++++ configs/mx6cuboxi_defconfig | 1 + 2 files changed, 79 insertions(+) diff --git a/board/solidrun/mx6cuboxi/mx6cuboxi.c b/board/solidrun/mx6cuboxi/mx6cuboxi.c index 6207bf8253..42aa5cb63c 100644 --- a/board/solidrun/mx6cuboxi/mx6cuboxi.c +++ b/board/solidrun/mx6cuboxi/mx6cuboxi.c @@ -1,5 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* + * Copyright (C) 2022 Josua Mayer + * * Copyright (C) 2015 Freescale Semiconductor, Inc. * * Author: Fabio Estevam @@ -39,6 +41,8 @@ #include #include #include +#include +#include DECLARE_GLOBAL_DATA_PTR; @@ -407,6 +411,80 @@ out: return 0; } +static int find_ethernet_phy(void) +{ + struct mii_dev *bus = NULL; + struct phy_device *phydev = NULL; + int phy_addr = -ENOENT; + +#ifdef CONFIG_FEC_MXC + bus = fec_get_miibus(ENET_BASE_ADDR, -1); + if (!bus) + return -ENOENT; + + // scan address 0, 1, 4 + phydev = phy_find_by_mask(bus, 0b00010011); + if (!phydev) { + free(bus); + return -ENOENT; + } + pr_debug("%s: detected ethernet phy at address %d\n", __func__, phydev->addr); + phy_addr = phydev->addr; + + free(phydev); +#endif + + return phy_addr; +} + +#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) +/* + * Configure the correct ethernet PHYs nodes in device-tree: + * - AR8035 at addresses 0 or 4: Cubox + * - AR8035 at address 0: HummingBoard, HummingBoard 2 + * - ADIN1300 at address 1: since SoM rev 1.9 + */ +int ft_board_setup(void *fdt, struct bd_info *bd) +{ + int node_phy0, node_phy1, node_phy4; + int ret, phy; + bool enable_phy0 = false, enable_phy1 = false, enable_phy4 = false; + + // detect phy + phy = find_ethernet_phy(); + if (phy == 0 || phy == 4) { + enable_phy0 = true; + switch (board_type()) { + case CUBOXI: + case UNKNOWN: + default: + enable_phy4 = true; + } + } else if (phy == 1) { + enable_phy1 = true; + } else { + pr_err("%s: couldn't detect ethernet phy, not patching dtb!\n", __func__); + return 0; + } + + // update all phy nodes status + node_phy0 = fdt_path_offset(fdt, "/soc/bus@2100000/ethernet@2188000/mdio/ethernet-phy@0"); + ret = fdt_setprop_string(fdt, node_phy0, "status", enable_phy0 ? "okay" : "disabled"); + if (ret < 0 && enable_phy0) + pr_err("%s: failed to enable ethernet phy at address 0 in dtb!\n", __func__); + node_phy1 = fdt_path_offset(fdt, "/soc/bus@2100000/ethernet@2188000/mdio/ethernet-phy@1"); + ret = fdt_setprop_string(fdt, node_phy1, "status", enable_phy1 ? "okay" : "disabled"); + if (ret < 0 && enable_phy1) + pr_err("%s: failed to enable ethernet phy at address 1 in dtb!\n", __func__); + node_phy4 = fdt_path_offset(fdt, "/soc/bus@2100000/ethernet@2188000/mdio/ethernet-phy@4"); + ret = fdt_setprop_string(fdt, node_phy4, "status", enable_phy4 ? "okay" : "disabled"); + if (ret < 0 && enable_phy4) + pr_err("%s: failed to enable ethernet phy at address 4 in dtb!\n", __func__); + + return 0; +} +#endif + /* Override the default implementation, DT model is not accurate */ int show_board_info(void) { diff --git a/configs/mx6cuboxi_defconfig b/configs/mx6cuboxi_defconfig index 1e2e332af9..d3ac8eeeba 100644 --- a/configs/mx6cuboxi_defconfig +++ b/configs/mx6cuboxi_defconfig @@ -22,6 +22,7 @@ CONFIG_CMD_HDMIDETECT=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y +CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="if hdmidet; then usb start; setenv stdin serial,usbkbd; setenv stdout serial,vidconsole; setenv stderr serial,vidconsole; else setenv stdin serial; setenv stdout serial; setenv stderr serial; fi;" From 815216187e9c93dddb6c65ea2b114c19ca083654 Mon Sep 17 00:00:00 2001 From: Josua Mayer Date: Thu, 19 May 2022 12:32:00 +0300 Subject: [PATCH 24/68] mx6cuboxi: enable driver for adin1300 phy Since SoMs revision 1.9 the ar8035 phy has been replaced by adin1300. Enable the driver so that the new SoMs have functional networking. Signed-off-by: Josua Mayer --- configs/mx6cuboxi_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/mx6cuboxi_defconfig b/configs/mx6cuboxi_defconfig index d3ac8eeeba..46634a1727 100644 --- a/configs/mx6cuboxi_defconfig +++ b/configs/mx6cuboxi_defconfig @@ -55,6 +55,7 @@ CONFIG_DWC_AHSATA=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_FSL_USDHC=y CONFIG_PHYLIB=y +CONFIG_PHY_ADIN=y CONFIG_PHY_ATHEROS=y CONFIG_DM_ETH=y CONFIG_FEC_MXC=y From a3f2dcf8f44445703a1919a5fa83b4328b244f92 Mon Sep 17 00:00:00 2001 From: Philippe Schenker Date: Wed, 25 May 2022 09:55:02 +0200 Subject: [PATCH 25/68] verdin-imx8mm, verdin-imx8mp: Fix default systemd console output systemd prints its messages on the last console= statement that it finds in the kernel arguments. The current ordering sends the systemd messages to tty1, by default this is the display. Ensure that systemd sends its messages to the default UART, reorder the console= statements accordingly. Signed-off-by: Philippe Schenker Reviewed-by: Stefano Babic Acked-by: Marcel Ziswiler Signed-off-by: Marcel Ziswiler --- include/configs/verdin-imx8mm.h | 4 ++-- include/configs/verdin-imx8mp.h | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h index cd950ad055..558b78115d 100644 --- a/include/configs/verdin-imx8mm.h +++ b/include/configs/verdin-imx8mm.h @@ -58,8 +58,8 @@ "fdt_board=dev\0" \ "initrd_addr=0x43800000\0" \ "initrd_high=0xffffffffffffffff\0" \ - "setup=setenv setupargs console=${console},${baudrate} " \ - "console=tty1 consoleblank=0 earlycon\0" \ + "setup=setenv setupargs console=tty1 console=${console},${baudrate} " \ + "consoleblank=0 earlycon\0" \ "update_uboot=askenv confirm Did you load flash.bin (y/N)?; " \ "if test \"$confirm\" = \"y\"; then " \ "setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt " \ diff --git a/include/configs/verdin-imx8mp.h b/include/configs/verdin-imx8mp.h index 470f64d5a7..52fa2be3ab 100644 --- a/include/configs/verdin-imx8mp.h +++ b/include/configs/verdin-imx8mp.h @@ -75,7 +75,7 @@ "fdt_board=dev\0" \ "initrd_addr=0x43800000\0" \ "initrd_high=0xffffffffffffffff\0" \ - "setup=setenv setupargs console=${console},${baudrate} console=tty1 " \ + "setup=setenv setupargs console=tty1 console=${console},${baudrate} " \ "consoleblank=0 earlycon\0" \ "update_uboot=askenv confirm Did you load flash.bin (y/N)?; " \ "if test \"$confirm\" = \"y\"; then " \ From 698c0411cfabcd245027400961d184d0e072a22c Mon Sep 17 00:00:00 2001 From: Andrey Zhizhikin Date: Fri, 3 Jun 2022 17:15:21 +0200 Subject: [PATCH 26/68] clk: imx8mp: fix root clock names for ecspi Root clock name contained underscore, which does not match to the actual clock name. Correct the name to match what is present in the FDT. Fixes: 87f958810fcb ("clk: imx8mp: Add ECSPI clocks") Signed-off-by: Andrey Zhizhikin Cc: Fabio Estevam Cc: Peng Fan Cc: Stefano Babic Cc: uboot-imx Reviewed-by: Fabio Estevam --- drivers/clk/imx/clk-imx8mp.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c index ac727b7e40..cbed86a684 100644 --- a/drivers/clk/imx/clk-imx8mp.c +++ b/drivers/clk/imx/clk-imx8mp.c @@ -122,15 +122,15 @@ static const char *imx8mp_gic_sels[] = {"clock-osc-24m", "sys_pll2_200m", "sys_p "sys_pll2_100m", "sys_pll1_800m", "sys_pll2_500m", "clk_ext4", "audio_pll2_out" }; -static const char *imx8mp_ecspi1_sels[] = {"clock-osc_24m", "sys_pll2_200m", "sys_pll1_40m", +static const char *imx8mp_ecspi1_sels[] = {"clock-osc-24m", "sys_pll2_200m", "sys_pll1_40m", "sys_pll1_160m", "sys_pll1_800m", "sys_pll3_out", "sys_pll2_250m", "audio_pll2_out", }; -static const char *imx8mp_ecspi2_sels[] = {"clock-osc_24m", "sys_pll2_200m", "sys_pll1_40m", +static const char *imx8mp_ecspi2_sels[] = {"clock-osc-24m", "sys_pll2_200m", "sys_pll1_40m", "sys_pll1_160m", "sys_pll1_800m", "sys_pll3_out", "sys_pll2_250m", "audio_pll2_out", }; -static const char *imx8mp_ecspi3_sels[] = {"clock-osc_24m", "sys_pll2_200m", "sys_pll1_40m", +static const char *imx8mp_ecspi3_sels[] = {"clock-osc-24m", "sys_pll2_200m", "sys_pll1_40m", "sys_pll1_160m", "sys_pll1_800m", "sys_pll3_out", "sys_pll2_250m", "audio_pll2_out", }; From 65d5931d02d47eacdb26b879a252064bf728ae12 Mon Sep 17 00:00:00 2001 From: Andrey Zhizhikin Date: Fri, 3 Jun 2022 17:15:22 +0200 Subject: [PATCH 27/68] clk: imx8mp: use usb_core_ref for usb_root_clk Upstream commit 7a2c3be95a50 ("clk: imx8mp: Fill in DWC3 USB, USB PHY, HSIOMIX clock") added usb_core_ref for USB Controller but never set it to be used as a clock source, using rather "osc_32k" instead. This produces following boot log message: "clk_register: failed to get osc_32k device (parent of usb_root_clk)" Fix the USB controller clock source by using usb_core_ref instead of osc_32k. Fixes: 7a2c3be95a50 ("clk: imx8mp: Fill in DWC3 USB, USB PHY, HSIOMIX clock") Signed-off-by: Andrey Zhizhikin Cc: Fabio Estevam Cc: Peng Fan Cc: Stefano Babic Reviewed-by: Fabio Estevam --- drivers/clk/imx/clk-imx8mp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c index cbed86a684..ffbc1d1ba9 100644 --- a/drivers/clk/imx/clk-imx8mp.c +++ b/drivers/clk/imx/clk-imx8mp.c @@ -300,7 +300,7 @@ static int imx8mp_clk_probe(struct udevice *dev) clk_dm(IMX8MP_CLK_UART2_ROOT, imx_clk_gate4("uart2_root_clk", "uart2", base + 0x44a0, 0)); clk_dm(IMX8MP_CLK_UART3_ROOT, imx_clk_gate4("uart3_root_clk", "uart3", base + 0x44b0, 0)); clk_dm(IMX8MP_CLK_UART4_ROOT, imx_clk_gate4("uart4_root_clk", "uart4", base + 0x44c0, 0)); - clk_dm(IMX8MP_CLK_USB_ROOT, imx_clk_gate4("usb_root_clk", "osc_32k", base + 0x44d0, 0)); + clk_dm(IMX8MP_CLK_USB_ROOT, imx_clk_gate4("usb_root_clk", "usb_core_ref", base + 0x44d0, 0)); clk_dm(IMX8MP_CLK_USB_PHY_ROOT, imx_clk_gate4("usb_phy_root_clk", "usb_phy_ref", base + 0x44f0, 0)); clk_dm(IMX8MP_CLK_USDHC1_ROOT, imx_clk_gate4("usdhc1_root_clk", "usdhc1", base + 0x4510, 0)); clk_dm(IMX8MP_CLK_USDHC2_ROOT, imx_clk_gate4("usdhc2_root_clk", "usdhc2", base + 0x4520, 0)); From 66e54716cfd1be2ca3a2a17749b45b7e3980f050 Mon Sep 17 00:00:00 2001 From: Gaurav Jain Date: Thu, 9 Jun 2022 16:32:15 +0530 Subject: [PATCH 28/68] secure boot: enable ARCH_MISC_INIT config. add ARCH_MISC_INIT to initilaize caam jr driver. Signed-off-by: Gaurav Jain Reviewed-by: Fabio Estevam --- board/freescale/common/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/board/freescale/common/Kconfig b/board/freescale/common/Kconfig index 6553bf63bf..b0e6e43f4f 100644 --- a/board/freescale/common/Kconfig +++ b/board/freescale/common/Kconfig @@ -3,6 +3,7 @@ config CHAIN_OF_TRUST imply CMD_BLOB imply CMD_HASH if ARM select FSL_CAAM + select ARCH_MISC_INIT select SPL_BOARD_INIT if (ARM && SPL) select SPL_HASH if (ARM && SPL) select SHA_HW_ACCEL From 212875e707b6bc75780386c2cb28fbac7e2ab8f3 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Tue, 15 Feb 2022 16:23:22 +0100 Subject: [PATCH 29/68] mmc: fix error message for unaligned erase request Fix the end address in the message for unaligned erase request in mmc_berase() when start + blkcnt is aligned to erase_grp_size. for example: - start = 0x2000 - 26 - count = 26 - erase_grp_size = 0x400 Caution! Your devices Erase group is 0x400 The erase range would be change to 0x2000~0x27ff But no issue when the end address is not aligned, for example - start = 0x2000 - 2 * 26 - count = 26 - erase_grp_size = 0x400 Caution! Your devices Erase group is 0x400 The erase range would be change to 0x2000~0x23ff Signed-off-by: Patrick Delaunay Reviewed-by: Jaehoon Chung Reviewed-by: Patrice Chotard --- drivers/mmc/mmc_write.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mmc/mmc_write.c b/drivers/mmc/mmc_write.c index d23b7d9729..eab94c7b60 100644 --- a/drivers/mmc/mmc_write.c +++ b/drivers/mmc/mmc_write.c @@ -102,7 +102,7 @@ ulong mmc_berase(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt) "The erase range would be change to " "0x" LBAF "~0x" LBAF "\n\n", mmc->erase_grp_size, start & ~(mmc->erase_grp_size - 1), - ((start + blkcnt + mmc->erase_grp_size) + ((start + blkcnt + mmc->erase_grp_size - 1) & ~(mmc->erase_grp_size - 1)) - 1); while (blk < blkcnt) { From d72267049b484577294e17140b369dee339b2352 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Tue, 15 Feb 2022 16:23:23 +0100 Subject: [PATCH 30/68] env: mmc : align erase address and size on erase_grp_size On eMMC device, the erase_grp_size > 1 so the address and size for the erase block command in env/mmc.c can be unaligned on erase group size and some strange trace occurs and the result is not guarantee by MMC devices. The SD-Card behavior doesn't change as erase_grp_size = 1 for SD-Card. For example, on eMMC present on STM32MP15C-EV1 and before the patch: STM32MP> env erase Erasing Environment on MMC... Caution! Your devices Erase group is 0x400 The erase range would be change to 0x2000~0x27ff 16 blocks erased: OK Caution! Your devices Erase group is 0x400 The erase range would be change to 0x2000~0x23ff 16 blocks erased: OK OK After this patch: STM32MP> env erase Erasing Environment on MMC... 1024 blocks erased at 0x2000: OK 1024 blocks erased at 0x2000: OK OK Here the 2 copies of U-Boot environment are in the same devices Erase group: it is erased twice. Signed-off-by: Patrick Delaunay Reviewed-by: Patrice Chotard --- env/mmc.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/env/mmc.c b/env/mmc.c index 465b104559..0c498d9a46 100644 --- a/env/mmc.c +++ b/env/mmc.c @@ -257,12 +257,15 @@ static inline int erase_env(struct mmc *mmc, unsigned long size, { uint blk_start, blk_cnt, n; struct blk_desc *desc = mmc_get_blk_desc(mmc); + u32 erase_size; - blk_start = ALIGN(offset, mmc->write_bl_len) / mmc->write_bl_len; - blk_cnt = ALIGN(size, mmc->write_bl_len) / mmc->write_bl_len; + erase_size = mmc->erase_grp_size * desc->blksz; + blk_start = ALIGN_DOWN(offset, erase_size) / desc->blksz; + blk_cnt = ALIGN(size, erase_size) / desc->blksz; n = blk_derase(desc, blk_start, blk_cnt); - printf("%d blocks erased: %s\n", n, (n == blk_cnt) ? "OK" : "ERROR"); + printf("%d blocks erased at 0x%x: %s\n", n, blk_start, + (n == blk_cnt) ? "OK" : "ERROR"); return (n == blk_cnt) ? 0 : 1; } @@ -286,6 +289,7 @@ static int env_mmc_erase(void) goto fini; } + printf("\n"); ret = erase_env(mmc, CONFIG_ENV_SIZE, offset); #ifdef CONFIG_ENV_OFFSET_REDUND From d6ad5a0af9e6a12f47008141259f77b568c73ab2 Mon Sep 17 00:00:00 2001 From: Loic Poulain Date: Thu, 26 May 2022 16:37:21 +0200 Subject: [PATCH 31/68] mmc: Add support for wait_dat0 callback There is no wait_dat0 mmc ops, causing operations waiting for data line state change (e.g mmc_switch_voltage) to fallback to a 250ms active delay. mmc_ops still used when DM_MMC is not enabled, which is often the case for SPL. The result can be unexpectly long SPL boot time. This change adds support for wait_dat0() mmc operation. Signed-off-by: Loic Poulain Reviewed-by: Jaehoon Chung --- drivers/mmc/mmc.c | 3 +++ include/mmc.h | 1 + 2 files changed, 4 insertions(+) diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index 8a7d073900..12d29da528 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -34,6 +34,9 @@ static int mmc_set_signal_voltage(struct mmc *mmc, uint signal_voltage); static int mmc_wait_dat0(struct mmc *mmc, int state, int timeout_us) { + if (mmc->cfg->ops->wait_dat0) + return mmc->cfg->ops->wait_dat0(mmc, state, timeout_us); + return -ENOSYS; } diff --git a/include/mmc.h b/include/mmc.h index 9b4dc68311..073b01f82b 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -561,6 +561,7 @@ struct mmc_ops { int (*getwp)(struct mmc *mmc); int (*host_power_cycle)(struct mmc *mmc); int (*get_b_max)(struct mmc *mmc, void *dst, lbaint_t blkcnt); + int (*wait_dat0)(struct mmc *mmc, int state, int timeout_us); }; static inline int mmc_hs400_prepare_ddr(struct mmc *mmc) From 12a29d3b851029212ca3b3e0f233fc7b62aa0a39 Mon Sep 17 00:00:00 2001 From: Loic Poulain Date: Thu, 26 May 2022 16:37:22 +0200 Subject: [PATCH 32/68] mmc: fsl_esdhc_imx: Implement wait_dat0 mmc ops Implement wait_dat0 mmc ops callbac, allowing to reduce SPL boot time. Before (using grabserial): [0.000001 0.000001] U-Boot SPL 2021.04-xxxx [0.028257 0.028257] DDRINFO: start DRAM init [0.028500 0.000243] DDRINFO: DRAM rate 3000MTS [0.304627 0.276127] DDRINFO:ddrphy calibration done [0.305647 0.001020] DDRINFO: ddrmix config done [0.352584 0.046937] SEC0: RNG instantiated [0.374299 0.021715] Normal Boot [0.374675 0.000376] Trying to boot from MMC2 [1.250580 0.875905] NOTICE: BL31: v2.4(release):lf-5.10.72-2.2.0-0-g5782363f9 [1.251985 0.001405] NOTICE: BL31: Built : 08:02:40, Apr 12 2022 [1.522560 0.270575] [1.522734 0.000174] [1.522788 0.000054] U-Boot 2021.04-xxxx After: [0.000001 0.000001] U-Boot SPL 2021.04-xxxx [0.001614 0.001614] DDRINFO: start DRAM init [0.002377 0.000763] DDRINFO: DRAM rate 3000MTS [0.278494 0.276117] DDRINFO:ddrphy calibration done [0.279266 0.000772] DDRINFO: ddrmix config done [0.338432 0.059166] SEC0: RNG instantiated [0.339051 0.000619] Normal Boot [0.339431 0.000380] Trying to boot from MMC2 [0.412587 0.073156] NOTICE: BL31: v2.4(release):lf-5.15.5-1.0.0-0-g05f788b [0.414191 0.001604] NOTICE: BL31: Built : 10:35:26, Apr 6 2022 [0.700685 0.286494] [0.700793 0.000108] [0.700845 0.000052] U-Boot 2021.04-xxxx Signed-off-by: Loic Poulain Reviewed-by: Jaehoon Chung --- drivers/mmc/fsl_esdhc_imx.c | 50 ++++++++++++++++++++++++------------- 1 file changed, 33 insertions(+), 17 deletions(-) diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c index 893d7e241f..9befb190bd 100644 --- a/drivers/mmc/fsl_esdhc_imx.c +++ b/drivers/mmc/fsl_esdhc_imx.c @@ -1060,6 +1060,30 @@ static int esdhc_getcd_common(struct fsl_esdhc_priv *priv) return timeout > 0; } +static int esdhc_wait_dat0_common(struct fsl_esdhc_priv *priv, int state, + int timeout_us) +{ + struct fsl_esdhc *regs = priv->esdhc_regs; + int ret, err; + u32 tmp; + + /* make sure the card clock keep on */ + esdhc_setbits32(®s->vendorspec, VENDORSPEC_FRC_SDCLK_ON); + + ret = readx_poll_timeout(esdhc_read32, ®s->prsstat, tmp, + !!(tmp & PRSSTAT_DAT0) == !!state, + timeout_us); + + /* change to default setting, let host control the card clock */ + esdhc_clrbits32(®s->vendorspec, VENDORSPEC_FRC_SDCLK_ON); + + err = readx_poll_timeout(esdhc_read32, ®s->prsstat, tmp, tmp & PRSSTAT_SDOFF, 100); + if (err) + pr_warn("card clock not gate off as expect.\n"); + + return ret; +} + static int esdhc_reset(struct fsl_esdhc *regs) { ulong start; @@ -1109,11 +1133,19 @@ static int esdhc_set_ios(struct mmc *mmc) return esdhc_set_ios_common(priv, mmc); } +static int esdhc_wait_dat0(struct mmc *mmc, int state, int timeout_us) +{ + struct fsl_esdhc_priv *priv = mmc->priv; + + return esdhc_wait_dat0_common(priv, state, timeout_us); +} + static const struct mmc_ops esdhc_ops = { .getcd = esdhc_getcd, .init = esdhc_init, .send_cmd = esdhc_send_cmd, .set_ios = esdhc_set_ios, + .wait_dat0 = esdhc_wait_dat0, }; #endif @@ -1576,25 +1608,9 @@ static int __maybe_unused fsl_esdhc_set_enhanced_strobe(struct udevice *dev) static int fsl_esdhc_wait_dat0(struct udevice *dev, int state, int timeout_us) { - int ret, err; - u32 tmp; struct fsl_esdhc_priv *priv = dev_get_priv(dev); - struct fsl_esdhc *regs = priv->esdhc_regs; - /* make sure the card clock keep on */ - esdhc_setbits32(®s->vendorspec, VENDORSPEC_FRC_SDCLK_ON); - - ret = readx_poll_timeout(esdhc_read32, ®s->prsstat, tmp, - !!(tmp & PRSSTAT_DAT0) == !!state, - timeout_us); - - /* change to default setting, let host control the card clock */ - esdhc_clrbits32(®s->vendorspec, VENDORSPEC_FRC_SDCLK_ON); - err = readx_poll_timeout(esdhc_read32, ®s->prsstat, tmp, tmp & PRSSTAT_SDOFF, 100); - if (err) - dev_warn(dev, "card clock not gate off as expect.\n"); - - return ret; + return esdhc_wait_dat0_common(priv, state, timeout_us); } static const struct dm_mmc_ops fsl_esdhc_ops = { From 1a558fafbbdff80cb6a7c8e883addec7f02fe8e5 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Mon, 13 Jun 2022 14:35:25 +0200 Subject: [PATCH 33/68] spi: nxp_fspi: Fix clock imbalance The nxp_fspi_default_setup() is only ever called from nxp_fspi_probe(), where the IP clock are initially disabled. Drop the second disabling of clock to prevent clock enable/disable imbalance reported by clock core: " clk qspi_root_clk already disabled " Signed-off-by: Marek Vasut Cc: Fabio Estevam Cc: Peng Fan Cc: Stefano Babic Reviewed-by: Peng Fan --- drivers/spi/nxp_fspi.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/spi/nxp_fspi.c b/drivers/spi/nxp_fspi.c index 607c953987..579d6bac9b 100644 --- a/drivers/spi/nxp_fspi.c +++ b/drivers/spi/nxp_fspi.c @@ -866,9 +866,6 @@ static int nxp_fspi_default_setup(struct nxp_fspi *f) u32 reg; #if CONFIG_IS_ENABLED(CLK) - /* disable and unprepare clock to avoid glitch pass to controller */ - nxp_fspi_clk_disable_unprep(f); - /* the default frequency, we will change it later if necessary. */ ret = clk_set_rate(&f->clk, 20000000); if (ret < 0) From 166e5b82a3f49239f67ac5f0d6df8abeb6ca0bdd Mon Sep 17 00:00:00 2001 From: Tien Fong Chee Date: Fri, 10 Jun 2022 19:18:00 +0800 Subject: [PATCH 34/68] intel: n5x: ddr: update license All the source code of sdram_n5x.c are from Intel, update the license to use both GPL2.0 and BSD-3 Clause because this copy of code may used for open source and internal project. Signed-off-by: Tien Fong Chee --- drivers/ddr/altera/sdram_n5x.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/ddr/altera/sdram_n5x.c b/drivers/ddr/altera/sdram_n5x.c index ac13ac4319..737a4e2ff1 100644 --- a/drivers/ddr/altera/sdram_n5x.c +++ b/drivers/ddr/altera/sdram_n5x.c @@ -1,6 +1,6 @@ -// SPDX-License-Identifier: GPL-2.0 +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause /* - * Copyright (C) 2020-2021 Intel Corporation + * Copyright (C) 2020-2022 Intel Corporation * */ From f70e00fa7da69d16379c0b3526b793be45cd055d Mon Sep 17 00:00:00 2001 From: Yau Wai Gan Date: Tue, 24 May 2022 15:02:28 +0800 Subject: [PATCH 35/68] arm: dts: socfpga: stratix10: Update MMC smplsel value This new MMC sample select value is obtained from running tests on multiple Stratix 10 boards and proven working. Signed-off-by: Yau Wai Gan Reviewed-by: Tien Fong Chee --- arch/arm/dts/socfpga_stratix10_socdk.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/dts/socfpga_stratix10_socdk.dts b/arch/arm/dts/socfpga_stratix10_socdk.dts index b7b48a5d31..8aa55a60ab 100755 --- a/arch/arm/dts/socfpga_stratix10_socdk.dts +++ b/arch/arm/dts/socfpga_stratix10_socdk.dts @@ -92,7 +92,7 @@ broken-cd; bus-width = <4>; drvsel = <3>; - smplsel = <0>; + smplsel = <2>; }; &qspi { From ee06c5390f2f1e2f1bc23e14a7cd8665c1e42ff4 Mon Sep 17 00:00:00 2001 From: Tien Fong Chee Date: Wed, 27 Apr 2022 12:27:21 +0800 Subject: [PATCH 36/68] ddr: altera: Ignore bit[7-4] for both seq2core & core2seq handshake in HPS Bit[7-4] for both register seq2core and core2seq handshake in HPS are not required for triggering DDR re-calibration or resetting EMIF. So, ignoring these bits just for playing it safe. Signed-off-by: Tien Fong Chee --- drivers/ddr/altera/sdram_soc64.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/ddr/altera/sdram_soc64.h b/drivers/ddr/altera/sdram_soc64.h index 7460f8c220..07a0f9f2ae 100644 --- a/drivers/ddr/altera/sdram_soc64.h +++ b/drivers/ddr/altera/sdram_soc64.h @@ -53,7 +53,7 @@ struct altera_sdram_plat { #define DDR_HMC_INTSTAT_DERRPENA_SET_MSK BIT(1) #define DDR_HMC_INTSTAT_ADDRMTCFLG_SET_MSK BIT(16) #define DDR_HMC_INTMODE_INTMODE_SET_MSK BIT(0) -#define DDR_HMC_RSTHANDSHAKE_MASK 0x000000ff +#define DDR_HMC_RSTHANDSHAKE_MASK 0x0000000f #define DDR_HMC_CORE2SEQ_INT_REQ 0xF #define DDR_HMC_SEQ2CORE_INT_RESP_MASK BIT(3) #define DDR_HMC_HPSINTFCSEL_ENABLE_MASK 0x001f1f1f From 39bbcc341bda435899cb623a19d20727ca98c67a Mon Sep 17 00:00:00 2001 From: Tien Fong Chee Date: Wed, 27 Apr 2022 12:52:42 +0800 Subject: [PATCH 37/68] ddr: altera: Stratix10: Use phys_size_t for memory size Replace with phys_size_t for all memory size variables declaration for the sake of scalability. phys_size_t is defined in /arch/arm/include/asm/types.h. Signed-off-by: Tien Fong Chee --- drivers/ddr/altera/sdram_s10.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/ddr/altera/sdram_s10.c b/drivers/ddr/altera/sdram_s10.c index d3a6d21860..4d36fb4533 100644 --- a/drivers/ddr/altera/sdram_s10.c +++ b/drivers/ddr/altera/sdram_s10.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Copyright (C) 2016-2018 Intel Corporation + * Copyright (C) 2016-2022 Intel Corporation * */ @@ -277,7 +277,7 @@ int sdram_mmr_init_full(struct udevice *dev) DDR_SCH_DEVTODEV); /* assigning the SDRAM size */ - unsigned long long size = sdram_calculate_size(plat); + phys_size_t size = sdram_calculate_size(plat); /* If the size is invalid, use default Config size */ if (size <= 0) hw_size = PHYS_SDRAM_1_SIZE; From 163863d572a7bc52b58743b3de4aafbc24dd12c8 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Mon, 20 Dec 2021 22:57:57 +0100 Subject: [PATCH 38/68] arm: socfpga: vining: Unmount UBIFS and detach UBI in ubi_load script Clean up in ubiload script. Unmount UBIFS from which kernel image was loaded and detach UBI on which the UBIFS is located, otherwise message similar to the following is printed just before booting kernel: Removing MTD device #7 (rootfs) with use count 1 Error when deleting partition "rootfs" (-16) Signed-off-by: Marek Vasut Cc: Siew Chin Lim Cc: Simon Goldschmidt Cc: Tien Fong Chee Reviewed-by: Tien Fong Chee --- include/configs/socfpga_vining_fpga.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/include/configs/socfpga_vining_fpga.h b/include/configs/socfpga_vining_fpga.h index 9455e4cb56..c333c931ab 100644 --- a/include/configs/socfpga_vining_fpga.h +++ b/include/configs/socfpga_vining_fpga.h @@ -116,7 +116,8 @@ "addargs=run addcons addmtd addmisc\0" \ "ubiload=" \ "ubi part ${ubimtd} ; ubifsmount ${ubipart} ; " \ - "ubifsload ${kernel_addr_r} /boot/${bootfile}\0" \ + "ubifsload ${kernel_addr_r} /boot/${bootfile} ; " \ + "ubifsumount ; ubi detach\0" \ "netload=" \ "tftp ${kernel_addr_r} ${hostname}/${bootfile}\0" \ "miscargs=nohlt panic=1\0" \ From 41b2182af73efcdfd074570976264dddacee5b70 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Fri, 29 Apr 2022 15:34:44 +0200 Subject: [PATCH 39/68] crypto: fsl_hash: Remove unnecessary alignment check in caam_hash() While working on an LX2160 based board and updating to latest mainline I noticed problems using the HW accelerated hash functions on this platform, when trying to boot a FIT Kernel image. Here the resulting error message: Using 'conf-freescale_lx2160a.dtb' configuration Trying 'kernel-1' kernel subimage Verifying Hash Integrity ... sha256Error: Address arguments are not aligned CAAM was not setup properly or it is faulty error! Bad hash value for 'hash-1' hash node in 'kernel-1' image node Bad Data Hash ERROR: can't get kernel image! Testing and checking with Gaurav Jain from NXP has revealed, that this alignment check is not necessary here at all. So let's remove this check completely. Signed-off-by: Stefan Roese Cc: Gaurav Jain Cc: dullfire@yahoo.com Reviewed-by: Gaurav Jain --- drivers/crypto/fsl/fsl_hash.c | 6 ------ 1 file changed, 6 deletions(-) diff --git a/drivers/crypto/fsl/fsl_hash.c b/drivers/crypto/fsl/fsl_hash.c index 9e6829b7ad..575196778c 100644 --- a/drivers/crypto/fsl/fsl_hash.c +++ b/drivers/crypto/fsl/fsl_hash.c @@ -176,12 +176,6 @@ int caam_hash(const unsigned char *pbuf, unsigned int buf_len, uint32_t *desc; unsigned int size; - if (!IS_ALIGNED((uintptr_t)pbuf, ARCH_DMA_MINALIGN) || - !IS_ALIGNED((uintptr_t)pout, ARCH_DMA_MINALIGN)) { - puts("Error: Address arguments are not aligned\n"); - return -EINVAL; - } - desc = malloc_cache_aligned(sizeof(int) * MAX_CAAM_DESCSIZE); if (!desc) { debug("Not enough memory for descriptor allocation\n"); From 48f44de8b41a2ed5579492a75806a37ce9e7e28e Mon Sep 17 00:00:00 2001 From: Christophe Leroy Date: Thu, 12 May 2022 16:21:53 +0200 Subject: [PATCH 40/68] Update email address and company name This patch updates my email address and company name. Signed-off-by: Christophe Leroy --- board/cssi/MAINTAINERS | 4 ++-- doc/git-mailrc | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/board/cssi/MAINTAINERS b/board/cssi/MAINTAINERS index cbf1406a54..7d237b0b20 100644 --- a/board/cssi/MAINTAINERS +++ b/board/cssi/MAINTAINERS @@ -1,5 +1,5 @@ -BOARDS from CS Systemes d'Information -M: Christophe Leroy +BOARDS from CS GROUP France +M: Christophe Leroy S: Maintained F: board/cssi/ F: include/configs/MCR3000.h diff --git a/doc/git-mailrc b/doc/git-mailrc index 63c2f6e7da..b00c278190 100644 --- a/doc/git-mailrc +++ b/doc/git-mailrc @@ -95,7 +95,7 @@ alias nios2 nios alias powerpc uboot, afleming, stroese, wd, priyankajain, mariosix alias ppc powerpc -alias mpc8xx uboot, wd, Christophe Leroy +alias mpc8xx uboot, wd, Christophe Leroy alias mpc83xx uboot, mariosix alias mpc85xx uboot, afleming, priyankajain From 761157d3100be5918620f6c82bc119dbcc0637da Mon Sep 17 00:00:00 2001 From: Christian Gmeiner Date: Thu, 12 May 2022 08:21:01 +0200 Subject: [PATCH 41/68] arch: arm: mach-k3: am642_init: bring back MCU_PADCFG_MMR1 unlock Without this register unlock it is not possible to configure the pinmux used for mcu spi0. Fixes: 92e46092f2 ("arch: arm: mach-k3: am642_init: Probe ESM nodes") Signed-off-by: Christian Gmeiner Reviewed-by: Nishanth Menon --- arch/arm/mach-k3/am642_init.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/mach-k3/am642_init.c b/arch/arm/mach-k3/am642_init.c index add7ea8377..b16de9c9f0 100644 --- a/arch/arm/mach-k3/am642_init.c +++ b/arch/arm/mach-k3/am642_init.c @@ -47,6 +47,9 @@ static void ctrl_mmr_unlock(void) mmr_unlock(CTRL_MMR0_BASE, 3); mmr_unlock(CTRL_MMR0_BASE, 5); mmr_unlock(CTRL_MMR0_BASE, 6); + + /* Unlock all MCU_PADCFG_MMR1 module registers */ + mmr_unlock(MCU_PADCFG_MMR1_BASE, 1); } /* From 101a0f71e492d536bfe34f29caa065d04144ced0 Mon Sep 17 00:00:00 2001 From: Andrey Zhizhikin Date: Tue, 7 Jun 2022 10:13:00 +0200 Subject: [PATCH 42/68] .gitignore: add files produced by b4 b4 utility [1] is introduced by Linux Kernel developers and used to fetch patches and patch series from lore.kernel.org and is proven to be useful for U-Boot development. Detailed usage of the tool can be read under post from the original author [2]. This tool fetches files from the list and populates the source folder with additional files (*.cover and *.mbx) which are not ignored by git and shown as newly added files. Add those file patterns into .gitignore file, so they can be safely skipped during changes attestation. Link: [1]: https://pypi.org/project/b4/ Link: [2]: https://people.kernel.org/monsieuricon/introducing-b4-and-patch-attestation Signed-off-by: Andrey Zhizhikin Reviewed-by: Tom Rini --- .gitignore | 2 ++ 1 file changed, 2 insertions(+) diff --git a/.gitignore b/.gitignore index 28c439f09f..eb769f144c 100644 --- a/.gitignore +++ b/.gitignore @@ -10,6 +10,7 @@ *.asn1.[ch] *.bin *.cfgout +*.cover *.dtb *.dtbo *.dtb.S @@ -22,6 +23,7 @@ *.lex.c *.lst *.mod.c +*.mbx *.o *.o.* *.order From e744bf3a4ba442a0e9ee1c509c70e1452e3a15d0 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 8 Jun 2022 14:30:14 -0400 Subject: [PATCH 43/68] odroid_xu3: Fix board environment variable When migrating CONFIG_CONS_INDEX to Kconfig, on this platform we changed what "board" evaluated to in the environment. This in turn meant that we would no longer try and find the correct fdtfile via the normal distro boot logic. Fix this by overriding board in the default environment, as done on other platforms where CONFIG_SYS_BOARD is not what we want to be in the board environment variable. Fixes: f76750d11133 ("Convert CONFIG_CONS_INDEX et al to Kconfig") Reported-by: Gabriel Hojda Tested-by: Gabriel Hojda Signed-off-by: Tom Rini --- include/configs/odroid_xu3.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/odroid_xu3.h b/include/configs/odroid_xu3.h index eb35d7b4ae..360815bc03 100644 --- a/include/configs/odroid_xu3.h +++ b/include/configs/odroid_xu3.h @@ -86,6 +86,7 @@ "rootfstype=ext4\0" \ "console=console=ttySAC2,115200n8\0" \ "fdtfile=exynos5422-odroidxu3.dtb\0" \ + "board=odroid\0" \ "board_name=odroidxu3\0" \ "mmcbootdev=0\0" \ "mmcrootdev=0\0" \ From 2ac0baab4aff1a0b45067d0b62f00c15f4e86856 Mon Sep 17 00:00:00 2001 From: Miquel Raynal Date: Thu, 9 Jun 2022 16:02:06 +0200 Subject: [PATCH 44/68] fs/squashfs: sqfs_read: Prevent arbitrary code execution Following Jincheng's report, an out-of-band write leading to arbitrary code execution is possible because on one side the squashfs logic accepts directory names up to 65535 bytes (u16), while U-Boot fs logic accepts directory names up to 255 bytes long. Prevent such an exploit from happening by capping directory name sizes to 255. Use a define for this purpose so that developers can link the limitation to its source and eventually kill it some day by dynamically allocating this array (if ever desired). Link: https://lore.kernel.org/all/CALO=DHFB+yBoXxVr5KcsK0iFdg+e7ywko4-e+72kjbcS8JBfPw@mail.gmail.com Reported-by: Jincheng Wang Signed-off-by: Miquel Raynal Tested-by: Jincheng Wang --- fs/squashfs/sqfs.c | 8 +++++--- include/fs.h | 4 +++- 2 files changed, 8 insertions(+), 4 deletions(-) diff --git a/fs/squashfs/sqfs.c b/fs/squashfs/sqfs.c index 547d2fd4b3..b9f05efd9c 100644 --- a/fs/squashfs/sqfs.c +++ b/fs/squashfs/sqfs.c @@ -975,6 +975,7 @@ int sqfs_readdir(struct fs_dir_stream *fs_dirs, struct fs_dirent **dentp) int i_number, offset = 0, ret; struct fs_dirent *dent; unsigned char *ipos; + u16 name_size; dirs = (struct squashfs_dir_stream *)fs_dirs; if (!dirs->size) { @@ -1057,9 +1058,10 @@ int sqfs_readdir(struct fs_dir_stream *fs_dirs, struct fs_dirent **dentp) return -SQFS_STOP_READDIR; } - /* Set entry name */ - strncpy(dent->name, dirs->entry->name, dirs->entry->name_size + 1); - dent->name[dirs->entry->name_size + 1] = '\0'; + /* Set entry name (capped at FS_DIRENT_NAME_LEN which is a U-Boot limitation) */ + name_size = min_t(u16, dirs->entry->name_size + 1, FS_DIRENT_NAME_LEN - 1); + strncpy(dent->name, dirs->entry->name, name_size); + dent->name[name_size] = '\0'; offset = dirs->entry->name_size + 1 + SQFS_ENTRY_BASE_LENGTH; dirs->entry_count--; diff --git a/include/fs.h b/include/fs.h index b43f16a692..2195dc172e 100644 --- a/include/fs.h +++ b/include/fs.h @@ -174,6 +174,8 @@ int fs_write(const char *filename, ulong addr, loff_t offset, loff_t len, #define FS_DT_REG 8 /* regular file */ #define FS_DT_LNK 10 /* symbolic link */ +#define FS_DIRENT_NAME_LEN 256 + /** * struct fs_dirent - directory entry * @@ -194,7 +196,7 @@ struct fs_dirent { /** change_time: time of last modification */ struct rtc_time change_time; /** name: file name */ - char name[256]; + char name[FS_DIRENT_NAME_LEN]; }; /* Note: fs_dir_stream should be treated as opaque to the user of fs layer */ From 81755b8c20fe8ab7e10bd3a15fd48d37426ee45d Mon Sep 17 00:00:00 2001 From: Andre Przywara Date: Wed, 8 Jun 2022 00:42:22 +0100 Subject: [PATCH 45/68] usb: host: ehci-generic: Make resets and clocks optional The generic EHCI binding does not *require* resets and clocks properties, and indeed for instance the Allwinner A20 SoCs does not need or define any resets in its DT. Don't easily give up if clk_get_bulk() or reset_get_bulk() return an error, but check if that is due to the DT simply having no entries for either of them. This fixes USB operation on all boards with an Allwinner A10 or A20 SoC, which were reporting an error after commit ba96176ab70e2999: ======================= Bus usb@1c14000: ehci_generic usb@1c14000: Failed to get resets (err=-2) probe failed, error -2 ======================= Signed-off-by: Andre Przywara Reviewed-by: Patrice Chotard --- drivers/usb/host/ehci-generic.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/usb/host/ehci-generic.c b/drivers/usb/host/ehci-generic.c index 4734af0396..15267e9a05 100644 --- a/drivers/usb/host/ehci-generic.c +++ b/drivers/usb/host/ehci-generic.c @@ -69,7 +69,7 @@ static int ehci_usb_probe(struct udevice *dev) err = 0; ret = clk_get_bulk(dev, &priv->clocks); - if (ret) { + if (ret && ret != -ENOENT) { dev_err(dev, "Failed to get clocks (ret=%d)\n", ret); return ret; } @@ -81,7 +81,7 @@ static int ehci_usb_probe(struct udevice *dev) } err = reset_get_bulk(dev, &priv->resets); - if (err) { + if (ret && ret != -ENOENT) { dev_err(dev, "Failed to get resets (err=%d)\n", err); goto clk_err; } From b11b5afa6a17a2aedf174d4d4ee5d70b04e245c6 Mon Sep 17 00:00:00 2001 From: Heiko Thiery Date: Sat, 11 Jun 2022 08:09:04 +0200 Subject: [PATCH 46/68] arm64: dts: imx8mq-kontron-pitx-imx8m-u-boot.dtsi: disable assigned clocks With the move to use DM_CLK the boards uart stops working. The used properties are not supported by the imx8mq clock driver. Thus the correct baudrate cannot be selected. Remove this properties here and the board can start with working uart. Keep it in the main dts because linux handles these porperties fine. Signed-off-by: Heiko Thiery --- .../arm/dts/imx8mq-kontron-pitx-imx8m-u-boot.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm/dts/imx8mq-kontron-pitx-imx8m-u-boot.dtsi b/arch/arm/dts/imx8mq-kontron-pitx-imx8m-u-boot.dtsi index 6f9c81462e..d361f3f559 100644 --- a/arch/arm/dts/imx8mq-kontron-pitx-imx8m-u-boot.dtsi +++ b/arch/arm/dts/imx8mq-kontron-pitx-imx8m-u-boot.dtsi @@ -10,3 +10,18 @@ sd-uhs-sdr104; sd-uhs-ddr50; }; + +&uart1 { + /delete-property/ assigned-clocks; + /delete-property/ assigned-clock-parents; +}; + +&uart2 { + /delete-property/ assigned-clocks; + /delete-property/ assigned-clock-parents; +}; + +&uart3 { + /delete-property/ assigned-clocks; + /delete-property/ assigned-clock-parents; +}; From ce9c579e2b7c877684d0140dd34b881e12fe5c59 Mon Sep 17 00:00:00 2001 From: Andre Przywara Date: Tue, 14 Jun 2022 00:11:10 +0100 Subject: [PATCH 47/68] armv8: always use current exception level for TCR_ELx access Currently get_tcr() takes an "el" parameter, to select the proper version of the TCR_ELx system register. This is problematic in case of the Apple M1, since it runs with HCR_EL2.E2H fixed to 1, so TCR_EL2 is actually using the TCR_EL1 layout, and we get the wrong version. For U-Boot's purposes the only sensible choice here is the current exception level, and indeed most callers treat it like that, so let's remove that parameter and read the current EL inside the function. This allows us to check for the E2H bit, and pretend it's EL1 in this case. There are two callers which don't care about the EL, and they pass 0, which looks wrong, but is irrelevant in these two cases, since we don't use the return value there. So the change cannot affect those two. Signed-off-by: Andre Przywara Reviewed-by: Mark Kettenis Tested-by: Mark Kettenis --- arch/arm/cpu/armv8/cache_v8.c | 28 +++++++++++++++++++++---- arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 4 ++-- arch/arm/cpu/armv8/start.S | 2 +- arch/arm/include/asm/armv8/mmu.h | 4 +++- 4 files changed, 30 insertions(+), 8 deletions(-) diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c index 3de18c7675..e4736e5643 100644 --- a/arch/arm/cpu/armv8/cache_v8.c +++ b/arch/arm/cpu/armv8/cache_v8.c @@ -39,8 +39,28 @@ DECLARE_GLOBAL_DATA_PTR; * off: FFF */ -u64 get_tcr(int el, u64 *pips, u64 *pva_bits) +static int get_effective_el(void) { + int el = current_el(); + + if (el == 2) { + u64 hcr_el2; + + /* + * If we are using the EL2&0 translation regime, the TCR_EL2 + * looks like the EL1 version, even though we are in EL2. + */ + __asm__ ("mrs %0, HCR_EL2\n" : "=r" (hcr_el2)); + if (hcr_el2 & BIT(HCR_EL2_E2H_BIT)) + return 1; + } + + return el; +} + +u64 get_tcr(u64 *pips, u64 *pva_bits) +{ + int el = get_effective_el(); u64 max_addr = 0; u64 ips, va_bits; u64 tcr; @@ -115,7 +135,7 @@ static u64 *find_pte(u64 addr, int level) debug("addr=%llx level=%d\n", addr, level); - get_tcr(0, NULL, &va_bits); + get_tcr(NULL, &va_bits); if (va_bits < 39) start_level = 1; @@ -343,7 +363,7 @@ __weak u64 get_page_table_size(void) u64 va_bits; int start_level = 0; - get_tcr(0, NULL, &va_bits); + get_tcr(NULL, &va_bits); if (va_bits < 39) start_level = 1; @@ -415,7 +435,7 @@ __weak void mmu_setup(void) setup_all_pgtables(); el = current_el(); - set_ttbr_tcr_mair(el, gd->arch.tlb_addr, get_tcr(el, NULL, NULL), + set_ttbr_tcr_mair(el, gd->arch.tlb_addr, get_tcr(NULL, NULL), MEMORY_ATTRIBUTES); /* enable the mmu */ diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c index 253008a9c1..c989a43cbe 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c @@ -454,7 +454,7 @@ static inline void early_mmu_setup(void) /* point TTBR to the new table */ set_ttbr_tcr_mair(el, gd->arch.tlb_addr, - get_tcr(el, NULL, NULL) & + get_tcr(NULL, NULL) & ~(TCR_ORGN_MASK | TCR_IRGN_MASK), MEMORY_ATTRIBUTES); @@ -609,7 +609,7 @@ static inline void final_mmu_setup(void) invalidate_icache_all(); /* point TTBR to the new table */ - set_ttbr_tcr_mair(el, gd->arch.tlb_addr, get_tcr(el, NULL, NULL), + set_ttbr_tcr_mair(el, gd->arch.tlb_addr, get_tcr(NULL, NULL), MEMORY_ATTRIBUTES); set_sctlr(get_sctlr() | CR_M); diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S index d328e8c08a..28f0df13f0 100644 --- a/arch/arm/cpu/armv8/start.S +++ b/arch/arm/cpu/armv8/start.S @@ -125,7 +125,7 @@ pie_fixup_done: msr cptr_el3, xzr /* Enable FP/SIMD */ b 0f 2: mrs x1, hcr_el2 - tbnz x1, #34, 1f /* HCR_EL2.E2H */ + tbnz x1, #HCR_EL2_E2H_BIT, 1f /* HCR_EL2.E2H */ orr x1, x1, #HCR_EL2_AMO_EL2 /* Route SErrors to EL2 */ msr hcr_el2, x1 set_vbar vbar_el2, x0 diff --git a/arch/arm/include/asm/armv8/mmu.h b/arch/arm/include/asm/armv8/mmu.h index c36b2cf5a5..9f58cedb65 100644 --- a/arch/arm/include/asm/armv8/mmu.h +++ b/arch/arm/include/asm/armv8/mmu.h @@ -103,6 +103,8 @@ #define TCR_EL2_RSVD (1U << 31 | 1 << 23) #define TCR_EL3_RSVD (1U << 31 | 1 << 23) +#define HCR_EL2_E2H_BIT 34 + #ifndef __ASSEMBLY__ static inline void set_ttbr_tcr_mair(int el, u64 table, u64 tcr, u64 attr) { @@ -134,7 +136,7 @@ struct mm_region { extern struct mm_region *mem_map; void setup_pgtables(void); -u64 get_tcr(int el, u64 *pips, u64 *pva_bits); +u64 get_tcr(u64 *pips, u64 *pva_bits); #endif #endif /* _ASM_ARMV8_MMU_H_ */ From 2f51f946e3e97d3d9463e0f199d055dbcb4eef02 Mon Sep 17 00:00:00 2001 From: Corentin LABBE Date: Tue, 14 Jun 2022 08:44:07 +0000 Subject: [PATCH 48/68] board: ti: am335x: eth_cpsw should depend on CONFIG_NET The origin of this patch is the breaking of am335x-hs boot due to commit e41651fffda7 ("dm: Support parent devices with of-platdata") HS boards have less SRAM for SPL and so this commit increased memory usage beyond am335x limit. This commit added 10 driver binding pass and am335x boot only if one pass is done. SPL try to do more than one pass due to eth_cpsw failing. Since HS SPL does not need network (and NET is already disabled in config), the easiest fix is to "remove" eth_cpsw from SPL by testing if NET is enabled. Signed-off-by: Corentin LABBE Reviewed-by: Tom Rini Acked-by: Andrew Davis --- board/ti/am335x/board.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c index 7c0545892c..2cb5b1cb3f 100644 --- a/board/ti/am335x/board.c +++ b/board/ti/am335x/board.c @@ -902,7 +902,7 @@ int board_late_init(void) #endif /* CPSW plat */ -#if !CONFIG_IS_ENABLED(OF_CONTROL) +#if CONFIG_IS_ENABLED(NET) && !CONFIG_IS_ENABLED(OF_CONTROL) struct cpsw_slave_data slave_data[] = { { .slave_reg_ofs = CPSW_SLAVE0_OFFSET, From 7e41abad9be46351b83c30ceefe55999a5376ece Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Tue, 14 Jun 2022 18:42:07 +0800 Subject: [PATCH 49/68] tools: binman: install btool btool is needed after install binman to system. Signed-off-by: Peng Fan Reviewed-by: Alper Nebi Yasak --- tools/binman/setup.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/binman/setup.py b/tools/binman/setup.py index 5ed94abdaf..9a9206eb04 100644 --- a/tools/binman/setup.py +++ b/tools/binman/setup.py @@ -5,7 +5,7 @@ setup(name='binman', version='1.0', license='GPL-2.0+', scripts=['binman'], - packages=['binman', 'binman.etype'], + packages=['binman', 'binman.etype', 'binman.btool'], package_dir={'binman': ''}, package_data={'binman': ['README.rst', 'entries.rst']}, classifiers=['Environment :: Console', From 3c07d639ede998cb682c284d1ffc4a3ddb062e13 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 1 May 2022 18:43:55 +0200 Subject: [PATCH 50/68] net: Fix discuss discard typo Replace discuss with discard, that is what happens with packet with incorrect checksum. Fix the typo. Fixes: 4b37fd146bb ("Convert CONFIG_UDP_CHECKSUM to Kconfig") Signed-off-by: Marek Vasut Cc: Ramon Fried Cc: Simon Glass --- net/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/net/Kconfig b/net/Kconfig index 964a4fe499..564ea8b2d2 100644 --- a/net/Kconfig +++ b/net/Kconfig @@ -158,7 +158,7 @@ config UDP_CHECKSUM default y if SANDBOX help Enable this to verify the checksum on UDP packets. If the checksum - is wrong then the packet is discussed and an error is shown, like + is wrong then the packet is discarded and an error is shown, like "UDP wrong checksum 29374a23 30ff3826" config BOOTP_SERVERIP From 8b91f28bc8b2e61d22265ed29dfec704a8e6e0d7 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Thu, 16 Jun 2022 18:37:59 +0200 Subject: [PATCH 51/68] stm32mp: stm32prog: fix the last character of dfu_alt_add third parameter The third parameter of dfu_alt_add(), the string description of alternate, is build in stm32prog_alt_add() with a unnecessary character ';' at the end of the string. This separator was required in the first implementation of dfu_alt_add() but is no more needed in the current implementation; this separator is managed only in dfu_config_interfaces() which call dfu_alt_add() for this parameter without this separator. And since the commit 53b406369e9d ("DFU: Check the number of arguments and argument string strictly"), this added character cause an error when the stm32prog command is executed because the third parameter of dfu_alt_add() must be a string with a numerical value; 's' must be NULL in the result of call in dfu_fill_entity_mmc(): third_arg = simple_strtoul(argv[2], &s, 0); Fixes: 53b406369e9d ("DFU: Check the number of arguments and argument string strictly") Signed-off-by: Patrick Delaunay Reviewed-by: Patrice Chotard --- arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c index b7111123ba..c391b6c7ab 100644 --- a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c +++ b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c @@ -1262,7 +1262,7 @@ static int stm32prog_alt_add(struct stm32prog_data *data, "raw 0x%llx 0x%llx", part->addr, nb_blk); offset += snprintf(buf + offset, ALT_BUF_LEN - offset, - " mmcpart %d;", -(part->part_id)); + " mmcpart %d", -(part->part_id)); } else { if (part->part_type == PART_SYSTEM && (part->target == STM32PROG_NAND || @@ -1280,7 +1280,7 @@ static int stm32prog_alt_add(struct stm32prog_data *data, offset += snprintf(buf + offset, ALT_BUF_LEN - offset, " %d", part->dev_id); offset += snprintf(buf + offset, ALT_BUF_LEN - offset, - " %d;", part->part_id); + " %d", part->part_id); } ret = -ENODEV; switch (part->target) { From 40beedb0520d3a8611e110e9bd54b4b6e1d97820 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Mon, 13 Jun 2022 11:55:16 +0200 Subject: [PATCH 52/68] ARM: dts: stm32: Add alternate pinmux for UART3 pins Add another mux option for UART3 pins, this is used on DRC Compact board. Signed-off-by: Marek Vasut Cc: Patrice Chotard Cc: Patrick Delaunay Reviewed-by: Patrice Chotard Reviewed-by: Patrick Delaunay --- arch/arm/dts/stm32mp15-pinctrl.dtsi | 41 +++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/arch/arm/dts/stm32mp15-pinctrl.dtsi b/arch/arm/dts/stm32mp15-pinctrl.dtsi index f0d66d8c6e..823ef2e2aa 100644 --- a/arch/arm/dts/stm32mp15-pinctrl.dtsi +++ b/arch/arm/dts/stm32mp15-pinctrl.dtsi @@ -2134,6 +2134,47 @@ }; }; + usart3_pins_e: usart3-4 { + pins1 { + pinmux = , /* USART3_TX */ + ; /* USART3_RTS */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = , /* USART3_RX */ + ; /* USART3_CTS_NSS */ + bias-pull-up; + }; + }; + + usart3_idle_pins_e: usart3-idle-4 { + pins1 { + pinmux = , /* USART3_TX */ + ; /* USART3_CTS_NSS */ + }; + pins2 { + pinmux = ; /* USART3_RTS */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins3 { + pinmux = ; /* USART3_RX */ + bias-pull-up; + }; + }; + + usart3_sleep_pins_e: usart3-sleep-4 { + pins { + pinmux = , /* USART3_TX */ + , /* USART3_RTS */ + , /* USART3_CTS_NSS */ + ; /* USART3_RX */ + }; + }; + usbotg_hs_pins_a: usbotg-hs-0 { pins { pinmux = ; /* OTG_ID */ From fb6284b5af6c7fb96aec8dae81de47542db577fb Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Mon, 13 Jun 2022 11:55:17 +0200 Subject: [PATCH 53/68] ARM: dts: stm32: Add alternate pinmux for UART4 pins Add another mux option for UART4 pins, this is used on DRC Compact board. Signed-off-by: Marek Vasut Cc: Patrice Chotard Cc: Patrick Delaunay Reviewed-by: Patrice Chotard Reviewed-by: Patrick Delaunay --- arch/arm/dts/stm32mp15-pinctrl.dtsi | 30 +++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/arch/arm/dts/stm32mp15-pinctrl.dtsi b/arch/arm/dts/stm32mp15-pinctrl.dtsi index 823ef2e2aa..dc329bf531 100644 --- a/arch/arm/dts/stm32mp15-pinctrl.dtsi +++ b/arch/arm/dts/stm32mp15-pinctrl.dtsi @@ -1835,6 +1835,36 @@ }; }; + uart4_pins_d: uart4-3 { + pins1 { + pinmux = ; /* UART4_TX */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = ; /* UART4_RX */ + bias-disable; + }; + }; + + uart4_idle_pins_d: uart4-idle-3 { + pins1 { + pinmux = ; /* UART4_TX */ + }; + pins2 { + pinmux = ; /* UART4_RX */ + bias-disable; + }; + }; + + uart4_sleep_pins_d: uart4-sleep-3 { + pins { + pinmux = , /* UART4_TX */ + ; /* UART4_RX */ + }; + }; + uart7_pins_a: uart7-0 { pins1 { pinmux = ; /* UART7_TX */ From 9b87f12953abd5ae2a544d1b508939e4666e3e75 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Mon, 13 Jun 2022 11:55:18 +0200 Subject: [PATCH 54/68] ARM: dts: stm32: Add alternate pinmux for UART5 pins Add another mux option for UART5 pins, this is used on DRC Compact board. Signed-off-by: Marek Vasut Cc: Patrice Chotard Cc: Patrick Delaunay Reviewed-by: Patrice Chotard Reviewed-by: Patrick Delaunay --- arch/arm/dts/stm32mp15-pinctrl.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm/dts/stm32mp15-pinctrl.dtsi b/arch/arm/dts/stm32mp15-pinctrl.dtsi index dc329bf531..6a5b4016f6 100644 --- a/arch/arm/dts/stm32mp15-pinctrl.dtsi +++ b/arch/arm/dts/stm32mp15-pinctrl.dtsi @@ -1865,6 +1865,19 @@ }; }; + uart5_pins_a: uart5-0 { + pins1 { + pinmux = ; /* UART5_TX */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = ; /* UART5_RX */ + bias-disable; + }; + }; + uart7_pins_a: uart7-0 { pins1 { pinmux = ; /* UART7_TX */ From 3577cc0632e1124e7c3cd549e0a612312626d510 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Mon, 13 Jun 2022 11:55:19 +0200 Subject: [PATCH 55/68] ARM: dts: stm32: Add alternate pinmux for CAN1 pins Add another mux option for CAN1 pins, this is used on DRC Compact board. Signed-off-by: Marek Vasut Cc: Patrice Chotard Cc: Patrick Delaunay Reviewed-by: Patrice Chotard Reviewed-by: Patrick Delaunay --- arch/arm/dts/stm32mp15-pinctrl.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm/dts/stm32mp15-pinctrl.dtsi b/arch/arm/dts/stm32mp15-pinctrl.dtsi index 6a5b4016f6..e0965c5936 100644 --- a/arch/arm/dts/stm32mp15-pinctrl.dtsi +++ b/arch/arm/dts/stm32mp15-pinctrl.dtsi @@ -929,6 +929,26 @@ }; }; + m_can1_pins_c: m-can1-2 { + pins1 { + pinmux = ; /* CAN1_TX */ + slew-rate = <1>; + drive-push-pull; + bias-disable; + }; + pins2 { + pinmux = ; /* CAN1_RX */ + bias-disable; + }; + }; + + m_can1_sleep_pins_c: m_can1-sleep-2 { + pins { + pinmux = , /* CAN1_TX */ + ; /* CAN1_RX */ + }; + }; + m_can2_pins_a: m-can2-0 { pins1 { pinmux = ; /* CAN2_TX */ From cb6d857db2667dbd44fc9b2786c69f7cf07109b6 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Mon, 13 Jun 2022 11:55:20 +0200 Subject: [PATCH 56/68] ARM: dts: stm32: Add alternate pinmux for SPI2 pins Add another mux option for SPI2 pins, this is used on DRC Compact board. Signed-off-by: Marek Vasut Cc: Patrice Chotard Cc: Patrick Delaunay Reviewed-by: Patrice Chotard Reviewed-by: Patrick Delaunay --- arch/arm/dts/stm32mp15-pinctrl.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm/dts/stm32mp15-pinctrl.dtsi b/arch/arm/dts/stm32mp15-pinctrl.dtsi index e0965c5936..b92a149a18 100644 --- a/arch/arm/dts/stm32mp15-pinctrl.dtsi +++ b/arch/arm/dts/stm32mp15-pinctrl.dtsi @@ -1778,6 +1778,21 @@ }; }; + spi2_pins_b: spi2-1 { + pins1 { + pinmux = , /* SPI1_SCK */ + ; /* SPI1_MOSI */ + bias-disable; + drive-push-pull; + slew-rate = <1>; + }; + + pins2 { + pinmux = ; /* SPI1_MISO */ + bias-disable; + }; + }; + spi4_pins_a: spi4-0 { pins { pinmux = , /* SPI4_SCK */ From 4f71c80b0d9e57d96df4462fbcd7d9c6a16f471d Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Mon, 13 Jun 2022 11:55:21 +0200 Subject: [PATCH 57/68] ARM: dts: stm32: Add DHCOR based DRC Compact board Add DT for DH DRC Compact unit, which is a universal controller device. The system has two ethernet ports, one CAN, RS485 and RS232, USB, uSD card slot, eMMC and SDIO Wi-Fi. Signed-off-by: Marek Vasut Cc: Patrice Chotard Cc: Patrick Delaunay Reviewed-by: Patrice Chotard Reviewed-by: Patrick Delaunay --- arch/arm/dts/Makefile | 3 +- .../arm/dts/stm32mp153c-dhcor-drc-compact.dts | 30 ++ .../stm32mp15xx-dhcor-drc-compact-u-boot.dtsi | 120 +++++++ .../arm/dts/stm32mp15xx-dhcor-drc-compact.dts | 16 + .../dts/stm32mp15xx-dhcor-drc-compact.dtsi | 326 ++++++++++++++++++ .../dh_stm32mp1/u-boot-dhcor.its | 15 + configs/stm32mp15_dhcor_basic_defconfig | 1 + 7 files changed, 510 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/stm32mp153c-dhcor-drc-compact.dts create mode 100644 arch/arm/dts/stm32mp15xx-dhcor-drc-compact-u-boot.dtsi create mode 100644 arch/arm/dts/stm32mp15xx-dhcor-drc-compact.dts create mode 100644 arch/arm/dts/stm32mp15xx-dhcor-drc-compact.dtsi diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 0a2713c06a..8a314210da 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -1172,7 +1172,8 @@ dtb-$(CONFIG_STM32MP15x) += \ stm32mp15xx-dhcom-drc02.dtb \ stm32mp15xx-dhcom-pdk2.dtb \ stm32mp15xx-dhcom-picoitx.dtb \ - stm32mp15xx-dhcor-avenger96.dtb + stm32mp15xx-dhcor-avenger96.dtb \ + stm32mp15xx-dhcor-drc-compact.dtb dtb-$(CONFIG_SOC_K3_AM6) += \ k3-am654-base-board.dtb \ diff --git a/arch/arm/dts/stm32mp153c-dhcor-drc-compact.dts b/arch/arm/dts/stm32mp153c-dhcor-drc-compact.dts new file mode 100644 index 0000000000..c8b9818499 --- /dev/null +++ b/arch/arm/dts/stm32mp153c-dhcor-drc-compact.dts @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) +/* + * Copyright (C) 2022 Marek Vasut + * + * DHCOR STM32MP1 variant: + * DHCR-STM32MP153C-C065-R051-V33-SPI-I-01LG + * DHCOR PCB number: 586-100 or newer + * DRC Compact PCB number: 627-100 or newer + */ + +/dts-v1/; + +#include "stm32mp153.dtsi" +#include "stm32mp15xc.dtsi" +#include "stm32mp15xx-dhcor-som.dtsi" +#include "stm32mp15xx-dhcor-drc-compact.dtsi" + +/ { + model = "DH electronics STM32MP153C DHCOR DRC Compact"; + compatible = "dh,stm32mp153c-dhcor-drc-compact", + "dh,stm32mp153c-dhcor-som", + "st,stm32mp153"; +}; + +&m_can1 { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&m_can1_pins_c>; + pinctrl-1 = <&m_can1_sleep_pins_c>; + status = "okay"; +}; diff --git a/arch/arm/dts/stm32mp15xx-dhcor-drc-compact-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcor-drc-compact-u-boot.dtsi new file mode 100644 index 0000000000..407fed5616 --- /dev/null +++ b/arch/arm/dts/stm32mp15xx-dhcor-drc-compact-u-boot.dtsi @@ -0,0 +1,120 @@ +// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause +/* + * Copyright (C) 2022 Marek Vasut + */ + +#include "stm32mp15xx-dhcor-u-boot.dtsi" + +/delete-node/ &ksz8851; + +/ { + aliases { + mmc0 = &sdmmc1; + mmc1 = &sdmmc2; + usb0 = &usbotg_hs; + ethernet1 = &ks8851; + }; + + config { + dh,board-coding-gpios = <&gpioh 9 0>, <&gpioh 8 0>, <&gpioh 3 0>; + }; + + /* This is actually on FMC2, but we do not have bus driver for that */ + ks8851: ks8851mll@64000000 { + compatible = "micrel,ks8851-mll"; + reg = <0x64000000 0x20000>; + }; +}; + +ðernet0 { + phy-reset-gpios = <&gpioz 2 GPIO_ACTIVE_LOW>; + + mdio0 { + ethernet-phy@7 { + reset-gpios = <&gpioz 2 GPIO_ACTIVE_LOW>; + reset-assert-us = <11000>; + reset-deassert-us = <1000>; + }; + }; +}; + +&pinctrl { + /* These should bound to FMC2 bus driver, but we do not have one */ + pinctrl-0 = <&fmc_pins_b>; + pinctrl-1 = <&fmc_sleep_pins_b>; + pinctrl-names = "default", "sleep"; +}; + +&sdmmc1 { + u-boot,dm-spl; + st,use-ckin; + st,cmd-gpios = <&gpiod 2 0>; + st,ck-gpios = <&gpioc 12 0>; + st,ckin-gpios = <&gpioe 4 0>; +}; + +&sdmmc1_b4_pins_a { + u-boot,dm-spl; + pins1 { + u-boot,dm-spl; + }; + pins2 { + u-boot,dm-spl; + }; +}; + +&sdmmc1_dir_pins_b { + u-boot,dm-spl; + pins1 { + u-boot,dm-spl; + }; + pins2 { + u-boot,dm-spl; + }; +}; + +&sdmmc2 { + u-boot,dm-spl; +}; + +&sdmmc2_b4_pins_a { + u-boot,dm-spl; + pins1 { + u-boot,dm-spl; + }; + pins2 { + u-boot,dm-spl; + }; +}; + +&sdmmc2_d47_pins_c { + u-boot,dm-spl; + pins { + u-boot,dm-spl; + }; +}; + +&sdmmc3 { /* SDIO Wi-Fi */ + status = "disabled"; +}; + +&uart4 { + u-boot,dm-pre-reloc; +}; + +&uart4_pins_d { + u-boot,dm-pre-reloc; + pins1 { + u-boot,dm-pre-reloc; + }; + pins2 { + u-boot,dm-pre-reloc; + /delete-property/ bias-disable; + bias-pull-up; + }; +}; + +&usbotg_hs { + u-boot,force-b-session-valid; + hnp-srp-disable; +}; diff --git a/arch/arm/dts/stm32mp15xx-dhcor-drc-compact.dts b/arch/arm/dts/stm32mp15xx-dhcor-drc-compact.dts new file mode 100644 index 0000000000..77dd944ff5 --- /dev/null +++ b/arch/arm/dts/stm32mp15xx-dhcor-drc-compact.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) +/* + * Copyright (C) 2022 Marek Vasut + */ + +/dts-v1/; + +#include "stm32mp151.dtsi" +#include "stm32mp15xc.dtsi" +#include "stm32mp15xx-dhcor-som.dtsi" +#include "stm32mp15xx-dhcor-drc-compact.dtsi" + +/ { + model = "DH electronics STM32MP15xx DHCOR DRC Compact"; + compatible = "dh,stm32mp15xx-dhcor-drc-compact", "st,stm32mp1xx"; +}; diff --git a/arch/arm/dts/stm32mp15xx-dhcor-drc-compact.dtsi b/arch/arm/dts/stm32mp15xx-dhcor-drc-compact.dtsi new file mode 100644 index 0000000000..bedccf0f00 --- /dev/null +++ b/arch/arm/dts/stm32mp15xx-dhcor-drc-compact.dtsi @@ -0,0 +1,326 @@ +// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) +/* + * Copyright (C) 2022 Marek Vasut + */ + +/ { + aliases { + ethernet0 = ðernet0; + ethernet1 = &ksz8851; + mmc0 = &sdmmc1; + rtc0 = &hwrtc; + rtc1 = &rtc; + serial0 = &uart4; + serial1 = &uart8; + serial2 = &usart3; + serial3 = &uart5; + spi0 = &qspi; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + led { + compatible = "gpio-leds"; + led1 { + label = "yellow:user0"; + gpios = <&gpioz 6 GPIO_ACTIVE_LOW>; + default-state = "off"; + }; + + led2 { + label = "red:user1"; + gpios = <&gpioz 3 GPIO_ACTIVE_LOW>; + default-state = "off"; + }; + }; + + ethernet_vio: vioregulator { + compatible = "regulator-fixed"; + regulator-name = "vio"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpioh 2 GPIO_ACTIVE_LOW>; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vdd>; + }; +}; + +&adc { /* X11 ADC inputs */ + pinctrl-names = "default"; + pinctrl-0 = <&adc12_ain_pins_b>; + vdd-supply = <&vdd>; + vdda-supply = <&vdda>; + vref-supply = <&vdda>; + status = "okay"; + + adc1: adc@0 { + st,adc-channels = <0 1 6>; + st,min-sample-time-nsecs = <5000>; + status = "okay"; + }; + + adc2: adc@100 { + st,adc-channels = <0 1 2>; + st,min-sample-time-nsecs = <5000>; + status = "okay"; + }; +}; + +ðernet0 { + status = "okay"; + pinctrl-0 = <ðernet0_rgmii_pins_c>; + pinctrl-1 = <ðernet0_rgmii_sleep_pins_c>; + pinctrl-names = "default", "sleep"; + phy-mode = "rgmii"; + max-speed = <1000>; + phy-handle = <&phy0>; + + mdio0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dwmac-mdio"; + reset-gpios = <&gpioz 2 GPIO_ACTIVE_LOW>; + reset-delay-us = <1000>; + reset-post-delay-us = <1000>; + + phy0: ethernet-phy@7 { + reg = <7>; + + rxc-skew-ps = <1500>; + rxdv-skew-ps = <540>; + rxd0-skew-ps = <420>; + rxd1-skew-ps = <420>; + rxd2-skew-ps = <420>; + rxd3-skew-ps = <420>; + + txc-skew-ps = <1440>; + txen-skew-ps = <540>; + txd0-skew-ps = <420>; + txd1-skew-ps = <420>; + txd2-skew-ps = <420>; + txd3-skew-ps = <420>; + }; + }; +}; + +&fmc { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&fmc_pins_b>; + pinctrl-1 = <&fmc_sleep_pins_b>; + status = "okay"; + + ksz8851: ethernet@1,0 { + compatible = "micrel,ks8851-mll"; + reg = <1 0x0 0x2>, <1 0x2 0x20000>; + interrupt-parent = <&gpioc>; + interrupts = <3 IRQ_TYPE_LEVEL_LOW>; + bank-width = <2>; + + /* Timing values are in nS */ + st,fmc2-ebi-cs-mux-enable; + st,fmc2-ebi-cs-transaction-type = <4>; + st,fmc2-ebi-cs-buswidth = <16>; + st,fmc2-ebi-cs-address-setup-ns = <5>; + st,fmc2-ebi-cs-address-hold-ns = <5>; + st,fmc2-ebi-cs-bus-turnaround-ns = <5>; + st,fmc2-ebi-cs-data-setup-ns = <45>; + st,fmc2-ebi-cs-data-hold-ns = <1>; + st,fmc2-ebi-cs-write-address-setup-ns = <5>; + st,fmc2-ebi-cs-write-address-hold-ns = <5>; + st,fmc2-ebi-cs-write-bus-turnaround-ns = <5>; + st,fmc2-ebi-cs-write-data-setup-ns = <45>; + st,fmc2-ebi-cs-write-data-hold-ns = <1>; + }; +}; + +&gpioa { + gpio-line-names = "", "", "", "", + "DRCC-VAR2", "", "", "", + "", "", "", "", + "", "", "", ""; +}; + +&gpioe { + gpio-line-names = "", "", "", "", + "", "DRCC-GPIO0", "", "", + "", "", "", "", + "", "", "", ""; +}; + +&gpiog { + gpio-line-names = "", "", "", "", + "", "", "", "", + "", "", "", "", + "DRCC-GPIO5", "", "", ""; +}; + +&gpioh { + gpio-line-names = "", "", "", "DRCC-HW2", + "DRCC-GPIO4", "", "", "", + "DRCC-HW1", "DRCC-HW0", "", "DRCC-VAR1", + "DRCC-VAR0", "", "", "DRCC-GPIO6"; +}; + +&gpioi { + gpio-line-names = "", "", "", "", + "", "", "", "DRCC-GPIO2", + "", "DRCC-GPIO1", "", "", + "", "", "", ""; +}; + +&i2c1 { /* X11 I2C1 */ + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins_b>; + i2c-scl-rising-time-ns = <185>; + i2c-scl-falling-time-ns = <20>; + status = "okay"; + /delete-property/dmas; + /delete-property/dma-names; +}; + +&i2c4 { + hwrtc: rtc@32 { + compatible = "microcrystal,rv8803"; + reg = <0x32>; + }; + + eeprom@50 { + compatible = "atmel,24c04"; + reg = <0x50>; + pagesize = <16>; + }; +}; + +&sdmmc1 { /* MicroSD */ + pinctrl-names = "default", "opendrain", "sleep"; + pinctrl-0 = <&sdmmc1_b4_pins_a>; + pinctrl-1 = <&sdmmc1_b4_od_pins_a>; + pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>; + cd-gpios = <&gpioi 8 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; + disable-wp; + st,neg-edge; + bus-width = <4>; + vmmc-supply = <&vdd>; + vqmmc-supply = <&vdd>; + status = "okay"; +}; + +&sdmmc2 { /* eMMC */ + pinctrl-names = "default", "opendrain", "sleep"; + pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_c>; + pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_c>; + pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_c>; + bus-width = <8>; + no-sd; + no-sdio; + non-removable; + st,neg-edge; + vmmc-supply = <&v3v3>; + vqmmc-supply = <&vdd>; + status = "okay"; +}; + +&sdmmc3 { /* SDIO Wi-Fi */ + pinctrl-names = "default", "opendrain", "sleep"; + pinctrl-0 = <&sdmmc3_b4_pins_a>; + pinctrl-1 = <&sdmmc3_b4_od_pins_a>; + pinctrl-2 = <&sdmmc3_b4_sleep_pins_a>; + broken-cd; + bus-width = <4>; + mmc-ddr-3_3v; + st,neg-edge; + vmmc-supply = <&v3v3>; + vqmmc-supply = <&v3v3>; + status = "okay"; +}; + +&spi2 { /* X11 SPI */ + pinctrl-names = "default"; + pinctrl-0 = <&spi2_pins_b>; + cs-gpios = <&gpioi 0 0>; + status = "disabled"; + /delete-property/dmas; + /delete-property/dma-names; +}; + +&uart4 { + label = "UART0"; + pinctrl-names = "default"; + pinctrl-0 = <&uart4_pins_d>; + /delete-property/dmas; + /delete-property/dma-names; + status = "okay"; +}; + +&uart5 { /* X11 UART */ + label = "X11-UART5"; + pinctrl-names = "default"; + pinctrl-0 = <&uart5_pins_a>; + /delete-property/dmas; + /delete-property/dma-names; + status = "okay"; +}; + +&uart8 { + label = "RS485-1"; + pinctrl-names = "default"; + pinctrl-0 = <&uart8_pins_a &uart8_rtscts_pins_a>; + uart-has-rtscts; + /delete-property/dmas; + /delete-property/dma-names; + status = "okay"; +}; + +&usart3 { /* RS485 or RS232 */ + label = "RS485-2"; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&usart3_pins_e>; + pinctrl-1 = <&usart3_sleep_pins_e>; + uart-has-rtscts; + /delete-property/dmas; + /delete-property/dma-names; + status = "okay"; +}; + +&usbh_ehci { + phys = <&usbphyc_port0>; + status = "okay"; +}; + +&usbh_ohci { + phys = <&usbphyc_port0>; + status = "okay"; +}; + +&usbotg_hs { + dr_mode = "otg"; + pinctrl-0 = <&usbotg_hs_pins_a>; + pinctrl-names = "default"; + phy-names = "usb2-phy"; + phys = <&usbphyc_port1 0>; + vbus-supply = <&vbus_otg>; + status = "okay"; +}; + +&usbphyc { + status = "okay"; +}; + +&usbphyc_port0 { + phy-supply = <&vdd_usb>; + vdda1v1-supply = <®11>; + vdda1v8-supply = <®18>; + connector { + compatible = "usb-a-connector"; + vbus-supply = <&vbus_sw>; + }; +}; + +&usbphyc_port1 { + phy-supply = <&vdd_usb>; + vdda1v1-supply = <®11>; + vdda1v8-supply = <®18>; +}; diff --git a/board/dhelectronics/dh_stm32mp1/u-boot-dhcor.its b/board/dhelectronics/dh_stm32mp1/u-boot-dhcor.its index 0ea10a1497..de7dcb317f 100644 --- a/board/dhelectronics/dh_stm32mp1/u-boot-dhcor.its +++ b/board/dhelectronics/dh_stm32mp1/u-boot-dhcor.its @@ -23,6 +23,14 @@ arch = "arm"; compression = "none"; }; + + fdt-2 { + description = ".dtb"; + data = /incbin/("arch/arm/dts/stm32mp15xx-dhcor-drc-compact.dtb"); + type = "flat_dt"; + arch = "arm"; + compression = "none"; + }; }; configurations { @@ -35,6 +43,13 @@ fdt = "fdt-1"; }; + config-2 { + /* DT+SoM+board model */ + description = "dh,stm32mp15xx-dhcor-drc-compact_somrev0_boardrev0"; + firmware = "uboot"; + fdt = "fdt-2"; + }; + /* Add 586-200..586-400 with fdt-2..fdt-4 here */ }; }; diff --git a/configs/stm32mp15_dhcor_basic_defconfig b/configs/stm32mp15_dhcor_basic_defconfig index 4e70566e3f..66a09ef18b 100644 --- a/configs/stm32mp15_dhcor_basic_defconfig +++ b/configs/stm32mp15_dhcor_basic_defconfig @@ -108,6 +108,7 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DM_ETH=y CONFIG_DWC_ETH_QOS=y +CONFIG_KS8851_MLL=y CONFIG_PHY=y CONFIG_SPL_PHY=y CONFIG_PHY_STM32_USBPHYC=y From 373c1428a0374c29f19cca76f12c0e93378a634a Mon Sep 17 00:00:00 2001 From: Dinesh Maniyam Date: Wed, 1 Jun 2022 15:54:59 +0800 Subject: [PATCH 58/68] arch: arm: socfpga: timer_s10: Override udelay for secure section Override __udelay() as 'always inlined' function so that PSCI code run in '__secure' section can call this delay function as well. Signed-off-by: Chee Hong Ang Signed-off-by: Dinesh Maniyam Reviewed-by: Tien Fong Chee --- arch/arm/mach-socfpga/timer_s10.c | 34 ++++++++++++++++++++++++++++++- 1 file changed, 33 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-socfpga/timer_s10.c b/arch/arm/mach-socfpga/timer_s10.c index 7d5598e1a3..84b13ce9d3 100644 --- a/arch/arm/mach-socfpga/timer_s10.c +++ b/arch/arm/mach-socfpga/timer_s10.c @@ -1,11 +1,12 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Copyright (C) 2017-2018 Intel Corporation + * Copyright (C) 2017-2022 Intel Corporation * */ #include #include +#include #include #include @@ -26,3 +27,34 @@ int timer_init(void) #endif return 0; } + +__always_inline u64 __get_time_stamp(void) +{ + u64 cntpct; + + isb(); + asm volatile("mrs %0, cntpct_el0" : "=r" (cntpct)); + + return cntpct; +} + +__always_inline uint64_t __usec_to_tick(unsigned long usec) +{ + u64 tick = usec; + u64 cntfrq; + + asm volatile("mrs %0, cntfrq_el0" : "=r" (cntfrq)); + tick *= cntfrq; + do_div(tick, 1000000); + + return tick; +} + +__always_inline void __udelay(unsigned long usec) +{ + /* get current timestamp */ + u64 tmp = __get_time_stamp() + __usec_to_tick(usec); + + while (__get_time_stamp() < tmp + 1) /* loop till event */ + ; +} \ No newline at end of file From 7f8533078291bc1c96125ec0619ffd5d01ecc83d Mon Sep 17 00:00:00 2001 From: Dinesh Maniyam Date: Tue, 31 May 2022 16:05:56 +0800 Subject: [PATCH 59/68] arm: dts: socfpga: agilex: Add freeze controller node The freeze controller is required for FPGA partial reconfig. This node is disable on default. Enable this node via u-boot fdt command when needed. Signed-off-by: Yau Wai Gan Signed-off-by: Dinesh Maniyam Reviewed-by: Tien Fong Chee --- arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi b/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi index 6cac36a1fc..2400fad18a 100644 --- a/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi +++ b/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi @@ -2,7 +2,7 @@ /* * U-Boot additions * - * Copyright (C) 2019 Intel Corporation + * Copyright (C) 2019-2022 Intel Corporation */ #include "socfpga_agilex-u-boot.dtsi" @@ -11,6 +11,15 @@ aliases { spi0 = &qspi; i2c0 = &i2c1; + freeze_br0 = &freeze_controller; + }; + + soc { + freeze_controller: freeze_controller@f9000450 { + compatible = "altr,freeze-bridge-controller"; + reg = <0xf9000450 0x00000010>; + status = "disabled"; + }; }; memory { From 5474fb894cba4de1f8735e02155ca85d81af03de Mon Sep 17 00:00:00 2001 From: Dinesh Maniyam Date: Tue, 31 May 2022 16:15:17 +0800 Subject: [PATCH 60/68] arm: dts: socfpga: stratix10: Add freeze controller node The freeze controller is required for FPGA partial reconfig. This node is disable on default. Enable this node via u-boot fdt command when needed. Signed-off-by: Yau Wai Gan Signed-off-by: Dinesh Maniyam Reviewed-by: Tien Fong Chee --- arch/arm/dts/socfpga_stratix10_socdk-u-boot.dtsi | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/arch/arm/dts/socfpga_stratix10_socdk-u-boot.dtsi b/arch/arm/dts/socfpga_stratix10_socdk-u-boot.dtsi index 61df425f14..75a29045da 100755 --- a/arch/arm/dts/socfpga_stratix10_socdk-u-boot.dtsi +++ b/arch/arm/dts/socfpga_stratix10_socdk-u-boot.dtsi @@ -2,7 +2,7 @@ /* * U-Boot additions * - * Copyright (C) 2019-2020 Intel Corporation + * Copyright (C) 2019-2022 Intel Corporation */ #include "socfpga_stratix10-u-boot.dtsi" @@ -10,6 +10,15 @@ /{ aliases { spi0 = &qspi; + freeze_br0 = &freeze_controller; + }; + + soc { + freeze_controller: freeze_controller@f9000450 { + compatible = "altr,freeze-bridge-controller"; + reg = <0xf9000450 0x00000010>; + status = "disabled"; + }; }; }; From d192adafebcd5e742a229aedbdcc7d6957d68f02 Mon Sep 17 00:00:00 2001 From: Dinesh Maniyam Date: Wed, 1 Jun 2022 15:57:25 +0800 Subject: [PATCH 61/68] drivers: cache: ncore: Disable snoop filter There is hardware bug in NCORE CCU IP and it is causing an issue in the coherent directory tracking of outstanding cache lines. The workaround is disabling snoop filter. Signed-off-by: Dinesh Maniyam Reviewed-by: Tien Fong Chee --- drivers/cache/cache-ncore.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/cache/cache-ncore.c b/drivers/cache/cache-ncore.c index 3beff780de..117d2b91ab 100644 --- a/drivers/cache/cache-ncore.c +++ b/drivers/cache/cache-ncore.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Copyright (C) 2019 Intel Corporation + * Copyright (C) 2019-2022 Intel Corporation * */ #include @@ -81,8 +81,8 @@ static void ncore_ccu_init_dirs(void __iomem *base) hang(); } - /* Enable snoop filter, a bit per snoop filter */ - setbits_le32((ulong)CCU_DIR_REG_ADDR(base, DIRUSFER, i), + /* Disable snoop filter, a bit per snoop filter */ + clrbits_le32((ulong)CCU_DIR_REG_ADDR(base, DIRUSFER, i), BIT(f)); } } From 32e0379143b433e29d76404f5f4c279067e48853 Mon Sep 17 00:00:00 2001 From: Dinesh Maniyam Date: Wed, 1 Jun 2022 18:49:02 +0800 Subject: [PATCH 62/68] ddr: altera: soc64: Integer fix overflow that caused DDR size mismatched Convert the constant integer to 'phys_size_t' to avoid overflow when calculating the SDRAM size. Signed-off-by: Dinesh Maniyam Reviewed-by: Tien Fong Chee --- drivers/ddr/altera/sdram_soc64.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/ddr/altera/sdram_soc64.c b/drivers/ddr/altera/sdram_soc64.c index d6baac2410..9b1710c135 100644 --- a/drivers/ddr/altera/sdram_soc64.c +++ b/drivers/ddr/altera/sdram_soc64.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Copyright (C) 2016-2021 Intel Corporation + * Copyright (C) 2016-2022 Intel Corporation * */ @@ -239,7 +239,8 @@ phys_size_t sdram_calculate_size(struct altera_sdram_plat *plat) { u32 dramaddrw = hmc_readl(plat, DRAMADDRW); - phys_size_t size = 1 << (DRAMADDRW_CFG_CS_ADDR_WIDTH(dramaddrw) + + phys_size_t size = (phys_size_t)1 << + (DRAMADDRW_CFG_CS_ADDR_WIDTH(dramaddrw) + DRAMADDRW_CFG_BANK_GRP_ADDR_WIDTH(dramaddrw) + DRAMADDRW_CFG_BANK_ADDR_WIDTH(dramaddrw) + DRAMADDRW_CFG_ROW_ADDR_WIDTH(dramaddrw) + From a8a349d743065430b004ebfc112ae6c24168359b Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Sat, 11 Jun 2022 08:23:31 +0200 Subject: [PATCH 63/68] doc: man-page for bootz command Provide a man-page for the bootz command. Signed-off-by: Heinrich Schuchardt --- doc/usage/cmd/bootz.rst | 66 +++++++++++++++++++++++++++++++++++++++++ doc/usage/index.rst | 1 + 2 files changed, 67 insertions(+) create mode 100644 doc/usage/cmd/bootz.rst diff --git a/doc/usage/cmd/bootz.rst b/doc/usage/cmd/bootz.rst new file mode 100644 index 0000000000..78953e9ca2 --- /dev/null +++ b/doc/usage/cmd/bootz.rst @@ -0,0 +1,66 @@ +.. SPDX-License-Identifier: GPL-2.0+: + +bootz command +============= + +Synopsis +-------- + +:: + + bootz [ [[:]] []] + +Description +----------- + +The bootz command is used to boot a Linux kernel in 'zImage' format. + +addr + address of kernel image, defaults to the value of the environment + variable $loadaddr. + +initrd + address of the initial RAM disk. Use '-' to boot a kernel with a device + tree but without an initial RAM disk. + +size + size of the initial RAM disk. This parameter must be specified for raw + initial RAM disks. + +fdt + address of the device tree. + +Example +------- + +This is the boot log of an OrangePi PC board: + +:: + + => load mmc 0:2 $fdt_addr_r dtb + 23093 bytes read in 7 ms (3.1 MiB/s) + => load mmc 0:2 $kernel_addr_r vmlinuz + 5079552 bytes read in 215 ms (22.5 MiB/s) + => load mmc 0:2 $ramdisk_addr_r initrd.img + 23854965 bytes read in 995 ms (22.9 MiB/s) + => bootz $kernel_addr_r $ramdisk_addr_r:$filesize $fdt_addr_r + Kernel image @ 0x42000000 [ 0x000000 - 0x4d8200 ] + ## Flattened Device Tree blob at 43000000 + Booting using the fdt blob at 0x43000000 + EHCI failed to shut down host controller. + Loading Ramdisk to 48940000, end 49ffff75 ... OK + Loading Device Tree to 48937000, end 4893fa34 ... OK + + Starting kernel ... + +Configuration +------------- + +The bootz command is only available if CONFIG_CMD_BOOTZ=y. + +Return value +------------ + +Normally this command does not return. If an error occurs, the return value $? +is set to 1 (false). If the operating system returns to U-Boot, the system is +reset. diff --git a/doc/usage/index.rst b/doc/usage/index.rst index c03f4aef9e..1c03b9b33b 100644 --- a/doc/usage/index.rst +++ b/doc/usage/index.rst @@ -30,6 +30,7 @@ Shell commands cmd/bootmenu cmd/bootmeth cmd/button + cmd/bootz cmd/cbsysinfo cmd/conitrace cmd/echo From eaa268589e9cf81f37314f8efaebdb4dbb781647 Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Sun, 19 Jun 2022 13:59:22 +0200 Subject: [PATCH 64/68] doc: man-page for the printenv command Privide a man-page for the printenv command. Signed-off-by: Heinrich Schuchardt --- doc/usage/cmd/printenv.rst | 90 ++++++++++++++++++++++++++++++++++++++ doc/usage/index.rst | 1 + 2 files changed, 91 insertions(+) create mode 100644 doc/usage/cmd/printenv.rst diff --git a/doc/usage/cmd/printenv.rst b/doc/usage/cmd/printenv.rst new file mode 100644 index 0000000000..9cb20f6ce6 --- /dev/null +++ b/doc/usage/cmd/printenv.rst @@ -0,0 +1,90 @@ +.. SPDX-License-Identifier: GPL-2.0+: + +printenv command +================ + +Synopsis +-------- + +:: + + printenv [-a] [name ...] + printenv -e [-guid guid][-n] [name] + +Description +----------- + +The printenv command is used to print environment or UEFI variables. + +\-a + Print environment variables starting with a period ('.'). + +\-e + Print UEFI variables. Without -e environment variables are printed. + +\-guid *guid* + Specify vendor GUID *guid*. If none is specified, all UEFI variables with + the specified name are printed irrespective of their vendor GUID. + +\-n + don't show hexadecimal dump of value + +name + Variable name. If no name is provided, all variables are printed. + Multiple environment variable names may be specified. + +Examples +-------- + +The following examples demonstrates the effect of the *-a* flag when displaying +environment variables: + +:: + + => setenv .foo bar + => printenv + arch=sandbox + baudrate=115200 + board=sandbox + ... + stdout=serial,vidconsole + + Environment size: 644/8188 bytes + => printenv -a + .foo=bar + arch=sandbox + baudrate=115200 + board=sandbox + ... + stdout=serial,vidconsole + + Environment size: 653/8188 bytes + => + +The next example shows the effect of the *-n* flag when displaying an UEFI +variable and how to specify a vendor GUID: + +:: + + => printenv -e -guid 8be4df61-93ca-11d2-aa0d-00e098032b8c PlatformLangCodes + PlatformLangCodes: + 8be4df61-93ca-11d2-aa0d-00e098032b8c (EFI_GLOBAL_VARIABLE_GUID) + BS|RT|RO, DataSize = 0x6 + 00000000: 65 6e 2d 55 53 00 en-US. + => printenv -e -n PlatformLangCodes + PlatformLangCodes: + 8be4df61-93ca-11d2-aa0d-00e098032b8c (EFI_GLOBAL_VARIABLE_GUID) + BS|RT|RO, DataSize = 0x6 + => + +Configuration +============= + +UEFI variables are only supported if CONFIG_CMD_NVEDIT_EFI=y. The value of UEFI +variables can only be displayed if CONFIG_HEXDUMP=y. + +Return value +------------ + +The return value $? is 1 (false) if a specified variable is not found. +Otherwise $? is set to 0 (true). diff --git a/doc/usage/index.rst b/doc/usage/index.rst index 1c03b9b33b..770418434a 100644 --- a/doc/usage/index.rst +++ b/doc/usage/index.rst @@ -49,6 +49,7 @@ Shell commands cmd/md cmd/mmc cmd/pinmux + cmd/printenv cmd/pstore cmd/qfw cmd/reset From a872b18a0f0365c7dd45239f85b4f7ffed3a6781 Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Sun, 19 Jun 2022 13:36:48 +0200 Subject: [PATCH 65/68] cmd: correct return value for printenv -e If printenv -e is executed and the specified variable is not found, the return value $? of the command should be 1 (false). Signed-off-by: Heinrich Schuchardt --- cmd/nvedit_efi.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/cmd/nvedit_efi.c b/cmd/nvedit_efi.c index 7ebb14e25f..770877c527 100644 --- a/cmd/nvedit_efi.c +++ b/cmd/nvedit_efi.c @@ -182,8 +182,10 @@ static int efi_dump_var_all(int argc, char *const argv[], } free(var_name16); - if (!match && argc == 1) + if (!match && argc == 1) { printf("Error: \"%s\" not defined\n", argv[0]); + return CMD_RET_FAILURE; + } return CMD_RET_SUCCESS; } From e05bd68ed5fcbcd857f5a072f469886fb627fe97 Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Sun, 19 Jun 2022 14:02:18 +0200 Subject: [PATCH 66/68] test: work around for EFI terminal size probing When the UEFI sub-system is initialized it sends an escape sequence to the serial console to determine the terminal size. This stops the run_command_list() function of the console emulation from recognizing the U-Boot command line prompt. Add a 'print -e' command as first command in the command list to work around this issue. Signed-off-by: Heinrich Schuchardt --- test/py/tests/test_efi_capsule/test_capsule_firmware_fit.py | 1 + test/py/tests/test_efi_capsule/test_capsule_firmware_raw.py | 2 ++ 2 files changed, 3 insertions(+) diff --git a/test/py/tests/test_efi_capsule/test_capsule_firmware_fit.py b/test/py/tests/test_efi_capsule/test_capsule_firmware_fit.py index 5bef84958b..8f75b554ad 100644 --- a/test/py/tests/test_efi_capsule/test_capsule_firmware_fit.py +++ b/test/py/tests/test_efi_capsule/test_capsule_firmware_fit.py @@ -117,6 +117,7 @@ class TestEfiCapsuleFirmwareFit(object): with u_boot_console.log.section('Test Case 2-a, before reboot'): output = u_boot_console.run_command_list([ 'host bind 0 %s' % disk_img, + 'printenv -e PlatformLangCodes', # workaround for terminal size determination 'efidebug boot add -b 1 TEST host 0:1 /helloworld.efi -s ""', 'efidebug boot order 1', 'env set -e -nv -bs -rt OsIndications =0x0000000000000004', diff --git a/test/py/tests/test_efi_capsule/test_capsule_firmware_raw.py b/test/py/tests/test_efi_capsule/test_capsule_firmware_raw.py index c8c647d0b1..92bfb14932 100644 --- a/test/py/tests/test_efi_capsule/test_capsule_firmware_raw.py +++ b/test/py/tests/test_efi_capsule/test_capsule_firmware_raw.py @@ -115,6 +115,7 @@ class TestEfiCapsuleFirmwareRaw: with u_boot_console.log.section('Test Case 2-a, before reboot'): output = u_boot_console.run_command_list([ 'host bind 0 %s' % disk_img, + 'printenv -e PlatformLangCodes', # workaround for terminal size determination 'efidebug boot add -b 1 TEST host 0:1 /helloworld.efi -s ""', 'efidebug boot order 1', 'env set -e OsIndications', @@ -197,6 +198,7 @@ class TestEfiCapsuleFirmwareRaw: with u_boot_console.log.section('Test Case 3-a, before reboot'): output = u_boot_console.run_command_list([ 'host bind 0 %s' % disk_img, + 'printenv -e PlatformLangCodes', # workaround for terminal size determination 'efidebug boot add -b 1 TEST host 0:1 /helloworld.efi -s ""', 'efidebug boot order 1', 'env set -e -nv -bs -rt OsIndications =0x0000000000000004', From 68edbed454b863dbcd197e19e1ab26a0a05c7d85 Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Tue, 14 Jun 2022 08:02:03 +0200 Subject: [PATCH 67/68] efi_loader: initialize console size late If CONFIG_VIDEO_DM=n we query the display size from the serial console. Especially when using a remote console the response can be so late that it interferes with autoboot. Only query the console size when running an EFI binary. Add debug output showing the determined console size. Reported-by: Fabio Estevam Fixes: a57ad20d07e8 ("efi_loader: split efi_init_obj_list() into two stages") Fixes: a9bf024b2933 ("efi_loader: disk: a helper function to create efi_disk objects from udevice") Signed-off-by: Heinrich Schuchardt Tested-by: Fabio Estevam Tested-by: Heiko Thiery --- include/efi_loader.h | 2 ++ lib/efi_loader/efi_console.c | 20 +++++++++++++------- lib/efi_loader/efi_setup.c | 4 ++++ 3 files changed, 19 insertions(+), 7 deletions(-) diff --git a/include/efi_loader.h b/include/efi_loader.h index f6651e2c60..c1e00ebac3 100644 --- a/include/efi_loader.h +++ b/include/efi_loader.h @@ -499,6 +499,8 @@ extern struct list_head efi_register_notify_events; int efi_init_early(void); /* Initialize efi execution environment */ efi_status_t efi_init_obj_list(void); +/* Set up console modes */ +void efi_setup_console_size(void); /* Install device tree */ efi_status_t efi_install_fdt(void *fdt); /* Run loaded UEFI image */ diff --git a/lib/efi_loader/efi_console.c b/lib/efi_loader/efi_console.c index 60a3fc85ac..3164fd484e 100644 --- a/lib/efi_loader/efi_console.c +++ b/lib/efi_loader/efi_console.c @@ -5,6 +5,8 @@ * Copyright (c) 2016 Alexander Graf */ +#define LOG_CATEGORY LOGC_EFI + #include #include #include @@ -12,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -58,7 +61,12 @@ const efi_guid_t efi_guid_text_output_protocol = #define cESC '\x1b' #define ESC "\x1b" -/* Default to mode 0 */ +/* + * efi_con_mode - mode information of the Simple Text Output Protocol + * + * Use safe settings before efi_setup_console_size() is called. + * By default enable only the 80x25 mode which must always exist. + */ static struct simple_text_output_mode efi_con_mode = { .max_mode = 1, .mode = 0, @@ -333,13 +341,13 @@ static int __maybe_unused query_vidconsole(int *rows, int *cols) } /** - * query_console_size() - update the mode table. + * efi_setup_console_size() - update the mode table. * * By default the only mode available is 80x25. If the console has at least 50 * lines, enable mode 80x50. If we can query the console size and it is neither * 80x25 nor 80x50, set it as an additional mode. */ -static void query_console_size(void) +void efi_setup_console_size(void) { int rows = 25, cols = 80; int ret = -ENODEV; @@ -351,6 +359,8 @@ static void query_console_size(void) if (ret) return; + log_debug("Console size %dx%d\n", rows, cols); + /* Test if we can have Mode 1 */ if (cols >= 80 && rows >= 50) { efi_cout_modes[1].present = 1; @@ -371,7 +381,6 @@ static void query_console_size(void) } } - /** * efi_cout_query_mode() - get terminal size for a text mode * @@ -1262,9 +1271,6 @@ efi_status_t efi_console_register(void) efi_status_t r; struct efi_device_path *dp; - /* Set up mode information */ - query_console_size(); - /* Install protocols on root node */ r = EFI_CALL(efi_install_multiple_protocol_interfaces (&efi_root, diff --git a/lib/efi_loader/efi_setup.c b/lib/efi_loader/efi_setup.c index 250eeb2fcd..492ecf4cb1 100644 --- a/lib/efi_loader/efi_setup.c +++ b/lib/efi_loader/efi_setup.c @@ -243,6 +243,10 @@ efi_status_t efi_init_obj_list(void) goto out; } + /* Set up console modes */ + efi_setup_console_size(); + + /* Install EFI_RNG_PROTOCOL */ if (IS_ENABLED(CONFIG_EFI_RNG_PROTOCOL)) { ret = efi_rng_register(); if (ret != EFI_SUCCESS) From 568a226f87655fd5339514f66413c2ad72f65d6f Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 20 Jun 2022 14:30:36 -0400 Subject: [PATCH 68/68] Prepare v2022.07-rc5 Signed-off-by: Tom Rini --- Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 2fa3a3b488..27a8913e06 100644 --- a/Makefile +++ b/Makefile @@ -3,7 +3,7 @@ VERSION = 2022 PATCHLEVEL = 07 SUBLEVEL = -EXTRAVERSION = -rc4 +EXTRAVERSION = -rc5 NAME = # *DOCUMENTATION*