diff --git a/.gitignore b/.gitignore index 28c439f09f..eb769f144c 100644 --- a/.gitignore +++ b/.gitignore @@ -10,6 +10,7 @@ *.asn1.[ch] *.bin *.cfgout +*.cover *.dtb *.dtbo *.dtb.S @@ -22,6 +23,7 @@ *.lex.c *.lst *.mod.c +*.mbx *.o *.o.* *.order diff --git a/Makefile b/Makefile index 2fa3a3b488..27a8913e06 100644 --- a/Makefile +++ b/Makefile @@ -3,7 +3,7 @@ VERSION = 2022 PATCHLEVEL = 07 SUBLEVEL = -EXTRAVERSION = -rc4 +EXTRAVERSION = -rc5 NAME = # *DOCUMENTATION* diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c index 3de18c7675..e4736e5643 100644 --- a/arch/arm/cpu/armv8/cache_v8.c +++ b/arch/arm/cpu/armv8/cache_v8.c @@ -39,8 +39,28 @@ DECLARE_GLOBAL_DATA_PTR; * off: FFF */ -u64 get_tcr(int el, u64 *pips, u64 *pva_bits) +static int get_effective_el(void) { + int el = current_el(); + + if (el == 2) { + u64 hcr_el2; + + /* + * If we are using the EL2&0 translation regime, the TCR_EL2 + * looks like the EL1 version, even though we are in EL2. + */ + __asm__ ("mrs %0, HCR_EL2\n" : "=r" (hcr_el2)); + if (hcr_el2 & BIT(HCR_EL2_E2H_BIT)) + return 1; + } + + return el; +} + +u64 get_tcr(u64 *pips, u64 *pva_bits) +{ + int el = get_effective_el(); u64 max_addr = 0; u64 ips, va_bits; u64 tcr; @@ -115,7 +135,7 @@ static u64 *find_pte(u64 addr, int level) debug("addr=%llx level=%d\n", addr, level); - get_tcr(0, NULL, &va_bits); + get_tcr(NULL, &va_bits); if (va_bits < 39) start_level = 1; @@ -343,7 +363,7 @@ __weak u64 get_page_table_size(void) u64 va_bits; int start_level = 0; - get_tcr(0, NULL, &va_bits); + get_tcr(NULL, &va_bits); if (va_bits < 39) start_level = 1; @@ -415,7 +435,7 @@ __weak void mmu_setup(void) setup_all_pgtables(); el = current_el(); - set_ttbr_tcr_mair(el, gd->arch.tlb_addr, get_tcr(el, NULL, NULL), + set_ttbr_tcr_mair(el, gd->arch.tlb_addr, get_tcr(NULL, NULL), MEMORY_ATTRIBUTES); /* enable the mmu */ diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c index 253008a9c1..c989a43cbe 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c @@ -454,7 +454,7 @@ static inline void early_mmu_setup(void) /* point TTBR to the new table */ set_ttbr_tcr_mair(el, gd->arch.tlb_addr, - get_tcr(el, NULL, NULL) & + get_tcr(NULL, NULL) & ~(TCR_ORGN_MASK | TCR_IRGN_MASK), MEMORY_ATTRIBUTES); @@ -609,7 +609,7 @@ static inline void final_mmu_setup(void) invalidate_icache_all(); /* point TTBR to the new table */ - set_ttbr_tcr_mair(el, gd->arch.tlb_addr, get_tcr(el, NULL, NULL), + set_ttbr_tcr_mair(el, gd->arch.tlb_addr, get_tcr(NULL, NULL), MEMORY_ATTRIBUTES); set_sctlr(get_sctlr() | CR_M); diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S index d328e8c08a..28f0df13f0 100644 --- a/arch/arm/cpu/armv8/start.S +++ b/arch/arm/cpu/armv8/start.S @@ -125,7 +125,7 @@ pie_fixup_done: msr cptr_el3, xzr /* Enable FP/SIMD */ b 0f 2: mrs x1, hcr_el2 - tbnz x1, #34, 1f /* HCR_EL2.E2H */ + tbnz x1, #HCR_EL2_E2H_BIT, 1f /* HCR_EL2.E2H */ orr x1, x1, #HCR_EL2_AMO_EL2 /* Route SErrors to EL2 */ msr hcr_el2, x1 set_vbar vbar_el2, x0 diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index cae008515d..85346c5e84 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -1178,7 +1178,8 @@ dtb-$(CONFIG_STM32MP15x) += \ stm32mp15xx-dhcom-drc02.dtb \ stm32mp15xx-dhcom-pdk2.dtb \ stm32mp15xx-dhcom-picoitx.dtb \ - stm32mp15xx-dhcor-avenger96.dtb + stm32mp15xx-dhcor-avenger96.dtb \ + stm32mp15xx-dhcor-drc-compact.dtb dtb-$(CONFIG_SOC_K3_AM6) += \ k3-am654-base-board.dtb \ diff --git a/arch/arm/dts/imx6qdl-sr-som.dtsi b/arch/arm/dts/imx6qdl-sr-som.dtsi index b06577808f..c20bed2721 100644 --- a/arch/arm/dts/imx6qdl-sr-som.dtsi +++ b/arch/arm/dts/imx6qdl-sr-som.dtsi @@ -55,7 +55,13 @@ pinctrl-0 = <&pinctrl_microsom_enet_ar8035>; phy-handle = <&phy>; phy-mode = "rgmii-id"; - phy-reset-duration = <2>; + + /* + * The PHY seems to require a long-enough reset duration to avoid + * some rare issues where the PHY gets stuck in an inconsistent and + * non-functional state at boot-up. 10ms proved to be fine . + */ + phy-reset-duration = <10>; phy-reset-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; status = "okay"; @@ -64,8 +70,15 @@ #size-cells = <0>; phy: ethernet-phy@0 { - reg = <0>; + /* + * The PHY can appear either: + * - AR8035: at address 0 or 4 + * - ADIN1300: at address 1 + * Actual address being detected at runtime. + */ + reg = <0xffffffff>; qca,clk-out-frequency = <125000000>; + adi,phy-output-clock = "125mhz-free-running"; }; }; }; diff --git a/arch/arm/dts/imx8mn-evk-u-boot.dtsi b/arch/arm/dts/imx8mn-evk-u-boot.dtsi index 3db46d4cbc..593cf06eb9 100644 --- a/arch/arm/dts/imx8mn-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mn-evk-u-boot.dtsi @@ -58,7 +58,9 @@ }; - flash { + spl { + filename = "spl.bin"; + mkimage { args = "-n spl/u-boot-spl.cfgout -T imx8mimage -e 0x912000"; diff --git a/arch/arm/dts/imx8mq-kontron-pitx-imx8m-u-boot.dtsi b/arch/arm/dts/imx8mq-kontron-pitx-imx8m-u-boot.dtsi index 6f9c81462e..d361f3f559 100644 --- a/arch/arm/dts/imx8mq-kontron-pitx-imx8m-u-boot.dtsi +++ b/arch/arm/dts/imx8mq-kontron-pitx-imx8m-u-boot.dtsi @@ -10,3 +10,18 @@ sd-uhs-sdr104; sd-uhs-ddr50; }; + +&uart1 { + /delete-property/ assigned-clocks; + /delete-property/ assigned-clock-parents; +}; + +&uart2 { + /delete-property/ assigned-clocks; + /delete-property/ assigned-clock-parents; +}; + +&uart3 { + /delete-property/ assigned-clocks; + /delete-property/ assigned-clock-parents; +}; diff --git a/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi b/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi index 6cac36a1fc..2400fad18a 100644 --- a/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi +++ b/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi @@ -2,7 +2,7 @@ /* * U-Boot additions * - * Copyright (C) 2019 Intel Corporation + * Copyright (C) 2019-2022 Intel Corporation */ #include "socfpga_agilex-u-boot.dtsi" @@ -11,6 +11,15 @@ aliases { spi0 = &qspi; i2c0 = &i2c1; + freeze_br0 = &freeze_controller; + }; + + soc { + freeze_controller: freeze_controller@f9000450 { + compatible = "altr,freeze-bridge-controller"; + reg = <0xf9000450 0x00000010>; + status = "disabled"; + }; }; memory { diff --git a/arch/arm/dts/socfpga_stratix10_socdk-u-boot.dtsi b/arch/arm/dts/socfpga_stratix10_socdk-u-boot.dtsi index 61df425f14..75a29045da 100755 --- a/arch/arm/dts/socfpga_stratix10_socdk-u-boot.dtsi +++ b/arch/arm/dts/socfpga_stratix10_socdk-u-boot.dtsi @@ -2,7 +2,7 @@ /* * U-Boot additions * - * Copyright (C) 2019-2020 Intel Corporation + * Copyright (C) 2019-2022 Intel Corporation */ #include "socfpga_stratix10-u-boot.dtsi" @@ -10,6 +10,15 @@ /{ aliases { spi0 = &qspi; + freeze_br0 = &freeze_controller; + }; + + soc { + freeze_controller: freeze_controller@f9000450 { + compatible = "altr,freeze-bridge-controller"; + reg = <0xf9000450 0x00000010>; + status = "disabled"; + }; }; }; diff --git a/arch/arm/dts/socfpga_stratix10_socdk.dts b/arch/arm/dts/socfpga_stratix10_socdk.dts index b7b48a5d31..8aa55a60ab 100755 --- a/arch/arm/dts/socfpga_stratix10_socdk.dts +++ b/arch/arm/dts/socfpga_stratix10_socdk.dts @@ -92,7 +92,7 @@ broken-cd; bus-width = <4>; drvsel = <3>; - smplsel = <0>; + smplsel = <2>; }; &qspi { diff --git a/arch/arm/dts/stm32mp15-pinctrl.dtsi b/arch/arm/dts/stm32mp15-pinctrl.dtsi index f0d66d8c6e..b92a149a18 100644 --- a/arch/arm/dts/stm32mp15-pinctrl.dtsi +++ b/arch/arm/dts/stm32mp15-pinctrl.dtsi @@ -929,6 +929,26 @@ }; }; + m_can1_pins_c: m-can1-2 { + pins1 { + pinmux = ; /* CAN1_TX */ + slew-rate = <1>; + drive-push-pull; + bias-disable; + }; + pins2 { + pinmux = ; /* CAN1_RX */ + bias-disable; + }; + }; + + m_can1_sleep_pins_c: m_can1-sleep-2 { + pins { + pinmux = , /* CAN1_TX */ + ; /* CAN1_RX */ + }; + }; + m_can2_pins_a: m-can2-0 { pins1 { pinmux = ; /* CAN2_TX */ @@ -1758,6 +1778,21 @@ }; }; + spi2_pins_b: spi2-1 { + pins1 { + pinmux = , /* SPI1_SCK */ + ; /* SPI1_MOSI */ + bias-disable; + drive-push-pull; + slew-rate = <1>; + }; + + pins2 { + pinmux = ; /* SPI1_MISO */ + bias-disable; + }; + }; + spi4_pins_a: spi4-0 { pins { pinmux = , /* SPI4_SCK */ @@ -1835,6 +1870,49 @@ }; }; + uart4_pins_d: uart4-3 { + pins1 { + pinmux = ; /* UART4_TX */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = ; /* UART4_RX */ + bias-disable; + }; + }; + + uart4_idle_pins_d: uart4-idle-3 { + pins1 { + pinmux = ; /* UART4_TX */ + }; + pins2 { + pinmux = ; /* UART4_RX */ + bias-disable; + }; + }; + + uart4_sleep_pins_d: uart4-sleep-3 { + pins { + pinmux = , /* UART4_TX */ + ; /* UART4_RX */ + }; + }; + + uart5_pins_a: uart5-0 { + pins1 { + pinmux = ; /* UART5_TX */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = ; /* UART5_RX */ + bias-disable; + }; + }; + uart7_pins_a: uart7-0 { pins1 { pinmux = ; /* UART7_TX */ @@ -2134,6 +2212,47 @@ }; }; + usart3_pins_e: usart3-4 { + pins1 { + pinmux = , /* USART3_TX */ + ; /* USART3_RTS */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = , /* USART3_RX */ + ; /* USART3_CTS_NSS */ + bias-pull-up; + }; + }; + + usart3_idle_pins_e: usart3-idle-4 { + pins1 { + pinmux = , /* USART3_TX */ + ; /* USART3_CTS_NSS */ + }; + pins2 { + pinmux = ; /* USART3_RTS */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins3 { + pinmux = ; /* USART3_RX */ + bias-pull-up; + }; + }; + + usart3_sleep_pins_e: usart3-sleep-4 { + pins { + pinmux = , /* USART3_TX */ + , /* USART3_RTS */ + , /* USART3_CTS_NSS */ + ; /* USART3_RX */ + }; + }; + usbotg_hs_pins_a: usbotg-hs-0 { pins { pinmux = ; /* OTG_ID */ diff --git a/arch/arm/dts/stm32mp153c-dhcor-drc-compact.dts b/arch/arm/dts/stm32mp153c-dhcor-drc-compact.dts new file mode 100644 index 0000000000..c8b9818499 --- /dev/null +++ b/arch/arm/dts/stm32mp153c-dhcor-drc-compact.dts @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) +/* + * Copyright (C) 2022 Marek Vasut + * + * DHCOR STM32MP1 variant: + * DHCR-STM32MP153C-C065-R051-V33-SPI-I-01LG + * DHCOR PCB number: 586-100 or newer + * DRC Compact PCB number: 627-100 or newer + */ + +/dts-v1/; + +#include "stm32mp153.dtsi" +#include "stm32mp15xc.dtsi" +#include "stm32mp15xx-dhcor-som.dtsi" +#include "stm32mp15xx-dhcor-drc-compact.dtsi" + +/ { + model = "DH electronics STM32MP153C DHCOR DRC Compact"; + compatible = "dh,stm32mp153c-dhcor-drc-compact", + "dh,stm32mp153c-dhcor-som", + "st,stm32mp153"; +}; + +&m_can1 { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&m_can1_pins_c>; + pinctrl-1 = <&m_can1_sleep_pins_c>; + status = "okay"; +}; diff --git a/arch/arm/dts/stm32mp15xx-dhcor-drc-compact-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcor-drc-compact-u-boot.dtsi new file mode 100644 index 0000000000..407fed5616 --- /dev/null +++ b/arch/arm/dts/stm32mp15xx-dhcor-drc-compact-u-boot.dtsi @@ -0,0 +1,120 @@ +// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause +/* + * Copyright (C) 2022 Marek Vasut + */ + +#include "stm32mp15xx-dhcor-u-boot.dtsi" + +/delete-node/ &ksz8851; + +/ { + aliases { + mmc0 = &sdmmc1; + mmc1 = &sdmmc2; + usb0 = &usbotg_hs; + ethernet1 = &ks8851; + }; + + config { + dh,board-coding-gpios = <&gpioh 9 0>, <&gpioh 8 0>, <&gpioh 3 0>; + }; + + /* This is actually on FMC2, but we do not have bus driver for that */ + ks8851: ks8851mll@64000000 { + compatible = "micrel,ks8851-mll"; + reg = <0x64000000 0x20000>; + }; +}; + +ðernet0 { + phy-reset-gpios = <&gpioz 2 GPIO_ACTIVE_LOW>; + + mdio0 { + ethernet-phy@7 { + reset-gpios = <&gpioz 2 GPIO_ACTIVE_LOW>; + reset-assert-us = <11000>; + reset-deassert-us = <1000>; + }; + }; +}; + +&pinctrl { + /* These should bound to FMC2 bus driver, but we do not have one */ + pinctrl-0 = <&fmc_pins_b>; + pinctrl-1 = <&fmc_sleep_pins_b>; + pinctrl-names = "default", "sleep"; +}; + +&sdmmc1 { + u-boot,dm-spl; + st,use-ckin; + st,cmd-gpios = <&gpiod 2 0>; + st,ck-gpios = <&gpioc 12 0>; + st,ckin-gpios = <&gpioe 4 0>; +}; + +&sdmmc1_b4_pins_a { + u-boot,dm-spl; + pins1 { + u-boot,dm-spl; + }; + pins2 { + u-boot,dm-spl; + }; +}; + +&sdmmc1_dir_pins_b { + u-boot,dm-spl; + pins1 { + u-boot,dm-spl; + }; + pins2 { + u-boot,dm-spl; + }; +}; + +&sdmmc2 { + u-boot,dm-spl; +}; + +&sdmmc2_b4_pins_a { + u-boot,dm-spl; + pins1 { + u-boot,dm-spl; + }; + pins2 { + u-boot,dm-spl; + }; +}; + +&sdmmc2_d47_pins_c { + u-boot,dm-spl; + pins { + u-boot,dm-spl; + }; +}; + +&sdmmc3 { /* SDIO Wi-Fi */ + status = "disabled"; +}; + +&uart4 { + u-boot,dm-pre-reloc; +}; + +&uart4_pins_d { + u-boot,dm-pre-reloc; + pins1 { + u-boot,dm-pre-reloc; + }; + pins2 { + u-boot,dm-pre-reloc; + /delete-property/ bias-disable; + bias-pull-up; + }; +}; + +&usbotg_hs { + u-boot,force-b-session-valid; + hnp-srp-disable; +}; diff --git a/arch/arm/dts/stm32mp15xx-dhcor-drc-compact.dts b/arch/arm/dts/stm32mp15xx-dhcor-drc-compact.dts new file mode 100644 index 0000000000..77dd944ff5 --- /dev/null +++ b/arch/arm/dts/stm32mp15xx-dhcor-drc-compact.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) +/* + * Copyright (C) 2022 Marek Vasut + */ + +/dts-v1/; + +#include "stm32mp151.dtsi" +#include "stm32mp15xc.dtsi" +#include "stm32mp15xx-dhcor-som.dtsi" +#include "stm32mp15xx-dhcor-drc-compact.dtsi" + +/ { + model = "DH electronics STM32MP15xx DHCOR DRC Compact"; + compatible = "dh,stm32mp15xx-dhcor-drc-compact", "st,stm32mp1xx"; +}; diff --git a/arch/arm/dts/stm32mp15xx-dhcor-drc-compact.dtsi b/arch/arm/dts/stm32mp15xx-dhcor-drc-compact.dtsi new file mode 100644 index 0000000000..bedccf0f00 --- /dev/null +++ b/arch/arm/dts/stm32mp15xx-dhcor-drc-compact.dtsi @@ -0,0 +1,326 @@ +// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) +/* + * Copyright (C) 2022 Marek Vasut + */ + +/ { + aliases { + ethernet0 = ðernet0; + ethernet1 = &ksz8851; + mmc0 = &sdmmc1; + rtc0 = &hwrtc; + rtc1 = &rtc; + serial0 = &uart4; + serial1 = &uart8; + serial2 = &usart3; + serial3 = &uart5; + spi0 = &qspi; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + led { + compatible = "gpio-leds"; + led1 { + label = "yellow:user0"; + gpios = <&gpioz 6 GPIO_ACTIVE_LOW>; + default-state = "off"; + }; + + led2 { + label = "red:user1"; + gpios = <&gpioz 3 GPIO_ACTIVE_LOW>; + default-state = "off"; + }; + }; + + ethernet_vio: vioregulator { + compatible = "regulator-fixed"; + regulator-name = "vio"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpioh 2 GPIO_ACTIVE_LOW>; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vdd>; + }; +}; + +&adc { /* X11 ADC inputs */ + pinctrl-names = "default"; + pinctrl-0 = <&adc12_ain_pins_b>; + vdd-supply = <&vdd>; + vdda-supply = <&vdda>; + vref-supply = <&vdda>; + status = "okay"; + + adc1: adc@0 { + st,adc-channels = <0 1 6>; + st,min-sample-time-nsecs = <5000>; + status = "okay"; + }; + + adc2: adc@100 { + st,adc-channels = <0 1 2>; + st,min-sample-time-nsecs = <5000>; + status = "okay"; + }; +}; + +ðernet0 { + status = "okay"; + pinctrl-0 = <ðernet0_rgmii_pins_c>; + pinctrl-1 = <ðernet0_rgmii_sleep_pins_c>; + pinctrl-names = "default", "sleep"; + phy-mode = "rgmii"; + max-speed = <1000>; + phy-handle = <&phy0>; + + mdio0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dwmac-mdio"; + reset-gpios = <&gpioz 2 GPIO_ACTIVE_LOW>; + reset-delay-us = <1000>; + reset-post-delay-us = <1000>; + + phy0: ethernet-phy@7 { + reg = <7>; + + rxc-skew-ps = <1500>; + rxdv-skew-ps = <540>; + rxd0-skew-ps = <420>; + rxd1-skew-ps = <420>; + rxd2-skew-ps = <420>; + rxd3-skew-ps = <420>; + + txc-skew-ps = <1440>; + txen-skew-ps = <540>; + txd0-skew-ps = <420>; + txd1-skew-ps = <420>; + txd2-skew-ps = <420>; + txd3-skew-ps = <420>; + }; + }; +}; + +&fmc { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&fmc_pins_b>; + pinctrl-1 = <&fmc_sleep_pins_b>; + status = "okay"; + + ksz8851: ethernet@1,0 { + compatible = "micrel,ks8851-mll"; + reg = <1 0x0 0x2>, <1 0x2 0x20000>; + interrupt-parent = <&gpioc>; + interrupts = <3 IRQ_TYPE_LEVEL_LOW>; + bank-width = <2>; + + /* Timing values are in nS */ + st,fmc2-ebi-cs-mux-enable; + st,fmc2-ebi-cs-transaction-type = <4>; + st,fmc2-ebi-cs-buswidth = <16>; + st,fmc2-ebi-cs-address-setup-ns = <5>; + st,fmc2-ebi-cs-address-hold-ns = <5>; + st,fmc2-ebi-cs-bus-turnaround-ns = <5>; + st,fmc2-ebi-cs-data-setup-ns = <45>; + st,fmc2-ebi-cs-data-hold-ns = <1>; + st,fmc2-ebi-cs-write-address-setup-ns = <5>; + st,fmc2-ebi-cs-write-address-hold-ns = <5>; + st,fmc2-ebi-cs-write-bus-turnaround-ns = <5>; + st,fmc2-ebi-cs-write-data-setup-ns = <45>; + st,fmc2-ebi-cs-write-data-hold-ns = <1>; + }; +}; + +&gpioa { + gpio-line-names = "", "", "", "", + "DRCC-VAR2", "", "", "", + "", "", "", "", + "", "", "", ""; +}; + +&gpioe { + gpio-line-names = "", "", "", "", + "", "DRCC-GPIO0", "", "", + "", "", "", "", + "", "", "", ""; +}; + +&gpiog { + gpio-line-names = "", "", "", "", + "", "", "", "", + "", "", "", "", + "DRCC-GPIO5", "", "", ""; +}; + +&gpioh { + gpio-line-names = "", "", "", "DRCC-HW2", + "DRCC-GPIO4", "", "", "", + "DRCC-HW1", "DRCC-HW0", "", "DRCC-VAR1", + "DRCC-VAR0", "", "", "DRCC-GPIO6"; +}; + +&gpioi { + gpio-line-names = "", "", "", "", + "", "", "", "DRCC-GPIO2", + "", "DRCC-GPIO1", "", "", + "", "", "", ""; +}; + +&i2c1 { /* X11 I2C1 */ + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins_b>; + i2c-scl-rising-time-ns = <185>; + i2c-scl-falling-time-ns = <20>; + status = "okay"; + /delete-property/dmas; + /delete-property/dma-names; +}; + +&i2c4 { + hwrtc: rtc@32 { + compatible = "microcrystal,rv8803"; + reg = <0x32>; + }; + + eeprom@50 { + compatible = "atmel,24c04"; + reg = <0x50>; + pagesize = <16>; + }; +}; + +&sdmmc1 { /* MicroSD */ + pinctrl-names = "default", "opendrain", "sleep"; + pinctrl-0 = <&sdmmc1_b4_pins_a>; + pinctrl-1 = <&sdmmc1_b4_od_pins_a>; + pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>; + cd-gpios = <&gpioi 8 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; + disable-wp; + st,neg-edge; + bus-width = <4>; + vmmc-supply = <&vdd>; + vqmmc-supply = <&vdd>; + status = "okay"; +}; + +&sdmmc2 { /* eMMC */ + pinctrl-names = "default", "opendrain", "sleep"; + pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_c>; + pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_c>; + pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_c>; + bus-width = <8>; + no-sd; + no-sdio; + non-removable; + st,neg-edge; + vmmc-supply = <&v3v3>; + vqmmc-supply = <&vdd>; + status = "okay"; +}; + +&sdmmc3 { /* SDIO Wi-Fi */ + pinctrl-names = "default", "opendrain", "sleep"; + pinctrl-0 = <&sdmmc3_b4_pins_a>; + pinctrl-1 = <&sdmmc3_b4_od_pins_a>; + pinctrl-2 = <&sdmmc3_b4_sleep_pins_a>; + broken-cd; + bus-width = <4>; + mmc-ddr-3_3v; + st,neg-edge; + vmmc-supply = <&v3v3>; + vqmmc-supply = <&v3v3>; + status = "okay"; +}; + +&spi2 { /* X11 SPI */ + pinctrl-names = "default"; + pinctrl-0 = <&spi2_pins_b>; + cs-gpios = <&gpioi 0 0>; + status = "disabled"; + /delete-property/dmas; + /delete-property/dma-names; +}; + +&uart4 { + label = "UART0"; + pinctrl-names = "default"; + pinctrl-0 = <&uart4_pins_d>; + /delete-property/dmas; + /delete-property/dma-names; + status = "okay"; +}; + +&uart5 { /* X11 UART */ + label = "X11-UART5"; + pinctrl-names = "default"; + pinctrl-0 = <&uart5_pins_a>; + /delete-property/dmas; + /delete-property/dma-names; + status = "okay"; +}; + +&uart8 { + label = "RS485-1"; + pinctrl-names = "default"; + pinctrl-0 = <&uart8_pins_a &uart8_rtscts_pins_a>; + uart-has-rtscts; + /delete-property/dmas; + /delete-property/dma-names; + status = "okay"; +}; + +&usart3 { /* RS485 or RS232 */ + label = "RS485-2"; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&usart3_pins_e>; + pinctrl-1 = <&usart3_sleep_pins_e>; + uart-has-rtscts; + /delete-property/dmas; + /delete-property/dma-names; + status = "okay"; +}; + +&usbh_ehci { + phys = <&usbphyc_port0>; + status = "okay"; +}; + +&usbh_ohci { + phys = <&usbphyc_port0>; + status = "okay"; +}; + +&usbotg_hs { + dr_mode = "otg"; + pinctrl-0 = <&usbotg_hs_pins_a>; + pinctrl-names = "default"; + phy-names = "usb2-phy"; + phys = <&usbphyc_port1 0>; + vbus-supply = <&vbus_otg>; + status = "okay"; +}; + +&usbphyc { + status = "okay"; +}; + +&usbphyc_port0 { + phy-supply = <&vdd_usb>; + vdda1v1-supply = <®11>; + vdda1v8-supply = <®18>; + connector { + compatible = "usb-a-connector"; + vbus-supply = <&vbus_sw>; + }; +}; + +&usbphyc_port1 { + phy-supply = <&vdd_usb>; + vdda1v1-supply = <®11>; + vdda1v8-supply = <®18>; +}; diff --git a/arch/arm/include/asm/armv8/mmu.h b/arch/arm/include/asm/armv8/mmu.h index c36b2cf5a5..9f58cedb65 100644 --- a/arch/arm/include/asm/armv8/mmu.h +++ b/arch/arm/include/asm/armv8/mmu.h @@ -103,6 +103,8 @@ #define TCR_EL2_RSVD (1U << 31 | 1 << 23) #define TCR_EL3_RSVD (1U << 31 | 1 << 23) +#define HCR_EL2_E2H_BIT 34 + #ifndef __ASSEMBLY__ static inline void set_ttbr_tcr_mair(int el, u64 table, u64 tcr, u64 attr) { @@ -134,7 +136,7 @@ struct mm_region { extern struct mm_region *mem_map; void setup_pgtables(void); -u64 get_tcr(int el, u64 *pips, u64 *pva_bits); +u64 get_tcr(u64 *pips, u64 *pva_bits); #endif #endif /* _ASM_ARMV8_MMU_H_ */ diff --git a/arch/arm/mach-k3/am642_init.c b/arch/arm/mach-k3/am642_init.c index add7ea8377..b16de9c9f0 100644 --- a/arch/arm/mach-k3/am642_init.c +++ b/arch/arm/mach-k3/am642_init.c @@ -47,6 +47,9 @@ static void ctrl_mmr_unlock(void) mmr_unlock(CTRL_MMR0_BASE, 3); mmr_unlock(CTRL_MMR0_BASE, 5); mmr_unlock(CTRL_MMR0_BASE, 6); + + /* Unlock all MCU_PADCFG_MMR1 module registers */ + mmr_unlock(MCU_PADCFG_MMR1_BASE, 1); } /* diff --git a/arch/arm/mach-socfpga/timer_s10.c b/arch/arm/mach-socfpga/timer_s10.c index 7d5598e1a3..84b13ce9d3 100644 --- a/arch/arm/mach-socfpga/timer_s10.c +++ b/arch/arm/mach-socfpga/timer_s10.c @@ -1,11 +1,12 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Copyright (C) 2017-2018 Intel Corporation + * Copyright (C) 2017-2022 Intel Corporation * */ #include #include +#include #include #include @@ -26,3 +27,34 @@ int timer_init(void) #endif return 0; } + +__always_inline u64 __get_time_stamp(void) +{ + u64 cntpct; + + isb(); + asm volatile("mrs %0, cntpct_el0" : "=r" (cntpct)); + + return cntpct; +} + +__always_inline uint64_t __usec_to_tick(unsigned long usec) +{ + u64 tick = usec; + u64 cntfrq; + + asm volatile("mrs %0, cntfrq_el0" : "=r" (cntfrq)); + tick *= cntfrq; + do_div(tick, 1000000); + + return tick; +} + +__always_inline void __udelay(unsigned long usec) +{ + /* get current timestamp */ + u64 tmp = __get_time_stamp() + __usec_to_tick(usec); + + while (__get_time_stamp() < tmp + 1) /* loop till event */ + ; +} \ No newline at end of file diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c index b7111123ba..c391b6c7ab 100644 --- a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c +++ b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c @@ -1262,7 +1262,7 @@ static int stm32prog_alt_add(struct stm32prog_data *data, "raw 0x%llx 0x%llx", part->addr, nb_blk); offset += snprintf(buf + offset, ALT_BUF_LEN - offset, - " mmcpart %d;", -(part->part_id)); + " mmcpart %d", -(part->part_id)); } else { if (part->part_type == PART_SYSTEM && (part->target == STM32PROG_NAND || @@ -1280,7 +1280,7 @@ static int stm32prog_alt_add(struct stm32prog_data *data, offset += snprintf(buf + offset, ALT_BUF_LEN - offset, " %d", part->dev_id); offset += snprintf(buf + offset, ALT_BUF_LEN - offset, - " %d;", part->part_id); + " %d", part->part_id); } ret = -ENODEV; switch (part->target) { diff --git a/arch/arm/mach-tegra/xusb-padctl-common.c b/arch/arm/mach-tegra/xusb-padctl-common.c index e56e27c8b6..8bdd44ad7a 100644 --- a/arch/arm/mach-tegra/xusb-padctl-common.c +++ b/arch/arm/mach-tegra/xusb-padctl-common.c @@ -84,7 +84,7 @@ tegra_xusb_padctl_group_parse_dt(struct tegra_xusb_padctl *padctl, len = ofnode_read_string_count(node, "nvidia,lanes"); if (len < 0) { - pr_err("failed to parse \"nvidia,lanes\" property"); + pr_err("failed to parse \"nvidia,lanes\" property\n"); return -EINVAL; } @@ -94,7 +94,7 @@ tegra_xusb_padctl_group_parse_dt(struct tegra_xusb_padctl *padctl, ret = ofnode_read_string_index(node, "nvidia,lanes", i, &group->pins[i]); if (ret) { - pr_err("failed to read string from \"nvidia,lanes\" property"); + pr_err("failed to read string from \"nvidia,lanes\" property\n"); return -EINVAL; } } @@ -104,7 +104,7 @@ tegra_xusb_padctl_group_parse_dt(struct tegra_xusb_padctl *padctl, ret = ofnode_read_string_index(node, "nvidia,function", 0, &group->func); if (ret) { - pr_err("failed to parse \"nvidia,func\" property"); + pr_err("failed to parse \"nvidia,func\" property\n"); return -EINVAL; } @@ -232,7 +232,7 @@ tegra_xusb_padctl_config_parse_dt(struct tegra_xusb_padctl *padctl, err = tegra_xusb_padctl_group_parse_dt(padctl, group, subnode); if (err < 0) { - pr_err("failed to parse group %s", group->name); + pr_err("failed to parse group %s\n", group->name); return err; } @@ -261,7 +261,7 @@ static int tegra_xusb_padctl_parse_dt(struct tegra_xusb_padctl *padctl, err = tegra_xusb_padctl_config_parse_dt(padctl, config, subnode); if (err < 0) { - pr_err("failed to parse entry %s: %d", + pr_err("failed to parse entry %s: %d\n", config->name, err); continue; } @@ -289,7 +289,7 @@ int tegra_xusb_process_nodes(ofnode nodes[], unsigned int count, err = tegra_xusb_padctl_parse_dt(&padctl, nodes[i]); if (err < 0) { - pr_err("failed to parse DT: %d", err); + pr_err("failed to parse DT: %d\n", err); continue; } diff --git a/board/cssi/MAINTAINERS b/board/cssi/MAINTAINERS index cbf1406a54..7d237b0b20 100644 --- a/board/cssi/MAINTAINERS +++ b/board/cssi/MAINTAINERS @@ -1,5 +1,5 @@ -BOARDS from CS Systemes d'Information -M: Christophe Leroy +BOARDS from CS GROUP France +M: Christophe Leroy S: Maintained F: board/cssi/ F: include/configs/MCR3000.h diff --git a/board/dhelectronics/dh_stm32mp1/u-boot-dhcor.its b/board/dhelectronics/dh_stm32mp1/u-boot-dhcor.its index 0ea10a1497..de7dcb317f 100644 --- a/board/dhelectronics/dh_stm32mp1/u-boot-dhcor.its +++ b/board/dhelectronics/dh_stm32mp1/u-boot-dhcor.its @@ -23,6 +23,14 @@ arch = "arm"; compression = "none"; }; + + fdt-2 { + description = ".dtb"; + data = /incbin/("arch/arm/dts/stm32mp15xx-dhcor-drc-compact.dtb"); + type = "flat_dt"; + arch = "arm"; + compression = "none"; + }; }; configurations { @@ -35,6 +43,13 @@ fdt = "fdt-1"; }; + config-2 { + /* DT+SoM+board model */ + description = "dh,stm32mp15xx-dhcor-drc-compact_somrev0_boardrev0"; + firmware = "uboot"; + fdt = "fdt-2"; + }; + /* Add 586-200..586-400 with fdt-2..fdt-4 here */ }; }; diff --git a/board/freescale/common/Kconfig b/board/freescale/common/Kconfig index 6553bf63bf..b0e6e43f4f 100644 --- a/board/freescale/common/Kconfig +++ b/board/freescale/common/Kconfig @@ -3,6 +3,7 @@ config CHAIN_OF_TRUST imply CMD_BLOB imply CMD_HASH if ARM select FSL_CAAM + select ARCH_MISC_INIT select SPL_BOARD_INIT if (ARM && SPL) select SPL_HASH if (ARM && SPL) select SHA_HW_ACCEL diff --git a/board/solidrun/mx6cuboxi/mx6cuboxi.c b/board/solidrun/mx6cuboxi/mx6cuboxi.c index 6207bf8253..42aa5cb63c 100644 --- a/board/solidrun/mx6cuboxi/mx6cuboxi.c +++ b/board/solidrun/mx6cuboxi/mx6cuboxi.c @@ -1,5 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* + * Copyright (C) 2022 Josua Mayer + * * Copyright (C) 2015 Freescale Semiconductor, Inc. * * Author: Fabio Estevam @@ -39,6 +41,8 @@ #include #include #include +#include +#include DECLARE_GLOBAL_DATA_PTR; @@ -407,6 +411,80 @@ out: return 0; } +static int find_ethernet_phy(void) +{ + struct mii_dev *bus = NULL; + struct phy_device *phydev = NULL; + int phy_addr = -ENOENT; + +#ifdef CONFIG_FEC_MXC + bus = fec_get_miibus(ENET_BASE_ADDR, -1); + if (!bus) + return -ENOENT; + + // scan address 0, 1, 4 + phydev = phy_find_by_mask(bus, 0b00010011); + if (!phydev) { + free(bus); + return -ENOENT; + } + pr_debug("%s: detected ethernet phy at address %d\n", __func__, phydev->addr); + phy_addr = phydev->addr; + + free(phydev); +#endif + + return phy_addr; +} + +#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) +/* + * Configure the correct ethernet PHYs nodes in device-tree: + * - AR8035 at addresses 0 or 4: Cubox + * - AR8035 at address 0: HummingBoard, HummingBoard 2 + * - ADIN1300 at address 1: since SoM rev 1.9 + */ +int ft_board_setup(void *fdt, struct bd_info *bd) +{ + int node_phy0, node_phy1, node_phy4; + int ret, phy; + bool enable_phy0 = false, enable_phy1 = false, enable_phy4 = false; + + // detect phy + phy = find_ethernet_phy(); + if (phy == 0 || phy == 4) { + enable_phy0 = true; + switch (board_type()) { + case CUBOXI: + case UNKNOWN: + default: + enable_phy4 = true; + } + } else if (phy == 1) { + enable_phy1 = true; + } else { + pr_err("%s: couldn't detect ethernet phy, not patching dtb!\n", __func__); + return 0; + } + + // update all phy nodes status + node_phy0 = fdt_path_offset(fdt, "/soc/bus@2100000/ethernet@2188000/mdio/ethernet-phy@0"); + ret = fdt_setprop_string(fdt, node_phy0, "status", enable_phy0 ? "okay" : "disabled"); + if (ret < 0 && enable_phy0) + pr_err("%s: failed to enable ethernet phy at address 0 in dtb!\n", __func__); + node_phy1 = fdt_path_offset(fdt, "/soc/bus@2100000/ethernet@2188000/mdio/ethernet-phy@1"); + ret = fdt_setprop_string(fdt, node_phy1, "status", enable_phy1 ? "okay" : "disabled"); + if (ret < 0 && enable_phy1) + pr_err("%s: failed to enable ethernet phy at address 1 in dtb!\n", __func__); + node_phy4 = fdt_path_offset(fdt, "/soc/bus@2100000/ethernet@2188000/mdio/ethernet-phy@4"); + ret = fdt_setprop_string(fdt, node_phy4, "status", enable_phy4 ? "okay" : "disabled"); + if (ret < 0 && enable_phy4) + pr_err("%s: failed to enable ethernet phy at address 4 in dtb!\n", __func__); + + return 0; +} +#endif + /* Override the default implementation, DT model is not accurate */ int show_board_info(void) { diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c index 7c0545892c..2cb5b1cb3f 100644 --- a/board/ti/am335x/board.c +++ b/board/ti/am335x/board.c @@ -902,7 +902,7 @@ int board_late_init(void) #endif /* CPSW plat */ -#if !CONFIG_IS_ENABLED(OF_CONTROL) +#if CONFIG_IS_ENABLED(NET) && !CONFIG_IS_ENABLED(OF_CONTROL) struct cpsw_slave_data slave_data[] = { { .slave_reg_ofs = CPSW_SLAVE0_OFFSET, diff --git a/board/toradex/apalis-imx8/apalis-imx8.c b/board/toradex/apalis-imx8/apalis-imx8.c index 04877fcd94..408198843f 100644 --- a/board/toradex/apalis-imx8/apalis-imx8.c +++ b/board/toradex/apalis-imx8/apalis-imx8.c @@ -18,6 +18,7 @@ #include #include #include +#include #include "../common/tdx-cfg-block.h" @@ -28,22 +29,75 @@ DECLARE_GLOBAL_DATA_PTR; (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | \ (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT)) +#define TDX_USER_FUSE_BLOCK1_A 276 +#define TDX_USER_FUSE_BLOCK1_B 277 +#define TDX_USER_FUSE_BLOCK2_A 278 +#define TDX_USER_FUSE_BLOCK2_B 279 + static iomux_cfg_t uart1_pads[] = { SC_P_UART1_RX | MUX_PAD_CTRL(UART_PAD_CTRL), SC_P_UART1_TX | MUX_PAD_CTRL(UART_PAD_CTRL), }; +struct tdx_user_fuses { + u16 pid4; + u16 vers; + u8 ramid; +}; + static void setup_iomux_uart(void) { imx8_iomux_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); } +static uint32_t do_get_tdx_user_fuse(int a, int b) +{ + sc_err_t sciErr; + u32 val_a = 0; + u32 val_b = 0; + + sciErr = sc_misc_otp_fuse_read(-1, a, &val_a); + if (sciErr != SC_ERR_NONE) { + printf("Error reading out user fuse %d\n", a); + return 0; + } + + sciErr = sc_misc_otp_fuse_read(-1, b, &val_b); + if (sciErr != SC_ERR_NONE) { + printf("Error reading out user fuse %d\n", b); + return 0; + } + + return ((val_a & 0xffff) << 16) | (val_b & 0xffff); +} + +static void get_tdx_user_fuse(struct tdx_user_fuses *tdxuserfuse) +{ + u32 fuse_block; + + fuse_block = do_get_tdx_user_fuse(TDX_USER_FUSE_BLOCK2_A, + TDX_USER_FUSE_BLOCK2_B); + + /* + * Fuse block 2 acts as a backup area, if this reads 0 we want to + * use fuse block 1 + */ + if (fuse_block == 0) + fuse_block = do_get_tdx_user_fuse(TDX_USER_FUSE_BLOCK1_A, + TDX_USER_FUSE_BLOCK1_B); + + tdxuserfuse->pid4 = (fuse_block >> 18) & GENMASK(13, 0); + tdxuserfuse->vers = (fuse_block >> 4) & GENMASK(13, 0); + tdxuserfuse->ramid = fuse_block & GENMASK(3, 0); +} + void board_mem_get_layout(u64 *phys_sdram_1_start, u64 *phys_sdram_1_size, u64 *phys_sdram_2_start, u64 *phys_sdram_2_size) { u32 is_quadplus = 0, val = 0; + struct tdx_user_fuses tdxramfuses; sc_err_t scierr = sc_misc_otp_fuse_read(-1, 6, &val); if (scierr == SC_ERR_NONE) { @@ -51,14 +105,33 @@ void board_mem_get_layout(u64 *phys_sdram_1_start, is_quadplus = ((val >> 4) & 0x3) != 0x0; } + get_tdx_user_fuse(&tdxramfuses); + *phys_sdram_1_start = PHYS_SDRAM_1; *phys_sdram_1_size = PHYS_SDRAM_1_SIZE; *phys_sdram_2_start = PHYS_SDRAM_2; - if (is_quadplus) - /* Our QP based SKUs only have 2 GB RAM (PHYS_SDRAM_1_SIZE) */ + + switch (tdxramfuses.ramid) { + case 1: + *phys_sdram_2_size = SZ_2G; + break; + case 2: *phys_sdram_2_size = 0x0UL; - else - *phys_sdram_2_size = PHYS_SDRAM_2_SIZE; + break; + case 3: + *phys_sdram_2_size = SZ_2G; + break; + case 4: + *phys_sdram_2_size = SZ_4G + SZ_2G; + break; + default: + if (is_quadplus) + /* Our QP based SKUs only have 2 GB RAM (PHYS_SDRAM_1_SIZE) */ + *phys_sdram_2_size = 0x0UL; + else + *phys_sdram_2_size = PHYS_SDRAM_2_SIZE; + break; + } } int board_early_init_f(void) diff --git a/board/toradex/apalis-tk1/apalis-tk1.c b/board/toradex/apalis-tk1/apalis-tk1.c index ccf665b211..86b10400ff 100644 --- a/board/toradex/apalis-tk1/apalis-tk1.c +++ b/board/toradex/apalis-tk1/apalis-tk1.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -99,6 +100,24 @@ int checkboard(void) #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) int ft_board_setup(void *blob, struct bd_info *bd) { + u8 enetaddr[6]; + + /* MAC addr */ + if (eth_env_get_enetaddr("ethaddr", enetaddr)) { + int err = fdt_find_and_setprop(blob, + "/pcie@1003000/pci@2,0/ethernet@0,0", + "local-mac-address", enetaddr, 6, 0); + + /* Older device trees might have used a different node name */ + if (err < 0) + err = fdt_find_and_setprop(blob, + "/pcie@1003000/pci@2,0/pcie@0", + "local-mac-address", enetaddr, 6, 0); + + if (err >= 0) + puts(" MAC address updated...\n"); + } + return ft_common_board_setup(blob, bd); } #endif diff --git a/board/toradex/apalis_t30/apalis_t30.c b/board/toradex/apalis_t30/apalis_t30.c index 0396eea56b..ef71270d9f 100644 --- a/board/toradex/apalis_t30/apalis_t30.c +++ b/board/toradex/apalis_t30/apalis_t30.c @@ -5,6 +5,7 @@ */ #include +#include #include #include #include @@ -16,6 +17,7 @@ #include #include #include +#include #include #include #include "../common/tdx-common.h" @@ -54,6 +56,24 @@ int checkboard(void) #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) int ft_board_setup(void *blob, struct bd_info *bd) { + u8 enetaddr[6]; + + /* MAC addr */ + if (eth_env_get_enetaddr("ethaddr", enetaddr)) { + int err = fdt_find_and_setprop(blob, + "/pcie@3000/pci@3,0/ethernet@0,0", + "local-mac-address", enetaddr, 6, 0); + + /* Older device trees might have used a different node name */ + if (err < 0) + err = fdt_find_and_setprop(blob, + "/pcie@3000/pci@3,0/pcie@0", + "local-mac-address", enetaddr, 6, 0); + + if (err >= 0) + puts(" MAC address updated...\n"); + } + return ft_common_board_setup(blob, bd); } #endif diff --git a/board/toradex/colibri_t20/colibri_t20.c b/board/toradex/colibri_t20/colibri_t20.c index 73ef4d2db3..1df9697b97 100644 --- a/board/toradex/colibri_t20/colibri_t20.c +++ b/board/toradex/colibri_t20/colibri_t20.c @@ -4,6 +4,8 @@ */ #include +#include +#include #include #include #include @@ -81,6 +83,24 @@ int checkboard(void) #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) int ft_board_setup(void *blob, struct bd_info *bd) { + u8 enetaddr[6]; + + /* MAC addr */ + if (eth_env_get_enetaddr("ethaddr", enetaddr)) { + int err = fdt_find_and_setprop(blob, + "/usb@7d004000/ethernet@1", + "local-mac-address", enetaddr, 6, 0); + + /* Older device trees might have used a different node name */ + if (err < 0) + err = fdt_find_and_setprop(blob, + "/usb@7d004000/asix@1", + "local-mac-address", enetaddr, 6, 0); + + if (err >= 0) + puts(" MAC address updated...\n"); + } + return ft_common_board_setup(blob, bd); } #endif diff --git a/board/toradex/colibri_t30/colibri_t30.c b/board/toradex/colibri_t30/colibri_t30.c index 20cbb75a36..b6b004669c 100644 --- a/board/toradex/colibri_t30/colibri_t30.c +++ b/board/toradex/colibri_t30/colibri_t30.c @@ -5,6 +5,7 @@ */ #include +#include #include #include #include @@ -12,6 +13,7 @@ #include #include #include +#include #include #include #include "pinmux-config-colibri_t30.h" @@ -36,6 +38,24 @@ int checkboard(void) #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) int ft_board_setup(void *blob, struct bd_info *bd) { + u8 enetaddr[6]; + + /* MAC addr */ + if (eth_env_get_enetaddr("ethaddr", enetaddr)) { + int err = fdt_find_and_setprop(blob, + "/usb@7d004000/ethernet@1", + "local-mac-address", enetaddr, 6, 0); + + /* Older device trees might have used a different node name */ + if (err < 0) + err = fdt_find_and_setprop(blob, + "/usb@7d004000/asix@1", + "local-mac-address", enetaddr, 6, 0); + + if (err >= 0) + puts(" MAC address updated...\n"); + } + return ft_common_board_setup(blob, bd); } #endif diff --git a/board/toradex/common/tdx-cfg-block.c b/board/toradex/common/tdx-cfg-block.c index 9c87289ae9..6c8cf4592d 100644 --- a/board/toradex/common/tdx-cfg-block.c +++ b/board/toradex/common/tdx-cfg-block.c @@ -144,6 +144,7 @@ const char * const toradex_modules[] = { [64] = "Verdin iMX8M Plus Quad 2GB Wi-Fi / BT IT", [65] = "Verdin iMX8M Plus QuadLite 1GB IT", [66] = "Verdin iMX8M Plus Quad 8GB Wi-Fi / BT", + [67] = "Apalis iMX8 QuadMax 8GB Wi-Fi / BT IT", }; const char * const toradex_carrier_boards[] = { @@ -359,6 +360,7 @@ static int get_cfgblock_interactive(void) char *soc; char it = 'n'; char wb = 'n'; + char mem8g = 'n'; int len = 0; /* Unknown module by default */ @@ -377,6 +379,14 @@ static int get_cfgblock_interactive(void) sprintf(message, "Does the module have Wi-Fi / Bluetooth? [y/N] "); len = cli_readline(message); wb = console_buffer[0]; + +#if defined(CONFIG_TARGET_APALIS_IMX8) + if ((wb == 'y' || wb == 'Y') && (it == 'y' || it == 'Y')) { + sprintf(message, "Does your module have 8GB of RAM? [y/N] "); + len = cli_readline(message); + mem8g = console_buffer[0]; + } +#endif #endif soc = env_get("soc"); @@ -430,8 +440,12 @@ static int get_cfgblock_interactive(void) tdx_hw_tag.prodid = COLIBRI_IMX7S; else if (is_cpu_type(MXC_CPU_IMX8QM)) { if (it == 'y' || it == 'Y') { - if (wb == 'y' || wb == 'Y') - tdx_hw_tag.prodid = APALIS_IMX8QM_WIFI_BT_IT; + if (wb == 'y' || wb == 'Y') { + if (mem8g == 'y' || mem8g == 'Y') + tdx_hw_tag.prodid = APALIS_IMX8QM_8GB_WIFI_BT_IT; + else + tdx_hw_tag.prodid = APALIS_IMX8QM_WIFI_BT_IT; + } else tdx_hw_tag.prodid = APALIS_IMX8QM_IT; } else { diff --git a/board/toradex/common/tdx-cfg-block.h b/board/toradex/common/tdx-cfg-block.h index ddcf699748..43e662e41d 100644 --- a/board/toradex/common/tdx-cfg-block.h +++ b/board/toradex/common/tdx-cfg-block.h @@ -87,6 +87,7 @@ enum { VERDIN_IMX8MPQ_2GB_WIFI_BT_IT, VERDIN_IMX8MPQL_IT, /* 65 */ VERDIN_IMX8MPQ_8GB_WIFI_BT, + APALIS_IMX8QM_8GB_WIFI_BT_IT, }; enum { diff --git a/board/xilinx/common/board.c b/board/xilinx/common/board.c index 5be3090c31..629a6ee036 100644 --- a/board/xilinx/common/board.c +++ b/board/xilinx/common/board.c @@ -245,6 +245,10 @@ static int xilinx_read_eeprom_fru(struct udevice *dev, char *name, } strncpy(desc->revision, (char *)fru_data.brd.rev, sizeof(desc->revision)); + for (i = 0; i < sizeof(desc->revision); i++) { + if (desc->revision[i] == ' ') + desc->revision[i] = '\0'; + } strncpy(desc->serial, (char *)fru_data.brd.serial_number, sizeof(desc->serial)); diff --git a/cmd/nvedit_efi.c b/cmd/nvedit_efi.c index 7ebb14e25f..770877c527 100644 --- a/cmd/nvedit_efi.c +++ b/cmd/nvedit_efi.c @@ -182,8 +182,10 @@ static int efi_dump_var_all(int argc, char *const argv[], } free(var_name16); - if (!match && argc == 1) + if (!match && argc == 1) { printf("Error: \"%s\" not defined\n", argv[0]); + return CMD_RET_FAILURE; + } return CMD_RET_SUCCESS; } diff --git a/configs/imx8mn_evk_defconfig b/configs/imx8mn_evk_defconfig index 56145a1b6d..70d3d83e9a 100644 --- a/configs/imx8mn_evk_defconfig +++ b/configs/imx8mn_evk_defconfig @@ -59,6 +59,9 @@ CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_CMD_REGULATOR=y CONFIG_CMD_EXT4_WRITE=y @@ -83,7 +86,12 @@ CONFIG_MMC_HS400_SUPPORT=y CONFIG_SPL_MMC_HS400_SUPPORT=y CONFIG_FSL_USDHC=y CONFIG_PHYLIB=y +CONFIG_PHY_ATHEROS=y CONFIG_DM_ETH=y +CONFIG_DM_ETH_PHY=y +CONFIG_PHY_GIGE=y +CONFIG_FEC_MXC=y +CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_IMX8M=y diff --git a/configs/mx6cuboxi_defconfig b/configs/mx6cuboxi_defconfig index d68335b5b6..edfa8b6928 100644 --- a/configs/mx6cuboxi_defconfig +++ b/configs/mx6cuboxi_defconfig @@ -22,6 +22,7 @@ CONFIG_CMD_HDMIDETECT=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y +CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="if hdmidet; then usb start; setenv stdin serial,usbkbd; setenv stdout serial,vidconsole; setenv stderr serial,vidconsole; else setenv stdin serial; setenv stdout serial; setenv stderr serial; fi;" @@ -58,6 +59,7 @@ CONFIG_DWC_AHSATA=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_FSL_USDHC=y CONFIG_PHYLIB=y +CONFIG_PHY_ADIN=y CONFIG_PHY_ATHEROS=y CONFIG_DM_ETH=y CONFIG_FEC_MXC=y diff --git a/configs/stm32mp15_dhcor_basic_defconfig b/configs/stm32mp15_dhcor_basic_defconfig index e08510179e..95338c58c7 100644 --- a/configs/stm32mp15_dhcor_basic_defconfig +++ b/configs/stm32mp15_dhcor_basic_defconfig @@ -121,6 +121,7 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DM_ETH=y CONFIG_DWC_ETH_QOS=y +CONFIG_KS8851_MLL=y CONFIG_PHY=y CONFIG_SPL_PHY=y CONFIG_PHY_STM32_USBPHYC=y diff --git a/doc/git-mailrc b/doc/git-mailrc index 63c2f6e7da..b00c278190 100644 --- a/doc/git-mailrc +++ b/doc/git-mailrc @@ -95,7 +95,7 @@ alias nios2 nios alias powerpc uboot, afleming, stroese, wd, priyankajain, mariosix alias ppc powerpc -alias mpc8xx uboot, wd, Christophe Leroy +alias mpc8xx uboot, wd, Christophe Leroy alias mpc83xx uboot, mariosix alias mpc85xx uboot, afleming, priyankajain diff --git a/doc/usage/cmd/bootz.rst b/doc/usage/cmd/bootz.rst new file mode 100644 index 0000000000..78953e9ca2 --- /dev/null +++ b/doc/usage/cmd/bootz.rst @@ -0,0 +1,66 @@ +.. SPDX-License-Identifier: GPL-2.0+: + +bootz command +============= + +Synopsis +-------- + +:: + + bootz [ [[:]] []] + +Description +----------- + +The bootz command is used to boot a Linux kernel in 'zImage' format. + +addr + address of kernel image, defaults to the value of the environment + variable $loadaddr. + +initrd + address of the initial RAM disk. Use '-' to boot a kernel with a device + tree but without an initial RAM disk. + +size + size of the initial RAM disk. This parameter must be specified for raw + initial RAM disks. + +fdt + address of the device tree. + +Example +------- + +This is the boot log of an OrangePi PC board: + +:: + + => load mmc 0:2 $fdt_addr_r dtb + 23093 bytes read in 7 ms (3.1 MiB/s) + => load mmc 0:2 $kernel_addr_r vmlinuz + 5079552 bytes read in 215 ms (22.5 MiB/s) + => load mmc 0:2 $ramdisk_addr_r initrd.img + 23854965 bytes read in 995 ms (22.9 MiB/s) + => bootz $kernel_addr_r $ramdisk_addr_r:$filesize $fdt_addr_r + Kernel image @ 0x42000000 [ 0x000000 - 0x4d8200 ] + ## Flattened Device Tree blob at 43000000 + Booting using the fdt blob at 0x43000000 + EHCI failed to shut down host controller. + Loading Ramdisk to 48940000, end 49ffff75 ... OK + Loading Device Tree to 48937000, end 4893fa34 ... OK + + Starting kernel ... + +Configuration +------------- + +The bootz command is only available if CONFIG_CMD_BOOTZ=y. + +Return value +------------ + +Normally this command does not return. If an error occurs, the return value $? +is set to 1 (false). If the operating system returns to U-Boot, the system is +reset. diff --git a/doc/usage/cmd/printenv.rst b/doc/usage/cmd/printenv.rst new file mode 100644 index 0000000000..9cb20f6ce6 --- /dev/null +++ b/doc/usage/cmd/printenv.rst @@ -0,0 +1,90 @@ +.. SPDX-License-Identifier: GPL-2.0+: + +printenv command +================ + +Synopsis +-------- + +:: + + printenv [-a] [name ...] + printenv -e [-guid guid][-n] [name] + +Description +----------- + +The printenv command is used to print environment or UEFI variables. + +\-a + Print environment variables starting with a period ('.'). + +\-e + Print UEFI variables. Without -e environment variables are printed. + +\-guid *guid* + Specify vendor GUID *guid*. If none is specified, all UEFI variables with + the specified name are printed irrespective of their vendor GUID. + +\-n + don't show hexadecimal dump of value + +name + Variable name. If no name is provided, all variables are printed. + Multiple environment variable names may be specified. + +Examples +-------- + +The following examples demonstrates the effect of the *-a* flag when displaying +environment variables: + +:: + + => setenv .foo bar + => printenv + arch=sandbox + baudrate=115200 + board=sandbox + ... + stdout=serial,vidconsole + + Environment size: 644/8188 bytes + => printenv -a + .foo=bar + arch=sandbox + baudrate=115200 + board=sandbox + ... + stdout=serial,vidconsole + + Environment size: 653/8188 bytes + => + +The next example shows the effect of the *-n* flag when displaying an UEFI +variable and how to specify a vendor GUID: + +:: + + => printenv -e -guid 8be4df61-93ca-11d2-aa0d-00e098032b8c PlatformLangCodes + PlatformLangCodes: + 8be4df61-93ca-11d2-aa0d-00e098032b8c (EFI_GLOBAL_VARIABLE_GUID) + BS|RT|RO, DataSize = 0x6 + 00000000: 65 6e 2d 55 53 00 en-US. + => printenv -e -n PlatformLangCodes + PlatformLangCodes: + 8be4df61-93ca-11d2-aa0d-00e098032b8c (EFI_GLOBAL_VARIABLE_GUID) + BS|RT|RO, DataSize = 0x6 + => + +Configuration +============= + +UEFI variables are only supported if CONFIG_CMD_NVEDIT_EFI=y. The value of UEFI +variables can only be displayed if CONFIG_HEXDUMP=y. + +Return value +------------ + +The return value $? is 1 (false) if a specified variable is not found. +Otherwise $? is set to 0 (true). diff --git a/doc/usage/index.rst b/doc/usage/index.rst index c03f4aef9e..770418434a 100644 --- a/doc/usage/index.rst +++ b/doc/usage/index.rst @@ -30,6 +30,7 @@ Shell commands cmd/bootmenu cmd/bootmeth cmd/button + cmd/bootz cmd/cbsysinfo cmd/conitrace cmd/echo @@ -48,6 +49,7 @@ Shell commands cmd/md cmd/mmc cmd/pinmux + cmd/printenv cmd/pstore cmd/qfw cmd/reset diff --git a/drivers/cache/cache-ncore.c b/drivers/cache/cache-ncore.c index 3beff780de..117d2b91ab 100644 --- a/drivers/cache/cache-ncore.c +++ b/drivers/cache/cache-ncore.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Copyright (C) 2019 Intel Corporation + * Copyright (C) 2019-2022 Intel Corporation * */ #include @@ -81,8 +81,8 @@ static void ncore_ccu_init_dirs(void __iomem *base) hang(); } - /* Enable snoop filter, a bit per snoop filter */ - setbits_le32((ulong)CCU_DIR_REG_ADDR(base, DIRUSFER, i), + /* Disable snoop filter, a bit per snoop filter */ + clrbits_le32((ulong)CCU_DIR_REG_ADDR(base, DIRUSFER, i), BIT(f)); } } diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c index ac727b7e40..ffbc1d1ba9 100644 --- a/drivers/clk/imx/clk-imx8mp.c +++ b/drivers/clk/imx/clk-imx8mp.c @@ -122,15 +122,15 @@ static const char *imx8mp_gic_sels[] = {"clock-osc-24m", "sys_pll2_200m", "sys_p "sys_pll2_100m", "sys_pll1_800m", "sys_pll2_500m", "clk_ext4", "audio_pll2_out" }; -static const char *imx8mp_ecspi1_sels[] = {"clock-osc_24m", "sys_pll2_200m", "sys_pll1_40m", +static const char *imx8mp_ecspi1_sels[] = {"clock-osc-24m", "sys_pll2_200m", "sys_pll1_40m", "sys_pll1_160m", "sys_pll1_800m", "sys_pll3_out", "sys_pll2_250m", "audio_pll2_out", }; -static const char *imx8mp_ecspi2_sels[] = {"clock-osc_24m", "sys_pll2_200m", "sys_pll1_40m", +static const char *imx8mp_ecspi2_sels[] = {"clock-osc-24m", "sys_pll2_200m", "sys_pll1_40m", "sys_pll1_160m", "sys_pll1_800m", "sys_pll3_out", "sys_pll2_250m", "audio_pll2_out", }; -static const char *imx8mp_ecspi3_sels[] = {"clock-osc_24m", "sys_pll2_200m", "sys_pll1_40m", +static const char *imx8mp_ecspi3_sels[] = {"clock-osc-24m", "sys_pll2_200m", "sys_pll1_40m", "sys_pll1_160m", "sys_pll1_800m", "sys_pll3_out", "sys_pll2_250m", "audio_pll2_out", }; @@ -300,7 +300,7 @@ static int imx8mp_clk_probe(struct udevice *dev) clk_dm(IMX8MP_CLK_UART2_ROOT, imx_clk_gate4("uart2_root_clk", "uart2", base + 0x44a0, 0)); clk_dm(IMX8MP_CLK_UART3_ROOT, imx_clk_gate4("uart3_root_clk", "uart3", base + 0x44b0, 0)); clk_dm(IMX8MP_CLK_UART4_ROOT, imx_clk_gate4("uart4_root_clk", "uart4", base + 0x44c0, 0)); - clk_dm(IMX8MP_CLK_USB_ROOT, imx_clk_gate4("usb_root_clk", "osc_32k", base + 0x44d0, 0)); + clk_dm(IMX8MP_CLK_USB_ROOT, imx_clk_gate4("usb_root_clk", "usb_core_ref", base + 0x44d0, 0)); clk_dm(IMX8MP_CLK_USB_PHY_ROOT, imx_clk_gate4("usb_phy_root_clk", "usb_phy_ref", base + 0x44f0, 0)); clk_dm(IMX8MP_CLK_USDHC1_ROOT, imx_clk_gate4("usdhc1_root_clk", "usdhc1", base + 0x4510, 0)); clk_dm(IMX8MP_CLK_USDHC2_ROOT, imx_clk_gate4("usdhc2_root_clk", "usdhc2", base + 0x4520, 0)); diff --git a/drivers/crypto/fsl/fsl_hash.c b/drivers/crypto/fsl/fsl_hash.c index 9e6829b7ad..575196778c 100644 --- a/drivers/crypto/fsl/fsl_hash.c +++ b/drivers/crypto/fsl/fsl_hash.c @@ -176,12 +176,6 @@ int caam_hash(const unsigned char *pbuf, unsigned int buf_len, uint32_t *desc; unsigned int size; - if (!IS_ALIGNED((uintptr_t)pbuf, ARCH_DMA_MINALIGN) || - !IS_ALIGNED((uintptr_t)pout, ARCH_DMA_MINALIGN)) { - puts("Error: Address arguments are not aligned\n"); - return -EINVAL; - } - desc = malloc_cache_aligned(sizeof(int) * MAX_CAAM_DESCSIZE); if (!desc) { debug("Not enough memory for descriptor allocation\n"); diff --git a/drivers/ddr/altera/sdram_n5x.c b/drivers/ddr/altera/sdram_n5x.c index ac13ac4319..737a4e2ff1 100644 --- a/drivers/ddr/altera/sdram_n5x.c +++ b/drivers/ddr/altera/sdram_n5x.c @@ -1,6 +1,6 @@ -// SPDX-License-Identifier: GPL-2.0 +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause /* - * Copyright (C) 2020-2021 Intel Corporation + * Copyright (C) 2020-2022 Intel Corporation * */ diff --git a/drivers/ddr/altera/sdram_s10.c b/drivers/ddr/altera/sdram_s10.c index d3a6d21860..4d36fb4533 100644 --- a/drivers/ddr/altera/sdram_s10.c +++ b/drivers/ddr/altera/sdram_s10.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Copyright (C) 2016-2018 Intel Corporation + * Copyright (C) 2016-2022 Intel Corporation * */ @@ -277,7 +277,7 @@ int sdram_mmr_init_full(struct udevice *dev) DDR_SCH_DEVTODEV); /* assigning the SDRAM size */ - unsigned long long size = sdram_calculate_size(plat); + phys_size_t size = sdram_calculate_size(plat); /* If the size is invalid, use default Config size */ if (size <= 0) hw_size = PHYS_SDRAM_1_SIZE; diff --git a/drivers/ddr/altera/sdram_soc64.c b/drivers/ddr/altera/sdram_soc64.c index d6baac2410..9b1710c135 100644 --- a/drivers/ddr/altera/sdram_soc64.c +++ b/drivers/ddr/altera/sdram_soc64.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Copyright (C) 2016-2021 Intel Corporation + * Copyright (C) 2016-2022 Intel Corporation * */ @@ -239,7 +239,8 @@ phys_size_t sdram_calculate_size(struct altera_sdram_plat *plat) { u32 dramaddrw = hmc_readl(plat, DRAMADDRW); - phys_size_t size = 1 << (DRAMADDRW_CFG_CS_ADDR_WIDTH(dramaddrw) + + phys_size_t size = (phys_size_t)1 << + (DRAMADDRW_CFG_CS_ADDR_WIDTH(dramaddrw) + DRAMADDRW_CFG_BANK_GRP_ADDR_WIDTH(dramaddrw) + DRAMADDRW_CFG_BANK_ADDR_WIDTH(dramaddrw) + DRAMADDRW_CFG_ROW_ADDR_WIDTH(dramaddrw) + diff --git a/drivers/ddr/altera/sdram_soc64.h b/drivers/ddr/altera/sdram_soc64.h index 7460f8c220..07a0f9f2ae 100644 --- a/drivers/ddr/altera/sdram_soc64.h +++ b/drivers/ddr/altera/sdram_soc64.h @@ -53,7 +53,7 @@ struct altera_sdram_plat { #define DDR_HMC_INTSTAT_DERRPENA_SET_MSK BIT(1) #define DDR_HMC_INTSTAT_ADDRMTCFLG_SET_MSK BIT(16) #define DDR_HMC_INTMODE_INTMODE_SET_MSK BIT(0) -#define DDR_HMC_RSTHANDSHAKE_MASK 0x000000ff +#define DDR_HMC_RSTHANDSHAKE_MASK 0x0000000f #define DDR_HMC_CORE2SEQ_INT_REQ 0xF #define DDR_HMC_SEQ2CORE_INT_RESP_MASK BIT(3) #define DDR_HMC_HPSINTFCSEL_ENABLE_MASK 0x001f1f1f diff --git a/drivers/i2c/tegra_i2c.c b/drivers/i2c/tegra_i2c.c index 1e74484542..2394e9d0fb 100644 --- a/drivers/i2c/tegra_i2c.c +++ b/drivers/i2c/tegra_i2c.c @@ -514,6 +514,7 @@ static const struct dm_i2c_ops tegra_i2c_ops = { static const struct udevice_id tegra_i2c_ids[] = { { .compatible = "nvidia,tegra114-i2c", .data = TYPE_114 }, + { .compatible = "nvidia,tegra124-i2c", .data = TYPE_114 }, { .compatible = "nvidia,tegra20-i2c", .data = TYPE_STD }, { .compatible = "nvidia,tegra20-i2c-dvc", .data = TYPE_DVC }, { } diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index 31b10f989c..7b6c371d1c 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -439,6 +439,15 @@ config TEST_DRV model. This should only be enabled for testing as it is not useful for anything else. +config USB_HUB_USB251XB + tristate "USB251XB Hub Controller Configuration Driver" + depends on I2C + help + This option enables support for configuration via SMBus of the + Microchip USB251x/xBi USB 2.0 Hub Controller series. Configuration + parameters may be set in devicetree or platform data. + Say Y or M here if you need to configure such a device via SMBus. + config TWL4030_LED bool "Enable TWL4030 LED controller" help diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index 7d15e9f1f6..0a333640b9 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -21,6 +21,7 @@ endif ifdef CONFIG_$(SPL_)DM_I2C ifndef CONFIG_SPL_BUILD obj-$(CONFIG_SANDBOX) += i2c_eeprom_emul.o +obj-$(CONFIG_USB_HUB_USB251XB) += usb251xb.o endif endif ifdef CONFIG_SPL_OF_PLATDATA diff --git a/drivers/misc/usb251xb.c b/drivers/misc/usb251xb.c new file mode 100644 index 0000000000..077edc2504 --- /dev/null +++ b/drivers/misc/usb251xb.c @@ -0,0 +1,605 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Driver for Microchip USB251xB USB 2.0 Hi-Speed Hub Controller + * Configuration via SMBus. + * + * Copyright (c) 2017 SKIDATA AG + * + * This work is based on the USB3503 driver by Dongjin Kim and + * a not-accepted patch by Fabien Lahoudere, see: + * https://patchwork.kernel.org/patch/9257715/ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* Internal Register Set Addresses & Default Values acc. to DS00001692C */ +#define USB251XB_ADDR_VENDOR_ID_LSB 0x00 +#define USB251XB_ADDR_VENDOR_ID_MSB 0x01 +#define USB251XB_DEF_VENDOR_ID 0x0424 + +#define USB251XB_ADDR_PRODUCT_ID_LSB 0x02 +#define USB251XB_ADDR_PRODUCT_ID_MSB 0x03 + +#define USB251XB_ADDR_DEVICE_ID_LSB 0x04 +#define USB251XB_ADDR_DEVICE_ID_MSB 0x05 +#define USB251XB_DEF_DEVICE_ID 0x0BB3 + +#define USB251XB_ADDR_CONFIG_DATA_1 0x06 +#define USB251XB_DEF_CONFIG_DATA_1 0x9B +#define USB251XB_ADDR_CONFIG_DATA_2 0x07 +#define USB251XB_DEF_CONFIG_DATA_2 0x20 +#define USB251XB_ADDR_CONFIG_DATA_3 0x08 +#define USB251XB_DEF_CONFIG_DATA_3 0x02 + +#define USB251XB_ADDR_NON_REMOVABLE_DEVICES 0x09 +#define USB251XB_DEF_NON_REMOVABLE_DEVICES 0x00 + +#define USB251XB_ADDR_PORT_DISABLE_SELF 0x0A +#define USB251XB_DEF_PORT_DISABLE_SELF 0x00 +#define USB251XB_ADDR_PORT_DISABLE_BUS 0x0B +#define USB251XB_DEF_PORT_DISABLE_BUS 0x00 + +#define USB251XB_ADDR_MAX_POWER_SELF 0x0C +#define USB251XB_DEF_MAX_POWER_SELF 0x01 +#define USB251XB_ADDR_MAX_POWER_BUS 0x0D +#define USB251XB_DEF_MAX_POWER_BUS 0x32 + +#define USB251XB_ADDR_MAX_CURRENT_SELF 0x0E +#define USB251XB_DEF_MAX_CURRENT_SELF 0x01 +#define USB251XB_ADDR_MAX_CURRENT_BUS 0x0F +#define USB251XB_DEF_MAX_CURRENT_BUS 0x32 + +#define USB251XB_ADDR_POWER_ON_TIME 0x10 +#define USB251XB_DEF_POWER_ON_TIME 0x32 + +#define USB251XB_ADDR_LANGUAGE_ID_HIGH 0x11 +#define USB251XB_ADDR_LANGUAGE_ID_LOW 0x12 +#define USB251XB_DEF_LANGUAGE_ID 0x0000 + +#define USB251XB_STRING_BUFSIZE 62 +#define USB251XB_ADDR_MANUFACTURER_STRING_LEN 0x13 +#define USB251XB_ADDR_MANUFACTURER_STRING 0x16 +#define USB251XB_DEF_MANUFACTURER_STRING "Microchip" + +#define USB251XB_ADDR_PRODUCT_STRING_LEN 0x14 +#define USB251XB_ADDR_PRODUCT_STRING 0x54 + +#define USB251XB_ADDR_SERIAL_STRING_LEN 0x15 +#define USB251XB_ADDR_SERIAL_STRING 0x92 +#define USB251XB_DEF_SERIAL_STRING "" + +#define USB251XB_ADDR_BATTERY_CHARGING_ENABLE 0xD0 +#define USB251XB_DEF_BATTERY_CHARGING_ENABLE 0x00 + +#define USB251XB_ADDR_BOOST_UP 0xF6 +#define USB251XB_DEF_BOOST_UP 0x00 +#define USB251XB_ADDR_BOOST_57 0xF7 +#define USB251XB_DEF_BOOST_57 0x00 +#define USB251XB_ADDR_BOOST_14 0xF8 +#define USB251XB_DEF_BOOST_14 0x00 + +#define USB251XB_ADDR_PORT_SWAP 0xFA +#define USB251XB_DEF_PORT_SWAP 0x00 + +#define USB251XB_ADDR_PORT_MAP_12 0xFB +#define USB251XB_DEF_PORT_MAP_12 0x00 +#define USB251XB_ADDR_PORT_MAP_34 0xFC +#define USB251XB_DEF_PORT_MAP_34 0x00 /* USB251{3B/i,4B/i,7/i} only */ +#define USB251XB_ADDR_PORT_MAP_56 0xFD +#define USB251XB_DEF_PORT_MAP_56 0x00 /* USB2517/i only */ +#define USB251XB_ADDR_PORT_MAP_7 0xFE +#define USB251XB_DEF_PORT_MAP_7 0x00 /* USB2517/i only */ + +#define USB251XB_ADDR_STATUS_COMMAND 0xFF +#define USB251XB_STATUS_COMMAND_SMBUS_DOWN 0x04 +#define USB251XB_STATUS_COMMAND_RESET 0x02 +#define USB251XB_STATUS_COMMAND_ATTACH 0x01 + +#define USB251XB_I2C_REG_SZ 0x100 +#define USB251XB_I2C_WRITE_SZ 0x10 + +#define DRIVER_NAME "usb251xb" +#define DRIVER_DESC "Microchip USB 2.0 Hi-Speed Hub Controller" + +struct usb251xb { + struct device *dev; + struct i2c_client *i2c; + struct udevice *vdd; + u8 skip_config; + struct gpio_desc gpio_reset; + u32 vendor_id; + u32 product_id; + u32 device_id; + u8 conf_data1; + u8 conf_data2; + u8 conf_data3; + u8 non_rem_dev; + u8 port_disable_sp; + u8 port_disable_bp; + u8 max_power_sp; + u8 max_power_bp; + u8 max_current_sp; + u8 max_current_bp; + u8 power_on_time; + u32 lang_id; + u8 manufacturer_len; + u8 product_len; + u8 serial_len; + s16 manufacturer[USB251XB_STRING_BUFSIZE]; + s16 product[USB251XB_STRING_BUFSIZE]; + s16 serial[USB251XB_STRING_BUFSIZE]; + u8 bat_charge_en; + u32 boost_up; + u8 boost_57; + u8 boost_14; + u8 port_swap; + u8 port_map12; + u8 port_map34; + u8 port_map56; + u8 port_map7; + u8 status; +}; + +struct usb251xb_data { + u16 product_id; + u8 port_cnt; + bool led_support; + bool bat_support; + char product_str[USB251XB_STRING_BUFSIZE / 2]; /* ASCII string */ +}; + +static const struct usb251xb_data usb2422_data = { + .product_id = 0x2422, + .port_cnt = 2, + .led_support = false, + .bat_support = true, + .product_str = "USB2422", +}; + +static const struct usb251xb_data usb2512b_data = { + .product_id = 0x2512, + .port_cnt = 2, + .led_support = false, + .bat_support = true, + .product_str = "USB2512B", +}; + +static const struct usb251xb_data usb2512bi_data = { + .product_id = 0x2512, + .port_cnt = 2, + .led_support = false, + .bat_support = true, + .product_str = "USB2512Bi", +}; + +static const struct usb251xb_data usb2513b_data = { + .product_id = 0x2513, + .port_cnt = 3, + .led_support = false, + .bat_support = true, + .product_str = "USB2513B", +}; + +static const struct usb251xb_data usb2513bi_data = { + .product_id = 0x2513, + .port_cnt = 3, + .led_support = false, + .bat_support = true, + .product_str = "USB2513Bi", +}; + +static const struct usb251xb_data usb2514b_data = { + .product_id = 0x2514, + .port_cnt = 4, + .led_support = false, + .bat_support = true, + .product_str = "USB2514B", +}; + +static const struct usb251xb_data usb2514bi_data = { + .product_id = 0x2514, + .port_cnt = 4, + .led_support = false, + .bat_support = true, + .product_str = "USB2514Bi", +}; + +static const struct usb251xb_data usb2517_data = { + .product_id = 0x2517, + .port_cnt = 7, + .led_support = true, + .bat_support = false, + .product_str = "USB2517", +}; + +static const struct usb251xb_data usb2517i_data = { + .product_id = 0x2517, + .port_cnt = 7, + .led_support = true, + .bat_support = false, + .product_str = "USB2517i", +}; + +static void usb251xb_reset(struct usb251xb *hub) +{ + dm_gpio_set_value(&hub->gpio_reset, 1); + udelay(10); /* >=1us RESET_N asserted */ + dm_gpio_set_value(&hub->gpio_reset, 0); + + /* wait for hub recovery/stabilization */ + udelay(750); /* >=500us after RESET_N deasserted */ +} + +static int usb251xb_connect(struct udevice *dev) +{ + struct usb251xb *hub = dev_get_priv(dev); + char i2c_wb[USB251XB_I2C_REG_SZ]; + int err, i; + + memset(i2c_wb, 0, USB251XB_I2C_REG_SZ); + + if (hub->skip_config) { + dev_info(dev, "Skip hub configuration, only attach.\n"); + i2c_wb[0] = 0x01; + i2c_wb[1] = USB251XB_STATUS_COMMAND_ATTACH; + + usb251xb_reset(hub); + + err = dm_i2c_write(dev, USB251XB_ADDR_STATUS_COMMAND, i2c_wb, 2); + if (err) { + dev_err(dev, "attaching hub failed: %d\n", err); + return err; + } + return 0; + } + + i2c_wb[USB251XB_ADDR_VENDOR_ID_MSB] = (hub->vendor_id >> 8) & 0xFF; + i2c_wb[USB251XB_ADDR_VENDOR_ID_LSB] = hub->vendor_id & 0xFF; + i2c_wb[USB251XB_ADDR_PRODUCT_ID_MSB] = (hub->product_id >> 8) & 0xFF; + i2c_wb[USB251XB_ADDR_PRODUCT_ID_LSB] = hub->product_id & 0xFF; + i2c_wb[USB251XB_ADDR_DEVICE_ID_MSB] = (hub->device_id >> 8) & 0xFF; + i2c_wb[USB251XB_ADDR_DEVICE_ID_LSB] = hub->device_id & 0xFF; + i2c_wb[USB251XB_ADDR_CONFIG_DATA_1] = hub->conf_data1; + i2c_wb[USB251XB_ADDR_CONFIG_DATA_2] = hub->conf_data2; + i2c_wb[USB251XB_ADDR_CONFIG_DATA_3] = hub->conf_data3; + i2c_wb[USB251XB_ADDR_NON_REMOVABLE_DEVICES] = hub->non_rem_dev; + i2c_wb[USB251XB_ADDR_PORT_DISABLE_SELF] = hub->port_disable_sp; + i2c_wb[USB251XB_ADDR_PORT_DISABLE_BUS] = hub->port_disable_bp; + i2c_wb[USB251XB_ADDR_MAX_POWER_SELF] = hub->max_power_sp; + i2c_wb[USB251XB_ADDR_MAX_POWER_BUS] = hub->max_power_bp; + i2c_wb[USB251XB_ADDR_MAX_CURRENT_SELF] = hub->max_current_sp; + i2c_wb[USB251XB_ADDR_MAX_CURRENT_BUS] = hub->max_current_bp; + i2c_wb[USB251XB_ADDR_POWER_ON_TIME] = hub->power_on_time; + i2c_wb[USB251XB_ADDR_LANGUAGE_ID_HIGH] = (hub->lang_id >> 8) & 0xFF; + i2c_wb[USB251XB_ADDR_LANGUAGE_ID_LOW] = hub->lang_id & 0xFF; + i2c_wb[USB251XB_ADDR_MANUFACTURER_STRING_LEN] = hub->manufacturer_len; + i2c_wb[USB251XB_ADDR_PRODUCT_STRING_LEN] = hub->product_len; + i2c_wb[USB251XB_ADDR_SERIAL_STRING_LEN] = hub->serial_len; + memcpy(&i2c_wb[USB251XB_ADDR_MANUFACTURER_STRING], hub->manufacturer, + USB251XB_STRING_BUFSIZE); + memcpy(&i2c_wb[USB251XB_ADDR_SERIAL_STRING], hub->serial, + USB251XB_STRING_BUFSIZE); + memcpy(&i2c_wb[USB251XB_ADDR_PRODUCT_STRING], hub->product, + USB251XB_STRING_BUFSIZE); + i2c_wb[USB251XB_ADDR_BATTERY_CHARGING_ENABLE] = hub->bat_charge_en; + i2c_wb[USB251XB_ADDR_BOOST_UP] = hub->boost_up; + i2c_wb[USB251XB_ADDR_BOOST_57] = hub->boost_57; + i2c_wb[USB251XB_ADDR_BOOST_14] = hub->boost_14; + i2c_wb[USB251XB_ADDR_PORT_SWAP] = hub->port_swap; + i2c_wb[USB251XB_ADDR_PORT_MAP_12] = hub->port_map12; + i2c_wb[USB251XB_ADDR_PORT_MAP_34] = hub->port_map34; + i2c_wb[USB251XB_ADDR_PORT_MAP_56] = hub->port_map56; + i2c_wb[USB251XB_ADDR_PORT_MAP_7] = hub->port_map7; + i2c_wb[USB251XB_ADDR_STATUS_COMMAND] = USB251XB_STATUS_COMMAND_ATTACH; + + usb251xb_reset(hub); + + /* write registers */ + for (i = 0; i < (USB251XB_I2C_REG_SZ / USB251XB_I2C_WRITE_SZ); i++) { + int offset = i * USB251XB_I2C_WRITE_SZ; + char wbuf[USB251XB_I2C_WRITE_SZ + 1]; + + /* The first data byte transferred tells the hub how many data + * bytes will follow (byte count). + */ + wbuf[0] = USB251XB_I2C_WRITE_SZ; + memcpy(&wbuf[1], &i2c_wb[offset], USB251XB_I2C_WRITE_SZ); + + dev_dbg(dev, "writing %d byte block %d to 0x%02X\n", + USB251XB_I2C_WRITE_SZ, i, offset); + + err = dm_i2c_write(dev, offset, wbuf, USB251XB_I2C_WRITE_SZ + 1); + if (err) + goto out_err; + } + + dev_info(dev, "Hub configuration was successful.\n"); + return 0; + +out_err: + dev_err(dev, "configuring block %d failed: %d\n", i, err); + return err; +} + +static int usb251xb_probe(struct udevice *dev) +{ + struct usb251xb *hub = dev_get_priv(dev); + int err; + + if (IS_ENABLED(CONFIG_DM_REGULATOR) && hub->vdd) { + err = regulator_set_enable(hub->vdd, true); + if (err) + return err; + } + + err = usb251xb_connect(dev); + if (err) { + dev_err(dev, "Failed to connect hub (%d)\n", err); + return err; + } + + dev_info(dev, "Hub probed successfully\n"); + + return 0; +} + +static void usb251xb_get_ports_field(struct udevice *dev, + const char *prop_name, u8 port_cnt, + bool ds_only, u8 *fld) +{ + u32 i, port; + int ret; + + for (i = 0; i < port_cnt; i++) { + ret = dev_read_u32_index(dev, prop_name, i, &port); + if (ret) + continue; + if (port >= ds_only ? 1 : 0 && port <= port_cnt) + *fld |= BIT(port); + else + dev_warn(dev, "port %u doesn't exist\n", port); + } +} + +static int usb251xb_of_to_plat(struct udevice *dev) +{ + struct usb251xb_data *data = + (struct usb251xb_data *)dev_get_driver_data(dev); + struct usb251xb *hub = dev_get_priv(dev); + char str[USB251XB_STRING_BUFSIZE / 2]; + const char *cproperty_char; + u32 property_u32 = 0; + int len, err; + + if (dev_read_bool(dev, "skip-config")) + hub->skip_config = 1; + else + hub->skip_config = 0; + + err = gpio_request_by_name(dev, "reset-gpios", 0, &hub->gpio_reset, + GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE); + if (err && err != -ENOENT) { + dev_err(dev, "unable to request GPIO reset pin (%d)\n", err); + return err; + } + + if (IS_ENABLED(CONFIG_DM_REGULATOR)) { + err = device_get_supply_regulator(dev, "vdd-supply", + &hub->vdd); + if (err && err != -ENOENT) { + dev_err(dev, "Warning: cannot get power supply\n"); + return err; + } + } + + if (dev_read_u32(dev, "vendor-id", &hub->vendor_id)) + hub->vendor_id = USB251XB_DEF_VENDOR_ID; + + if (dev_read_u32(dev, "product-id", &hub->product_id)) + hub->product_id = data->product_id; + + if (dev_read_u32(dev, "device-id", &hub->device_id)) + hub->device_id = USB251XB_DEF_DEVICE_ID; + + hub->conf_data1 = USB251XB_DEF_CONFIG_DATA_1; + if (dev_read_bool(dev, "self-powered")) { + hub->conf_data1 |= BIT(7); + + /* Configure Over-Current sens when self-powered */ + hub->conf_data1 &= ~BIT(2); + if (dev_read_bool(dev, "ganged-sensing")) + hub->conf_data1 &= ~BIT(1); + else if (dev_read_bool(dev, "individual-sensing")) + hub->conf_data1 |= BIT(1); + } else if (dev_read_bool(dev, "bus-powered")) { + hub->conf_data1 &= ~BIT(7); + + /* Disable Over-Current sense when bus-powered */ + hub->conf_data1 |= BIT(2); + } + + if (dev_read_bool(dev, "disable-hi-speed")) + hub->conf_data1 |= BIT(5); + + if (dev_read_bool(dev, "multi-tt")) + hub->conf_data1 |= BIT(4); + else if (dev_read_bool(dev, "single-tt")) + hub->conf_data1 &= ~BIT(4); + + if (dev_read_bool(dev, "disable-eop")) + hub->conf_data1 |= BIT(3); + + if (dev_read_bool(dev, "individual-port-switching")) + hub->conf_data1 |= BIT(0); + else if (dev_read_bool(dev, "ganged-port-switching")) + hub->conf_data1 &= ~BIT(0); + + hub->conf_data2 = USB251XB_DEF_CONFIG_DATA_2; + if (dev_read_bool(dev, "dynamic-power-switching")) + hub->conf_data2 |= BIT(7); + + if (!dev_read_u32(dev, "oc-delay-us", &property_u32)) { + if (property_u32 == 100) { + /* 100 us*/ + hub->conf_data2 &= ~BIT(5); + hub->conf_data2 &= ~BIT(4); + } else if (property_u32 == 4000) { + /* 4 ms */ + hub->conf_data2 &= ~BIT(5); + hub->conf_data2 |= BIT(4); + } else if (property_u32 == 16000) { + /* 16 ms */ + hub->conf_data2 |= BIT(5); + hub->conf_data2 |= BIT(4); + } else { + /* 8 ms (DEFAULT) */ + hub->conf_data2 |= BIT(5); + hub->conf_data2 &= ~BIT(4); + } + } + + if (dev_read_bool(dev, "compound-device")) + hub->conf_data2 |= BIT(3); + + hub->conf_data3 = USB251XB_DEF_CONFIG_DATA_3; + if (dev_read_bool(dev, "port-mapping-mode")) + hub->conf_data3 |= BIT(3); + + if (data->led_support && dev_read_bool(dev, "led-usb-mode")) + hub->conf_data3 &= ~BIT(1); + + if (dev_read_bool(dev, "string-support")) + hub->conf_data3 |= BIT(0); + + hub->non_rem_dev = USB251XB_DEF_NON_REMOVABLE_DEVICES; + usb251xb_get_ports_field(dev, "non-removable-ports", data->port_cnt, + true, &hub->non_rem_dev); + + hub->port_disable_sp = USB251XB_DEF_PORT_DISABLE_SELF; + usb251xb_get_ports_field(dev, "sp-disabled-ports", data->port_cnt, + true, &hub->port_disable_sp); + + hub->port_disable_bp = USB251XB_DEF_PORT_DISABLE_BUS; + usb251xb_get_ports_field(dev, "bp-disabled-ports", data->port_cnt, + true, &hub->port_disable_bp); + + hub->max_power_sp = USB251XB_DEF_MAX_POWER_SELF; + if (!dev_read_u32(dev, "sp-max-total-current-microamp", &property_u32)) + hub->max_power_sp = min_t(u8, property_u32 / 2000, 50); + + hub->max_power_bp = USB251XB_DEF_MAX_POWER_BUS; + if (!dev_read_u32(dev, "bp-max-total-current-microamp", &property_u32)) + hub->max_power_bp = min_t(u8, property_u32 / 2000, 255); + + hub->max_current_sp = USB251XB_DEF_MAX_CURRENT_SELF; + if (!dev_read_u32(dev, "sp-max-removable-current-microamp", + &property_u32)) + hub->max_current_sp = min_t(u8, property_u32 / 2000, 50); + + hub->max_current_bp = USB251XB_DEF_MAX_CURRENT_BUS; + if (!dev_read_u32(dev, "bp-max-removable-current-microamp", + &property_u32)) + hub->max_current_bp = min_t(u8, property_u32 / 2000, 255); + + hub->power_on_time = USB251XB_DEF_POWER_ON_TIME; + if (!dev_read_u32(dev, "power-on-time-ms", &property_u32)) + hub->power_on_time = min_t(u8, property_u32 / 2, 255); + + if (dev_read_u32(dev, "language-id", &hub->lang_id)) + hub->lang_id = USB251XB_DEF_LANGUAGE_ID; + + if (!dev_read_u32(dev, "boost-up", &hub->boost_up)) + hub->boost_up = USB251XB_DEF_BOOST_UP; + + cproperty_char = dev_read_string(dev, "manufacturer"); + strlcpy(str, cproperty_char ? : USB251XB_DEF_MANUFACTURER_STRING, + sizeof(str)); + hub->manufacturer_len = strlen(str) & 0xFF; + memset(hub->manufacturer, 0, USB251XB_STRING_BUFSIZE); + len = min_t(size_t, USB251XB_STRING_BUFSIZE / 2, strlen(str)); + len = utf8_to_utf16le(str, hub->manufacturer, len); + + cproperty_char = dev_read_string(dev, "product"); + strlcpy(str, cproperty_char ? : data->product_str, sizeof(str)); + hub->product_len = strlen(str) & 0xFF; + memset(hub->product, 0, USB251XB_STRING_BUFSIZE); + len = min_t(size_t, USB251XB_STRING_BUFSIZE / 2, strlen(str)); + len = utf8_to_utf16le(str, hub->product, len); + + cproperty_char = dev_read_string(dev, "serial"); + strlcpy(str, cproperty_char ? : USB251XB_DEF_SERIAL_STRING, + sizeof(str)); + hub->serial_len = strlen(str) & 0xFF; + memset(hub->serial, 0, USB251XB_STRING_BUFSIZE); + len = min_t(size_t, USB251XB_STRING_BUFSIZE / 2, strlen(str)); + len = utf8_to_utf16le(str, hub->serial, len); + + /* + * The datasheet documents the register as 'Port Swap' but in real the + * register controls the USB DP/DM signal swapping for each port. + */ + hub->port_swap = USB251XB_DEF_PORT_SWAP; + usb251xb_get_ports_field(dev, "swap-dx-lanes", data->port_cnt, + false, &hub->port_swap); + + /* The following parameters are currently not exposed to devicetree, but + * may be as soon as needed. + */ + hub->bat_charge_en = USB251XB_DEF_BATTERY_CHARGING_ENABLE; + hub->boost_57 = USB251XB_DEF_BOOST_57; + hub->boost_14 = USB251XB_DEF_BOOST_14; + hub->port_map12 = USB251XB_DEF_PORT_MAP_12; + hub->port_map34 = USB251XB_DEF_PORT_MAP_34; + hub->port_map56 = USB251XB_DEF_PORT_MAP_56; + hub->port_map7 = USB251XB_DEF_PORT_MAP_7; + + return 0; +} + +static const struct udevice_id usb251xb_of_match[] = { + { + .compatible = "microchip,usb2422", + .data = (ulong)&usb2422_data, + }, { + .compatible = "microchip,usb2512b", + .data = (ulong)&usb2512b_data, + }, { + .compatible = "microchip,usb2512bi", + .data = (ulong)&usb2512bi_data, + }, { + .compatible = "microchip,usb2513b", + .data = (ulong)&usb2513b_data, + }, { + .compatible = "microchip,usb2513bi", + .data = (ulong)&usb2513bi_data, + }, { + .compatible = "microchip,usb2514b", + .data = (ulong)&usb2514b_data, + }, { + .compatible = "microchip,usb2514bi", + .data = (ulong)&usb2514bi_data, + }, { + .compatible = "microchip,usb2517", + .data = (ulong)&usb2517_data, + }, { + .compatible = "microchip,usb2517i", + .data = (ulong)&usb2517i_data, + } +}; + +U_BOOT_DRIVER(usb251xb) = { + .name = "usb251xb", + .id = UCLASS_MISC, + .of_match = usb251xb_of_match, + .of_to_plat = usb251xb_of_to_plat, + .probe = usb251xb_probe, + .priv_auto = sizeof(struct usb251xb), +}; diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c index 893d7e241f..9befb190bd 100644 --- a/drivers/mmc/fsl_esdhc_imx.c +++ b/drivers/mmc/fsl_esdhc_imx.c @@ -1060,6 +1060,30 @@ static int esdhc_getcd_common(struct fsl_esdhc_priv *priv) return timeout > 0; } +static int esdhc_wait_dat0_common(struct fsl_esdhc_priv *priv, int state, + int timeout_us) +{ + struct fsl_esdhc *regs = priv->esdhc_regs; + int ret, err; + u32 tmp; + + /* make sure the card clock keep on */ + esdhc_setbits32(®s->vendorspec, VENDORSPEC_FRC_SDCLK_ON); + + ret = readx_poll_timeout(esdhc_read32, ®s->prsstat, tmp, + !!(tmp & PRSSTAT_DAT0) == !!state, + timeout_us); + + /* change to default setting, let host control the card clock */ + esdhc_clrbits32(®s->vendorspec, VENDORSPEC_FRC_SDCLK_ON); + + err = readx_poll_timeout(esdhc_read32, ®s->prsstat, tmp, tmp & PRSSTAT_SDOFF, 100); + if (err) + pr_warn("card clock not gate off as expect.\n"); + + return ret; +} + static int esdhc_reset(struct fsl_esdhc *regs) { ulong start; @@ -1109,11 +1133,19 @@ static int esdhc_set_ios(struct mmc *mmc) return esdhc_set_ios_common(priv, mmc); } +static int esdhc_wait_dat0(struct mmc *mmc, int state, int timeout_us) +{ + struct fsl_esdhc_priv *priv = mmc->priv; + + return esdhc_wait_dat0_common(priv, state, timeout_us); +} + static const struct mmc_ops esdhc_ops = { .getcd = esdhc_getcd, .init = esdhc_init, .send_cmd = esdhc_send_cmd, .set_ios = esdhc_set_ios, + .wait_dat0 = esdhc_wait_dat0, }; #endif @@ -1576,25 +1608,9 @@ static int __maybe_unused fsl_esdhc_set_enhanced_strobe(struct udevice *dev) static int fsl_esdhc_wait_dat0(struct udevice *dev, int state, int timeout_us) { - int ret, err; - u32 tmp; struct fsl_esdhc_priv *priv = dev_get_priv(dev); - struct fsl_esdhc *regs = priv->esdhc_regs; - /* make sure the card clock keep on */ - esdhc_setbits32(®s->vendorspec, VENDORSPEC_FRC_SDCLK_ON); - - ret = readx_poll_timeout(esdhc_read32, ®s->prsstat, tmp, - !!(tmp & PRSSTAT_DAT0) == !!state, - timeout_us); - - /* change to default setting, let host control the card clock */ - esdhc_clrbits32(®s->vendorspec, VENDORSPEC_FRC_SDCLK_ON); - err = readx_poll_timeout(esdhc_read32, ®s->prsstat, tmp, tmp & PRSSTAT_SDOFF, 100); - if (err) - dev_warn(dev, "card clock not gate off as expect.\n"); - - return ret; + return esdhc_wait_dat0_common(priv, state, timeout_us); } static const struct dm_mmc_ops fsl_esdhc_ops = { diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index 8a7d073900..12d29da528 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -34,6 +34,9 @@ static int mmc_set_signal_voltage(struct mmc *mmc, uint signal_voltage); static int mmc_wait_dat0(struct mmc *mmc, int state, int timeout_us) { + if (mmc->cfg->ops->wait_dat0) + return mmc->cfg->ops->wait_dat0(mmc, state, timeout_us); + return -ENOSYS; } diff --git a/drivers/mmc/mmc_write.c b/drivers/mmc/mmc_write.c index d23b7d9729..eab94c7b60 100644 --- a/drivers/mmc/mmc_write.c +++ b/drivers/mmc/mmc_write.c @@ -102,7 +102,7 @@ ulong mmc_berase(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt) "The erase range would be change to " "0x" LBAF "~0x" LBAF "\n\n", mmc->erase_grp_size, start & ~(mmc->erase_grp_size - 1), - ((start + blkcnt + mmc->erase_grp_size) + ((start + blkcnt + mmc->erase_grp_size - 1) & ~(mmc->erase_grp_size - 1)) - 1); while (blk < blkcnt) { diff --git a/drivers/net/phy/adin.c b/drivers/net/phy/adin.c index cff841ab3d..a5bfd960d9 100644 --- a/drivers/net/phy/adin.c +++ b/drivers/net/phy/adin.c @@ -4,6 +4,7 @@ * * Copyright 2019 Analog Devices Inc. * Copyright 2022 Variscite Ltd. + * Copyright 2022 Josua Mayer */ #include #include @@ -13,6 +14,16 @@ #define PHY_ID_ADIN1300 0x0283bc30 #define ADIN1300_EXT_REG_PTR 0x10 #define ADIN1300_EXT_REG_DATA 0x11 + +#define ADIN1300_GE_CLK_CFG_REG 0xff1f +#define ADIN1300_GE_CLK_CFG_MASK GENMASK(5, 0) +#define ADIN1300_GE_CLK_CFG_RCVR_125 BIT(5) +#define ADIN1300_GE_CLK_CFG_FREE_125 BIT(4) +#define ADIN1300_GE_CLK_CFG_REF_EN BIT(3) +#define ADIN1300_GE_CLK_CFG_HRT_RCVR BIT(2) +#define ADIN1300_GE_CLK_CFG_HRT_FREE BIT(1) +#define ADIN1300_GE_CLK_CFG_25 BIT(0) + #define ADIN1300_GE_RGMII_CFG 0xff23 #define ADIN1300_GE_RGMII_RX_MSK GENMASK(8, 6) #define ADIN1300_GE_RGMII_RX_SEL(x) \ @@ -100,27 +111,27 @@ static u32 adin_get_reg_value(struct phy_device *phydev, * The function gets phy-mode string from property 'adi,phy-mode-override' * and return its index in phy_interface_strings table, or -1 in error case. */ -int adin_get_phy_mode_override(struct phy_device *phydev) +phy_interface_t adin_get_phy_mode_override(struct phy_device *phydev) { ofnode node = phy_get_ofnode(phydev); const char *phy_mode_override; const char *prop_phy_mode_override = "adi,phy-mode-override"; - int override_interface; + int i; phy_mode_override = ofnode_read_string(node, prop_phy_mode_override); if (!phy_mode_override) - return -ENODEV; + return PHY_INTERFACE_MODE_NA; debug("%s: %s = '%s'\n", __func__, prop_phy_mode_override, phy_mode_override); - override_interface = phy_get_interface_by_name(phy_mode_override); + for (i = 0; i < PHY_INTERFACE_MODE_MAX; i++) + if (!strcmp(phy_mode_override, phy_interface_strings[i])) + return (phy_interface_t) i; - if (override_interface < 0) - printf("%s: %s = '%s' is not valid\n", - __func__, prop_phy_mode_override, phy_mode_override); + printf("%s: Invalid PHY interface '%s'\n", __func__, phy_mode_override); - return override_interface; + return PHY_INTERFACE_MODE_NA; } static u16 adin_ext_read(struct phy_device *phydev, const u32 regnum) @@ -144,14 +155,41 @@ static int adin_ext_write(struct phy_device *phydev, const u32 regnum, const u16 return phy_write(phydev, MDIO_DEVAD_NONE, ADIN1300_EXT_REG_DATA, val); } +static int adin_config_clk_out(struct phy_device *phydev) +{ + ofnode node = phy_get_ofnode(phydev); + const char *val = NULL; + u8 sel = 0; + + val = ofnode_read_string(node, "adi,phy-output-clock"); + if (!val) { + /* property not present, do not enable GP_CLK pin */ + } else if (strcmp(val, "25mhz-reference") == 0) { + sel |= ADIN1300_GE_CLK_CFG_25; + } else if (strcmp(val, "125mhz-free-running") == 0) { + sel |= ADIN1300_GE_CLK_CFG_FREE_125; + } else if (strcmp(val, "adaptive-free-running") == 0) { + sel |= ADIN1300_GE_CLK_CFG_HRT_FREE; + } else { + pr_err("%s: invalid adi,phy-output-clock\n", __func__); + return -EINVAL; + } + + if (ofnode_read_bool(node, "adi,phy-output-reference-clock")) + sel |= ADIN1300_GE_CLK_CFG_REF_EN; + + return adin_ext_write(phydev, ADIN1300_GE_CLK_CFG_REG, + ADIN1300_GE_CLK_CFG_MASK & sel); +} + static int adin_config_rgmii_mode(struct phy_device *phydev) { u16 reg_val; u32 val; - int phy_mode_override = adin_get_phy_mode_override(phydev); + phy_interface_t phy_mode_override = adin_get_phy_mode_override(phydev); - if (phy_mode_override >= 0) { - phydev->interface = (phy_interface_t) phy_mode_override; + if (phy_mode_override != PHY_INTERFACE_MODE_NA) { + phydev->interface = phy_mode_override; } reg_val = adin_ext_read(phydev, ADIN1300_GE_RGMII_CFG); @@ -202,6 +240,10 @@ static int adin1300_config(struct phy_device *phydev) printf("ADIN1300 PHY detected at addr %d\n", phydev->addr); + ret = adin_config_clk_out(phydev); + if (ret < 0) + return ret; + ret = adin_config_rgmii_mode(phydev); if (ret < 0) diff --git a/drivers/pci/pci_tegra.c b/drivers/pci/pci_tegra.c index f8d66c0e1c..bc489d5ec8 100644 --- a/drivers/pci/pci_tegra.c +++ b/drivers/pci/pci_tegra.c @@ -455,7 +455,7 @@ static int tegra_pcie_parse_port_info(ofnode node, uint *index, uint *lanes) err = ofnode_read_u32_default(node, "nvidia,num-lanes", -1); if (err < 0) { - pr_err("failed to parse \"nvidia,num-lanes\" property"); + pr_err("failed to parse \"nvidia,num-lanes\" property\n"); return err; } @@ -463,7 +463,7 @@ static int tegra_pcie_parse_port_info(ofnode node, uint *index, uint *lanes) err = ofnode_read_pci_addr(node, 0, "reg", &addr); if (err < 0) { - pr_err("failed to parse \"reg\" property"); + pr_err("failed to parse \"reg\" property\n"); return err; } diff --git a/drivers/power/pmic/Kconfig b/drivers/power/pmic/Kconfig index bb3960020d..66b16b06e0 100644 --- a/drivers/power/pmic/Kconfig +++ b/drivers/power/pmic/Kconfig @@ -158,13 +158,15 @@ config SPL_DM_PMIC_MP5416 config DM_PMIC_PCA9450 bool "Enable Driver Model for PMIC PCA9450" + depends on DM_I2C help This config enables implementation of driver-model pmic uclass features for PMIC PCA9450. The driver implements read/write operations. config SPL_DM_PMIC_PCA9450 - bool "Enable Driver Model for PMIC PCA9450" + bool "Enable Driver Model for PMIC PCA9450 in SPL" depends on SPL_DM_PMIC + depends on SPL_DM_I2C help This config enables implementation of driver-model pmic uclass features for PMIC PCA9450 in SPL. The driver implements read/write operations. diff --git a/drivers/spi/nxp_fspi.c b/drivers/spi/nxp_fspi.c index 607c953987..579d6bac9b 100644 --- a/drivers/spi/nxp_fspi.c +++ b/drivers/spi/nxp_fspi.c @@ -866,9 +866,6 @@ static int nxp_fspi_default_setup(struct nxp_fspi *f) u32 reg; #if CONFIG_IS_ENABLED(CLK) - /* disable and unprepare clock to avoid glitch pass to controller */ - nxp_fspi_clk_disable_unprep(f); - /* the default frequency, we will change it later if necessary. */ ret = clk_set_rate(&f->clk, 20000000); if (ret < 0) diff --git a/drivers/usb/host/ehci-generic.c b/drivers/usb/host/ehci-generic.c index 4734af0396..15267e9a05 100644 --- a/drivers/usb/host/ehci-generic.c +++ b/drivers/usb/host/ehci-generic.c @@ -69,7 +69,7 @@ static int ehci_usb_probe(struct udevice *dev) err = 0; ret = clk_get_bulk(dev, &priv->clocks); - if (ret) { + if (ret && ret != -ENOENT) { dev_err(dev, "Failed to get clocks (ret=%d)\n", ret); return ret; } @@ -81,7 +81,7 @@ static int ehci_usb_probe(struct udevice *dev) } err = reset_get_bulk(dev, &priv->resets); - if (err) { + if (ret && ret != -ENOENT) { dev_err(dev, "Failed to get resets (err=%d)\n", err); goto clk_err; } diff --git a/drivers/usb/host/xhci-mtk.c b/drivers/usb/host/xhci-mtk.c index 18b4f55d89..3838a990ec 100644 --- a/drivers/usb/host/xhci-mtk.c +++ b/drivers/usb/host/xhci-mtk.c @@ -122,11 +122,13 @@ static int xhci_mtk_host_disable(struct mtk_xhci *mtk) /* power down all u3 ports */ for (i = 0; i < mtk->num_u3ports; i++) - setbits_le32(mtk->ippc + IPPC_U3_CTRL(i), CTRL_U3_PORT_PDN); + setbits_le32(mtk->ippc + IPPC_U3_CTRL(i), + CTRL_U3_PORT_PDN | CTRL_U3_PORT_DIS); /* power down all u2 ports */ for (i = 0; i < mtk->num_u2ports; i++) - setbits_le32(mtk->ippc + IPPC_U2_CTRL(i), CTRL_U2_PORT_PDN); + setbits_le32(mtk->ippc + IPPC_U2_CTRL(i), + CTRL_U2_PORT_PDN | CTRL_U2_PORT_DIS); /* power down host ip */ setbits_le32(mtk->ippc + IPPC_IP_PW_CTRL1, CTRL1_IP_HOST_PDN); diff --git a/drivers/video/tegra124/dp.c b/drivers/video/tegra124/dp.c index 8f5116fe7c..ee4f09a0c4 100644 --- a/drivers/video/tegra124/dp.c +++ b/drivers/video/tegra124/dp.c @@ -1609,6 +1609,7 @@ static int dp_tegra_probe(struct udevice *dev) static const struct udevice_id tegra_dp_ids[] = { { .compatible = "nvidia,tegra124-dpaux" }, + { .compatible = "nvidia,tegra210-dpaux" }, { } }; diff --git a/env/mmc.c b/env/mmc.c index 465b104559..0c498d9a46 100644 --- a/env/mmc.c +++ b/env/mmc.c @@ -257,12 +257,15 @@ static inline int erase_env(struct mmc *mmc, unsigned long size, { uint blk_start, blk_cnt, n; struct blk_desc *desc = mmc_get_blk_desc(mmc); + u32 erase_size; - blk_start = ALIGN(offset, mmc->write_bl_len) / mmc->write_bl_len; - blk_cnt = ALIGN(size, mmc->write_bl_len) / mmc->write_bl_len; + erase_size = mmc->erase_grp_size * desc->blksz; + blk_start = ALIGN_DOWN(offset, erase_size) / desc->blksz; + blk_cnt = ALIGN(size, erase_size) / desc->blksz; n = blk_derase(desc, blk_start, blk_cnt); - printf("%d blocks erased: %s\n", n, (n == blk_cnt) ? "OK" : "ERROR"); + printf("%d blocks erased at 0x%x: %s\n", n, blk_start, + (n == blk_cnt) ? "OK" : "ERROR"); return (n == blk_cnt) ? 0 : 1; } @@ -286,6 +289,7 @@ static int env_mmc_erase(void) goto fini; } + printf("\n"); ret = erase_env(mmc, CONFIG_ENV_SIZE, offset); #ifdef CONFIG_ENV_OFFSET_REDUND diff --git a/fs/squashfs/sqfs.c b/fs/squashfs/sqfs.c index 90bf32ca0a..246ec28b31 100644 --- a/fs/squashfs/sqfs.c +++ b/fs/squashfs/sqfs.c @@ -975,6 +975,7 @@ int sqfs_readdir(struct fs_dir_stream *fs_dirs, struct fs_dirent **dentp) int i_number, offset = 0, ret; struct fs_dirent *dent; unsigned char *ipos; + u16 name_size; dirs = (struct squashfs_dir_stream *)fs_dirs; if (!dirs->size) { @@ -1057,9 +1058,10 @@ int sqfs_readdir(struct fs_dir_stream *fs_dirs, struct fs_dirent **dentp) return -SQFS_STOP_READDIR; } - /* Set entry name */ - strncpy(dent->name, dirs->entry->name, dirs->entry->name_size + 1); - dent->name[dirs->entry->name_size + 1] = '\0'; + /* Set entry name (capped at FS_DIRENT_NAME_LEN which is a U-Boot limitation) */ + name_size = min_t(u16, dirs->entry->name_size + 1, FS_DIRENT_NAME_LEN - 1); + strncpy(dent->name, dirs->entry->name, name_size); + dent->name[name_size] = '\0'; offset = dirs->entry->name_size + 1 + SQFS_ENTRY_BASE_LENGTH; dirs->entry_count--; diff --git a/include/configs/odroid_xu3.h b/include/configs/odroid_xu3.h index 8d24a03b72..ed3cf212ac 100644 --- a/include/configs/odroid_xu3.h +++ b/include/configs/odroid_xu3.h @@ -84,6 +84,7 @@ "rootfstype=ext4\0" \ "console=console=ttySAC2,115200n8\0" \ "fdtfile=exynos5422-odroidxu3.dtb\0" \ + "board=odroid\0" \ "board_name=odroidxu3\0" \ "mmcbootdev=0\0" \ "mmcrootdev=0\0" \ diff --git a/include/configs/socfpga_vining_fpga.h b/include/configs/socfpga_vining_fpga.h index 9455e4cb56..c333c931ab 100644 --- a/include/configs/socfpga_vining_fpga.h +++ b/include/configs/socfpga_vining_fpga.h @@ -116,7 +116,8 @@ "addargs=run addcons addmtd addmisc\0" \ "ubiload=" \ "ubi part ${ubimtd} ; ubifsmount ${ubipart} ; " \ - "ubifsload ${kernel_addr_r} /boot/${bootfile}\0" \ + "ubifsload ${kernel_addr_r} /boot/${bootfile} ; " \ + "ubifsumount ; ubi detach\0" \ "netload=" \ "tftp ${kernel_addr_r} ${hostname}/${bootfile}\0" \ "miscargs=nohlt panic=1\0" \ diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h index afc507b32a..19c16df488 100644 --- a/include/configs/verdin-imx8mm.h +++ b/include/configs/verdin-imx8mm.h @@ -50,8 +50,8 @@ "fdt_board=dev\0" \ "initrd_addr=0x43800000\0" \ "initrd_high=0xffffffffffffffff\0" \ - "setup=setenv setupargs console=${console},${baudrate} " \ - "console=tty1 consoleblank=0 earlycon\0" \ + "setup=setenv setupargs console=tty1 console=${console},${baudrate} " \ + "consoleblank=0 earlycon\0" \ "update_uboot=askenv confirm Did you load flash.bin (y/N)?; " \ "if test \"$confirm\" = \"y\"; then " \ "setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt " \ diff --git a/include/configs/verdin-imx8mp.h b/include/configs/verdin-imx8mp.h index 97f537e8e0..9ad24e82db 100644 --- a/include/configs/verdin-imx8mp.h +++ b/include/configs/verdin-imx8mp.h @@ -68,7 +68,7 @@ "fdt_board=dev\0" \ "initrd_addr=0x43800000\0" \ "initrd_high=0xffffffffffffffff\0" \ - "setup=setenv setupargs console=${console},${baudrate} console=tty1 " \ + "setup=setenv setupargs console=tty1 console=${console},${baudrate} " \ "consoleblank=0 earlycon\0" \ "update_uboot=askenv confirm Did you load flash.bin (y/N)?; " \ "if test \"$confirm\" = \"y\"; then " \ diff --git a/include/efi_default_filename.h b/include/efi_default_filename.h index 13b9de8754..77932984b5 100644 --- a/include/efi_default_filename.h +++ b/include/efi_default_filename.h @@ -5,6 +5,7 @@ * file name is defined in this include. * * Copyright (c) 2022, Heinrich Schuchardt + * Copyright (c) 2022, Linaro Limited */ #ifndef _EFI_DEFAULT_FILENAME_H @@ -14,32 +15,42 @@ #undef BOOTEFI_NAME +#ifdef CONFIG_SANDBOX + #if HOST_ARCH == HOST_ARCH_X86_64 #define BOOTEFI_NAME "BOOTX64.EFI" -#endif - -#if HOST_ARCH == HOST_ARCH_X86 +#elif HOST_ARCH == HOST_ARCH_X86 #define BOOTEFI_NAME "BOOTIA32.EFI" -#endif - -#if HOST_ARCH == HOST_ARCH_AARCH64 +#elif HOST_ARCH == HOST_ARCH_AARCH64 #define BOOTEFI_NAME "BOOTAA64.EFI" -#endif - -#if HOST_ARCH == HOST_ARCH_ARM +#elif HOST_ARCH == HOST_ARCH_ARM #define BOOTEFI_NAME "BOOTARM.EFI" -#endif - -#if HOST_ARCH == HOST_ARCH_RISCV32 +#elif HOST_ARCH == HOST_ARCH_RISCV32 #define BOOTEFI_NAME "BOOTRISCV32.EFI" -#endif - -#if HOST_ARCH == HOST_ARCH_RISCV64 +#elif HOST_ARCH == HOST_ARCH_RISCV64 #define BOOTEFI_NAME "BOOTRISCV64.EFI" +#else +#error Unsupported UEFI architecture #endif -#ifndef BOOTEFI_NAME +#else + +#if defined(CONFIG_ARM64) +#define BOOTEFI_NAME "BOOTAA64.EFI" +#elif defined(CONFIG_ARM) +#define BOOTEFI_NAME "BOOTARM.EFI" +#elif defined(CONFIG_X86_64) +#define BOOTEFI_NAME "BOOTX64.EFI" +#elif defined(CONFIG_X86) +#define BOOTEFI_NAME "BOOTIA32.EFI" +#elif defined(CONFIG_ARCH_RV32I) +#define BOOTEFI_NAME "BOOTRISCV32.EFI" +#elif defined(CONFIG_ARCH_RV64I) +#define BOOTEFI_NAME "BOOTRISCV64.EFI" +#else #error Unsupported UEFI architecture #endif #endif + +#endif diff --git a/include/efi_loader.h b/include/efi_loader.h index f6651e2c60..c1e00ebac3 100644 --- a/include/efi_loader.h +++ b/include/efi_loader.h @@ -499,6 +499,8 @@ extern struct list_head efi_register_notify_events; int efi_init_early(void); /* Initialize efi execution environment */ efi_status_t efi_init_obj_list(void); +/* Set up console modes */ +void efi_setup_console_size(void); /* Install device tree */ efi_status_t efi_install_fdt(void *fdt); /* Run loaded UEFI image */ diff --git a/include/fs.h b/include/fs.h index b43f16a692..2195dc172e 100644 --- a/include/fs.h +++ b/include/fs.h @@ -174,6 +174,8 @@ int fs_write(const char *filename, ulong addr, loff_t offset, loff_t len, #define FS_DT_REG 8 /* regular file */ #define FS_DT_LNK 10 /* symbolic link */ +#define FS_DIRENT_NAME_LEN 256 + /** * struct fs_dirent - directory entry * @@ -194,7 +196,7 @@ struct fs_dirent { /** change_time: time of last modification */ struct rtc_time change_time; /** name: file name */ - char name[256]; + char name[FS_DIRENT_NAME_LEN]; }; /* Note: fs_dir_stream should be treated as opaque to the user of fs layer */ diff --git a/include/mmc.h b/include/mmc.h index 9b4dc68311..073b01f82b 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -561,6 +561,7 @@ struct mmc_ops { int (*getwp)(struct mmc *mmc); int (*host_power_cycle)(struct mmc *mmc); int (*get_b_max)(struct mmc *mmc, void *dst, lbaint_t blkcnt); + int (*wait_dat0)(struct mmc *mmc, int state, int timeout_us); }; static inline int mmc_hs400_prepare_ddr(struct mmc *mmc) diff --git a/include/watchdog.h b/include/watchdog.h index 14fa5fda25..813cc8f2a5 100644 --- a/include/watchdog.h +++ b/include/watchdog.h @@ -49,7 +49,13 @@ int init_func_watchdog_reset(void); */ #if defined(CONFIG_WATCHDOG) #if defined(__ASSEMBLY__) - #define WATCHDOG_RESET bl watchdog_reset + /* Don't require the watchdog to be enabled in SPL */ + #if defined(CONFIG_SPL_BUILD) && \ + !defined(CONFIG_SPL_WATCHDOG) + #define WATCHDOG_RESET /*XXX DO_NOT_DEL_THIS_COMMENT*/ + #else + #define WATCHDOG_RESET bl watchdog_reset + #endif #else /* Don't require the watchdog to be enabled in SPL */ #if defined(CONFIG_SPL_BUILD) && \ diff --git a/lib/efi_loader/efi_bootmgr.c b/lib/efi_loader/efi_bootmgr.c index 93f6590530..234073ecb7 100644 --- a/lib/efi_loader/efi_bootmgr.c +++ b/lib/efi_loader/efi_bootmgr.c @@ -44,9 +44,8 @@ static const struct efi_runtime_services *rs; static struct efi_device_path *expand_media_path(struct efi_device_path *device_path) { - struct efi_device_path *dp, *full_path; + struct efi_device_path *dp, *rem, *full_path; efi_handle_t handle; - efi_status_t ret; if (!device_path) return NULL; @@ -57,11 +56,10 @@ struct efi_device_path *expand_media_path(struct efi_device_path *device_path) * booting from removable media. */ dp = device_path; - ret = EFI_CALL(efi_locate_device_path( - &efi_simple_file_system_protocol_guid, - &dp, &handle)); - if (ret == EFI_SUCCESS) { - if (dp->type == DEVICE_PATH_TYPE_END) { + handle = efi_dp_find_obj(dp, &efi_simple_file_system_protocol_guid, + &rem); + if (handle) { + if (rem->type == DEVICE_PATH_TYPE_END) { dp = efi_dp_from_file(NULL, 0, "/EFI/BOOT/" BOOTEFI_NAME); full_path = efi_dp_append(device_path, dp); diff --git a/lib/efi_loader/efi_capsule.c b/lib/efi_loader/efi_capsule.c index c76a5f3570..a6b98f066a 100644 --- a/lib/efi_loader/efi_capsule.c +++ b/lib/efi_loader/efi_capsule.c @@ -1058,14 +1058,15 @@ static void efi_capsule_scan_done(void) */ static efi_status_t check_run_capsules(void) { - u64 os_indications; + u64 os_indications = 0x0; efi_uintn_t size; efi_status_t r; size = sizeof(os_indications); r = efi_get_variable_int(u"OsIndications", &efi_global_variable_guid, NULL, &size, &os_indications, NULL); - if (r != EFI_SUCCESS || size != sizeof(os_indications)) + if (!IS_ENABLED(CONFIG_EFI_IGNORE_OSINDICATIONS) && + (r != EFI_SUCCESS || size != sizeof(os_indications))) return EFI_NOT_FOUND; if (os_indications & @@ -1084,7 +1085,7 @@ static efi_status_t check_run_capsules(void) return EFI_SUCCESS; } else if (IS_ENABLED(CONFIG_EFI_IGNORE_OSINDICATIONS)) { return EFI_SUCCESS; - } else { + } else { return EFI_NOT_FOUND; } } diff --git a/lib/efi_loader/efi_console.c b/lib/efi_loader/efi_console.c index 60a3fc85ac..3164fd484e 100644 --- a/lib/efi_loader/efi_console.c +++ b/lib/efi_loader/efi_console.c @@ -5,6 +5,8 @@ * Copyright (c) 2016 Alexander Graf */ +#define LOG_CATEGORY LOGC_EFI + #include #include #include @@ -12,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -58,7 +61,12 @@ const efi_guid_t efi_guid_text_output_protocol = #define cESC '\x1b' #define ESC "\x1b" -/* Default to mode 0 */ +/* + * efi_con_mode - mode information of the Simple Text Output Protocol + * + * Use safe settings before efi_setup_console_size() is called. + * By default enable only the 80x25 mode which must always exist. + */ static struct simple_text_output_mode efi_con_mode = { .max_mode = 1, .mode = 0, @@ -333,13 +341,13 @@ static int __maybe_unused query_vidconsole(int *rows, int *cols) } /** - * query_console_size() - update the mode table. + * efi_setup_console_size() - update the mode table. * * By default the only mode available is 80x25. If the console has at least 50 * lines, enable mode 80x50. If we can query the console size and it is neither * 80x25 nor 80x50, set it as an additional mode. */ -static void query_console_size(void) +void efi_setup_console_size(void) { int rows = 25, cols = 80; int ret = -ENODEV; @@ -351,6 +359,8 @@ static void query_console_size(void) if (ret) return; + log_debug("Console size %dx%d\n", rows, cols); + /* Test if we can have Mode 1 */ if (cols >= 80 && rows >= 50) { efi_cout_modes[1].present = 1; @@ -371,7 +381,6 @@ static void query_console_size(void) } } - /** * efi_cout_query_mode() - get terminal size for a text mode * @@ -1262,9 +1271,6 @@ efi_status_t efi_console_register(void) efi_status_t r; struct efi_device_path *dp; - /* Set up mode information */ - query_console_size(); - /* Install protocols on root node */ r = EFI_CALL(efi_install_multiple_protocol_interfaces (&efi_root, diff --git a/lib/efi_loader/efi_device_path.c b/lib/efi_loader/efi_device_path.c index 50a988c561..171661b897 100644 --- a/lib/efi_loader/efi_device_path.c +++ b/lib/efi_loader/efi_device_path.c @@ -973,9 +973,22 @@ static void path_to_uefi(void *uefi, const char *src) *pos = 0; } -/* - * If desc is NULL, this creates a path with only the file component, - * otherwise it creates a full path with both device and file components +/** + * efi_dp_from_file() - create device path for file + * + * The function creates a device path from the block descriptor @desc and the + * partition number @part and appends a device path node created describing the + * file path @path. + * + * If @desc is NULL, the device path will not contain nodes describing the + * partition. + * If @path is an empty string "", the device path will not contain a node + * for the file path. + * + * @desc: block device descriptor or NULL + * @part: partition number + * @path: file path on partition or "" + * Return: device path or NULL in case of an error */ struct efi_device_path *efi_dp_from_file(struct blk_desc *desc, int part, const char *path) @@ -1002,12 +1015,14 @@ struct efi_device_path *efi_dp_from_file(struct blk_desc *desc, int part, buf = dp_part_fill(buf, desc, part); /* add file-path: */ - fp = buf; - fp->dp.type = DEVICE_PATH_TYPE_MEDIA_DEVICE; - fp->dp.sub_type = DEVICE_PATH_SUB_TYPE_FILE_PATH; - fp->dp.length = (u16)fpsize; - path_to_uefi(fp->str, path); - buf += fpsize; + if (*path) { + fp = buf; + fp->dp.type = DEVICE_PATH_TYPE_MEDIA_DEVICE; + fp->dp.sub_type = DEVICE_PATH_SUB_TYPE_FILE_PATH; + fp->dp.length = (u16)fpsize; + path_to_uefi(fp->str, path); + buf += fpsize; + } *((struct efi_device_path *)buf) = END; diff --git a/lib/efi_loader/efi_firmware.c b/lib/efi_loader/efi_firmware.c index 0ce6c1e34f..30cafd15ca 100644 --- a/lib/efi_loader/efi_firmware.c +++ b/lib/efi_loader/efi_firmware.c @@ -241,18 +241,8 @@ efi_status_t efi_firmware_capsule_authenticate(const void **p_image, return EFI_SUCCESS; } -#ifdef CONFIG_EFI_CAPSULE_FIRMWARE_FIT -/* - * This FIRMWARE_MANAGEMENT_PROTOCOL driver provides a firmware update - * method with existing FIT image format, and handles - * - multiple regions of firmware via DFU - * but doesn't support - * - versioning of firmware image - * - package information - */ - /** - * efi_firmware_fit_get_image_info - return information about the current + * efi_firmware_get_image_info - return information about the current * firmware image * @this: Protocol instance * @image_info_size: Size of @image_info @@ -270,7 +260,7 @@ efi_status_t efi_firmware_capsule_authenticate(const void **p_image, * Return status code */ static -efi_status_t EFIAPI efi_firmware_fit_get_image_info( +efi_status_t EFIAPI efi_firmware_get_image_info( struct efi_firmware_management_protocol *this, efi_uintn_t *image_info_size, struct efi_firmware_image_descriptor *image_info, @@ -303,6 +293,16 @@ efi_status_t EFIAPI efi_firmware_fit_get_image_info( return EFI_EXIT(ret); } +#ifdef CONFIG_EFI_CAPSULE_FIRMWARE_FIT +/* + * This FIRMWARE_MANAGEMENT_PROTOCOL driver provides a firmware update + * method with existing FIT image format, and handles + * - multiple regions of firmware via DFU + * but doesn't support + * - versioning of firmware image + * - package information + */ + /** * efi_firmware_fit_set_image - update the firmware image * @this: Protocol instance @@ -348,7 +348,7 @@ efi_status_t EFIAPI efi_firmware_fit_set_image( } const struct efi_firmware_management_protocol efi_fmp_fit = { - .get_image_info = efi_firmware_fit_get_image_info, + .get_image_info = efi_firmware_get_image_info, .get_image = efi_firmware_get_image_unsupported, .set_image = efi_firmware_fit_set_image, .check_image = efi_firmware_check_image_unsupported, @@ -363,58 +363,6 @@ const struct efi_firmware_management_protocol efi_fmp_fit = { * method with raw data. */ -/** - * efi_firmware_raw_get_image_info - return information about the current - * firmware image - * @this: Protocol instance - * @image_info_size: Size of @image_info - * @image_info: Image information - * @descriptor_version: Pointer to version number - * @descriptor_count: Pointer to number of descriptors - * @descriptor_size: Pointer to descriptor size - * @package_version: Package version - * @package_version_name: Package version's name - * - * Return information bout the current firmware image in @image_info. - * @image_info will consist of a number of descriptors. - * Each descriptor will be created based on "dfu_alt_info" variable. - * - * Return status code - */ -static -efi_status_t EFIAPI efi_firmware_raw_get_image_info( - struct efi_firmware_management_protocol *this, - efi_uintn_t *image_info_size, - struct efi_firmware_image_descriptor *image_info, - u32 *descriptor_version, - u8 *descriptor_count, - efi_uintn_t *descriptor_size, - u32 *package_version, - u16 **package_version_name) -{ - efi_status_t ret = EFI_SUCCESS; - - EFI_ENTRY("%p %p %p %p %p %p %p %p\n", this, - image_info_size, image_info, - descriptor_version, descriptor_count, descriptor_size, - package_version, package_version_name); - - if (!image_info_size) - return EFI_EXIT(EFI_INVALID_PARAMETER); - - if (*image_info_size && - (!image_info || !descriptor_version || !descriptor_count || - !descriptor_size || !package_version || !package_version_name)) - return EFI_EXIT(EFI_INVALID_PARAMETER); - - ret = efi_fill_image_desc_array(image_info_size, image_info, - descriptor_version, descriptor_count, - descriptor_size, package_version, - package_version_name); - - return EFI_EXIT(ret); -} - /** * efi_firmware_raw_set_image - update the firmware image * @this: Protocol instance @@ -461,7 +409,7 @@ efi_status_t EFIAPI efi_firmware_raw_set_image( } const struct efi_firmware_management_protocol efi_fmp_raw = { - .get_image_info = efi_firmware_raw_get_image_info, + .get_image_info = efi_firmware_get_image_info, .get_image = efi_firmware_get_image_unsupported, .set_image = efi_firmware_raw_set_image, .check_image = efi_firmware_check_image_unsupported, diff --git a/lib/efi_loader/efi_setup.c b/lib/efi_loader/efi_setup.c index 250eeb2fcd..492ecf4cb1 100644 --- a/lib/efi_loader/efi_setup.c +++ b/lib/efi_loader/efi_setup.c @@ -243,6 +243,10 @@ efi_status_t efi_init_obj_list(void) goto out; } + /* Set up console modes */ + efi_setup_console_size(); + + /* Install EFI_RNG_PROTOCOL */ if (IS_ENABLED(CONFIG_EFI_RNG_PROTOCOL)) { ret = efi_rng_register(); if (ret != EFI_SUCCESS) diff --git a/net/Kconfig b/net/Kconfig index 964a4fe499..564ea8b2d2 100644 --- a/net/Kconfig +++ b/net/Kconfig @@ -158,7 +158,7 @@ config UDP_CHECKSUM default y if SANDBOX help Enable this to verify the checksum on UDP packets. If the checksum - is wrong then the packet is discussed and an error is shown, like + is wrong then the packet is discarded and an error is shown, like "UDP wrong checksum 29374a23 30ff3826" config BOOTP_SERVERIP diff --git a/test/py/tests/test_efi_capsule/test_capsule_firmware_fit.py b/test/py/tests/test_efi_capsule/test_capsule_firmware_fit.py index 5bef84958b..8f75b554ad 100644 --- a/test/py/tests/test_efi_capsule/test_capsule_firmware_fit.py +++ b/test/py/tests/test_efi_capsule/test_capsule_firmware_fit.py @@ -117,6 +117,7 @@ class TestEfiCapsuleFirmwareFit(object): with u_boot_console.log.section('Test Case 2-a, before reboot'): output = u_boot_console.run_command_list([ 'host bind 0 %s' % disk_img, + 'printenv -e PlatformLangCodes', # workaround for terminal size determination 'efidebug boot add -b 1 TEST host 0:1 /helloworld.efi -s ""', 'efidebug boot order 1', 'env set -e -nv -bs -rt OsIndications =0x0000000000000004', diff --git a/test/py/tests/test_efi_capsule/test_capsule_firmware_raw.py b/test/py/tests/test_efi_capsule/test_capsule_firmware_raw.py index c8c647d0b1..92bfb14932 100644 --- a/test/py/tests/test_efi_capsule/test_capsule_firmware_raw.py +++ b/test/py/tests/test_efi_capsule/test_capsule_firmware_raw.py @@ -115,6 +115,7 @@ class TestEfiCapsuleFirmwareRaw: with u_boot_console.log.section('Test Case 2-a, before reboot'): output = u_boot_console.run_command_list([ 'host bind 0 %s' % disk_img, + 'printenv -e PlatformLangCodes', # workaround for terminal size determination 'efidebug boot add -b 1 TEST host 0:1 /helloworld.efi -s ""', 'efidebug boot order 1', 'env set -e OsIndications', @@ -197,6 +198,7 @@ class TestEfiCapsuleFirmwareRaw: with u_boot_console.log.section('Test Case 3-a, before reboot'): output = u_boot_console.run_command_list([ 'host bind 0 %s' % disk_img, + 'printenv -e PlatformLangCodes', # workaround for terminal size determination 'efidebug boot add -b 1 TEST host 0:1 /helloworld.efi -s ""', 'efidebug boot order 1', 'env set -e -nv -bs -rt OsIndications =0x0000000000000004', diff --git a/tools/binman/setup.py b/tools/binman/setup.py index 5ed94abdaf..9a9206eb04 100644 --- a/tools/binman/setup.py +++ b/tools/binman/setup.py @@ -5,7 +5,7 @@ setup(name='binman', version='1.0', license='GPL-2.0+', scripts=['binman'], - packages=['binman', 'binman.etype'], + packages=['binman', 'binman.etype', 'binman.btool'], package_dir={'binman': ''}, package_data={'binman': ['README.rst', 'entries.rst']}, classifiers=['Environment :: Console', diff --git a/tools/dtoc/test_src_scan.py b/tools/dtoc/test_src_scan.py index bdfa669d81..f93cd7f5a3 100644 --- a/tools/dtoc/test_src_scan.py +++ b/tools/dtoc/test_src_scan.py @@ -151,6 +151,7 @@ class TestSrcScan(unittest.TestCase): self.assertEqual('UCLASS_I2C', drv.uclass_id) self.assertEqual( {'nvidia,tegra114-i2c': 'TYPE_114', + 'nvidia,tegra124-i2c': 'TYPE_114', 'nvidia,tegra20-i2c': 'TYPE_STD', 'nvidia,tegra20-i2c-dvc': 'TYPE_DVC'}, drv.compat) self.assertEqual('i2c_bus', drv.priv)