powerpc: cache: define ARCH_DMA_MINALIGN for DMA buffer alignment

Signed-off-by: Anton Staaf <robotboy@chromium.org>
Acked-by: Stefan Roese <sr@denx.de>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
This commit is contained in:
Anton Staaf 2011-10-17 16:46:06 -07:00 committed by Wolfgang Denk
parent 6fa6035ff2
commit 0991701a27

View File

@ -20,6 +20,12 @@
#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
/*
* Use the L1 data cache line size value for the minimum DMA buffer alignment
* on PowerPC.
*/
#define ARCH_DMA_MINALIGN L1_CACHE_BYTES
/*
* For compatibility reasons support the CONFIG_SYS_CACHELINE_SIZE too
*/