Wenjing Liu c23f95ae70 drm/amd/display: add global master update lock interfaces ... Add these interfacese for future use setup_global_lock() lock_global() pipe_control_lock_global() Signed-off-by: Wenjing Liu <Wenjing.Liu@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2019-03-20 23:39:48 -05:00
..
abm.h	drm/amd/display: send pipe set command to dmcu when stream unblanks	2019-02-19 15:58:26 -05:00
audio.h
aux_engine.h	drm/amd/display: flatten aux_engine and engine	2018-07-27 09:07:42 -05:00
clk_mgr.h	drm/amd/display: rename dccg to clk_mgr	2018-11-05 14:20:48 -05:00
dccg.h	drm/amd/display: fix up reference clock abstractions	2019-03-19 15:36:49 -05:00
dchubbub.h	drm/amd/display: fix up reference clock abstractions	2019-03-19 15:36:49 -05:00
dmcu.h	drm/amd/display: Update DMCU versioning mechanism	2019-01-25 16:15:36 -05:00
dpp.h	drm/amd/display: Fix runtime errors for diagnostic tests	2019-01-14 15:04:32 -05:00
gpio.h
hubp.h	drm/amd/display: Introduce DC VM interface	2019-01-25 16:15:36 -05:00
hw_shared.h	drm/amd/display: Move enum gamut_remap_select to hw_shared.h	2019-03-05 15:09:32 -05:00
ipp.h	drm/amd/display: csc_transform to dc_csc_transform	2018-05-15 13:42:54 -05:00
link_encoder.h	drm/amd/display: interface to check if timing can be seamless	2019-02-06 13:30:44 -05:00
mem_input.h	drm/amd/display: update DCN dml calcs	2019-01-14 15:04:37 -05:00
mpc.h	drm/amd/display: align dtn logs and add mpc idle bit print	2018-04-11 13:07:41 -05:00
opp.h	drm/amd/display: Move opp reg access from hwss to opp module.	2018-02-19 14:17:34 -05:00
stream_encoder.h	drm/amd/display: fix DP 422 VID_M half the rate issue.	2019-03-20 23:39:48 -05:00
timing_generator.h	drm/amd/display: add global master update lock interfaces	2019-03-20 23:39:48 -05:00
transform.h	drm/amd/display: csc_transform to dc_csc_transform	2018-05-15 13:42:54 -05:00
vmid.h	drm/amd/display: Introduce DC VM interface	2019-01-25 16:15:36 -05:00