leandrof/linux
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

drm/amd/display: flatten aux_engine and engine

Browse Source 
[Why]
engine and aux_engine are unnecessary layers we want to remove this
layer.

[How]
flatten engine and aux engine structs into one struct called
aux_engine and remove all references to the engine struct.

Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Bhawanpreet Lakha 2018-06-28 17:50:05 -04:00 committed by Alex Deucher
parent 824474ba38
commit 65c78961b3
12 changed files with 140 additions and 186 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c
View File

@ -33,7 +33,6 @@
#include "include/vector.h"
#include "core_types.h"
#include "dc_link_ddc.h"
#include "engine.h"
#include "aux_engine.h"
#define AUX_POWER_UP_WA_DELAY 500
@ -640,7 +639,6 @@ int dc_link_aux_transfer(struct ddc_service *ddc,
enum i2caux_transaction_action action)
{
struct ddc *ddc_pin = ddc->ddc_pin;
struct engine *engine;
struct aux_engine *aux_engine;
enum aux_channel_operation_result operation_result;
struct aux_request_transaction_data aux_req;
@ -652,8 +650,8 @@ int dc_link_aux_transfer(struct ddc_service *ddc,
memset(&aux_req, 0, sizeof(aux_req));
memset(&aux_rep, 0, sizeof(aux_rep));
engine = ddc->ctx->dc->res_pool->engines[ddc_pin->pin_data->en];
aux_engine = engine->funcs->acquire(engine, ddc_pin);
aux_engine = ddc->ctx->dc->res_pool->engines[ddc_pin->pin_data->en];
aux_engine->funcs->acquire(aux_engine, ddc_pin);
aux_req.type = type;
aux_req.action = action;
@ -685,7 +683,7 @@ int dc_link_aux_transfer(struct ddc_service *ddc,
res = -1;
break;
}
aux_engine->base.funcs->release_engine(&aux_engine->base);
aux_engine->funcs->release_engine(aux_engine);
return res;
}

55
drivers/gpu/drm/amd/display/dc/dce/dce_aux.c
View File

@ -28,12 +28,12 @@
#include "dce/dce_11_0_sh_mask.h"
#define CTX \
aux110->base.base.ctx
aux110->base.ctx
#define REG(reg_name)\
(aux110->regs->reg_name)
#define DC_LOGGER \
engine->base.ctx->logger
engine->ctx->logger
#include "reg_helper.h"
@ -51,9 +51,9 @@ enum {
AUX_DEFER_RETRY_COUNTER = 6
};
static void release_engine(
struct engine *engine)
struct aux_engine *engine)
{
struct aux_engine_dce110 *aux110 = FROM_ENGINE(engine);
struct aux_engine_dce110 *aux110 = FROM_AUX_ENGINE(engine);
dal_ddc_close(engine->ddc);
@ -827,22 +827,21 @@ static bool end_of_transaction_command(
/* according Syed, it does not need now DoDummyMOT */
}
bool submit_request(
struct engine *engine,
static bool submit_request(
struct aux_engine *engine,
struct i2caux_transaction_request *request,
bool middle_of_transaction)
{
struct aux_engine *aux_engine = FROM_AUX_ENGINE_ENGINE(engine);
bool result;
bool mot_used = true;
switch (request->operation) {
case I2CAUX_TRANSACTION_READ:
result = read_command(aux_engine, request, mot_used);
result = read_command(engine, request, mot_used);
break;
case I2CAUX_TRANSACTION_WRITE:
result = write_command(aux_engine, request, mot_used);
result = write_command(engine, request, mot_used);
break;
default:
result = false;
@ -854,45 +853,45 @@ bool submit_request(
*/
if (!middle_of_transaction || !result)
end_of_transaction_command(aux_engine, request);
end_of_transaction_command(engine, request);
/* mask AUX interrupt */
return result;
}
enum i2caux_engine_type get_engine_type(
const struct engine *engine)
const struct aux_engine *engine)
{
return I2CAUX_ENGINE_TYPE_AUX;
}
static struct aux_engine *acquire(
struct engine *engine,
static bool acquire(
struct aux_engine *engine,
struct ddc *ddc)
{
struct aux_engine *aux_engine = FROM_AUX_ENGINE_ENGINE(engine);
enum gpio_result result;
if (aux_engine->funcs->is_engine_available) {
if (engine->funcs->is_engine_available) {
/*check whether SW could use the engine*/
if (!aux_engine->funcs->is_engine_available(aux_engine))
return NULL;
if (!engine->funcs->is_engine_available(engine))
return false;
}
result = dal_ddc_open(ddc, GPIO_MODE_HARDWARE,
GPIO_DDC_CONFIG_TYPE_MODE_AUX);
if (result != GPIO_RESULT_OK)
return NULL;
return false;
if (!aux_engine->funcs->acquire_engine(aux_engine)) {
if (!engine->funcs->acquire_engine(engine)) {
dal_ddc_close(ddc);
return NULL;
return false;
}
engine->ddc = ddc;
return aux_engine;
return true;
}
static const struct aux_engine_funcs aux_engine_funcs = {
@ -902,9 +901,6 @@ static const struct aux_engine_funcs aux_engine_funcs = {
.read_channel_reply = read_channel_reply,
.get_channel_status = get_channel_status,
.is_engine_available = is_engine_available,
};
static const struct engine_funcs engine_funcs = {
.release_engine = release_engine,
.destroy_engine = dce110_engine_destroy,
.submit_request = submit_request,
@ -912,10 +908,10 @@ static const struct engine_funcs engine_funcs = {
.acquire = acquire,
};
void dce110_engine_destroy(struct engine **engine)
void dce110_engine_destroy(struct aux_engine **engine)
{
struct aux_engine_dce110 *engine110 = FROM_ENGINE(*engine);
struct aux_engine_dce110 *engine110 = FROM_AUX_ENGINE(*engine);
kfree(engine110);
*engine = NULL;
@ -927,13 +923,12 @@ struct aux_engine *dce110_aux_engine_construct(struct aux_engine_dce110 *aux_eng
uint32_t timeout_period,
const struct dce110_aux_registers *regs)
{
aux_engine110->base.base.ddc = NULL;
aux_engine110->base.base.ctx = ctx;
aux_engine110->base.ddc = NULL;
aux_engine110->base.ctx = ctx;
aux_engine110->base.delay = 0;
aux_engine110->base.max_defer_write_retry = 0;
aux_engine110->base.base.funcs = &engine_funcs;
aux_engine110->base.funcs = &aux_engine_funcs;
aux_engine110->base.base.inst = inst;
aux_engine110->base.inst = inst;
aux_engine110->timeout_period = timeout_period;
aux_engine110->regs = regs;

4
drivers/gpu/drm/amd/display/dc/dce/dce_aux.h
View File

@ -103,9 +103,9 @@ struct aux_engine *dce110_aux_engine_construct(
uint32_t timeout_period,
const struct dce110_aux_registers *regs);
void dce110_engine_destroy(struct engine **engine);
void dce110_engine_destroy(struct aux_engine **engine);
bool dce110_aux_engine_acquire(
struct engine *aux_engine,
struct aux_engine *aux_engine,
struct ddc *ddc);
#endif

4
drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c
View File

@ -586,7 +586,7 @@ struct output_pixel_processor *dce100_opp_create(
return &opp->base;
}
struct engine *dce100_aux_engine_create(
struct aux_engine *dce100_aux_engine_create(
struct dc_context *ctx,
uint32_t inst)
{
@ -600,7 +600,7 @@ struct engine *dce100_aux_engine_create(
SW_AUX_TIMEOUT_PERIOD_MULTIPLIER * AUX_TIMEOUT_PERIOD,
&aux_engine_regs[inst]);
return &aux_engine->base.base;
return &aux_engine->base;
}
struct clock_source *dce100_clock_source_create(

4
drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c
View File

@ -604,7 +604,7 @@ static struct output_pixel_processor *dce110_opp_create(
return &opp->base;
}
struct engine *dce110_aux_engine_create(
struct aux_engine *dce110_aux_engine_create(
struct dc_context *ctx,
uint32_t inst)
{
@ -618,7 +618,7 @@ struct engine *dce110_aux_engine_create(
SW_AUX_TIMEOUT_PERIOD_MULTIPLIER * AUX_TIMEOUT_PERIOD,
&aux_engine_regs[inst]);
return &aux_engine->base.base;
return &aux_engine->base;
}
struct clock_source *dce110_clock_source_create(

4
drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c
View File

@ -604,7 +604,7 @@ struct output_pixel_processor *dce112_opp_create(
return &opp->base;
}
struct engine *dce112_aux_engine_create(
struct aux_engine *dce112_aux_engine_create(
struct dc_context *ctx,
uint32_t inst)
{
@ -618,7 +618,7 @@ struct engine *dce112_aux_engine_create(
SW_AUX_TIMEOUT_PERIOD_MULTIPLIER * AUX_TIMEOUT_PERIOD,
&aux_engine_regs[inst]);
return &aux_engine->base.base;
return &aux_engine->base;
}
struct clock_source *dce112_clock_source_create(

4
drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c
View File

@ -376,7 +376,7 @@ struct output_pixel_processor *dce120_opp_create(
ctx, inst, &opp_regs[inst], &opp_shift, &opp_mask);
return &opp->base;
}
struct engine *dce120_aux_engine_create(
struct aux_engine *dce120_aux_engine_create(
struct dc_context *ctx,
uint32_t inst)
{
@ -390,7 +390,7 @@ struct engine *dce120_aux_engine_create(
SW_AUX_TIMEOUT_PERIOD_MULTIPLIER * AUX_TIMEOUT_PERIOD,
&aux_engine_regs[inst]);
return &aux_engine->base.base;
return &aux_engine->base;
}
static const struct bios_registers bios_regs = {

4
drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c
View File

@ -464,7 +464,7 @@ static struct output_pixel_processor *dce80_opp_create(
return &opp->base;
}
struct engine *dce80_aux_engine_create(
struct aux_engine *dce80_aux_engine_create(
struct dc_context *ctx,
uint32_t inst)
{
@ -478,7 +478,7 @@ struct engine *dce80_aux_engine_create(
SW_AUX_TIMEOUT_PERIOD_MULTIPLIER * AUX_TIMEOUT_PERIOD,
&aux_engine_regs[inst]);
return &aux_engine->base.base;
return &aux_engine->base;
}
static struct stream_encoder *dce80_stream_encoder_create(

4
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
View File

@ -594,7 +594,7 @@ static struct output_pixel_processor *dcn10_opp_create(
return &opp->base;
}
struct engine *dcn10_aux_engine_create(
struct aux_engine *dcn10_aux_engine_create(
struct dc_context *ctx,
uint32_t inst)
{
@ -608,7 +608,7 @@ struct engine *dcn10_aux_engine_create(
SW_AUX_TIMEOUT_PERIOD_MULTIPLIER * AUX_TIMEOUT_PERIOD,
&aux_engine_regs[inst]);
return &aux_engine->base.base;
return &aux_engine->base;
}
static struct mpc *dcn10_mpc_create(struct dc_context *ctx)

2
drivers/gpu/drm/amd/display/dc/inc/core_types.h
View File

@ -138,7 +138,7 @@ struct resource_pool {
struct output_pixel_processor *opps[MAX_PIPES];
struct timing_generator *timing_generators[MAX_PIPES];
struct stream_encoder *stream_enc[MAX_PIPES * 2];
struct engine *engines[MAX_PIPES];
struct aux_engine *engines[MAX_PIPES];
struct hubbub *hubbub;
struct mpc *mpc;
struct pp_smu_funcs_rv *pp_smu;

127
drivers/gpu/drm/amd/display/dc/inc/hw/aux_engine.h
View File

@ -26,46 +26,72 @@
#ifndef __DAL_AUX_ENGINE_H__
#define __DAL_AUX_ENGINE_H__
#include "engine.h"
#include "dc_ddc_types.h"
#include "include/i2caux_interface.h"
struct aux_engine;
union aux_config;
struct aux_engine_funcs {
void (*destroy)(
struct aux_engine **ptr);
bool (*acquire_engine)(
struct aux_engine *engine);
void (*configure)(
struct aux_engine *engine,
union aux_config cfg);
void (*submit_channel_request)(
struct aux_engine *engine,
struct aux_request_transaction_data *request);
void (*process_channel_reply)(
struct aux_engine *engine,
struct aux_reply_transaction_data *reply);
int (*read_channel_reply)(
struct aux_engine *engine,
uint32_t size,
uint8_t *buffer,
uint8_t *reply_result,
uint32_t *sw_status);
enum aux_channel_operation_result (*get_channel_status)(
struct aux_engine *engine,
uint8_t *returned_bytes);
bool (*is_engine_available)(struct aux_engine *engine);
enum i2caux_transaction_operation {
I2CAUX_TRANSACTION_READ,
I2CAUX_TRANSACTION_WRITE
};
struct engine;
enum i2caux_transaction_address_space {
I2CAUX_TRANSACTION_ADDRESS_SPACE_I2C = 1,
I2CAUX_TRANSACTION_ADDRESS_SPACE_DPCD
};
struct i2caux_transaction_payload {
enum i2caux_transaction_address_space address_space;
uint32_t address;
uint32_t length;
uint8_t *data;
};
enum i2caux_transaction_status {
I2CAUX_TRANSACTION_STATUS_UNKNOWN = (-1L),
I2CAUX_TRANSACTION_STATUS_SUCCEEDED,
I2CAUX_TRANSACTION_STATUS_FAILED_CHANNEL_BUSY,
I2CAUX_TRANSACTION_STATUS_FAILED_TIMEOUT,
I2CAUX_TRANSACTION_STATUS_FAILED_PROTOCOL_ERROR,
I2CAUX_TRANSACTION_STATUS_FAILED_NACK,
I2CAUX_TRANSACTION_STATUS_FAILED_INCOMPLETE,
I2CAUX_TRANSACTION_STATUS_FAILED_OPERATION,
I2CAUX_TRANSACTION_STATUS_FAILED_INVALID_OPERATION,
I2CAUX_TRANSACTION_STATUS_FAILED_BUFFER_OVERFLOW,
I2CAUX_TRANSACTION_STATUS_FAILED_HPD_DISCON
};
struct i2caux_transaction_request {
enum i2caux_transaction_operation operation;
struct i2caux_transaction_payload payload;
enum i2caux_transaction_status status;
};
enum i2caux_engine_type {
I2CAUX_ENGINE_TYPE_UNKNOWN = (-1L),
I2CAUX_ENGINE_TYPE_AUX,
I2CAUX_ENGINE_TYPE_I2C_DDC_HW,
I2CAUX_ENGINE_TYPE_I2C_GENERIC_HW,
I2CAUX_ENGINE_TYPE_I2C_SW
};
enum i2c_default_speed {
I2CAUX_DEFAULT_I2C_HW_SPEED = 50,
I2CAUX_DEFAULT_I2C_SW_SPEED = 50
};
union aux_config;
struct aux_engine {
struct engine base;
uint32_t inst;
struct ddc *ddc;
struct dc_context *ctx;
const struct aux_engine_funcs *funcs;
/* following values are expressed in milliseconds */
uint32_t delay;
uint32_t max_defer_write_retry;
bool acquire_reset;
};
struct read_command_context {
uint8_t *buffer;
uint32_t current_read_length;
@ -86,6 +112,7 @@ struct read_command_context {
bool transaction_complete;
bool operation_succeeded;
};
struct write_command_context {
bool mot;
@ -110,4 +137,44 @@ struct write_command_context {
bool transaction_complete;
bool operation_succeeded;
};
struct aux_engine_funcs {
void (*destroy)(
struct aux_engine **ptr);
bool (*acquire_engine)(
struct aux_engine *engine);
void (*configure)(
struct aux_engine *engine,
union aux_config cfg);
void (*submit_channel_request)(
struct aux_engine *engine,
struct aux_request_transaction_data *request);
void (*process_channel_reply)(
struct aux_engine *engine,
struct aux_reply_transaction_data *reply);
int (*read_channel_reply)(
struct aux_engine *engine,
uint32_t size,
uint8_t *buffer,
uint8_t *reply_result,
uint32_t *sw_status);
enum aux_channel_operation_result (*get_channel_status)(
struct aux_engine *engine,
uint8_t *returned_bytes);
bool (*is_engine_available)(struct aux_engine *engine);
enum i2caux_engine_type (*get_engine_type)(
const struct aux_engine *engine);
bool (*acquire)(
struct aux_engine *engine,
struct ddc *ddc);
bool (*submit_request)(
struct aux_engine *engine,
struct i2caux_transaction_request *request,
bool middle_of_transaction);
void (*release_engine)(
struct aux_engine *engine);
void (*destroy_engine)(
struct aux_engine **engine);
};
#endif

106
drivers/gpu/drm/amd/display/dc/inc/hw/engine.h
View File

@ -1,106 +0,0 @@
/*
* Copyright 2012-15 Advanced Micro Devices, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: AMD
*
*/
#ifndef __DAL_ENGINE_H__
#define __DAL_ENGINE_H__
#include "dc_ddc_types.h"
enum i2caux_transaction_operation {
I2CAUX_TRANSACTION_READ,
I2CAUX_TRANSACTION_WRITE
};
enum i2caux_transaction_address_space {
I2CAUX_TRANSACTION_ADDRESS_SPACE_I2C = 1,
I2CAUX_TRANSACTION_ADDRESS_SPACE_DPCD
};
struct i2caux_transaction_payload {
enum i2caux_transaction_address_space address_space;
uint32_t address;
uint32_t length;
uint8_t *data;
};
enum i2caux_transaction_status {
I2CAUX_TRANSACTION_STATUS_UNKNOWN = (-1L),
I2CAUX_TRANSACTION_STATUS_SUCCEEDED,
I2CAUX_TRANSACTION_STATUS_FAILED_CHANNEL_BUSY,
I2CAUX_TRANSACTION_STATUS_FAILED_TIMEOUT,
I2CAUX_TRANSACTION_STATUS_FAILED_PROTOCOL_ERROR,
I2CAUX_TRANSACTION_STATUS_FAILED_NACK,
I2CAUX_TRANSACTION_STATUS_FAILED_INCOMPLETE,
I2CAUX_TRANSACTION_STATUS_FAILED_OPERATION,
I2CAUX_TRANSACTION_STATUS_FAILED_INVALID_OPERATION,
I2CAUX_TRANSACTION_STATUS_FAILED_BUFFER_OVERFLOW,
I2CAUX_TRANSACTION_STATUS_FAILED_HPD_DISCON
};
struct i2caux_transaction_request {
enum i2caux_transaction_operation operation;
struct i2caux_transaction_payload payload;
enum i2caux_transaction_status status;
};
enum i2caux_engine_type {
I2CAUX_ENGINE_TYPE_UNKNOWN = (-1L),
I2CAUX_ENGINE_TYPE_AUX,
I2CAUX_ENGINE_TYPE_I2C_DDC_HW,
I2CAUX_ENGINE_TYPE_I2C_GENERIC_HW,
I2CAUX_ENGINE_TYPE_I2C_SW
};
enum i2c_default_speed {
I2CAUX_DEFAULT_I2C_HW_SPEED = 50,
I2CAUX_DEFAULT_I2C_SW_SPEED = 50
};
struct engine;
struct engine_funcs {
enum i2caux_engine_type (*get_engine_type)(
const struct engine *engine);
struct aux_engine* (*acquire)(
struct engine *engine,
struct ddc *ddc);
bool (*submit_request)(
struct engine *engine,
struct i2caux_transaction_request *request,
bool middle_of_transaction);
void (*release_engine)(
struct engine *engine);
void (*destroy_engine)(
struct engine **engine);
};
struct engine {
const struct engine_funcs *funcs;
uint32_t inst;
struct ddc *ddc;
struct dc_context *ctx;
};
#endif