Commit Graph

878 Commits

Author SHA1 Message Date
Pan Wen
c80dfd9bf5 clk: hisilicon: add CRG driver for Hi3516CV300 SoC
Add CRG driver for Hi3516CV300 SoC. CRG(Clock and Reset
Generator) module generates clock and reset signals used
by other module blocks on SoC.

Signed-off-by: Pan Wen <wenpan@hisilicon.com>
Signed-off-by: Jiancheng Xue <xuejiancheng@hisilicon.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-11-14 12:04:39 -08:00
Jiancheng Xue
707d33cb0b clk: hisilicon: add CRG driver for Hi3798CV200 SoC
Add CRG driver for Hi3798CV200 SoC. CRG(Clock and Reset
Generator) module generates clock and reset signals used
by other module blocks on SoC.

Signed-off-by: Jiancheng Xue <xuejiancheng@hisilicon.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-11-11 15:43:49 -08:00
Stephen Boyd
81ab3279c5 Merge branch 'clk-qcom-rpm' into clk-next
* clk-qcom-rpm:
  clk: qcom: Add support for RPM Clocks
  clk: qcom: Add support for SMD-RPM Clocks
  clk: qcom: Always add factor clock for xo clocks
2016-11-10 16:50:16 -08:00
Georgi Djakov
872f91b5ea clk: qcom: Add support for RPM Clocks
This adds initial support for clocks controlled by the Resource
Power Manager (RPM) processor on some Qualcomm SoCs, which use
the qcom_rpm driver to communicate with RPM.
Such platforms are apq8064 and msm8960.

Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-11-10 16:46:56 -08:00
Georgi Djakov
00f64b5887 clk: qcom: Add support for SMD-RPM Clocks
This adds initial support for clocks controlled by the Resource
Power Manager (RPM) processor on some Qualcomm SoCs, which use
the qcom_smd_rpm driver to communicate with RPM.
Such platforms are msm8916, apq8084 and msm8974.

The RPM is a dedicated hardware engine for managing the shared
SoC resources in order to keep the lowest power profile. It
communicates with other hardware subsystems via shared memory
and accepts clock requests, aggregates the requests and turns
the clocks on/off or scales them on demand.

This driver is based on the codeaurora.org driver:
https://www.codeaurora.org/cgit/quic/la/kernel/msm-3.10/tree/drivers/clk/qcom/clock-rpm.c

Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
[sboyd@codeaurora.org: Remove useless braces for single line if]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-11-10 16:37:55 -08:00
Stephen Boyd
b0e031c94a Merge branch 'clk-qcom-8994' into clk-next
* clk-qcom-8994:
  clk: qcom: Add support for msm8994 global clock controller
  dt-bindings: qcom: clocks: Add msm8994 clock bindings
2016-11-10 15:47:56 -08:00
Jeremy McNicoll
49e2828243 dt-bindings: qcom: clocks: Add msm8994 clock bindings
Signed-off-by: Jeremy McNicoll <jeremymc@redhat.com>
[sboyd@codeaurora.org: Dropped unused and incorrect GDSC defines]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-11-10 14:27:29 -08:00
Patrice Chotard
226226994c ARM: dts: remove stih415-clks.h
Since v4.8, STiH415/416 clock support has
been removed [1], these platform doesn't boot.
We can remove DTS files related to these socs.

[1] https://patchwork.kernel.org/patch/9157571/

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2016-11-10 09:52:47 +01:00
Sergei Shtylyov
1fa8a875df clk: renesas: Add r8a7745 CPG Core Clock Definitions
Add macros usable by the device tree sources to reference the R8A7745
CPG clocks by index. The data comes from Table 7.2c in revision 1.00 of
the RZ/G Series User's Manual.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-11-07 15:13:30 +01:00
Sergei Shtylyov
4e195933de clk: renesas: Add r8a7743 CPG Core Clock Definitions
Add macros usable by the device tree sources to reference the R8A7743 CPG
clocks by index. The data comes from Table 7.2b in revision 1.00 of the
RZ/G Series User's Manual.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-11-07 15:09:12 +01:00
Sergei Shtylyov
68cc085a4d ARM: dts: r8a7794: remove Z clock
R8A7794 doesn't have Cortex-A15 CPUs, thus there's no Z clock...

Fixes: 0dce5454d5 ("ARM: shmobile: Initial r8a7794 SoC device tree")
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-04 10:36:47 +01:00
Chris Brandt
7c8522b704 ARM: dts: r7s72100: add sdhi clock to device tree
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-04 10:36:17 +01:00
Maxime Ripard
c6a0637460 clk: sunxi-ng: Add A64 clocks
Add the A64 CCU clocks set.

Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-11-03 09:06:18 +01:00
Neil Armstrong
5881456295 clk: oxnas: Add dt-bindings include file for OX820
In order to support the Oxford Semiconductor Gate clocks, add a
dedicated dt-binding include file for gate indexes.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/20161005150752.22618-3-narmstrong@baylibre.com
2016-10-23 10:18:36 -07:00
Neil Armstrong
6fc8ec8bfd clk: oxnas: Add dt-bindings include file for OX810SE
In order to prepare support for the Oxford Semiconductor OX820, add
a dt-bindings include file used by the ox810se dtsi.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/20161005150752.22618-2-narmstrong@baylibre.com
2016-10-23 10:18:33 -07:00
Paweł Jarosz
550a13315e clk: rockchip: Add binding ids for cpu and peri clocks on rk3066
Add bindings for ACLK_CPU, HCLK_CPU, PCLK_CPU, ACLK_PERI, HCLK_PERI, PCLK_PERI.

We need this to init it's rate at boot time.

Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-10-21 15:26:23 +02:00
Chris Brandt
6c35a66656 ARM: dts: r7s72100: add mmcif clock to device tree
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-10-17 08:20:02 +02:00
Linus Torvalds
c913fc4146 ARM: SoC: late DT updates for v4.9
These updates have been kept in a separate branch mostly because
 they rely on updates to the respective clk drivers to keep the
 shared header files in sync.
 
 - The Renesas r8a7796 (R-Car M3-W) platform gets added, this is an
   automotive SoC similar to the ⅹ8a7795 chip we already support, but
   the dts changes rely on a clock driver change that has been
   merged for v4.9 through the clk tree.
 
 - The Amlogic meson-gxbb (S905) platform gains support for a few
   drivers merged through our tree, in particular the network and
   usb driver changes are required and included here, and also
   the clk tree changes.
 
 - The Allwinner platforms have seen a large-scale change to their
   clk drivers and the dts file updates must come after that.
   This includes the newly added Nextthing GR8 platform, which is
   derived from sun5i/A13.
 
 - Some integrator (arm32) changes rely on clk driver changes.
 
 - A single patch for lpc32xx has no such dependency but wasn't
   added until just before the merge window
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIVAwUAV/gzeGCrR//JCVInAQKVhw/5AS5R2S7m7VTlWMvGjvH9ITudYhiAGJP1
 z5nP5SwJsfmSjfvw0kSxGUmsNS3rHutsPMz65EesKqFuC3LPZiqMUqrzxt9iqqJx
 I+XdAxDTnOE1RBZFtB9dL+qLzHQ87pMo6R9dfs32sxb3QuCQBYhcFyLmQDuZuHH0
 yeDi3ARFvgxx/qoRUA7cnSlY5RLNzM44y+Ik/ZcVr4ReqYBC2g5mGi5htoiNSLWR
 nwWR+5hNLAp44OZgkZfNsf6kB9brWDQh3PbnBjy6sKXSBoSVIfxTweh2DMJXbZ7l
 1Ck+S7WyLMhGJp448TcuBykr/l9i3uqNh061XavjwP8CAjAdZ787XlnNSztc2pyh
 dvbI/E76pLGb5ZoFdqlY2Syl63ZFN4K8mjZMSPYfYKf85EDIxe4MYwpbo7/pwzh3
 8OlBwH6r4aUMw+QgE1nx8nsjaCoGDMFdgJeJJaWdriZ6Nst2n5gREk/mzbrAWkNG
 ujChn/6hES9LuE21aCp1ipB7qnnyeRinfqz2acEFxMQxuPdjwKrdJqNsBaTWsapE
 Z+b/BFP+LTdPfHCmMSVwfMrNbwsoY7+L4EXXL36lUgOwcDp0vCXA+PiiahYASewA
 1LDQ3CURCEapdBhVU+06Kb4y5eWU7M7EqpOwpHgRJ92dVxgNxuCfcurvxzqPP1UP
 3O4R7bfUTTg=
 =OmAu
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC late DT updates from Arnd Bergmann:
 "These updates have been kept in a separate branch mostly because they
  rely on updates to the respective clk drivers to keep the shared
  header files in sync.

   - The Renesas r8a7796 (R-Car M3-W) platform gets added, this is an
     automotive SoC similar to the ⅹ8a7795 chip we already support, but
     the dts changes rely on a clock driver change that has been merged
     for v4.9 through the clk tree.

   - The Amlogic meson-gxbb (S905) platform gains support for a few
     drivers merged through our tree, in particular the network and usb
     driver changes are required and included here, and also the clk
     tree changes.

   - The Allwinner platforms have seen a large-scale change to their clk
     drivers and the dts file updates must come after that. This
     includes the newly added Nextthing GR8 platform, which is derived
     from sun5i/A13.

   - Some integrator (arm32) changes rely on clk driver changes.

   - A single patch for lpc32xx has no such dependency but wasn't added
     until just before the merge window"

* tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (99 commits)
  ARM: dts: lpc32xx: add device node for IRAM on-chip memory
  ARM: dts: sun8i: Add accelerometer to polaroid-mid2407pxe03
  ARM: dts: sun8i: enable UART1 for iNet D978 Rev2 board
  ARM: dts: sun8i: add pinmux for UART1 at PG
  dts: sun8i-h3: add I2C0-2 peripherals to H3 SOC
  dts: sun8i-h3: add pinmux definitions for I2C0-2
  dts: sun8i-h3: associate exposed UARTs on Orange Pi Boards
  dts: sun8i-h3: split off RTS/CTS for UART1 in seperate pinmux
  dts: sun8i-h3: add pinmux definitions for UART2-3
  ARM: dts: sun9i: a80-optimus: Disable EHCI1
  ARM: dts: sun9i: cubieboard4: Add AXP806 PMIC device node and regulators
  ARM: dts: sun9i: a80-optimus: Add AXP806 PMIC device node and regulators
  ARM: dts: sun9i: cubieboard4: Declare AXP809 SW regulator as unused
  ARM: dts: sun9i: a80-optimus: Declare AXP809 SW regulator as unused
  ARM: dts: sun8i: Add touchscreen node for sun8i-a33-ga10h
  ARM: dts: sun8i: Add touchscreen node for sun8i-a23-polaroid-mid2809pxe04
  ARM: dts: sun8i: Add touchscreen node for sun8i-a23-polaroid-mid2407pxe03
  ARM: dts: sun8i: Add touchscreen node for sun8i-a23-inet86dz
  ARM: dts: sun8i: Add touchscreen node for sun8i-a23-gt90h
  ARM64: dts: meson-gxbb-vega-s95: Enable USB Nodes
  ...
2016-10-07 21:34:49 -07:00
Linus Torvalds
00e729c933 ARM: DT updates for v4.9
These are as usual a very large number of mostly boring updates to
 enable devices in existing machines, or to fix minor bugs.  Notably,
 an ongoing treewide effort to fix warnings caused by an update to the
 device tree compiler. These are enabled with "make W=1" at the moment
 but can hopefully become the default once all issues have been addressed.
 
 No new SoC platform is added this time around (Armada 395 and Orion
 mv88f5181 are slight variations of existing ones), but a significant
 number of new dts files are added, which I list by platform:
 
 - Allwinner: Empire Electronix M712 and iNet d978 Rev2 tablets;
 	Orange Pi PC Plus, Orange Pi 2, Orange Pi Plus 2E,
 	Orange Pi Lite, Olimex A33-Olinuxino, and Nano Pi Neo
 	single-board computers
 
 - ARM Realview: all supported machines (ported from board files)
 
 - Broadcom: BCM958525er, BCM958522er, BCM988312hr, BCM958623hr and
 	BCM958622hr reference boards for Northstar platform;
 	Raspberry Pi Zero single-board computer
 
 - Marvell EBU: Netgear WNR854T router (ported from board file);
 	Armada 395 SoC platform and GP board
 	Armada 390 DB development board
 
 - NXP i.MX: imx7s Warp7 reference board;
 	Gateworks Ventana GW553x single-board computer,
 	Technologic Systems TS-4900 and
 	Engicam IMX6UL GEA M6UL computer-on-module,
 	Inverse Path USB armory board
 
 - Qualcomm: LG Nexus 5 Phone
 
 - Renesas: r8a7792/wheat and r7s72100/rskrza1 development boards
 
 - Rockchip: Rockchip RK3288 Fennec reference board;
 	Firefly RK3288 Reload platform
 
 - ST Microelectronics STi: B2260 (96boards) single-board computer
 
 - TI Davinci: OMAP-L138 LCDK Development kit
 
 - TI OMAP: beagleboard-x15 rev B1 single-board computer
 
 Conflicts: vendor-prefixes.txt has conflicting additions, keep all of
 them in alphabetical order.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIVAwUAV/g11mCrR//JCVInAQIWbw/9FOrBghI2bFqZkDwFE8E3QCpc9bIiETMx
 FMdHV6FAo0D6Yp4EqlWjFI0u0Kn9l4FKz0SYWAigpfT6gfeI1THC2Kl31mslvb5U
 v3QreXI4rKjZS/B1lYECee0os+fNvJcWKj3uFjb4VT1k7T6+MytjHGAQSzwxM66Q
 0Lp5HjdFGDrOXoIUx2eEZkZlVXyQ2EFocMoAsj+s/MHnA8fn1tWW08633kjTsC6y
 9Xj71joghlDKZjA56htaEQ+/6dYdxAHVlvkN7aL9di+2Sc2/ma6my70Zvs4zwtOv
 uJDhcJhjwvf3QtDuOoGhTnFtQYQWaONaGUFyEwYyy2kIwiJy0afep4JCq2o+/CZM
 VMvGXepJpVujE9mg+LwHPgaMYgBhswsJzwQ2ZESrMQcUZ624E18dG2/ei5zat4UN
 5/NvzxEoDGmfQFQUpuoZuPqhwLRauXr7I+u4aliIdtSBGeaA2T1yFT4pVgNUOxBQ
 0bMtE2QSUKyaF+xAHLTsV7yheDU0S+C7zVkLPwePK0V7vUFuBsdQiXEqXh/6MSq0
 iYVPmKwNTIHK3qMiGtm8XDugjR8Pf0tCXRqIWJMlXs75rCAsKfFW4j4XYnlO4wMy
 dP2fdoe0xA+zthR0hRHD5i8WCmISeUgtPAdFyTid1jZkMk1AzM0AqBUdAqTInvQ3
 O4JSYcjBWoo=
 =/gg/
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM DT updates from Arnd Bergmann:
 "These are as usual a very large number of mostly boring updates to
  enable devices in existing machines, or to fix minor bugs. Notably, an
  ongoing treewide effort to fix warnings caused by an update to the
  device tree compiler. These are enabled with "make W=1" at the moment
  but can hopefully become the default once all issues have been
  addressed.

  No new SoC platform is added this time around (Armada 395 and Orion
  mv88f5181 are slight variations of existing ones), but a significant
  number of new dts files are added, which I list by platform:

   - Allwinner: Empire Electronix M712 and iNet d978 Rev2 tablets,
     Orange Pi PC Plus, Orange Pi 2, Orange Pi Plus 2E, Orange Pi Lite,
     Olimex A33-Olinuxino, and Nano Pi Neo single-board computers

   - ARM Realview: all supported machines (ported from board files)

   - Broadcom: BCM958525er, BCM958522er, BCM988312hr, BCM958623hr and
     BCM958622hr reference boards for Northstar platform, Raspberry Pi
     Zero single-board computer

   - Marvell EBU: Netgear WNR854T router (ported from board file),
     Armada 395 SoC platform and GP board Armada 390 DB development
     board

   - NXP i.MX: imx7s Warp7 reference board, Gateworks Ventana GW553x
     single-board computer, Technologic Systems TS-4900 and Engicam
     IMX6UL GEA M6UL computer-on-module, Inverse Path USB armory board

   - Qualcomm: LG Nexus 5 Phone

   - Renesas: r8a7792/wheat and r7s72100/rskrza1 development boards

   - Rockchip: Rockchip RK3288 Fennec reference board, Firefly RK3288
     Reload platform

   - ST Microelectronics STi: B2260 (96boards) single-board computer

   - TI Davinci: OMAP-L138 LCDK Development kit

   - TI OMAP: beagleboard-x15 rev B1 single-board computer"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (390 commits)
  ARM: dts: sony-nsz-gs7: add missing unit name to /memory node
  ARM: dts: chromecast: add missing unit name to /memory node
  ARM: dts: berlin2q-marvell-dmp: add missing unit name to /memory node
  ARM: dts: berlin2: Add missing unit name to /soc node
  ARM: dts: berlin2cd: Add missing unit name to /soc node
  ARM: dts: berlin2q: Add missing unit name to /soc node
  ARM: dts: berlin2: Remove skeleton.dtsi inclusion
  ARM: dts: berlin2cd: Remove skeleton.dtsi inclusion
  ARM: dts: berlin2q: Remove skeleton.dtsi inclusion
  arm: dts: berlin2q: enable all wdt nodes unconditionally
  arm: dts: berlin2: enable all wdt nodes unconditionally
  ARM: dts: omap5-igep0050.dts: Use tabs for indentation
  ARM: dts: Fix igepv5 power button GPIO direction
  ARM: dts: am335x-evmsk: Add blue-and-red-wiring -property to lcdc node
  ARM: dts: am335x-evmsk: Whitespace cleanup of lcdc related nodes
  ARM: dts: am335x-evm: Add blue-and-red-wiring -property to lcdc node
  ARM: dts: s3c64xx: Use macros for pinctrl configuration
  ARM: dts: s3c2416: Use macros for pinctrl configuration
  ARM: dts: s5pv210: Use macros for pinctrl configuration
  ARM: dts: s3c64xx: Use common macros for pinctrl configuration
  ...
2016-10-07 21:29:04 -07:00
Lucas Stach
b1d51b448e clk: imx6: fix i.MX6DL clock tree to reflect reality
The current clock tree only implements the minimal set of differences
between the i.MX6Q and the i.MX6DL, but that doesn't really reflect
reality.

Apply the following fixes to match the RM:
- DL has no GPU3D_SHADER_SEL/PODF, the shader domain is clocked by
  GPU3D_CORE
- GPU3D_SHADER_SEL/PODF has been repurposed as GPU2D_CORE_SEL/PODF
- GPU2D_CORE_SEL/PODF has been repurposed as MLB_SEL/PODF

Cc: stable@vger.kernel.org
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Acked-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-09-20 16:52:37 -07:00
Kalle Kankare
377d6479d2 clk: imx53: Add clocks configuration
Add clocks configuration for CSI, FIRI and IEEE1588.

Signed-off-by: Fabien Lahoudere <fabien.lahoudere@collabora.co.uk>
Acked-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-09-20 16:52:06 -07:00
Arnd Bergmann
53570cbc18 Amlogic driver updates for v4.9, 2nd round
- media: update IR support for newer SoCs
 - firmware: add secure monitor driver
 - net: new stmmac glue driver
 - usb: udd DWC2 support for meson-gxbb
 - clocks: expose more clock IDs for use by DT
 - DT binding updates
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iQIcBAABCAAGBQJX2Z0aAAoJEFk3GJrT+8ZlkxoQAI0FJkQ371touZbMRSirMCdG
 fyx7ZZWGntw9yHCqcfVGLxy6oBk6bABWOWJzqGIBeTyn7qDoOqc4ec+pIWg7KECS
 h/yrJLGPQofI0Hm/6nzZikrjrK1h74c6bhkjRsAfqKCyq0AcEnH8cu1kAZmkwyJq
 osU1U/MhRLkIs6UZsc6H2nlsbSw8Ji4ZkSDfT/1P4SUqHgtz9k5PNYCEkPDGK23F
 1f1N3zYpqJVqAqucdLhTBsE56vSVzrAXLEsIwpaYCpEzuRO8MyjYP7SiKnky/5Za
 WAxz+hKufleqvvDqIK1zWvE/in4SyHrg9eVSHac/xbbDsUKy11RuJ2VasqT6xUOM
 r8oi0o1ot0IkMCJrA1Ogey0GqcSoyVUzy5FM+4SOz+M7IctLt7ZV0aVDmfXvG21f
 iQLZ7bPmgaj2kck95ppqc8saz0EIt32fJBaI3XvoG9PTpQeoYI7vok2k1l06kYQI
 3U6r7Zui4mj9PE2aFAEe3BpY2EbJDj8Vn+mtX4NtkCwS0PwZKkiUgZXF3H/qix3T
 +jv9yps2dLhihd4y6RcySVM3/PWuM7A8tU9oRBE+sttf2MiQzXvMPNM/GH0qOVEI
 3flZ6tsSLmj8jmFyOdqaxz8MuDo9KNi9b+AijPqWm+D0UfPPqFKnR6bvM4F496Dx
 4fG2a7JtDJUAz8e++Jtc
 =DlpW
 -----END PGP SIGNATURE-----

Merge tag 'amlogic-drivers-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/late

Pull "Amlogic driver updates for v4.9, 2nd round" from Kevin Hilman:

- media: update IR support for newer SoCs
- firmware: add secure monitor driver
- net: new stmmac glue driver
- usb: udd DWC2 support for meson-gxbb
- clocks: expose more clock IDs for use by DT
- DT binding updates

* tag 'amlogic-drivers-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: (21 commits)
  clk: gxbb: expose i2c clocks
  clk: gxbb: expose USB clocks
  clk: gxbb: expose spifc clock
  clk: gxbb: expose MPLL2 clock for use by DT
  Documentation: dt-bindings: Add documentation for the Meson USB2 PHYs
  usb: dwc2: add support for Meson8b and GXBB SoCs
  net: stmmac: update the module description of the dwmac-meson driver
  net: stmmac: add a glue driver for the Amlogic Meson 8b / GXBB DWMAC
  stmmac: introduce get_stmmac_bsp_priv() helper
  net: dt-bindings: Document the new Meson8b and GXBB DWMAC bindings
  clk: meson-gxbb: Export PWM related clocks for DT
  meson: clk: Add support for clock gates
  gxbb: clk: Adjust MESON_GATE macro to be shared with meson8b
  clk: meson: Copy meson8b CLKID defines to private header file
  meson: clk: Rename register names according to Amlogic datasheet
  meson: clk: Move register definitions to meson8b.h
  clk: meson: Rename meson8b-clkc.c to reflect gxbb naming convention
  nvmem: amlogic: Add Amlogic Meson EFUSE driver
  firmware: Amlogic: Add secure monitor driver
  media: rc: meson-ir: Add support for newer versions of the IR decoder
  ...
2016-09-19 17:49:07 +02:00
Vivek Gautam
dc19b6f5be clk: Add USB3 PHY reset lines
Adding missing reset lines for USB 3.0 PHY.

Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-09-16 16:19:50 -07:00
Jun Nie
ca0233285a clk: zx: register ZX296718 clocks
The ZX296718 clocks are statically listed and registered. More
clock will be added later.

Signed-off-by: Jun Nie <jun.nie@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-09-14 13:50:33 -07:00
Jerome Brunet
dfdd7d4af6 clk: gxbb: expose i2c clocks
I2C and AO_I2C clocks are needed for the i2c driver, expose to DT
(and comment out in clk driver)

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2016-09-14 11:24:04 -07:00
Martin Blumenstingl
5dbe7890e6 clk: gxbb: expose USB clocks
USB0_DDR_BRIDGE and USB1_DDR_BRIDGE1 are needed for the related
dwc2 usb controller. USB, USB0 and USB1 are needed for the PHYs.
Expose these clocks to DT and comment out in clk driver.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2016-09-14 11:23:55 -07:00
Jerome Brunet
f2120a8b09 clk: gxbb: expose spifc clock
SPI clock is needed for the spifc driver, expose to DT
(and comment out in the clk driver)

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2016-09-14 11:22:49 -07:00
Martin Blumenstingl
ed6f4b5180 clk: gxbb: expose MPLL2 clock for use by DT
This exposes the MPLL2 clock as this is one of the input clocks of the
ethernet controller's internal mux.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2016-09-14 11:22:49 -07:00
Stephen Boyd
de64f5c87d Allwinner Clock changes for 4.9
Four more SoCs converted to the new clock framework (A31, A31s, A23 and
 A33).
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJX1beIAAoJEBx+YmzsjxAgFNQQAIMCbooFBVbNTzSesGwGLBVl
 uRxO8FP8mPZPM0forHq6N6973no0l5H15I9w3x4T0ozkX18KwsI/dj8Q8ZiAl/S8
 gqo8rZARBBKy4rspQQazqFytSCZF+KznDigChhA1KeyG6fbob2bKdYtMRppH+l8F
 A3HpreGcqKrWv6rBEshYSt9fzFJeoi0W7Uzb0v4wQXuXuVDq/Zpp+fcu+2to/fOO
 CaI2Dh8Glcfn3gDwk7cZ94NTZud81B/zLqulcOSTV8CP1KQ/ovs6K8UvsziCCw0J
 oMD4t6kfK8BwCt1hsZTA9XjgIT0Hx1rj7wcTApa88BEea+hU0ulXiwdI1mB/x1TU
 E880Rp0KIDoldaUBggYTut/vTBWwpOP6lTRWp/EoGfs9Br9VEu1X0wzlihBdAhsQ
 IhR27GK1wp1fw0ahTFKCYNWTU5fl8iy40gGDqjpaAXnlqMEmIcEthyqdie/n83o+
 HvpUhfp9emnrXn5+y3uNeGc9M3O5BxpuyIjY4jChc5zOrrqvSAio1ifHP0TNDHEe
 ZW3TJSoqU8QfCaQTJKxVzC2LG0ZXIjwTepFtqrx5DrFOkc1M3tYod0L/80nau99v
 gVghFmaPVnS8HWmuKjlh/jXsI4AqcoESF9kv3bmecDuDc5cWIHkcI/97lsGpXIS8
 rSteIQUjRbQkwuo4TyA8
 =Ff/R
 -----END PGP SIGNATURE-----

Merge tag 'sunxi-clk-for-4.9' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into clk-next

Pull Allwinner clock driver changes from Maxime Ripard:

Four more SoCs converted to the new clock framework (A31, A31s, A23 and
A33).

* tag 'sunxi-clk-for-4.9' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
  clk: sunxi-ng: Add hardware dependency
  clk: sunxi-ng: Add A23 CCU
  clk: sunxi-ng: Add A33 CCU support
  clk: sunxi-ng: Add N-class clocks support
  clk: sunxi-ng: mux: Add mux table macro
  clk: sunxi-ng: div: Allow to set a maximum
  clk: sunxi-ng: div: Add kerneldoc for the _ccu_div structure
  clk: sunxi-ng: div: Add mux table macros
  clk: sunxi-ng: Add A31/A31s clocks
  clk: sunxi-ng: mux: Add clk notifier functions
  clk: sunxi-ng: mux: support fixed pre-dividers on multiple parents
  clk: sunxi-ng: mux: Add support for mux tables
  clk: sunxi-ng: mux: Rename mux macro to be consistent
  clk: sunxi-ng: nkm: Add mux to support multiple parents
  clk: sunxi-ng: mux: Increase fixed pre-divider div size
2016-09-14 11:10:15 -07:00
Stephen Boyd
3db385ea14 In addition to a few clean up and code consolidation patches this
includes:
 - addition of sound subsystem related clocks for Exynos5410 SoC
   (EPLL, PDMA) and support for "samsung,exynos5410-audss-clock"
   compatible in the clk-exynos-audss driver,
 - addition of DRAM controller related clocks for exynos5420,
 - MAINTAINERS update adding Chanwoo Choi as the Samsung SoC
   clock drivers co-maintainer.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABCAAGBQJX0thBAAoJEE1bIKeAnHqLjhwP/1sNlCVU30OQYAsVOG8doaL2
 tP4vQmxKWREMK+gg1iWyq6dhAWhOO/YdSL9KgvHAkCKolJfpoGfJjiPm0Pja+TOq
 pIHOdE5ql2Cb+PxeJoLQZxfcOsNczt0OorVWgeTJdDyB+/VXaGvVKYwoZFSUoQ5m
 nIPfAut5ynIVIk86EBjuSr61sUMoTEzVD7HFGAzYF78K4UPIsscfM43UWSHXqwiX
 rsxPZTzjETmtmjSPSP+m8mOY04nds0kFDWSPaP6lzmSQYC7jhGQxM7Pl4fmWBYho
 gqL1z4gcp4vHZYRHhtClOuKe1+dlXNRLRaFQSRgIFgpfX/AfQh0Hj35I7QhCmD3N
 LDNTWmiFxLVjPET0Z4NykPRzCfIcWYT4S2U2qJ857C2FG1v3DD/xiZ13UvbySTNi
 nh/Go6Jp1bbPRQMYxCcMY1a1RJ180qjsNCleC5/5w6KP0DWWJFVDcqFr3NLcmN7e
 nikD31moCKLEvPrd2Glezajv1IHD6K/c06cBcTHGBu2BobOrsBstTvjiIfDcjtC/
 uZymcsWUztPaM1iPLJ0Dzsrw2TkGcukrYm3R4kN4iRzDJK5XPh4dFUgquJOYlyNH
 PgYGBMXocMrBXNOF9lQ9mAsiO9JCfZLjXH9k2NP3w2P0YNTTSfIjBuBvySSiGK6x
 aYF0CXwKNDfJhmep+PzE
 =lEKC
 -----END PGP SIGNATURE-----

Merge tag 'clk-v4.9-samsung' of git://linuxtv.org/snawrocki/samsung into clk-next

Pull samsung clk driver updates from Sylwester Nawrocki:

In addition to a few clean up and code consolidation patches this
includes:
- addition of sound subsystem related clocks for Exynos5410 SoC
  (EPLL, PDMA) and support for "samsung,exynos5410-audss-clock"
  compatible in the clk-exynos-audss driver,
- addition of DRAM controller related clocks for exynos5420,
- MAINTAINERS update adding Chanwoo Choi as the Samsung SoC
  clock drivers co-maintainer.

* tag 'clk-v4.9-samsung' of git://linuxtv.org/snawrocki/samsung:
  clk: samsung: Add support for EPLL on exynos5410
  clk: samsung: clk-exynos-audss: Whitespace and debug trace cleanup
  clk: samsung: clk-exynos-audss: Add exynos5410 compatible
  clk: samsung: clk-exynos-audss: controller variant handling rework
  clk: samsung: Use common registration function for pll2550x
  clk: samsung: exynos5410: Expose the peripheral DMA gate clocks
  clk: samsung: exynos5420: Add clocks for CMU_CDREX domain
  clk: samsung: exynos5410: Use samsung_cmu_register_one() to simplify code
  clk: samsung: exynos5260: Move struct samsung_cmu_info to init section
  MAINTAINERS: Add myself as Samsung SoC clock drivers co-maintainer
  clk: samsung: exynos5410: Add clock IDs for PDMA and EPLL clocks
  clk: samsung: Add clock IDs for the CMU_CDREX (DRAM Express Controller)
2016-09-14 11:06:47 -07:00
Arnd Bergmann
e08644b0c7 Amlogic 64-bit DT changes for v4.9
- add watchdog, reset, IR remote, PWM
 - add secure monitor and eFuse
 - add always-on (AO) domain clock and reset
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iQIcBAABCAAGBQJXyhPZAAoJEFk3GJrT+8ZlIQkP/1Xyb2A483CPDL4JZP/BHDjd
 DXLpjTeiL7JVtfCdjRNFL1mOMEwtbhjuwklRsBaHIGGHg8TK26RJAdxzmRPtZ2fd
 U8wLrSRCdesF6bwI4j8zomm2tAD3a0Ujik21AROKZj1pWh/n9k0m+CrPgwBCZoA9
 yM1/usSP0Gm0kLWgH1mwVjGJOgf7Xi6TGHBsNyy1zl+Jj4uTf+aB6auHygemznvi
 cANjibsOFY+KvcE19/y/yGJL7nFeln9C6TE1igDh2m/e+FR0+Ng3p1qtZxb2jsnv
 TOFROdTyEjPN9tmJQxoJfjpY2PUXE1rKezGnJBVBtpCijvSVl39goDvobUajFJ67
 g5O483kwsjEqx7uOvl4WU/kFqw2HunpILSR5QuJJ15n9kxVN+tNeAjIxo/dG7wgD
 8Byeu5FGa2va6YNEkQF7UGagKIgIloG1N59OkFwLWwMem/xtd1nuiSoLlyuw82/C
 EXu9N2I9UbOA3s6sEEJBazvtk+ueHaENwIFLo5yPDOLCKmt8/ii4dV4QWzn9R7Zy
 d2NZpNjPj/eBRDC6O+MgJVAEuikjvfn9tUcuVQGjJ+pq3mtpAxzdclVHMYlKclON
 /ykQqRZPE33CDRBdp5TCbJp/UMyXyjhdhcaAaY7yYPpjkEjFEaLWTMH7wua04754
 K57RdpXb1kQG7qGAy9xF
 =UZHB
 -----END PGP SIGNATURE-----

Merge tag 'amlogic-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/late

Pull "Amlogic 64-bit DT changes for v4.9" from Kevin Hilman:

- add watchdog, reset, IR remote, PWM
- add secure monitor and eFuse
- add always-on (AO) domain clock and reset

* tag 'amlogic-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
  ARM64: dts: amlogic: gxbb: Enable NVMEM
  documentation: Add nvmem bindings documentation
  ARM64: dts: amlogic: gxbb: Enable secure monitor
  documentation: Add secure monitor bindings documentation
  ARM64: dts: meson-gxbb: Add PWM pinctrl nodes
  ARM64: dts: meson-gxbb: Enable the the IR decoder on supported boards
  ARM64: dts: meson-gxbb: Add Infrared Remote Controller decoder
  dt-bindings: media: meson-ir: Add Meson8b and GXBB compatible strings
  ARM64: dts: amlogic: add the input pin for the IR remote
  ARM64: dts: meson-gxbb: Add GXBB AO Clock and Reset node
  clk: meson: Fix invalid use of sizeof in gxbb_aoclkc_probe()
  clk: meson: Add GXBB AO Clock and Reset controller driver
  dt-bindings: clock: reset: Add GXBB AO Clock and Reset Bindings
  ARM64: DTS: meson-gxbb: switch ethernet to real clock
  ARM64: dts: amlogic: meson-gxbb: Add watchdog node
2016-09-14 17:34:35 +02:00
Maxime Ripard
d05c748bd7 clk: sunxi-ng: Add A33 CCU support
This commit introduces the clocks found in the Allwinner A33 CCU.

Since this SoC is very similar to the A23, and we share a significant share
of the DTSI, the clock IDs that are going to be used will also be shared
with the A23, hence the name of the various header files.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
2016-09-10 11:41:19 +02:00
Sylwester Nawrocki
1d9aa64c37 clk: samsung: Use common registration function for pll2550x
There is no such significant differences in pll2550x PLL type
to justify a separate registration function.  This patch adapts
exynos5440 driver to use the common function and removes
samsung_clk_register_pll2550x().

Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
2016-09-09 17:35:10 +02:00
Sylwester Nawrocki
58d6506f32 clk: samsung: exynos5410: Add clock IDs for PDMA and EPLL clocks
The PDMA{0,1} and EPLL clock IDs are added separately in this
patch so the patch can be merged to the arm-soc tree as dependency.

Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
2016-09-09 10:13:02 +02:00
Chanwoo Choi
3b6b717218 clk: samsung: Add clock IDs for the CMU_CDREX (DRAM Express Controller)
This patch adds missing clock IDs for CMU_CDREX (DRAM Express Controller)
which generates clocks for DRAM and NoC (Network on Chip) busses.

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2016-09-09 10:11:44 +02:00
Stephen Boyd
9bb87c027c The biggest addition is probably the special clock-type for ddr clock
control. While reading that clock is done the normal way from the
 registers, setting it always requires some sort of special handling
 to let the system survive this addition.
 
 As the commit message explains, there are currently 3 handling-types
 known. General SRAM-based code on rk3288 and before (which is waiting
 essentially for the PIE support that is currently being worked on),
 SCPI-based clk setting on the rk3368 through a coprocessor, which we
 might support once the support for legacy scpi-variants has matured
 and now on the rk3399 (and probably later) using a dcf controller that
 is controlled from the arm-trusted-firmware and gets accessed through
 firmware calls from the kernel. This is the variant we currently
 support, but the clock type is made to support the other variants in
 the future as well.
 
 Apart from that slightly bigger chunk, we have a mix of PLL rates,
 clock-ids and flags mainly for the rk3399.
 
 And interestingly an iomap fix for the legacy gate driver, where I
 hopefully could deter the submitter from actually using that in any
 new works.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABCAAGBQJXzrz5AAoJEPOmecmc0R2B0NMH/0SGrQnrUsaq0cvjZPaq8jTD
 nJDVIRw099HNM3QZCfy+FZbSsnmex93clX+Fn4UdehplrCZ8ExX1wpPkMwvFcPJF
 M34YyFXx5MU9OmDsJXd1UlGRD/mH0L6hKnmfBQiPbK33ObXbr7LCC1L3go+oYABN
 eHaOzO1KIcdoCQd6RlVAQHCsiDy8akUJ68P2uACHZ7VVgvGw2f3NdJhOKTD5lCuf
 WH/MRo9X9bPDGHpFJIX+mZzZgYsMqUjyF/mYU/VMoH70w+YZTnfcbrYpJ0VkgBYd
 aQF2B9VXhed9EQG3Gfu+jgsWoWLed9AJf83UP6eMsPTPLNQBqgzoDZwylbY1Szk=
 =LjDG
 -----END PGP SIGNATURE-----

Merge tag 'v4.9-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next

Pull rockchip clk driver updates from Heiko Stuebner:

The biggest addition is probably the special clock-type for ddr clock
control. While reading that clock is done the normal way from the
registers, setting it always requires some sort of special handling
to let the system survive this addition.

As the commit message explains, there are currently 3 handling-types
known. General SRAM-based code on rk3288 and before (which is waiting
essentially for the PIE support that is currently being worked on),
SCPI-based clk setting on the rk3368 through a coprocessor, which we
might support once the support for legacy scpi-variants has matured
and now on the rk3399 (and probably later) using a dcf controller that
is controlled from the arm-trusted-firmware and gets accessed through
firmware calls from the kernel. This is the variant we currently
support, but the clock type is made to support the other variants in
the future as well.

Apart from that slightly bigger chunk, we have a mix of PLL rates,
clock-ids and flags mainly for the rk3399.

And interestingly an iomap fix for the legacy gate driver, where I
hopefully could deter the submitter from actually using that in any
new works.

* tag 'v4.9-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  clk: rockchip: use the dclk_vop_frac clock ids on rk3399
  clk: rockchip: drop CLK_SET_RATE_PARENT from rk3399 fractional dividers
  clk: rockchip: add 2016M to big cpu clk rate table on rk3399
  clk: rockchip: add rk3399 ddr clock support
  clk: rockchip: add dclk_vop_frac ids for rk3399 vop
  clk: rockchip: add new clock-type for the ddrclk
  soc: rockchip: add header for ddr rate SIP interface
  clk: rockchip: add SCLK_DDRC id for rk3399 ddrc
  clk: rockchip: handle of_iomap failures in legacy clock driver
  clk: rockchip: mark rk3399 hdcp_noc and vio_noc as critical
  clk: rockchip: use general clock flag when registering pll
  clk: rockchip: delete the CLK_IGNORE_UNUSED from aclk_pcie on rk3399
  clk: rockchip: add 65MHz and 106.5MHz rates to rk3399 plls used for HDMI
2016-09-06 18:12:24 -07:00
Chris Brandt
969244f9c7 ARM: dts: r7s72100: add ethernet clock to device tree
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-05 14:32:39 +02:00
Yakir Yang
e33075db73 clk: rockchip: add dclk_vop_frac ids for rk3399 vop
Export the dclk_vop_frac out, so we can set the dclk_vop as the
child of dclk_vop_frac, and then we can start to take use of
the fractional dividers.

Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-09-04 22:15:11 +02:00
Michael Turquette
e918a18d2e Merge branch 'clk-meson-gxbb' into clk-next 2016-09-02 18:13:40 -07:00
Neil Armstrong
19a2a85d71 clk: meson-gxbb: Export PWM related clocks for DT
Add the PWM related clocks in order to be referenced as PWM source
clocks.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/1471870177-10609-1-git-send-email-narmstrong@baylibre.com
2016-09-02 16:33:30 -07:00
Alexander Müller
0f32e64b22 clk: meson: Copy meson8b CLKID defines to private header file
Only expose future CLKID constants if necessary. This patch
removes CLK_NR_CLKS from the DT bindings but leaves all previously
defined CLKIDs there to keep backward compatibility.

Signed-off-by: Alexander Müller <serveralex@gmail.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/1472319654-59048-5-git-send-email-serveralex@gmail.com
2016-09-01 17:31:52 -07:00
Michael Turquette
1bf13f4825 Merge remote-tracking branch 'clk/clk-meson-gxbb-ao' into clk-meson-gxbb 2016-09-01 17:31:33 -07:00
Lin Huang
7fbdfcd687 clk: rockchip: add SCLK_DDRC id for rk3399 ddrc
Add the needed id for the ddr clock.

Signed-off-by: Lin Huang <hl@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-08-31 18:19:03 +02:00
Chen-Yu Tsai
c6e6c96d8f clk: sunxi-ng: Add A31/A31s clocks
Add a new style driver for the clock control unit in Allwinner A31/A31s.

A few clocks are still missing:

    - MIPI PLL's HDMI mode support
    - EMAC clock

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-08-25 22:31:43 +02:00
Srinivas Kandagatla
62d157587e clk: gcc-msm8996: add missing pcie phy reset lines
This patch adds missing 2 PCIE common reset lines.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-08-25 13:02:33 -07:00
Rajendra Nayak
63bb4fd6a3 clk: qcom: gdsc: Add the missing BIMC gdsc for msm8996
Add BIMC gdsc data found in MMCC part of msm8996 family of devices.

Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-08-19 12:55:19 -07:00
Stephen Boyd
43d6912417 Merge branch 'clk-meson-gxbb-ao' into clk-next
* clk-meson-gxbb-ao:
  clk: meson: Add GXBB AO Clock and Reset controller driver
  dt-bindings: clock: reset: Add GXBB AO Clock and Reset Bindings
2016-08-19 12:51:14 -07:00
Neil Armstrong
edb89f126f dt-bindings: clock: reset: Add GXBB AO Clock and Reset Bindings
Add documentations and dt-bindings headers for the AO clock and reset
controller.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-08-19 12:49:00 -07:00
Shunli Wang
1de9b21633 clk: mediatek: Add dt-bindings for MT2701 clocks
Add MT2701 clock dt-bindings, include topckgen, apmixedsys,
infracfg, pericfg and subsystem clocks.

Signed-off-by: Shunli Wang <shunli.wang@mediatek.com>
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Signed-off-by: Erin Lo <erin.lo@mediatek.com>
Tested-by: John Crispin <blogic@openwrt.org>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-08-19 12:18:41 -07:00
Stephen Boyd
cd1e29a93c Merge branch 'clk-qcom-9615' into clk-next
* clk-qcom-9615:
  dt-bindings: clock: Update bindings for MDM9615 GCC and LCC
  clk: mdm9615: Add support for MDM9615 Clock Controllers
  dt-bindings: Add MDM9615 DT bindings include files for GCC and LCC
2016-08-15 16:08:49 -07:00
Neil Armstrong
f7508fedd8 dt-bindings: Add MDM9615 DT bindings include files for GCC and LCC
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-08-15 15:51:18 -07:00
Stephen Boyd
ddf7e5377b Merge branch 'clk-meson-gxbb' into clk-next
* clk-meson-gxbb:
  clk: gxbb: add MMC gate clocks, and expose for DT
2016-08-15 15:47:15 -07:00
Kevin Hilman
33608dcd01 clk: gxbb: add MMC gate clocks, and expose for DT
Add the SD/eMMC gate clocks and expose them for use by DT.

While at it, also explose FCLK_DIV2 since this is one of the input
clocks to the mux internal to each of the SD/eMMC blocks.

Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-08-15 15:45:57 -07:00
Laxman Dewangan
e581245d8a clk: max77686: Add DT binding details for PMIC MAX77620
Maxim has used the same clock IP on multiple PMICs like MAX77686,
MAX77802, MAX77620. Only differences are the number of clocks
from these PMICs like MAX77686 has 3 clocks output, MAX776802 have
two clock output and MAX77620 has one clock output.

Add clock binding details and DT example for the MAX77620.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
CC: Krzysztof Kozlowski <k.kozlowski@samsung.com>
CC: Javier Martinez Canillas <javier@dowhile0.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-08-15 15:33:14 -07:00
Sergei Shtylyov
975fb77f87 ARM: dts: r8a7794: add MSTP10 clocks
Add MSTP10 clocks to the R8A7794 device tree.

This patch is based on the commit ee9141522d ("ARM: shmobile: r8a7791:
add MSTP10 support on DTSI").

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-08-09 14:37:05 +02:00
Sergei Shtylyov
2a29f9d6fe ARM: dts: r8a7794: add MSTP5 clocks
Add some MSTP5 clocks to the R8A7794 device tree.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-08-09 14:36:56 +02:00
Linus Torvalds
043248cd4e ARM: DT updates for v4.8
Device tree contents continue to be the largest branches we submit. This
 time around, some of the contents worth pointing out is:
 
 - New SoC platforms:
   - Freescale i.MX 7Solo
   - Broadcom BCM23550
   - Cirrus Logic EP7209 and EP7211 (clps711x platforms)_
   - Hisilicon HI3519
   - Renesas R8A7792
 
 Some of the other delta that is sticking out, line-count wise:
  - Exynos moves of IP blocks under an SoC bus, which causes a large delta due
    to indentation changes
  - A new Tegra K1 board: Apalis
  - A bunch of small updates to many Allwinner platforms; new hardware support,
    some cleanup, etc.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJXnnckAAoJEIwa5zzehBx3Ss0P/1hp+n8DMuNCHReof8u2D3xf
 pi9t5vNzfODMq/YrDT3bzQ3txoEZISt+ztEFku26BUywCZbeIEx+XLPewVEj0ODc
 tpWKmW2xNZDIwn2eHRrBD5Y8gJugAnwgwBh9SqfcM8Wtdt2qc7edBvcxLhsiCTuV
 pKPxPoJkan/BMR3vBMfoLIx/+aDcZJgpzUkRRuyLod17JdQ0tnMECu5UPrk6Yun8
 IjDcJTcwZlpZ9gvtBhxyGUENOPtmGH2ZvZuBPisr7Mwih4mDNJJ/9YrnsdfdYWaf
 WAysPGXYMfQy9jMiAC1cBm+jeIPvbIeZpYRzPt3vlFKAHpAZG1sp+r7SLfrT9e7x
 7La/QPNVLMsKTjGMW82/qRzOXBed3htk9v2YPIHQubFIOOz2mXqwSPXCqUHuYKeU
 eqzedvm0FGoeJbYTzpYyRAWU9OQtazOR+WAI8PrZiN4tdaxvYT2F5JJCMztYIoeq
 SJdPUbWTsYxkc/Kj1FagW0LOydO40Aif53JbfrabnzcRYlWsxqQfaSsP8J8G4QDq
 zXZvbt0IMan2B52X7AysDF8Zq4Ti8dVijvA7XNl7b5HFBrRpbOt9Tdhl/4zRiW14
 Y16VswnIR+9qPhtSXiSkdOwB/0cAI6XEiBTgRunYccakGDUfLOEpIVqJJ1zGNHpl
 hqJum3pAMW8i5JX8vl8J
 =C4NU
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM DT updates from Olof Johansson:
 "Device tree contents continue to be the largest branches we submit.
  This time around, some of the contents worth pointing out is:

  New SoC platforms:
   - Freescale i.MX 7Solo
   - Broadcom BCM23550
   - Cirrus Logic EP7209 and EP7211 (clps711x platforms)_
   - Hisilicon HI3519
   - Renesas R8A7792

  Some of the other delta that is sticking out, line-count wise:
   - Exynos moves of IP blocks under an SoC bus, which causes a large
     delta due to indentation changes
   - a new Tegra K1 board: Apalis
   - a bunch of small updates to many Allwinner platforms; new hardware
     support, some cleanup, etc"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (426 commits)
  ARM: dts: sun8i: Add dts file for inet86dz board
  ARM: dts: sun8i: Add dts file for Polaroid MID2407PXE03 tablet
  ARM: dts: sun8i: Use sun8i-reference-design-tablet for ga10h dts
  ARM: dts: sun8i: Use sun8i-reference-design-tablet for polaroid mid2809pxe04
  ARM: dts: sun8i: reference-design-tablet: Add drivevbus-supply
  ARM: dts: Copy sun8i-q8-common.dtsi sun8i-reference-design-tablet.dtsi
  ARM: dts: sun5i: Use sun5i-reference-design-tablet.dtsi for utoo p66 dts
  ARM: dts: sun5i: Use sun5i-reference-design-tablet.dtsi for dit4350 dts
  ARM: dts: sun5i: reference-design-tablet: Remove mention of q8
  ARM: dts: sun5i: reference-design-tablet: Set lradc vref to avcc
  ARM: dts: sun5i: Rename sun5i-q8-common.dtsi sun5i-reference-design-tablet.dtsi
  ARM: dts: sun5i: Move q8 display bits to sun5i-a13-q8-tablet.dts
  ARM: dts: sunxi: Rename sunxi-q8-common.dtsi sunxi-reference-design-tablet.dtsi
  ARM: dts: at91: Don't build unnecessary dtbs
  ARM: dts: at91: sama5d3x: separate motherboard gmac and emac definitions
  ARM: dts: at91: at91sam9g25ek: fix isi endpoint node
  ARM: dts: at91: move isi definition to at91sam9g25ek
  ARM: dts: at91: fix i2c-gpio node name
  ARM: dts: at91: vinco: fix regulator name
  ARM: dts: at91: ariag25 : fix onewire node
  ...
2016-08-01 18:37:45 -04:00
Arnd Bergmann
d95eabc7b8 Renesas ARM Based SoC DT Fixes for v4.8
* Corrections to r8a7792
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJXjDuJAAoJENfPZGlqN0++zTwP/izl3NeRBX9cz+sTDYKb9lB5
 w2OMwUE7p4aC5iFej7CmLLvhgtpC/6RJiD61F6LqHJF3GG5CJrzXo69EYrnU13R2
 4oIEZLdnWawAbAIhzKHvypgXw+6el4X3NSX29yZziVkObWxDczCYKQBNYOhzwRQd
 itoJk6oYOwgUUCkbDY9CfPyym0rHtQ/CXPxL49MZgiKX0Qkq0QyCeT4OC3XGbyu2
 1oJfBDew3i7OQnd+RirmMlVZpHBaDgIKehaUTd1ZNJomAxBuaISpdfmiliU46VcB
 6+LXBTM0LRqIvZTsdEEWd4hvMTC5A4MPb3zTel1lUeucfQrkfKIMfijBt/nNokkG
 vpGQBdCM9FuSXKylAcToFKLKi6AMaXy2dUTi8/fQcNE59VHghrB3eLHPJDRbxkCm
 2CVQ2Kjtjm+Egd+ElYsCkFXtiRqR1xFMIM2HFfGq50GFpR9KF3vwelgSgnQbO9ei
 g9qjNAuoIEJR2o+kj6XKTjGU9qRNC6DoxZLIsg32cUP8E95wU9xWfQaHbWEGUdhh
 kEQkwvVrHsLM6b3ElAj/U7cwK7AI5nDnNucOwbBM6f9XoAeVbgrTy2cz4wDfmfoR
 5lNTuyrLCv0cu0SPOHXgqPti6bxPnzYF7G/Xnm9WbJeJYnA0q2VK+4jl8ItjjgoA
 /0nNwVDhCUVCzX95Vw5g
 =BHVI
 -----END PGP SIGNATURE-----

Merge tag 'renesas-dt-fixes-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt

Merge "Renesas ARM Based SoC DT Fixes for v4.8" from Simon Horman:

* Corrections to r8a7792

* tag 'renesas-dt-fixes-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: dts: r8a7792: remove ADSP clock
  ARM: dts: r8a7792: add PLL1 divided by 2 clock
2016-07-21 14:40:28 +02:00
Michael Turquette
149f9e734f Merge branch 'clk-s905' into clk-next 2016-07-15 19:15:40 -07:00
Michael Turquette
ca1d2e269f Revert "clk: gxbb: expose CLKID_MMC_PCLK"
This reverts commit e16fb2e635.

Updated documentation from the chip vendor reveals that this clock is
not required for correct operation of the MMC controller. As such, do
not expose it to DT.

Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2016-07-15 19:15:12 -07:00
Sergei Shtylyov
e0c3f92a08 ARM: dts: r8a7792: remove ADSP clock
Simon Horman told me that R8A7792 has ADSP clock based on an incorrect
table in the most recent R-Car gen2 manual. But when I received that manual
I discovered that this is false: R8A7792 is the only Gen 2 SoC that doesn't
have ADSP at all.  Accordingly remove the ADSP clock from DT for the
r8a7792.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-07-15 13:22:45 +09:00
Arnd Bergmann
cda1c2bdf6 Merge tag 'sti-late-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti into next/late
Merge "STi late updates for v4.8" from 	Patrice Chotard:

- Add STi DT critical clocks declaration
- Remove SPI hack wich has dependecy with critical clocks

These 2 STi DT patches and SPI hack MUST be applied after patches
contained into Stephen Boyd's branch clk-next/clk-st-critical.
This to ensure not to break SPI.

* tag 'sti-late-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti:
  spi: st-ssc4: Remove 'no clocking' hack
  ARM: sti: stih410-clocks: Identify critical clocks
  ARM: sti: stih407-family: Supply defines for CLOCKGEN A0
  clk: st: clkgen-pll: Detect critical clocks
  clk: st: clkgen-fsyn: Detect critical clocks
  clk: st: clk-flexgen: Detect critical clocks
2016-07-14 17:38:54 +02:00
Lee Jones
6cb4f8dd10 ARM: sti: stih407-family: Supply defines for CLOCKGEN A0
There are 2 LMI clocks generated by CLOCKGEN A0.  We wish to control
them individually and need to use these indexes to do so.

Signed-off-by: Lee Jones <lee.jones@linaro.org>
2016-07-12 13:22:43 +02:00
Michael Turquette
7adb769561 Merge branch 'clk-sunxi-ng' into clk-next 2016-07-08 18:08:56 -07:00
Maxime Ripard
0577e4853b clk: sunxi-ng: Add H3 clocks
Add the list of clocks and resets found in the H3 CCU.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/20160629190535.11855-14-maxime.ripard@free-electrons.com
2016-07-08 18:05:12 -07:00
Michael Turquette
a0fc8c4f4c Merge branch 'clk-s905' into clk-next 2016-07-07 20:06:30 -07:00
Kevin Hilman
e16fb2e635 clk: gxbb: expose CLKID_MMC_PCLK
The MMC_PCLK is needed for the SD/eMMC driver, expose to DT (and comment
out in clk driver)

Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/20160707033837.20029-1-khilman@baylibre.com
2016-07-07 20:05:59 -07:00
Olof Johansson
a7f856d6ad Audio support and spi-flash on rk3288-veyron Chromedevices
as well as i2s and ethernet support on rk3228/rk3229 devices
 and a dts file for the rk3229 eval board.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABCAAGBQJXdbKVAAoJEPOmecmc0R2B4t8H/3J/l3fXyAskseN12883GkgO
 WxEaCe4LeLbxp9Lcd3jmhXM4WZKPbfngYdLvL6kNh/LZeZT3naa2B55ot0FiIOHQ
 PVvAC9ce7T0wTeK/aC2iFU6two6ZMbk8jSRfpfpijHIwK9U1NQcXTssuzvHR+S/L
 +QP29M2TP3Y9UrPydx8kpCeH0kav2WmdqNmRdpQ9hokCqAiR2jbXi2N4PNtVl9v9
 Vy/s+kFa8RSLzWTUICalwrMzS7j/VyeFKq61NPPjVdfS0Q+poCcdaDw5ZPEtZYBu
 eerD1hTou+z7MPz6F5SM3J5U9G8NEp0NO4b3C0eWvAuA9cMv0smJFfqVD4erp40=
 =wEmr
 -----END PGP SIGNATURE-----

Merge tag 'v4.8-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt

Audio support and spi-flash on rk3288-veyron Chromedevices
as well as i2s and ethernet support on rk3228/rk3229 devices
and a dts file for the rk3229 eval board.

* tag 'v4.8-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  ARM: dts: rockchip: add support rk3229 evb board
  ARM: dts: rockchip: add GMAC nodes for RK322x SoCs
  ARM: dts: rockchip: add i2s nodes for RK322x SoCs
  ARM: dts: rockchip: rename rk3228.dtsi to rk322x.dtsi
  clk: rockchip: add clock-ids for rk3228 MAC clocks
  clk: rockchip: add clock-ids for rk3228 audio clocks
  ARM: dts: rockchip: rename i2s model for Veyron devices
  ARM: dts: rockchip: move rk3288 io-domain nodes to the grf
  ARM: dts: rockchip: Enable analog audio on rk3288-veyron chromebooks
  ARM: dts: rockchip: Add shared file for audio on rk3288-veyron boards
  ARM: dts: rockchip: add SPI flash node for rk3288-veyron

Signed-off-by: Olof Johansson <olof@lixom.net>
2016-07-06 22:22:19 -07:00
Olof Johansson
5fd70b1b17 Second Round of Renesas ARM Based SoC DT Updates for v4.8
* Use APMU on R-Car Gen2 and provide SMP for r8a7793 SoC
 * Update console parameters to uniformly use chosen/stdout-path,
   serial0, not provide kernel unnecessary command line parameters
 * Add DU pins to silk board
 * Add support for blanche/r8a7792
 * Name pfc subnodes after device name
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJXdSEnAAoJENfPZGlqN0++T0kP/jc/xLIytIA61qGuaTALFFaz
 h5d3b5gxww8jaQSPsTiaNueQLUCGWdimDp9Jl7r2CduZ633B62l9awobY5E5mx9X
 tPL90nZM1wuuKGwcwDl2LDKUJ/jUbUDb6MN+YIGHhp8qTOa75GxHpGhhdYQH8Uzs
 MlxWkWqucmTMsSQs9USX5/XloQwzZVSbplvS6wHjS4HoaBToB9lQS8qcjX8DGx+j
 OrndwruYx9B5cYA0Fp7xcae/YKiyfyhMdDX2iRKpIAfpheO9/Km7HFES2dY57Xw5
 DN4U4g/iDrdcIBfh6VR6MtfGh+JprOyoelFloh3hKtTL7Pu6bkN4ZnPlN5z6W3Ej
 jFrjgUrf9TSGQaAUaOdzTAjSPRCj63Z3xy8twNn0De0D7dk+AjTQbbdtGR6afAUR
 20i6+8ktB08vZHwoB3DxC5xnDOwugceHLHrR9lbPx+s2eXYQpEze6UNgr5/2r6eo
 HCa1NeFk60F1gJHGvKBbCoFSgP+6QYALt7p5KJ4xfKh/ta08DKz6d3b93KbcXaWM
 NAzrFT0yWdWMHspvsKdTfMA2xyUquWFDzj6URGZ1q84vGJqrXAoZ7XaEl/DKnhdk
 H8+qwSR4Y8jL7MSzGwesaQIrUF9CjYt47+nvAERvJYjZsFHHbq7TuRslTicTgleT
 Bl6Kaqg/1nFH0Xu/9NOD
 =gmxg
 -----END PGP SIGNATURE-----

Merge tag 'renesas-dt2-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt

Second Round of Renesas ARM Based SoC DT Updates for v4.8

* Use APMU on R-Car Gen2 and provide SMP for r8a7793 SoC
* Update console parameters to uniformly use chosen/stdout-path,
  serial0, not provide kernel unnecessary command line parameters
* Add DU pins to silk board
* Add support for blanche/r8a7792
* Name pfc subnodes after device name

* tag 'renesas-dt2-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (41 commits)
  ARM: dts: r8a7792: add SMP support
  ARM: dts: r8a7793: Add APMU node and second CPU core
  ARM: dts: r8a7791: Add APMU node
  ARM: dts: r8a7790: Add APMU nodes
  devicetree: bindings: Renesas APMU and SMP Enable method
  ARM: dts: kzm9g: Update console parameters
  ARM: dts: kzm9d: Update console parameters
  ARM: dts: marzen: Add serial port config to chosen/stdout-path
  ARM: dts: genmai: Update console parameters
  ARM: dts: armadillo800eva: Update console parameters
  ARM: dts: r8a7792: add JPU support
  ARM: dts: r8a7792: add JPU clocks
  ARM: dts: silk: add DU pins
  ARM: dts: blanche: add Ethernet support
  ARM: dts: blanche: initial device tree
  ARM: dts: blanche: document Blanche board
  ARM: dts: r8a7792: add IRQC support
  ARM: dts: r8a7792: add [H]SCIF support
  ARM: dts: r8a7792: add SYS-DMAC support
  ARM: dts: r8a7792: initial SoC device tree
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2016-07-06 22:11:20 -07:00
Michael Turquette
b24faef9a3 Merge branch 'clk-lpc32xx' into clk-next 2016-07-06 17:51:42 -07:00
Sylvain Lemieux
054e273008 clk: lpc32xx: allow peripheral clock selection in device tree
This patch add the support to select the peripheral clock (PERIPH)
as a parent clock source using the "assigned-clock-parents"
parameter in the device tree.

Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com>
Acked-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/1464982475-24738-1-git-send-email-slemieux.tyco@gmail.com
2016-07-06 17:51:14 -07:00
Stephen Boyd
582e2405b2 Placeholder for the rk3399 watchdog pclk, some newly exported
rk3228 clockids and a small fix for the not yet used spdif to
 displayport clock on the rk3399.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABCAAGBQJXdbFVAAoJEPOmecmc0R2B2fEH/1Gm80XZsrXPrr0kZ2cO8Zcg
 qUpOPJgZvEWJdG1EGzU34VAEAZP0y8sth46iypL+TP3UVf6Z9acZF2eeAbEvzdVY
 pM6qb0eNLdrcV+aaKhAScxjEwg5kdLxc/kuwOr9XsZwE4Wqvsbmldw5O8qEU8DAP
 fxdhi854hlanCVmTCfdjEpeRqv9JCejU27KttldqBC/0CwGaQwp0cUcp6Ggpv9pF
 deHR5BGj2cwnPR2JmNsZ9U85kgf9/7jd4PD4UXNRG/ApuwpIb0/1ulr4YquqAcDW
 OpdO6at9QmZItYS6byKNoAPKWoGXjmHYnjlENODQsCXoa6K8HkmDnxBtli6Iczw=
 =6ikd
 -----END PGP SIGNATURE-----

Merge tag 'v4.8-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next

Pull rockchip clk driver updates from Heiko Stuebner:

Placeholder for the rk3399 watchdog pclk, some newly exported
rk3228 clockids and a small fix for the not yet used spdif to
displayport clock on the rk3399.

* tag 'v4.8-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  clk: rockchip: fix incorrect rk3399 spdif-DPTX divider bits
  clk: rockchip: export rk3228 MAC clocks
  clk: rockchip: rename rk3228 sclk_macphy_50m to sclk_mac_extclk
  clk: rockchip: export rk3228 audio clocks
  clk: rockchip: include rk3228 downstream muxes into fractional dividers
  clk: rockchip: fix incorrect rk3228 clock registers
  clk: rockchip: add clock-ids for rk3228 MAC clocks
  clk: rockchip: add clock-ids for rk3228 audio clocks
  clk: rockchip: add a dummy clock for the watchdog pclk on rk3399
2016-07-01 17:30:42 -07:00
Stephen Boyd
345c42964c clk: tegra: Changes for v4.8-rc1
Fixes and enhancements mostly for Tegra210 clocks that allow DSI and
 HDMI to work on Tegra X1. There's also a refactoring, including fixes,
 the USB PLL.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iQIcBAABCAAGBQJXdn0rAAoJEN0jrNd/PrOhcOAQAIvunWSUKIuYzyOnDfUMqWig
 bZ1tZYg2kgQQojYTFkKqWRim//Lj3BwfYxGz6ZsswqQB2NsciiBF+yK3RUmhabik
 CwBwHmDxtQFAhyQ/saJlwWNpokym02X3zNQ5s8R6NJLlnbKVZy8k0MrpBgg7t6yH
 LHcojKnqBxD5XxKtEojJl5bJbizH4uLxSr6oivFD5eUoiKvFP/oLIYVRBdZ6wXcP
 cumO/e82vIdEkouGWeK/+LPz3G92FKRYtfI6qv6I7Tluv3G1S7JGWQ9sYcYWbxnU
 6Y+QMuXVcAe1yf0LKRDR2vOVTxBq1/YBMJEV403TK1dM0tp1I8AK7UtkURNmI8yx
 xXOSPvG6buhbCI/uUy6U86nTXDnwsqWfEdXGFQXt1xwlUKOtRITrQA09khXj5+Dj
 IrhdDSyKXUO5sMCalT+AxPko+lyvxhOLOXQrJwMB6jg8IZfgksi2opdKcBnhhE8P
 b4WyJnXN2fKB8/y7CW6sqQ69+T5Djj1c3m5uDx1384HkWUdamRLaNWlITof/NvNm
 0O5s6mtzml0/oKckH+ROFIq3TNt4NeOOM9M5K7oekEVd5VDk4YrnqIilK9MRXkBi
 XlmZ1VDhXxlfQWBlFhE8mZ6pDegkgGmijtu8YBBghWyUZDEu3bJyATppX/LjANZV
 ooLDGoSXV+Lv9TEnUh5A
 =MxTG
 -----END PGP SIGNATURE-----

Merge tag 'tegra-for-4.8-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into clk-next

Pull tegra clk driver updates from Thierry Reding:

Fixes and enhancements mostly for Tegra210 clocks that allow DSI and
HDMI to work on Tegra X1. There's also a refactoring, including fixes,
the USB PLL.

* tag 'tegra-for-4.8-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  clk: tegra: Initialize UTMI PLL when enabling PLLU
  clk: tegra: Micro-optimize Tegra210 clock setup
  clk: tegra: Make sor_safe the parent of dpaux and dpaux1
  clk: tegra: Mark timer clock as critical
  clk: tegra: Enable sor1 and sor1_src on Tegra210
  clk: tegra: Squash sor1 safe/brick/src into a single mux
  clk: tegra: Disable spread spectrum on pll_d2
  clk: tegra: Fixup post dividers on Tegra210
2016-07-01 17:27:14 -07:00
Stephen Boyd
a31bb03263 Merge branch 'clk-hi6220-rtc' into clk-next
* clk-hi6220-rtc:
  clk: hi6220: Add RTC clock for pl031
2016-06-30 12:14:50 -07:00
Zhangfei Gao
6fb924dc9c clk: hi6220: Add RTC clock for pl031
Adds clk support for the pl031 RTC on hi6220

Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Wei Xu <xuwei5@hisilicon.com>
Cc: Guodong Xu <guodong.xu@linaro.org>
Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
[jstultz: Forward ported, tweaked commit description]
Signed-off-by: John Stultz <john.stultz@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-06-30 12:11:49 -07:00
Stephen Boyd
b1683d3744 clk: renesas: Add support for R-Car M3-W
Add initial support for the Clock Pulse Generator and Module Standby and
 Software Reset modules on the Renesas R-Car M3-W SoC:
   - Basic core clocks,
   - SCIF2 (console) module clock,
   - INTC-AP (GIC) module clock.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJXVUsJAAoJEEgEtLw/Ve779JMP/RBe2xa/etV3aCS2HKaknfnN
 oAbnnUkp1MuWjqXltfBidsMlqjBqtBWR/UAi0fBl1rhuT8oGgRiNqqJgUW8aZq0O
 f/HVl+aBM+cN+GLWkBXkvw/EbOVcyGgcCfoGyUJmZweVH0C991Nh+yX9va/H6Fh5
 bjZ5+/Ie7K59ePRzARzgjHtF4kMKS5hrlCKyqX5MtRWaDcCRJ+r9YuYo1olu+d8d
 37BIxLQ/i/js/so7sw6cAD8wttN+NW6d9KWL7ArG86rWLxDrhGE1nm1VH3p1mGzZ
 o3XZnybC5ULQv+iZLfCQDRPvvouhHKNaaO2uJkwvq293cC4Y3Nlll6W4637J4vgQ
 JvXugsPbpuIFlS0hToKVU3+fGdxlWIsqvjvPo5ZBmA42ByOcaVAKsyqVZ1gw8o0q
 1u9pRX3HEGILf5G2N5qJ6DsjVQBPYwZZ6PkywwMUdF3uE6A+yIPDclc74Fo7HXUO
 0yvh2keJcpn+Eyo1oPNR88cP6SY51PF2ZNscHGMO4ZTrFZ51fOe8FmynSvuZk9RY
 CislZFuRpnhdcrRPV9FjeJnJIzlEL4277c8OonzAndhqao/MJNHrZGewbEa8vEfG
 0FLzsqG5yaWy1hkp2Vd9AVUZjzrKu2p0Kl2iwfJz8bMEANQ6D3hbWVHfgLfnSYE6
 pAZMOQYAmci5md6VERuR
 =5UWd
 -----END PGP SIGNATURE-----

Merge tag 'clk-renesas-for-v4.8-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-next

Pull support for Renesas R-car M3-W from Geert Uytterhoeven:

Add initial support for the Clock Pulse Generator and Module Standby and
Software Reset modules on the Renesas R-Car M3-W SoC:
  - Basic core clocks,
  - SCIF2 (console) module clock,
  - INTC-AP (GIC) module clock.

* tag 'clk-renesas-for-v4.8-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
  clk: renesas: cpg-mssr: Add support for R-Car M3-W
  clk: renesas: cpg-mssr: Extract common R-Car Gen3 support code
  clk: renesas: Add r8a7796 CPG Core Clock Definitions
  clk: renesas: cpg-mssr: Document r8a7796 support
2016-06-28 16:36:34 -07:00
Sergei Shtylyov
eebc8e2c5b ARM: dts: r8a7792: add JPU clocks
Add JPU clock and its parent, M2 clock to the R8A7792 device tree.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-06-24 11:04:35 +09:00
Michael Turquette
367b30502d Merge remote-tracking branch 'clk/clk-s905' into clk-next 2016-06-22 18:20:12 -07:00
Michael Turquette
738f66d321 clk: gxbb: add AmLogic GXBB clk controller driver
The gxbb clock controller is the primary clock generation unit for the
AmLogic GXBB SoC. It is clocked by a fixed 24MHz xtal, contains several
PLLs and the usual post-dividers, muxes, dividers and leaf gates that
are fed into various IP blocks in the SoC.

Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2016-06-22 18:07:31 -07:00
Michael Turquette
c0daa3e6f5 clk: meson8b: clean up composite clocks
Remove the composite clock registration function and helpers. Replace
unnecessary configuration struct with static initialization of the
desired clock type.

To preserve git bisect this patch also flips the switch and starts using
of_clk_add_hw_provider instead of the deprecated meson_clk_register_clks
method. As a byproduct clk.c can be deleted.

Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2016-06-22 18:02:44 -07:00
Xing Zheng
9ff59360b8 clk: rockchip: add clock-ids for rk3228 MAC clocks
This patch exports related MAC clocks for dts reference.

Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-06-22 00:29:27 +02:00
Xing Zheng
5f6d71044f clk: rockchip: add clock-ids for rk3228 audio clocks
This patch exports related i2s/spdif clocks for dts reference.

Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-06-22 00:20:35 +02:00
Thierry Reding
e452b818db clk: tegra: Enable sor1 and sor1_src on Tegra210
Make the sor1 and sor1_src clocks available on Tegra210. They will be
used by the display driver to support HDMI and DP.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-06-17 17:24:10 +02:00
Sergei Shtylyov
de0fae60b3 ARM: dts: r8a7792: add clock index macros
Add macros usable by the device tree sources to reference the R8A7792
clocks  by index.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-06-16 09:25:13 +09:00
Olof Johansson
057b670df0 Renesas ARM Based SoC DT Updates for v4.8
* Fix W=1 dtc warnings
 * Reverence both DMA controllers on R-Car Gen 2 SoCs
 * Remove nonexistent thermal sensor clock from r8a7794 SoC
 * Correct unit names for cpu nodes on r8a7790 SoC
 * Add MMCIF0 to r8a7793 SoC
 * RTS/CTS hardware flow control for kzm9g and bockw boards
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJXV2oXAAoJENfPZGlqN0++ZFkP/2UYbeKnX5x/VPxk9pCMaurA
 3sfGMJ8ocfmAZP45a5DJQPo4gXSVr/jdsl2p8ZCCEVe2TMaotqbHpcF3YW6k25YW
 ZO/7PQCIj9aePy7J70+wNLnEdUNkyNniBPdF2PBbkhulE2rG7xRLh6kQHDBn5WaQ
 4FPwtBQhrhkGql+2TuSOUrQuQv6KnyjDr7gBTdAtAvRV2qpLoCo1ezFfEi5VhNZx
 WMHJs+Yjv1/jVyUf4MwVKgx/3tvhihLWM0UnQpdUpvoWQzPyq1bRGVLuqJek+fsY
 XqSv06j/Kd7f7n0XANGc8I5xQYDe2TLL/hl2KsaQVmaowtzk++xEH8kwfPD78fEo
 ob5wb+pSxXNwunFx/yM7ZdTgm6cThWW3apiePHEX/Y9wfGHv8hFQk6tzdAxD4f9e
 QplHyrxz+hzCLThjkALkv27VL5oAXTwga7IWxXzQ7CT8clUYKKsu2VK5g91PpaTc
 2rBRXgzR6HA0Qc0CZY40BE9gHn40VWv0lkAJHvAqsyXn2HCpl5YNQ+2t9GcN7j/w
 8sow9y/bPGqktXHODpLEqpQKAT0H5cWuC3ZBTnVm/tENlXtPW3MQfKwc/rSQ7kIQ
 zpP+18LfdQKlIVLwqM6qCEBjIfwAJsSsbZt4ZZPNkEdc7wEkR87BmDoiyAu3bNFp
 CPw33BEValbz0WDtoGo+
 =MXJf
 -----END PGP SIGNATURE-----

Merge tag 'renesas-dt-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt

Renesas ARM Based SoC DT Updates for v4.8

* Fix W=1 dtc warnings
* Reverence both DMA controllers on R-Car Gen 2 SoCs
* Remove nonexistent thermal sensor clock from r8a7794 SoC
* Correct unit names for cpu nodes on r8a7790 SoC
* Add MMCIF0 to r8a7793 SoC
* RTS/CTS hardware flow control for kzm9g and bockw boards

* tag 'renesas-dt-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (30 commits)
  ARM: dts: silk: Fix W=1 dtc warnings
  ARM: dts: porter: Fix W=1 dtc warnings
  ARM: dts: marzen: Fix W=1 dtc warnings
  ARM: dts: lager: Fix W=1 dtc warnings
  ARM: dts: kzm9g: Fix W=1 dtc warnings
  ARM: dts: kzm9d: Fix W=1 dtc warnings
  ARM: dts: koelsch: Fix W=1 dtc warnings
  ARM: dts: gose: Fix W=1 dtc warnings
  ARM: dts: genmai: Fix W=1 dtc warnings
  ARM: dts: bockw: Fix W=1 dtc warnings
  ARM: dts: armadillo800eva: Fix W=1 dtc warnings
  ARM: dts: ape6evm: Fix W=1 dtc warnings
  ARM: dts: sh73a0: Fix W=1 dtc warnings
  ARM: dts: r8a7794: Fix W=1 dtc warnings
  ARM: dts: r8a7793: Fix W=1 dtc warnings
  ARM: dts: r8a7791: Fix W=1 dtc warnings
  ARM: dts: r8a7790: Fix W=1 dtc warnings
  ARM: dts: r8a7778: Fix W=1 dtc warnings
  ARM: dts: r8a7740: Fix W=1 dtc warnings
  ARM: dts: r8a73a4: Fix W=1 dtc warnings
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2016-06-13 15:37:25 -07:00
Jaehoon Chung
0e45044706 clk: samsung: exynos5433: Add CLK_IGNORE_UNUSED flag to PCIE device
This patch adds the CLK_IGNORE_UNUSED flag for PCI Express's clocks
which need to remain enabled. The 'pcie' gate clock definition is
also added.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
[s.nawrocki@samsung.com: edited the patch's summary]
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2016-06-10 12:15:30 +02:00
Geert Uytterhoeven
972610fb23 clk: renesas: Add r8a7796 CPG Core Clock Definitions
Add all R-Car M3-W Clock Pulse Generator Core Clock Outputs, as listed
in Table 8.2b ("List of Clocks [R-Car M3-W]") of the R-Car Gen3
datasheet (rev. 0.51 + Errata for Rev051 Mar 31 2016).

Note that internal CPG clocks (S0, S1, S2, S3, SDSRC, and SSPSRC) are
not included, as they are used as internal clock sources only, and never
referenced from DT.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Simon Horman <horms+renesas@verge.net.au>
2016-06-06 11:58:27 +02:00
Krzysztof Kozlowski
4528dd8ed4 dt-bindings: clock: Add watchdog and SSS clock IDs to Exynos5410
Add IDs for watchdog and Security SubSystem to Exynos5410.  Use the same
number as for Exynos5420 just in case in future these drivers were
merged.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2016-06-02 11:17:55 +02:00
Krzysztof Kozlowski
109869f522 dt-bindings: clock: Add TMU clock ID to Exynos5410
Add ID for TMU clock to Exynos5410. Use the same number as for
Exynos5420 just in case in future these drivers were merged.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2016-06-01 11:38:56 +02:00
Krzysztof Kozlowski
ed1e1505db dt-bindings: clock: Add I2C, HSI2C and RTC clock IDs to Exynos5410
Add IDs for I2C, USI (HSI2C) and RTC clocks to Exynos5410. Use the same
number as for Exynos5420 just in case in future these drivers are merged.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2016-05-30 16:00:11 +02:00
Krzysztof Kozlowski
5cd3535a27 dt-bindings: clock: Add PWM and USB clock IDs to Exynos5410
Add IDs for PWM and USB clocks to Exynos5410. Use the same number as for
Exynos5420 just in case in future these drivers were merged.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2016-05-30 16:00:02 +02:00
Krzysztof Kozlowski
4c5773f9f5 dt-bindings: clock: Add license and reformat Exynos5410 clock IDs
Add license and copyrights (file introduced in 2014) to header with
Exynos5410 clock IDs. Additionally reformat it to improve readability.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2016-05-30 15:59:06 +02:00
Geert Uytterhoeven
79c530ed4d ARM: dts: r8a7794: Remove nonexistent thermal sensor clock
According to the latest information, there is no thermal IP block
present on the r8a7794 SoC.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-05-30 09:37:09 +09:00
Linus Torvalds
1d6da87a32 Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux
Pull drm updates from Dave Airlie:
 "Here's the main drm pull request for 4.7, it's been a busy one, and
  I've been a bit more distracted in real life this merge window.  Lots
  more ARM drivers, not sure if it'll ever end.  I think I've at least
  one more coming the next merge window.

  But changes are all over the place, support for AMD Polaris GPUs is in
  here, some missing GM108 support for nouveau (found in some Lenovos),
  a bunch of MST and skylake fixes.

  I've also noticed a few fixes from Arnd in my inbox, that I'll try and
  get in asap, but I didn't think they should hold this up.

  New drivers:
   - Hisilicon kirin display driver
   - Mediatek MT8173 display driver
   - ARC PGU - bitstreamer on Synopsys ARC SDP boards
   - Allwinner A13 initial RGB output driver
   - Analogix driver for DisplayPort IP found in exynos and rockchip

  DRM Core:
   - UAPI headers fixes and C++ safety
   - DRM connector reference counting
   - DisplayID mode parsing for Dell 5K monitors
   - Removal of struct_mutex from drivers
   - Connector registration cleanups
   - MST robustness fixes
   - MAINTAINERS updates
   - Lockless GEM object freeing
   - Generic fbdev deferred IO support

  panel:
   - Support for a bunch of new panels

  i915:
   - VBT refactoring
   - PLL computation cleanups
   - DSI support for BXT
   - Color manager support
   - More atomic patches
   - GEM improvements
   - GuC fw loading fixes
   - DP detection fixes
   - SKL GPU hang fixes
   - Lots of BXT fixes

  radeon/amdgpu:
   - Initial Polaris support
   - GPUVM/Scheduler/Clock/Power improvements
   - ASYNC pageflip support
   - New mesa feature support

  nouveau:
   - GM108 support
   - Power sensor support improvements
   - GR init + ucode fixes.
   - Use GPU provided topology information

  vmwgfx:
   - Add host messaging support

  gma500:
   - Some cleanups and fixes

  atmel:
   - Bridge support
   - Async atomic commit support

  fsl-dcu:
   - Timing controller for LCD support
   - Pixel clock polarity support

  rcar-du:
   - Misc fixes

  exynos:
   - Pipeline clock support
   - Exynoss4533 SoC support
   - HW trigger mode support
   - export HDMI_PHY clock
   - DECON5433 fixes
   - Use generic prime functions
   - use DMA mapping APIs

  rockchip:
   - Lots of little fixes

  vc4:
   - Render node support
   - Gamma ramp support
   - DPI output support

  msm:
   - Mostly cleanups and fixes
   - Conversion to generic struct fence

  etnaviv:
   - Fix for prime buffer handling
   - Allow hangcheck to be coalesced with other wakeups

  tegra:
   - Gamme table size fix"

* 'drm-next' of git://people.freedesktop.org/~airlied/linux: (1050 commits)
  drm/edid: add displayid detailed 1 timings to the modelist. (v1.1)
  drm/edid: move displayid validation to it's own function.
  drm/displayid: Iterate over all DisplayID blocks
  drm/edid: move displayid tiled block parsing into separate function.
  drm: Nuke ->vblank_disable_allowed
  drm/vmwgfx: Report vmwgfx version to vmware.log
  drm/vmwgfx: Add VMWare host messaging capability
  drm/vmwgfx: Kill some lockdep warnings
  drm/nouveau/gr/gf100-: fix race condition in fecs/gpccs ucode
  drm/nouveau/core: recognise GM108 chipsets
  drm/nouveau/gr/gm107-: fix touching non-existent ppcs in attrib cb setup
  drm/nouveau/gr/gk104-: share implementation of ppc exception init
  drm/nouveau/gr/gk104-: move rop_active_fbps init to nonctx
  drm/nouveau/bios/pll: check BIT table version before trying to parse it
  drm/nouveau/bios/pll: prevent oops when limits table can't be parsed
  drm/nouveau/volt/gk104: round up in gk104_volt_set
  drm/nouveau/fb/gm200: setup mmu debug buffer registers at init()
  drm/nouveau/fb/gk20a,gm20b: setup mmu debug buffer registers at init()
  drm/nouveau/fb/gf100-: allocate mmu debug buffers
  drm/nouveau/fb: allow chipset-specific actions for oneinit()
  ...
2016-05-23 11:48:48 -07:00
Linus Torvalds
0eff4589c3 It's the usual big pile of driver updates and additions, but we
do have a couple core changes in here as well.
 
 Core:
 
  - CLK_IS_CRITICAL support has been added. This should allow drivers
    to properly express that a certain clk should stay on even if
    their prepare/enable count drops to 0 (and in turn the parents of
    these clks should stay enabled).
 
  - A clk registration API has been added, clk_hw_register(), and
    an OF clk provider API has been added, of_clk_add_hw_provider().
    These APIs have been put in place to further split clk providers
    from clk consumers, with the goal being to have clk providers
    never deal with struct clk pointers at all. Conversion of provider
    drivers is on going. clkdev has also gained support for registering
    clk_hw pointers directly so we can convert drivers that don't use
    devicetree.
 
 New Drivers:
 
  - Marvell ap806 and cp110 system controllers (with clks inside!)
  - Hisilicon Hi3519 clock and reset controller
  - Axis ARTPEC-6 clock controllers
  - Oxford Semiconductor OXNAS clock controllers
  - AXS10X I2S PLL
  - Rockchip RK3399 clock and reset controller
 
 Updates:
 
  - MMC2 and UART2 clks on Samsung Exynos 3250, ACLK on Samsung Exynos 542x
    SoCs, and some more clk ID exporting for bus frequency scaling
  - Proper BCM2835 PCM clk support and various other clks
  - i.MX clk updates for i.MX6SX, i.MX7, and VF610
  - Renesas updates for R-Car H3
  - Tegra210 got updates for DisplayPort and HDMI 2.0
  - Rockchip driver refactorings and fixes due to adding RK3399 support
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2.0.22 (GNU/Linux)
 
 iQIcBAABCAAGBQJXP7QdAAoJEK0CiJfG5JUl/Q8P/i93QXTom/VbwDHZ4DDZr0Hc
 69oCRVTDTArGLa4YrGMxu3crNWf8/ORwsZVG93PD6bkkrWo9qH52KFsI22MdZcta
 HlApsFjI503C7qDw6V8UVz7mUJVfarCxKNSd1WBPCVCNExarIrRRymC3NXT6ZrUP
 D59E53d4G+I6OUuybsp4gtA7aEoYebAE7BInPDDihIk7Lall5mLYbfJUumpHlmSd
 wqqPad5OYoC1nkrYhIGficK9Bizy3eyK829EoqpQpE4djkNhEwKd/AwSJZ6i1pdC
 obt8vQyPRK0ByND2I+3XPqZ7bFb9IKu5WIAkYzG8QskFyIqiFtOkFgEP360ojlGT
 D8sZY7RBmIM4Tu5RgeoN94wML4f/zYOm6YzVUVjWdVPGoxuy4QhQsvS5Id70ifNU
 pSYf1KG0Gq0wvptth02zaDE9r1lDMOCHsOPIbVMqHRxRj8shUyjroTEzdtdyS6SE
 FsYmGdrq4YctXyP4E8efLzFMjN7qZyKgnAoGfROsPRb6NE3DSFs5PcxQldOcoBPv
 +NstBGUlJ4Xzwd1BdxKWJq8aIsG/CLqTec63OYSYM0bfUSWXKOgemvBV8MJrDP1D
 rFabdJVHhUZOy5UgxOdfmy1XWp/SWup8OUnpEJp84RywGP6UMM0s1RtWruMJ776J
 tBzVIIYCJrAWFia0Djlr
 =aEzb
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "It's the usual big pile of driver updates and additions, but we do
  have a couple core changes in here as well.

  Core:

   - CLK_IS_CRITICAL support has been added.  This should allow drivers
     to properly express that a certain clk should stay on even if their
     prepare/enable count drops to 0 (and in turn the parents of these
     clks should stay enabled).

   - A clk registration API has been added, clk_hw_register(), and an OF
     clk provider API has been added, of_clk_add_hw_provider().  These
     APIs have been put in place to further split clk providers from clk
     consumers, with the goal being to have clk providers never deal
     with struct clk pointers at all.  Conversion of provider drivers is
     on going.  clkdev has also gained support for registering clk_hw
     pointers directly so we can convert drivers that don't use
     devicetree.

  New Drivers:

   - Marvell ap806 and cp110 system controllers (with clks inside!)
   - Hisilicon Hi3519 clock and reset controller
   - Axis ARTPEC-6 clock controllers
   - Oxford Semiconductor OXNAS clock controllers
   - AXS10X I2S PLL
   - Rockchip RK3399 clock and reset controller

  Updates:

   - MMC2 and UART2 clks on Samsung Exynos 3250, ACLK on Samsung Exynos
     542x SoCs, and some more clk ID exporting for bus frequency scaling
   - Proper BCM2835 PCM clk support and various other clks
   - i.MX clk updates for i.MX6SX, i.MX7, and VF610
   - Renesas updates for R-Car H3
   - Tegra210 got updates for DisplayPort and HDMI 2.0
   - Rockchip driver refactorings and fixes due to adding RK3399 support"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (139 commits)
  clk: fix critical clock locking
  clk: qcom: mmcc-8996: Remove clocks that should be controlled by RPM
  clk: ingenic: Allow divider value to be divided
  clk: sunxi: Add display and TCON0 clocks driver
  clk: rockchip: drop old_rate calculation on pll rate changes
  clk: rockchip: simplify GRF handling in pll clocks
  clk: rockchip: lookup General Register Files in rockchip_clk_init
  clk: rockchip: fix the rk3399 sdmmc sample / drv name
  clk: mvebu: new driver for Armada CP110 system controller
  dt-bindings: arm: add DT binding for Marvell CP110 system controller
  clk: mvebu: new driver for Armada AP806 system controller
  clk: hisilicon: add CRG driver for hi3519 soc
  clk: hisilicon: export some hisilicon APIs to modules
  reset: hisilicon: add reset controller driver for hisilicon SOCs
  clk: bcm/kona: Do not use sizeof on pointer type
  clk: qcom: msm8916: Fix crypto clock flags
  clk: nxp: lpc18xx: Initialize clk_init_data::flags to 0
  clk/axs10x: Add I2S PLL clock driver
  clk: imx7d: fix ahb clock mux 1
  clk: fix comment of devm_clk_hw_register()
  ...
2016-05-20 20:18:12 -07:00
Linus Torvalds
07b75260eb Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS updates from Ralf Baechle:
 "This is the main pull request for MIPS for 4.7.  Here's the summary of
  the changes:

   - ATH79: Support for DTB passuing using the UHI boot protocol
   - ATH79: Remove support for builtin DTB.
   - ATH79: Add zboot debug serial support.
   - ATH79: Add initial support for Dragino MS14 (Dragine 2), Onion Omega
            and DPT-Module.
   - ATH79: Update devicetree clock support for AR9132 and AR9331.
   - ATH79: Cleanup the DT code.
   - ATH79: Support newer SOCs in ath79_ddr_ctrl_init.
   - ATH79: Fix regression in PCI window initialization.
   - BCM47xx: Move SPROM driver to drivers/firmware/
   - BCM63xx: Enable partition parser in defconfig.
   - BMIPS: BMIPS5000 has I cache filing from D cache
   - BMIPS: BMIPS: Add cpu-feature-overrides.h
   - BMIPS: Add Whirlwind support
   - BMIPS: Adjust mips-hpt-frequency for BCM7435
   - BMIPS: Remove maxcpus from BCM97435SVMB DTS
   - BMIPS: Add missing 7038 L1 register cells to BCM7435
   - BMIPS: Various tweaks to initialization code.
   - BMIPS: Enable partition parser in defconfig.
   - BMIPS: Cache tweaks.
   - BMIPS: Add UART, I2C and SATA devices to DT.
   - BMIPS: Add BCM6358 and BCM63268support
   - BMIPS: Add device tree example for BCM6358.
   - BMIPS: Improve Improve BCM6328 and BCM6368 device trees
   - Lantiq: Add support for device tree file from boot loader
   - Lantiq: Allow build with no built-in DT.
   - Loongson 3: Reserve 32MB for RS780E integrated GPU.
   - Loongson 3: Fix build error after ld-version.sh modification
   - Loongson 3: Move chipset ACPI code from drivers to arch.
   - Loongson 3: Speedup irq processing.
   - Loongson 3: Add basic Loongson 3A support.
   - Loongson 3: Set cache flush handlers to nop.
   - Loongson 3: Invalidate special TLBs when needed.
   - Loongson 3: Fast TLB refill handler.
   - MT7620: Fallback strategy for invalid syscfg0.
   - Netlogic: Fix CP0_EBASE redefinition warnings
   - Octeon: Initialization fixes
   - Octeon: Add DTS files for the D-Link DSR-1000N and EdgeRouter Lite
   - Octeon: Enable add Octeon-drivers in cavium_octeon_defconfig
   - Octeon: Correctly handle endian-swapped initramfs images.
   - Octeon: Support CN73xx, CN75xx and CN78xx.
   - Octeon: Remove dead code from cvmx-sysinfo.
   - Octeon: Extend number of supported CPUs past 32.
   - Octeon: Remove some code limiting NR_IRQS to 255.
   - Octeon: Simplify octeon_irq_ciu_gpio_set_type.
   - Octeon: Mark some functions __init in smp.c
   - Octeon: Octeon: Add Octeon III CN7xxx interface detection
   - PIC32: Add serial driver and bindings for it.
   - PIC32: Add PIC32 deadman timer driver and bindings.
   - PIC32: Add PIC32 clock timer driver and bindings.
   - Pistachio: Determine SoC revision during boot
   - Sibyte: Fix Kconfig dependencies of SIBYTE_BUS_WATCHER.
   - Sibyte: Strip redundant comments from bcm1480_regs.h.
   - Panic immediately if panic_on_oops is set.
   - module: fix incorrect IS_ERR_VALUE macro usage.
   - module: Make consistent use of pr_*
   - Remove no longer needed work_on_cpu() call.
   - Remove CONFIG_IPV6_PRIVACY from defconfigs.
   - Fix registers of non-crashing CPUs in dumps.
   - Handle MIPSisms in new vmcore_elf32_check_arch.
   - Select CONFIG_HANDLE_DOMAIN_IRQ and make it work.
   - Allow RIXI to be used on non-R2 or R6 cores.
   - Reserve nosave data for hibernation
   - Fix siginfo.h to use strict POSIX types.
   - Don't unwind user mode with EVA.
   - Fix watchpoint restoration
   - Ptrace watchpoints for R6.
   - Sync icache when it fills from dcache
   - I6400 I-cache fills from dcache.
   - Various MSA fixes.
   - Cleanup MIPS_CPU_* definitions.
   - Signal: Move generic copy_siginfo to signal.h
   - Signal: Fix uapi include in exported asm/siginfo.h
   - Timer fixes for sake of KVM.
   - XPA TLB refill fixes.
   - Treat perf counter feature
   - Update John Crispin's email address
   - Add PIC32 watchdog and bindings.
   - Handle R10000 LL/SC bug in set_pte()
   - cpufreq: Various fixes for Longson1.
   - R6: Fix R2 emulation.
   - mathemu: Cosmetic fix to ADDIUPC emulation, plenty of other small fixes
   - ELF: ABI and FP fixes.
   - Allow for relocatable kernel and use that to support KASLR.
   - Fix CPC_BASE_ADDR mask
   - Plenty fo smp-cps, CM, R6 and M6250 fixes.
   - Make reset_control_ops const.
   - Fix kernel command line handling of leading whitespace.
   - Cleanups to cache handling.
   - Add brcm, bcm6345-l1-intc device tree bindings.
   - Use generic clkdev.h header
   - Remove CLK_IS_ROOT usage.
   - Misc small cleanups.
   - CM: Fix compilation error when !MIPS_CM
   - oprofile: Fix a preemption issue
   - Detect DSP ASE v3 support:1"

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (275 commits)
  MIPS: pic32mzda: fix getting timer clock rate.
  MIPS: ath79: fix regression in PCI window initialization
  MIPS: ath79: make ath79_ddr_ctrl_init() compatible for newer SoCs
  MIPS: Fix VZ probe gas errors with binutils <2.24
  MIPS: perf: Fix I6400 event numbers
  MIPS: DEC: Export `ioasic_ssr_lock' to modules
  MIPS: MSA: Fix a link error on `_init_msa_upper' with older GCC
  MIPS: CM: Fix compilation error when !MIPS_CM
  MIPS: Fix genvdso error on rebuild
  USB: ohci-jz4740: Remove obsolete driver
  MIPS: JZ4740: Probe OHCI platform device via DT
  MIPS: JZ4740: Qi LB60: Remove support for AVT2 variant
  MIPS: pistachio: Determine SoC revision during boot
  MIPS: BMIPS: Adjust mips-hpt-frequency for BCM7435
  mips: mt7620: fallback to SDRAM when syscfg0 does not have a valid value for the memory type
  MIPS: Prevent "restoration" of MSA context in non-MSA kernels
  MIPS: cevt-r4k: Dynamically calculate min_delta_ns
  MIPS: malta-time: Take seconds into account
  MIPS: malta-time: Start GIC count before syncing to RTC
  MIPS: Force CPUs to lose FP context during mode switches
  ...
2016-05-19 10:02:26 -07:00
Linus Torvalds
2ec3240fd7 ARM: 64-bit DT updates for v4.7
We continue ramping up platform support for 64-bit ARM machines,
 with 111 individual non-merge changesets touching 21 platforms.
 
 The LG1312 platform is completely new and is the first ARM
 platform by LG that we support in the mainline kernel. Two other
 SoCs got added that are updated versions of existing SoC
 families, so the port mainly consists of new dts files:
 - The Hisilicon Hip06/D03 is the latest server platform
   from Huawei/Hisilicon, and follows the Hip05/D02 platform.
 - Rockchip RK3399 follows the 32-bit RK3288 that is popular
   in low-end Chromebooks and the 64-bit RK3368 that is mainly
   found in chinese Android TV boxes.
 
 The 96Boards HiKey based on the Hisilicon Hi6220 (Kirin 620)
 gets a long-awaited overhaul with a lot of devices enabled in
 the DT, so it should be much more usable with a mainline kernel
 now. See also
 https://plus.google.com/111524780435806926688/posts/PeGb2VsNhJd
 
 A lot of work went into enabling new device drivers on existing
 machines, but we also have a couple of new commercially
 available machines:
 
 - Google Pixel C laptop based on Tegra210
 - Hardkernel Odroid C2 Based on Amlogic Meson GXBB (S905)
 - Geekbuying GeekBox based on Rockchip RK3368
 
 And finally, a couple of reference or development platforms
 that are not end-user platforms but are used for trying out
 the respective SoC platforms:
 
 - Amlogic Meson GXBB P200 and P201 development systems
 - NXP Layerscape 1043A QDS development board
 - Hisilicon Hip06 D03 server board, as mentioned above
 - LG1312 Reference Design
 - RK3399 Evaluation Board
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIVAwUAVzuXimCrR//JCVInAQJtoRAAkiyHJCwsc7UJuaPY4XyFR3JGvjRrk4vA
 EvpnFsfu4Xgso3yillZUY3i0oUAFAUslYJR5ycNS63OV8+CafpzVCxZmXl6N7muF
 +NzVsrcEBZvfX3YWRSEB6qwILqjRTNBDqDVfZEhcP3Jh7XJ1U+TPcTKGMuG0zRVL
 NvGbEM0YF21kKJXz8rPWx/moYhNmE/1E5XEI5e5NpoO9y9BIRjJPSkpkstccaO5I
 Hvd2cqa8sHLROY0ffhK+UNytvSqvkTILUswlBBFC+/JX4yctFeLTcEbLrEpGnWUG
 zqy6lIooq2IBKKDsrxTisIZ5ACwoLQlMUdBRUYgNkjH5KR7/DBmUQO2WygYGb/xC
 imLiJpIIshkBG/xFrSVJjVDleTW++CecHU8uFVQaftOl1EHFGEs8ChCooRk9lRMq
 jQyEEGbX33dKUlGSvkMiVIufWOFBL+AqefFgl+TPDZf0xXWoFGA4cOvdxClxKSF5
 Eh6XnQu9mQLHQ3OjetuQE+VsZHEKoe+cIH2ypUj4D4MJAWV6ok6bsbQJtMmLgwbZ
 fh1pHSpCHG3iJqaoICFmcokiymiLst3lZqOm6GP4Glgbs8TVwKfeYNUSFRVMlJ5W
 BQ/SVaBuXbAiv8Ree7wk2HbAXtOzKuFqEzVVRWd3XgIERTbNZaI+qoFssh0TIlBe
 WNDmLB+6E5Q=
 =locI
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM 64-bit DT updates from Arnd Bergmann:
 "We continue ramping up platform support for 64-bit ARM machines, with
  111 individual non-merge changesets touching 21 platforms.

  The LG1312 platform is completely new and is the first ARM platform by
  LG that we support in the mainline kernel.  Two other SoCs got added
  that are updated versions of existing SoC families, so the port mainly
  consists of new dts files:

   - The Hisilicon Hip06/D03 is the latest server platform from
     Huawei/Hisilicon, and follows the Hip05/D02 platform.

   - Rockchip RK3399 follows the 32-bit RK3288 that is popular in
     low-end Chromebooks and the 64-bit RK3368 that is mainly found in
     chinese Android TV boxes.

  The 96Boards HiKey based on the Hisilicon Hi6220 (Kirin 620) gets a
  long-awaited overhaul with a lot of devices enabled in the DT, so it
  should be much more usable with a mainline kernel now.  See also

     https://plus.google.com/111524780435806926688/posts/PeGb2VsNhJd

  A lot of work went into enabling new device drivers on existing
  machines, but we also have a couple of new commercially available
  machines:

   - Google Pixel C laptop based on Tegra210
   - Hardkernel Odroid C2 Based on Amlogic Meson GXBB (S905)
   - Geekbuying GeekBox based on Rockchip RK3368

  And finally, a couple of reference or development platforms that are
  not end-user platforms but are used for trying out the respective SoC
  platforms:

   - Amlogic Meson GXBB P200 and P201 development systems
   - NXP Layerscape 1043A QDS development board
   - Hisilicon Hip06 D03 server board, as mentioned above
   - LG1312 Reference Design
   - RK3399 Evaluation Board"

* tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (104 commits)
  arm64: dts: marvell: add XOR node for Armada 3700 SoC
  dt-bindings: document rockchip rk3399-evb board
  arm64: dts: rockchip: add dts file for RK3399 evaluation board
  arm64: dts: rockchip: add core dtsi file for RK3399 SoCs
  dt-bindings: rockchip-dw-mshc: add description for rk3399
  arm64: dts: marvell: Use a SoC-specific compatible for xHCI on Armada37xx
  arm64: dts: marvell: Rename armada-37xx USB node
  arm64: dts: marvell: Clean up armada-3720-db
  Documentation: arm64: Add Hisilicon Hip06 D03 dts binding
  arm64: dts: Add initial dts for Hisilicon Hip06 D03 board
  arm64: dts: hip05: Add nor flash support
  arm64: dts: hip05: fix its node without msi-cells
  arm64: dts: r8a7795: Don't disable referenced optional clocks
  arm64: dts: salvator-x: populate EXTALR
  arm64: dts: r8a7795: enable PCIe on Salvator-X
  arm64: dts: r8a7795: Add PCIe nodes
  arm64: tegra: Add IOMMU node to GM20B on Tegra210
  arm64: tegra: Add reference clock to GM20B on Tegra210
  dt-bindings: Add documentation for GM20B GPU
  dt-bindings: gk20a: Document iommus property
  ...
2016-05-18 12:58:39 -07:00
Purna Chandra Mandal
d863dc9e58 dt/bindings/clk: Add PIC32 clock binding documentation.
Document the devicetree bindings for the clock driver found on Microchip
PIC32 class devices.

Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Purna Chandra Mandal <purna.mandal@microchip.com>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: linux-clk@vger.kernel.org
Cc: devicetree@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/13246/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-05-13 15:30:25 +02:00
Antony Pavlov
af5ad0de22 MIPS: ath79: Introduce <dt-bindings/clock/ath79-clk.h>
The include/dt-bindings/clock/ath79-clk.h header file
is introduced so we can use symbolic identifiers for SoC clocks.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Cc: Gabor Juhos <juhosg@openwrt.org>
Cc: Alban Bedel <albeu@free.fr>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: linux-mips@linux-mips.org
Cc: linux-clk@vger.kernel.org
Cc: devicetree@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/12875/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-05-13 14:01:45 +02:00
Stephen Boyd
f3bf9841b8 Merge branch 'clk-hi3519' into clk-next
* clk-hi3519:
  clk: hisilicon: add CRG driver for hi3519 soc
  clk: hisilicon: export some hisilicon APIs to modules
  reset: hisilicon: add reset controller driver for hisilicon SOCs
2016-05-06 11:21:23 -07:00
Jiancheng Xue
6c9da387c8 clk: hisilicon: add CRG driver for hi3519 soc
The CRG(Clock and Reset Generator) block provides clock
and reset signals for other modules in hi3519 soc.

Signed-off-by: Jiancheng Xue <xuejiancheng@hisilicon.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-05-06 11:13:32 -07:00
Philipp Zabel
4585945bf1 clk: mediatek: Add hdmi_ref HDMI PHY PLL reference clock output
The configurable hdmi_ref output of the PLL block is derived from
the tvdpll_594m clock signal via a configurable PLL post-divider.
It is used as the PLL reference input to the HDMI PHY module.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: James Liao <jamesjj.liao@mediatek.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
2016-05-06 17:47:40 +02:00
Stephen Boyd
5bc7532497 clk: tegra: Changes for v4.7-rc1
This set of changes contains a bunch of cleanups and minor fixes along
 with some new clocks, mainly on Tegra210, in preparation for supporting
 DisplayPort and HDMI 2.0.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iQIcBAABCAAGBQJXI3fsAAoJEN0jrNd/PrOho7sP/3W87IOP5Ga+0CAuiBfl3oyx
 99nJMzloiHSSe9aH1w9CZJEXr47iCmfN7yoXp0xCx0CAT/6lTlnzIE9cpblvxJLY
 GXwxpIHDFWndmwvnBTaw5YN8C/DjfgE8KPIYArE9yvP0X1lnU0IdbcMXT5Gu31ny
 9Sh9csgZNcKJyTJ4VgzVJkpHWjE5/ngcud0JfuUiQNc3VsJInGroYxdE16WeYDPq
 zP+5LXPEZAJu/GJPFBtySnhaBcr6Nk/HQ4X1M8/fC5ocA4TfxWZTHqXg6RyHIgJM
 flM69aeh0uBlK5TEX99W7OiOTpXog8HSukrjMw53lJT69uitxRkt4RLm5PStp4Gr
 fMClyJzujF2FTO3+TXvLnyj0MwrFvmQHboFqDJUBFJ4XFwZAZH43v9dXVFlGltib
 qThUiSyzljjeco6XPRLTkHNjntA3rwixCb4Lq2J8MHgf7O2DSQuCBtuBswVXKyQQ
 JfQAOTPNzzCXA7NWJ34pbNaM6Ex0pPJFGQs+5Mpzo5XAXc9od/79+4ht4tJSZ+hb
 Su5oRlv0+EU44MddKOBX5FPBbBnI6lBl8fADiM+ld9oDdlHHgkqMxlradhjIWY0Q
 9uz+qjUu6VrmvkCxNe6s0yepwHYoeBpbrmRIj2ZiokXcH4kyltpL8XpOvuWhm4pP
 tYmTNJJmCb/hd6MZhiKv
 =HcjN
 -----END PGP SIGNATURE-----

Merge tag 'tegra-for-4.7-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into clk-next

Pull tegra clk driver changes from Thierry Reding:

This set of changes contains a bunch of cleanups and minor fixes along
with some new clocks, mainly on Tegra210, in preparation for supporting
DisplayPort and HDMI 2.0.

* tag 'tegra-for-4.7-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  clk: tegra: dfll: Reformat CVB frequency table
  clk: tegra: dfll: Properly clean up on failure and removal
  clk: tegra: dfll: Make code more comprehensible
  clk: tegra: dfll: Reference CVB table instead of copying data
  clk: tegra: dfll: Update kerneldoc
  clk: tegra: Fix PLL_U post divider and initial rate on Tegra30
  clk: tegra: Initialize PLL_C to sane rate on Tegra30
  clk: tegra: Fix pllre Tegra210 and add pll_re_out1
  clk: tegra: Add sor_safe clock
  clk: tegra: dpaux and dpaux1 are fixed factor clocks
  clk: tegra: Add dpaux1 clock
  clk: tegra: Use correct parent for dpaux clock
  clk: tegra: Add fixed factor peripheral clock type
  clk: tegra: Special-case mipi-cal parent on Tegra114
  clk: tegra: Remove trailing blank line
  clk: tegra: Constify peripheral clock registers
  clk: tegra: Add interface to enable hardware control of SATA/XUSB PLLs
2016-05-02 16:53:02 -07:00
Stephen Boyd
5569aedf1d A spelling fix and a bunch of rk3399 clock fixes.
-----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABCAAGBQJXIogdAAoJEPOmecmc0R2BmToH/0D0OdIU6WuAxlfhz0cluLm8
 bzZ5hwA4ZVv73QorGFIXA2B6Aq/GKV+2HcoqSKT+gMspgpi1o4TdPcknIEpVDQ9r
 vWUXW0VBN04dGNlk0J9N2XAPWokdkHRuFentf/EZATrAPWSwIMsri7QiF2hw3MiA
 yWKQKmJki8IJC6JPtisj9HORKyqAeoyxOn8vPHA5TUOYAD4YIbcY3BJ7xApJ2W5i
 ikJAVu4agjMrHRJ1ALyI0m6ZeczbtMvpigl6fvMTyt/27BhHou2AhrOqSr5Wg04t
 Sh++L/wY0ZHIo5HFw9voAu6EVb6NachxKvnG8cCvgV8BGofsrArIdXmJFEwQWOk=
 =yN9B
 -----END PGP SIGNATURE-----

Merge tag 'v4.7-rockchip-clk3' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next

Pull rockchip clk updates from Heiko Stuebner:

A spelling fix and a bunch of rk3399 clock fixes.

* tag 'v4.7-rockchip-clk3' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  clk: rockchip: fix the rk3399 cifout clock
  clk: rockchip: drop unnecessary CLK_IGNORE_UNUSED flags from rk3399
  clk: rockchip: add some frequencies on the rk3399 PLL table
  clk: rockchip: assign more necessary rk3399 clock ids
  clk: rockchip: export some necessary rk3399 clock ids
  clk: rockchip: rename rga clock-id on rk3399
  clk: rockchip: add general gpu soft-reset on rk3399
  clk: rockchip: fix the gate bit for i2c4 and i2c8 on rk3399
  clk: rockchip: fix of spelling mistake on unsuccessful in pll clock type
2016-05-02 16:43:03 -07:00
Rhyland Klein
926655f929 clk: tegra: Fix pllre Tegra210 and add pll_re_out1
Use a new Tegra210 version of the pll_register_pllre function to
allow setting the proper settings for the m and n div fields.

Additionally define PLL_RE_OUT1 on Tegra210.

Signed-off-by: Rhyland Klein <rklein@nvidia.com>
[treding@nvidia.com: define PLLRE_OUT1 register offset]
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-04-28 12:41:50 +02:00
Arnd Bergmann
05ad9c3e77 Renesas ARM Based SoC DT Updates for v4.7
* Configure NMI key as wakeup source in DT of kzm9g board
 * Add SDHI support to DT of gose board
 * Add support of UHS-I SDR-50 for SDHI to DT of r8a7790 SoC
 * Correct interrupt type for ARM TWD in DT of r8a7779 and sh73a0 SoCs
 * Add IIC support to DT of r8a7794 SoC
 * Add CAN support to DT of r8a7793 and r8a7794 SoCs
 * Add SCIF2 support to r8a7790 device tree
 * Use CAN, JPU and USB3.0 fallback compatibility string
   in DT of r8a7791 and r8a7790 SoCs
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJXHZwbAAoJENfPZGlqN0++3nUP/3sPtsfjE9v40DBnhiuO6nDA
 W3IW1mwlisw+R/HN8mkFun7OYDWjiY9dAjR7tHhKCxapztIxbWMG2pWgKmTKevIR
 m7RY8VCOWQIKDhpBEAalqxhpu5WAq5/Dfeyf2CF+CnPCnZA+CUsVS+gLdJRz5R0e
 yP5c9n9EaLMs/1IODQlgySQcdYrfal/SaRcsNDwnZZIH4L98DewhYAcXb7wYVL3Y
 n1bd4CAcHmKXk+rjauFnynXSCU/BIOEf+FiUlyHPgDAk3VrIAB9aos7C0S+lSCtr
 4v7q0G0fizaeImtiDW2XrNIvBinbVb8vRWN4Q7hgPqDqJAxaPIa9Uy8QFf8Y2vZ7
 Ki0VAtq0JFoH78CdzNMD7tHzOUMOgTio7mnvK66JAG/KtWVthBdGDMRd3sCl5wnQ
 Eepe8hEWBPMZF8XibIJ7HUpVFGDmBwrQ5hawsO3vYG6qiR/Cakc+8NLjMbx+y3AN
 j1LZL3uHWfNC/798MovmpMswhVFuP6MTdF2HTICwlC8rHCPW2J20w4F0HBiMZcSE
 KUsid/YhFMuILkMEDBLfnqtmrGgF4ugrVusxFqzl6nn7F3eiguYv4cq3CmBosK5d
 Lp2frlfUjSWjGcpr4J0+qXOwjZljCu+1tDeTlRAEHSuPyQXm3vNUYzuxGGgQKWOg
 Fs29CVOaPN5+QoFRv+O9
 =vStA
 -----END PGP SIGNATURE-----

Merge tag 'renesas-dt-for-v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt

Merge "Renesas ARM Based SoC DT Updates for v4.7" from Simon Horman:

* Configure NMI key as wakeup source in DT of kzm9g board
* Add SDHI support to DT of gose board
* Add support of UHS-I SDR-50 for SDHI to DT of r8a7790 SoC
* Correct interrupt type for ARM TWD in DT of r8a7779 and sh73a0 SoCs
* Add IIC support to DT of r8a7794 SoC
* Add CAN support to DT of r8a7793 and r8a7794 SoCs
* Add SCIF2 support to r8a7790 device tree
* Use CAN, JPU and USB3.0 fallback compatibility string
  in DT of r8a7791 and r8a7790 SoCs

* tag 'renesas-dt-for-v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (22 commits)
  ARM: dts: gose: Enable SDHI controllers
  ARM: dts: r8a7793: Add SDHI controllers
  ARM: dts: r8a7790: fix max-frequency for SDHI
  ARM: dts: kzm9g: Configure NMI key as wake-up source
  ARM: dts: r8a7790: lager: Enable UHS-I SDR-50
  ARM: dts: r8a7790: Set maximum frequencies for SDHI clocks
  ARM: dts: r8a7791: Use USB3.0 fallback compatibility string
  ARM: dts: r8a7790: Use USB3.0 fallback compatibility string
  ARM: dts: r8a7779: Correct interrupt type for ARM TWD
  ARM: dts: sh73a0: Correct interrupt type for ARM TWD
  ARM: dts: r8a7794: Add IIC nodes
  ARM: dts: r8a7794: add IIC clocks
  ARM: dts: r8a7793: add CAN nodes to device tree
  ARM: dts: r8a7793: add CAN clocks to device tree
  ARM: dts: r8a7794: add CAN nodes to device tree
  ARM: dts: r8a7794: add CAN clocks to device tree
  ARM: dts: r8a7790: use fallback can compatibility string
  ARM: dts: r8a7791: use fallback can compatibility string
  ARM: dts: r8a7790: Add SCIF2 device node
  ARM: dts: r8a7790: Add SCIF2 clock
  ...
2016-04-25 23:01:39 +02:00
Xing Zheng
55df458439 clk: rockchip: export some necessary rk3399 clock ids
We export some clock IDs for the reference drivers need them.

Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-04-25 22:47:22 +02:00
Xing Zheng
003e6eb71e clk: rockchip: rename rga clock-id on rk3399
The rga clock supplying the working clock on the rk3399 is actually
called rga-core in the manual. As the clock id has neither been
assigned nor released with a full kernel release, we can still change
the id to the more appropriate naming.

Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-04-25 22:47:06 +02:00
Xing Zheng
f73b5042b9 clk: rockchip: add general gpu soft-reset on rk3399
Add the id for the general gpu soft-reset, that got documented only in
newer TRM versions.

Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-04-25 22:46:53 +02:00
Stephen Boyd
0f05db651d Fix quite some checkpatch warnings in the newly added
rk3399 header and also in the clock code itself.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABCAAGBQJXFzXaAAoJEPOmecmc0R2BfoIH/jzxzuOFb7oMIEjWA1Dlv6ev
 I9l63Pi5+/BGXMXkuvBCpyVKRk9T7jyAkQbvMuoo6ELOmEtn2AX4BC7Pq+xok7Xz
 WZZQY/+nkYaAjJ6GscLpqWtNlhwCY0Ms/1WOp9DwTwcDztiTJaa9iQf5CELEJMhg
 RfANV2DIi9mNh+Nx4JIQi2e01tN2EXUsSNH8NVKTqfZKR/hvb9KO3qQWQzGdgqPr
 jNaAuVIq1iOIV0fBD7X8WJwQ2JqmrP7UsvIAXYk46E53jSk5RvnrGIvFp23pu0Jc
 0a677jCpx09en6LLPXQOwgtx687hChP5HT466BXo241daJkX4isDKAx430p7hGY=
 =99uY
 -----END PGP SIGNATURE-----

Merge tag 'v4.7-rockchip-clk2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next

Pull some checkpatch silencers from Heiko Stuebner:

Fix quite some checkpatch warnings in the newly added
rk3399 header and also in the clock code itself.

* tag 'v4.7-rockchip-clk2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  clk: rockchip: fix checkpatch warning in core code
  clk: rockchip: drop unnecessary header comment
  clk: rockchip: reign in some overly long lines in the rk3399 controller
  clk: rockchip: fix checkpatch errors in rk3399 dt-binding header
2016-04-20 11:41:37 -07:00
Simon Horman
a856b195d1 ARM: dts: r8a7794: add IIC clocks
Add IIC clocks to r8a7794 device tree.

Based on similar work for the r8a7790 by Wolfram Sang.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-04-20 08:56:37 +10:00
Simon Horman
e980f9418f ARM: dts: r8a7794: add CAN clocks to device tree
Add CAN nodes to r8a7794 device tree.
Based on work by Sergei Shtylyov for the r8a7791 SoC.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
2016-04-20 08:56:34 +10:00
Geert Uytterhoeven
3880582337 ARM: dts: r8a7790: Add SCIF2 clock
Based on Rev. 2.00 of the R-Car Gen2 datasheet.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-04-20 08:56:31 +10:00
Heiko Stuebner
6111413be8 clk: rockchip: fix checkpatch errors in rk3399 dt-binding header
Some "please, no space before tabs" checkpatch warnings slipped through
the recent addition of the rk3399 dt-binding header, so fix them.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-04-16 03:03:58 +02:00
Stephen Boyd
75ff888880 Merge branch 'clk-artpec6' into clk-next
* clk-artpec6:
  clk: add artpec-6 clock controller
  clk: add device tree binding for Artpec-6 clock controller
2016-04-15 16:02:46 -07:00
Lars Persson
67bad3e5ce clk: add device tree binding for Artpec-6 clock controller
Add device tree documentation for the main clock controller in the
Artpec-6 SoC.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lars Persson <larper@axis.com>
[sboyd@codeaurora.org: Added unit address to binding example]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-04-15 16:00:37 -07:00
Stephen Boyd
ab98e20af5 This is first big chunk of Rockchip clock-related changes for 4.7.
Main change is probably the added support for the new rk3399 soc
 and necessary infrastructure changes surrounding it.
 
 The biggest chunk is probably that clock code is now able to
 handle multiple clock providers in one system, as the rk3399
 has two of those. A general one and another smaller one in a
 separate power domain. The rk3399 also uses another new pll type.
 Thankfully it just fits nicely into our current structure.
 It also needs some parts like the cpuclk mux parameters to be
 a bit more flexible and an new fractional divider subtype without
 gate.
 
 Apart from this big change we have some more fixes and removal
 of forgotten variables.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABCAAGBQJXDHdWAAoJEPOmecmc0R2BrSAIAIf3g2D84lSEYPDfjLCPHKWQ
 vdmBG/J53+OqFfk0IgYFPcgFfXsgXX0iv34WgtxDOQ1uF+uPDC1KQFlyNrg3E8Mu
 7yUzHewphWumgtun/niThjhKTH+fRAZV4koo35KndXpsOXAy87uW+PZc+0f33ocD
 FzF8mu3eQGsXNkZ3NM/BlLN38gfQVFLiiBNxg/yPmIGqI4VcWJPVUWr51nOURL78
 5NozCjr1giUXPazat0IzsvGdO9szben7al2MixufnpkojjQkB+C8r2lxVXPSC7xH
 EWHPj8WVS0eLYLPW6T3t27zvLNRuORzv5y7cHS8TMc4en1qFS5NJ56ruRv7SzNQ=
 =kC1q
 -----END PGP SIGNATURE-----

Merge tag 'v4.7-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next

Pull rockchip clk updates from Heiko Stuebner:

This is first big chunk of Rockchip clock-related changes for 4.7.

Main change is probably the added support for the new rk3399 soc
and necessary infrastructure changes surrounding it.

The biggest chunk is probably that clock code is now able to
handle multiple clock providers in one system, as the rk3399
has two of those. A general one and another smaller one in a
separate power domain. The rk3399 also uses another new pll type.
Thankfully it just fits nicely into our current structure.
It also needs some parts like the cpuclk mux parameters to be
a bit more flexible and an new fractional divider subtype without
gate.

Apart from this big change we have some more fixes and removal
of forgotten variables.

* tag 'v4.7-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  clk: rockchip: add clock controller for the RK3399
  dt-bindings: add bindings for rk3399 clock controller
  clk: rockchip: add dt-binding header for rk3399
  clk: rockchip: release io resource when failing to init clk
  clk: rockchip: remove redundant checking of device_node
  clk: rockchip: fix warning reported by kernel-doc
  clk: rockchip: remove mux_core_reg from rockchip_cpuclk_reg_data
  clk: rockchip: add new pll-type for rk3399 and similar socs
  clk: rockchip: Add support for multiple clock providers
  clk: rockchip: allow varying mux parameters for cpuclk pll-sources
  clk: rockchip: add a COMPOSITE_FRACMUX_NOGATE type
2016-04-15 15:47:54 -07:00
Stephen Boyd
bf0a976994 The i.MX clock update for 4.7:
- Register SAI clk as shared clocks to support SAI audio on i.MX6SX
  - Add the missing ckil clock for i.MX7
  - Update clk-gate2 and vf610 clock driver to prepare for suspend
    support on VF610
  - Fix DCU clock configurations and add TCON ipg clock to support DRM
    display on VF610
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABAgAGBQJXDfCqAAoJEFBXWFqHsHzOg1EH/RbQ0iuyprdbHM8ItWuesWlN
 rUoqLEb7HiGlKaz47HD7F47scQxuaMw+Qhj1YJapLojqRZOS2f8ZYc4WiDn0RLxU
 zCBaqeyOuT8JvqbcDnSItCZAFH5XRJ5TA+8s/oCuZOfLL1pVT/pyWaulXhNDTVp3
 DWhXfDEOJhy8Lyc6jb19NCwP8pceE5WW9xEHAc28WIBl8cVZjb9m4QGmWZsZK39z
 4X3ckE7b+O0AaAgS9UuSEUr2WSu4oGCQ2CvHQrwdEZBMQTuC7cmhXtHFHmKl9S9f
 7ROu3sMBgWx+Pbj5vcIwn5It6iEuaCnLRqiVUjY/rYHVO+VsAfA/0mLuoNsIeDQ=
 =Ix59
 -----END PGP SIGNATURE-----

Merge tag 'imx-clk-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into clk-next

The i.MX clock update for 4.7:
 - Register SAI clk as shared clocks to support SAI audio on i.MX6SX
 - Add the missing ckil clock for i.MX7
 - Update clk-gate2 and vf610 clock driver to prepare for suspend
   support on VF610
 - Fix DCU clock configurations and add TCON ipg clock to support DRM
   display on VF610

* tag 'imx-clk-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  clk: imx: vf610: fix whitespace in vf610-clock.h
  clk: imx: vf610: add TCON ipg clock
  clk: imx: vf610: fix DCU clock tree
  clk: imx: add ckil clock for i.MX7
  clk: imx: vf610: add suspend/resume support
  clk: imx: vf610: add WKPU unit
  clk: imx: vf610: leave DDR clock on
  clk: imx: clk-gate2: allow custom gate configuration
  clk: imx6sx: Register SAI clocks as shared clocks
2016-04-15 15:42:31 -07:00
Stephen Boyd
811a087c55 This includes addition of some missing clock tree definitions
(UART, MMC2 clocks) for exynos3250 SoC and exporting of IDs
 for exynos543x SoC AMBA AXI bus clocks needed for bus frequency
 scaling.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABCAAGBQJXER7wAAoJEE1bIKeAnHqLkJIP/3QZKFAg94HtNPzmqvS8ZcyN
 DADbg2V3VAWSwWz3jwXz+NQOK5IDKmCnvxHQJdnm/0HpbXRW1C413KC+f84xq0zL
 Us4j7BvXemEyw2Gnv5VAiaEZ6iD/tj6HkCvq5Y12fWPFc1Bqpgf6ghxcADngc22j
 wj8V1RjJ5iXjGmlqYTEPDA7OXVA4sC2HLuWiUvehW56KAlzL6UfThXweiChBiDOh
 fockxKiYWVuxiFqd3GkhJGXjzK9RHzUGJSqCNjruIjyG0dekADZnm12nYjFjxym2
 kL5sPI8Fo2UgzvAV8ax6Ln62uIqtzFhkZAeqkKZSJjEBryYHzAq8QVXS9iP+Ky+E
 8VxZ6IGL1scoVU7g094LjyX9mP2p2PnZWvzCGdvK1qNjYzVO0ZjfXkoU71+JKoat
 JxjUQ2rZTNQGb3KeqfV5SJtE8ffP+9BE+y8K4EaczdYRMqf08pKuhY9c2IHuCEs3
 mpPALIVOHMSh1s58gF26tMyY3vo/04Few63S9YH/mB7LEXeH6Xs7oHHsnMvsPu3N
 CVZwuQ8V/u1W4H7dCU2b9HzgqpxUfM97DbX5NtJH/1zdmpuzWVJxv8K5kT7cHRfi
 IKEjhqRuNAytXojXEL1HElgsPw0THtz+qdBOAxaNwPHZCE3kBLgL4U9hKMBWewx4
 oPH4MjN6xv4sbezGaas7
 =Sl7j
 -----END PGP SIGNATURE-----

Merge tag 'clk-v4.7-samsung' of git://linuxtv.org/snawrocki/samsung into clk-next

Pull samsung clk updates from Sylwester Nawrocki:

This includes addition of some missing clock tree definitions
(UART, MMC2 clocks) for exynos3250 SoC and exporting of IDs
for exynos543x SoC AMBA AXI bus clocks needed for bus frequency
scaling.

* tag 'clk-v4.7-samsung' of git://linuxtv.org/snawrocki/samsung:
  clk: samsung: exynos542x: Add the clock id for ACLK
  dt-bindings: clock: Add the clock id for ACLK clock of Exynos542x SoC
  clk: samsung: exynos3250: Add MMC2 clock
  clk: samsung: exynos3250: Add UART2 clock
  dt-bindings: Add the clock id of UART2 and MMC2 for Exynos3250
2016-04-15 15:19:32 -07:00
Sylwester Nawrocki
6466ee3227 Merge branch 'for-v4.7/clk/exynos542x' into for-v4.7/clk/next 2016-04-15 18:57:00 +02:00
Chanwoo Choi
72b67b3fcb dt-bindings: clock: Add the clock id for ACLK clock of Exynos542x SoC
This patch adds the clock id for ACLK clock of Exynos542x SoC.
ACLK clock means the source clock of AMBA AXI bus. This clock
id should be used for Bus frequency scaling.

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Tested-by: Markus Reichl <m.reichl@fivetechno.de>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2016-04-15 18:13:42 +02:00
Shawn Guo
69c542e802 clk: imx: vf610: fix whitespace in vf610-clock.h
There is whitespace in VF610_CLK_OCOTP line.  Fix it.

Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2016-04-12 09:31:08 +08:00
Stefan Agner
afd7350a9a clk: imx: vf610: add TCON ipg clock
Add the ipg (bus) clock for the TCON modules (Timing Controller). This
module is required by the new DCU DRM driver, since the display signals
pass through TCON.

Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2016-04-12 09:22:17 +08:00
Gary Bisson
4aba2755b8 clk: imx: add ckil clock for i.MX7
Add the necessary clock to use the ckil on i.MX7.

Inspired from the following patch:
https://github.com/boundarydevices/linux-imx6/commit/b80e8271

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2016-04-06 17:04:26 +08:00
Chanwoo Choi
fd00bbcddb dt-bindings: Add the clock id of UART2 and MMC2 for Exynos3250
This patch adds the new clock id for both UART2 and MM2 device
for Exynos3250 SoC.

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2016-03-31 12:25:44 +02:00
Stefan Agner
349efbeedb clk: imx: vf610: add WKPU unit
Signed-off-by: Stefan Agner <stefan@agner.ch>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2016-03-31 17:02:02 +08:00
Stefan Agner
0da15d36a9 clk: imx: vf610: leave DDR clock on
To use STOP mode without putting DDR3 into self-refresh mode, we
need to keep the DDR clock enabled. Use the new gate configuration
with a value of 2 to make sure that the clock is enabled in RUN,
WAIT and STOP mode.

Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2016-03-31 17:01:58 +08:00
Stephen Boyd
5759d6cdd4 This pull request against clk/clk-next brings in fixes for fractional
clocks on 2835, add the PCM clock that used to be driven directly by
 the bcm2835-i2s driver (that driver has been broken since this driver
 was introduced), and adds many other new clocks.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABCgAGBQJW61fwAAoJELXWKTbR/J7omPQP/2s9DuII6ttoaqw3oGtfye17
 NwxjQMFpaEftGOC6+9eMWjqWow90XNf/xZqrQ2f85JSotUQ3Ux4m8X1bd64/FdYr
 /XRXE88Mx6h54ASyb4Jtn1NpcBQeM57aLTQV1kLFZbJhub4+0WNDFJxQEtgH3NcJ
 EaICNoxglcFmG50hYkZuKTTsRS4wvflGbx3QMZWDM5pk3QLQjRB3sLbSj6+oUL2F
 KaVq5dtfV67GTOvudu5d4ZFCeXgt34IOdsxkEWbnYyfaSTYttgE6y07VEjPpaytL
 WL4gb30oDytPTIOm1IENpQb/jJ1WghrG1ecRPrhbQbbzFpkY8ZjdEzrOtQjpfXC2
 L4YfA7AbRcHY5UMWe0OCnrOJMqh42U/TOiHo6oduVJUzOZ8y9c8gpDc+29ScLd3W
 qIN+fifR3rcfdGAWUTtHaPsjLFGkqTSMtPHUQqnAhbDhrtIv4uinqrh/nDsKay3K
 W3qq0Sj3EwlQvjDhQYPGts8BRsNqhIDVK7J47dUPAVRrGEueUxCeqwnI9kMtopXG
 9Xzb1yRxvit1x5K7fOEPILuKiYzgGGSh3ingi+Psyc5hNDh9Q/zKjcjJZR6lkgYy
 L6hq9WpTzXU5++eTytbFwTfaOL4RJWyECB9g1rWXj8VzIzQDm2awdA7IR1ZKhBrb
 WjaYd2Hz1kh4arZYB0Te
 =+50t
 -----END PGP SIGNATURE-----

Merge tag 'bcm2835-clk-next-2016-03-17' of git://github.com/anholt/linux into clk-next

This pull request against clk/clk-next brings in fixes for fractional
clocks on 2835, add the PCM clock that used to be driven directly by
the bcm2835-i2s driver (that driver has been broken since this driver
was introduced), and adds many other new clocks.

* tag 'bcm2835-clk-next-2016-03-17' of git://github.com/anholt/linux:
  clk: bcm2835: add missing osc and per clocks
  clk: bcm2835: add missing PLL clock dividers
  clk: bcm2835: enable management of PCM clock
  clk: bcm2835: reorganize bcm2835_clock_array assignment
  clk: bcm2835: remove use of BCM2835_CLOCK_COUNT in driver
  clk: bcm2835: expose raw clock-registers via debugfs
  clk: bcm2835: clean up coding style issues
  clk: bcm2835: correctly enable fractional clock support
  clk: bcm2835: divider value has to be 1 or more
  clk: bcm2835: add locking to pll*_on/off methods
  clk: bcm2835: pll_off should only update CM_PLL_ANARST
2016-03-29 16:37:54 -07:00
Xing Zheng
f35f622536 clk: rockchip: add dt-binding header for rk3399
Add the dt-bindings header for the rk3399, that gets shared between
the clock controller and the clock references in the dts.

Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-03-28 13:22:43 +02:00
Linus Torvalds
33c1f638a0 The clk changes for this release cycle are mostly dominated by
new device support in terms of LoC, but there has been some cleanup
 in the core as well as the usual minor clk additions to various
 drivers.
 
 Core:
 
  - parent tracking has been simplified
 
  - CLK_IS_ROOT is now a no-op flag, cleaning up drivers has started
 
  - of_clk_init() doesn't consider disabled DT nodes anymore
 
  - clk_unregister() had an error path bug squashed
 
  - of_clk_get_parent_count() has been fixed to only return unsigned ints
 
  - HAVE_MACH_CLKDEV is removed now that the last arch user (ARM) is gone
 
 New Drivers:
 
  - NXP LPC18xx creg
 
  - QCOM IPQ4019 GCC
 
  - TI dm814x ADPLL
 
  - i.MX6QP
 
 Updates:
 
  - Cyngus audio clks found on Broadcom iProc devices
 
  - Non-critical fixes for BCM2385 PLLs
 
  - Samsung exynos5433 updates for clk id errors, HDMI support,
    suspend/resume simplifications
 
  - USB, CAN, LVDS, and FCP clks on shmobile devices
 
  - sunxi got support for more clks on new SoCs and went through a minor
    refactoring/rewrite to use a simpler factor clk construct
 
  - rockchip added some more clk ids and added suport for fraction dividers
 
  - QCOM GDSCs in msm8996
 
  - A new devm helper to make adding custom actions simpler (acked by Greg)
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABCAAGBQJW8fPZAAoJENidgRMleOc9sc0P/2b4k8FiFwjMXiiXI1rcEjiz
 ZjeVxzyAcwBiYoL8a2XONd+pihjLNcAbDbjk8SGUzmKDDz7elQbrhby/6o1dPlW/
 fQEQFa8Xa8zhZgidO1AFc1DmIcPg/u/Z58wHbjIcqDjvzKA63213Ud34NJsRtF6y
 +EJrIUZiTtj5q1pJgDmqlOv6ImmQtgW/AN51vNXCNNCyS9OsSgQm0DK5/f485HNc
 2y5NE5hpijso69HFet5chuT3DiDLz/0dxmgCm/w9CRRzkHxYl3lxV/v07B+rZBo5
 cWplFfvJqX7PvQtcP0sPPzZUfGT/vOeTboWprQwI4R3RObS18xLqlq6DEvOTmnqW
 Jh+9uNBq4+kwSz5GcYjpwvj7+W0FPgIaBVRHrEW9qeXkgDpYloPtnEt8C8GmO6Bt
 O0bgIzETq9mnRTA+VesIfjmTa4IYRDDUoDwGTw5CnW3jaZmtYJh8GhgZulMfPfyK
 vfWQkY2OesXFwct0rU8tFiswTPeTRgXqL3AsPYjTPAHx1kfBpvfOQTCzzT7eSBr7
 jykd9EXsXrYb/rpIxW7j6KjPpaWu+EouK06wc4TIBGrrWVTIV0ZvybzOBgf0FnpS
 UDx87OyQb8x9TDMrfKf6bmJyly8y1dXkutFYY4XKIGUydlXIf0kn7AnIXW6SR7mX
 fTEdLFMZ03ViCojtah5r
 =bZFY
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "The clk changes for this release cycle are mostly dominated by new
  device support in terms of LoC, but there has been some cleanup in the
  core as well as the usual minor clk additions to various drivers.

  Core:
   - parent tracking has been simplified
   - CLK_IS_ROOT is now a no-op flag, cleaning up drivers has started
   - of_clk_init() doesn't consider disabled DT nodes anymore
   - clk_unregister() had an error path bug squashed
   - of_clk_get_parent_count() has been fixed to only return unsigned ints
   - HAVE_MACH_CLKDEV is removed now that the last arch user (ARM) is gone

  New Drivers:
   - NXP LPC18xx creg
   - QCOM IPQ4019 GCC
   - TI dm814x ADPLL
   - i.MX6QP

  Updates:
   - Cyngus audio clks found on Broadcom iProc devices
   - Non-critical fixes for BCM2385 PLLs
   - Samsung exynos5433 updates for clk id errors, HDMI support,
     suspend/resume simplifications
   - USB, CAN, LVDS, and FCP clks on shmobile devices
   - sunxi got support for more clks on new SoCs and went through a
     minor refactoring/rewrite to use a simpler factor clk construct
   - rockchip added some more clk ids and added suport for fraction
     dividers
   - QCOM GDSCs in msm8996
   - A new devm helper to make adding custom actions simpler (acked by Greg)"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (197 commits)
  clk: bcm2835: fix check of error code returned by devm_ioremap_resource()
  clk: renesas: div6: use RENESAS for #define
  clk: renesas: Rename header file renesas.h
  clk: max77{686,802}: Remove CLK_IS_ROOT
  clk: versatile: Remove CLK_IS_ROOT
  clk: sunxi: Remove use of variable length array
  clk: fixed-rate: Remove CLK_IS_ROOT
  clk: qcom: Remove CLK_IS_ROOT
  doc: dt: add documentation for lpc1850-creg-clk driver
  clk: add lpc18xx creg clk driver
  clk: lpc32xx: fix compilation warning
  clk: xgene: Add missing parenthesis when clearing divider value
  clk: mb86s7x: Remove CLK_IS_ROOT
  clk: x86: Remove clkdev.h and clk.h includes
  clk: x86: Remove CLK_IS_ROOT
  clk: mvebu: Remove CLK_IS_ROOT
  clk: renesas: move drivers to renesas directory
  clk: si5{14,351,70}: Remove CLK_IS_ROOT
  clk: scpi: Remove CLK_IS_ROOT
  clk: s2mps11: Remove CLK_IS_ROOT
  ...
2016-03-23 06:06:45 -07:00
Linus Torvalds
5a6b7e53d0 ARM: DT updates for v4.6
These are all the updates to device tree files for 32-bit platforms,
 plus a couple of related 64-bit updates:
 
 New SoC support:
  - Allwinner A83T
  - Axis Artpec-6 SoC
  - Mediatek MT7623 SoC
  - TI Keystone K2G SoC
  - ST Microelectronics stm32f469
 
 New board or machine support:
  - ARM Juno R2
  - Buffalo Linkstation LS-QVL and LS-GL
  - Cubietruck plus
  - D-Link DIR-885L
  - DT support for ARM RealView PB1176 and PB11MPCore
  - Google Nexus 7
  - Homlet v2
  - Itead Ibox
  - Lamobo R1
  - LG Optimus Black
  - Logicpd dm3730
  - Raspberry Pi Model A
 
 Other changes include
  - Lots of updates for Qualcomm APQ8064, MSM8974 and others
  - Improved support for Nokia N900 and other OMAP machines
  - Common clk support for lpc32xx
  - HDLCD display on ARM
  - Improved stm32f429 support
  - Improved Renesas device support, r8a779x and others
  - Lots of Rockchip updates
  - Samsung cleanups
  - ADC support for Atmel SAMA5D2
  - BCM2835 (Raspberry Pi) improvements
  - Broadcom Northstar Plus enhancements
  - OMAP GPMC rework
  - Several improvements for Atmel SAMA5D2 / Xplained
  - Global change to remove inofficial "arm,amba-bus" compatible string
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIVAwUAVu67PmCrR//JCVInAQIZlA//UV7DK8tHNvLCuHBX8MnW5xxljUWFCoFp
 Zsi9LJj+KDIE+rpY65n75+il+rT1ZcgaITzH+Qvaq75f51ZwW7HY5jHiPYsINa80
 oMtbdWlnpNIH48jD5yMKaDTE8md7lZ8tgA//6aw1doDx2LYX4D1QRG6XI1OC6E62
 OjlzXkTTe50Aowi6aMQz4PZQM89m09FT0aw/Qsokh0fcW8oXhXcJSlFgLF/tZUYs
 VU4oWshUX2/VW3ShXlAJdrItpdDIogwZtDS7xKXmk6AHfapLb7s4HuEOInqbeOa7
 QWTjtoVj6ZHyeVptyn6kj5+xOdL4bXAT4Kg2TctF1iv0I6XG8CKflNqOJt2wLR1M
 DP0VQXK0TmKCeI+vbRhniLRP7EPYp4N9KFAe6M6aVP3nKYX81EqWdtPjuwp7GxAC
 sIGad2ocynKW4Eb4xOD2/5EwzkhwHv7SPQTCyCyQo8ILGN5MOSBZJOC1kXATTtbq
 u7LbOLyFMeWPJFYZyPxe79MwiX0dfJekrZYQ1tYL3MEQqQNmbY6+r+6QLMhT+iSj
 SE1oBaAReOuZUquiBEt398OvdfQ/n+F5BasKKCojXuhueNO3+rY7mT5X/vmOs2eh
 CUpfl766CixaZmF6p8es1Qeu64ASODbPiOw3Dv5Cgwcbfy/C3b3ccty0zazlOaNJ
 Sm6VXU3RavA=
 =RLUc
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM DT updates from Arnd Bergmann:
 "These are all the updates to device tree files for 32-bit platforms,
  plus a couple of related 64-bit updates:

  New SoC support:
   - Allwinner A83T
   - Axis Artpec-6 SoC
   - Mediatek MT7623 SoC
   - TI Keystone K2G SoC
   - ST Microelectronics stm32f469

  New board or machine support:
   - ARM Juno R2
   - Buffalo Linkstation LS-QVL and LS-GL
   - Cubietruck plus
   - D-Link DIR-885L
   - DT support for ARM RealView PB1176 and PB11MPCore
   - Google Nexus 7
   - Homlet v2
   - Itead Ibox
   - Lamobo R1
   - LG Optimus Black
   - Logicpd dm3730
   - Raspberry Pi Model A

  Other changes include
   - Lots of updates for Qualcomm APQ8064, MSM8974 and others
   - Improved support for Nokia N900 and other OMAP machines
   - Common clk support for lpc32xx
   - HDLCD display on ARM
   - Improved stm32f429 support
   - Improved Renesas device support, r8a779x and others
   - Lots of Rockchip updates
   - Samsung cleanups
   - ADC support for Atmel SAMA5D2
   - BCM2835 (Raspberry Pi) improvements
   - Broadcom Northstar Plus enhancements
   - OMAP GPMC rework
   - Several improvements for Atmel SAMA5D2 / Xplained
   - Global change to remove inofficial "arm,amba-bus" compatible
     string"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (350 commits)
  ARM, ARM64: dts: drop "arm,amba-bus" in favor of "simple-bus"
  ARM: dts: artpec: dual-license on artpec6.dtsi
  ARM: dts: ux500: add synaptics RMI4 for Ux500 TVK DT
  arm64: dts: juno/vexpress: fix node name unit-address presence warnings
  arm64: dts: foundation-v8: add SBSA Generic Watchdog device node
  ARM: dts: at91: sama5d2 Xplained: add leds node
  ARM: dts: at91: sama5d2 Xplained: add user push button
  ARM: dts: at91: sama5d2 Xplained: set pin muxing for usb gadget and usb host
  ARM: dts: stm32f429: Enable Ethernet on Eval board
  ARM: dts: omap3-sniper: TWL4030 keypad support
  Revert "ARM: dts: DRA7: Add dt nodes for PWMSS"
  ARM: dts: dm814x: dra62x: Disable wait pin monitoring for NAND
  ARM: dts: dm814x: dra62x: Fix NAND device nodes
  ARM: dts: stm32f429: Add Ethernet support
  ARM: dts: stm32f429: Add system config bank node
  ARM: dts: at91: sama5d2: add nand0 and nfc0 nodes
  ARM: dts: at91: sama5d2: add dma properties to UART nodes
  ARM: dts: at91: sama5d2 Xplained: Correct the macb irq pinctrl node
  ARM: dts: exynos: Don't overheat the Odroid XU3-Lite on high load
  ARM: dts: exynos: Add cooling levels for Exynos5422/5800 CPUs
  ...
2016-03-20 15:15:48 -07:00
Martin Sperl
d3d6f15fd3 clk: bcm2835: add missing osc and per clocks
Add AVE0, DFT, GP0, GP1, GP2, SLIM, SMI, TEC, DPI, CAM0, CAM1, DSI0E,
and DSI1E.  PULSE is not added because it has an extra divider.

Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Eric Anholt <eric@anholt.net>
2016-03-17 10:42:17 -07:00
Martin Sperl
728436956a clk: bcm2835: add missing PLL clock dividers
Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Eric Anholt <eric@anholt.net>
2016-03-17 10:42:17 -07:00
Martin Sperl
33b689600f clk: bcm2835: enable management of PCM clock
Enable the PCM clock in the SOC, which is used by the
bcm2835-i2s driver.

Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Eric Anholt <eric@anholt.net>
2016-03-17 10:42:17 -07:00
Martin Sperl
56eb3a2ed9 clk: bcm2835: remove use of BCM2835_CLOCK_COUNT in driver
As the use of BCM2835_CLOCK_COUNT in
include/dt-bindings/clock/bcm2835.h is frowned upon as
it needs to get modified every time a new clock gets introduced
this patch changes the clk-bcm2835 driver to use a different
scheme for registration of clocks and pll, so that there
is no more need for BCM2835_CLOCK_COUNT to be defined.

Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Eric Anholt <eric@anholt.net>
2016-03-17 10:42:17 -07:00
Xing Zheng
f7e180222b clk: rockchip: add clock-id for rk3036 emac pll source clock
Suitable PLLs for the emac on the rk3036 are difficult to find
and one of them is the (continuously changing) APLL. So in most
cases it will be necessary to select a PLL manually.
So add a clock-id for it.

Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Cc: Xing Zheng <zhengxing@rock-chips.com>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: linux-clk@vger.kernel.org
Cc: linux-rockchip@lists.infradead.org
Signed-off-by: David S. Miller <davem@davemloft.net>
2016-03-16 19:28:02 -04:00
Xing Zheng
fb781c8e2a clk: rockchip: add node-id for rk3036 emac hclk
Add the node-id for the emac hclk to the binding header.

Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Cc: Xing Zheng <zhengxing@rock-chips.com>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: linux-clk@vger.kernel.org
Cc: linux-rockchip@lists.infradead.org
Signed-off-by: David S. Miller <davem@davemloft.net>
2016-03-16 19:28:01 -04:00
Stephen Boyd
37655fae0c Inclusion of the rk3368 fractional dividers into our handling scheme,
fixes for missing error-handling in mmc-phase, inverters and cpu-clocks
 and some more clock-ids.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABCAAGBQJW2N6oAAoJEPOmecmc0R2BUgQH/R+inbboTw31Gsa5KOEeoGDb
 BwET4Cw5rD2ns1rOGZtQ3nFGv5I7fKq1ChMuQVMAMbv/60rEjGm3ACOWbxrTg2+P
 o7FVSGoE+fOPZKfxbPGC3c1rSDnlAwwHhZWxXKvTrybAKdhoiHhzbx5ycc5r57vw
 uVzLWJL3PgkOCnc4lbE8Dtr6DYEaIA0w7sZ0oplXhMxm49YBzlJi1zWcx400Xb8D
 ourvqbD2aWGSTfjWcQlxSHCHSVKZDfZRfJI4c16XAYJ1SXtWsAUqTTpDAgFgrFI/
 o9v+V4JMKGCYfqb1P+h8dMvc/8FJgvwdRY2OtWAWVlrYZpZ9cp+nDeLP2TEv554=
 =ekax
 -----END PGP SIGNATURE-----

Merge tag 'v4.6-rockchip-clk2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next

Pull second batch of rockchip clk updates from Heiko Stuebner:

Inclusion of the rk3368 fractional dividers into our handling scheme,
fixes for missing error-handling in mmc-phase, inverters and cpu-clocks
and some more clock-ids.

* tag 'v4.6-rockchip-clk2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  clk: rockchip: include downstream muxes into fractional dividers on rk3368
  clk: rockchip: set the clock ids for RK3228 HDMI
  clk: rockchip: set the clock ids for RK3228 VOP
  clk: rockchip: add the tsadc clocks found on rk3228 SoCs
  clk: rockchip: add the new clock ids for RK3228 HDMI
  clk: rockchip: add the new clock ids for RK3228 VOP
  clk: rockchip: add id of the tsadc clock found on rk3228 SoCs
  clk: rockchip: fix coding style for clk-cpu.c
  clk: rockchip: don't return NULL when registering mmc branch fails
  clk: rockchip: don't return NULL when registering inverter fails
  clk: rockchip: check grf when waiting pll lock
  clk: rockchip: disable alt_parent clk in err cases when registering cpuclk
2016-03-04 09:36:29 -08:00
Stephen Boyd
5788923b27 Merge tag 'imx-clk-4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into clk-next
Pull i.MX clk updates from Shawn Guo:

The i.MX clock update for 4.6:
- Add the clock driver support for the latest i.MX6 family SoCs
  addition - i.MX6QP.
- Clean up the whitespace in i.MX6UL clock driver and add the missing
  KPP clock.
- Correct pwm7 clock name in i.MX6UL clock driver.

* tag 'imx-clk-4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  clk: imx: add kpp clock for i.MX6UL
  clk: imx: whitespace cleanup; no functional change
  clk: imx: correct pwm7 clock name in driver for i.MX6UL
  clk: imx: Add clock support for imx6qp
2016-03-02 14:31:47 -08:00
Arnd Bergmann
ca2942cc62 Second Round of Renesas ARM Based SoC DT Updates for v4.6
* Add L2 cache-controller nodes to r8a779[0134] and r8a73a4
 * Add etheravb support to r8a7794
 * Correct JP3 jumper description on Porter
 * Enable thermal zone on  r8a779[013]
 * Replace gpio-key, wakeup with wakeup-source property on r8a7794
 * Use demuxer for IIC0/I2C0 on lager
 * Use fallback etheravb, pci and pcie compatibility strings as appropriate
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJWz5FzAAoJENfPZGlqN0++SJ8P/jYH0fYoLgoB0vyFbR9iUS/p
 pEfYMZACd85DupkrnqepsMyvlOlRy12ewZTfokLEujm6KACPS7PjoYidj6zLe+Jq
 Z5Y5na4yHzsgj+RwZkLKEmnemqq4xQ5GOHFQYsuc1PJU8NygRYYyNYLma+ycX5mZ
 cCxWiYGsdzcChqLVDEwoqDZiBM8GOfK2bhbZeQc0hm35WGkbfrEErG+A8Tnvw/TD
 6sxHCCBsEvZcMUaa40VGRjPJ2gen1U3G7/lMl69a2LYl/rLuRCVacyEIUjbpx6Yk
 zgYAfUBncuRXTFDbBZRNTYUeZMPIuWwxBdaiCTSIAk7+bogMwnbVEX+qNxavwdYB
 IematCnY9+UL7LCjx7hlo9DcfM1JNshcIcEBQFe4HO0UawooykSC7EfVt7CiaTho
 mjK03kfImWZZPXHjj2dJxR0qYLm2TDO43HvS7QGCgHKJIfL6udyqAdMV/X9N4FVM
 7en8a9KsbwByU3bo+4B+FyE7Qzq6PGyqgOI3p6LYFzhZ3uHv3Ty98Sa8viM0KJzH
 CnYhM/Ma4b5DBNEzwIoaXJAZtuEd/mtMFqJ2OxUA88lOyDdXkhaJWzsJXX3Zv2bs
 3JVXPWxTudboUnJkYH9vOZyvb7gub5uMKwQeKVver6BunNn1hd5Kmct/HlvYcKSd
 WDfNUGpwhqN8HlbTJMK6
 =dcPo
 -----END PGP SIGNATURE-----

Merge tag 'renesas-dt2-for-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt

Merge "Second Round of Renesas ARM Based SoC DT Updates for v4.6" from
Simon Horman:

* Add L2 cache-controller nodes to r8a779[0134] and r8a73a4
* Add etheravb support to r8a7794
* Correct JP3 jumper description on Porter
* Enable thermal zone on  r8a779[013]
* Replace gpio-key, wakeup with wakeup-source property on r8a7794
* Use demuxer for IIC0/I2C0 on lager
* Use fallback etheravb, pci and pcie compatibility strings as appropriate

* tag 'renesas-dt2-for-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: dts: r8a7790: use fallback etheravb compatibility string
  ARM: dts: r8a7790: lager: use demuxer for IIC0/I2C0
  ARM: dts: r8a7794: add EtherAVB support
  ARM: dts: r8a7794: add EtherAVB clock
  ARM: dts: r8a7794: replace gpio-key, wakeup with wakeup-source property
  ARM: dts: r8a7794: Add L2 cache-controller node
  ARM: dts: r8a7793: Add L2 cache-controller node
  ARM: dts: r8a7791: Add L2 cache-controller node
  ARM: dts: r8a7790: Add L2 cache-controller nodes
  ARM: dts: r8a73a4: Add L2 cache-controller nodes
  ARM: dts: r8a7793: enable to use thermal-zone
  ARM: dts: r8a7791: enable to use thermal-zone
  ARM: dts: r8a7790: enable to use thermal-zone
  ARM: dts: porter: fix JP3 jumper description
  ARM: dts: r8a7794: use fallback pci compatibility string
  ARM: dts: r8a7791: use fallback pci compatibility string
  ARM: dts: r8a7790: use fallback pci compatibility string
  ARM: dts: r8a7791: use fallback pcie compatibility string
  ARM: dts: r8a7790: use fallback pcie compatibility string
2016-02-29 16:22:09 +01:00
Lothar Waßmann
f6c3aec2f7 clk: imx: add kpp clock for i.MX6UL
Add the necessary clock to use the KPP interface on i.MX6UL.

Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2016-02-28 10:45:29 +08:00
Lothar Waßmann
9797d81936 clk: imx: whitespace cleanup; no functional change
remove whitespace before TAB.

Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2016-02-28 10:45:13 +08:00
Yakir Yang
2d2671ea4b clk: rockchip: add the new clock ids for RK3228 HDMI
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-02-26 01:53:35 +01:00
Yakir Yang
31b1fed36e clk: rockchip: add the new clock ids for RK3228 VOP
There are four clocks that vop module would need to operate:
    DCLK_VOP,  HCLK_VOP,  SCLK_VOP,  ACLK_VOP,

Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-02-26 01:52:29 +01:00
Caesar Wang
3629e70b8c clk: rockchip: add id of the tsadc clock found on rk3228 SoCs
This patch adds 'SCLK_TSADC' and 'PCLK_TSADC' id found on rk3228 SoCs.
That will be needed by TSADC controller.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Acked-by: Michael Turquette <mturquette@baylibre.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-02-26 01:50:51 +01:00
Stephen Boyd
7450ca6c32 Mostly correction of errors in the exynos5433 SoC
clocks definition, dropping read-only registers
 from the suspend/resume register save/restore list
 and exposition of two clocks required for the
 exynos5433 HDMI subsystem operation.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABCAAGBQJWzuPVAAoJEE1bIKeAnHqLXKQP/jOSwlIp+q9GED7fHmX2hNN+
 LLw65kJKv4FEd7LFEKAnkR9qOs79JxgSJNWvEIFS3ePnpNjLr/WchX7P8jg5N8or
 axhQiYRlKoVOU7aqCLKq1zvDZbNyH/0C5cKZlY/2FVeGKFBXltOgoiM6mFrzLx2e
 6INoP8cHeb4mNy/GdjmiKxjrzJcWqE6OIAfMPkWUP7wzHadWxlZ5sUhWihTEgkB/
 JWY95M/nwTBIpwAD2OpqcjfNOvBWlCEaLxOHUOiEJmq+MsWvXFsHaYlc0yAvD4Dc
 da1Mb0iQlz3rZ8FSOuGfBEGo/4SKJUK/qszpsDtjc5auaiXoYdYIwCdSDr0CSJn2
 rmgI9+71F1KcJuXoCnyqIlWkPPRzJnJSxQ6zLB1Q/8WA9li69CVVlSUdbIGvuCfr
 xp30leZq7jTaLdD4gYeSMyMtqoybE2g/5HGJTT+ahMCTvSQvo2MPz4owIEyAbJ5w
 nTW803REVQqo9g5MQnn/G/UZ4l77BzAzcQOhf3nTerXOr9E0Qz/SlMPZda3I6orI
 Bx0Tg+kYNvazaCF1MyPOMUk6rgCdoT1vc1TtLKe/UYoJRZKj16a84EeBlQU5OCYd
 PqKgR9d0pO4JXkKFmWvU3p+WK6VtdhVAkNUYj4xHsktfgALfEGxsC7N6dK9q/lsN
 n0AxqyCSeiovYcQWRvAH
 =B/4a
 -----END PGP SIGNATURE-----

Merge tag 'clk-samsung-4.6' of git://linuxtv.org/snawrocki/samsung into clk-next

Pull Samsung clk driver changes from Sylwester Nawrocki:

Mostly correction of errors in the exynos5433 SoC
clocks definition, dropping read-only registers
from the suspend/resume register save/restore list
and exposition of two clocks required for the
exynos5433 HDMI subsystem operation.

* tag 'clk-samsung-4.6' of git://linuxtv.org/snawrocki/samsung:
  clk: samsung: exynos5433: Fix wrong registers of PCLK_GSCL_SMMU clocks
  clk: samsung: exynos5433: Fix mout_aclk_cam1*_user clocks definition
  clk: samsung: exynos5433: Drop RO registers from the save/restore lists
  clk: samsung: exynos5433: Fix definitions of SCLK ISP SENSOR0 clocks
  clk: samsung: exynos5433: Fix definitions of MUX_SEL_CAM04 clocks
  clk: samsung: exynos5433: Fix typos in *_ISP_MPWM clock names
  clk/samsung: exynos5433: add pclk_decon clock
  clk/samsung: exynos5433: add definitions of HDMI-PHY output clocks
2016-02-25 15:18:12 -08:00
Stephen Boyd
0af1a24f5b Merge branch 'clk-ipq4019' into clk-next
* clk-ipq4019:
  clk: qcom: Add IPQ4019 Global Clock Controller support
2016-02-25 14:32:27 -08:00
Varadarajan Narayanan
6971e86399 clk: qcom: Add IPQ4019 Global Clock Controller support
This patch adds support for the global clock controller found on
the IPQ4019 based devices. This includes UART, I2C, SPI etc.

Signed-off-by: Pradeep Banavathi <pradeepb@codeaurora.org>
Signed-off-by: Senthilkumar N L <snlakshm@codeaurora.org>
Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
Acked-by: Andy Gross <andy.gross@linaro.org>
[sboyd@codeaurora.org: Drop 0x16024 enable_reg in crypto_ahb]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-02-25 14:32:12 -08:00
Olof Johansson
fc2834a465 Renesas ARM Based SoC DT Updates for v4.6
* Use SCIF and USBHS fallback compatibility strings
 * Add Baud Rate Generator (BRG) support for (H)SCIF
 * Enable SCIF_CLK frequency and pins
 * Use GIC_* defines
 * Enable audio on r8a7793/gose
 * Enable HDMI vidio out on r8a7793
 * Enable i2c on r8a7793/gose
 * Enable QSPI on alt
 * Enable GPIO keys and leds on gise
 * Enable audio on porter
 * Enable DU on porter
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJWvirlAAoJENfPZGlqN0++H/MQAI7AQMgaAV5ejeyl7bgtsrBM
 7Xq8MojRIMqCXgpEGsJ09jqnuOQIDHEaAHLNX4FWwGmJD95yCudFoeNagr79b9WF
 oBHtkB9p60hw1Qz1fx9d/CjQrmAk7/TiLGBa81wNiz2D7xxmqXxYB3mdsA2oNmdV
 2RPnROPM6uiZMhFM5ePiS9ku++Mv5/lvQZYnMlP8PilPpfp1VHCjcN/CXE+3AzV2
 xH75tyg1A60rRmn4f2MP9kigQXC9OBdcGchI1ejwCnMGfw0THWjchAnNQ7GpV54a
 N0C0pCIfGrluBXHUmvN9Fof1t5R+PNc4tyaC1SHpAEKp1uq9xKAadzonbQy9UWA2
 A+iFCx0vkPo/JEbui1gE3Pixekthlk9kEXeJVBhobiraDoAIqLir5EztYLgPZUGg
 wLxm1gAB6N7DrJGXxsl1ZsnkcZH4Qooy3D7kCYCqGGdse7hCIRLKdG/GXA8BK9Yz
 fYPQH34kqwNpOi3Um3/VivYJjk0srTsLNMNsRTDWe7WwH7h/eK7+XuhfnJaO8di+
 V0l6ptjldLwVFbpkr1RrUpIHTXoud99SfEAdu2SLADL6pumApjN2TjGTtdCzavSl
 XgdshCsPiPOZ7Ou8VFDSFjfGkkEBXOAw5CJTAy+mcxn1b+vEQ5scIv0uAD1koLTS
 5KyhSNdtYuBTjWk1lDlg
 =YmRO
 -----END PGP SIGNATURE-----

Merge tag 'renesas-dt-for-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt

Renesas ARM Based SoC DT Updates for v4.6

* Use SCIF and USBHS fallback compatibility strings
* Add Baud Rate Generator (BRG) support for (H)SCIF
* Enable SCIF_CLK frequency and pins
* Use GIC_* defines
* Enable audio on r8a7793/gose
* Enable HDMI vidio out on r8a7793
* Enable i2c on r8a7793/gose
* Enable QSPI on alt
* Enable GPIO keys and leds on gise
* Enable audio on porter
* Enable DU on porter

* tag 'renesas-dt-for-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (68 commits)
  ARM: dts: silk: Enable SCIF_CLK frequency and pins
  ARM: dts: porter: Enable SCIF_CLK frequency and pins
  ARM: dts: marzen: Enable SCIF_CLK frequency and pins
  ARM: dts: lager: Enable SCIF_CLK frequency and pins
  ARM: dts: koelsch: Enable SCIF_CLK frequency and pins
  ARM: dts: gose: Enable SCIF_CLK frequency and pins
  ARM: dts: bockw: Enable SCIF_CLK frequency and pins
  ARM: dts: alt: Enable SCIF_CLK frequency and pins
  ARM: dts: r8a7794: Add BRG support for (H)SCIF
  ARM: dts: r8a7793: Add BRG support for SCIF
  ARM: dts: r8a7791: Add BRG support for (H)SCIF
  ARM: dts: r8a7790: Add BRG support for (H)SCIF
  ARM: dts: r8a7779: Add BRG support for SCIF
  ARM: dts: r8a7778: Add BRG support for SCIF
  ARM: dts: r8a7794: Rename the serial port clock to fck
  ARM: dts: r8a7793: Rename the serial port clock to fck
  ARM: dts: r8a7791: Rename the serial port clock to fck
  ARM: dts: r8a7790: Rename the serial port clock to fck
  ARM: dts: r8a7779: Rename the serial port clock to fck
  ARM: dts: r8a7778: Rename the serial port clock to fck
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2016-02-24 14:02:53 -08:00
Sylwester Nawrocki
3c30e382ae clk: samsung: exynos5433: Fix typos in *_ISP_MPWM clock names
This fixes "MPWM" -> "WPWM" typo in 3 *ISP_MWPM clock definitions.

Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2016-02-23 12:48:11 +01:00
Sergei Shtylyov
255a40424e ARM: dts: r8a7794: add EtherAVB clock
Add the EtherAVB clock to the R8A7794 device tree.

Based on the commit eaa870b305 ("ARM: shmobile: r8a7791: add EtherAVB
clock").

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-19 14:54:10 +09:00
Michael Turquette
70750ff2c9 Introduction of a factor type and a variant containing a gate
to be able to also declare factor clocks in their correct
 place in the clock tree instead of having to register factor
 clocks in the init callback separately. And as always some more
 clock-ids and non-regression fixes for mistakes introduced in
 past kernel releases.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABCAAGBQJWuwINAAoJEPOmecmc0R2BUgMIAKmXROUpwuap5hhDv+XapDyc
 drU3DmOwFQeIiaODZQVFlx8CcXUN6h/8cPZnc4Qd/ChO73TxfvtWY3S7n0n3F/EH
 RIceQ30OHTUEYh/k449Sf/sTEOW68h4TdhaVrw2gJYKsJ5fg2ih5o6naWnWWE6Ig
 WUh+xeeYdG6L8hCLcUA8sujE3EpG5kJelnWiMBedx6CbuTSSfJcB9tTkg1eOa/R+
 jyBgYJJSuSEwG4mJijV61tanZw1FhWu+i4dEAGHkWgimuGekO4CEnRRczZ1hw7x2
 O/cBfpLW4D2iGMlrvyUhcB/pe/TmRdz4SfzDSTwLPtpCfqEiZRmxH4mwW4s8hv4=
 =igdK
 -----END PGP SIGNATURE-----

Merge tag 'v4.6-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next

Introduction of a factor type and a variant containing a gate
to be able to also declare factor clocks in their correct
place in the clock tree instead of having to register factor
clocks in the init callback separately. And as always some more
clock-ids and non-regression fixes for mistakes introduced in
past kernel releases.
2016-02-15 11:59:45 -08:00
Bai Ping
ee36027427 clk: imx: Add clock support for imx6qp
most of the clock tree structures on i.MX6 Quad Plus are
same as on i.MX6Q. there still some differences between
these two SOCs. compared to the i.XM6Q, the differents of
clocks on i.MX6QP is mainly on:

1. New clock gate added to support the PRE and PRG modules
2. 24MHz OSC clock option added to the UART, IPG, ECSPI, and
   CAN clock roots.
3. MMDC channel 1 clock gate is now controllable.
4. clock gating added to the LDB_DIx_IPU clocks on i.MX6QP
5. EMI clock root divider fix
6. other updates fo CSCMRx, CSCDRx and CS2CDR registers.

detailed infomation, please refer to the i.MX6QP RM.

Signed-off-by: Bai Ping <ping.bai@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2016-02-14 11:06:29 +08:00
Rajendra Nayak
7e824d5079 clk: qcom: gdsc: Add mmcc gdscs for msm8996 family
Add all gdsc data which are part of mmcc on msm8996 family

Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-02-11 16:34:03 -08:00
Rajendra Nayak
52111672f7 clk: qcom: gdsc: Add GDSCs in msm8996 GCC
Add all data for the GDSCs which are part of msm8996 GCC block

Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-02-11 16:26:19 -08:00
Sylvain Lemieux
7e0810c948 clk: lpc32xx: add HCLK PLL output configuration
This patch add the support to setup the HCLK PLL output
using the "assigned-clock-rates" parameter in the device tree.

If the option is not use, the clock setup by the kickstart
and/or bootloader remain unchanged.

The previous kernel version did not change the clock frequency
output setup by the kickstart and/or bootloader;
this version always setup the clock frequency output to 208MHz.

Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-02-10 12:45:16 -08:00
Stephen Boyd
f2626ba965 Merge branch 'clk-fixes' into clk-next
* clk-fixes:
  clk: tegra: super: Fix sparse warnings for functions not declared as static
  clk: tegra: Fix sparse warnings for functions not declared as static
  clk: tegra: Fix sparse warning for pll_m
  clk: tegra: Use definition for pll_u override bit
  clk: tegra: Fix warning caused by pll_u failing to lock
  clk: tegra: Fix clock sources for Tegra210 EMC
  clk: tegra: Add the APB2APE audio clock on Tegra210
  clk: tegra: Add missing of_node_put()
  clk: tegra: Fix PLLE SS coefficients
  clk: tegra: Fix typos around clearing PLLE bits during enable
  clk: tegra: Do not disable PLLE when under hardware control
  clk: tegra: Fix pllx dyn step calculation
  clk: tegra: pll: Fix potential sleeping-while-atomic
  clk: tegra: Fix the misnaming of nvenc from msenc
  clk: tegra: Fix naming of MISC registers
  clk: tegra: Remove improper flags for lock_enable
  clk: tegra: Fix divider on VI_I2C
2016-02-08 14:01:10 -08:00
Andrzej Hajda
02ed910cb4 clk/samsung: exynos5433: add pclk_decon clock
This undocumented gate clock is used by DECON IP.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2016-02-03 11:03:50 +01:00
Andrzej Hajda
68b2206a57 clk/samsung: exynos5433: add definitions of HDMI-PHY output clocks
HDMI driver must re-parent respective muxes during HDMI-PHY on/off
to HDMI-PHY output clocks. To reference those clocks their
definitions should be added.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2016-02-03 11:03:34 +01:00
Jon Hunter
2956994168 clk: tegra: Add the APB2APE audio clock on Tegra210
The APB2APE clock for the audio subsystem is required for powering up the
audio power domain and accessing the various modules in this subsystem on
Tegra210 devices. Add this clock for Tegra210.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-02-02 15:49:29 +01:00
Srinivas Kandagatla
5540ac8da1 clk:gcc-msm8916: add missing mss_q6_bimc_axi clock
This clock is required for loading the qdsp firmware.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-01-29 16:35:22 -08:00
Simran Rai
bcd8be1398 clk: iproc: Add support for Cygnus audio clocks
This patch adds support for Broadcom Cygnus audio PLL and leaf
clocks

Signed-off-by: Simran Rai <ssimran@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Ray Jui <rjui@broadcom.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-01-29 16:31:38 -08:00
Simon Horman
072d326542 ARM: dts: r8a7793: add MSTP10 clocks to device tree
Instantiate MSTP10 clocks in r8a7793 device tree.

Based on similar work for the r8a7791 by Kuninori Morimoto.

Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-01-29 09:28:38 +09:00
Paweł Jarosz
b682572fc5 clk: rockchip: Add new id for rk3066 tsadc clock
This patch adds new id for the sclk supplying the tsadc on rk3066 socs.

Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-01-26 01:07:26 +01:00
Linus Torvalds
6d1c244803 ARM: DT updates for v4.5
As usual, the bulk of this release is again DT file contents.
 
 There's a huge number of changes here, and it's challenging to give a crisp
 overview of just what is in here. To start with:
 
 New boards:
 
 - TI-based DM3730 from LogicPD (Torpedo)
 - Cosmic+ M4 (nommu) initial support (Freescale Vybrid)
 - Raspberry Pi 2 DT files
 - Watchdog on Meson8b
 - Veyron-mickey (ASUS Chromebit) DTS
 - Rockchip rk3228 SoC and eval board
 - Sigma Designs Tango4
 
 Improvements:
 
 - Improved support for Qualcomm APQ8084, including Sony Xperia Z DT files
 - Misc new devices for Rockchip rk3036 and rk3288
 - Allwinner updates for misc SoCs and systems
 
 ... and a _large_ number of other changes across the field. Devices
 added to SoC DTSI and board DTS files for a number of SoC vendors, new
 product boards on already-supported SoCs, cleanups and refactorings of
 existing DTS/DTSI files and a bunch of other changes.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJWnr6fAAoJEIwa5zzehBx3p+gP+wYLUqXjCYgyu6oJPxJbWghj
 gPc4QJmhVlAWTqvE7Ut7RumWzGa7nUEH2QF9tiCLbDAw8727HJXhRHknFwaCsX45
 BsvFQaKY99ClfUhoSI9GRa8e2jEArjzEPqkynHW/8FM20qWaj/Z8DDfixG75gR8u
 onrMw6kprNGwmyQwqu5zLDXhUBCQIs1xRRSabUjV1P5420dbBaGgtmQrdj7k+JDt
 wo9SKiG6d9CSYil3r7BC+0JwzbKNBxRGs2vv1BJOfbZ3Lj+uC0vj1AxoF/p7dOHy
 ohuvt7UwwtoUzzFMcMUo7E8qxl9u6bbnPDlUoRF7DVVi5SQoeZd8BOZXOdLRN2OQ
 qtgsmziDxtvh7Ydj6i89D69x7+GurAFcP8Aturprc5Zd5lO70PAYBD379IhIZ8y1
 MVJltIEeuUZo7BaVBCHWQY9jJRtI3bAU6JdFPrFROsuo810IYd72Wbb1ZCfF7SV7
 nBRvV7e71VQxb48c3p8Et5FntHuXfUlhkMrQ7Cb+2ugB/diGgZB9NfrZbP3Azv7f
 A5Ey9tNHaOCUxzYDCw80jTa7OwVWNJf2kOT1yikASk3vODKLv4E5YQ2DULnObWG7
 iRmLYuuGka4sMs0ZjpV3kaqs+8rWu08x2rEr5X0wfU+DalIzUWA2oDKSgPLJoacV
 gXKP039CIxQAiottcppA
 =XDLa
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM DT updates from Olof Johansson:
 "As usual, the bulk of this release is again DT file contents.

  There's a huge number of changes here, and it's challenging to give a
  crisp overview of just what is in here.  To start with:

  New boards:

   - TI-based DM3730 from LogicPD (Torpedo)
   - Cosmic+ M4 (nommu) initial support (Freescale Vybrid)
   - Raspberry Pi 2 DT files
   - Watchdog on Meson8b
   - Veyron-mickey (ASUS Chromebit) DTS
   - Rockchip rk3228 SoC and eval board
   - Sigma Designs Tango4

  Improvements:

   - Improved support for Qualcomm APQ8084, including Sony Xperia Z DT files
   - Misc new devices for Rockchip rk3036 and rk3288
   - Allwinner updates for misc SoCs and systems

  ... and a _large_ number of other changes across the field.  Devices
  added to SoC DTSI and board DTS files for a number of SoC vendors, new
  product boards on already-supported SoCs, cleanups and refactorings of
  existing DTS/DTSI files and a bunch of other changes"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (469 commits)
  ARM: dts: compulab: add new board description
  ARM: versatile: add the syscon LEDs to the DT
  dts: vt8500: Fix errors in SDHC node for WM8505
  ARM: dts: imx6q: clean up unused ipu2grp
  ARM: dts: silk: Add compatible property to "partitions" node
  ARM: dts: gose: Add compatible property to "partitions" node
  ARM: dts: porter: Add compatible property to "partitions" node
  ARM: dts: koelsch: Add compatible property to "partitions" node
  ARM: dts: lager: Add compatible property to "partitions" node
  ARM: dts: bockw: Add compatible property to "partitions" node
  ARM: dts: meson8b: Add watchdog node
  Documentation: watchdog: Add new bindings for meson8b
  ARM: meson: Add status LED for Odroid-C1
  ARM: dts: uniphier: fix a typo in comment block
  ARM: bcm2835: Add the auxiliary clocks to the device tree.
  ARM: bcm2835: Add devicetree for bcm2836 and Raspberry Pi 2 B
  ARM: bcm2835: Move the CPU/peripheral include out of common RPi DT.
  ARM: bcm2835: Split the DT for peripherals from the DT for the CPU
  ARM: realview: set up cache correctly on the PB11MPCore
  ARM: dts: Unify G2D device node with other devices on exynos4
  ...
2016-01-20 18:16:29 -08:00
Michael Turquette
b360ada3f1 clk: tegra: Changes for v4.5-rc1
This set of changes adds support for the Tegra210 SoC and contains a
 couple fixes and cleanups.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iQIcBAABCAAGBQJWcq0qAAoJEN0jrNd/PrOhxXIP/Rs/Iw27BVfk/ZYA+9SaYlNz
 vxqzGqWincnlaArLuhAnUHciAv5kl3HnHEuOyAgFevX/KrnmAb5JMXuw2FaSmzPc
 hjI5QqeieEHqp0wFSms/+abTiLX5t36bsY91QM8LfsdDOotrYGwEJcqDVEZkvMF2
 j3U4RuXEqt/C0r436lPcxf+flvy70K1cQkywsKupcS4YGl0QiQVeY80tHmIIyrkA
 2KLkxH5zgs/6xlcGblqzkFmrQntp5XJVgdlg1e2SZ5MOOme9fQCU0F3VueOX+WZH
 FL4C05eaXCaga398Z/UgJru1X8HWUKzrGBX6XXktxeTjt8ruKD8PEjX7SVPYMRI9
 Kzb3NE5qC0LEwe/BAX/4scZ6fZFyk+zfiC566YA3rcM1sg5mm4k8PCH3x2ktxXI1
 SZYmIrm+9hXXWfvXlKysaIsmGL0hlsRlu6m6g2OEYTUABDMBLnMsTbeC6Li4Gh0Q
 kXISNZpMhRaiB1hba3z2J/sVuMQcR33e86IaAX7WFY4ZRTNKfD0oB2zN5lZjPO6o
 U9ATB5ApPWn3t0JR88jaApPVELVb5q6ufra2zPesnS25CfS+zSXbskgnZe9UkPAs
 XVUprlmsNm+vZbZJpf3eNtW2IS0c0vCAYkafY3KjWcKVKvgKw5Zu8Kdo1TAJTHbP
 +xfWr3/iiwN5NNsYZbiH
 =/f1y
 -----END PGP SIGNATURE-----

Merge tag 'tegra-for-4.5-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into clk-next

clk: tegra: Changes for v4.5-rc1

This set of changes adds support for the Tegra210 SoC and contains a
couple fixes and cleanups.
2016-01-04 16:16:45 -08:00
Arnd Bergmann
d731afa460 Samsung DeviceTree updates and improvements for 4.5
1. eMMC/SDIO minor fixes usage of bindings on Snow and Peach
    Chromebooks.
 2. Remove FIMD from Odroid XU3-family because on XU3 it cannot be used
    yet and on XU3-Lite and XU4 it is not supported.
 3. Remove deprecated since June 2013 samsung,exynos5-hdmi.
 4. Add support for Pseudo Random Generator on Exynos4 (Trats2 for now).
    This depends on new SSS clock.
 5. Add rotator nodes for Exynos4 and Exynos5.
 6. Switch DWC3_1 on Odroid XU3 and XU3-Lite to peripheral mode because
    now it cannot be used as OTG.
 7. Cleanup the G2D usage on Exynos4 and add it to a proper domain
    in case of Exynos4210.
 8. Put MDMA1 in proper domain on Exynos4210 as well.
 9. Minor cleanups.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJWgc9VAAoJEME3ZuaGi4PXv+QP/iegxXdOr6Ta0usArPqzzkg3
 G1r6gcK/izjtEmGVqQDZjAN8HH9NeEpQnmirAttH7saqLW3+2GxQJkyekgUNruBN
 KT9igUtZpUAYD9JWBc2Q9OX6NTFBBn1zOt4d1Ea16u7uHllvvJl4jI4j3GAa8a5+
 OBA1nHP0Vg3ODWXhck67V/WojmH5XyTSBDspMimjAc9YShjM3vRc4rIfkGWieVCW
 /Hvu+dRJl2DKxrrQ8rHRnOUImQqVLN4V/1lUChhhZrecpFFn+2znKMgzmIVZDKNk
 oCW/uAHDR/i9O7GcLRbgzSfDRSwm1zM7DQKsffJmjdun6+46A04R8gPoF94uKKAk
 THG0yIsAqPn8wqHGAzNEPQPlCQ1u8iMBesNyrzZ6UqXbTBWXW/z9ueWQFb2TOQ7c
 gkr1trbfAjOxeeZ+fbOX7zOy+ghDyphSf6NytH147RIAPtVotNfEzPUFda+k7KyU
 CXGiSPVHaKntFhrr25PDk7iHXbMFUfMiGFGzz3sHaYD1FKHMJN0Simp+H1uK1sgA
 I5HXwtzkORLaM2HMR5+vfJlptks9PO9oEOioVxZbe9/VLo1/Iuylf09h6xgzJ2W6
 jE0rRWogBD6mntcGd+HpBN/4p09IIfHC1KocrryltzIJKvebeaoDvcnZKfBy3Hzd
 GDaBtsyg+BNb6LZiRRS6
 =LMzD
 -----END PGP SIGNATURE-----

Merge tag 'samsung-dt-4.5-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt

Merge "Samsung DeviceTree updates and improvements for 4.5" from Krzysztof Kozlowski:

1. eMMC/SDIO minor fixes usage of bindings on Snow and Peach
   Chromebooks.
2. Remove FIMD from Odroid XU3-family because on XU3 it cannot be used
   yet and on XU3-Lite and XU4 it is not supported.
3. Remove deprecated since June 2013 samsung,exynos5-hdmi.
4. Add support for Pseudo Random Generator on Exynos4 (Trats2 for now).
   This depends on new SSS clock.
5. Add rotator nodes for Exynos4 and Exynos5.
6. Switch DWC3_1 on Odroid XU3 and XU3-Lite to peripheral mode because
   now it cannot be used as OTG.
7. Cleanup the G2D usage on Exynos4 and add it to a proper domain
   in case of Exynos4210.
8. Put MDMA1 in proper domain on Exynos4210 as well.
9. Minor cleanups.

* tag 'samsung-dt-4.5-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (21 commits)
  ARM: dts: Unify G2D device node with other devices on exynos4
  ARM: dts: Add power domain to G2D device on exynos4210
  ARM: dts: MDMA1 device belongs to LCD0 power domain on exynos4210
  ARM: dts: Remove unneeded GPIO include in exynos4412-odroidu3
  ARM: dts: exynos4210-universal_c210: Disable DMA for UARTs
  ARM: dts: Use peripheral mode for dwc3_1 on exynos5422-odroidxu3
  ARM: dts: Add rotator node on exynos5420
  ARM: dts: Add rotator node on exynos5250
  ARM: dts: Fix power domain for sysmmu-rotator device on exynos4
  ARM: dts: Add rotator nodes on exynos4
  ARM: dts: Enable PRNG module on exynos4412-trats2
  ARM: dts: Add PRNG module for exynos4
  dt-bindings: remove deprecated compatible string from exynos-hdmi
  ARM: dts: Remove fimd node from exynos5422-odroidxu3-common
  ARM: dts: Mark eMMC as non-removable in exynos5250-snow-common
  ARM: dts: Remove broken-cd from eMMC node in exynos5420-peach-pi
  ARM: dts: Remove broken-cd from eMMC node in exynos5800-peach-pi
  ARM: dts: Mark SDIO as non-removable in exynos5250-snow-common
  ARM: dts: Mark SDIO as non-removable in exynos5420-peach-pit
  ARM: dts: Mark SDIO as non-removable in exynos5800-peach-pi
  ...
2015-12-31 17:31:56 +01:00
Michael Turquette
82d0f8bc4b Merge branch 'clk-bcm2835' into clk-next 2015-12-24 20:39:02 -08:00
Remi Pommarel
cfbab8fbab clk: bcm2835: Add PWM clock support
Register the pwm clock for bcm2835.

Signed-off-by: Remi Pommarel <repk@triplefau.lt>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2015-12-24 20:38:38 -08:00
Michael Turquette
5b50c522d5 Merge branch 'clk-lpc32xx' into clk-next 2015-12-24 12:34:29 -08:00
Vladimir Zapolskiy
d26f4cc74f dt-bindings: clock: add NXP LPC32xx clock list for consumers
The change adds a list of NXP LPC32xx clocks, which can be requested
by clock consumers.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2015-12-24 12:31:22 -08:00
Michael Turquette
ce6dd266d5 Merge branch 'clk-bcm2835' into clk-next 2015-12-22 16:49:38 -08:00
Eric Anholt
9f697864b3 clk: bcm2835: Add bindings for the auxiliary peripheral clock gates.
These will be used for enabling UART1, SPI1, and SPI2.

Signed-off-by: Eric Anholt <eric@anholt.net>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2015-12-22 16:46:58 -08:00
Olof Johansson
84829814d6 The i.MX device tree updates for 4.5:
- New boards support: imx51-ts4800, imx6q-novena, CompuLab imx7d SoM/SBC,
   vf610m4-cosmic
 - Add ADC device support for imx6ul and imx7d
 - Remove config space from PCIe controller ranges property for i.MX6
 - Add Vivante GPU nodes for i.MX6
 - Add DCU, LCD, and SATA devices for LS1021A
 - A series to update Ventana gw5xxx boards getting HDMI and LVDS to work
   simultaneously and devices like PWM and SPI added
 - Quite a few random cleanups and minor updates
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABAgAGBQJWeV5EAAoJEFBXWFqHsHzOk8YH/RrzIcDxVa7E6PiVErJmDluH
 ihMgY1mQcgXBcBEVKc0F9gKXZVN7W1xHGTHxVZp83mTxEJArBjFhojFQYReUaALU
 sQKot0sD8EWBlcC+fvuLzhHc8jE2Udioi/Ys/kgl8T82Q/LXTCnUmBnsPaVshqod
 WQ4i4Hk/QV6FbCEgvJvwEMEth53JYLVlAkuVbXi32eo7iv6u6d/LEdCW88bpV8Gv
 OxnGg8BiBV3TdAaAcNX72p5IRy9AYMY2hYIx9MCec+H2ws/jzn7xvfkhLta6luTP
 4JMvdToQWkhscIEDK1Q/3PtJVmX1al1PWKLTve3tza6jTTc7Opav8XN1hH3nJls=
 =hXxT
 -----END PGP SIGNATURE-----

Merge tag 'imx-dt-4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt

The i.MX device tree updates for 4.5:
- New boards support: imx51-ts4800, imx6q-novena, CompuLab imx7d SoM/SBC,
  vf610m4-cosmic
- Add ADC device support for imx6ul and imx7d
- Remove config space from PCIe controller ranges property for i.MX6
- Add Vivante GPU nodes for i.MX6
- Add DCU, LCD, and SATA devices for LS1021A
- A series to update Ventana gw5xxx boards getting HDMI and LVDS to work
  simultaneously and devices like PWM and SPI added
- Quite a few random cleanups and minor updates

* tag 'imx-dt-4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (50 commits)
  ARM: dts: imx7d: sbc-imx7: add basic board support
  ARM: dts: imx7d: cl-som-imx7: add basic module support
  ARM: dts: TS-4800: add touchscreen support
  ARM: dts: ts-4800: Add LCD support
  ARM: dts: imx6q: add Novena board
  devicetree: bindings: Add vendor prefix for Kosagi
  ARM: dts: TS-4800: use weim IP to map the FPGA
  ARM: dts: TS-4800: drop uart rts/cts pin reservations
  ARM: dts: imx6: add Vivante GPU nodes
  ARM: dts: imx28: add alternate auart4 pinmux
  ARM: dts: ls1021a: add sata node to dts
  ARM: dts: TS-4800: add basic device tree
  of: documentation: add bindings documentation for TS-4800
  of: add vendor prefix for Technologic Systems
  ARM: dts: imx7d-sdb: add ADC support
  ARM: dts: imx7d.dtsi: add ADC support
  ARM: dts: vf-colibri: add CAN support
  ARM: mxs: dt: cfa10057: fix backlight PWM
  ARM: dts: imx6qdl: move GIC to right location in DT
  ARM: dts: imx6qdl: add IPU aliases
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-12-22 14:59:55 -08:00
Olof Johansson
84658cbde8 Another new soc - the rk3228 quad-core cortex-a7, a new rk3036 board,
support for the efuses on Rockchip socs and some improvements for
 rk3288 regulators.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABCAAGBQJWd0xyAAoJEPOmecmc0R2B71UIAJu6jDdfk5kmYzyXjBloBNwd
 PVRojGzVjCwCiVKX7GWINSf3D7dTKeYUwVs9uouVW4Q/iIk/l4Iq46+yg20ZODNM
 3haS2hwztRPEKeU+0qhYdoJf2cWOKzk0RP90umTMMVt2xnqbQCBFAW4NuE4DBLHe
 5o7R99ORKHi+IjBaI6Wtk1JoRNNkyYIDW6eLC9mxAJs32mr1ee45uidhPBD+VX+n
 1nf/yUPs6bc1yPyNhFN49AywYvjg02y96/4ER6bBtOcEw91uDc0ld0M10H/mvujT
 B+w8U6xBUWulUU53MS8aVKDZ+bp4o6YZZbIq/FJtaz3c+bhj8Rjl4UnlZh+gaiA=
 =Zp6y
 -----END PGP SIGNATURE-----

Merge tag 'v4.5-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt

Another new soc - the rk3228 quad-core cortex-a7, a new rk3036 board,
support for the efuses on Rockchip socs and some improvements for
rk3288 regulators.

* tag 'v4.5-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  ARM: dts: rockchip: add the kylin board for rk3036
  ARM: dts: rockchip: add the sdio/sdmmc node for rk3036
  ARM: dts: rockchip: fix the pinctrl bias settings for rk3036
  ARM: dts: rockchip: add eFuse node for rk3188 SoCs
  ARM: dts: rockchip: add eFuse node for rk3066a SoCs
  ARM: dts: rockchip: add eFuse config of rk3288 SoC
  ARM: dts: rockchip: add rk3228-evb board
  ARM: dts: rockchip: add core rk3228 dtsi
  clk: rockchip: Add the clock ids of rk3288 eFuses
  ARM: dts: rockchip: Fix typo in rk3288 sdmmc card detect pin name
  ARM: dts: rockchip: fix voltage ranges for rk3288-evb-act8846 board
  ARM: dts: rockchip: move the public part to rk3288-evb common
  ARM: dts: rockchip: add 2 regulators for rk3288-evb-act8846
  ARM: dts: rockchip: correct the name of REG8 for rk3288-evb-act8846
  clk: rockchip: add dt-binding header for rk3228
  clk: rockchip: add id for mipidsi sclk on rk3288

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-12-22 13:07:11 -08:00
Olof Johansson
0d639e0a65 Third Round of Renesas ARM Based SoC DT Updates for v4.5
* Use SoC-specific usb-dmac and IPMMU compatibility strings
 * Add internal delay for i2c IPs
 * Add missing serial devices to r8a7793
 * Enable DMA for r8a7793 serial devices
 * Add serial port config to chosen/stdout-path
 * Tidyup #sound-dai-cells settings for r8a7798/bockw
 * Remove deprecated #gpio-range-cells from r8a7793
 * Add EtherAVB support to r8a7791
 * Add MSIOF support to sh73a0
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJWc2HNAAoJENfPZGlqN0++39sP/0oRTGW5rtS1YqDuB6lhf8UN
 kEoXXX2LSyNTw28MqWx4k3ow1zOK8Q75NOgs07pgdSXyIE+2nQgXvVZuq7Piosoe
 jm+tbVkuwXMNjbcJlX7Sx5zsobUZR6pIb46jBaF7gWVi9FVbqm/9xhHxY3mnqlhs
 bXF5FU7VrLH2VVh2OC1SyMPbXQhGEOVxhyhNZq2u+7x0AJfxnZwc7XVHlqO4netn
 emg4BfIAcvcFFc/PBmFeJg48BOf1OJqz0mR2m15k1+J3Uzjq7KZDaV1Ur33h60FT
 cV2rgHj9CdhDev0ri0aqApMPHhkTPeybxjrKqG0B+AtLnP369Nul9Br/HaLXcbDX
 mwoYYoG3VeZR1Zvn0ShNuhjiAq9RjFFyyIO2dpBUNQ3V++irGKFc6PSA9h/SdmwU
 8AJqdXuMdPmdMekWsHpywpVlUD0fksZ1gOivu9YwY5sTvOtOJfFfGKWOX/u6zSsR
 el7fFnypnPg63DT8flCxhkpJQYP5M0GJKOk0eaa6wEzZAf0xuspXpdVHIvyRDbXP
 t+NgUMXWq30bP6ihiQuG7qwhzYcLIGnEbTtsUWQgYu/G4h1lPp9OOCsKM7oSD29n
 ABO5u+xIutjXo6lxw+cehGTeN6V9FFHqs0rafV0lUhVwEmRSZ7g1UhKr64+EPhXW
 NxX/WLeR2kdIU7WCDtNC
 =bncx
 -----END PGP SIGNATURE-----

Merge tag 'renesas-dt3-for-v4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt

Third Round of Renesas ARM Based SoC DT Updates for v4.5

* Use SoC-specific usb-dmac and IPMMU compatibility strings
* Add internal delay for i2c IPs
* Add missing serial devices to r8a7793
* Enable DMA for r8a7793 serial devices
* Add serial port config to chosen/stdout-path
* Tidyup #sound-dai-cells settings for r8a7798/bockw
* Remove deprecated #gpio-range-cells from r8a7793
* Add EtherAVB support to r8a7791
* Add MSIOF support to sh73a0

* tag 'renesas-dt3-for-v4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (25 commits)
  ARM: shmobile: r8a779x: use SoC-specific usb-dmac compatibility strings
  ARM: shmobile: r8a7794: IPMMU compat string SoC part number update
  ARM: shmobile: r8a7793: IPMMU compat string SoC part number update
  ARM: shmobile: r8a7791: IPMMU compat string SoC part number update
  ARM: shmobile: r8a7790: IPMMU compat string SoC part number update
  ARM: shmobile: r8a7794: dtsi: add internal delay for i2c IPs
  ARM: shmobile: r8a7791: dtsi: add internal delay for i2c IPs
  ARM: shmobile: r8a7790: dtsi: add internal delay for i2c IPs
  ARM: shmobile: r8a7793: Describe DMA for the serial ports
  ARM: shmobile: r8a7793: Add missing serial devices to DT
  ARM: shmobile: lager dts: Add serial port config to chosen/stdout-path
  ARM: shmobile: porter dts: Add serial port config to chosen/stdout-path
  ARM: shmobile: silk dts: Add serial port config to chosen/stdout-path
  ARM: shmobile: gose dts: Add serial port config to chosen/stdout-path
  ARM: shmobile: bockw dts: Update console parameters
  ARM: shmobile: ape6evm dts: Add serial port config to chosen/stdout-path
  ARM: shmobile: alt dts: Add serial port config to chosen/stdout-path
  ARM: shmobile: koelsch dts: Add serial port config to chosen/stdout-path
  ARM: shmobile: r8a7778: tidyup #sound-dai-cells settings
  ARM: shmobile: bockw dts: Override #sound-dai-cells to zero
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-12-22 12:52:40 -08:00
Michael Turquette
1807b34f95 Merge tag 'clk-samsung-4.5' of git://linuxtv.org/snawrocki/samsung into clk-next
drivers/clk/samsung updates (mostly bug fixes):
 - instantiation of the cpu clocks and addition of the GSCL
   IP parent clocks to the list of available consumer clocks
   for exynos542x SoCs;
 - MFC IP parent clock fix for exynos542x;
 - fix of locking bug in samsung/clk-cpu.c which caused
   system crashes with cpufreq enabled;
 - minor cleanup for s3c2410.
2015-12-22 11:57:37 -08:00
Michael Turquette
fcd5ac1a41 Merge tag 'imx-clk-v4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into clk-next
The i.MX clock updates for 4.5:
- Add is_prepared function callback for pllv3 clock driver
- Use imx_check_clocks() on imx6ul and imx7d clock drivers to save
  some code
- Add a core clock for imx7d to support generic cpufreq driver
- Support imx6q clock routing with OSC to anaclk2/2b
- To support more precise pixel clocks on imx5, allow ipu_di_sel clock
  selectors to influence the PLLs that they are derived from
- A cleanup on imx25 OSC clock
2015-12-22 11:57:34 -08:00
Michael Turquette
eaaa6fb53f Merge tag 'v4.5-rockchip-clk1_1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next
Rockchip clock changes for 4.5 containing
- a new pll-type used on rk3036 and other Cortex-A7 socs
- new clock-trees for rk3036 and rk3228
- switch rk3288 plls to slow mode on reboot
- a bunch of new clock ids
- some more critical clocks
- wrong register offsets for the rk3368 cpuclks
- allowing more than 2 parents for the cpuclk
2015-12-22 11:57:33 -08:00
Thomas Abraham
bee4f87f01 clk: samsung: exynos5420: add cpu clock configuration data and instantiate cpu clock
With the addition of the new Samsung specific cpu-clock type, the
arm clock can be represented as a cpu-clock type. Add the CPU clock
configuration data and instantiate the CPU clock type for Exynos5420.

Changes by Bartlomiej:
- split Exynos5420 support from the original patches
- moved E5420_[EGL,KFC]_DIV0() macros to clk-exynos5420.c

Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-12-16 16:35:26 +01:00
Marek Szyprowski
c0feb268da clk: samsung: exynos542x: add missing parent GSCL block clocks
This patch adds clocks, which are required for preserving parent clock
configuration on GSCL power domain on/off.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-12-16 16:35:17 +01:00
ZhengShunQian
b457c1e440 clk: rockchip: Add the clock ids of rk3288 eFuses
Add clock-ids for the two efuse blocks of the rk3288.

Signed-off-by: ZhengShunQian <zhengsq@rock-chips.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-12-12 20:02:22 +01:00
Arnd Bergmann
e9093d045a First round of arm devicetree changes.
Among the bigger changes are two new Veyron boards, support for
 the dual-core cortex-a7 rk3036 soc and addition of support for
 the crypto engine of the rk3288. Smaller changes include some
 IR receivers, updates of thermal settings more reflecting real-
 life and testing-results.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABCAAGBQJWYetUAAoJEPOmecmc0R2B4goIAIiVjdbuetKLxeEqDWmEdCnI
 AKlV+IM1CWt8ib2k5bCoaYmWwtujY6m/2oHhbJklHgv3+K32lltwgZMJPeJu7xi3
 C02HCdq6DydsCb2154giKOXj+SMsNZ/c38Gk1sDFFPQCcwfgT9Hg+7HOXCim2Ac8
 C/Ewi7z6bZKzkvwy28KrQVPDub2DB/JQAGp8DP9hfK9k23PtaQRoLhTExj68O6JK
 rRjB67hb1+xdKgf8ujXevIYvoacO1odW4fLnB7KC4ei/O2XycKK/4ohzrENe/zJ6
 Y2wYnb1YGiLtjgx0DlpbPvaCE6/UyX+ZhVC4kUiB937/x1ZpCZX9ttLMT91gKx8=
 =F0Xt
 -----END PGP SIGNATURE-----

Merge tag 'v4.5-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt

Merge "rockchip dts32 changes for 4.5" from Heiko Stuebner:

First round of arm devicetree changes.
Among the bigger changes are two new Veyron boards, support for
the dual-core cortex-a7 rk3036 soc and addition of support for
the crypto engine of the rk3288. Smaller changes include some
IR receivers, updates of thermal settings more reflecting real-
life and testing-results.

* tag 'v4.5-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  ARM: dts: rockchip: add gpio-ir-receiver to the R89 board
  ARM: dts: rockchip: add touchscreen node to veyron minnie
  ARM: dts: rockchip: add veyron-mickey board
  ARM: dts: rockchip: add veyron-brain board
  ARM: dts: rockchip: make sure edp_24m is associated to xin24m on veyron
  ARM: dts: rockchip: override thermal settings on veyron-speedy
  ARM: dts: rockchip: update the thermal management on rk3288
  ARM: dts: rockchip: Add Crypto node for rk3288
  ARM: dts: rockchip: add rk3036-evb board
  ARM: dts: rockchip: add core rk3036 dtsi
  clk: rockchip: add dt-binding header for rk3036
  clk: rockchip: add an id for rk3288 crypto clk
  ARM: dts: rockchip: Add IR receiver to RK3288 Radxa Rock 2 Square
  ARM: dts: rockchip: add channels properties for i2s
  ARM: dts: rockchip: set system-power-controller property on rk3288-rock2
  ARM: dts: rockchip: Setup rk3066/rk3188 ethernet0 alias for u-boot
  ARM: dts: rockchip: Setup rk3288 ethernet0 alias for u-boot
2015-12-12 00:26:26 +01:00
Arnd Bergmann
6da06083f4 Renesas ARM Based SoC DT Updates for v4.5
* henninger: Remove as it is now replaced by silk
 * koelsch: Move SPI partitions to subnode
 * porter: Add CAN0 and HS-USB support
 * r8a7793/gose: Add QSPI, PFC support
 * r8a7793: Add GPIO, DMAC, theral, IPMMU support
 * r8a7794/alt: Add DU support
 * r8a7794: Disable all IPMMU nodes by default
 * r8a779[0134]: Use Use SoC specific binding for rcar-dmac
 * r8a779[01], r8a73a4, r8a7740, sh73a0: replace gpio-key, wakeup with
   wakeup-source property
 * r8a779[14]: Correct "gpio-ranges" properties
 * r8a779[14]: Remove bogus imp_clk node
 * silk: Add SDHI1 support
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJWTnFmAAoJENfPZGlqN0++JaYP/RPq8zvAt/x7QXNfo/9OPbpk
 lYjJpeBnTunK6UZBjG74ZOEL0SJh4F3Ti1N+7jmjN73Kp5OE2p8/z5bRsiElLyez
 LwHDx4FwksOGF/90zRAFX+WGWEInKlwVKopp9DIgHc1MS98/7VsxM5v9g3ZsCp0U
 GLpvaMnNoC6es6qi2O8Qc5lwI1g2XWRptzozOtjo04bjzUshEomOUXQ78Xj17T95
 +KxJmIyIuUvHX4kNen7GLpUheR9AgqMn7NTjFzXDo3q2DeTLMrMPQZlXIWCn17cD
 AaJGK3geaRXy9t40Cqo38u5lKUr65SJUsjikmNNWGf0xpLWR+m8uHYnKUuljtiUS
 H5tDuRVv9euzSTp0xs9XgcOuUg966iaO8IoX95GGukQ9+dW8UicGCg+5lKCJh+K0
 d7ev+Z9UuAmNcrwk30VSgY0rq1iWAJSdngZisJKCjo38Een6RnZm7Kgg6ZEib6qX
 z4d+ZPjvhOWRVC+k9XlnrqRNBqiK0H0wzBunY+2/cH056MfIqVy5gdGCK6CtHrdK
 qx9G38kwyQB7FHGvvVS4X/KikQJPetyCl4tWFmMjBTmGlaoQSsDgRvBbJExzN/Hq
 ERG2syGkB687DU+fhKCQryvDY1igKbKjUEAM1Ar/4ULLPNCZ0kB0wWmWlV9xobM7
 EDocF4nkl69jyIGoUweD
 =snxp
 -----END PGP SIGNATURE-----

Merge tag 'renesas-dt-for-v4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt

Merge "Renesas ARM Based SoC DT Updates for v4.5" from Simon Horman:

* henninger: Remove as it is now replaced by silk
* koelsch: Move SPI partitions to subnode
* porter: Add CAN0 and HS-USB support
* r8a7793/gose: Add QSPI, PFC support
* r8a7793: Add GPIO, DMAC, theral, IPMMU support
* r8a7794/alt: Add DU support
* r8a7794: Disable all IPMMU nodes by default
* r8a779[0134]: Use Use SoC specific binding for rcar-dmac
* r8a779[01], r8a73a4, r8a7740, sh73a0: replace gpio-key, wakeup with
  wakeup-source property
* r8a779[14]: Correct "gpio-ranges" properties
* r8a779[14]: Remove bogus imp_clk node
* silk: Add SDHI1 support

* tag 'renesas-dt-for-v4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (29 commits)
  ARM: shmobile: alt: add VIN0, ADV7180 DT support
  ARM: shmobile: alt: add I2C1 DT support
  ARM: shmobile: alt: Add pfc pins to DT
  ARM: shmobile: r8a7794: Use SoC specific binding for rcar-dmac nodes
  ARM: shmobile: r8a7793: Use SoC specific binding for rcar-dmac nodes
  ARM: shmobile: r8a7791: Use SoC specific binding for rcar-dmac nodes
  ARM: shmobile: r8a7790: Use SoC specific binding for rcar-dmac nodes
  ARM: shmobile: r8a7793: Add GPIO nodes to device tree
  ARM: shmobile: r8a7794: alt: Enable VGA port
  ARM: shmobile: r8a7794: Add DU node to device tree
  ARM: shmobile: r8a7794: Add DU0 clock
  ARM: shmobile: gose: Add QSPI device to DT
  ARM: shmobile: r8a7793: Add QSPI device to DT
  ARM: shmobile: r8a7793: Add DMAC devices to DT
  ARM: shmobile: koelsch: Move SPI FLASH partitions to subnode
  ARM: shmobile: gose: Configure PFC in DT
  ARM: shmobile: r8a7793: Add PFC to DT
  ARM: shmobile: r8a7793: Add thermal device to DT
  ARM: shmobile: henninger: remove board DT
  ARM: shmobile: porter: add CAN0 DT support
  ...
2015-12-10 17:46:46 +01:00
Jeffy Chen
abf1296599 clk: rockchip: add dt-binding header for rk3228
Add the dt-bindings header for the rk3228, that gets shared between
the clock controller and the clock references in the dts.

Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-12-10 00:04:53 +01:00
Sergei Shtylyov
eaa870b305 ARM: shmobile: r8a7791: add EtherAVB clock
Add the EtherAVB clock to the R8A7791 device tree.

Based on the commit 63d2d750c9 ("ARM: shmobile: r8a7790: add EtherAVB
clocks").

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-12-07 15:13:01 +09:00
Bai Ping
fdb868cd05 clk: imx: Add a virtual arm clk on i.mx7d
Add a virtual arm clk to abstract the actual steps
when changing the ARM core frequency.So we can using
the 'cpufreq-dt' driver on i.MX7D/Solo.

Signed-off-by: Bai Ping <b51503@freescale.com>
Acked-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-12-02 13:34:01 +08:00
Geert Uytterhoeven
23d711ab4d ARM: shmobile: sh73a0: Add MSIOF clocks
The 4 MSIOF clocks are MSTP clocks, and children of the SUB clock.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-12-01 15:35:34 +09:00
Stephen Boyd
c252659770 clk: qcom: Add MSM8996 Multimedia Clock Controller (MMCC) driver
Add a driver for the multimedia clock controller found on MSM8996
based devices. This should allow most multimedia device drivers
to probe and control their clocks.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-11-30 18:24:30 -08:00
Stephen Boyd
b1e010c073 clk: qcom: Add MSM8996 Global Clock Control (GCC) driver
Add support for the global clock controller found on MSM8996
based devices. This should allow most non-multimedia device
drivers to probe and control their clocks.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-11-30 18:24:27 -08:00
Chris Zhong
c6d49fbcfc clk: rockchip: add id for mipidsi sclk on rk3288
Adds a new id for the sclk supplying the mipidsi on rk3288 socs.

Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-11-26 11:13:32 +01:00
Simon Horman
998f468f34 Linux 4.4-rc1
-----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABAgAGBQJWSSq2AAoJEHm+PkMAQRiGIpQH/2Ro7UPwLARfZyd7GKpCRd/D
 y1aJEk9GaEywkGKPd/Hf3XU+/9vxqyTWhkvpKHkGAFqzuYvw2rSE1JZnGfA+dyt/
 1R/WSKM8f3VL2xmNmRJCXH+zn3W2u8Cvk0oj8VN0hseXByQfCT4HfoHiFrNwuo/9
 63f93Dqsai1G3CBy+/HSPEv5CGR+7yeTJFWS0hQK4kc3prmitI93C5PZkyePyAId
 wrgKo320rIcNL/lEAbMFEBimAqluIjGvdrR9FK6w3F+OwSlTV1HdSwTzNjxwdpP5
 aRKNHZMdsGlShsn12Wsp+mjVFpi9OrT8Askq+/GTDsG+9QMia/gUKC21K9b6UxM=
 =byS9
 -----END PGP SIGNATURE-----

Merge tag 'v4.4-rc1' into HEAD

Linux 4.4-rc1
2015-11-24 12:00:02 +09:00
Xing Zheng
8b0d55e962 clk: rockchip: add dt-binding header for rk3036
Add the dt-bindings header for the rk3036, that gets shared between
the clock controller and the clock references in the dts.

Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-11-23 21:19:45 +01:00
Zain Wang
94d5d6a0fb clk: rockchip: add an id for rk3288 crypto clk
Add an id for crypto clk to the binding header, so that it can be called
in other part.

Signed-off-by: Zain Wang <zain.wang@rock-chips.com>
Acked-by: Michael Turquette <mturquette@baylibre.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-11-23 19:50:23 +01:00
Krzysztof Kozlowski
94af7a3c31 clk: samsung: exynos4: Add SSS gate clock
Add a gate clock for controlling all clocks of Security Sub System
(SSS).

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
2015-11-18 22:02:02 +09:00
Laurent Pinchart
9859cd3b15 ARM: shmobile: r8a7794: Add DU0 clock
The DU0 clock is an MSTP clock, child of the CPG ZX clock.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-11-17 10:29:55 -08:00
Thierry Reding
1d15cb9ce9 clk: tegra: Add Tegra210 device tree binding
Add a header file that defines the clock numbers for Tegra210. It is
meant to be included by device trees so that they can refer to the
clocks by symbolic name instead of numeric value.

Also add the device tree binding documentation which is largely the
same as for earlier generations of Tegra.

Extracted from a larger patch by Rhyland Klein <rklein@nvidia.com>.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-11-16 08:21:56 +01:00
Linus Torvalds
c0d6fe2f01 ARM: DT updates for v4.4
As usual, this is the massive branch we have for each release. Lots of
 various updates and additions of hardware descriptions on existing hardware,
 as well as the usual additions of new boards and SoCs.
 
 This is also the first release where we've started mixing 64- and 32-bit
 DT updates in one branch.
 
 (Specific details on what's actually here and new is pretty easy to tell
 from the diffstat, so there's little point in duplicating listing it here.)
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJWQT2WAAoJEIwa5zzehBx37tgQAIBe5eDJFXFihTlyOQ2plL3q
 vVH4OCzXIHELfM1J8CGZNah1wCQqNOts8RAmDCzxr+zSYuLOwJOEDZ6NKmErMxl0
 NTj3+BsqKO3NRym970ofPqU9JRLQmpZ8K7dzk8Nwj2+r1WZHFu/j6Jv44n/Ns0lw
 7+wxnG322lTm7SnvALCMD5lD4Y7VpThooWy5SdFtRoAetn+cLbVCJIeeQvO6Vxkp
 NooeJR0t2e8cpbAND5Jwu6eeWRcIbrvgjYDe0omhrIY05i9yNvIsC2HuQFGjF43z
 p2CnQvcKnhOXTZw3yse1Fx5igA7jqwVjjC/lVeDyxhusAtLpmuB6qbSaj7DpqkSQ
 nJxX1d49WKm68K+aknmee1kYRrvc4DE/kORI4IxXnsVNMu16ifTVLnxKgUhwzukb
 eZdTP6rsqgNozaYvh0k1vfSFd+CNSkBg+E9nrI3tU95yo3LOIhobVBCvBcWlmUvQ
 JdavRztqosChjIx3a9i1eCNKJtCg9p4m+gWjUqVVWsxBHe/3HojzjZnsBSynIQMA
 uGIVm0TKhNl1Svxl3oJo9257UCUK7+5PqJHK9IHrcWDULYx05JGSjuZcyvNS6Fo+
 u1DMf0ud4gXJYhecFBa7b3zRjk5YxptgCCTjeEEOTUJbbhZqDjGFZlNuFi6dmqD3
 ILJ2QMe/DGiPIlUmCfsx
 =qY1q
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM DT updates from Olof Johansson:
 "As usual, this is the massive branch we have for each release.  Lots
  of various updates and additions of hardware descriptions on existing
  hardware, as well as the usual additions of new boards and SoCs.

  This is also the first release where we've started mixing 64- and
  32-bit DT updates in one branch.

  (Specific details on what's actually here and new is pretty easy to
  tell from the diffstat, so there's little point in duplicating listing
  it here)"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (499 commits)
  ARM: dts: uniphier: add system-bus-controller nodes
  ARM64: juno: disable NOR flash node by default
  ARM: dts: uniphier: add outer cache controller nodes
  arm64: defconfig: Enable PCI generic host bridge by default
  arm64: Juno: Add support for the PCIe host bridge on Juno R1
  Documentation: of: Document the bindings used by Juno R1 PCIe host bridge
  ARM: dts: uniphier: add I2C aliases for ProXstream2 boards
  dts/Makefile: Add build support for LS2080a QDS & RDB board DTS
  dts/ls2080a: Add DTS support for LS2080a QDS & RDB boards
  dts/ls2080a: Update Simulator DTS to add support of various peripherals
  dts/ls2080a: Remove text about writing to Free Software Foundation
  dts/ls2080a: Update DTSI to add support of various peripherals
  doc: DTS: Update DWC3 binding to provide reference to generic bindings
  doc/bindings: Update GPIO devicetree binding documentation for LS2080A
  Documentation/dts: Move FSL board-specific bindings out of /powerpc
  Documentation: DT: Add entry for FSL LS2080A QDS and RDB boards
  arm64: Rename FSL LS2085A SoC support code to LS2080A
  arm64: Use generic Layerscape SoC family naming
  ARM: dts: uniphier: add ProXstream2 Vodka board support
  ARM: dts: uniphier: add ProXstream2 Gentil board support
  ...
2015-11-10 15:06:26 -08:00
Linus Torvalds
b44a3d2a85 ARM: SoC driver updates for v4.4
As we've enabled multiplatform kernels on ARM, and greatly done away with
 the contents under arch/arm/mach-*, there's still need for SoC-related
 drivers to go somewhere.
 
 Many of them go in through other driver trees, but we still have
 drivers/soc to hold some of the "doesn't fit anywhere" lowlevel code
 that might be shared between ARM and ARM64 (or just in general makes
 sense to not have under the architecture directory).
 
 This branch contains mostly such code:
 
 - Drivers for qualcomm SoCs for SMEM, SMD and SMD-RPM, used to communicate
   with power management blocks on these SoCs for use by clock, regulator and
   bus frequency drivers.
 - Allwinner Reduced Serial Bus driver, again used to communicate with PMICs.
 - Drivers for ARM's SCPI (System Control Processor). Not to be confused with
   PSCI (Power State Coordination Interface). SCPI is used to communicate with
   the assistant embedded cores doing power management, and we have yet to see
   how many of them will implement this for their hardware vs abstracting in
   other ways (or not at all like in the past).
 - To make confusion between SCPI and PSCI more likely, this release also
   includes an update of PSCI to interface version 1.0.
 - Rockchip support for power domains.
 - A driver to talk to the firmware on Raspberry Pi.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJWQC+cAAoJEIwa5zzehBx3jEUP/0GpxfDVanEUkudVLLe7J0RH
 CNlRan107Cw6hXRUJo7elEsuCALjccXjc1CAH4+RnNpOAeBKW97n+WU7trTv+wUZ
 sQX4SkBPKFBlgwGF2qhsi5q74gms/BrgtCa4kNb9joOYso039tlfIOPzK80DMkOm
 TkyIJdUCgFJMjCQLhX6kGT0PDcrbIjb6aA2cF3FAVeaJA7uz8lNe/eHJr3oHxIEY
 CvC651yJ2mIHQUU4BJx/AJo+wXg3dRUXNCAtBjwLRPEAzduYZXYm1ZTVIby/1q9r
 dR2KDFEuibODXmXrDBzKNJwCu/TLJEwo/1oPaEIVfY91XLKfiWUhgVqa1o1I+d9U
 XoGPibCW461qFahjQW87MfInALpCOA7/RbTNjFp+MVyipCYvkaYq7KFiYEldgFDx
 z4Qx/J4hYc2TlDWrpNiUCZMfmhwi7y+Ib+tnenYTO1eyMuw0e9mfnVdjk5iU3Pvk
 Ye4qPqpYclJruyHbYi164878+1lLaW2NCUgC3rkBO/GWPAzp7d9iLWoZ3PuyD5i5
 PEjs668UcRdZYbI4rdrhGHL8Eq9Gnuc4Rthu7HxPOK+DG0XgP8r97PhM8aYGYVDO
 +yikBtjWRsA9fPj3rMKA3UsQ61DAeR9LmZ0XPGjWFMCjCG0JlUoIMaA+Uu0i8fr8
 95qxBVxbO7rhL39r1rhV
 =dm+I
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC driver updates from Olof Johansson:
 "As we've enabled multiplatform kernels on ARM, and greatly done away
  with the contents under arch/arm/mach-*, there's still need for
  SoC-related drivers to go somewhere.

  Many of them go in through other driver trees, but we still have
  drivers/soc to hold some of the "doesn't fit anywhere" lowlevel code
  that might be shared between ARM and ARM64 (or just in general makes
  sense to not have under the architecture directory).

  This branch contains mostly such code:

   - Drivers for qualcomm SoCs for SMEM, SMD and SMD-RPM, used to
     communicate with power management blocks on these SoCs for use by
     clock, regulator and bus frequency drivers.

   - Allwinner Reduced Serial Bus driver, again used to communicate with
     PMICs.

   - Drivers for ARM's SCPI (System Control Processor).  Not to be
     confused with PSCI (Power State Coordination Interface).  SCPI is
     used to communicate with the assistant embedded cores doing power
     management, and we have yet to see how many of them will implement
     this for their hardware vs abstracting in other ways (or not at all
     like in the past).

   - To make confusion between SCPI and PSCI more likely, this release
     also includes an update of PSCI to interface version 1.0.

   - Rockchip support for power domains.

   - A driver to talk to the firmware on Raspberry Pi"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (57 commits)
  soc: qcom: smd-rpm: Correct size of outgoing message
  bus: sunxi-rsb: Add driver for Allwinner Reduced Serial Bus
  bus: sunxi-rsb: Add Allwinner Reduced Serial Bus (RSB) controller bindings
  ARM: bcm2835: add mutual inclusion protection
  drivers: psci: make PSCI 1.0 functions initialization version dependent
  dt-bindings: Correct paths in Rockchip power domains binding document
  soc: rockchip: power-domain: don't try to print the clock name in error case
  soc: qcom/smem: add HWSPINLOCK dependency
  clk: berlin: add cpuclk
  ARM: berlin: dts: add CLKID_CPU for BG2Q
  ARM: bcm2835: Add the Raspberry Pi firmware driver
  soc: qcom: smem: Move RPM message ram out of smem DT node
  soc: qcom: smd-rpm: Correct the active vs sleep state flagging
  soc: qcom: smd: delete unneeded of_node_put
  firmware: qcom-scm: build for correct architecture level
  soc: qcom: smd: Correct SMEM items for upper channels
  qcom-scm: add missing prototype for qcom_scm_is_available()
  qcom-scm: fix endianess issue in __qcom_scm_is_call_available
  soc: qcom: smd: Reject send of too big packets
  soc: qcom: smd: Handle big endian CPUs
  ...
2015-11-10 15:00:03 -08:00
Olof Johansson
edd2a06d9c Allwinner clock additions for 4.4
- Support for the Audio PLL and child clocks
   - Support for the A33 AHB gates
   - New clk-multiplier generic driver
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJWJ+3uAAoJEBx+YmzsjxAgx8UP/2QOntzRCUQYZGaI/aG2Pcag
 lWeoWRkHpEdjM288OxOgoqody6UU/5gecI2UgDLtziaXV5DfIFhP0Klq1gIYc7h0
 WDts2IlGht+fIObL87mD0Pm9StFNAtxFe5tKoHpU5oS6NP+lowSWAQlZSgUWdQky
 VEvXDcOtaEQ3UQgcuMsaqfzgRPJC9zz28MDF28EtPhnCeseb/LKdmvaGzxHHehSl
 016mQ4DvNC92PeLXUdy3LLOkcHTfYnH1OUBPrv7u8bFU09zPKSimymDyL87D7FFM
 vPGKtlD/cQb21z2OVK9GKNmd9dQ+8tnBn9Gbdem95LFHlhP/m+SJbW2P64dNVq0A
 QK5Ria2H6ccRMpfjNQ4zCHjIJQ6+z9xRzIlHXeAT7PcBf9XNwn1/N7qSBJTRy+y/
 uq9Wvgfuletk9lIiFstbJWT6Axu+w/QVWJwJSkOa63elkFSyz+9Dk88MDYd156or
 R79fc9EMQFcCg7k5IeiePLV8G1XVHc/3+ZoRON2ZJYk0L3z5uv/klizkCwtWN5cN
 55nzfQ8Mn69yG9vrR7DSbVY4eyXkr345Tqv0OFaDZlrpb9/oHjK6MNDWzmXY2Y+N
 ZcdNXwWu8DOqEf2iPWXETp0R0wV3kuEaKOvkS4KpvK2UjdQUeEvGUbpxm7Omo583
 5RN+z/gjJSZQx9AoGwBJ
 =WtVW
 -----END PGP SIGNATURE-----

Merge tag 'sunxi-clocks-for-4.4' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/dt

Bringing in the sunxi clock branch since it introduces header file contents
that is needed by the DT branch. This is a stable tag shared with the clk tree.

Allwinner clock additions for 4.4

  - Support for the Audio PLL and child clocks
  - Support for the A33 AHB gates
  - New clk-multiplier generic driver

* tag 'sunxi-clocks-for-4.4' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
  clk: sunxi: mod1 clock support
  clk: sunxi: codec clock support
  clk: sunxi: pll2: Add A13 support
  clk: sunxi: Add a driver for the PLL2
  clk: Add a basic multiplier clock
  clk: sunxi: Add A33 gates support

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-10-26 14:42:37 +09:00
Olof Johansson
64ebda3acd Merge tag 'arm/soc/for-4.4/rpi-dt-v2' of https://github.com/Broadcom/stblinux into next/dt
This pull request contains the DT changes for BCM2835 in 4.4.  It
pulls in clk/clk-bcm2835 (which Stephen Boyd has said would be stable)
because the DT changes to enable the clock driver need the driver
itself to be present. These changes include the following:

- Eric Anholt, moves the bcm2835 clock driver under bcm/ where it belongs with
  other Broadcom clock providers drivers, defines the binding for new clock
  driver, adds support for programming the BCM2835 audio domain, adds the DDC I2C
  controller to Device Tree, and finally migrates the Device Tree to use the new
  clock driver binding

- Lubomir Rintel adds support for the Raspberry Pi Model A+ and B revision 2, and
  remove the I2S controller which is non-existent on Raspberry Pi Model B

- Stefan Wahren adds an uart0 label for referencing the UART adapter

* tag 'arm/soc/for-4.4/rpi-dt-v2' of https://github.com/Broadcom/stblinux:
  ARM: bcm2835: Add the DDC I2C controller to the device tree.
  ARM: bcm2835: Switch to using the new clock driver support.
  ARM: bcm2835: dt: Add Raspberry Pi Model A+
  ARM: bcm2835: dt: Add Raspberry Pi Model B rev2
  ARM: bcm2835: dt: Raspberry Pi Model B had no I2S
  ARM: bcm2835: add label for uart0
  clk: bcm2835: Add support for programming the audio domain clocks
  clk: bcm2835: Add binding docs for the new platform clock driver.
  clk: bcm2835: Move under bcm/ with other Broadcom SoC clk drivers.

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-10-26 14:27:33 +09:00
Olof Johansson
99b6eb55ce Samsung 2nd DT updates for v4.4
- use exynos5420-dw-mshc instead of exynos5250 for exynos3250
 - add DISP1 clocks and the DISP1 power domain of two closk
   on exynos5250 (clock commit got Stephen's ack)
 - add vbus regulators on exynos3250, exynos4210 and exynos4412 boards
 - fix typo in regulator enable GPIO property on s5pv20-aquila and goni
 - document: correct the example of exynos power domain clocks
 - document: consolidate exynos SoC dt-bindings and non-Samsung
   boards related compatibles (FriendlyARM, Google, Hardkernel
   and Insignal)
 - update MAINTAINER entries accordingly (documentation)
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJWKp8kAAoJEA0Cl+kVi2xq5fUP/Rf+zO2xnnM+nW31k/6GCQQu
 4BgjBfiK6/coAfQ+mq1PNs3aOFDUmO1g3vwoly64vJbhylCd6jFEzPlbgb109ZnI
 A7JrqoiZ0LE+i/RXjfgxJm/0v1gn7TOOBKkwWlIEJpgV7i8wWjdCnMxlNw+amSGF
 H0pJ14TCN7OfsPZtX1S7dgz/dLSeQzCzMn8cJk4ccPcsN+1LqI4whFQ31ykOYCaT
 5b3/EvORjqkn0gdEiQ/i2WtaM1yKgfNUYXaJP69j605ipzKaUCMt9WnBY9EB6RaJ
 im36eKNQXW73dYGEuuf1I5L58Hb+poAmlz4TtI4re/ykQ1mrvOj1xYwgfD9Sjw+z
 ZS4Io5WMZgdJrmMXFPxnd7BQHu4IbnEfU+408cgOVP/fPrAHxYtO8tVr7/n2lgJ3
 3Hio2MBzAWAXMz45IfhCz2n/ITKBCkfjHFOkno7Rmmm/83cORM6ZleldMqtrj5sQ
 oqGDcBwI0ijKptZIfaLFQfndMmzUd4t5i+UQTjyIDE1nBmvPyqHgPyetHQttQQM+
 bWTCJU+SlKze7CIwogmrrFEfw2RhNU+FS/T9D7t5JCWLb4B5CgLnHt7NWth2cQUQ
 NuiTIgoU+znke+t2A1PxE85CmBr5yuezqxq8bJv8qnGHrF/ougPaNCOdXPef0ci4
 bfK3nV/axFga/7ag900e
 =UPmG
 -----END PGP SIGNATURE-----

Merge tag 'samsung-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/dt

Samsung 2nd DT updates for v4.4

- use exynos5420-dw-mshc instead of exynos5250 for exynos3250
- add DISP1 clocks and the DISP1 power domain of two closk
  on exynos5250 (clock commit got Stephen's ack)
- add vbus regulators on exynos3250, exynos4210 and exynos4412 boards
- fix typo in regulator enable GPIO property on s5pv20-aquila and goni
- document: correct the example of exynos power domain clocks
- document: consolidate exynos SoC dt-bindings and non-Samsung
  boards related compatibles (FriendlyARM, Google, Hardkernel
  and Insignal)
- update MAINTAINER entries accordingly (documentation)

* tag 'samsung-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
  MAINTAINERS: Add documentation and dt-bindings for exynos stuff
  dt-bindings: EXYNOS: Document compatibles from other vendors
  dt-bindings: Consolidate Exynos SoC bindings
  ARM: dts: Add clocks to DISP1 domain in exynos5250
  dt-bindings: Correct the example for Exynos power domain clocks
  ARM: dts: Fix typo in regulator enable GPIO property in s5pv210-goni
  ARM: dts: Fix typo in regulator enable GPIO property in s5pv210-aquila
  ARM: dts: Add vbus regulator to USB2 phy nodes on exynos3250, exynos4210 and exynos4412 boards
  clk: samsung: exynos5250: Add DISP1 clocks
  ARM: dts: use exynos5420-dw-mshc compatible for exynos3250

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-10-26 10:13:50 +09:00
Tomeu Vizoso
b4dc272b60 clk: samsung: exynos5250: Add DISP1 clocks
When the DISP1 power domain is powered off, there's two clocks that need
to be temporarily reparented to OSC, and back to their original parents
when the domain is powered on again.

We expose these two clocks in the DT bindings so that the DT node of the
power domain can reference them.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
2015-10-24 04:31:18 +09:00
Olof Johansson
355d1ef1ad The i.MX device tree changes for 4.4:
- Add IOMUXC LPSR (Low Power State Retention) device for i.MX7D.
  - Add a few low power mode related devices and touch controller for
    i.MX6UL.
  - Add a number of devices for i.MX7D SDB board support, USB, Dual FEC,
    and eMMC5.0.
  - i.MX6 Boundary Devices updates: relicense under GPLv2/X11, add Okaya
    LCD, touch and wifi support, add new boards Nitrogen6_Lite and
    Nitrogen6_Max.
  - Enable touch screen and NAND Flash controller for a few Vybrid
    devices.
  - Some random and small updates on LS1021A and MXS support.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABAgAGBQJWJQUPAAoJEFBXWFqHsHzOo+cH/irx+abVdFV97q6M0VwFsQ3/
 Tf4/CsdiTjM5ZDrKZEtXzP8BZl+ZO4tQXLspP+wVceQ+PVUiVvdAHu0l68iuJRrA
 +Bj9VrLIzMDf7FVpzbZHZD3kd1NALGh/5i0TerkuZMNl1KH57HyGjLnjKH43n7uz
 mFPeZFAQMwSjEnRJj/6217Itqi+LurARJsnXQs6uhQ7feSsA88HU3EQ8QsiZqiAu
 MULAJBYaE09shlokuXIKx67t8outdb8C0Uue64nt42y8NR0m5eVVG7NJoF+23T6C
 CRX5zveYa7D2QXTkihvjdRpazhLiPnwV3RCVejLOZMk0G14hD9U39jkTp+9ws1w=
 =kPBq
 -----END PGP SIGNATURE-----

Merge tag 'imx-dt-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt

The i.MX device tree changes for 4.4:
 - Add IOMUXC LPSR (Low Power State Retention) device for i.MX7D.
 - Add a few low power mode related devices and touch controller for
   i.MX6UL.
 - Add a number of devices for i.MX7D SDB board support, USB, Dual FEC,
   and eMMC5.0.
 - i.MX6 Boundary Devices updates: relicense under GPLv2/X11, add Okaya
   LCD, touch and wifi support, add new boards Nitrogen6_Lite and
   Nitrogen6_Max.
 - Enable touch screen and NAND Flash controller for a few Vybrid
   devices.
 - Some random and small updates on LS1021A and MXS support.

* tag 'imx-dt-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (53 commits)
  ARM: dts: ls1021a: Add quirk for Erratum A009116
  ARM: imx6sx-sdb: Fix typo in regulator enable GPIO property
  ARM: dts: imx6: phyFLEX: fix typo in "pinctrl-names"
  ARM: dts: imx6: change the core clock of spdif
  ARM: dts: vf-colibri: enable NAND flash controller
  ARM: dts: vf610twr: add NAND flash controller peripherial
  ARM: dts: imx: add Boundary Devices Nitrogen6_Lite board
  ARM: dts: imx: add Boundary Devices Nitrogen6_Max board
  ARM: dts: imx6dl-nitrogen6x: change manufacturer to Boundary Devices
  ARM: dts: imx6q-nitrogen6x: change manufacturer to Boundary Devices
  of: Add Boundary Devices Inc. vendor prefix
  ARM: dts: imx6qdl-sabrelite: relicense under GPLv2/X11
  ARM: dts: imx6qdl-nitrogen6x: relicense under GPLv2/X11
  ARM: dts: imx6qdl-nitrogen6x: add wifi wl1271 support
  ARM: dts: imx6dql-nitrogen6x: add touchscreen support
  ARM: dts: imx6qdl-sabrelite: add Okaya LCD panel
  ARM: dts: imx6qdl-nitrogen6x: add Okaya LCD panel
  ARM: dts: vf500-colibri: Add device tree node for touchscreen support
  ARM: dts: i.MX35: fix cpu compatible value
  ARM: dts: i.MX31: fix cpu compatible value
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-10-23 10:51:21 -07:00
Stephen Boyd
f63d19ef52 Merge branch 'clk-iproc' into clk-next
* clk-iproc:
  clk: iproc: define Broadcom NS2 iProc clock binding
  clk: iproc: define Broadcom NSP iProc clock binding
  clk: ns2: add clock support for Broadcom Northstar 2 SoC
  clk: iproc: Separate status and control variables
  clk: iproc: Split off dig_filter
  clk: iproc: Add PLL base write function
  clk: nsp: add clock support for Broadcom Northstar Plus SoC
  clk: iproc: Add PWRCTRL support
  clk: cygnus: Convert all macros to all caps
  ARM: cygnus: fix link failures when CONFIG_COMMON_CLK_IPROC is disabled
2015-10-21 17:28:19 -07:00
Jon Mason
f7225a832d clk: ns2: add clock support for Broadcom Northstar 2 SoC
The Broadcom Northstar 2 SoC is architected under the iProc
architecture. It has the following PLLs: GENPLL SCR, GENPLL SW,
LCPLL DDR, LCPLL Ports, all derived from an onboard crystal.

Signed-off-by: Jon Mason <jonmason@broadcom.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-10-21 17:22:58 -07:00
Jon Mason
5f024b0685 clk: nsp: add clock support for Broadcom Northstar Plus SoC
The Broadcom Northstar Plus SoC is architected under the iProc
architecture. It has the following PLLs: ARMPLL, GENPLL, LCPLL0, all
derived from an onboard crystal.

Signed-off-by: Jon Mason <jonmason@broadcom.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-10-21 16:53:20 -07:00
Stephen Boyd
938ce30e29 Allwinner clock additions for 4.4
- Support for the Audio PLL and child clocks
   - Support for the A33 AHB gates
   - New clk-multiplier generic driver
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJWJ+3uAAoJEBx+YmzsjxAgx8UP/2QOntzRCUQYZGaI/aG2Pcag
 lWeoWRkHpEdjM288OxOgoqody6UU/5gecI2UgDLtziaXV5DfIFhP0Klq1gIYc7h0
 WDts2IlGht+fIObL87mD0Pm9StFNAtxFe5tKoHpU5oS6NP+lowSWAQlZSgUWdQky
 VEvXDcOtaEQ3UQgcuMsaqfzgRPJC9zz28MDF28EtPhnCeseb/LKdmvaGzxHHehSl
 016mQ4DvNC92PeLXUdy3LLOkcHTfYnH1OUBPrv7u8bFU09zPKSimymDyL87D7FFM
 vPGKtlD/cQb21z2OVK9GKNmd9dQ+8tnBn9Gbdem95LFHlhP/m+SJbW2P64dNVq0A
 QK5Ria2H6ccRMpfjNQ4zCHjIJQ6+z9xRzIlHXeAT7PcBf9XNwn1/N7qSBJTRy+y/
 uq9Wvgfuletk9lIiFstbJWT6Axu+w/QVWJwJSkOa63elkFSyz+9Dk88MDYd156or
 R79fc9EMQFcCg7k5IeiePLV8G1XVHc/3+ZoRON2ZJYk0L3z5uv/klizkCwtWN5cN
 55nzfQ8Mn69yG9vrR7DSbVY4eyXkr345Tqv0OFaDZlrpb9/oHjK6MNDWzmXY2Y+N
 ZcdNXwWu8DOqEf2iPWXETp0R0wV3kuEaKOvkS4KpvK2UjdQUeEvGUbpxm7Omo583
 5RN+z/gjJSZQx9AoGwBJ
 =WtVW
 -----END PGP SIGNATURE-----

Merge tag 'sunxi-clocks-for-4.4' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into clk-next

Pull Allwinner clock additions for 4.4 from Maxime Ripard:

  - Support for the Audio PLL and child clocks
  - Support for the A33 AHB gates
  - New clk-multiplier generic driver

* tag 'sunxi-clocks-for-4.4' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
  clk: sunxi: mod1 clock support
  clk: sunxi: codec clock support
  clk: sunxi: pll2: Add A13 support
  clk: sunxi: Add a driver for the PLL2
  clk: Add a basic multiplier clock
  clk: sunxi: Add A33 gates support
2015-10-21 16:29:03 -07:00
Maxime Ripard
460d0d4448 clk: sunxi: Add a driver for the PLL2
The PLL2 on the A10 and later SoCs is the clock used for all the audio
related operations.

This clock has a somewhat complex output tree, with three outputs (2X, 4X
and 8X) with a fixed divider from the base clock, and an output (1X) with a
post divider.

However, we can simplify things since the 1X divider can be fixed, and we
end up by having a base clock not exposed to any device (or at least
directly, since the 4X output doesn't have any divider), and 4 fixed
divider clocks that will be exposed.

This clock seems to have been introduced, at least in this form, in the
revision B of the A10, but we don't have any information on the clock used
on the revision A.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
2015-10-21 21:51:27 +02:00
Michael Turquette
254f9463c5 Merge branch 'clk-shmobile-for-v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-next 2015-10-21 02:26:51 -07:00
Geert Uytterhoeven
9d0c3c6820 clk: shmobile: Add r8a7795 CPG Core Clock Definitions
Add all R-Car H3 Clock Pulse Generator Core Clock Outputs, as listed in
Table 8.2a ("List of Clocks [R-Car H3]") of the R-Car Gen3 datasheet
(rev. 0.5E).

Note that internal CPG clocks (S0, S1, S2, S3, SDSRC, SSPSRC, and
RPCSRC) are not included, as they're used as internal clock sources
only.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Michael Turquette <mturquette@baylibre.com>
Reviewed-by: Magnus Damm <damm+renesas@opensource.se>
2015-10-20 20:36:00 +02:00
Geert Uytterhoeven
3686d3e7d6 clk: shmobile: Add new Renesas CPG/MSSR DT bindings
On Renesas ARM SoCs (SH/R-Mobile, R-Car, RZ), the CPG (Clock Pulse
Generator) and MSSR (Module Standby and Software Reset) blocks are
intimately connected, and share the same register block.

Hence it makes sense to describe these two blocks using a
single device node in DT, instead of using a hierarchical structure with
multiple nodes, using a mix of generic and SoC-specific bindings.

These new DT bindings are intended to replace the existing DT bindings
for CPG core clocks ("renesas,*-cpg-clocks", "renesas,cpg-div6-clock")
and module clocks ("renesas,*-mstp-clocks"), at least for new SoCs.

This will make it easier to add module reset support later, which is
currently not implemented, and difficult to achieve using the existing
bindings due to the intertwined register layout.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Michael Turquette <mturquette@baylibre.com>
Reviewed-by: Magnus Damm <damm+renesas@opensource.se>
2015-10-20 20:35:34 +02:00
Stephen Boyd
3ce6c6e541 The i.MX clock updates for 4.4:
- A couple of fixes on i.MX31 and i.MX35 clock initialization functions
    which makes mxc_timer_init() currently be called twice for DT boot.
  - Increase i.MX6UL AXI bus clock rate to 264MHz which is the optimal
    design target.
  - Add a few missing clocks, ADC clock for i.MX7D, OCOTP clock for
    Vybrid, and SPDIF_GCLK for i.MX6.
  - A series from Lucas to fix early debug UART clock setup.  This is
    currently a one-off fix for i.MX platform, and can be extended to
    become a generic solution later.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABAgAGBQJWIRFyAAoJEFBXWFqHsHzOE7wH/25WaamOOOL3vGVCBeIs2+aB
 nibCEKCPGu2/b1YN+BEQMlh+K7d59Ogd0xVtTkLEGhIBW+LF5zDpsd6jNl7Ts6PQ
 5w3gG7K/NqPzIXlgo+z5Oa4UI1DlDemcA1xihR+hFWjLQb8DBmnusK52ctS5MLfP
 6SoepDWHJvtuAfoL/3ytNTi/xCW12sEVkzRV7QbG9GV2UmUgF2AVWKBkH+c28vnP
 dyt2Cyrr4+9ov6p0k0OJnHDv1AxkkNlHh0G33pZMZmnqcn/ZagmdH2GReGWZi6PM
 XLMY/piEK7zzryJ51hL9AGZi7so1LWs27kBtYo9r7bN9/cG4kaENGw6Du1jEf4I=
 =OBCO
 -----END PGP SIGNATURE-----

Merge tag 'imx-clk-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into clk-next

Pull i.MX updates from Shawn Guo:

"The i.MX clock updates for 4.4:
 - A couple of fixes on i.MX31 and i.MX35 clock initialization functions
   which makes mxc_timer_init() currently be called twice for DT boot.
 - Increase i.MX6UL AXI bus clock rate to 264MHz which is the optimal
   design target.
 - Add a few missing clocks, ADC clock for i.MX7D, OCOTP clock for
   Vybrid, and SPDIF_GCLK for i.MX6.
 - A series from Lucas to fix early debug UART clock setup.  This is
   currently a one-off fix for i.MX platform, and can be extended to
   become a generic solution later."

* tag 'imx-clk-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  clk: imx6: Add SPDIF_GCLK clock in clock tree
  clk: imx7d: add ADC root clock
  clk: imx31: Do not call mxc_timer_init twice when booting with DT
  clk: imx7d: retain early UART clocks during kernel init
  clk: imx6: retain early UART clocks during kernel init
  clk: imx5: retain early UART clocks during kernel init
  clk: imx35: retain early UART clocks during kernel init
  clk: imx31: retain early UART clocks during kernel init
  clk: imx27: retain early UART clocks during kernel init
  clk: imx25: retain early UART clocks during kernel init
  clk: imx: add common logic to detect early UART usage
  clk: imx35: Do not call mxc_timer_init twice when booting with DT
  clk: clk-vf610: Add clock for Vybrid OCOTP controller
  clk: imx: increase AXI clock rate to 264MHz for i.MX6UL
2015-10-16 11:35:19 -07:00
Sebastian Hesselbarth
28c039eeba ARM: berlin: dts: add CLKID_CPU for BG2Q
Marvell Berlin BG2Q SoC also has a clock for the CPU, add a
corresponding CLKID to the dt-binding include.

Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
2015-10-15 20:31:41 +02:00
Stephen Boyd
67d7188afe Merge branch 'clk-bcm2835' into clk-next
* clk-bcm2835:
  clk: bcm2835: Add support for programming the audio domain clocks
  clk: bcm2835: Add binding docs for the new platform clock driver.
  clk: bcm2835: Move under bcm/ with other Broadcom SoC clk drivers.
2015-10-12 11:44:49 -07:00
Shengjiu Wang
84a87250ee clk: imx6: Add SPDIF_GCLK clock in clock tree
Correct SPDIF clock setting issue in clock tree, the SPDIF_GCLK is also
one clock of SPDIF, which is missed before.

We found an issue that imx can't enter low power mode with spdif
if IMX6x_CLK_SPDIF is used as the core clock of spdif. Because
spdif driver will register IMX6x_CLK_SPDIF clock to regmap, regmap will do
clk_prepare in init function, then IMX6x_CLK_SPDIF clock is prepared in probe,
so its parent clock (PLL clock) is prepared, the prepare operation of
PLL clock is to enable the clock. But I.MX needs all PLL clock is disabled,
then it can enter low power mode.

So we can't use IMX6x_CLK_SPDIF as the core clock of spdif, the correct spdif
core clock is SPDIF_GCLK, which share same gate bit with IMX6x_CLK_SPDIF clock.
SPDIF_GCLK's parent clock is ipg clock.

Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-10-12 21:55:59 +08:00
Haibo Chen
ab4c6a2407 clk: imx7d: add ADC root clock
Add ADC root clock support in imx7d clock tree.

Signed-off-by: Haibo Chen <haibo.chen@freescale.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-10-09 11:01:50 +08:00
Stephen Boyd
6082d88e1d Merge branch 'v4.3-rc3-clk' of https://github.com/jamesjjliao/linux into clk-next
Pull mediatek clock support and fixes from James Liao:

"This is a collection of new Mediatek clocks support and fixes.
These patches come from Joe and me, including clock support for
subsystems, GPT and some minor fixes."

* 'v4.3-rc3-clk' of https://github.com/jamesjjliao/linux:
  clk: mediatek: Add USB clock support in MT8173 APMIXEDSYS
  clk: mediatek: Add subsystem clocks of MT8173
  dt-bindings: ARM: Mediatek: Document devicetree bindings for clock controllers
  clk: mediatek: Fix rate and dependency of MT8173 clocks
  clk: mediatek: Add fixed clocks support for Mediatek SoC.
  clk: mediatek: Add __initdata and __init for data and functions
  clk: mediatek: Remove unused code from MT8173.
  clk: mediatek: Removed unused dpi_ck clock from MT8173
  clk: mediatek: add 13mhz clock for MT8173
2015-10-02 11:38:20 -07:00
Stephen Boyd
caac0ef841 Fixes, improvements and addition of some missing features
of the exynos7 clock controller driver.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABCAAGBQJWDkyVAAoJEE1bIKeAnHqLvEgQAIzCTebVdKFwTesgN2Jo5S0Y
 +iEEbz6jM1mlcr3LreAPZXrAAE2phjuEYRIEDd5DCcx4VH3n/X/rM4zJSopxLBke
 zaJiuv2jB08vpxmt4O497j0UWQsuxBQSrJ4YMaGm7WHTxMLZZ5wX+1tDqUYn4IB7
 sHZ63RUR+ny9pFl1ozs7y+nObuHc9UU1ornar5Yf6LYPOoRd4MAoNNwiePCor/DW
 qzkGcC1vemW1vRCSOve5rpRxu7vX/htuPjaqd+dX4c6vWZxoa2GPScwIGW4YjXdj
 bfgg3N1axret3cZb6vQDjmZJfb93oX5e54w/xlN47X2LuKT/66aok8+wCgpx/xYf
 IGoQCoDvGKEyMDDG+XMJZjPt6vA2UMSDZwXHnia4IF/4MY73Jt9BurDgBIC4DxPc
 9kUtQ1skyYnVP7rB2vE7MaGNJSDrq97vfzEi913hvOpoaaH1xstEaRzTTauWLbl1
 GWxY8ITlTnxTXLS2gwoMhzhO86tTrLj6HWIXsBwRkdcOI0rrp/sEYFXmLfjm/t8p
 MnpANR1g1Q1J8r2+wvK3PshNwv97VUaRJBaZUs2gXxSElYOXRJTGI1HqeCuzfcG/
 1/qVoKm+QcX9GybtJx7DT4/0q8490AFsSd9xU0IVJV/2Tw7ftTahncLDyQtsEIj2
 zQPNJjPevSyG76mvNcA5
 =x8YL
 -----END PGP SIGNATURE-----

Merge tag 'clk-samsung-4.4' of git://linuxtv.org/snawrocki/samsung into clk-next

Pull updates from Sylwester Nawrocki:

"Fixes, improvements and addition of some missing features
of the exynos7 clock controller driver."

* tag 'clk-samsung-4.4' of git://linuxtv.org/snawrocki/samsung:
  clk: samsung: exynos7: Add required clock tree for UFS
  clk: samsung: exynos7: Add missing fixed_clks to cmu_info
  clk: samsung: exynos7: Correct CMU_FSYS1 clocks names
  clk: samsung: exynos7: Correct CMU_FSYS0 clocks names
  clk: samsung: exynos7: Correct CMU_PERIS clocks names
  clk: samsung: exynos7: Correct CMU_PERIC1 clocks names
  clk: samsung: exynos7: Correct CMU_PERIC0 clocks names
  clk: samsung: exynos7: Correct CMU_CCORE clocks names
  clk: samsung: exynos7: Correct CMU_TOP1 clocks names
  clk: samsung: exynos7: Correct CMU_TOP0 clocks names
  clk: samsung: exynos7: Adds missing clocks gates of CMU_TOPC
  clk: samsung: exynos7: Change the CMU_TOPC block clock names
  clk: samsung: exynos7: Correct nr_clk_ids for fsys1
  clk: samsung: exynos7: Correct nr_clk_ids for fsys0
  clk: samsung: exynos7: Fix CMU TOP1 block
  clk: samsung: exynos7: Fix CMU TOPC block clock
2015-10-02 11:31:59 -07:00
Eric Anholt
2c74b5399d clk: bcm2835: Add binding docs for the new platform clock driver.
Previously we've only supported a few fixed clocks based on
assumptions about how the firmware sets up the clocks, but this
binding will let us control the actual (audio power domain) clock
manager.

Signed-off-by: Eric Anholt <eric@anholt.net>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Lee Jones <lee@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-10-01 17:12:14 -07:00
Nicolas Ferre
a5752e57bb clk: at91: add PMC sama5d2 support
Add support for the new sama5d2 SoC and adapt capabilities.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-10-01 12:39:44 -07:00
James Liao
cdb2bab78a clk: mediatek: Add USB clock support in MT8173 APMIXEDSYS
Add REF2USB_TX clock support into MT8173 APMIXEDSYS. This clock
is needed by USB 3.0.

Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
2015-10-01 12:06:00 +08:00
James Liao
29859d9315 clk: mediatek: Add subsystem clocks of MT8173
Most multimedia subsystem clocks will be accessed by multiple
drivers, so it's a better way to manage these clocks in CCF.
This patch adds clock support for MM, IMG, VDEC, VENC and VENC_LT
subsystems.

Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
2015-10-01 12:04:50 +08:00
James Liao
829f4912d1 clk: mediatek: Removed unused dpi_ck clock from MT8173
The dpi_ck clock can be removed because it not actually used
in topckgen and subsystems.

Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
2015-10-01 12:04:48 +08:00
Joe.C
2d61fe0fc7 clk: mediatek: add 13mhz clock for MT8173
Add 13mhz clock used by GPT timer in infracfg.

Signed-off-by: Yingjoe Chen <yingjoe.chen@mediatek.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
2015-10-01 12:04:34 +08:00
Sanchayan Maity
0753f56e41 clk: clk-vf610: Add clock for Vybrid OCOTP controller
Add clock support for Vybrid On-Chip One Time Programmable
(OCOTP) controller.

While the OCOTP block does not require explicit clock gating,
for programming the OCOTP timing register the clock rate of
ipg clock is required for timing calculations related to fuse
and shadow register read sequence. We explicitly specify the
ipg clock for OCOTP as a result.

Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-09-22 18:02:40 -07:00
Georgi Djakov
7001b3f960 clk: qcom: Add MSM8916 audio clocks
Add support for the msm8916 audio clocks. This includes core bus,
low-power audio and codec clocks. They are required for audio playback.

Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-09-17 12:36:16 -07:00
Georgi Djakov
a2e8272f3f clk: qcom: Add MSM8916 gpu clocks
Add support for the msm8916 BIMC (Bus Integrated Memory Controller)
clocks that are needed for GPU.

Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-09-17 12:36:15 -07:00
Georgi Djakov
93e71695da clk: qcom: Add MSM8916 iommu clocks
Add support for the msm8916 TCU (Translation Control Unit) clocks that
are needed for IOMMU.

Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-09-17 12:29:06 -07:00
Stephane Viau
cb2eb7de38 clk: qcom: gdsc: Add GDSCs in apq8084 MMCC
Add the GDSC instances that exist as part of apq8084 MMCC block.

Signed-off-by: Stephane Viau <sviau@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-09-16 15:22:47 -07:00
Rajendra Nayak
639af9490b clk: qcom: gdsc: Add GDSCs in apq8084 GCC
Add the GDSC instances that exist as part of apq8084 GCC block

Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-09-16 15:22:45 -07:00
Stephen Boyd
8108b23ca7 clk: qcom: gdsc: Add GDSCs in msm8974 MMCC
Add the GDSC instances that exist as part of msm8974 MMCC block

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-09-16 15:22:44 -07:00
Stephen Boyd
340029efdc clk: qcom: gdsc: Add GDSCs in msm8974 GCC
There's just one GDSC as part of the msm8974 GCC block.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-09-16 15:22:43 -07:00
Rajendra Nayak
073ae2b41c clk: qcom: gdsc: Add GDSCs in msm8916 GCC
Add all data for the GDSCs which are part of msm8916 GCC block.

Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-09-16 15:22:41 -07:00
Alim Akhtar
7993b3ebec clk: samsung: exynos7: Add required clock tree for UFS
Adding required mux/div/gate clocks for UFS controller
present on Exynos7.

Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-09-15 11:18:15 +02:00
Alim Akhtar
753195a749 clk: samsung: exynos7: Correct CMU_FSYS1 clocks names
This patch renames CMU_FSYS1 clocks names to match with user manual.
And also adds missing gate clock for aclk_fsys1_200.

Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-09-15 11:16:10 +02:00
Alim Akhtar
a259a61be1 clk: samsung: exynos7: Correct CMU_FSYS0 clocks names
This patch renames CMU_FSYS0 clocks names to match with user manual.
And also adds missing gate clock for aclk_fsys0_200.

Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-09-15 11:16:09 +02:00
Alim Akhtar
33b8b739ef clk: samsung: exynos7: Correct CMU_PERIC1 clocks names
This patch renames CMU_PERIC1 clocks names to match with user manual.
And also adds missing gate clock for aclk_peric1_66.

Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-09-15 11:16:07 +02:00
Alim Akhtar
3f54fb1e09 clk: samsung: exynos7: Correct CMU_PERIC0 clocks names
This patch renames CMU_PERIC0 clocks names to match with user manual.
And also adds missing gate clock for aclk_peric0_66.

Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-09-15 11:16:07 +02:00
Alim Akhtar
2cbb515745 clk: samsung: exynos7: Adds missing clocks gates of CMU_TOPC
This adds some of the missing GATE clocks of CMU_TOPC block.

Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-09-15 11:02:29 +02:00
Linus Torvalds
b3a5af435a ARM: DT updates for v4.3
This is the usual large batch of DT updates. Lots and lots of smaller
 changes, some of the larger ones to point out are:
 
 - Rockchip veyron (Chromebook) support, as well as several other new boards
 - DRM support on Atmel AT91SAM9N12EK
 - USB additions on some Allwinner platforms
 - Mediatek MT6580 support
 - Freescale i.MX6UL support
 - Cleanups for Renesas shmobile platforms
 - Lots of added devices on LPC18xx
 - Lots of added devices and boards on UniPhier
 
 There's also some dependent code added here, in particular some branches
 that are primarily merged through the clock tree.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJV5OMWAAoJEIwa5zzehBx3r2QP/1skn0zzgfvbK0kkPOh9q3Jk
 jX1elN4Wde1SnScz8UbdVb9nmdbhxsuYE/3+Lz7yCndWScBiak4qcsNHrSRhh3FA
 ST7Ub8DLc2TxY9K7eDkyVCcNkP35+UQTHCN76R5Lgrlfw3UO9Zr3xPFX3+Kd6aWz
 9X8UnvJacQQIN/vO6J02kB96sKPEIANfuMgO6vDSbmcZ1RrdlHzjoRwAV0smECtJ
 NyOh+NQdPBR0gSl/peyKzAXoDHNXpDotltTmIz3tPA+dYBO/qG//B73H/oqox0ql
 AKAktyaDzdxXEuixPtAroo4dDy3xuIQ6xU+DNhPWQq0BgaxHWqkwq60d74ot8vCz
 8gvC8pwA6gavbqVFNePOnwPNSyWZX01scX4fp903NjVM8/rGPvCR4y6p8lFIyVkG
 P0L8rmY/UYq3fieaAb1W0odASDrQpgg3zsHD7to43hz6jaRnMRCpA8nTVqJcyHqI
 E6YfGQH87Kpbvkjo0FYqo5P6xCCRTq+QUys6JruNYg05R/gd8AG7cXaVNO3yvg3T
 lRwNXDBt/zcp2exKnGR0IdGMUMICzsuoB8ZePkQdIWwePrd4AzT5qYJe/txmg1rd
 q+9VJqQkeF+txLd9XUV2W/Hcuzu3ZPCbs97I9tTKQHMGwKUZaPfuk2r4+4K+Ps5a
 dYwdms39p6AIT43rK+m3
 =D2Pm
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM DT updates from Olof Johansson:
 "Ladies and gentlemen, we proudly announce to you the latest branch of
  ARM device tree contents for the mainline kernel.  Come and see, come
  and see!

  No less than twentythree thousand lines of additions! Just imagine the
  joy you will have of using your mainline kernel on newly supported
  hardware such as Rockchip Chromebooks, Freescale i.MX6UL boards or
  UniPhier hardware!

  For those of you feeling less adventurous, added hardware support on
  platforms such as TI DM814x and Gumstix Overo platforms might be more
  of your liking.

  We've got something for everyone here!

  Ahem.  Cough.  So, anyway...

  This is the usual large batch of DT updates.  Lots and lots of smaller
  changes, some of the larger ones to point out are:

   - Rockchip veyron (Chromebook) support, as well as several other new boards
   - DRM support on Atmel AT91SAM9N12EK
   - USB additions on some Allwinner platforms
   - Mediatek MT6580 support
   - Freescale i.MX6UL support
   - cleanups for Renesas shmobile platforms
   - lots of added devices on LPC18xx
   - lots of added devices and boards on UniPhier

  There's also some dependent code added here, in particular some
  branches that are primarily merged through the clock tree"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (389 commits)
  ARM: tegra: Add gpio-ranges property
  ARM: tegra: Fix AHB base address on Tegra20, Tegra30 and Tegra114
  ARM: tegra: Add Tegra124 PMU support
  ARM: tegra: jetson-tk1: Add GK20A GPU DT node
  ARM: tegra: venice2: Add GK20A GPU DT node
  ARM: tegra: Add IOMMU node to GK20A
  ARM: tegra: Add CPU regulator to the Jetson TK1 device tree
  ARM: tegra: Add entries for cpufreq on Tegra124
  ARM: tegra: Enable the DFLL on the Jetson TK1
  ARM: tegra: Add the DFLL to Tegra124 device tree
  ARM: dts: zynq: Add devicetree entry for Xilinx Zynq reset controller.
  ARM: dts: UniPhier: fix PPI interrupt CPU mask of timer nodes
  ARM: dts: rockchip: correct regulator power states for suspend
  ARM: dts: rockchip: correct regulator PM properties
  ARM: dts: vexpress: Use assigned-clock-parents for sp810
  pinctrl: tegra: Only set the gpio range if needed
  arm: boot: dts: am4372: add ARM timers and SCU nodes
  ARM: dts: AM4372: Add the am4372-rtc compatible string
  ARM: shmobile: r8a7794 dtsi: Add CPG/MSTP Clock Domain
  ARM: shmobile: r8a7793 dtsi: Add CPG/MSTP Clock Domain
  ...
2015-09-01 13:09:20 -07:00
Linus Torvalds
d4c90396ed Merge git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6
Pull crypto updates from Herbert Xu:
 "Here is the crypto update for 4.3:

  API:

   - the AEAD interface transition is now complete.
   - add top-level skcipher interface.

  Drivers:

   - x86-64 acceleration for chacha20/poly1305.
   - add sunxi-ss Allwinner Security System crypto accelerator.
   - add RSA algorithm to qat driver.
   - add SRIOV support to qat driver.
   - add LS1021A support to caam.
   - add i.MX6 support to caam"

* git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (163 commits)
  crypto: algif_aead - fix for multiple operations on AF_ALG sockets
  crypto: qat - enable legacy VFs
  MPI: Fix mpi_read_buffer
  crypto: qat - silence a static checker warning
  crypto: vmx - Fixing opcode issue
  crypto: caam - Use the preferred style for memory allocations
  crypto: caam - Propagate the real error code in caam_probe
  crypto: caam - Fix the error handling in caam_probe
  crypto: caam - fix writing to JQCR_MS when using service interface
  crypto: hash - Add AHASH_REQUEST_ON_STACK
  crypto: testmgr - Use new skcipher interface
  crypto: skcipher - Add top-level skcipher interface
  crypto: cmac - allow usage in FIPS mode
  crypto: sahara - Use dmam_alloc_coherent
  crypto: caam - Add support for LS1021A
  crypto: qat - Don't move data inside output buffer
  crypto: vmx - Fixing GHASH Key issue on little endian
  crypto: vmx - Fixing AES-CTR counter bug
  crypto: null - Add missing Kconfig tristate for NULL2
  crypto: nx - Add forward declaration for struct crypto_aead
  ...
2015-08-31 17:38:39 -07:00
Olof Johansson
b12c082086 The i.MX device tree updates for 4.3:
- Add audio and eTSEC device support and update dspi node for LS1021A.
  - Add initial i.MX6UL and imx6ul-14x14-evk board support, and enable
    a bunch of device support for i.MX6UL, including RTC, power key, USB,
    QSPI, and dual FEC.
  - Enable HDMI and LVDS dual display support for a few imx6qdl boards.
  - Support of imx6sl-warp board rev1.12, the version which will be
    publicly available for the customers.
  - A few i.MX7D device additions, watchdog, cortex-a7 coresight
    components, RTC, power key, power off.
  - Some Vybrid updates: add device support for I2C, QSPI, eSDHC etc.,
    update ADC node, and define stdout-path property.
  - A few random updates for i.MX27 and i.MX53 devices.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABAgAGBQJVyhktAAoJEFBXWFqHsHzOjQwH/0CXyzRUCJjHqxAHsnvHzOZG
 AvjYWqaimxP5PD6TRG1bRxfWWXNL7zZGqj9Jd/l5HIWdWfUxnOLeMy40yfcs+AsH
 9CHUunu0rahIDY6YF4gA7F5jyfnSIzxwE8Bkva7nmXvf0XmazTwhCXxYPzdBjMSG
 Cf39datyTj9ZS3DD/DAKzRN//zebQCJmPuAdmIlRZljBkoLVPeEZrVxkSN0trRin
 vKPQIpamM2DXIMmdiPK52J0j8Vwq4qbiGvvAwUKsaRCUVYfpunpVcZSYgMqm8iEa
 7PKuurbVeuvZLzS0Bdq05tCkwVXt0upk0ayf0i8DkHFExX79TNTbONOLJwmigjo=
 =iAvA
 -----END PGP SIGNATURE-----

Merge tag 'imx-dt-4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt

The i.MX device tree updates for 4.3:
 - Add audio and eTSEC device support and update dspi node for LS1021A.
 - Add initial i.MX6UL and imx6ul-14x14-evk board support, and enable
   a bunch of device support for i.MX6UL, including RTC, power key, USB,
   QSPI, and dual FEC.
 - Enable HDMI and LVDS dual display support for a few imx6qdl boards.
 - Support of imx6sl-warp board rev1.12, the version which will be
   publicly available for the customers.
 - A few i.MX7D device additions, watchdog, cortex-a7 coresight
   components, RTC, power key, power off.
 - Some Vybrid updates: add device support for I2C, QSPI, eSDHC etc.,
   update ADC node, and define stdout-path property.
 - A few random updates for i.MX27 and i.MX53 devices.

* tag 'imx-dt-4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (44 commits)
  ARM: dts: imx6ul: add snvs power key support
  ARM: dts: imx6ul: add RTC support
  ARM: dts: imx6ul: enable GPC as extended interrupt controller
  ARM: dts: imx6sx: correct property name for wakeup source
  ARM: dts: add property for maximum ADC clock frequencies
  ARM: dts: imx7d: enable snvs rtc, onoffkey and power off
  ARM: dts: imx6ul-14x14-evk: add fec1 and fec2 support
  ARM: dts: imx: add fec1 and fec2 nodes for SOC i.MX6UL
  ARM: dts: imx27: add support of internal rtc
  ARM: dts: vf-colibri: define stdout-path property
  ARM: dts: ls1021a: Enable the eTSEC ports on QDS and TWR
  ARM: dts: ls1021a: Add the eTSEC controller nodes
  ARM: dts: imx6ul: add qspi support
  ARM: dts: imx6ul: fix low case define in imx6ul-pinfunc.h
  ARM: dts: imx6ul: add usb host and function support
  ARM: dts: vfxxx: Add io-channel-cells property for ADC node
  ARM: dts: ls1021a: Add dts nodes for audio on LS1021A
  ARM: imx6qdl-sabreauto.dtsi: enable USB support
  ARM: dts: imx: update snvs to use syscon access register
  ARM: dts: imx: add imx6ul and imx6ul evk board support
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-18 13:14:39 -07:00
Michael Turquette
5c489ccad8 Merge tag 'imx-clk-4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into clk-next
The i.MX clock updates for 4.3:
 - Provide a better IPU clock initial settings on imx6dl for getting
   HDMI and LVDS at the same time.
 - Add clock driver support for i.MX6UL SoC
 - Add a second clock for RTC device on i.MX31 and i.MX35
2015-08-12 00:59:00 -07:00
Victoria Milhoan
dd503f6609 ARM: clk-imx6q: Add CAAM clock support
Add CAAM clock support to the i.MX6 clocking infrastructure.

Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com>
Tested-by: Horia Geantă <horia.geanta@freescale.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2015-08-10 23:19:02 +08:00
Jun Nie
105644e59a clk: zx: Add audio and GPIO clock for zx296702
Add SPDIF/I2S and GPIO clock for zx296702

Signed-off-by: Jun Nie <jun.nie@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-28 11:59:37 -07:00
Michael Turquette
1db92e54f5 Merge branch 'v4.3-topic/clk-samsung' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into clk-next 2015-07-28 11:59:21 -07:00
Chanwoo Choi
7c9422ef55 clk: exynos3250: Add cpu clock configuration data and instaniate cpu clock
This patch add CPU clock configuration data and instantiate the CPU
clock type for Exynos3250 to support Samsung specific cpu-clock type.

Cc: Sylwester Nawrocki <s.nawrocki@samsung.com>
Cc: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Acked-by: Michael Turquette <mturquette@baylibre.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
2015-07-24 12:52:58 +09:00
Thomas Abraham
d7cc4c8165 clk: exynos5250: add cpu clock configuration data and instantiate cpu clock
With the addition of the new Samsung specific cpu-clock type, the
arm clock can be represented as a cpu-clock type. Add the CPU clock
configuration data and instantiate the CPU clock type for Exynos5250.

Cc: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
[b.zolnierkie: split exynos5250 support from the original patch]
[b.zolnierkie: moved E5250_CPU_DIV[0,1] macros to clk-exynos5250.c]
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@dowhile0.org>
Tested-by: Javier Martinez Canillas <javier@dowhile0.org>
Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: Michael Turquette <mturquette@baylibre.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
2015-07-24 12:41:48 +09:00
Kuninori Morimoto
88401702fe ARM: shmobile: r8a7791: Add Audio CTU support on DTSI
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-07-22 09:36:40 +09:00
Kuninori Morimoto
a716378496 ARM: shmobile: r8a7790: Add Audio CTU support on DTSI
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Tested-by: Keita Kobayashi <keita.kobayashi.ym@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-07-22 09:36:10 +09:00
Frank Li
787b4271a6 clk: imx: add imx6ul clk tree support
Add imx6ul clock driver support.

Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Bai Ping <b51503@freescale.com>
Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Frank Li <Frank.Li@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-07-14 15:02:13 +08:00
Heiko Stuebner
7c8f03d5f2 clk: rockchip: add missing include guards
Review for the rk3368 turned up that the clock header was missing include
guards. This is also true for the already existing clock binding headers,
so add them.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-06 15:09:01 -07:00
Heiko Stuebner
d8567e39e4 clk: rockchip: add dt-binding header for rk3368
Add the dt-bindings header for the rk3368, that gets shared between
the clock controller and the clock references in the dts.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-06 15:08:48 -07:00
Sergei Shtylyov
63d2d750c9 ARM: shmobile: r8a7790: add EtherAVB clocks
Add the EtherAVB clock to the R8A7790 device tree.

Based on original patch by Mitsuhiro Kimura <mitsuhiro.kimura.kc@renesas.com>.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-07-06 09:33:31 +09:00
Ulrich Hecht
0e03e8aed9 ARM: shmobile: add r8a7793 minimal SoC device tree
Minimal r8a7793 device tree including one CPU core, interrupt controllers,
timers, two serial ports, and the Ethernet controller, plus the required
clock descriptions.

Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-07-06 09:33:29 +09:00
Linus Torvalds
5f1201d515 The changes to the common clock framework for 4.2 are dominated by new
drivers and updates to existing ones, as usual. There are some fixes to
 the framework itself and several cleanups for sparse warnings, etc.
 Please consider pulling.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJVlCubAAoJEKI6nJvDJaTUJ3cQAKdaU+NpWX9Qajt6snIHcqB6
 nBg57DltuPh1XFMPHDIdPe+8rK0RDQjao6jwzzqUKGaZJ3sycPCIn8mh+iZCP7Se
 yxhacQIAIp2qbIlIQ8Epcc6jnma/8cUyfB0BuYMddzb7bk2PXLfLxzJgAo5pXZM1
 LQoBxdpBh3Y7vcdBFLuHsnORTZdRI29Nu7p5dRK27vxWFBoCqL3bshHSS8g7lTBc
 XUWcFhfFe7WvMvBqqF8pSJlCmHzO90S0MmFPT4OQy4NtAysPpjsqI6RPCHBTyvy+
 oniMM6zM/RdN1VnLB49HvAL4mArjAdsQGxNywsUpvD/IcZPbpM8N3VA3xHzANMfy
 iJ9374zgjRn3/YBfjYFCcyVUY7SPeiRsXh97ZMZJGY5BC5FbXuKMn3STPrUilhw/
 CMSq9ARdmjlPQDW5EuEGFeap+7oz4q4Kgk0qgmOktIVYhtt9Pn0ddMKINIpokzbi
 4w0z1kc/YVHZpFMNYxAQoxYzejU9hxybUvYUEnu9RFzzOW+o7DsmMv7k5r1XY+oO
 P1Kz0jVWCw46XnvP6z1V4SforZOQXr1Om698O8fd7ke7Q7gFCr2UQjIuXliC/g8u
 NREqu1kceXTeWnt0LFZB7GMOo2Edo21qYIAILyqTO50QJL2at5WLoibaM03y7I7x
 GeMP1APDHJI0E5dn0v5P
 =Iv72
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clock framework updates from Michael Turquette:
 "The changes to the common clock framework for 4.2 are dominated by new
  drivers and updates to existing ones, as usual.

  There are some fixes to the framework itself and several cleanups for
  sparse warnings, etc"

* tag 'clk-for-linus-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (135 commits)
  clk: stm32: Add clock driver for STM32F4[23]xxx devices
  dt-bindings: Document the STM32F4 clock bindings
  cpufreq: exynos: remove Exynos4210 specific cpufreq driver support
  ARM: Exynos: switch to using generic cpufreq driver for Exynos4210
  clk: samsung: exynos4: add cpu clock configuration data and instantiate cpu clock
  clk: samsung: add infrastructure to register cpu clocks
  clk: add CLK_RECALC_NEW_RATES clock flag for Exynos cpu clock support
  doc: dt: add documentation for lpc1850-ccu clk driver
  clk: add lpc18xx ccu clk driver
  doc: dt: add documentation for lpc1850-cgu clk driver
  clk: add lpc18xx cgu clk driver
  clk: keystone: add support for post divider register for main pll
  clk: mvebu: flag the crypto clk as CLK_IGNORE_UNUSED
  clk: cygnus: remove Cygnus dummy clock binding
  clk: cygnus: add clock support for Broadcom Cygnus
  clk: Change bcm clocks build dependency
  clk: iproc: add initial common clock support
  clk: iproc: define Broadcom iProc clock binding
  MAINTAINERS: update email for Michael Turquette
  clk: meson: add some error handling in meson_clk_register_cpu()
  ...
2015-07-01 19:22:00 -07:00
Linus Torvalds
78c10e556e Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS updates from Ralf Baechle:

 - Improvements to the tlb_dump code
 - KVM fixes
 - Add support for appended DTB
 - Minor improvements to the R12000 support
 - Minor improvements to the R12000 support
 - Various platform improvments for BCM47xx
 - The usual pile of minor cleanups
 - A number of BPF fixes and improvments
 - Some improvments to the support for R3000 and DECstations
 - Some improvments to the ATH79 platform support
 - A major patchset for the JZ4740 SOC adding support for the CI20 platform
 - Add support for the Pistachio SOC
 - Minor BMIPS/BCM63xx platform support improvments.
 - Avoid "SYNC 0" as memory barrier when unlocking spinlocks
 - Add support for the XWR-1750 board.
 - Paul's __cpuinit/__cpuinitdata cleanups.
 - New Malta CPU board support large memory so enable ZONE_DMA32.

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (131 commits)
  MIPS: spinlock: Adjust arch_spin_lock back-off time
  MIPS: asmmacro: Ensure 64-bit FP registers are used with MSA
  MIPS: BCM47xx: Simplify handling SPROM revisions
  MIPS: Cobalt Don't use module_init in non-modular MTD registration.
  MIPS: BCM47xx: Move NVRAM driver to the drivers/firmware/
  MIPS: use for_each_sg()
  MIPS: BCM47xx: Don't select BCMA_HOST_PCI
  MIPS: BCM47xx: Add helper variable for storing NVRAM length
  MIPS: IRQ/IP27: Move IRQ allocation API to platform code.
  MIPS: Replace smp_mb with release barrier function in unlocks.
  MIPS: i8259: DT support
  MIPS: Malta: Basic DT plumbing
  MIPS: include errno.h for ENODEV in mips-cm.h
  MIPS: Define GCR_GIC_STATUS register fields
  MIPS: BPF: Introduce BPF ASM helpers
  MIPS: BPF: Use BPF register names to describe the ABI
  MIPS: BPF: Move register definition to the BPF header
  MIPS: net: BPF: Replace RSIZE with SZREG
  MIPS: BPF: Free up some callee-saved registers
  MIPS: Xtalk: Update xwidget.h with known Xtalk device numbers
  ...
2015-06-27 12:44:34 -07:00
Linus Torvalds
3d9f96d850 ARM: SoC: DT updates for v4.2
As usual, quite a few device-tree updates in ARM land.  There was ome
 minor churn in DTs due to relicensing under a dual-license, and lots
 of little additions of new peripherals, features etc, but nothing
 really exciting to call to your attention.  Some higlights, focsuing
 on support for new SoCs and boards:
 
 - AT91: new boards: Overkiz,  Acme Systems' Arietta G25
 - tegra: HDA support
 - bcm: new platforms: Buffalo WXR-1900DHP, SmartRG SR400ac, ASUS RT-AC87U
 - mvebu: new platforms: Compulab CM-A510, Armada 385-based Linksys
   boards, DLink DNS-327L
 - OMAP: new platforms: Baltos IR5221, LogicPD Torpedo, Toby-Churchill SL50
 - ARM: added support for Juno r1 board
 - sunxi: A33 SoC support; new boards: A23 EVB, SinA33, GA10H-A33, Mele A1000G
 - imx: i.MX7D SoC support; new boards: Armadeus Systems APF6,
   Gateworks GW5510, and aristainetos2 boards
 - hisilicon: hi6220 SoC support; new boards: 96boards hikey
 
 Conflicts: None
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJVi4ROAAoJEFk3GJrT+8ZlBcsP/jjXN+pucA3oHE/Jn9j1yF8e
 aPENC0iXVDr2ru5SikBlgmBYeoZjsXV90HWnEo3RZrF4/zMa8CUOD6UqKZLp7x9d
 SYEtuFk98VM/7Qtho6qDvZaLTnzWT5CL24E+J899P8V9lWVm3mwklKE9ScmkDd5m
 kQxtj5rk1HcaDPmtJ0rseqNoaqRSG1UmhAHLkHMYLg5CyQb7L4FZx+l+Zj4FpYFE
 js9uIVpp2gIuJu3nLRWgkhnoOVQzLAftPnmkbgEYYjqY3/kCtkvRA3g3QoDwn6nc
 qjI3iFSYudyum9CmCMfvPYFfwXJ7uT3s+GPXJj+vLZomFfQm5g9S0/RGLQh2loi+
 zCBeCw63y22qqJfNVLx3yVdyEYslu9RcFeuBzWrQ2R+ZYYq1MBdKeNIUqlnbRAvv
 gB5jOT5yg5Tzme94Uk2WfTiy5Es2d7KsqlvnKSRuItFI2+LvjfMipV7JLf/5gPE1
 1A/A9ALW550kyxVsQtST8wMyTN5ASQ+fyM9MvICgpZa/LBA2hXsO+XCKO0LzOZUg
 3ABJVogUpqLwuA6qVAToq4bRNPC7p72odM1tKRHHCNf29r5wtYqu79Eon+3v4Zgf
 1wjSJocjJ9yCFxxLMn8PgxcF8Maedp9y/I6dCHEYN5zI6RdwlelUvWcuul6RIEeO
 +XORenPq9ZRR8tDO+HSU
 =wWIc
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC DT updates from Kevin Hilman:
 "As usual, quite a few device-tree updates in ARM land.  There was one
  minor churn in DTs due to relicensing under a dual-license, and lots
  of little additions of new peripherals, features etc, but nothing
  really exciting to call to your attention.  Some higlights, focsuing
  on support for new SoCs and boards:

   - AT91: new boards: Overkiz,  Acme Systems' Arietta G25
   - tegra: HDA support
   - bcm: new platforms: Buffalo WXR-1900DHP, SmartRG SR400ac, ASUS
     RT-AC87U
   - mvebu: new platforms: Compulab CM-A510, Armada 385-based Linksys
     boards, DLink DNS-327L
   - OMAP: new platforms: Baltos IR5221, LogicPD Torpedo, Toby-Churchill
     SL50
   - ARM: added support for Juno r1 board
   - sunxi: A33 SoC support; new boards: A23 EVB, SinA33, GA10H-A33,
     Mele A1000G
   - imx: i.MX7D SoC support; new boards: Armadeus Systems APF6,
     Gateworks GW5510, and aristainetos2 boards
   - hisilicon: hi6220 SoC support; new boards: 96boards hikey"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (462 commits)
  ARM: hisi: revert changes from hisi/hip04-dt branch
  ARM: nomadik: set proper compatible for accelerometer
  ARM64: juno: add GPIO keys
  ARM: at91/dt: sama5d4: fix dma conf for aes, sha and tdes nodes
  ARM: dts: Introduce STM32F429 MCU
  ARM: socfpga: dts: enable ethernet for Arria10 devkit
  ARM: dts: k2l: fix the netcp range size
  ARM: dts: k2e: fix the netcp range size
  ARM: dts: k2hk: fix the netcp range size
  ARM: dts: k2l-evm: Add device bindings for netcp driver
  ARM: dts: k2e-evm: Add device bindings for netcp driver
  ARM: dts: k2hk-evm: Add device bindings for netcp driver
  ARM: BCM5301X: Add DT for Asus RT-AC87U
  ARM: BCM5301X: add IRQ numbers for PCIe controller
  ARM: BCM5301X: add NAND flash chip description
  arm64: dts: Add dts files for Hisilicon Hi6220 SoC
  clk: hi6220: Document devicetree bindings for hi6220 clock
  arm64: hi6220: Document devicetree bindings for Hisilicon hi6220 SoC
  ARM: at91/dt: sama5d4ek: mci0 uses slot 0
  ARM: at91/dt: kizbox: fix mismatch LED PWM device
  ...
2015-06-26 11:43:59 -07:00
Linus Torvalds
4aa705b18b ARM: SoC: platform support for v4.2
Our SoC branch usually contains expanded support for new SoCs and
 other core platform code. Some highlights from this round:
 
 - sunxi: SMP support for A23 SoC
 - socpga: big-endian support
 - pxa: conversion to common clock framework
 - bcm: SMP support for BCM63138
 - imx: support new I.MX7D SoC
 - zte: basic support for ZX296702 SoC
 
  Conflicts:
 	arch/arm/mach-socfpga/core.h
 
 Trivial remove/remove conflict with our cleanup branch.
 Resolution: remove both sides
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJVi4RMAAoJEFk3GJrT+8Zl6/kP/1Rv9O++1Kxua6R54Og6AF1J
 0miFr2fnUrUWUYg/NVbseRH5bBe6N6ir3SQMfde8W2/QibEjOoEwSwrle+mC/eiq
 CE0x0gtyRvXMrMU/FWkOvbmmw9uv5oz1z3IHZV6AiecNuSMLUBPfamryikQ8C+d1
 O/QZtX543tJQJDOBihO5cuhoVVM37UX0unNmqGsyswlyqTPF8FxcIJAYVNtnxjmj
 AFaOB0nDJKLKFTiX2Ype2wOxxJX1lrLatNo4W4T+YaaK+i1uCOhgTdSN+n49K7YA
 KNDFEgZFQqT8VMJyG+eJVeYF+cI7yWQ7lBzIftPUjPk/7+dIHBjWPz2QdjVz3U38
 kxncf4S9xGAF5G2rcKe4mFrfT3Y8QLWQpA/jFs06yLwW1O3Hlfq3DzMdGNcF7hth
 17LOP8namn9+NepZEp/vAlFzRRypxWWtbkPNBIItkImC6zn0IiGjBy50DE1io27W
 hmQcnMb7d+0wWl2Y8OmR2lZSB97JiRZkRYMCVHVt+0zGJzp4prLvl9wbjh1VXkPv
 ERCDJ9nCmZsl7ZVmIXMI7KNXYuPNp7R/QAzCvuSUueswF0qxTAQ0VSSBwRMqvQsQ
 UUNC6p63VnjUeMUdn2EBsUQZ0Uqw3t2U5TtvooHNt9FkiGsSpwjWrvVD+LItaPoJ
 GPeeJrJaYQsDvTrO8wjU
 =ZtPK
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC platform support updates from Kevin Hilman:
 "Our SoC branch usually contains expanded support for new SoCs and
  other core platform code.  Some highlights from this round:

   - sunxi: SMP support for A23 SoC
   - socpga: big-endian support
   - pxa: conversion to common clock framework
   - bcm: SMP support for BCM63138
   - imx: support new I.MX7D SoC
   - zte: basic support for ZX296702 SoC"

* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (134 commits)
  ARM: zx: Add basic defconfig support for ZX296702
  ARM: dts: zx: add an initial zx296702 dts and doc
  clk: zx: add clock support to zx296702
  dt-bindings: Add #defines for ZTE ZX296702 clocks
  ARM: socfpga: fix build error due to secondary_startup
  MAINTAINERS: ARM64: EXYNOS: Extend entry for ARM64 DTS
  ARM: ep93xx: simone: support for SPI-based MMC/SD cards
  MAINTAINERS: update Shawn's email to use kernel.org one
  ARM: socfpga: support suspend to ram
  ARM: socfpga: add CPU_METHOD_OF_DECLARE for Arria 10
  ARM: socfpga: use CPU_METHOD_OF_DECLARE for socfpga_cyclone5
  ARM: EXYNOS: register power domain driver from core_initcall
  ARM: EXYNOS: use PS_HOLD based poweroff for all supported SoCs
  ARM: SAMSUNG: Constify platform_device_id
  ARM: EXYNOS: Constify irq_domain_ops
  ARM: EXYNOS: add coupled cpuidle support for Exynos3250
  ARM: EXYNOS: add exynos_get_boot_addr() helper
  ARM: EXYNOS: add exynos_set_boot_addr() helper
  ARM: EXYNOS: make exynos_core_restart() less verbose
  ARM: EXYNOS: fix exynos_boot_secondary() return value on timeout
  ...
2015-06-26 11:34:35 -07:00
Paul Burton
fe4ef45b5b DEVICETREE: Add Ingenic CGU binding documentation
Document the devicetree binding for Ingenic SoC CGUs, and add headers
defining the clock specifiers for clocks provided by the JZ4740 & JZ4780
CGU blocks.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Lars-Peter Clausen <lars@metafoo.de>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Mike Turquette <mturquette@linaro.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/10152/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-06-21 21:53:13 +02:00
Joachim Eastwood
472cd304a3 clk: add lpc18xx ccu clk driver
Add driver for NXP LPC18xx/43xx Clock Control Unit (CCU). The CCU
provides fine grained gating of most clocks present in the SoC.

Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2015-06-18 15:44:48 -07:00
Joachim Eastwood
b04e0b8fd5 clk: add lpc18xx cgu clk driver
Add driver for NXP LPC18xx/43xx Clock Generation Unit (CGU). The CGU
contains several clock generators and output stages that route the
clocks either directly to peripherals or to a Clock Control Unit
(CCU).

Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2015-06-18 15:44:47 -07:00
Ray Jui
61ca7b0c7f clk: cygnus: add clock support for Broadcom Cygnus
The Broadcom Cygnus SoC is architected under the iProc architecture. It
has the following PLLs: ARMPLL, GENPLL, LCPLL0, MIPIPLL, all dervied
from an onboard crystal. Cygnus also has various ASIU clocks that are
derived directly from the onboard crystal.

Signed-off-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2015-06-18 12:36:39 -07:00
Kevin Hilman
4d48614ec4 Merge branch 'zte/soc' into next/soc
* zte/soc:
  ARM: zx: Add basic defconfig support for ZX296702
  ARM: dts: zx: add an initial zx296702 dts and doc
  clk: zx: add clock support to zx296702
  dt-bindings: Add #defines for ZTE ZX296702 clocks
2015-06-11 16:19:29 -07:00
Jun Nie
f3519dc6f0 dt-bindings: Add #defines for ZTE ZX296702 clocks
Add clocks defines for the global clock controller
found on ZTE ZX296702 SoCs.

Signed-off-by: Jun Nie <jun.nie@linaro.org>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
2015-06-11 16:18:01 -07:00
Kevin Hilman
e28f23d8aa Samsung DT updates for v4.2
- for exyos3250
   : use s3c6410-rtc instead of exynos3250-rtc
   : add JPEG codec node and support it on exynos3250-rinato
   : use s3c-rtc clock id for exynos3250-rinato and monk boards
 
 - for exynos4
   : add JPEG codec node and syscon property to MIPI DPHY
   : remove obsolete MIPI DPHY reg property
   : enable s3c-rtc on exynos4412-trats2
 
 - for exynos5
   : add syscon property to MIPI DPHY for exynos5420
   : enable s3c-rtc on exynos5420-arndale-octa
   : add missing irq pinctrl for max77686 on exynos5250-smdk5250
 
   : clk: add bindings for 32kHz clocks from s2mps11
   : fix pinctrl for s2mps11-irq on exynos5420-arndale-octa
 
 - for exynos5422-odroidxu3
   : add mmc detect gpio and LEDs
   : add HS400 support, simple-audio-card and rtc_src clock
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJVcdi/AAoJEA0Cl+kVi2xqpSUQAIyssldks3xXgM5xH7FbQO+o
 az4havpqNm/1P6b2QWEW4+NejrrHrs5SYGAQBFmE/ziMCDfDGiMsnwCZleRRoWXs
 oPndr2fLtVBzFR+IGZbEdCQ7e3RC6x/Sn0RVJsYLvhaUjQhI1TxhR/xGUF0nsjrL
 BM1bvXFPLL0p3qzCxyPPIz2k3o8YyKiLC3WiUX+pOIb7cHT1wH/sz7/lfH/Lbsmz
 wLMgUZqHsFan48qsMFDHNKChkgL4Ph/prPTM6AmDTTz/KzK2FLz8IojDKUDfBJvB
 lCPxn9AZ/mpSt+8zxSuWfKhaInOZ+t2AhxjKbks28RMcJtrttTYt1dIBld5J2u7p
 25DClKmL8/UbUp0AyHD3NTo5+RUlwz2pChVrFW3LjE3lgTBzy0zx0wcs0Rhr7y3L
 12FuV8YC7olIgP4YiPwRAVty9nFlbPWCvQu6lamYWW4XB40e1UXxk/bPSaL9hlNz
 HN2skHVRh7uGwa9txPQFkWXPjdfSmWAuhu7VA+E8hMRSeND9hcbseImkq1S8MCNd
 n17vIb4g3IwMAj/lGYJJNJ+DRhRuYeK1yjSfqpswlNxGqlHuKKbKxiuT+MR+NpvE
 YM7o2Vs5V1dJB5iJZxyxh+fzz/Cz8N2Qj7If1lDJC6I1Z5qlQk/1r4gONPDEorn0
 iAliP2yOAj2/cTylK73m
 =bWPy
 -----END PGP SIGNATURE-----

Merge tag 'samsung-dt-3' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/dt

Samsung DT updates for v4.2

- for exyos3250
  : use s3c6410-rtc instead of exynos3250-rtc
  : add JPEG codec node and support it on exynos3250-rinato
  : use s3c-rtc clock id for exynos3250-rinato and monk boards

- for exynos4
  : add JPEG codec node and syscon property to MIPI DPHY
  : remove obsolete MIPI DPHY reg property
  : enable s3c-rtc on exynos4412-trats2

- for exynos5
  : add syscon property to MIPI DPHY for exynos5420
  : enable s3c-rtc on exynos5420-arndale-octa
  : add missing irq pinctrl for max77686 on exynos5250-smdk5250

  : clk: add bindings for 32kHz clocks from s2mps11
  : fix pinctrl for s2mps11-irq on exynos5420-arndale-octa

- for exynos5422-odroidxu3
  : add mmc detect gpio and LEDs
  : add HS400 support, simple-audio-card and rtc_src clock

* tag 'samsung-dt-3' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
  ARM: dts: Add syscon property to the MIPI DPHY for exynos4415
  ARM: dts: Remove obsolete MIPI DPHY 'reg' property for exynos4
  ARM: dts: Use last parent for clocks during power domain on/off
  ARM: dts: add support JPEG codec for exynos3250-rinato
  ARM: dts: support simple-audio-card for exynos5420 and exynos5422-odroidxu3
  ARM: dts: add jpeg-codec node for exynos4 and exynos4x12
  ARM: dts: Enable S3C RTC on exynos4412-trats2 and exynos5420-arndale-octa
  ARM: dts: Use define for s3c-rtc clock id for exynos3250-monk
  ARM: dts: Use define for s3c-rtc clock id for exynos3250-rinato
  ARM: dts: Use s3c6410-rtc instead of exynos3250-rtc for exynos3250/4415
  ARM: dts: add 'rtc_src' clock to rtc node for exynos5422-odroidxu3
  clk: samsung: Add bindings for 32kHz clocks from s2mps11
  ARM: dts: fix pinctrl for s2mps11-irq on exynos5420-arndale-octa
  ARM: dts: Add syscon property to the MIPI phy in exynos5420
  ARM: dts: Add HS400 support for exynos5422-odroidxu3
  ARM: dts: Add LEDs for exynos5422-odroidxu3
  ARM: dts: add mmc detect gpio for exynos5422-odroidxu3
  ARM: dts: add JPEG codec device node for exynos3250
  ARM: dts: Add missing irq pinctrl for max77686 on smdk5250
2015-06-11 14:31:55 -07:00
Kevin Hilman
b3182ff6d9 The i.MX device tree changes for 4.2:
- Add device tree for i.MX7D SoC and imx7d-sdb board
  - New i.MX6 board support: Armadeus Systems APF6, Gateworks GW5510,
    and aristainetos2 boards
  - Change LVDS to use simple-panel for nitrogen6x and sabrelite boards
  - Add Wifi/Bluetooth devices support for cubox-i board
  - Remove unused regulators and correct OTG roles setting for
    imx6sl-warp board
  - Add I2C support for imx23-olinuxino board
  - Move imx6qdl HDMI device to a better place
  - Add power-domain for imx6qdl CODA device
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABAgAGBQJVb7iWAAoJEFBXWFqHsHzOIGEIAJjoZ+80PKH6+obh7gCuEkIx
 MkZobKxYyRRh+wD+7NZEqSPMYxBW6eUCYGCCy+f/4xjmlIfHkp/DaaCeIU0EZItl
 GU1ZE7qg6kWGbamun7zXcrg1cZ+bFOpQ926isETurL8LC2+PLm6OSg1pl6hwjqpA
 rGzY2aEH5Lke6wDN0cMus0ApMlIQ8HpOLABtqosuzUWclyZBmoxBQshbW8ztzS3Y
 pjpRfAHS91+0vZpoqmULTc/ENbTToNYk5NxJgMMDigkz1Gqp0Ni+rxmDmRPayo09
 /Nq4VHDT+wx3CSf6nC9YIrabxrBMpvTky2jWOAJ4OxMFjT0xle3XISGRoa1ifqo=
 =PbGi
 -----END PGP SIGNATURE-----

Merge tag 'imx-dt-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt

The i.MX device tree changes for 4.2:
 - Add device tree for i.MX7D SoC and imx7d-sdb board
 - New i.MX6 board support: Armadeus Systems APF6, Gateworks GW5510,
   and aristainetos2 boards
 - Change LVDS to use simple-panel for nitrogen6x and sabrelite boards
 - Add Wifi/Bluetooth devices support for cubox-i board
 - Remove unused regulators and correct OTG roles setting for
   imx6sl-warp board
 - Add I2C support for imx23-olinuxino board
 - Move imx6qdl HDMI device to a better place
 - Add power-domain for imx6qdl CODA device

* tag 'imx-dt-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (24 commits)
  ARM: dts: imx6dl: add imx6dl gpt specific compatible string
  ARM: dts: imx6: add DT for aristainetos2 board
  ARM: dts: cubox-i/hummingboard: Fix the license text
  ARM: dts: sabrelite: use simple-panel instead of display-timings for LVDS0
  ARM: dts: nitrogen6x: use simple-panel instead of display-timings for LVDS0
  ARM: dts: add imx7d-sdb support
  ARM: dts: add imx7d soc dtsi file
  ARM: dts: Armadeus Systems APF6 family support (i.MX6)
  ARM: dts: vf610: Nomenclature fixup for PTC12 pin used in RMII mode.
  ARM: dts: cubox-i: add support for Broadcom Wifi/Bluetooth devices
  Document: dt: binding: imx: update document for imx7d support
  ARM: dts: imx6qdl: Add power-domain phandle to CODA device node
  ARM: dts: Gateworks GW5510 support (i.MX6)
  ARM: dts: imx6sl-warp: Fix OTG roles
  ARM: dts: imx6sl-warp: Remove USB regulators
  ARM: dts: imx6sl-warp: Remove unused regulator
  ARM: dts: add pinfunc include file to support imx7d
  ARM: mxs: fix in tree users of ssd1306
  ARM: dts: imx6qdl-hummingboard: Add PCIe support
  ARM: dts: imx23-olinuxino: Add i2c support
  ...
2015-06-10 17:01:25 -07:00
Stephen Boyd
d3000d0d4a Merge branch 'clk-meson8b' into clk-next
* clk-meson8b:
  clk: meson8b: Add support for Meson8b clocks
  clk: meson: Document bindings for Meson8b clock controller
  clk: meson: Add support for Meson clock controller
2015-06-05 17:22:36 -07:00
Carlo Caione
7a29a86943 clk: meson: Add support for Meson clock controller
This patchset adds the infrastructure for registering and managing the
core clocks found on Amlogic MesonX SoCs. In particular:

- PLLs
- CPU clock
- Fixed rate clocks, fixed factor clocks, ...

Signed-off-by: Carlo Caione <carlo@endlessm.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-06-05 17:22:08 -07:00
Chao Xie
24c65a02b2 clk: mmp: add timer clock for pxa168/mmp2/pxa910
Timer has external fast clock, and it is a mux clock.
Add the timer clock type for timer driver.

Signed-off-by: Chao Xie <chao.xie@marvell.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-06-04 12:07:53 -07:00
Chao Xie
a35247c6ee clk: mmp: add fixed clock UBS_PLL for pxa910/pxa168
USB will drive clock from USB_PLL.

Signed-off-by: Chao Xie <chao.xie@marvell.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-06-04 12:07:33 -07:00
Michael Turquette
ae8d4048fa Merge branch 'clk-next-hi6220' into clk-next
Conflicts:
	drivers/clk/Kconfig
2015-06-03 15:22:03 -07:00
Bintian Wang
2a40a2ea10 dt-bindings: Add header file of hi6220 clock driver
Add the header file "hi6220-clock.h" used by both
hi6220 clock driver and hi6220 device tree file.

Suggested-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Bintian Wang <bintian.wang@huawei.com>
Tested-by: Will Deacon <will.deacon@arm.com>
Tested-by: Tyler Baker <tyler.baker@linaro.org>
Tested-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
2015-06-03 09:33:50 -07:00
Stefan Agner
d930d56825 ARM: imx: clk-vf610: enable debug access port by default
Enabled DAP (debug access port) by default. This enables the hw-
breakpoint framework to make use of the breakpoints and watchpoints
supported by hardware.

[    0.215805] hw-breakpoint: found 2 (+1 reserved) breakpoint and 1 watchpoint registers.
[    0.224624] hw-breakpoint: maximum watchpoint size is 4 bytes.

Without this clock, the hw-breakpoint driver claims an undefined
instruction during initialization:
[    0.227380] hw-breakpoint: Debug register access (0xee003e17) caused undefined instruction on CPU 0
[    0.227519] hw-breakpoint: CPU 0 failed to disable vector catch

Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2015-06-03 14:49:36 +08:00
Frank Li
0ed4668a5f dt-bindings: add imx7d clock ID definitions
It adds the imx7d clock ID definitions which will be used by both imx7d
clock driver and device tree.

Signed-off-by: Frank Li <Frank.Li@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2015-06-03 14:41:29 +08:00
Stephen Boyd
f7b81d67d0 clk: qcom: Add support for NSS/GMAC clocks and resets
Add the NSS/GMAC clocks and the TCM clock and NSS resets.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
2015-05-30 17:04:36 -07:00
Markus Reichl
b6025b1040 clk: samsung: Add bindings for 32kHz clocks from s2mps11
This creates include/dt-bindings/clock/samsung,s2mps11.h with
the three 32kHz clock outputs from the s2mps11 mfd.

Signed-off-by: Markus Reichl <m.reichl@fivetechno.de>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski.k@gmail.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
2015-05-17 10:51:10 +09:00
Rob Herring
8a3d9c1641 dt-bindings: Add pxa1928 clock binding
This adds the clock binding documentation for the Marvell PXA1928 SOC.
The PXA1928 has 3 clock control blocks for different subsystems of the
chip.

Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-05-15 12:31:38 -07:00
Geert Uytterhoeven
1c5ca5db11 ARM: shmobile: r8a7794: Add IRQC clock to device tree
Link the external IRQ controller irqc0 to the IRQC module clock, so it
can be power managed using that clock.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-05-11 15:01:23 +09:00
Geert Uytterhoeven
62d386c04b ARM: shmobile: r8a7791: Add IRQC clock to device tree
Link the external IRQ controller irqc0 to the IRQC module clock, so it
can be power managed using that clock.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-05-11 15:01:23 +09:00
Geert Uytterhoeven
61624caf24 ARM: shmobile: r8a7790: Add IRQC clock to device tree
Link the external IRQ controller irqc0 to the IRQC module clock, so it
can be power managed using that clock.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-05-11 15:01:22 +09:00
Geert Uytterhoeven
1c2a7eb716 ARM: shmobile: r8a73a4: Add IRQC clock to device tree
Link the external IRQ controllers irqc0 and irqc1 to the IRQC module
clock, so they can be power managed using that clock.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
[horms: corrected typo in changelog to refer to r8a73a4]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-05-11 15:00:09 +09:00
James Liao
c1e81a3bef clk: mediatek: Add basic clocks for Mediatek MT8173.
This patch adds basic clocks for MT8173, including TOPCKGEN, PLLs,
INFRA and PERI clocks.

Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Signed-off-by: Henry Chen <henryc.chen@mediatek.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-05-05 22:50:38 -07:00
James Liao
a8aede7948 clk: mediatek: Add basic clocks for Mediatek MT8135.
This patch adds basic clocks for MT8135, including TOPCKGEN, PLLs,
INFRA and PERI clocks.

Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Signed-off-by: Henry Chen <henryc.chen@mediatek.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-05-05 22:50:35 -07:00
Linus Torvalds
e5ac320de1 ARM: SoC multiplatform code changes for v4.1
The changes here belong to two main platforms:
 
 - Atmel At91 is flipping the bit and going multiplatform. This includes some
   cleanups and removal of code, and the final flip of config dependencies
 
 - Shmobile has several platforms that are going multiplatform, but this
   branch also contains a bunch of cleanups that they weren't able to keep
   separate in a good way. THere's also a removal of one of their SoCs and the
   corresponding boards (sh7372 and mackerel).
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJVNzfJAAoJEIwa5zzehBx3iRcP/1v9Rw2yk4NpUDaz5EUwhwN6
 y5l29gW8jJmVuHWqLUqsgh61dsj5AEEAL7fEEbR8e8848s+RxsehjsGPIxFOkR74
 KaKSRlrUgxKcsFN97Jo/WqT3seC83hg6zWQapwNypX33gBtrRLPhM9FEb05asYA8
 6x7N29kFeH9M3A6lrabXGWz5tPRZSthwuBSmomHOfgqa5zbgkoaK59j867Yac0q+
 Pemh0eJZHC3Pyrmh7ZcVaCaSvr1QO6ructmLopmHAXfls2Fi21wq3IN3641aiitC
 G7hhb1/c961MpE3p+0dQyrXs645qIgYv/fDxp72T8YwA7FhjMmIscX/WiITXMlvC
 Mg/fDJXqgRkTPWjvVM6xF8TKCSdvqfmErWtHt2dtgvbFWL0ffSeoYF35AF5BODVG
 jp8RR6vQ/CHKFao5iJmTpm0ccjnzdS82FEb0PrhG0vY+u6uCsKMim5tn8wUBuBkM
 QU2FipNt6STC5ZcCSb+p7r5ihod9rG+BlNL/eXJ+pBHuVnjSgltEaZBP9qIiFjZl
 MLRjm7JaEY3LpAR/TVurtSrUnh0zC0RRSzptK4RekmFIwyL+mqq/I1yrksdnVjgf
 upj1dZwFRsVtD5PcaU3LyTYCOLSI8L9+b6vVvfFH0Sq4V7TkaBkI/kxnhI2WfkBc
 CJ+3vptpyphw6zHAngAN
 =Vq4N
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC multiplatform code changes from Olof Johansson:
 "The changes here belong to two main platforms:

   - Atmel At91 is flipping the bit and going multiplatform.  This
     includes some cleanups and removal of code, and the final flip of
     config dependencies

   - Shmobile has several platforms that are going multiplatform, but
     this branch also contains a bunch of cleanups that they weren't
     able to keep separate in a good way.  THere's also a removal of one
     of their SoCs and the corresponding boards (sh7372 and mackerel)"

* tag 'armsoc-multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (67 commits)
  ARM: at91/pm: move AT91_MEMCTRL_* to pm.h
  ARM: at91/pm: move the standby functions to pm.c
  ARM: at91: fix pm_suspend.S compilation when ARMv6 is selected
  ARM: at91: add a Kconfig dependency on multi-platform
  ARM: at91: drop AT91_TIMER_HZ
  ARM: at91: remove hardware.h
  ARM: at91: remove SoC headers
  ARM: at91: remove useless mach/cpu.h
  ARM: at91: remove unused headers
  ARM: at91: switch at91_dt_defconfig to multiplatform
  ARM: at91: switch to multiplatform
  ARM: shmobile: r8a7778: enable multiplatform target
  ARM: shmobile: bockw: add sound to DT
  ARM: shmobile: r8a7778: add sound to DT
  ARM: shmobile: bockw: add devices hooked up to i2c0 to DT
  DT: i2c: add trivial binding for OKI ML86V7667 video decoder
  ARM: shmobile: r8a7778: common clock framework CPG driver
  ARM: shmobile: bockw dts: set extal clock frequency
  ARM: shmobile: bockw dts: Move Ethernet node to BSC
  ARM: shmobile: r8a73a4: Remove legacy code
  ...
2015-04-22 09:20:15 -07:00
Linus Torvalds
5c73cc4b6c ARM: DT updates for v4.1
As always, this tends to be one of our bigger branches. There are lots of
 updates this release, but not that many jumps out as something that needs
 more detailed coverage. Some of the highlights are:
 
 - DTs for the new Annapurna Labs Alpine platform
 - More graphics DT pieces falling into place on Exynos, bridges, clocks.
 - Plenty of DT updates for Qualcomm platforms for various IP blocks
 - Some churn on Tegra due to switch-over to tool-generated pinctrl data
 - Misc fixes and updates for Atmel at91 platforms
 - Various DT updates to add IP block support on Broadcom's Cygnus platforms
 - More updates for Renesas platforms as DT support is added for various IP
   blocks (IPMMU, display, audio, etc).
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJVNzKFAAoJEIwa5zzehBx3JtEP/1g89CW7iZHAUyIiC+jtgqck
 ASoplr13DLD0HWjjWITX3zm7J/iY57YjEv14tHH/xmrh5YCCZ+mRLqiD/Plnv0Zv
 JdJRRJv/NMnMlu/tA1aBO326JOt2Vw+3YngmYayDpoRzVifx2YTJLbu2difa+6rM
 vN6FpOE6U5jkvM16+gqxKxyx0tGIQz9cTn+9q2V1fDS++vZ2VvqfB5pTNul3BKAF
 OVCNFJ/EUE9EPMPbmgDjYmNE/POj64kF32n7NBEQz2Z+nwDNxDAecfF356hV7o5g
 JsFLNK+4c2QQqBL775xzCf5kK+n/V2cFEpDica+hU70AdWsjdAlUFrbOsWGUJLRi
 4Blrv8GRxEKeOCs8AFKYCM+z3zf2ais7JMteD2VW26ywCwpUt+QEZTUVHRHU3NYQ
 BMI7uyTGIH2GyLyS+Av3vikza8IbDIwlYuuDpXhCJSXXgKSnbzCrpjkhyGLccBJR
 k3qgUwPJVw9hP1qaaNgvb7p9oNhTP2yLl3fQ68WqI7QWIupW0/s12INhzFFgt6zU
 Nzcx010ku9yMeMMGtfiNgA3cMln+Ysfs1UIUOMQ36zP1PCtHJkZgwtZzTsBE4A04
 KqmiLL/+7qsconEhEanmDzTpeXiNzERnOKSSqVN7Fwp89GEFJLrWpHSXI+8SBTHC
 fB54LRTNYdlcoN0QshcT
 =wqhB
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM DT updates from Olof Johansson:
 "As always, this tends to be one of our bigger branches.  There are
  lots of updates this release, but not that many jumps out as something
  that needs more detailed coverage.  Some of the highlights are:

   - DTs for the new Annapurna Labs Alpine platform

   - more graphics DT pieces falling into place on Exynos, bridges,
     clocks.

   - plenty of DT updates for Qualcomm platforms for various IP blocks

   - some churn on Tegra due to switch-over to tool-generated pinctrl
     data

   - misc fixes and updates for Atmel at91 platforms

   - various DT updates to add IP block support on Broadcom's Cygnus
     platforms

   - more updates for Renesas platforms as DT support is added for
     various IP blocks (IPMMU, display, audio, etc)"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (231 commits)
  ARM: dts: alpine: add internal pci
  Revert "ARM: dts: mt8135: Add pinctrl/GPIO/EINT node for mt8135."
  ARM: mvebu: use 0xf1000000 as internal registers on Armada 370 DB
  ARM: dts: qcom: Add idle state device nodes for 8064
  ARM: dts: qcom: Add idle states device nodes for 8084
  ARM: dts: qcom: Add idle states device nodes for 8974/8074
  ARM: dts: qcom: Update power-controller device node for 8064 Krait CPUs
  ARM: dts: qcom: Add power-controller device node for 8084 Krait CPUs
  ARM: dts: qcom: Add power-controller device node for 8074 Krait CPUs
  devicetree: bindings: Document qcom,idle-states
  devicetree: bindings: Update qcom,saw2 node bindings
  dt-bindings: Add #defines for MSM8916 clocks and resets
  arm: dts: qcom: Add LPASS Audio HW to IPQ8064 device tree
  arm: dts: qcom: Add APQ8084 chipset SPMI PMIC's nodes
  arm: dts: qcom: Add 8x74 chipset SPMI PMIC's nodes
  arm: dts: qcom: Add SPMI PMIC Arbiter nodes for APQ8084 and MSM8974
  arm: dts: qcom: Add LCC nodes
  arm: dts: qcom: Add TCSR support for MSM8960
  arm: dts: qcom: Add TCSR support for MSM8660
  arm: dts: qcom: Add TCSR support for IPQ8064
  ...
2015-04-22 09:09:46 -07:00
Linus Torvalds
e6c81cce56 ARM: SoC platform updates for v4.1
Our SoC branch usually contains expanded support for new SoCs and other core
 platform code. In this case, that includes:
 
 - Support for the new Annapurna Labs "Alpine" platform
 - A rework greatly simplifying adding new platform support to the MCPM
   subsystem (Multi-cluster power management)
 - Cpuidle and PM improvements for Exynos3250
 - Misc updates for Renesas, OMAP, Meson, i.MX. Some of these could have
   gone in other branches but ended up here for various reasons.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJVNzfWAAoJEIwa5zzehBx3idcP/Rt042tqb0bian/4M1Ud1aQ7
 AMRd4oU5MfWAlzaGPeMBS+b1eo/eENj6wyWsvBQIByZN76ImlUXtxsx0U0frLrVg
 mWVo9zOLRuoE6yyq329zZgg1IM1RtRIruS6zucKsHgKtq0DcjhYGGUH0ZVZk/rKI
 RLtRK8U6Jr0lnpu1TDE5mii7GCCZlEl5dG+J3w5ewC9y7RLRlM09xjK/Zsj0QOqY
 JvMOIaHuHMT6l7BQ6QajtVxTeGECOJ3YDqC6mDHCVD7f3v88+7H5C20xNGPK921w
 tLfB5qOojnj+kKZRPhi8EGnRzKwrBq6/mE5CvvigTCGlAEUOzy7PFSY9oNE80QeL
 6mUdPTuZuqz7ZEIF0kj8I0AkB6k8B+aYfqA9mqM5yGpa11HvZZGfP7CwI4izoe6+
 sT++0OeDPwbsMyRxZjqNQLs4QYaKGYMP4NCgA17zz5ToRCQZy7e5hd2GYzaRouyi
 kTpR9FbxwDcBIwTcA3F7oJ90BEMJ0tvGz/Al11UQpzPePhTwQt2yB5bRZyK/RYIU
 x8k8RHArG3fmS89D4aOViL3sy/zoUBedx4UfAo6jVbrvoZGALQL23KHdqBqDiPmP
 sMRj/sSr+0h9nJCVNM6I/OUD4/IrpFGaeX9V7rpEsHVe7j83eV7Q2wNRPyVTgxdn
 jS8TS0FNAXIv8FO9EoNH
 =tcGs
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC platform updates from Olof Johansson:
 "Our SoC branch usually contains expanded support for new SoCs and
  other core platform code.  In this case, that includes:

   - support for the new Annapurna Labs "Alpine" platform

   - a rework greatly simplifying adding new platform support to the
     MCPM subsystem (Multi-cluster power management)

   - cpuidle and PM improvements for Exynos3250

   - misc updates for Renesas, OMAP, Meson, i.MX.  Some of these could
     have gone in other branches but ended up here for various reasons"

* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (53 commits)
  ARM: alpine: add support for generic pci
  ARM: Exynos: migrate DCSCB to the new MCPM backend abstraction
  ARM: vexpress: migrate DCSCB to the new MCPM backend abstraction
  ARM: vexpress: DCSCB: tighten CPU validity assertion
  ARM: vexpress: migrate TC2 to the new MCPM backend abstraction
  ARM: MCPM: move the algorithmic complexity to the core code
  ARM: EXYNOS: allow cpuidle driver usage on Exynos3250 SoC
  ARM: EXYNOS: add AFTR mode support for Exynos3250
  ARM: EXYNOS: add code for setting/clearing boot flag
  ARM: EXYNOS: fix CPU1 hotplug on Exynos3250
  ARM: S3C64XX: Use fixed IRQ bases to avoid conflicts on Cragganmore
  ARM: cygnus: fix const declaration bcm_cygnus_dt_compat
  ARM: DRA7: hwmod: Fix the hwmod class for GPTimer4
  ARM: DRA7: hwmod: Add data for GPTimers 13 through 16
  ARM: EXYNOS: Remove left over 'extra_save'
  ARM: EXYNOS: Constify exynos_pm_data array
  ARM: EXYNOS: use static in suspend.c
  ARM: EXYNOS: Use platform device name as power domain name
  ARM: EXYNOS: add support for async-bridge clocks for pm_domains
  ARM: omap-device: add missed callback for suspend-to-disk
  ...
2015-04-22 09:08:39 -07:00
Linus Torvalds
e98bf5cedf The changes to the common clock framework for 4.0 are mostly new clock
drivers and updates to existing ones for feature enhancements and bug
 fixes. There is more churn than usual in the framework core due to the
 change to introduce per-user unique struct clk pointers in 4.0. This
 caused several regressions to surface, some of which were sent as fixes
 to 4.0. New generic clock drivers were added for GPIO- and PWM-based
 clock controllers. Additionally the common clk-divider code recieved
 several fixes to the way it rounds rates.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJVNcIIAAoJEKI6nJvDJaTU3a8QAM+fjhDMY5xpI6VIbxZaA2aR
 VUofw9/rdAtP1UdwtlSKBvCqpwwqt/U7zlMWU9v+UvTjYdHIf9SIDQoJnd+uEtwL
 roz/kNeB7WOVyxwbTJ2B5fjvPSN+mq8Rm8ANDcL8ZOGxxtt2Mip1IWMAlx2XUnwG
 tYZhB7EfKzLHZRblOdn2Q4U/4T+KXOFTSO+Gb9o2J0I2sJLI0NRXhcl9Fcoo8KVz
 G0ACWa0F1WKsbqzBATnhtYiKkuC3BeiS2eMuTVTlkP+Gd6YQ2f1zWLeBfXEiPGZb
 q0p/qTrUFLHbRoJMMuWaUfaBxb8PeUfM6yllxrzvRxPJU25pbj8OW/O5ZAe9xP8G
 S17sQ2nhEoWZW9hqbuA39IcLGa6RjT+TD+z3kmXQ9ZvCVDN2Oqqb/4ZNViwAvQq7
 t67EfV7hGXty3Q58tS4XE9hHfwY+9YqMDLNIS/ED+hP8rcxTmiLlAIyk+qbT3b0l
 Q+375Ar7iCgihPPHYxeM5Qe1+Vsfh4NjR9thdAbT245MB3f90ULb+GNP/izUDOgA
 c/Ot6pStVFEUxTol6RlcLb85PugzrkoBOF/8ZLySdMLhALjPwaFcQZ1sFdcKUKlE
 tt7sZKQgbbCfqYGS9K264uUfWbdmZh05zhtkH0xUjyQpyIcnrYQsSIIEEnlbYnPp
 0D55nooSGROKeud+gyrx
 =2LMr
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus-4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clock framework updates from Michael Turquette:
 "The changes to the common clock framework for 4.0 are mostly new clock
  drivers and updates to existing ones for feature enhancements and bug
  fixes.

  There is more churn than usual in the framework core due to the change
  to introduce per-user unique struct clk pointers in 4.0.  This caused
  several regressions to surface, some of which were sent as fixes to
  4.0.  New generic clock drivers were added for GPIO- and PWM-based
  clock controllers.

  Additionally the common clk-divider code recieved several fixes to the
  way it rounds rates"

* tag 'clk-for-linus-4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (91 commits)
  clk: check ->determine/round_rate() return value in clk_calc_new_rates
  clk: at91: usb: propagate rate modification to the parent clk
  clk: samsung: exynos4: Disable ARMCLK down feature on Exynos4210 SoC
  clk: don't use __initconst for non-const arrays
  clk: at91: change to using endian agnositc IO
  clk: clk-gpio-gate: Fix active low
  clk: Add PWM clock driver
  clk: Add clock driver for mb86s7x
  clk: pxa: pxa3xx: add missing os timer clock
  clk: tegra: Use the proper parent for plld_dsi
  clk: tegra: Use generic tegra_osc_clk_init() on Tegra114
  clk: tegra: Model oscillator as clock
  clk: tegra: Add peripheral registers for bank Y
  clk: tegra: Register the proper number of resets
  clk: tegra: Remove needless initializations
  clk: tegra: Use consistent indentation
  clk: tegra: Various whitespace cleanups
  clk: tegra: Enable HDA to HDMI clocks on Tegra124
  clk: tegra: Fix a bunch of sparse warnings
  clk: tegra: Fix typo tabel -> table
  ...
2015-04-21 09:24:09 -07:00
Michael Turquette
c14deee398 clk/tegra: Changes for v4.1-rc1
These are mostly cleanups that I've been carrying in my local tree for
 far too long. In addition to those, there are some preparatory patches
 for the upcoming Tegra210 support and a patch to enable clocks needed
 for HDMI audio support.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iQIcBAABCAAGBQJVJ9p+AAoJEN0jrNd/PrOhXC0QAL0+R6DNrekhtdp7VBwEpABA
 kSku2EmcHs+Q+hbZY0CoifZkuRbdZEPYJOwwDDSy/cYqKhS4Hj1yHFywNe9Yq/8F
 toBVtneRPcBILwY61V5G9PRL493CZlmT3RYsZ6/WLTL45VromIYeRmVXYXYMMaRz
 AqbrKGrrROiG18tfDhfSLIethg+pJPS5abREnZPoplk822V91hP4NPXOlJLv6uIv
 gETDCUBbQ5P/VZdqyTyEutq1r5AyL+dTV16b44APY8XeoIyGzo9wM7dT3t69eTaV
 sculQoInC4GqWs/hWmCaIHLvLhKWj8vKPbmsCDRkwMT33Ssj1/Qhz6gWBDbtH+tV
 IHBwOoh0emn9pf0kdzEqpR4Xj2DY4nlsO6hjLT8yHIxaZRIoPmssy697z/x+Go0M
 xRSi+j98sr/tfOCe4936xjqiYAwXx3Hqs30ew9KO3zyd5bpR2CAGjpyV6LBTZ48e
 6T7uXmeoEBxqj/OWcG5fJOjSacAHPnA8224svFFqtg7fJlPUmCI9mpv6rEEvNIGa
 rDuFtGgPAH++wBJYlNGR7hJkUkyx23BchBtqByw3QJPIYuD/MZmHjUf1HyiS4eqj
 zS5rBhACnf4SX0TZgcpkaWB4RPLpBikVHgcVt2Q4a5SuEMqTR78XsnDrOhzjT0ZO
 i03CI2EoFSXooZq9rpZ9
 =4zxP
 -----END PGP SIGNATURE-----

Merge tag 'clk/for-4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into clk-next

clk/tegra: Changes for v4.1-rc1

These are mostly cleanups that I've been carrying in my local tree for
far too long. In addition to those, there are some preparatory patches
for the upcoming Tegra210 support and a patch to enable clocks needed
for HDMI audio support.
2015-04-10 18:06:55 -07:00
Thierry Reding
c1d676cec5 clk: tegra: Use the proper parent for plld_dsi
The current parent, plld_out0, does not exist. The proper name is
pll_d_out0. While at it, rename the plld_dsi clock to pll_d_dsi_out to
be more consistent with other clock names.

Fixes: b270491eb9 ("clk: tegra: Define PLLD_DSI and remove dsia(b)_mux")
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-04-10 16:04:22 +02:00
Archit Taneja
4c385b25fa clk: qcom: Add EBI2 clocks for IPQ806x
The NAND controller within EBI2 requires EBI2_CLK and
EBI2_ALWAYS_ON_CLK clocks.  Create structs for these clocks so
that they can be used by the NAND controller driver. Add an entry
for EBI2_AON_CLK in the gcc-ipq806x DT binding document.

Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-04-06 14:07:49 -07:00
Georgi Djakov
83bd147952 dt-bindings: Add #defines for MSM8916 clocks and resets
Add clocks/resets defines for the global clock controller
found on Qualcomm MSM8916 SoCs.

Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-04-03 13:33:50 -07:00
Olof Johansson
c0b0bb6e14 Renesas ARM Based SoC sh73a0 Multiplatform Updates for v4.1
* Add multiplatform support to sh73a0 and its kzm9g board
 * Use Bus State Controller to enable ethernet for multiplatform sh73a0/kzm9g
 * Add PM domain support to multiplatform sh73a0
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJU97BNAAoJENfPZGlqN0++sr8P/0GMFyARmTdVYVx/2OA3xc3k
 4zJO2GtoT3vyPAYtjI4DX1ef3lVHnQd4J+Sh8gdYVGJ3iCz/kUNUgiFk7PrGqedr
 BriF33vtKcjcMm5oN6tblaR0UEhUDrDBh5lOO9FwoLGtzf/kVhRNXwFdsl4DHt8j
 a+Obw0Uj48dmbZaR0sTbPw4G4srqyFYpv3cZ/tlPplJfwOwOEOQFssnIrFAQ0JTI
 1GNyYlGNH72Y7M+lNraqk5oO708nkm38paLk7E8mYGWD13IQCp8hi27vX0buUV4H
 lmA5f6a8vKo7M0J1wrb6IieFYimSR/msUHHjqr2Ot1LpR+0BGhOVPfDyWrf1F3Gy
 L+CkztggOz54WT8krGJW0mu1U0L5PmlOFzFieB6trLuhUDOq+3F2YUJeNom+MFoE
 zngo8yppyQUD0q015Jvm127IFyYn2w+jBoOZvpJ1K+Bv1QoW59kSXMB83PN3cq6y
 r5tvH6a/HGrga3sYLbcXZVu4wSVD1QvehIGteHcTVGR5WN4Go1EM+fCOv2VwzUA9
 lyjmwEP/rBU5y7uKF3WLP1WTklsNIz+7P9NbdQXJHxUHyK8B4QeDTNG50MM0oHIS
 GDS8WRjsdf4lkipB/nP50tYcEYzqYMl/mMFTv+hv5YFT7mlo+cO/2VZa8vWaFO9L
 KhbTwk/Rtmdrxm5okb+g
 =7DUP
 -----END PGP SIGNATURE-----

Merge tag 'renesas-sh73a0-multiplatform-for-v4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/multiplatform

Merge "Renesas ARM Based SoC sh73a0 Multiplatform Updates for v4.1" from Simon
Horman:

* Add multiplatform support to sh73a0 and its kzm9g board
* Use Bus State Controller to enable ethernet for multiplatform sh73a0/kzm9g
* Add PM domain support to multiplatform sh73a0

* tag 'renesas-sh73a0-multiplatform-for-v4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (43 commits)
  ARM: shmobile: sh73a0: Remove restart callback
  ARM: shmobile: sh73a0 dtsi: Add PM domain support
  ARM: shmobile: sh73a0: Remove unused sh73a0_add_standard_devices_dt()
  ARM: shmobile: sh73a0 dtsi: Add Cortex-A9 TWD node
  ARM: shmobile: kzm9g-reference: Remove board C code and DT file
  ARM: shmobile: kzm9g dts: Move Ethernet node to BSC
  ARM: shmobile: sh73a0 dtsi: Add Bus State Controller node
  ARM: shmobile: kzm9g: Build DTS for Multiplatform
  ARM: shmobile: kzm9g dts: Sync with kzm9g-reference dts
  ARM: shmobile: sh73a0: Add Multiplatform support
  ARM: shmobile: sh73a0: Introduce generic setup callback
  ARM: shmobile: r8a7794: add SDHI DT support
  ARM: shmobile: r8a7790: add ADSP clocks
  ARM: shmobile: r8a7791: add ADSP clocks
  ARM: shmobile: henninger: add CAN0 DT support
  ARM: shmobile: r8a7791: add CAN DT support
  ARM: shmobile: r8a7791: add CAN clocks
  ARM: shmobile: r8a7790: add CAN DT support
  ARM: shmobile: r8a7790: add CAN clocks
  ARM: shmobile: emev2-kzm9d dts: Add PFC information for uart1
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-04-01 16:37:30 -07:00
Olof Johansson
d36d520ae6 Renesas ARM Based SoC r8a73a4 CCF and Multiplatform Updates for v4.1
* Add CCF and them multiplatform support to r8a73a4 SoC and its
   ape6evm board.
 * Then remove legacy r8a73a4 SoC and ape6evm board code.
 
 ----------------------------------------------------------------
 Geert Uytterhoeven (6):
       ARM: shmobile: r8a73a4 dtsi: Add Bus State Controller node
       ARM: shmobile: ape6evm dts: Move Ethernet node to BSC
       ARM: shmobile: r8a73a4: Move pfc node to work around probe ordering bug
       ARM: shmobile: ape6evm dts: Drop console= bootargs parameter
       PM / Domains: R-Mobile SYSC: Document R-Mobile APE6 (r8a73a4) binding
       ARM: shmobile: r8a73a4 dtsi: Add PM domain support
 
 Laurent Pinchart (1):
       ARM: shmobile: r8a73a4: Remove legacy code
 
 Simon Horman (1):
       ARM: shmobile: r8a73a4: ape6evm: Remove legacy platform
 
 Ulrich Hecht (5):
       ARM: shmobile: r8a73a4: Add CPG register bits header
       ARM: shmobile: r8a73a4: Common clock framework DT description
       ARM: shmobile: ape6evm: Disable legacy clock initialization
       ARM: shmobile: r8a73a4: Add MSTP clock assignments to DT
       ARM: shmobile: ape6evm-reference: Remove board C code and DT file
 
  Documentation/devicetree/bindings/arm/shmobile.txt |   2 -
  .../bindings/power/renesas,sysc-rmobile.txt        |   1 +
  MAINTAINERS                                        |   1 -
  arch/arm/boot/dts/Makefile                         |   2 -
  arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts    | 156 -----
  arch/arm/boot/dts/r8a73a4-ape6evm.dts              |  37 +-
  arch/arm/boot/dts/r8a73a4.dtsi                     | 557 ++++++++++++++++-
  arch/arm/configs/ape6evm_defconfig                 | 109 ----
  arch/arm/mach-shmobile/Kconfig                     |  25 -
  arch/arm/mach-shmobile/Makefile                    |   3 -
  arch/arm/mach-shmobile/Makefile.boot               |   2 -
  arch/arm/mach-shmobile/board-ape6evm-reference.c   |  60 --
  arch/arm/mach-shmobile/board-ape6evm.c             | 306 ----------
  arch/arm/mach-shmobile/clock-r8a73a4.c             | 659 ---------------------
  arch/arm/mach-shmobile/r8a73a4.h                   |  17 -
  arch/arm/mach-shmobile/setup-r8a73a4.c             | 273 +--------
  include/dt-bindings/clock/r8a73a4-clock.h          |  62 ++
  17 files changed, 615 insertions(+), 1657 deletions(-)
  delete mode 100644 arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts
  delete mode 100644 arch/arm/configs/ape6evm_defconfig
  delete mode 100644 arch/arm/mach-shmobile/board-ape6evm-reference.c
  delete mode 100644 arch/arm/mach-shmobile/board-ape6evm.c
  delete mode 100644 arch/arm/mach-shmobile/clock-r8a73a4.c
  delete mode 100644 arch/arm/mach-shmobile/r8a73a4.h
  create mode 100644 include/dt-bindings/clock/r8a73a4-clock.h
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJU96qlAAoJENfPZGlqN0++J+4P/iMsuriwDf4KEav4d9IAKdOr
 uMGx7yN1wsi2tQTVen2ThEjZFF5TwDfT4VN9hSsDvqqnvFP+IZ1/GQNtsV5PAxoh
 EQJMxUDAHYbUhAYeiCb5dA6e6+Xpem9jBj5eI03Xqy6o6b5rmhy4878Kf/zHyx6q
 02rwUlry2D+DMhe+urxKr/3ihBJWBp0c7ivontYd+awgs5L6QaF8/I69i6ggC1N/
 GFEdPKx6411LxBp+CVVvbmye9tcNn6q5wjAv/2egtyeMYjOhd9bl/tc88hE5dda3
 YjKMqtVZoZ7R6sks/Xe2VbgQLq/5/+9KcX0XY9IJ9fyWtd/ZRU2g3cIxdWCGVqmI
 bVAUOBWu86I93EA37E6B41vM8qaqeRa0LOqS/0FccfkItCHdARR4CTvUZVQGyLc3
 Jf0S+cF4AYpGzlyIRNiBY9pXgRngSPbntX+tj+h8sBL2Z1c9KOCotPX4ceiLKAOn
 KRpW/eCevfCeTkv5DTKDeZMGHgcyVCwlz3TjnJp3gNBDbeHzVr7JdtoRbxceGX/8
 nZ/KmPd7+Td8Ft/zpeXpoW0g4PTYFUVAKIaG9OEdqMw/yPX2y8ev+433Aq7ZzZCe
 LTaqw/LpM0NKnUU3mey3CXAXvN3zvZWu4mV9ICp0uxQv4pmGxKaD7q+kIJSk6RaN
 ZXReVZUGOX0tUODNWM8h
 =CiEt
 -----END PGP SIGNATURE-----

Merge tag 'renesas-r8a73a4-ccf-and-multiplatform-for-v4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/multiplatform

Merge "Renesas ARM Based SoC r8a73a4 CCF and Multiplatform Updates for
v4.1" from Simon Horman:

* Add CCF and them multiplatform support to r8a73a4 SoC and its
  ape6evm board.
* Then remove legacy r8a73a4 SoC and ape6evm board code.

----------------------------------------------------------------
Geert Uytterhoeven (6):
      ARM: shmobile: r8a73a4 dtsi: Add Bus State Controller node
      ARM: shmobile: ape6evm dts: Move Ethernet node to BSC
      ARM: shmobile: r8a73a4: Move pfc node to work around probe ordering bug
      ARM: shmobile: ape6evm dts: Drop console= bootargs parameter
      PM / Domains: R-Mobile SYSC: Document R-Mobile APE6 (r8a73a4) binding
      ARM: shmobile: r8a73a4 dtsi: Add PM domain support

Laurent Pinchart (1):
      ARM: shmobile: r8a73a4: Remove legacy code

Simon Horman (1):
      ARM: shmobile: r8a73a4: ape6evm: Remove legacy platform

Ulrich Hecht (5):
      ARM: shmobile: r8a73a4: Add CPG register bits header
      ARM: shmobile: r8a73a4: Common clock framework DT description
      ARM: shmobile: ape6evm: Disable legacy clock initialization
      ARM: shmobile: r8a73a4: Add MSTP clock assignments to DT
      ARM: shmobile: ape6evm-reference: Remove board C code and DT file

 Documentation/devicetree/bindings/arm/shmobile.txt |   2 -
 .../bindings/power/renesas,sysc-rmobile.txt        |   1 +
 MAINTAINERS                                        |   1 -
 arch/arm/boot/dts/Makefile                         |   2 -
 arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts    | 156 -----
 arch/arm/boot/dts/r8a73a4-ape6evm.dts              |  37 +-
 arch/arm/boot/dts/r8a73a4.dtsi                     | 557 ++++++++++++++++-
 arch/arm/configs/ape6evm_defconfig                 | 109 ----
 arch/arm/mach-shmobile/Kconfig                     |  25 -
 arch/arm/mach-shmobile/Makefile                    |   3 -
 arch/arm/mach-shmobile/Makefile.boot               |   2 -
 arch/arm/mach-shmobile/board-ape6evm-reference.c   |  60 --
 arch/arm/mach-shmobile/board-ape6evm.c             | 306 ----------
 arch/arm/mach-shmobile/clock-r8a73a4.c             | 659 ---------------------
 arch/arm/mach-shmobile/r8a73a4.h                   |  17 -
 arch/arm/mach-shmobile/setup-r8a73a4.c             | 273 +--------
 include/dt-bindings/clock/r8a73a4-clock.h          |  62 ++
 17 files changed, 615 insertions(+), 1657 deletions(-)
 delete mode 100644 arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts
 delete mode 100644 arch/arm/configs/ape6evm_defconfig
 delete mode 100644 arch/arm/mach-shmobile/board-ape6evm-reference.c
 delete mode 100644 arch/arm/mach-shmobile/board-ape6evm.c
 delete mode 100644 arch/arm/mach-shmobile/clock-r8a73a4.c
 delete mode 100644 arch/arm/mach-shmobile/r8a73a4.h
 create mode 100644 include/dt-bindings/clock/r8a73a4-clock.h

* tag 'renesas-r8a73a4-ccf-and-multiplatform-for-v4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: r8a73a4: Remove legacy code
  ARM: shmobile: r8a73a4 dtsi: Add PM domain support
  PM / Domains: R-Mobile SYSC: Document R-Mobile APE6 (r8a73a4) binding
  ARM: shmobile: ape6evm dts: Drop console= bootargs parameter
  ARM: shmobile: r8a73a4: ape6evm: Remove legacy platform
  ARM: shmobile: ape6evm-reference: Remove board C code and DT file
  ARM: shmobile: r8a73a4: Move pfc node to work around probe ordering bug
  ARM: shmobile: ape6evm dts: Move Ethernet node to BSC
  ARM: shmobile: r8a73a4 dtsi: Add Bus State Controller node
  ARM: shmobile: r8a73a4: Add MSTP clock assignments to DT
  ARM: shmobile: ape6evm: Disable legacy clock initialization
  ARM: shmobile: r8a73a4: Common clock framework DT description
  ARM: shmobile: r8a73a4: Add CPG register bits header

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-04-01 16:29:31 -07:00
Tomasz Figa
045ecad0fd clk: samsung: exynos3250: Add driver for CMU_ISP clock domain
Add clock controller for CMU ISP clock domain on Exynos3250,
providing clocks for FIMC-IS subsystem.

[b.michalska: use samsung_cmu_register_one to register
 the provider; updated DT binding documentation]

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Beata Michalska <b.michalska@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
[s.nawrocki: added __init attribute which was missing in function
 exynos3250_cmu_platform_init() in function, which has been]
Reported-by: kbuild test robot <fengguang.wu@intel.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
2015-03-30 15:18:53 -07:00
Andrew Bresticker
1006e3c931 CLK: Add binding document for Pistachio clock controllers
Add a device-tree binding document describing the four clock
controllers present on the IMG Pistachio SoC.

Signed-off-by: Damien Horsley <Damien.Horsley@imgtec.com>
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Mike Turquette <mturquette@linaro.org>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: devicetree@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: Andrew Bresticker <abrestic@chromium.org>
Cc: Ezequiel Garcia <ezequiel.garcia@imgtec.com>
Cc: James Hartley <james.hartley@imgtec.com>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: Damien Horsley <Damien.Horsley@imgtec.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Patchwork: https://patchwork.linux-mips.org/patch/9319/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-03-27 18:51:31 +01:00
Georgi Djakov
a5408ec605 dt-bindings: Add #defines for MSM8916 clocks and resets
Add clocks/resets defines for the global clock controller
found on Qualcomm MSM8916 SoCs.

Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-03-23 16:09:20 -07:00
Michael Turquette
65bd20046f Merge tag 'v3.20-exynos5433-clk' of git://linuxtv.org/snawrocki/samsung into clk-next
Clock controller driver for Exynos 5433 SoC.
2015-03-12 12:18:57 -07:00
Liu Ying
e654df7a1a ARM: imx6q: clk: Add support for mipi_ipg clock as a shared clock gate
The CG8 field of the CCM CCGR3 register is the 'mipi_core_cfg' gate clock,
according to the i.MX6q/sdl reference manuals.  This clock is actually the
gate for several clocks, including the ipg clock's output.  The MIPI DSI host
controller embedded in the i.MX6q/sdl SoCs takes the ipg clock as the pclk -
the APB clock signal .  In order to gate/ungate the ipg clock, this patch adds
a new shared clock gate named as "mipi_ipg".

Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2015-03-02 20:52:16 +08:00