Add support for the main clock unit found in the A80. Some clocks were
not documented in the released user manual, but were found in the
official kernel from Allwinner. These include controls for the I2S,
SPDIF, SATA, and eDP blocks.
Note that on the A80, some subsystems have separate clock controllers
downstream of the main clock unit. These include the MMC, USB, and
display engine subsystems.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Enhancements:
* Add power-domains to mmcif on r7s72100 SoC
* Add OSTM to rskrza1/r7s72100
* Link ARM GIC to clock and clock domain on r8a774[35] SoCs
Clean-up:
* Correct SATA device status on r8a7779/marzen
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Merge tag 'renesas-dt2-for-v4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Second Round of Renesas ARM Based SoC DT Updates for v4.11
Enhancements:
- Add power-domains to mmcif on r7s72100 SoC
- Add OSTM to rskrza1/r7s72100
- Link ARM GIC to clock and clock domain on r8a774[35] SoCs
Clean-up:
- Correct SATA device status on r8a7779/marzen
* tag 'renesas-dt2-for-v4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: dts: r7s72100: add power-domains to mmcif
ARM: dts: rskrza1: add ostm DT support
ARM: dts: r7s72100: add ostm to device tree
ARM: dts: r7s72100: add ostm clock to device tree
ARM: dts: r8a7745: Link ARM GIC to clock and clock domain
ARM: dts: r8a7743: Link ARM GIC to clock and clock domain
ARM: dts: r8a7779, marzen: Fix sata device status
Signed-off-by: Olof Johansson <olof@lixom.net>
AHB clock branch is needed in order to enable SDHCI
on msm899(2/4).
Signed-off-by: Jeremy McNicoll <jeremymc@redhat.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Add missing identifiers for phyclk_mipidphy0_bitclkdiv8_phy and
phyclk_mipidphy0_rxclkesc0_phy clocks. Access to those clocks is needed
to setup initial clock configuration for display subsystem in device tree
in order to avoid dependency on the configuration left by the bootloader.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
* clk-ux500:
clk: ux500: Convert ABx500 clocks to use OF probing
clk: ux500: Add device tree bindings for ABx500 clocks
clk: ux500: move AB8500 sysclk over to PRCMU clk driver
These clocks have been broken for a long time unfortunately, a
hurdle of misc problems made them stop working at some point
breaking USB and audio on Ux500.
The platform as such and all "regular" clocks are migrated to
OF/device tree, so let's migrate also this driver.
With this patch and the corresponding DTS fixes, and a bunch
of probe deferral fixes, audio starts working again on Ux500.
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
The HHI_SAR_CLK_CNTL contains three SAR ADC specific clocks:
- a mux clock to choose between different ADC reference clocks (this is
2-bit wide, but the datasheet only lists the parents for the first
bit)
- a divider for the input/reference clock
- a gate which enables the ADC clock
Additionally this exposes the ADC core clock (CLKID_SAR_ADC) and
CLKID_SANA (which seems to enable the analog inputs, but unfortunately
there is no documentation for this - we just mimic what the vendor
driver does).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Tested-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The Allwinner A10s, A13, R8 and NextThing GR8 are all based on the same
silicon, and all share the same clocks.
However, they're not packaged in the same way, and therefore not all the
controllers are actually available on all these SoCs.
Introduce a clock controller driver for all these SoCs with different
compatibles to take that into account.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This patch introduces the stm32f7 clock DT bindings.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Add the OCOTP so that this hardware block can be used.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
The DSI pixel clocks are muxed from clocks generated in the analog phy
by the DSI driver. In order to set them as parents, we need to do the
same name lookup dance on them as we do for our root oscillator.
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
controlled through the General Register Files, support for the rk3328
clock-controller (including a new pll-type) and the usual clock ids and
some fixes.
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Merge tag 'v4.11-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next
Pull Rockchip clk updates from Heiko Stuebner:
A new clock-type for the 1-2 muxes per soc that are for whatever reason
controlled through the General Register Files, support for the rk3328
clock-controller (including a new pll-type) and the usual clock ids and
some fixes.
* tag 'v4.11-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
dt-bindings: clk: add rockchip,grf property for RK3399
clk: rockchip: use clock ids for memory controller parts on rk3066/rk3188
clk: rockchip: use rk3288 isp_in clock ids
clk: rockchip: add clock ids for memory controller parts on rk3066/rk3188
clk: rockchip: add rk3288 isp_in clock ids
clk: rockchip: Remove useless init of "grf" to -EPROBE_DEFER
clk: rockchip: add clock controller for rk3328
dt-bindings: add bindings for rk3328 clock controller
clk: rockchip: add dt-binding header for rk3328
clk: rockchip: add new pll-type for rk3328
clk: rockchip: describe aclk_vcodec using the new muxgrf type on rk3288
clk: rockchip: add a clock-type for muxes based in the grf
- addition of the CPU clock configuration data for Exynos4412
Prime SoC variant,
- removal of driver for deprecated Exynos4415 SoC,
- switching from the syscore to regular system sleep PM ops
in the audio subsystem clocks controller driver,
- updates of the definitions of some "Network On Chip" related
clocks.
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Merge tag 'clk-v4.11-samsung' of git://linuxtv.org/snawrocki/samsung into clk-next
Pull Samsung clk updates from Sylwester Nawrocki:
- addition of the CPU clock configuration data for Exynos4412
Prime SoC variant,
- removal of driver for deprecated Exynos4415 SoC,
- switching from the syscore to regular system sleep PM ops
in the audio subsystem clocks controller driver,
- updates of the definitions of some "Network On Chip" related
clocks.
* tag 'clk-v4.11-samsung' of git://linuxtv.org/snawrocki/samsung:
clk: samsung: Remove Exynos4415 driver (SoC not supported anymore)
clk: samsung: exynos-audss: Replace syscore PM with platform device PM
clk: samsung: exynos5433: Set NoC (Network On Chip) clocks as critical
clk: samsung: Add CPU clk configuration data for Exynos4412 Prime
V3s has a similar but cut-down CCU to H3. Some muxes, especially clocks
about CSI, are different, which makes it to need a new CCU driver.
Add such a new driver for it.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Export HDMI clock from internal to dt-bindings.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Support for Exynos4415 is going away because there are no internal nor
external users.
Since commit 46dcf0ff0d ("ARM: dts: exynos: Remove exynos4415.dtsi"),
the platform cannot be instantiated so remove also the drivers.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Kukjin Kim <kgene@kernel.org>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Creation of dt include file for specific stm32f4 clocks.
These specific clocks are not derived from system clock (SYSCLOCK)
We should use index 1 to use these clocks in DT.
e.g. <&rcc 1 CLK_LSI>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Acked-by: Rob Herring <robh@kernel.org>
Add definition of EBI2 clock used by MDM9615 NAND controller.
Cc: Andy Gross <andy.gross@linaro.org>
Cc: David Brown <david.brown@linaro.org>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: linux-arm-msm@vger.kernel.org
Cc: linux-soc@vger.kernel.org
Cc: linux-clk@vger.kernel.org
Cc: devicetree@vger.kernel.org
Signed-off-by: Zoran Markovic <zmarkovic@sierrawireless.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
[sboyd@codeaurora.org: ebi2_clk halt bit is 24 not 23]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Add clock drivers for hi3660 SoC, this driver controls the SoC
registers to supply different clocks to different IPs in the SoC.
Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
[sboyd@codeaurora.org: Simplify probe with function pointer]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Add support to use reset control framework for resetting MSS
with hexagon v56 1.5.0.
Signed-off-by: Avaneesh Kumar Dwivedi <akdwived@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Add the dt-bindings header for the rk3328, that gets shared between
the clock controller and the clock references in the dts.
Add softreset ID for rk3328.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Creation of dt include file for specific stm32f4 clocks.
These specific clocks are not derived from system clock (SYSCLOCK)
We should use index 1 to use these clocks in DT.
e.g. <&rcc 1 CLK_LSI>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
This adds all RPM based clocks for msm8974, except cxo and
gfx3d_clk_src.
Tested-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
The current ipq4019 clock driver does not have the node for
PCNOC so this patch adds and registers the PCNOC clock nodes.
This PCNOC clock is critical and should not be turned off so
setting CRITICAL flag also.
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
The current ipq4019 clock driver does not have support for all
the frequency supported by APSS CPU. APSS CPU frequency is
provided with APSS CPU PLL divider which divides down the VCO
frequency. This divider is nonlinear and specific to IPQ4019
so the standard divider code cannot be used for this.
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
The current ipq4019 clock driver registered the PLL clocks and
dividers as fixed clock. These fixed clock needs to be removed
from driver probe function and same need to be registered with
clock framework. These PLL clocks should be programmed only
once and the same are being programmed already by the boot
loader so the set rate operation is not required for these
clocks. Only the rate can be calculated by clock operations
in clock driver file so this patch adds the same.
The PLL takes the reference clock from XO and generates the
intermediate VCO frequency. This VCO frequency will be divided
down by different PLL internal dividers. Some of the PLL
internal dividers are fixed while other are programmable.
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Driver updates for ARM SoCs, including a couple of newly added drivers:
- A new driver for the power management controller on TI Keystone
- Support for the prerelease "SCPI" firmware protocol that ended up
being shipped by Amlogic in their GXBB SoC.
- A soc_device can now be matched using a glob from inside the
kernel, when another driver wants to know the specific chip
it is running on and cannot find out from DT, firmware or hardware.
- Renesas SoCs now support identification through the soc_device
interface, both in user space and kernel.
- Renesas r8a7743 and r8a7745 gain support for their system controller
- A new checking module for the ARM "PSCI" (not to be confused
with "SCPI" mentioned above) firmware interface.
- A new driver for the Tegra GMI memory interface
- Support for the Tegra firmware interfaces with their
power management controllers
As usual, the updates for the reset controller framework are merged
here, as they tend to touch multiple SoCs as well, including a new
driver for the Oxford (now Broadcom) OX820 chip and the Tegra
bpmp interface.
The existing drivers for Atmel, Qualcomm, NVIDIA, TI Davinci, and
Rockchips SoCs see some further updates.
Conflicts:
- ARCH_RENESAS now selects SOC_BUS, but no longer needs GPIOLIB
- drivers/soc/renesas/Makefile: multiple files got added, keep
all in logical sorting
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Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Arnd Bergmann:
"Driver updates for ARM SoCs, including a couple of newly added
drivers:
- A new driver for the power management controller on TI Keystone
- Support for the prerelease "SCPI" firmware protocol that ended up
being shipped by Amlogic in their GXBB SoC.
- A soc_device can now be matched using a glob from inside the
kernel, when another driver wants to know the specific chip it is
running on and cannot find out from DT, firmware or hardware.
- Renesas SoCs now support identification through the soc_device
interface, both in user space and kernel.
- Renesas r8a7743 and r8a7745 gain support for their system
controller
- A new checking module for the ARM "PSCI" (not to be confused with
"SCPI" mentioned above) firmware interface.
- A new driver for the Tegra GMI memory interface
- Support for the Tegra firmware interfaces with their power
management controllers
As usual, the updates for the reset controller framework are merged
here, as they tend to touch multiple SoCs as well, including a new
driver for the Oxford (now Broadcom) OX820 chip and the Tegra bpmp
interface.
The existing drivers for Atmel, Qualcomm, NVIDIA, TI Davinci, and
Rockchips SoCs see some further updates"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (76 commits)
misc: sram: remove useless #ifdef
drivers: psci: Allow PSCI node to be disabled
drivers: psci: PSCI checker module
soc: renesas: Identify SoC and register with the SoC bus
firmware: qcom: scm: Return PTR_ERR when devm_clk_get fails
firmware: qcom: scm: Remove core, iface and bus clocks dependency
dt-bindings: firmware: scm: Add MSM8996 DT bindings
memory: da8xx-ddrctl: drop the call to of_flat_dt_get_machine_name()
bus: da8xx-mstpri: drop the call to of_flat_dt_get_machine_name()
ARM: shmobile: Document DT bindings for Product Register
soc: renesas: rcar-sysc: add R8A7745 support
reset: Add Tegra BPMP reset driver
dt-bindings: firmware: Allow child nodes inside the Tegra BPMP
dt-bindings: Add power domains to Tegra BPMP firmware
firmware: tegra: Add BPMP support
firmware: tegra: Add IVC library
dt-bindings: firmware: Add bindings for Tegra BPMP
mailbox: tegra-hsp: Use after free in tegra_hsp_remove_doorbells()
mailbox: Add Tegra HSP driver
firmware: arm_scpi: add support for pre-v1.0 SCPI compatible
...
Lots of changes as usual, so I'm trying to be brief here. Most of the
new hardware support has the respective driver changes merged through
other trees or has had it available for a while, so this is where things
come together.
We get a DT descriptions for a couple of new SoCs, all of them variants
of other chips we already support, and usually coming with a new
evaluation board:
- Oxford semiconductor (now Broadcom) OX820 SoC for NAS devices
- Qualcomm MDM9615 LTE baseband
- NXP imx6ull, the latest and smallest i.MX6 application processor variant
- Renesas RZ/G (r8a7743 and r8a7745) application processors
- Rockchip PX3, a variant of the rk3188 chip used in Android tablets
- Rockchip rk1108 single-core application processor
- ST stm32f746 Cortex-M7 based microcontroller
- TI DRA71x automotive processors
These are commercially available consumer platforms we now support:
- Motorola Droid 4 (xt894) mobile phone
- Rikomagic MK808 Android TV stick based on Rockchips rx3066
- Cloud Engines PogoPlug v3 based on OX820
- Various Broadcom based wireless devices:
- Netgear R8500 router
- Tenda AC9 router
- TP-LINK Archer C9 V1
- Luxul XAP-1510 Access point
- Turris Omnia open hardware router based on Armada 385
And a couple of new boards targeted at developers, makers
or industrial integration:
- Macnica Sodia development platform for Altera socfpga (Cyclone V)
- MicroZed board based on Xilinx Zynq FPGA platforms
- TOPEET itop/elite based on exynos4412
- WP8548 MangOH Open Hardware platform for IOT, based on
Qualcomm MDM9615
- NextThing CHIP Pro gadget
- NanoPi M1 development board
- AM571x-IDK industrial board based on TI AM5718
- i.MX6SX UDOO Neo
- Boundary Devices Nitrogen6_SOM2 (i.MX6)
- Engicam i.CoreM6
- Grinn i.MX6UL liteSOM/liteBoard
- Toradex Colibri iMX6 module
Other changes:
- added peripherals on renesas, davinci, stm32f429, uniphier, sti,
mediatek, integrator, at91, imx, vybrid, ls1021a, omap, qualcomm,
mvebu, allwinner, broadcom, exynos, zynq
- Continued fixes for W=1 dtc warnings
- The old STiH415/416 SoC support gets removed, these never made it into
products and have served their purpose in the kernel as a template
for teh newer chips from ST
- The exynos4415 dtsi file is removed as nothing uses it.
- Intel PXA25x can now be booted using devicetree
Conflicts:
arch/arm/boot/dts/r8a*.dtsi: a node was added
the clk tree, keep both sides and watch out for git
dropping the required '};' at the end of each side.
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM DT updates from Arnd Bergmann:
"Lots of changes as usual, so I'm trying to be brief here. Most of the
new hardware support has the respective driver changes merged through
other trees or has had it available for a while, so this is where
things come together.
We get a DT descriptions for a couple of new SoCs, all of them
variants of other chips we already support, and usually coming with a
new evaluation board:
- Oxford semiconductor (now Broadcom) OX820 SoC for NAS devices
- Qualcomm MDM9615 LTE baseband
- NXP imx6ull, the latest and smallest i.MX6 application processor variant
- Renesas RZ/G (r8a7743 and r8a7745) application processors
- Rockchip PX3, a variant of the rk3188 chip used in Android tablets
- Rockchip rk1108 single-core application processor
- ST stm32f746 Cortex-M7 based microcontroller
- TI DRA71x automotive processors
These are commercially available consumer platforms we now support:
- Motorola Droid 4 (xt894) mobile phone
- Rikomagic MK808 Android TV stick based on Rockchips rx3066
- Cloud Engines PogoPlug v3 based on OX820
- Various Broadcom based wireless devices:
- Netgear R8500 router
- Tenda AC9 router
- TP-LINK Archer C9 V1
- Luxul XAP-1510 Access point
- Turris Omnia open hardware router based on Armada 385
And a couple of new boards targeted at developers, makers or
industrial integration:
- Macnica Sodia development platform for Altera socfpga (Cyclone V)
- MicroZed board based on Xilinx Zynq FPGA platforms
- TOPEET itop/elite based on exynos4412
- WP8548 MangOH Open Hardware platform for IOT, based on Qualcomm MDM9615
- NextThing CHIP Pro gadget
- NanoPi M1 development board
- AM571x-IDK industrial board based on TI AM5718
- i.MX6SX UDOO Neo
- Boundary Devices Nitrogen6_SOM2 (i.MX6)
- Engicam i.CoreM6
- Grinn i.MX6UL liteSOM/liteBoard
- Toradex Colibri iMX6 module
Other changes:
- added peripherals on renesas, davinci, stm32f429, uniphier, sti,
mediatek, integrator, at91, imx, vybrid, ls1021a, omap, qualcomm,
mvebu, allwinner, broadcom, exynos, zynq
- Continued fixes for W=1 dtc warnings
- The old STiH415/416 SoC support gets removed, these never made it
into products and have served their purpose in the kernel as a
template for teh newer chips from ST
- The exynos4415 dtsi file is removed as nothing uses it.
- Intel PXA25x can now be booted using devicetree"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (422 commits)
arm: dts: zynq: Add MicroZed board support
ARM: dts: da850: enable high speed for mmc
ARM: dts: da850: Add node for pullup/pulldown pinconf
ARM: dts: da850: enable memctrl and mstpri nodes per board
ARM: dts: da850-lcdk: Add ethernet0 alias to DT
ARM: dts: artpec: add pcie support
ARM: dts: add support for Turris Omnia
devicetree: Add vendor prefix for CZ.NIC
ARM: dts: berlin2q-marvell-dmp: fix typo in chosen node
ARM: dts: berlin2q-marvell-dmp: fix regulators' name
ARM: dts: Add xo to sdhc clock node on qcom platforms
ARM: dts: r8a7794: Add device node for PRR
ARM: dts: r8a7793: Add device node for PRR
ARM: dts: r8a7792: Add device node for PRR
ARM: dts: r8a7791: Add device node for PRR
ARM: dts: r8a7790: Add device node for PRR
ARM: dts: r8a7779: Add device node for PRR
ARM: dts: r8a73a4: Add device node for PRR
ARM: dts: sk-rzg1e: add Ether support
ARM: dts: sk-rzg1e: initial device tree
...
Pull rockchip clk driver updates from Heiko Stuebner:
A new clock controller for the rk1108 soc (single-core Cortex-A7+DSP),
a fix making sure the cpuclk rate is actually valid, before trying to
set it and a copy-paste fix for the rk3399's testclk.
* tag 'v4.10-rockchip-clk2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
clk: rockchip: add clock controller for rk1108
dt-bindings: add documentation for rk1108 cru
clk: rockchip: add dt-binding header for rk1108
clk: rockchip: fix copy-paste error in rk3399 testclk
clk: rockchip: validity should be checked prior to cpu clock rate change
as well as enabling the dma for uart and mmc controllers.
And one new soc, the rk1108 combining a single-core Cortex-A7
with a separate DSP core.
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Merge tag 'v4.10-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
Pull "Rockchip dts32 changes for 4.10" from Heiko Stübner:
A bit of attention for the rk3066, fixed tsadc reset node
as well as enabling the dma for uart and mmc controllers.
And one new soc, the rk1108 combining a single-core Cortex-A7
with a separate DSP core.
* tag 'v4.10-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: add the sdmmc pinctrl for rk1108
ARM: dts: rockchip: add rockchip RK1108 Evaluation board
ARM: dts: rockchip: add basic support for RK1108 SOC
clk: rockchip: add dt-binding header for rk1108
dt-bindings: rockchip-dw-mshc: add RK1108 dw-mshc description
ARM: dts: rockchip: enable dma for uart and mmc on rk3066a
ARM: dts: rockchip: fix TSADC reset node for rk3066a
The Boot and Power Management Processor (BPMP) is a co-processor found
in Tegra SoCs. It is designed to handle the early stages of the boot
process as well as to offload power management tasks (such as clocks,
resets, powergates, ...).
The binding document defines the resources that are used by the BPMP
firmware, which implements the interprocessor communication (IPC)
between the CPU and the BPMP.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
inclusion, missing unit names for memory nodes, various frequency
optimizations allowing for better performance on rk3066, the usage of
pin constants to bridge between the two numbering schemes used (gpio
controllers using 0-31 and pins being labeled A0-A7,..., D0-D7)
and UHS/HS modes for the mmc controllers on the popmetal board.
Two new boards, the PX3-based evaluation board, with the PX3 being an
industrial variant of the rk3188 soc and the Rikomagic MK808 board
based around the rk3066 are also added.
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Merge tag 'v4.10-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
32bit devicetree changes for Rockchip including removal of skeleton.dtsi
inclusion, missing unit names for memory nodes, various frequency
optimizations allowing for better performance on rk3066, the usage of
pin constants to bridge between the two numbering schemes used (gpio
controllers using 0-31 and pins being labeled A0-A7,..., D0-D7)
and UHS/HS modes for the mmc controllers on the popmetal board.
Two new boards, the PX3-based evaluation board, with the PX3 being an
industrial variant of the rk3188 soc and the Rikomagic MK808 board
based around the rk3066 are also added.
* tag 'v4.10-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (21 commits)
ARM: dts: rockchip: replace to "max-frequency" instead of "clock-freq-min-max"
ARM: dts: rockchip: Set sdmmc frequency at boot time for rk3066a
ARM: dts: rockchip: use pin constants to describe gpios on Popmetal-RK3288
include: dt-bindings: Add GPIO pin index definition for rockchip pinctrl
ARM: dts: rockchip: Add rk3066 MK808 board
devicetree: Add vendor prefix for Rikomagic
ARM: dts: rockchip: initialize rk3066 PLL clock rate
clk: rockchip: Add binding ids for cpu and peri clocks on rk3066
ARM: dts: rockchip: enable HS200/DDR52 mode for emmc on rk3288-popmetal
ARM: dts: rockchip: Support UHS mode for SD card on PopMetal-RK3288 board
ARM: dts: rockchip: remove always-on and boot-on from vcc_sd for px3-evb
ARM: dts: rockchip: update compatible strings for Rockchip efuse
ARM: dts: rockchip: add rockchip PX3 Evaluation board
ARM: dts: rockchip: Add missing unit name to memory nodes in rk3xxx boards
ARM: dts: rockchip: Add missing unit name to memory nodes in rk3288 boards
ARM: dts: rockchip: Add missing unit name to memory nodes in rk322x boards
ARM: dts: rockchip: Add missing unit name to memory nodes in rk3036 boards
ARM: dts: rockchip: Remove skeleton.dtsi inclusion in rk3xxx.dtsi
ARM: dts: rockchip: Remove skeleton.dtsi inclusion in rk3288.dtsi
ARM: dts: rockchip: Remove skeleton.dtsi inclusion in rk322x.dtsi
...
Signed-off-by: Olof Johansson <olof@lixom.net>
The usual patches from us, but most notably the introduction of the A64
clocks unit.
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Merge tag 'sunxi-clk-for-4.10' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into clk-next
Pull Allwinner clock changes from Maxime Ripard:
The usual patches from us, but most notably the introduction of the A64
clocks unit.
* tag 'sunxi-clk-for-4.10' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
clk: sunxi-ng: sun8i-h3: Set CLK_SET_RATE_PARENT for audio module clocks
clk: sunxi-ng: sun8i-a23: Set CLK_SET_RATE_PARENT for audio module clocks
clk: sunxi-ng: Add A64 clocks
clk: sunxi-ng: Implement minimum for multipliers
clk: sunxi-ng: Add minimums for all the relevant structures and clocks
clk: sunxi-ng: Finish to convert to structures for arguments
clk: sunxi-ng: Remove the use of rational computations
clk: sunxi-ng: Rename the internal structures
clk: sunxi: mod0: improve function-level documentation
- A patch series to fix the long standing issue with glitchy parent
mux of ldb_di_clk, which can hang up LVDS display when ipu_di_clk
is sourced from ldb_di_clk.
- A patch to add imx6ull clock support on top of imx6ul clock driver.
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Merge tag 'imx-clk-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into clk-next
Pull i.MX clock updates from Shawn Guo:
- A patch series to fix the long standing issue with glitchy parent
mux of ldb_di_clk, which can hang up LVDS display when ipu_di_clk
is sourced from ldb_di_clk.
- A patch to add imx6ull clock support on top of imx6ul clock driver.
* tag 'imx-clk-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
clk: imx: clk-imx6ul: add clk support for imx6ull
clk: imx6: Fix procedure to switch the parent of LDB_DI_CLK
clk: imx6: Make the LDB_DI0 and LDB_DI1 clocks read-only
clk: imx6: Mask mmdc_ch1 handshake for periph2_sel and mmdc_ch1_axi_podf
Add the dt-bindings header for the rk1108, that gets shared
between the clock controller and the clock references in the dts.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(rk3036, rk3399) does now take into account the mode that the PLL is
actually running at.
As always also some additional and optimized PLL rates for rk3066 and
rk3399, some additional clock ids for rk3066 and some additional clocks
on rk3399 are now sucessfully handled inside their respective driver.
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Merge tag 'v4.10-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next
Pull Rockchip clk driver updates from Heiko Stuebner:
PLL initialization for PLLs having both an integral and fractional mode
(rk3036, rk3399) does now take into account the mode that the PLL is
actually running at.
As always also some additional and optimized PLL rates for rk3066 and
rk3399, some additional clock ids for rk3066 and some additional clocks
on rk3399 are now sucessfully handled inside their respective driver.
* tag 'v4.10-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
clk: rockchip: Ignore frac divisor for PLL equivalence when it's unused
clk: rockchip: remove more CLK_IGNORE_UNUSED for rk3399 clocktree
clk: rockchip: add 400MHz to rk3066 clock rates table
clk: rockchip: optimize 800MHz and 1GHz pll rates on RK3399
clk: rockchip: Use clock ids for cpu and peri clocks on rk3066
clk: rockchip: Add binding ids for cpu and peri clocks on rk3066
clk: rockchip: add 533.25MHz to rk3399 clock rates table
imx6ull is the derived SoC from imx6ul
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add CRG driver for Hi3516CV300 SoC. CRG(Clock and Reset
Generator) module generates clock and reset signals used
by other module blocks on SoC.
Signed-off-by: Pan Wen <wenpan@hisilicon.com>
Signed-off-by: Jiancheng Xue <xuejiancheng@hisilicon.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Add CRG driver for Hi3798CV200 SoC. CRG(Clock and Reset
Generator) module generates clock and reset signals used
by other module blocks on SoC.
Signed-off-by: Jiancheng Xue <xuejiancheng@hisilicon.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
This adds initial support for clocks controlled by the Resource
Power Manager (RPM) processor on some Qualcomm SoCs, which use
the qcom_rpm driver to communicate with RPM.
Such platforms are apq8064 and msm8960.
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
This adds initial support for clocks controlled by the Resource
Power Manager (RPM) processor on some Qualcomm SoCs, which use
the qcom_smd_rpm driver to communicate with RPM.
Such platforms are msm8916, apq8084 and msm8974.
The RPM is a dedicated hardware engine for managing the shared
SoC resources in order to keep the lowest power profile. It
communicates with other hardware subsystems via shared memory
and accepts clock requests, aggregates the requests and turns
the clocks on/off or scales them on demand.
This driver is based on the codeaurora.org driver:
https://www.codeaurora.org/cgit/quic/la/kernel/msm-3.10/tree/drivers/clk/qcom/clock-rpm.c
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
[sboyd@codeaurora.org: Remove useless braces for single line if]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Jeremy McNicoll <jeremymc@redhat.com>
[sboyd@codeaurora.org: Dropped unused and incorrect GDSC defines]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Since v4.8, STiH415/416 clock support has
been removed [1], these platform doesn't boot.
We can remove DTS files related to these socs.
[1] https://patchwork.kernel.org/patch/9157571/
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Add macros usable by the device tree sources to reference the R8A7745
CPG clocks by index. The data comes from Table 7.2c in revision 1.00 of
the RZ/G Series User's Manual.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Add macros usable by the device tree sources to reference the R8A7743 CPG
clocks by index. The data comes from Table 7.2b in revision 1.00 of the
RZ/G Series User's Manual.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Add the A64 CCU clocks set.
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
In order to support the Oxford Semiconductor Gate clocks, add a
dedicated dt-binding include file for gate indexes.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/20161005150752.22618-3-narmstrong@baylibre.com
In order to prepare support for the Oxford Semiconductor OX820, add
a dt-bindings include file used by the ox810se dtsi.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/20161005150752.22618-2-narmstrong@baylibre.com
Add bindings for ACLK_CPU, HCLK_CPU, PCLK_CPU, ACLK_PERI, HCLK_PERI, PCLK_PERI.
We need this to init it's rate at boot time.
Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
These updates have been kept in a separate branch mostly because
they rely on updates to the respective clk drivers to keep the
shared header files in sync.
- The Renesas r8a7796 (R-Car M3-W) platform gets added, this is an
automotive SoC similar to the ⅹ8a7795 chip we already support, but
the dts changes rely on a clock driver change that has been
merged for v4.9 through the clk tree.
- The Amlogic meson-gxbb (S905) platform gains support for a few
drivers merged through our tree, in particular the network and
usb driver changes are required and included here, and also
the clk tree changes.
- The Allwinner platforms have seen a large-scale change to their
clk drivers and the dts file updates must come after that.
This includes the newly added Nextthing GR8 platform, which is
derived from sun5i/A13.
- Some integrator (arm32) changes rely on clk driver changes.
- A single patch for lpc32xx has no such dependency but wasn't
added until just before the merge window
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Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC late DT updates from Arnd Bergmann:
"These updates have been kept in a separate branch mostly because they
rely on updates to the respective clk drivers to keep the shared
header files in sync.
- The Renesas r8a7796 (R-Car M3-W) platform gets added, this is an
automotive SoC similar to the ⅹ8a7795 chip we already support, but
the dts changes rely on a clock driver change that has been merged
for v4.9 through the clk tree.
- The Amlogic meson-gxbb (S905) platform gains support for a few
drivers merged through our tree, in particular the network and usb
driver changes are required and included here, and also the clk
tree changes.
- The Allwinner platforms have seen a large-scale change to their clk
drivers and the dts file updates must come after that. This
includes the newly added Nextthing GR8 platform, which is derived
from sun5i/A13.
- Some integrator (arm32) changes rely on clk driver changes.
- A single patch for lpc32xx has no such dependency but wasn't added
until just before the merge window"
* tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (99 commits)
ARM: dts: lpc32xx: add device node for IRAM on-chip memory
ARM: dts: sun8i: Add accelerometer to polaroid-mid2407pxe03
ARM: dts: sun8i: enable UART1 for iNet D978 Rev2 board
ARM: dts: sun8i: add pinmux for UART1 at PG
dts: sun8i-h3: add I2C0-2 peripherals to H3 SOC
dts: sun8i-h3: add pinmux definitions for I2C0-2
dts: sun8i-h3: associate exposed UARTs on Orange Pi Boards
dts: sun8i-h3: split off RTS/CTS for UART1 in seperate pinmux
dts: sun8i-h3: add pinmux definitions for UART2-3
ARM: dts: sun9i: a80-optimus: Disable EHCI1
ARM: dts: sun9i: cubieboard4: Add AXP806 PMIC device node and regulators
ARM: dts: sun9i: a80-optimus: Add AXP806 PMIC device node and regulators
ARM: dts: sun9i: cubieboard4: Declare AXP809 SW regulator as unused
ARM: dts: sun9i: a80-optimus: Declare AXP809 SW regulator as unused
ARM: dts: sun8i: Add touchscreen node for sun8i-a33-ga10h
ARM: dts: sun8i: Add touchscreen node for sun8i-a23-polaroid-mid2809pxe04
ARM: dts: sun8i: Add touchscreen node for sun8i-a23-polaroid-mid2407pxe03
ARM: dts: sun8i: Add touchscreen node for sun8i-a23-inet86dz
ARM: dts: sun8i: Add touchscreen node for sun8i-a23-gt90h
ARM64: dts: meson-gxbb-vega-s95: Enable USB Nodes
...
These are as usual a very large number of mostly boring updates to
enable devices in existing machines, or to fix minor bugs. Notably,
an ongoing treewide effort to fix warnings caused by an update to the
device tree compiler. These are enabled with "make W=1" at the moment
but can hopefully become the default once all issues have been addressed.
No new SoC platform is added this time around (Armada 395 and Orion
mv88f5181 are slight variations of existing ones), but a significant
number of new dts files are added, which I list by platform:
- Allwinner: Empire Electronix M712 and iNet d978 Rev2 tablets;
Orange Pi PC Plus, Orange Pi 2, Orange Pi Plus 2E,
Orange Pi Lite, Olimex A33-Olinuxino, and Nano Pi Neo
single-board computers
- ARM Realview: all supported machines (ported from board files)
- Broadcom: BCM958525er, BCM958522er, BCM988312hr, BCM958623hr and
BCM958622hr reference boards for Northstar platform;
Raspberry Pi Zero single-board computer
- Marvell EBU: Netgear WNR854T router (ported from board file);
Armada 395 SoC platform and GP board
Armada 390 DB development board
- NXP i.MX: imx7s Warp7 reference board;
Gateworks Ventana GW553x single-board computer,
Technologic Systems TS-4900 and
Engicam IMX6UL GEA M6UL computer-on-module,
Inverse Path USB armory board
- Qualcomm: LG Nexus 5 Phone
- Renesas: r8a7792/wheat and r7s72100/rskrza1 development boards
- Rockchip: Rockchip RK3288 Fennec reference board;
Firefly RK3288 Reload platform
- ST Microelectronics STi: B2260 (96boards) single-board computer
- TI Davinci: OMAP-L138 LCDK Development kit
- TI OMAP: beagleboard-x15 rev B1 single-board computer
Conflicts: vendor-prefixes.txt has conflicting additions, keep all of
them in alphabetical order.
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM DT updates from Arnd Bergmann:
"These are as usual a very large number of mostly boring updates to
enable devices in existing machines, or to fix minor bugs. Notably, an
ongoing treewide effort to fix warnings caused by an update to the
device tree compiler. These are enabled with "make W=1" at the moment
but can hopefully become the default once all issues have been
addressed.
No new SoC platform is added this time around (Armada 395 and Orion
mv88f5181 are slight variations of existing ones), but a significant
number of new dts files are added, which I list by platform:
- Allwinner: Empire Electronix M712 and iNet d978 Rev2 tablets,
Orange Pi PC Plus, Orange Pi 2, Orange Pi Plus 2E, Orange Pi Lite,
Olimex A33-Olinuxino, and Nano Pi Neo single-board computers
- ARM Realview: all supported machines (ported from board files)
- Broadcom: BCM958525er, BCM958522er, BCM988312hr, BCM958623hr and
BCM958622hr reference boards for Northstar platform, Raspberry Pi
Zero single-board computer
- Marvell EBU: Netgear WNR854T router (ported from board file),
Armada 395 SoC platform and GP board Armada 390 DB development
board
- NXP i.MX: imx7s Warp7 reference board, Gateworks Ventana GW553x
single-board computer, Technologic Systems TS-4900 and Engicam
IMX6UL GEA M6UL computer-on-module, Inverse Path USB armory board
- Qualcomm: LG Nexus 5 Phone
- Renesas: r8a7792/wheat and r7s72100/rskrza1 development boards
- Rockchip: Rockchip RK3288 Fennec reference board, Firefly RK3288
Reload platform
- ST Microelectronics STi: B2260 (96boards) single-board computer
- TI Davinci: OMAP-L138 LCDK Development kit
- TI OMAP: beagleboard-x15 rev B1 single-board computer"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (390 commits)
ARM: dts: sony-nsz-gs7: add missing unit name to /memory node
ARM: dts: chromecast: add missing unit name to /memory node
ARM: dts: berlin2q-marvell-dmp: add missing unit name to /memory node
ARM: dts: berlin2: Add missing unit name to /soc node
ARM: dts: berlin2cd: Add missing unit name to /soc node
ARM: dts: berlin2q: Add missing unit name to /soc node
ARM: dts: berlin2: Remove skeleton.dtsi inclusion
ARM: dts: berlin2cd: Remove skeleton.dtsi inclusion
ARM: dts: berlin2q: Remove skeleton.dtsi inclusion
arm: dts: berlin2q: enable all wdt nodes unconditionally
arm: dts: berlin2: enable all wdt nodes unconditionally
ARM: dts: omap5-igep0050.dts: Use tabs for indentation
ARM: dts: Fix igepv5 power button GPIO direction
ARM: dts: am335x-evmsk: Add blue-and-red-wiring -property to lcdc node
ARM: dts: am335x-evmsk: Whitespace cleanup of lcdc related nodes
ARM: dts: am335x-evm: Add blue-and-red-wiring -property to lcdc node
ARM: dts: s3c64xx: Use macros for pinctrl configuration
ARM: dts: s3c2416: Use macros for pinctrl configuration
ARM: dts: s5pv210: Use macros for pinctrl configuration
ARM: dts: s3c64xx: Use common macros for pinctrl configuration
...
The current clock tree only implements the minimal set of differences
between the i.MX6Q and the i.MX6DL, but that doesn't really reflect
reality.
Apply the following fixes to match the RM:
- DL has no GPU3D_SHADER_SEL/PODF, the shader domain is clocked by
GPU3D_CORE
- GPU3D_SHADER_SEL/PODF has been repurposed as GPU2D_CORE_SEL/PODF
- GPU2D_CORE_SEL/PODF has been repurposed as MLB_SEL/PODF
Cc: stable@vger.kernel.org
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Acked-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
- media: update IR support for newer SoCs
- firmware: add secure monitor driver
- net: new stmmac glue driver
- usb: udd DWC2 support for meson-gxbb
- clocks: expose more clock IDs for use by DT
- DT binding updates
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Merge tag 'amlogic-drivers-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/late
Pull "Amlogic driver updates for v4.9, 2nd round" from Kevin Hilman:
- media: update IR support for newer SoCs
- firmware: add secure monitor driver
- net: new stmmac glue driver
- usb: udd DWC2 support for meson-gxbb
- clocks: expose more clock IDs for use by DT
- DT binding updates
* tag 'amlogic-drivers-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: (21 commits)
clk: gxbb: expose i2c clocks
clk: gxbb: expose USB clocks
clk: gxbb: expose spifc clock
clk: gxbb: expose MPLL2 clock for use by DT
Documentation: dt-bindings: Add documentation for the Meson USB2 PHYs
usb: dwc2: add support for Meson8b and GXBB SoCs
net: stmmac: update the module description of the dwmac-meson driver
net: stmmac: add a glue driver for the Amlogic Meson 8b / GXBB DWMAC
stmmac: introduce get_stmmac_bsp_priv() helper
net: dt-bindings: Document the new Meson8b and GXBB DWMAC bindings
clk: meson-gxbb: Export PWM related clocks for DT
meson: clk: Add support for clock gates
gxbb: clk: Adjust MESON_GATE macro to be shared with meson8b
clk: meson: Copy meson8b CLKID defines to private header file
meson: clk: Rename register names according to Amlogic datasheet
meson: clk: Move register definitions to meson8b.h
clk: meson: Rename meson8b-clkc.c to reflect gxbb naming convention
nvmem: amlogic: Add Amlogic Meson EFUSE driver
firmware: Amlogic: Add secure monitor driver
media: rc: meson-ir: Add support for newer versions of the IR decoder
...
The ZX296718 clocks are statically listed and registered. More
clock will be added later.
Signed-off-by: Jun Nie <jun.nie@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
I2C and AO_I2C clocks are needed for the i2c driver, expose to DT
(and comment out in clk driver)
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
USB0_DDR_BRIDGE and USB1_DDR_BRIDGE1 are needed for the related
dwc2 usb controller. USB, USB0 and USB1 are needed for the PHYs.
Expose these clocks to DT and comment out in clk driver.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
SPI clock is needed for the spifc driver, expose to DT
(and comment out in the clk driver)
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This exposes the MPLL2 clock as this is one of the input clocks of the
ethernet controller's internal mux.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Four more SoCs converted to the new clock framework (A31, A31s, A23 and
A33).
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Merge tag 'sunxi-clk-for-4.9' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into clk-next
Pull Allwinner clock driver changes from Maxime Ripard:
Four more SoCs converted to the new clock framework (A31, A31s, A23 and
A33).
* tag 'sunxi-clk-for-4.9' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
clk: sunxi-ng: Add hardware dependency
clk: sunxi-ng: Add A23 CCU
clk: sunxi-ng: Add A33 CCU support
clk: sunxi-ng: Add N-class clocks support
clk: sunxi-ng: mux: Add mux table macro
clk: sunxi-ng: div: Allow to set a maximum
clk: sunxi-ng: div: Add kerneldoc for the _ccu_div structure
clk: sunxi-ng: div: Add mux table macros
clk: sunxi-ng: Add A31/A31s clocks
clk: sunxi-ng: mux: Add clk notifier functions
clk: sunxi-ng: mux: support fixed pre-dividers on multiple parents
clk: sunxi-ng: mux: Add support for mux tables
clk: sunxi-ng: mux: Rename mux macro to be consistent
clk: sunxi-ng: nkm: Add mux to support multiple parents
clk: sunxi-ng: mux: Increase fixed pre-divider div size
includes:
- addition of sound subsystem related clocks for Exynos5410 SoC
(EPLL, PDMA) and support for "samsung,exynos5410-audss-clock"
compatible in the clk-exynos-audss driver,
- addition of DRAM controller related clocks for exynos5420,
- MAINTAINERS update adding Chanwoo Choi as the Samsung SoC
clock drivers co-maintainer.
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Merge tag 'clk-v4.9-samsung' of git://linuxtv.org/snawrocki/samsung into clk-next
Pull samsung clk driver updates from Sylwester Nawrocki:
In addition to a few clean up and code consolidation patches this
includes:
- addition of sound subsystem related clocks for Exynos5410 SoC
(EPLL, PDMA) and support for "samsung,exynos5410-audss-clock"
compatible in the clk-exynos-audss driver,
- addition of DRAM controller related clocks for exynos5420,
- MAINTAINERS update adding Chanwoo Choi as the Samsung SoC
clock drivers co-maintainer.
* tag 'clk-v4.9-samsung' of git://linuxtv.org/snawrocki/samsung:
clk: samsung: Add support for EPLL on exynos5410
clk: samsung: clk-exynos-audss: Whitespace and debug trace cleanup
clk: samsung: clk-exynos-audss: Add exynos5410 compatible
clk: samsung: clk-exynos-audss: controller variant handling rework
clk: samsung: Use common registration function for pll2550x
clk: samsung: exynos5410: Expose the peripheral DMA gate clocks
clk: samsung: exynos5420: Add clocks for CMU_CDREX domain
clk: samsung: exynos5410: Use samsung_cmu_register_one() to simplify code
clk: samsung: exynos5260: Move struct samsung_cmu_info to init section
MAINTAINERS: Add myself as Samsung SoC clock drivers co-maintainer
clk: samsung: exynos5410: Add clock IDs for PDMA and EPLL clocks
clk: samsung: Add clock IDs for the CMU_CDREX (DRAM Express Controller)
This commit introduces the clocks found in the Allwinner A33 CCU.
Since this SoC is very similar to the A23, and we share a significant share
of the DTSI, the clock IDs that are going to be used will also be shared
with the A23, hence the name of the various header files.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
There is no such significant differences in pll2550x PLL type
to justify a separate registration function. This patch adapts
exynos5440 driver to use the common function and removes
samsung_clk_register_pll2550x().
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
The PDMA{0,1} and EPLL clock IDs are added separately in this
patch so the patch can be merged to the arm-soc tree as dependency.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
This patch adds missing clock IDs for CMU_CDREX (DRAM Express Controller)
which generates clocks for DRAM and NoC (Network on Chip) busses.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
control. While reading that clock is done the normal way from the
registers, setting it always requires some sort of special handling
to let the system survive this addition.
As the commit message explains, there are currently 3 handling-types
known. General SRAM-based code on rk3288 and before (which is waiting
essentially for the PIE support that is currently being worked on),
SCPI-based clk setting on the rk3368 through a coprocessor, which we
might support once the support for legacy scpi-variants has matured
and now on the rk3399 (and probably later) using a dcf controller that
is controlled from the arm-trusted-firmware and gets accessed through
firmware calls from the kernel. This is the variant we currently
support, but the clock type is made to support the other variants in
the future as well.
Apart from that slightly bigger chunk, we have a mix of PLL rates,
clock-ids and flags mainly for the rk3399.
And interestingly an iomap fix for the legacy gate driver, where I
hopefully could deter the submitter from actually using that in any
new works.
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Merge tag 'v4.9-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next
Pull rockchip clk driver updates from Heiko Stuebner:
The biggest addition is probably the special clock-type for ddr clock
control. While reading that clock is done the normal way from the
registers, setting it always requires some sort of special handling
to let the system survive this addition.
As the commit message explains, there are currently 3 handling-types
known. General SRAM-based code on rk3288 and before (which is waiting
essentially for the PIE support that is currently being worked on),
SCPI-based clk setting on the rk3368 through a coprocessor, which we
might support once the support for legacy scpi-variants has matured
and now on the rk3399 (and probably later) using a dcf controller that
is controlled from the arm-trusted-firmware and gets accessed through
firmware calls from the kernel. This is the variant we currently
support, but the clock type is made to support the other variants in
the future as well.
Apart from that slightly bigger chunk, we have a mix of PLL rates,
clock-ids and flags mainly for the rk3399.
And interestingly an iomap fix for the legacy gate driver, where I
hopefully could deter the submitter from actually using that in any
new works.
* tag 'v4.9-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
clk: rockchip: use the dclk_vop_frac clock ids on rk3399
clk: rockchip: drop CLK_SET_RATE_PARENT from rk3399 fractional dividers
clk: rockchip: add 2016M to big cpu clk rate table on rk3399
clk: rockchip: add rk3399 ddr clock support
clk: rockchip: add dclk_vop_frac ids for rk3399 vop
clk: rockchip: add new clock-type for the ddrclk
soc: rockchip: add header for ddr rate SIP interface
clk: rockchip: add SCLK_DDRC id for rk3399 ddrc
clk: rockchip: handle of_iomap failures in legacy clock driver
clk: rockchip: mark rk3399 hdcp_noc and vio_noc as critical
clk: rockchip: use general clock flag when registering pll
clk: rockchip: delete the CLK_IGNORE_UNUSED from aclk_pcie on rk3399
clk: rockchip: add 65MHz and 106.5MHz rates to rk3399 plls used for HDMI
Export the dclk_vop_frac out, so we can set the dclk_vop as the
child of dclk_vop_frac, and then we can start to take use of
the fractional dividers.
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Only expose future CLKID constants if necessary. This patch
removes CLK_NR_CLKS from the DT bindings but leaves all previously
defined CLKIDs there to keep backward compatibility.
Signed-off-by: Alexander Müller <serveralex@gmail.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/1472319654-59048-5-git-send-email-serveralex@gmail.com
Add a new style driver for the clock control unit in Allwinner A31/A31s.
A few clocks are still missing:
- MIPI PLL's HDMI mode support
- EMAC clock
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add BIMC gdsc data found in MMCC part of msm8996 family of devices.
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Add documentations and dt-bindings headers for the AO clock and reset
controller.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* clk-qcom-9615:
dt-bindings: clock: Update bindings for MDM9615 GCC and LCC
clk: mdm9615: Add support for MDM9615 Clock Controllers
dt-bindings: Add MDM9615 DT bindings include files for GCC and LCC
Add the SD/eMMC gate clocks and expose them for use by DT.
While at it, also explose FCLK_DIV2 since this is one of the input
clocks to the mux internal to each of the SD/eMMC blocks.
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Maxim has used the same clock IP on multiple PMICs like MAX77686,
MAX77802, MAX77620. Only differences are the number of clocks
from these PMICs like MAX77686 has 3 clocks output, MAX776802 have
two clock output and MAX77620 has one clock output.
Add clock binding details and DT example for the MAX77620.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
CC: Krzysztof Kozlowski <k.kozlowski@samsung.com>
CC: Javier Martinez Canillas <javier@dowhile0.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Add MSTP10 clocks to the R8A7794 device tree.
This patch is based on the commit ee9141522d ("ARM: shmobile: r8a7791:
add MSTP10 support on DTSI").
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add some MSTP5 clocks to the R8A7794 device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Device tree contents continue to be the largest branches we submit. This
time around, some of the contents worth pointing out is:
- New SoC platforms:
- Freescale i.MX 7Solo
- Broadcom BCM23550
- Cirrus Logic EP7209 and EP7211 (clps711x platforms)_
- Hisilicon HI3519
- Renesas R8A7792
Some of the other delta that is sticking out, line-count wise:
- Exynos moves of IP blocks under an SoC bus, which causes a large delta due
to indentation changes
- A new Tegra K1 board: Apalis
- A bunch of small updates to many Allwinner platforms; new hardware support,
some cleanup, etc.
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM DT updates from Olof Johansson:
"Device tree contents continue to be the largest branches we submit.
This time around, some of the contents worth pointing out is:
New SoC platforms:
- Freescale i.MX 7Solo
- Broadcom BCM23550
- Cirrus Logic EP7209 and EP7211 (clps711x platforms)_
- Hisilicon HI3519
- Renesas R8A7792
Some of the other delta that is sticking out, line-count wise:
- Exynos moves of IP blocks under an SoC bus, which causes a large
delta due to indentation changes
- a new Tegra K1 board: Apalis
- a bunch of small updates to many Allwinner platforms; new hardware
support, some cleanup, etc"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (426 commits)
ARM: dts: sun8i: Add dts file for inet86dz board
ARM: dts: sun8i: Add dts file for Polaroid MID2407PXE03 tablet
ARM: dts: sun8i: Use sun8i-reference-design-tablet for ga10h dts
ARM: dts: sun8i: Use sun8i-reference-design-tablet for polaroid mid2809pxe04
ARM: dts: sun8i: reference-design-tablet: Add drivevbus-supply
ARM: dts: Copy sun8i-q8-common.dtsi sun8i-reference-design-tablet.dtsi
ARM: dts: sun5i: Use sun5i-reference-design-tablet.dtsi for utoo p66 dts
ARM: dts: sun5i: Use sun5i-reference-design-tablet.dtsi for dit4350 dts
ARM: dts: sun5i: reference-design-tablet: Remove mention of q8
ARM: dts: sun5i: reference-design-tablet: Set lradc vref to avcc
ARM: dts: sun5i: Rename sun5i-q8-common.dtsi sun5i-reference-design-tablet.dtsi
ARM: dts: sun5i: Move q8 display bits to sun5i-a13-q8-tablet.dts
ARM: dts: sunxi: Rename sunxi-q8-common.dtsi sunxi-reference-design-tablet.dtsi
ARM: dts: at91: Don't build unnecessary dtbs
ARM: dts: at91: sama5d3x: separate motherboard gmac and emac definitions
ARM: dts: at91: at91sam9g25ek: fix isi endpoint node
ARM: dts: at91: move isi definition to at91sam9g25ek
ARM: dts: at91: fix i2c-gpio node name
ARM: dts: at91: vinco: fix regulator name
ARM: dts: at91: ariag25 : fix onewire node
...
This reverts commit e16fb2e635.
Updated documentation from the chip vendor reveals that this clock is
not required for correct operation of the MMC controller. As such, do
not expose it to DT.
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Simon Horman told me that R8A7792 has ADSP clock based on an incorrect
table in the most recent R-Car gen2 manual. But when I received that manual
I discovered that this is false: R8A7792 is the only Gen 2 SoC that doesn't
have ADSP at all. Accordingly remove the ADSP clock from DT for the
r8a7792.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Merge "STi late updates for v4.8" from Patrice Chotard:
- Add STi DT critical clocks declaration
- Remove SPI hack wich has dependecy with critical clocks
These 2 STi DT patches and SPI hack MUST be applied after patches
contained into Stephen Boyd's branch clk-next/clk-st-critical.
This to ensure not to break SPI.
* tag 'sti-late-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti:
spi: st-ssc4: Remove 'no clocking' hack
ARM: sti: stih410-clocks: Identify critical clocks
ARM: sti: stih407-family: Supply defines for CLOCKGEN A0
clk: st: clkgen-pll: Detect critical clocks
clk: st: clkgen-fsyn: Detect critical clocks
clk: st: clk-flexgen: Detect critical clocks
There are 2 LMI clocks generated by CLOCKGEN A0. We wish to control
them individually and need to use these indexes to do so.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
The MMC_PCLK is needed for the SD/eMMC driver, expose to DT (and comment
out in clk driver)
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/20160707033837.20029-1-khilman@baylibre.com
as well as i2s and ethernet support on rk3228/rk3229 devices
and a dts file for the rk3229 eval board.
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Merge tag 'v4.8-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
Audio support and spi-flash on rk3288-veyron Chromedevices
as well as i2s and ethernet support on rk3228/rk3229 devices
and a dts file for the rk3229 eval board.
* tag 'v4.8-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: add support rk3229 evb board
ARM: dts: rockchip: add GMAC nodes for RK322x SoCs
ARM: dts: rockchip: add i2s nodes for RK322x SoCs
ARM: dts: rockchip: rename rk3228.dtsi to rk322x.dtsi
clk: rockchip: add clock-ids for rk3228 MAC clocks
clk: rockchip: add clock-ids for rk3228 audio clocks
ARM: dts: rockchip: rename i2s model for Veyron devices
ARM: dts: rockchip: move rk3288 io-domain nodes to the grf
ARM: dts: rockchip: Enable analog audio on rk3288-veyron chromebooks
ARM: dts: rockchip: Add shared file for audio on rk3288-veyron boards
ARM: dts: rockchip: add SPI flash node for rk3288-veyron
Signed-off-by: Olof Johansson <olof@lixom.net>
* Use APMU on R-Car Gen2 and provide SMP for r8a7793 SoC
* Update console parameters to uniformly use chosen/stdout-path,
serial0, not provide kernel unnecessary command line parameters
* Add DU pins to silk board
* Add support for blanche/r8a7792
* Name pfc subnodes after device name
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Merge tag 'renesas-dt2-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Second Round of Renesas ARM Based SoC DT Updates for v4.8
* Use APMU on R-Car Gen2 and provide SMP for r8a7793 SoC
* Update console parameters to uniformly use chosen/stdout-path,
serial0, not provide kernel unnecessary command line parameters
* Add DU pins to silk board
* Add support for blanche/r8a7792
* Name pfc subnodes after device name
* tag 'renesas-dt2-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (41 commits)
ARM: dts: r8a7792: add SMP support
ARM: dts: r8a7793: Add APMU node and second CPU core
ARM: dts: r8a7791: Add APMU node
ARM: dts: r8a7790: Add APMU nodes
devicetree: bindings: Renesas APMU and SMP Enable method
ARM: dts: kzm9g: Update console parameters
ARM: dts: kzm9d: Update console parameters
ARM: dts: marzen: Add serial port config to chosen/stdout-path
ARM: dts: genmai: Update console parameters
ARM: dts: armadillo800eva: Update console parameters
ARM: dts: r8a7792: add JPU support
ARM: dts: r8a7792: add JPU clocks
ARM: dts: silk: add DU pins
ARM: dts: blanche: add Ethernet support
ARM: dts: blanche: initial device tree
ARM: dts: blanche: document Blanche board
ARM: dts: r8a7792: add IRQC support
ARM: dts: r8a7792: add [H]SCIF support
ARM: dts: r8a7792: add SYS-DMAC support
ARM: dts: r8a7792: initial SoC device tree
...
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch add the support to select the peripheral clock (PERIPH)
as a parent clock source using the "assigned-clock-parents"
parameter in the device tree.
Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com>
Acked-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/1464982475-24738-1-git-send-email-slemieux.tyco@gmail.com
rk3228 clockids and a small fix for the not yet used spdif to
displayport clock on the rk3399.
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Merge tag 'v4.8-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next
Pull rockchip clk driver updates from Heiko Stuebner:
Placeholder for the rk3399 watchdog pclk, some newly exported
rk3228 clockids and a small fix for the not yet used spdif to
displayport clock on the rk3399.
* tag 'v4.8-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
clk: rockchip: fix incorrect rk3399 spdif-DPTX divider bits
clk: rockchip: export rk3228 MAC clocks
clk: rockchip: rename rk3228 sclk_macphy_50m to sclk_mac_extclk
clk: rockchip: export rk3228 audio clocks
clk: rockchip: include rk3228 downstream muxes into fractional dividers
clk: rockchip: fix incorrect rk3228 clock registers
clk: rockchip: add clock-ids for rk3228 MAC clocks
clk: rockchip: add clock-ids for rk3228 audio clocks
clk: rockchip: add a dummy clock for the watchdog pclk on rk3399
Fixes and enhancements mostly for Tegra210 clocks that allow DSI and
HDMI to work on Tegra X1. There's also a refactoring, including fixes,
the USB PLL.
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Merge tag 'tegra-for-4.8-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into clk-next
Pull tegra clk driver updates from Thierry Reding:
Fixes and enhancements mostly for Tegra210 clocks that allow DSI and
HDMI to work on Tegra X1. There's also a refactoring, including fixes,
the USB PLL.
* tag 'tegra-for-4.8-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
clk: tegra: Initialize UTMI PLL when enabling PLLU
clk: tegra: Micro-optimize Tegra210 clock setup
clk: tegra: Make sor_safe the parent of dpaux and dpaux1
clk: tegra: Mark timer clock as critical
clk: tegra: Enable sor1 and sor1_src on Tegra210
clk: tegra: Squash sor1 safe/brick/src into a single mux
clk: tegra: Disable spread spectrum on pll_d2
clk: tegra: Fixup post dividers on Tegra210
Add JPU clock and its parent, M2 clock to the R8A7792 device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The gxbb clock controller is the primary clock generation unit for the
AmLogic GXBB SoC. It is clocked by a fixed 24MHz xtal, contains several
PLLs and the usual post-dividers, muxes, dividers and leaf gates that
are fed into various IP blocks in the SoC.
Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Remove the composite clock registration function and helpers. Replace
unnecessary configuration struct with static initialization of the
desired clock type.
To preserve git bisect this patch also flips the switch and starts using
of_clk_add_hw_provider instead of the deprecated meson_clk_register_clks
method. As a byproduct clk.c can be deleted.
Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
This patch exports related MAC clocks for dts reference.
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This patch exports related i2s/spdif clocks for dts reference.
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Make the sor1 and sor1_src clocks available on Tegra210. They will be
used by the display driver to support HDMI and DP.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add macros usable by the device tree sources to reference the R8A7792
clocks by index.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch adds the CLK_IGNORE_UNUSED flag for PCI Express's clocks
which need to remain enabled. The 'pcie' gate clock definition is
also added.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
[s.nawrocki@samsung.com: edited the patch's summary]
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Add all R-Car M3-W Clock Pulse Generator Core Clock Outputs, as listed
in Table 8.2b ("List of Clocks [R-Car M3-W]") of the R-Car Gen3
datasheet (rev. 0.51 + Errata for Rev051 Mar 31 2016).
Note that internal CPG clocks (S0, S1, S2, S3, SDSRC, and SSPSRC) are
not included, as they are used as internal clock sources only, and never
referenced from DT.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Simon Horman <horms+renesas@verge.net.au>
Add IDs for watchdog and Security SubSystem to Exynos5410. Use the same
number as for Exynos5420 just in case in future these drivers were
merged.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Add ID for TMU clock to Exynos5410. Use the same number as for
Exynos5420 just in case in future these drivers were merged.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Add IDs for I2C, USI (HSI2C) and RTC clocks to Exynos5410. Use the same
number as for Exynos5420 just in case in future these drivers are merged.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Add IDs for PWM and USB clocks to Exynos5410. Use the same number as for
Exynos5420 just in case in future these drivers were merged.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Add license and copyrights (file introduced in 2014) to header with
Exynos5410 clock IDs. Additionally reformat it to improve readability.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
According to the latest information, there is no thermal IP block
present on the r8a7794 SoC.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Pull drm updates from Dave Airlie:
"Here's the main drm pull request for 4.7, it's been a busy one, and
I've been a bit more distracted in real life this merge window. Lots
more ARM drivers, not sure if it'll ever end. I think I've at least
one more coming the next merge window.
But changes are all over the place, support for AMD Polaris GPUs is in
here, some missing GM108 support for nouveau (found in some Lenovos),
a bunch of MST and skylake fixes.
I've also noticed a few fixes from Arnd in my inbox, that I'll try and
get in asap, but I didn't think they should hold this up.
New drivers:
- Hisilicon kirin display driver
- Mediatek MT8173 display driver
- ARC PGU - bitstreamer on Synopsys ARC SDP boards
- Allwinner A13 initial RGB output driver
- Analogix driver for DisplayPort IP found in exynos and rockchip
DRM Core:
- UAPI headers fixes and C++ safety
- DRM connector reference counting
- DisplayID mode parsing for Dell 5K monitors
- Removal of struct_mutex from drivers
- Connector registration cleanups
- MST robustness fixes
- MAINTAINERS updates
- Lockless GEM object freeing
- Generic fbdev deferred IO support
panel:
- Support for a bunch of new panels
i915:
- VBT refactoring
- PLL computation cleanups
- DSI support for BXT
- Color manager support
- More atomic patches
- GEM improvements
- GuC fw loading fixes
- DP detection fixes
- SKL GPU hang fixes
- Lots of BXT fixes
radeon/amdgpu:
- Initial Polaris support
- GPUVM/Scheduler/Clock/Power improvements
- ASYNC pageflip support
- New mesa feature support
nouveau:
- GM108 support
- Power sensor support improvements
- GR init + ucode fixes.
- Use GPU provided topology information
vmwgfx:
- Add host messaging support
gma500:
- Some cleanups and fixes
atmel:
- Bridge support
- Async atomic commit support
fsl-dcu:
- Timing controller for LCD support
- Pixel clock polarity support
rcar-du:
- Misc fixes
exynos:
- Pipeline clock support
- Exynoss4533 SoC support
- HW trigger mode support
- export HDMI_PHY clock
- DECON5433 fixes
- Use generic prime functions
- use DMA mapping APIs
rockchip:
- Lots of little fixes
vc4:
- Render node support
- Gamma ramp support
- DPI output support
msm:
- Mostly cleanups and fixes
- Conversion to generic struct fence
etnaviv:
- Fix for prime buffer handling
- Allow hangcheck to be coalesced with other wakeups
tegra:
- Gamme table size fix"
* 'drm-next' of git://people.freedesktop.org/~airlied/linux: (1050 commits)
drm/edid: add displayid detailed 1 timings to the modelist. (v1.1)
drm/edid: move displayid validation to it's own function.
drm/displayid: Iterate over all DisplayID blocks
drm/edid: move displayid tiled block parsing into separate function.
drm: Nuke ->vblank_disable_allowed
drm/vmwgfx: Report vmwgfx version to vmware.log
drm/vmwgfx: Add VMWare host messaging capability
drm/vmwgfx: Kill some lockdep warnings
drm/nouveau/gr/gf100-: fix race condition in fecs/gpccs ucode
drm/nouveau/core: recognise GM108 chipsets
drm/nouveau/gr/gm107-: fix touching non-existent ppcs in attrib cb setup
drm/nouveau/gr/gk104-: share implementation of ppc exception init
drm/nouveau/gr/gk104-: move rop_active_fbps init to nonctx
drm/nouveau/bios/pll: check BIT table version before trying to parse it
drm/nouveau/bios/pll: prevent oops when limits table can't be parsed
drm/nouveau/volt/gk104: round up in gk104_volt_set
drm/nouveau/fb/gm200: setup mmu debug buffer registers at init()
drm/nouveau/fb/gk20a,gm20b: setup mmu debug buffer registers at init()
drm/nouveau/fb/gf100-: allocate mmu debug buffers
drm/nouveau/fb: allow chipset-specific actions for oneinit()
...
do have a couple core changes in here as well.
Core:
- CLK_IS_CRITICAL support has been added. This should allow drivers
to properly express that a certain clk should stay on even if
their prepare/enable count drops to 0 (and in turn the parents of
these clks should stay enabled).
- A clk registration API has been added, clk_hw_register(), and
an OF clk provider API has been added, of_clk_add_hw_provider().
These APIs have been put in place to further split clk providers
from clk consumers, with the goal being to have clk providers
never deal with struct clk pointers at all. Conversion of provider
drivers is on going. clkdev has also gained support for registering
clk_hw pointers directly so we can convert drivers that don't use
devicetree.
New Drivers:
- Marvell ap806 and cp110 system controllers (with clks inside!)
- Hisilicon Hi3519 clock and reset controller
- Axis ARTPEC-6 clock controllers
- Oxford Semiconductor OXNAS clock controllers
- AXS10X I2S PLL
- Rockchip RK3399 clock and reset controller
Updates:
- MMC2 and UART2 clks on Samsung Exynos 3250, ACLK on Samsung Exynos 542x
SoCs, and some more clk ID exporting for bus frequency scaling
- Proper BCM2835 PCM clk support and various other clks
- i.MX clk updates for i.MX6SX, i.MX7, and VF610
- Renesas updates for R-Car H3
- Tegra210 got updates for DisplayPort and HDMI 2.0
- Rockchip driver refactorings and fixes due to adding RK3399 support
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd:
"It's the usual big pile of driver updates and additions, but we do
have a couple core changes in here as well.
Core:
- CLK_IS_CRITICAL support has been added. This should allow drivers
to properly express that a certain clk should stay on even if their
prepare/enable count drops to 0 (and in turn the parents of these
clks should stay enabled).
- A clk registration API has been added, clk_hw_register(), and an OF
clk provider API has been added, of_clk_add_hw_provider(). These
APIs have been put in place to further split clk providers from clk
consumers, with the goal being to have clk providers never deal
with struct clk pointers at all. Conversion of provider drivers is
on going. clkdev has also gained support for registering clk_hw
pointers directly so we can convert drivers that don't use
devicetree.
New Drivers:
- Marvell ap806 and cp110 system controllers (with clks inside!)
- Hisilicon Hi3519 clock and reset controller
- Axis ARTPEC-6 clock controllers
- Oxford Semiconductor OXNAS clock controllers
- AXS10X I2S PLL
- Rockchip RK3399 clock and reset controller
Updates:
- MMC2 and UART2 clks on Samsung Exynos 3250, ACLK on Samsung Exynos
542x SoCs, and some more clk ID exporting for bus frequency scaling
- Proper BCM2835 PCM clk support and various other clks
- i.MX clk updates for i.MX6SX, i.MX7, and VF610
- Renesas updates for R-Car H3
- Tegra210 got updates for DisplayPort and HDMI 2.0
- Rockchip driver refactorings and fixes due to adding RK3399 support"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (139 commits)
clk: fix critical clock locking
clk: qcom: mmcc-8996: Remove clocks that should be controlled by RPM
clk: ingenic: Allow divider value to be divided
clk: sunxi: Add display and TCON0 clocks driver
clk: rockchip: drop old_rate calculation on pll rate changes
clk: rockchip: simplify GRF handling in pll clocks
clk: rockchip: lookup General Register Files in rockchip_clk_init
clk: rockchip: fix the rk3399 sdmmc sample / drv name
clk: mvebu: new driver for Armada CP110 system controller
dt-bindings: arm: add DT binding for Marvell CP110 system controller
clk: mvebu: new driver for Armada AP806 system controller
clk: hisilicon: add CRG driver for hi3519 soc
clk: hisilicon: export some hisilicon APIs to modules
reset: hisilicon: add reset controller driver for hisilicon SOCs
clk: bcm/kona: Do not use sizeof on pointer type
clk: qcom: msm8916: Fix crypto clock flags
clk: nxp: lpc18xx: Initialize clk_init_data::flags to 0
clk/axs10x: Add I2S PLL clock driver
clk: imx7d: fix ahb clock mux 1
clk: fix comment of devm_clk_hw_register()
...
Pull MIPS updates from Ralf Baechle:
"This is the main pull request for MIPS for 4.7. Here's the summary of
the changes:
- ATH79: Support for DTB passuing using the UHI boot protocol
- ATH79: Remove support for builtin DTB.
- ATH79: Add zboot debug serial support.
- ATH79: Add initial support for Dragino MS14 (Dragine 2), Onion Omega
and DPT-Module.
- ATH79: Update devicetree clock support for AR9132 and AR9331.
- ATH79: Cleanup the DT code.
- ATH79: Support newer SOCs in ath79_ddr_ctrl_init.
- ATH79: Fix regression in PCI window initialization.
- BCM47xx: Move SPROM driver to drivers/firmware/
- BCM63xx: Enable partition parser in defconfig.
- BMIPS: BMIPS5000 has I cache filing from D cache
- BMIPS: BMIPS: Add cpu-feature-overrides.h
- BMIPS: Add Whirlwind support
- BMIPS: Adjust mips-hpt-frequency for BCM7435
- BMIPS: Remove maxcpus from BCM97435SVMB DTS
- BMIPS: Add missing 7038 L1 register cells to BCM7435
- BMIPS: Various tweaks to initialization code.
- BMIPS: Enable partition parser in defconfig.
- BMIPS: Cache tweaks.
- BMIPS: Add UART, I2C and SATA devices to DT.
- BMIPS: Add BCM6358 and BCM63268support
- BMIPS: Add device tree example for BCM6358.
- BMIPS: Improve Improve BCM6328 and BCM6368 device trees
- Lantiq: Add support for device tree file from boot loader
- Lantiq: Allow build with no built-in DT.
- Loongson 3: Reserve 32MB for RS780E integrated GPU.
- Loongson 3: Fix build error after ld-version.sh modification
- Loongson 3: Move chipset ACPI code from drivers to arch.
- Loongson 3: Speedup irq processing.
- Loongson 3: Add basic Loongson 3A support.
- Loongson 3: Set cache flush handlers to nop.
- Loongson 3: Invalidate special TLBs when needed.
- Loongson 3: Fast TLB refill handler.
- MT7620: Fallback strategy for invalid syscfg0.
- Netlogic: Fix CP0_EBASE redefinition warnings
- Octeon: Initialization fixes
- Octeon: Add DTS files for the D-Link DSR-1000N and EdgeRouter Lite
- Octeon: Enable add Octeon-drivers in cavium_octeon_defconfig
- Octeon: Correctly handle endian-swapped initramfs images.
- Octeon: Support CN73xx, CN75xx and CN78xx.
- Octeon: Remove dead code from cvmx-sysinfo.
- Octeon: Extend number of supported CPUs past 32.
- Octeon: Remove some code limiting NR_IRQS to 255.
- Octeon: Simplify octeon_irq_ciu_gpio_set_type.
- Octeon: Mark some functions __init in smp.c
- Octeon: Octeon: Add Octeon III CN7xxx interface detection
- PIC32: Add serial driver and bindings for it.
- PIC32: Add PIC32 deadman timer driver and bindings.
- PIC32: Add PIC32 clock timer driver and bindings.
- Pistachio: Determine SoC revision during boot
- Sibyte: Fix Kconfig dependencies of SIBYTE_BUS_WATCHER.
- Sibyte: Strip redundant comments from bcm1480_regs.h.
- Panic immediately if panic_on_oops is set.
- module: fix incorrect IS_ERR_VALUE macro usage.
- module: Make consistent use of pr_*
- Remove no longer needed work_on_cpu() call.
- Remove CONFIG_IPV6_PRIVACY from defconfigs.
- Fix registers of non-crashing CPUs in dumps.
- Handle MIPSisms in new vmcore_elf32_check_arch.
- Select CONFIG_HANDLE_DOMAIN_IRQ and make it work.
- Allow RIXI to be used on non-R2 or R6 cores.
- Reserve nosave data for hibernation
- Fix siginfo.h to use strict POSIX types.
- Don't unwind user mode with EVA.
- Fix watchpoint restoration
- Ptrace watchpoints for R6.
- Sync icache when it fills from dcache
- I6400 I-cache fills from dcache.
- Various MSA fixes.
- Cleanup MIPS_CPU_* definitions.
- Signal: Move generic copy_siginfo to signal.h
- Signal: Fix uapi include in exported asm/siginfo.h
- Timer fixes for sake of KVM.
- XPA TLB refill fixes.
- Treat perf counter feature
- Update John Crispin's email address
- Add PIC32 watchdog and bindings.
- Handle R10000 LL/SC bug in set_pte()
- cpufreq: Various fixes for Longson1.
- R6: Fix R2 emulation.
- mathemu: Cosmetic fix to ADDIUPC emulation, plenty of other small fixes
- ELF: ABI and FP fixes.
- Allow for relocatable kernel and use that to support KASLR.
- Fix CPC_BASE_ADDR mask
- Plenty fo smp-cps, CM, R6 and M6250 fixes.
- Make reset_control_ops const.
- Fix kernel command line handling of leading whitespace.
- Cleanups to cache handling.
- Add brcm, bcm6345-l1-intc device tree bindings.
- Use generic clkdev.h header
- Remove CLK_IS_ROOT usage.
- Misc small cleanups.
- CM: Fix compilation error when !MIPS_CM
- oprofile: Fix a preemption issue
- Detect DSP ASE v3 support:1"
* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (275 commits)
MIPS: pic32mzda: fix getting timer clock rate.
MIPS: ath79: fix regression in PCI window initialization
MIPS: ath79: make ath79_ddr_ctrl_init() compatible for newer SoCs
MIPS: Fix VZ probe gas errors with binutils <2.24
MIPS: perf: Fix I6400 event numbers
MIPS: DEC: Export `ioasic_ssr_lock' to modules
MIPS: MSA: Fix a link error on `_init_msa_upper' with older GCC
MIPS: CM: Fix compilation error when !MIPS_CM
MIPS: Fix genvdso error on rebuild
USB: ohci-jz4740: Remove obsolete driver
MIPS: JZ4740: Probe OHCI platform device via DT
MIPS: JZ4740: Qi LB60: Remove support for AVT2 variant
MIPS: pistachio: Determine SoC revision during boot
MIPS: BMIPS: Adjust mips-hpt-frequency for BCM7435
mips: mt7620: fallback to SDRAM when syscfg0 does not have a valid value for the memory type
MIPS: Prevent "restoration" of MSA context in non-MSA kernels
MIPS: cevt-r4k: Dynamically calculate min_delta_ns
MIPS: malta-time: Take seconds into account
MIPS: malta-time: Start GIC count before syncing to RTC
MIPS: Force CPUs to lose FP context during mode switches
...
We continue ramping up platform support for 64-bit ARM machines,
with 111 individual non-merge changesets touching 21 platforms.
The LG1312 platform is completely new and is the first ARM
platform by LG that we support in the mainline kernel. Two other
SoCs got added that are updated versions of existing SoC
families, so the port mainly consists of new dts files:
- The Hisilicon Hip06/D03 is the latest server platform
from Huawei/Hisilicon, and follows the Hip05/D02 platform.
- Rockchip RK3399 follows the 32-bit RK3288 that is popular
in low-end Chromebooks and the 64-bit RK3368 that is mainly
found in chinese Android TV boxes.
The 96Boards HiKey based on the Hisilicon Hi6220 (Kirin 620)
gets a long-awaited overhaul with a lot of devices enabled in
the DT, so it should be much more usable with a mainline kernel
now. See also
https://plus.google.com/111524780435806926688/posts/PeGb2VsNhJd
A lot of work went into enabling new device drivers on existing
machines, but we also have a couple of new commercially
available machines:
- Google Pixel C laptop based on Tegra210
- Hardkernel Odroid C2 Based on Amlogic Meson GXBB (S905)
- Geekbuying GeekBox based on Rockchip RK3368
And finally, a couple of reference or development platforms
that are not end-user platforms but are used for trying out
the respective SoC platforms:
- Amlogic Meson GXBB P200 and P201 development systems
- NXP Layerscape 1043A QDS development board
- Hisilicon Hip06 D03 server board, as mentioned above
- LG1312 Reference Design
- RK3399 Evaluation Board
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Merge tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM 64-bit DT updates from Arnd Bergmann:
"We continue ramping up platform support for 64-bit ARM machines, with
111 individual non-merge changesets touching 21 platforms.
The LG1312 platform is completely new and is the first ARM platform by
LG that we support in the mainline kernel. Two other SoCs got added
that are updated versions of existing SoC families, so the port mainly
consists of new dts files:
- The Hisilicon Hip06/D03 is the latest server platform from
Huawei/Hisilicon, and follows the Hip05/D02 platform.
- Rockchip RK3399 follows the 32-bit RK3288 that is popular in
low-end Chromebooks and the 64-bit RK3368 that is mainly found in
chinese Android TV boxes.
The 96Boards HiKey based on the Hisilicon Hi6220 (Kirin 620) gets a
long-awaited overhaul with a lot of devices enabled in the DT, so it
should be much more usable with a mainline kernel now. See also
https://plus.google.com/111524780435806926688/posts/PeGb2VsNhJd
A lot of work went into enabling new device drivers on existing
machines, but we also have a couple of new commercially available
machines:
- Google Pixel C laptop based on Tegra210
- Hardkernel Odroid C2 Based on Amlogic Meson GXBB (S905)
- Geekbuying GeekBox based on Rockchip RK3368
And finally, a couple of reference or development platforms that are
not end-user platforms but are used for trying out the respective SoC
platforms:
- Amlogic Meson GXBB P200 and P201 development systems
- NXP Layerscape 1043A QDS development board
- Hisilicon Hip06 D03 server board, as mentioned above
- LG1312 Reference Design
- RK3399 Evaluation Board"
* tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (104 commits)
arm64: dts: marvell: add XOR node for Armada 3700 SoC
dt-bindings: document rockchip rk3399-evb board
arm64: dts: rockchip: add dts file for RK3399 evaluation board
arm64: dts: rockchip: add core dtsi file for RK3399 SoCs
dt-bindings: rockchip-dw-mshc: add description for rk3399
arm64: dts: marvell: Use a SoC-specific compatible for xHCI on Armada37xx
arm64: dts: marvell: Rename armada-37xx USB node
arm64: dts: marvell: Clean up armada-3720-db
Documentation: arm64: Add Hisilicon Hip06 D03 dts binding
arm64: dts: Add initial dts for Hisilicon Hip06 D03 board
arm64: dts: hip05: Add nor flash support
arm64: dts: hip05: fix its node without msi-cells
arm64: dts: r8a7795: Don't disable referenced optional clocks
arm64: dts: salvator-x: populate EXTALR
arm64: dts: r8a7795: enable PCIe on Salvator-X
arm64: dts: r8a7795: Add PCIe nodes
arm64: tegra: Add IOMMU node to GM20B on Tegra210
arm64: tegra: Add reference clock to GM20B on Tegra210
dt-bindings: Add documentation for GM20B GPU
dt-bindings: gk20a: Document iommus property
...
The include/dt-bindings/clock/ath79-clk.h header file
is introduced so we can use symbolic identifiers for SoC clocks.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Cc: Gabor Juhos <juhosg@openwrt.org>
Cc: Alban Bedel <albeu@free.fr>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: linux-mips@linux-mips.org
Cc: linux-clk@vger.kernel.org
Cc: devicetree@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/12875/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The CRG(Clock and Reset Generator) block provides clock
and reset signals for other modules in hi3519 soc.
Signed-off-by: Jiancheng Xue <xuejiancheng@hisilicon.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
The configurable hdmi_ref output of the PLL block is derived from
the tvdpll_594m clock signal via a configurable PLL post-divider.
It is used as the PLL reference input to the HDMI PHY module.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: James Liao <jamesjj.liao@mediatek.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
This set of changes contains a bunch of cleanups and minor fixes along
with some new clocks, mainly on Tegra210, in preparation for supporting
DisplayPort and HDMI 2.0.
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Merge tag 'tegra-for-4.7-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into clk-next
Pull tegra clk driver changes from Thierry Reding:
This set of changes contains a bunch of cleanups and minor fixes along
with some new clocks, mainly on Tegra210, in preparation for supporting
DisplayPort and HDMI 2.0.
* tag 'tegra-for-4.7-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
clk: tegra: dfll: Reformat CVB frequency table
clk: tegra: dfll: Properly clean up on failure and removal
clk: tegra: dfll: Make code more comprehensible
clk: tegra: dfll: Reference CVB table instead of copying data
clk: tegra: dfll: Update kerneldoc
clk: tegra: Fix PLL_U post divider and initial rate on Tegra30
clk: tegra: Initialize PLL_C to sane rate on Tegra30
clk: tegra: Fix pllre Tegra210 and add pll_re_out1
clk: tegra: Add sor_safe clock
clk: tegra: dpaux and dpaux1 are fixed factor clocks
clk: tegra: Add dpaux1 clock
clk: tegra: Use correct parent for dpaux clock
clk: tegra: Add fixed factor peripheral clock type
clk: tegra: Special-case mipi-cal parent on Tegra114
clk: tegra: Remove trailing blank line
clk: tegra: Constify peripheral clock registers
clk: tegra: Add interface to enable hardware control of SATA/XUSB PLLs
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Merge tag 'v4.7-rockchip-clk3' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next
Pull rockchip clk updates from Heiko Stuebner:
A spelling fix and a bunch of rk3399 clock fixes.
* tag 'v4.7-rockchip-clk3' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
clk: rockchip: fix the rk3399 cifout clock
clk: rockchip: drop unnecessary CLK_IGNORE_UNUSED flags from rk3399
clk: rockchip: add some frequencies on the rk3399 PLL table
clk: rockchip: assign more necessary rk3399 clock ids
clk: rockchip: export some necessary rk3399 clock ids
clk: rockchip: rename rga clock-id on rk3399
clk: rockchip: add general gpu soft-reset on rk3399
clk: rockchip: fix the gate bit for i2c4 and i2c8 on rk3399
clk: rockchip: fix of spelling mistake on unsuccessful in pll clock type
Use a new Tegra210 version of the pll_register_pllre function to
allow setting the proper settings for the m and n div fields.
Additionally define PLL_RE_OUT1 on Tegra210.
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
[treding@nvidia.com: define PLLRE_OUT1 register offset]
Signed-off-by: Thierry Reding <treding@nvidia.com>
* Configure NMI key as wakeup source in DT of kzm9g board
* Add SDHI support to DT of gose board
* Add support of UHS-I SDR-50 for SDHI to DT of r8a7790 SoC
* Correct interrupt type for ARM TWD in DT of r8a7779 and sh73a0 SoCs
* Add IIC support to DT of r8a7794 SoC
* Add CAN support to DT of r8a7793 and r8a7794 SoCs
* Add SCIF2 support to r8a7790 device tree
* Use CAN, JPU and USB3.0 fallback compatibility string
in DT of r8a7791 and r8a7790 SoCs
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Merge tag 'renesas-dt-for-v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Merge "Renesas ARM Based SoC DT Updates for v4.7" from Simon Horman:
* Configure NMI key as wakeup source in DT of kzm9g board
* Add SDHI support to DT of gose board
* Add support of UHS-I SDR-50 for SDHI to DT of r8a7790 SoC
* Correct interrupt type for ARM TWD in DT of r8a7779 and sh73a0 SoCs
* Add IIC support to DT of r8a7794 SoC
* Add CAN support to DT of r8a7793 and r8a7794 SoCs
* Add SCIF2 support to r8a7790 device tree
* Use CAN, JPU and USB3.0 fallback compatibility string
in DT of r8a7791 and r8a7790 SoCs
* tag 'renesas-dt-for-v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (22 commits)
ARM: dts: gose: Enable SDHI controllers
ARM: dts: r8a7793: Add SDHI controllers
ARM: dts: r8a7790: fix max-frequency for SDHI
ARM: dts: kzm9g: Configure NMI key as wake-up source
ARM: dts: r8a7790: lager: Enable UHS-I SDR-50
ARM: dts: r8a7790: Set maximum frequencies for SDHI clocks
ARM: dts: r8a7791: Use USB3.0 fallback compatibility string
ARM: dts: r8a7790: Use USB3.0 fallback compatibility string
ARM: dts: r8a7779: Correct interrupt type for ARM TWD
ARM: dts: sh73a0: Correct interrupt type for ARM TWD
ARM: dts: r8a7794: Add IIC nodes
ARM: dts: r8a7794: add IIC clocks
ARM: dts: r8a7793: add CAN nodes to device tree
ARM: dts: r8a7793: add CAN clocks to device tree
ARM: dts: r8a7794: add CAN nodes to device tree
ARM: dts: r8a7794: add CAN clocks to device tree
ARM: dts: r8a7790: use fallback can compatibility string
ARM: dts: r8a7791: use fallback can compatibility string
ARM: dts: r8a7790: Add SCIF2 device node
ARM: dts: r8a7790: Add SCIF2 clock
...
We export some clock IDs for the reference drivers need them.
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The rga clock supplying the working clock on the rk3399 is actually
called rga-core in the manual. As the clock id has neither been
assigned nor released with a full kernel release, we can still change
the id to the more appropriate naming.
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add the id for the general gpu soft-reset, that got documented only in
newer TRM versions.
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
rk3399 header and also in the clock code itself.
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Merge tag 'v4.7-rockchip-clk2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next
Pull some checkpatch silencers from Heiko Stuebner:
Fix quite some checkpatch warnings in the newly added
rk3399 header and also in the clock code itself.
* tag 'v4.7-rockchip-clk2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
clk: rockchip: fix checkpatch warning in core code
clk: rockchip: drop unnecessary header comment
clk: rockchip: reign in some overly long lines in the rk3399 controller
clk: rockchip: fix checkpatch errors in rk3399 dt-binding header
Add IIC clocks to r8a7794 device tree.
Based on similar work for the r8a7790 by Wolfram Sang.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Add CAN nodes to r8a7794 device tree.
Based on work by Sergei Shtylyov for the r8a7791 SoC.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
Based on Rev. 2.00 of the R-Car Gen2 datasheet.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Some "please, no space before tabs" checkpatch warnings slipped through
the recent addition of the rk3399 dt-binding header, so fix them.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add device tree documentation for the main clock controller in the
Artpec-6 SoC.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lars Persson <larper@axis.com>
[sboyd@codeaurora.org: Added unit address to binding example]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Main change is probably the added support for the new rk3399 soc
and necessary infrastructure changes surrounding it.
The biggest chunk is probably that clock code is now able to
handle multiple clock providers in one system, as the rk3399
has two of those. A general one and another smaller one in a
separate power domain. The rk3399 also uses another new pll type.
Thankfully it just fits nicely into our current structure.
It also needs some parts like the cpuclk mux parameters to be
a bit more flexible and an new fractional divider subtype without
gate.
Apart from this big change we have some more fixes and removal
of forgotten variables.
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Merge tag 'v4.7-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next
Pull rockchip clk updates from Heiko Stuebner:
This is first big chunk of Rockchip clock-related changes for 4.7.
Main change is probably the added support for the new rk3399 soc
and necessary infrastructure changes surrounding it.
The biggest chunk is probably that clock code is now able to
handle multiple clock providers in one system, as the rk3399
has two of those. A general one and another smaller one in a
separate power domain. The rk3399 also uses another new pll type.
Thankfully it just fits nicely into our current structure.
It also needs some parts like the cpuclk mux parameters to be
a bit more flexible and an new fractional divider subtype without
gate.
Apart from this big change we have some more fixes and removal
of forgotten variables.
* tag 'v4.7-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
clk: rockchip: add clock controller for the RK3399
dt-bindings: add bindings for rk3399 clock controller
clk: rockchip: add dt-binding header for rk3399
clk: rockchip: release io resource when failing to init clk
clk: rockchip: remove redundant checking of device_node
clk: rockchip: fix warning reported by kernel-doc
clk: rockchip: remove mux_core_reg from rockchip_cpuclk_reg_data
clk: rockchip: add new pll-type for rk3399 and similar socs
clk: rockchip: Add support for multiple clock providers
clk: rockchip: allow varying mux parameters for cpuclk pll-sources
clk: rockchip: add a COMPOSITE_FRACMUX_NOGATE type
- Register SAI clk as shared clocks to support SAI audio on i.MX6SX
- Add the missing ckil clock for i.MX7
- Update clk-gate2 and vf610 clock driver to prepare for suspend
support on VF610
- Fix DCU clock configurations and add TCON ipg clock to support DRM
display on VF610
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Merge tag 'imx-clk-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into clk-next
The i.MX clock update for 4.7:
- Register SAI clk as shared clocks to support SAI audio on i.MX6SX
- Add the missing ckil clock for i.MX7
- Update clk-gate2 and vf610 clock driver to prepare for suspend
support on VF610
- Fix DCU clock configurations and add TCON ipg clock to support DRM
display on VF610
* tag 'imx-clk-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
clk: imx: vf610: fix whitespace in vf610-clock.h
clk: imx: vf610: add TCON ipg clock
clk: imx: vf610: fix DCU clock tree
clk: imx: add ckil clock for i.MX7
clk: imx: vf610: add suspend/resume support
clk: imx: vf610: add WKPU unit
clk: imx: vf610: leave DDR clock on
clk: imx: clk-gate2: allow custom gate configuration
clk: imx6sx: Register SAI clocks as shared clocks
(UART, MMC2 clocks) for exynos3250 SoC and exporting of IDs
for exynos543x SoC AMBA AXI bus clocks needed for bus frequency
scaling.
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Merge tag 'clk-v4.7-samsung' of git://linuxtv.org/snawrocki/samsung into clk-next
Pull samsung clk updates from Sylwester Nawrocki:
This includes addition of some missing clock tree definitions
(UART, MMC2 clocks) for exynos3250 SoC and exporting of IDs
for exynos543x SoC AMBA AXI bus clocks needed for bus frequency
scaling.
* tag 'clk-v4.7-samsung' of git://linuxtv.org/snawrocki/samsung:
clk: samsung: exynos542x: Add the clock id for ACLK
dt-bindings: clock: Add the clock id for ACLK clock of Exynos542x SoC
clk: samsung: exynos3250: Add MMC2 clock
clk: samsung: exynos3250: Add UART2 clock
dt-bindings: Add the clock id of UART2 and MMC2 for Exynos3250
This patch adds the clock id for ACLK clock of Exynos542x SoC.
ACLK clock means the source clock of AMBA AXI bus. This clock
id should be used for Bus frequency scaling.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Tested-by: Markus Reichl <m.reichl@fivetechno.de>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Add the ipg (bus) clock for the TCON modules (Timing Controller). This
module is required by the new DCU DRM driver, since the display signals
pass through TCON.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add the necessary clock to use the ckil on i.MX7.
Inspired from the following patch:
https://github.com/boundarydevices/linux-imx6/commit/b80e8271
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This patch adds the new clock id for both UART2 and MM2 device
for Exynos3250 SoC.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
To use STOP mode without putting DDR3 into self-refresh mode, we
need to keep the DDR clock enabled. Use the new gate configuration
with a value of 2 to make sure that the clock is enabled in RUN,
WAIT and STOP mode.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
clocks on 2835, add the PCM clock that used to be driven directly by
the bcm2835-i2s driver (that driver has been broken since this driver
was introduced), and adds many other new clocks.
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Merge tag 'bcm2835-clk-next-2016-03-17' of git://github.com/anholt/linux into clk-next
This pull request against clk/clk-next brings in fixes for fractional
clocks on 2835, add the PCM clock that used to be driven directly by
the bcm2835-i2s driver (that driver has been broken since this driver
was introduced), and adds many other new clocks.
* tag 'bcm2835-clk-next-2016-03-17' of git://github.com/anholt/linux:
clk: bcm2835: add missing osc and per clocks
clk: bcm2835: add missing PLL clock dividers
clk: bcm2835: enable management of PCM clock
clk: bcm2835: reorganize bcm2835_clock_array assignment
clk: bcm2835: remove use of BCM2835_CLOCK_COUNT in driver
clk: bcm2835: expose raw clock-registers via debugfs
clk: bcm2835: clean up coding style issues
clk: bcm2835: correctly enable fractional clock support
clk: bcm2835: divider value has to be 1 or more
clk: bcm2835: add locking to pll*_on/off methods
clk: bcm2835: pll_off should only update CM_PLL_ANARST
Add the dt-bindings header for the rk3399, that gets shared between
the clock controller and the clock references in the dts.
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
new device support in terms of LoC, but there has been some cleanup
in the core as well as the usual minor clk additions to various
drivers.
Core:
- parent tracking has been simplified
- CLK_IS_ROOT is now a no-op flag, cleaning up drivers has started
- of_clk_init() doesn't consider disabled DT nodes anymore
- clk_unregister() had an error path bug squashed
- of_clk_get_parent_count() has been fixed to only return unsigned ints
- HAVE_MACH_CLKDEV is removed now that the last arch user (ARM) is gone
New Drivers:
- NXP LPC18xx creg
- QCOM IPQ4019 GCC
- TI dm814x ADPLL
- i.MX6QP
Updates:
- Cyngus audio clks found on Broadcom iProc devices
- Non-critical fixes for BCM2385 PLLs
- Samsung exynos5433 updates for clk id errors, HDMI support,
suspend/resume simplifications
- USB, CAN, LVDS, and FCP clks on shmobile devices
- sunxi got support for more clks on new SoCs and went through a minor
refactoring/rewrite to use a simpler factor clk construct
- rockchip added some more clk ids and added suport for fraction dividers
- QCOM GDSCs in msm8996
- A new devm helper to make adding custom actions simpler (acked by Greg)
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd:
"The clk changes for this release cycle are mostly dominated by new
device support in terms of LoC, but there has been some cleanup in the
core as well as the usual minor clk additions to various drivers.
Core:
- parent tracking has been simplified
- CLK_IS_ROOT is now a no-op flag, cleaning up drivers has started
- of_clk_init() doesn't consider disabled DT nodes anymore
- clk_unregister() had an error path bug squashed
- of_clk_get_parent_count() has been fixed to only return unsigned ints
- HAVE_MACH_CLKDEV is removed now that the last arch user (ARM) is gone
New Drivers:
- NXP LPC18xx creg
- QCOM IPQ4019 GCC
- TI dm814x ADPLL
- i.MX6QP
Updates:
- Cyngus audio clks found on Broadcom iProc devices
- Non-critical fixes for BCM2385 PLLs
- Samsung exynos5433 updates for clk id errors, HDMI support,
suspend/resume simplifications
- USB, CAN, LVDS, and FCP clks on shmobile devices
- sunxi got support for more clks on new SoCs and went through a
minor refactoring/rewrite to use a simpler factor clk construct
- rockchip added some more clk ids and added suport for fraction
dividers
- QCOM GDSCs in msm8996
- A new devm helper to make adding custom actions simpler (acked by Greg)"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (197 commits)
clk: bcm2835: fix check of error code returned by devm_ioremap_resource()
clk: renesas: div6: use RENESAS for #define
clk: renesas: Rename header file renesas.h
clk: max77{686,802}: Remove CLK_IS_ROOT
clk: versatile: Remove CLK_IS_ROOT
clk: sunxi: Remove use of variable length array
clk: fixed-rate: Remove CLK_IS_ROOT
clk: qcom: Remove CLK_IS_ROOT
doc: dt: add documentation for lpc1850-creg-clk driver
clk: add lpc18xx creg clk driver
clk: lpc32xx: fix compilation warning
clk: xgene: Add missing parenthesis when clearing divider value
clk: mb86s7x: Remove CLK_IS_ROOT
clk: x86: Remove clkdev.h and clk.h includes
clk: x86: Remove CLK_IS_ROOT
clk: mvebu: Remove CLK_IS_ROOT
clk: renesas: move drivers to renesas directory
clk: si5{14,351,70}: Remove CLK_IS_ROOT
clk: scpi: Remove CLK_IS_ROOT
clk: s2mps11: Remove CLK_IS_ROOT
...
These are all the updates to device tree files for 32-bit platforms,
plus a couple of related 64-bit updates:
New SoC support:
- Allwinner A83T
- Axis Artpec-6 SoC
- Mediatek MT7623 SoC
- TI Keystone K2G SoC
- ST Microelectronics stm32f469
New board or machine support:
- ARM Juno R2
- Buffalo Linkstation LS-QVL and LS-GL
- Cubietruck plus
- D-Link DIR-885L
- DT support for ARM RealView PB1176 and PB11MPCore
- Google Nexus 7
- Homlet v2
- Itead Ibox
- Lamobo R1
- LG Optimus Black
- Logicpd dm3730
- Raspberry Pi Model A
Other changes include
- Lots of updates for Qualcomm APQ8064, MSM8974 and others
- Improved support for Nokia N900 and other OMAP machines
- Common clk support for lpc32xx
- HDLCD display on ARM
- Improved stm32f429 support
- Improved Renesas device support, r8a779x and others
- Lots of Rockchip updates
- Samsung cleanups
- ADC support for Atmel SAMA5D2
- BCM2835 (Raspberry Pi) improvements
- Broadcom Northstar Plus enhancements
- OMAP GPMC rework
- Several improvements for Atmel SAMA5D2 / Xplained
- Global change to remove inofficial "arm,amba-bus" compatible string
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM DT updates from Arnd Bergmann:
"These are all the updates to device tree files for 32-bit platforms,
plus a couple of related 64-bit updates:
New SoC support:
- Allwinner A83T
- Axis Artpec-6 SoC
- Mediatek MT7623 SoC
- TI Keystone K2G SoC
- ST Microelectronics stm32f469
New board or machine support:
- ARM Juno R2
- Buffalo Linkstation LS-QVL and LS-GL
- Cubietruck plus
- D-Link DIR-885L
- DT support for ARM RealView PB1176 and PB11MPCore
- Google Nexus 7
- Homlet v2
- Itead Ibox
- Lamobo R1
- LG Optimus Black
- Logicpd dm3730
- Raspberry Pi Model A
Other changes include
- Lots of updates for Qualcomm APQ8064, MSM8974 and others
- Improved support for Nokia N900 and other OMAP machines
- Common clk support for lpc32xx
- HDLCD display on ARM
- Improved stm32f429 support
- Improved Renesas device support, r8a779x and others
- Lots of Rockchip updates
- Samsung cleanups
- ADC support for Atmel SAMA5D2
- BCM2835 (Raspberry Pi) improvements
- Broadcom Northstar Plus enhancements
- OMAP GPMC rework
- Several improvements for Atmel SAMA5D2 / Xplained
- Global change to remove inofficial "arm,amba-bus" compatible
string"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (350 commits)
ARM, ARM64: dts: drop "arm,amba-bus" in favor of "simple-bus"
ARM: dts: artpec: dual-license on artpec6.dtsi
ARM: dts: ux500: add synaptics RMI4 for Ux500 TVK DT
arm64: dts: juno/vexpress: fix node name unit-address presence warnings
arm64: dts: foundation-v8: add SBSA Generic Watchdog device node
ARM: dts: at91: sama5d2 Xplained: add leds node
ARM: dts: at91: sama5d2 Xplained: add user push button
ARM: dts: at91: sama5d2 Xplained: set pin muxing for usb gadget and usb host
ARM: dts: stm32f429: Enable Ethernet on Eval board
ARM: dts: omap3-sniper: TWL4030 keypad support
Revert "ARM: dts: DRA7: Add dt nodes for PWMSS"
ARM: dts: dm814x: dra62x: Disable wait pin monitoring for NAND
ARM: dts: dm814x: dra62x: Fix NAND device nodes
ARM: dts: stm32f429: Add Ethernet support
ARM: dts: stm32f429: Add system config bank node
ARM: dts: at91: sama5d2: add nand0 and nfc0 nodes
ARM: dts: at91: sama5d2: add dma properties to UART nodes
ARM: dts: at91: sama5d2 Xplained: Correct the macb irq pinctrl node
ARM: dts: exynos: Don't overheat the Odroid XU3-Lite on high load
ARM: dts: exynos: Add cooling levels for Exynos5422/5800 CPUs
...
Add AVE0, DFT, GP0, GP1, GP2, SLIM, SMI, TEC, DPI, CAM0, CAM1, DSI0E,
and DSI1E. PULSE is not added because it has an extra divider.
Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Eric Anholt <eric@anholt.net>
Enable the PCM clock in the SOC, which is used by the
bcm2835-i2s driver.
Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Eric Anholt <eric@anholt.net>
As the use of BCM2835_CLOCK_COUNT in
include/dt-bindings/clock/bcm2835.h is frowned upon as
it needs to get modified every time a new clock gets introduced
this patch changes the clk-bcm2835 driver to use a different
scheme for registration of clocks and pll, so that there
is no more need for BCM2835_CLOCK_COUNT to be defined.
Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Eric Anholt <eric@anholt.net>
Suitable PLLs for the emac on the rk3036 are difficult to find
and one of them is the (continuously changing) APLL. So in most
cases it will be necessary to select a PLL manually.
So add a clock-id for it.
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Cc: Xing Zheng <zhengxing@rock-chips.com>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: linux-clk@vger.kernel.org
Cc: linux-rockchip@lists.infradead.org
Signed-off-by: David S. Miller <davem@davemloft.net>
Add the node-id for the emac hclk to the binding header.
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Cc: Xing Zheng <zhengxing@rock-chips.com>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: linux-clk@vger.kernel.org
Cc: linux-rockchip@lists.infradead.org
Signed-off-by: David S. Miller <davem@davemloft.net>
fixes for missing error-handling in mmc-phase, inverters and cpu-clocks
and some more clock-ids.
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Merge tag 'v4.6-rockchip-clk2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next
Pull second batch of rockchip clk updates from Heiko Stuebner:
Inclusion of the rk3368 fractional dividers into our handling scheme,
fixes for missing error-handling in mmc-phase, inverters and cpu-clocks
and some more clock-ids.
* tag 'v4.6-rockchip-clk2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
clk: rockchip: include downstream muxes into fractional dividers on rk3368
clk: rockchip: set the clock ids for RK3228 HDMI
clk: rockchip: set the clock ids for RK3228 VOP
clk: rockchip: add the tsadc clocks found on rk3228 SoCs
clk: rockchip: add the new clock ids for RK3228 HDMI
clk: rockchip: add the new clock ids for RK3228 VOP
clk: rockchip: add id of the tsadc clock found on rk3228 SoCs
clk: rockchip: fix coding style for clk-cpu.c
clk: rockchip: don't return NULL when registering mmc branch fails
clk: rockchip: don't return NULL when registering inverter fails
clk: rockchip: check grf when waiting pll lock
clk: rockchip: disable alt_parent clk in err cases when registering cpuclk
Pull i.MX clk updates from Shawn Guo:
The i.MX clock update for 4.6:
- Add the clock driver support for the latest i.MX6 family SoCs
addition - i.MX6QP.
- Clean up the whitespace in i.MX6UL clock driver and add the missing
KPP clock.
- Correct pwm7 clock name in i.MX6UL clock driver.
* tag 'imx-clk-4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
clk: imx: add kpp clock for i.MX6UL
clk: imx: whitespace cleanup; no functional change
clk: imx: correct pwm7 clock name in driver for i.MX6UL
clk: imx: Add clock support for imx6qp
Add the necessary clock to use the KPP interface on i.MX6UL.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
There are four clocks that vop module would need to operate:
DCLK_VOP, HCLK_VOP, SCLK_VOP, ACLK_VOP,
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This patch adds 'SCLK_TSADC' and 'PCLK_TSADC' id found on rk3228 SoCs.
That will be needed by TSADC controller.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Acked-by: Michael Turquette <mturquette@baylibre.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
clocks definition, dropping read-only registers
from the suspend/resume register save/restore list
and exposition of two clocks required for the
exynos5433 HDMI subsystem operation.
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Merge tag 'clk-samsung-4.6' of git://linuxtv.org/snawrocki/samsung into clk-next
Pull Samsung clk driver changes from Sylwester Nawrocki:
Mostly correction of errors in the exynos5433 SoC
clocks definition, dropping read-only registers
from the suspend/resume register save/restore list
and exposition of two clocks required for the
exynos5433 HDMI subsystem operation.
* tag 'clk-samsung-4.6' of git://linuxtv.org/snawrocki/samsung:
clk: samsung: exynos5433: Fix wrong registers of PCLK_GSCL_SMMU clocks
clk: samsung: exynos5433: Fix mout_aclk_cam1*_user clocks definition
clk: samsung: exynos5433: Drop RO registers from the save/restore lists
clk: samsung: exynos5433: Fix definitions of SCLK ISP SENSOR0 clocks
clk: samsung: exynos5433: Fix definitions of MUX_SEL_CAM04 clocks
clk: samsung: exynos5433: Fix typos in *_ISP_MPWM clock names
clk/samsung: exynos5433: add pclk_decon clock
clk/samsung: exynos5433: add definitions of HDMI-PHY output clocks
This patch adds support for the global clock controller found on
the IPQ4019 based devices. This includes UART, I2C, SPI etc.
Signed-off-by: Pradeep Banavathi <pradeepb@codeaurora.org>
Signed-off-by: Senthilkumar N L <snlakshm@codeaurora.org>
Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
Acked-by: Andy Gross <andy.gross@linaro.org>
[sboyd@codeaurora.org: Drop 0x16024 enable_reg in crypto_ahb]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* Use SCIF and USBHS fallback compatibility strings
* Add Baud Rate Generator (BRG) support for (H)SCIF
* Enable SCIF_CLK frequency and pins
* Use GIC_* defines
* Enable audio on r8a7793/gose
* Enable HDMI vidio out on r8a7793
* Enable i2c on r8a7793/gose
* Enable QSPI on alt
* Enable GPIO keys and leds on gise
* Enable audio on porter
* Enable DU on porter
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Merge tag 'renesas-dt-for-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Renesas ARM Based SoC DT Updates for v4.6
* Use SCIF and USBHS fallback compatibility strings
* Add Baud Rate Generator (BRG) support for (H)SCIF
* Enable SCIF_CLK frequency and pins
* Use GIC_* defines
* Enable audio on r8a7793/gose
* Enable HDMI vidio out on r8a7793
* Enable i2c on r8a7793/gose
* Enable QSPI on alt
* Enable GPIO keys and leds on gise
* Enable audio on porter
* Enable DU on porter
* tag 'renesas-dt-for-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (68 commits)
ARM: dts: silk: Enable SCIF_CLK frequency and pins
ARM: dts: porter: Enable SCIF_CLK frequency and pins
ARM: dts: marzen: Enable SCIF_CLK frequency and pins
ARM: dts: lager: Enable SCIF_CLK frequency and pins
ARM: dts: koelsch: Enable SCIF_CLK frequency and pins
ARM: dts: gose: Enable SCIF_CLK frequency and pins
ARM: dts: bockw: Enable SCIF_CLK frequency and pins
ARM: dts: alt: Enable SCIF_CLK frequency and pins
ARM: dts: r8a7794: Add BRG support for (H)SCIF
ARM: dts: r8a7793: Add BRG support for SCIF
ARM: dts: r8a7791: Add BRG support for (H)SCIF
ARM: dts: r8a7790: Add BRG support for (H)SCIF
ARM: dts: r8a7779: Add BRG support for SCIF
ARM: dts: r8a7778: Add BRG support for SCIF
ARM: dts: r8a7794: Rename the serial port clock to fck
ARM: dts: r8a7793: Rename the serial port clock to fck
ARM: dts: r8a7791: Rename the serial port clock to fck
ARM: dts: r8a7790: Rename the serial port clock to fck
ARM: dts: r8a7779: Rename the serial port clock to fck
ARM: dts: r8a7778: Rename the serial port clock to fck
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Add the EtherAVB clock to the R8A7794 device tree.
Based on the commit eaa870b305 ("ARM: shmobile: r8a7791: add EtherAVB
clock").
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
to be able to also declare factor clocks in their correct
place in the clock tree instead of having to register factor
clocks in the init callback separately. And as always some more
clock-ids and non-regression fixes for mistakes introduced in
past kernel releases.
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Merge tag 'v4.6-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next
Introduction of a factor type and a variant containing a gate
to be able to also declare factor clocks in their correct
place in the clock tree instead of having to register factor
clocks in the init callback separately. And as always some more
clock-ids and non-regression fixes for mistakes introduced in
past kernel releases.
most of the clock tree structures on i.MX6 Quad Plus are
same as on i.MX6Q. there still some differences between
these two SOCs. compared to the i.XM6Q, the differents of
clocks on i.MX6QP is mainly on:
1. New clock gate added to support the PRE and PRG modules
2. 24MHz OSC clock option added to the UART, IPG, ECSPI, and
CAN clock roots.
3. MMDC channel 1 clock gate is now controllable.
4. clock gating added to the LDB_DIx_IPU clocks on i.MX6QP
5. EMI clock root divider fix
6. other updates fo CSCMRx, CSCDRx and CS2CDR registers.
detailed infomation, please refer to the i.MX6QP RM.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add all gdsc data which are part of mmcc on msm8996 family
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Add all data for the GDSCs which are part of msm8996 GCC block
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
This patch add the support to setup the HCLK PLL output
using the "assigned-clock-rates" parameter in the device tree.
If the option is not use, the clock setup by the kickstart
and/or bootloader remain unchanged.
The previous kernel version did not change the clock frequency
output setup by the kickstart and/or bootloader;
this version always setup the clock frequency output to 208MHz.
Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* clk-fixes:
clk: tegra: super: Fix sparse warnings for functions not declared as static
clk: tegra: Fix sparse warnings for functions not declared as static
clk: tegra: Fix sparse warning for pll_m
clk: tegra: Use definition for pll_u override bit
clk: tegra: Fix warning caused by pll_u failing to lock
clk: tegra: Fix clock sources for Tegra210 EMC
clk: tegra: Add the APB2APE audio clock on Tegra210
clk: tegra: Add missing of_node_put()
clk: tegra: Fix PLLE SS coefficients
clk: tegra: Fix typos around clearing PLLE bits during enable
clk: tegra: Do not disable PLLE when under hardware control
clk: tegra: Fix pllx dyn step calculation
clk: tegra: pll: Fix potential sleeping-while-atomic
clk: tegra: Fix the misnaming of nvenc from msenc
clk: tegra: Fix naming of MISC registers
clk: tegra: Remove improper flags for lock_enable
clk: tegra: Fix divider on VI_I2C
This undocumented gate clock is used by DECON IP.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
HDMI driver must re-parent respective muxes during HDMI-PHY on/off
to HDMI-PHY output clocks. To reference those clocks their
definitions should be added.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
The APB2APE clock for the audio subsystem is required for powering up the
audio power domain and accessing the various modules in this subsystem on
Tegra210 devices. Add this clock for Tegra210.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This clock is required for loading the qdsp firmware.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
This patch adds support for Broadcom Cygnus audio PLL and leaf
clocks
Signed-off-by: Simran Rai <ssimran@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Ray Jui <rjui@broadcom.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Instantiate MSTP10 clocks in r8a7793 device tree.
Based on similar work for the r8a7791 by Kuninori Morimoto.
Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch adds new id for the sclk supplying the tsadc on rk3066 socs.
Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
As usual, the bulk of this release is again DT file contents.
There's a huge number of changes here, and it's challenging to give a crisp
overview of just what is in here. To start with:
New boards:
- TI-based DM3730 from LogicPD (Torpedo)
- Cosmic+ M4 (nommu) initial support (Freescale Vybrid)
- Raspberry Pi 2 DT files
- Watchdog on Meson8b
- Veyron-mickey (ASUS Chromebit) DTS
- Rockchip rk3228 SoC and eval board
- Sigma Designs Tango4
Improvements:
- Improved support for Qualcomm APQ8084, including Sony Xperia Z DT files
- Misc new devices for Rockchip rk3036 and rk3288
- Allwinner updates for misc SoCs and systems
... and a _large_ number of other changes across the field. Devices
added to SoC DTSI and board DTS files for a number of SoC vendors, new
product boards on already-supported SoCs, cleanups and refactorings of
existing DTS/DTSI files and a bunch of other changes.
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM DT updates from Olof Johansson:
"As usual, the bulk of this release is again DT file contents.
There's a huge number of changes here, and it's challenging to give a
crisp overview of just what is in here. To start with:
New boards:
- TI-based DM3730 from LogicPD (Torpedo)
- Cosmic+ M4 (nommu) initial support (Freescale Vybrid)
- Raspberry Pi 2 DT files
- Watchdog on Meson8b
- Veyron-mickey (ASUS Chromebit) DTS
- Rockchip rk3228 SoC and eval board
- Sigma Designs Tango4
Improvements:
- Improved support for Qualcomm APQ8084, including Sony Xperia Z DT files
- Misc new devices for Rockchip rk3036 and rk3288
- Allwinner updates for misc SoCs and systems
... and a _large_ number of other changes across the field. Devices
added to SoC DTSI and board DTS files for a number of SoC vendors, new
product boards on already-supported SoCs, cleanups and refactorings of
existing DTS/DTSI files and a bunch of other changes"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (469 commits)
ARM: dts: compulab: add new board description
ARM: versatile: add the syscon LEDs to the DT
dts: vt8500: Fix errors in SDHC node for WM8505
ARM: dts: imx6q: clean up unused ipu2grp
ARM: dts: silk: Add compatible property to "partitions" node
ARM: dts: gose: Add compatible property to "partitions" node
ARM: dts: porter: Add compatible property to "partitions" node
ARM: dts: koelsch: Add compatible property to "partitions" node
ARM: dts: lager: Add compatible property to "partitions" node
ARM: dts: bockw: Add compatible property to "partitions" node
ARM: dts: meson8b: Add watchdog node
Documentation: watchdog: Add new bindings for meson8b
ARM: meson: Add status LED for Odroid-C1
ARM: dts: uniphier: fix a typo in comment block
ARM: bcm2835: Add the auxiliary clocks to the device tree.
ARM: bcm2835: Add devicetree for bcm2836 and Raspberry Pi 2 B
ARM: bcm2835: Move the CPU/peripheral include out of common RPi DT.
ARM: bcm2835: Split the DT for peripherals from the DT for the CPU
ARM: realview: set up cache correctly on the PB11MPCore
ARM: dts: Unify G2D device node with other devices on exynos4
...
This set of changes adds support for the Tegra210 SoC and contains a
couple fixes and cleanups.
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Merge tag 'tegra-for-4.5-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into clk-next
clk: tegra: Changes for v4.5-rc1
This set of changes adds support for the Tegra210 SoC and contains a
couple fixes and cleanups.
1. eMMC/SDIO minor fixes usage of bindings on Snow and Peach
Chromebooks.
2. Remove FIMD from Odroid XU3-family because on XU3 it cannot be used
yet and on XU3-Lite and XU4 it is not supported.
3. Remove deprecated since June 2013 samsung,exynos5-hdmi.
4. Add support for Pseudo Random Generator on Exynos4 (Trats2 for now).
This depends on new SSS clock.
5. Add rotator nodes for Exynos4 and Exynos5.
6. Switch DWC3_1 on Odroid XU3 and XU3-Lite to peripheral mode because
now it cannot be used as OTG.
7. Cleanup the G2D usage on Exynos4 and add it to a proper domain
in case of Exynos4210.
8. Put MDMA1 in proper domain on Exynos4210 as well.
9. Minor cleanups.
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Merge tag 'samsung-dt-4.5-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt
Merge "Samsung DeviceTree updates and improvements for 4.5" from Krzysztof Kozlowski:
1. eMMC/SDIO minor fixes usage of bindings on Snow and Peach
Chromebooks.
2. Remove FIMD from Odroid XU3-family because on XU3 it cannot be used
yet and on XU3-Lite and XU4 it is not supported.
3. Remove deprecated since June 2013 samsung,exynos5-hdmi.
4. Add support for Pseudo Random Generator on Exynos4 (Trats2 for now).
This depends on new SSS clock.
5. Add rotator nodes for Exynos4 and Exynos5.
6. Switch DWC3_1 on Odroid XU3 and XU3-Lite to peripheral mode because
now it cannot be used as OTG.
7. Cleanup the G2D usage on Exynos4 and add it to a proper domain
in case of Exynos4210.
8. Put MDMA1 in proper domain on Exynos4210 as well.
9. Minor cleanups.
* tag 'samsung-dt-4.5-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (21 commits)
ARM: dts: Unify G2D device node with other devices on exynos4
ARM: dts: Add power domain to G2D device on exynos4210
ARM: dts: MDMA1 device belongs to LCD0 power domain on exynos4210
ARM: dts: Remove unneeded GPIO include in exynos4412-odroidu3
ARM: dts: exynos4210-universal_c210: Disable DMA for UARTs
ARM: dts: Use peripheral mode for dwc3_1 on exynos5422-odroidxu3
ARM: dts: Add rotator node on exynos5420
ARM: dts: Add rotator node on exynos5250
ARM: dts: Fix power domain for sysmmu-rotator device on exynos4
ARM: dts: Add rotator nodes on exynos4
ARM: dts: Enable PRNG module on exynos4412-trats2
ARM: dts: Add PRNG module for exynos4
dt-bindings: remove deprecated compatible string from exynos-hdmi
ARM: dts: Remove fimd node from exynos5422-odroidxu3-common
ARM: dts: Mark eMMC as non-removable in exynos5250-snow-common
ARM: dts: Remove broken-cd from eMMC node in exynos5420-peach-pi
ARM: dts: Remove broken-cd from eMMC node in exynos5800-peach-pi
ARM: dts: Mark SDIO as non-removable in exynos5250-snow-common
ARM: dts: Mark SDIO as non-removable in exynos5420-peach-pit
ARM: dts: Mark SDIO as non-removable in exynos5800-peach-pi
...
Register the pwm clock for bcm2835.
Signed-off-by: Remi Pommarel <repk@triplefau.lt>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
The change adds a list of NXP LPC32xx clocks, which can be requested
by clock consumers.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
These will be used for enabling UART1, SPI1, and SPI2.
Signed-off-by: Eric Anholt <eric@anholt.net>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
- New boards support: imx51-ts4800, imx6q-novena, CompuLab imx7d SoM/SBC,
vf610m4-cosmic
- Add ADC device support for imx6ul and imx7d
- Remove config space from PCIe controller ranges property for i.MX6
- Add Vivante GPU nodes for i.MX6
- Add DCU, LCD, and SATA devices for LS1021A
- A series to update Ventana gw5xxx boards getting HDMI and LVDS to work
simultaneously and devices like PWM and SPI added
- Quite a few random cleanups and minor updates
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Merge tag 'imx-dt-4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt
The i.MX device tree updates for 4.5:
- New boards support: imx51-ts4800, imx6q-novena, CompuLab imx7d SoM/SBC,
vf610m4-cosmic
- Add ADC device support for imx6ul and imx7d
- Remove config space from PCIe controller ranges property for i.MX6
- Add Vivante GPU nodes for i.MX6
- Add DCU, LCD, and SATA devices for LS1021A
- A series to update Ventana gw5xxx boards getting HDMI and LVDS to work
simultaneously and devices like PWM and SPI added
- Quite a few random cleanups and minor updates
* tag 'imx-dt-4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (50 commits)
ARM: dts: imx7d: sbc-imx7: add basic board support
ARM: dts: imx7d: cl-som-imx7: add basic module support
ARM: dts: TS-4800: add touchscreen support
ARM: dts: ts-4800: Add LCD support
ARM: dts: imx6q: add Novena board
devicetree: bindings: Add vendor prefix for Kosagi
ARM: dts: TS-4800: use weim IP to map the FPGA
ARM: dts: TS-4800: drop uart rts/cts pin reservations
ARM: dts: imx6: add Vivante GPU nodes
ARM: dts: imx28: add alternate auart4 pinmux
ARM: dts: ls1021a: add sata node to dts
ARM: dts: TS-4800: add basic device tree
of: documentation: add bindings documentation for TS-4800
of: add vendor prefix for Technologic Systems
ARM: dts: imx7d-sdb: add ADC support
ARM: dts: imx7d.dtsi: add ADC support
ARM: dts: vf-colibri: add CAN support
ARM: mxs: dt: cfa10057: fix backlight PWM
ARM: dts: imx6qdl: move GIC to right location in DT
ARM: dts: imx6qdl: add IPU aliases
...
Signed-off-by: Olof Johansson <olof@lixom.net>
support for the efuses on Rockchip socs and some improvements for
rk3288 regulators.
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Merge tag 'v4.5-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
Another new soc - the rk3228 quad-core cortex-a7, a new rk3036 board,
support for the efuses on Rockchip socs and some improvements for
rk3288 regulators.
* tag 'v4.5-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: add the kylin board for rk3036
ARM: dts: rockchip: add the sdio/sdmmc node for rk3036
ARM: dts: rockchip: fix the pinctrl bias settings for rk3036
ARM: dts: rockchip: add eFuse node for rk3188 SoCs
ARM: dts: rockchip: add eFuse node for rk3066a SoCs
ARM: dts: rockchip: add eFuse config of rk3288 SoC
ARM: dts: rockchip: add rk3228-evb board
ARM: dts: rockchip: add core rk3228 dtsi
clk: rockchip: Add the clock ids of rk3288 eFuses
ARM: dts: rockchip: Fix typo in rk3288 sdmmc card detect pin name
ARM: dts: rockchip: fix voltage ranges for rk3288-evb-act8846 board
ARM: dts: rockchip: move the public part to rk3288-evb common
ARM: dts: rockchip: add 2 regulators for rk3288-evb-act8846
ARM: dts: rockchip: correct the name of REG8 for rk3288-evb-act8846
clk: rockchip: add dt-binding header for rk3228
clk: rockchip: add id for mipidsi sclk on rk3288
Signed-off-by: Olof Johansson <olof@lixom.net>
* Use SoC-specific usb-dmac and IPMMU compatibility strings
* Add internal delay for i2c IPs
* Add missing serial devices to r8a7793
* Enable DMA for r8a7793 serial devices
* Add serial port config to chosen/stdout-path
* Tidyup #sound-dai-cells settings for r8a7798/bockw
* Remove deprecated #gpio-range-cells from r8a7793
* Add EtherAVB support to r8a7791
* Add MSIOF support to sh73a0
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Merge tag 'renesas-dt3-for-v4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Third Round of Renesas ARM Based SoC DT Updates for v4.5
* Use SoC-specific usb-dmac and IPMMU compatibility strings
* Add internal delay for i2c IPs
* Add missing serial devices to r8a7793
* Enable DMA for r8a7793 serial devices
* Add serial port config to chosen/stdout-path
* Tidyup #sound-dai-cells settings for r8a7798/bockw
* Remove deprecated #gpio-range-cells from r8a7793
* Add EtherAVB support to r8a7791
* Add MSIOF support to sh73a0
* tag 'renesas-dt3-for-v4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (25 commits)
ARM: shmobile: r8a779x: use SoC-specific usb-dmac compatibility strings
ARM: shmobile: r8a7794: IPMMU compat string SoC part number update
ARM: shmobile: r8a7793: IPMMU compat string SoC part number update
ARM: shmobile: r8a7791: IPMMU compat string SoC part number update
ARM: shmobile: r8a7790: IPMMU compat string SoC part number update
ARM: shmobile: r8a7794: dtsi: add internal delay for i2c IPs
ARM: shmobile: r8a7791: dtsi: add internal delay for i2c IPs
ARM: shmobile: r8a7790: dtsi: add internal delay for i2c IPs
ARM: shmobile: r8a7793: Describe DMA for the serial ports
ARM: shmobile: r8a7793: Add missing serial devices to DT
ARM: shmobile: lager dts: Add serial port config to chosen/stdout-path
ARM: shmobile: porter dts: Add serial port config to chosen/stdout-path
ARM: shmobile: silk dts: Add serial port config to chosen/stdout-path
ARM: shmobile: gose dts: Add serial port config to chosen/stdout-path
ARM: shmobile: bockw dts: Update console parameters
ARM: shmobile: ape6evm dts: Add serial port config to chosen/stdout-path
ARM: shmobile: alt dts: Add serial port config to chosen/stdout-path
ARM: shmobile: koelsch dts: Add serial port config to chosen/stdout-path
ARM: shmobile: r8a7778: tidyup #sound-dai-cells settings
ARM: shmobile: bockw dts: Override #sound-dai-cells to zero
...
Signed-off-by: Olof Johansson <olof@lixom.net>
drivers/clk/samsung updates (mostly bug fixes):
- instantiation of the cpu clocks and addition of the GSCL
IP parent clocks to the list of available consumer clocks
for exynos542x SoCs;
- MFC IP parent clock fix for exynos542x;
- fix of locking bug in samsung/clk-cpu.c which caused
system crashes with cpufreq enabled;
- minor cleanup for s3c2410.
The i.MX clock updates for 4.5:
- Add is_prepared function callback for pllv3 clock driver
- Use imx_check_clocks() on imx6ul and imx7d clock drivers to save
some code
- Add a core clock for imx7d to support generic cpufreq driver
- Support imx6q clock routing with OSC to anaclk2/2b
- To support more precise pixel clocks on imx5, allow ipu_di_sel clock
selectors to influence the PLLs that they are derived from
- A cleanup on imx25 OSC clock
Rockchip clock changes for 4.5 containing
- a new pll-type used on rk3036 and other Cortex-A7 socs
- new clock-trees for rk3036 and rk3228
- switch rk3288 plls to slow mode on reboot
- a bunch of new clock ids
- some more critical clocks
- wrong register offsets for the rk3368 cpuclks
- allowing more than 2 parents for the cpuclk
With the addition of the new Samsung specific cpu-clock type, the
arm clock can be represented as a cpu-clock type. Add the CPU clock
configuration data and instantiate the CPU clock type for Exynos5420.
Changes by Bartlomiej:
- split Exynos5420 support from the original patches
- moved E5420_[EGL,KFC]_DIV0() macros to clk-exynos5420.c
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
This patch adds clocks, which are required for preserving parent clock
configuration on GSCL power domain on/off.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Add clock-ids for the two efuse blocks of the rk3288.
Signed-off-by: ZhengShunQian <zhengsq@rock-chips.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Among the bigger changes are two new Veyron boards, support for
the dual-core cortex-a7 rk3036 soc and addition of support for
the crypto engine of the rk3288. Smaller changes include some
IR receivers, updates of thermal settings more reflecting real-
life and testing-results.
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Merge tag 'v4.5-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
Merge "rockchip dts32 changes for 4.5" from Heiko Stuebner:
First round of arm devicetree changes.
Among the bigger changes are two new Veyron boards, support for
the dual-core cortex-a7 rk3036 soc and addition of support for
the crypto engine of the rk3288. Smaller changes include some
IR receivers, updates of thermal settings more reflecting real-
life and testing-results.
* tag 'v4.5-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: add gpio-ir-receiver to the R89 board
ARM: dts: rockchip: add touchscreen node to veyron minnie
ARM: dts: rockchip: add veyron-mickey board
ARM: dts: rockchip: add veyron-brain board
ARM: dts: rockchip: make sure edp_24m is associated to xin24m on veyron
ARM: dts: rockchip: override thermal settings on veyron-speedy
ARM: dts: rockchip: update the thermal management on rk3288
ARM: dts: rockchip: Add Crypto node for rk3288
ARM: dts: rockchip: add rk3036-evb board
ARM: dts: rockchip: add core rk3036 dtsi
clk: rockchip: add dt-binding header for rk3036
clk: rockchip: add an id for rk3288 crypto clk
ARM: dts: rockchip: Add IR receiver to RK3288 Radxa Rock 2 Square
ARM: dts: rockchip: add channels properties for i2s
ARM: dts: rockchip: set system-power-controller property on rk3288-rock2
ARM: dts: rockchip: Setup rk3066/rk3188 ethernet0 alias for u-boot
ARM: dts: rockchip: Setup rk3288 ethernet0 alias for u-boot
* henninger: Remove as it is now replaced by silk
* koelsch: Move SPI partitions to subnode
* porter: Add CAN0 and HS-USB support
* r8a7793/gose: Add QSPI, PFC support
* r8a7793: Add GPIO, DMAC, theral, IPMMU support
* r8a7794/alt: Add DU support
* r8a7794: Disable all IPMMU nodes by default
* r8a779[0134]: Use Use SoC specific binding for rcar-dmac
* r8a779[01], r8a73a4, r8a7740, sh73a0: replace gpio-key, wakeup with
wakeup-source property
* r8a779[14]: Correct "gpio-ranges" properties
* r8a779[14]: Remove bogus imp_clk node
* silk: Add SDHI1 support
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Merge tag 'renesas-dt-for-v4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Merge "Renesas ARM Based SoC DT Updates for v4.5" from Simon Horman:
* henninger: Remove as it is now replaced by silk
* koelsch: Move SPI partitions to subnode
* porter: Add CAN0 and HS-USB support
* r8a7793/gose: Add QSPI, PFC support
* r8a7793: Add GPIO, DMAC, theral, IPMMU support
* r8a7794/alt: Add DU support
* r8a7794: Disable all IPMMU nodes by default
* r8a779[0134]: Use Use SoC specific binding for rcar-dmac
* r8a779[01], r8a73a4, r8a7740, sh73a0: replace gpio-key, wakeup with
wakeup-source property
* r8a779[14]: Correct "gpio-ranges" properties
* r8a779[14]: Remove bogus imp_clk node
* silk: Add SDHI1 support
* tag 'renesas-dt-for-v4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (29 commits)
ARM: shmobile: alt: add VIN0, ADV7180 DT support
ARM: shmobile: alt: add I2C1 DT support
ARM: shmobile: alt: Add pfc pins to DT
ARM: shmobile: r8a7794: Use SoC specific binding for rcar-dmac nodes
ARM: shmobile: r8a7793: Use SoC specific binding for rcar-dmac nodes
ARM: shmobile: r8a7791: Use SoC specific binding for rcar-dmac nodes
ARM: shmobile: r8a7790: Use SoC specific binding for rcar-dmac nodes
ARM: shmobile: r8a7793: Add GPIO nodes to device tree
ARM: shmobile: r8a7794: alt: Enable VGA port
ARM: shmobile: r8a7794: Add DU node to device tree
ARM: shmobile: r8a7794: Add DU0 clock
ARM: shmobile: gose: Add QSPI device to DT
ARM: shmobile: r8a7793: Add QSPI device to DT
ARM: shmobile: r8a7793: Add DMAC devices to DT
ARM: shmobile: koelsch: Move SPI FLASH partitions to subnode
ARM: shmobile: gose: Configure PFC in DT
ARM: shmobile: r8a7793: Add PFC to DT
ARM: shmobile: r8a7793: Add thermal device to DT
ARM: shmobile: henninger: remove board DT
ARM: shmobile: porter: add CAN0 DT support
...
Add the dt-bindings header for the rk3228, that gets shared between
the clock controller and the clock references in the dts.
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add the EtherAVB clock to the R8A7791 device tree.
Based on the commit 63d2d750c9 ("ARM: shmobile: r8a7790: add EtherAVB
clocks").
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a virtual arm clk to abstract the actual steps
when changing the ARM core frequency.So we can using
the 'cpufreq-dt' driver on i.MX7D/Solo.
Signed-off-by: Bai Ping <b51503@freescale.com>
Acked-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The 4 MSIOF clocks are MSTP clocks, and children of the SUB clock.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a driver for the multimedia clock controller found on MSM8996
based devices. This should allow most multimedia device drivers
to probe and control their clocks.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Add support for the global clock controller found on MSM8996
based devices. This should allow most non-multimedia device
drivers to probe and control their clocks.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Adds a new id for the sclk supplying the mipidsi on rk3288 socs.
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add the dt-bindings header for the rk3036, that gets shared between
the clock controller and the clock references in the dts.
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add an id for crypto clk to the binding header, so that it can be called
in other part.
Signed-off-by: Zain Wang <zain.wang@rock-chips.com>
Acked-by: Michael Turquette <mturquette@baylibre.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add a gate clock for controlling all clocks of Security Sub System
(SSS).
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
The DU0 clock is an MSTP clock, child of the CPG ZX clock.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a header file that defines the clock numbers for Tegra210. It is
meant to be included by device trees so that they can refer to the
clocks by symbolic name instead of numeric value.
Also add the device tree binding documentation which is largely the
same as for earlier generations of Tegra.
Extracted from a larger patch by Rhyland Klein <rklein@nvidia.com>.
Signed-off-by: Thierry Reding <treding@nvidia.com>
As usual, this is the massive branch we have for each release. Lots of
various updates and additions of hardware descriptions on existing hardware,
as well as the usual additions of new boards and SoCs.
This is also the first release where we've started mixing 64- and 32-bit
DT updates in one branch.
(Specific details on what's actually here and new is pretty easy to tell
from the diffstat, so there's little point in duplicating listing it here.)
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM DT updates from Olof Johansson:
"As usual, this is the massive branch we have for each release. Lots
of various updates and additions of hardware descriptions on existing
hardware, as well as the usual additions of new boards and SoCs.
This is also the first release where we've started mixing 64- and
32-bit DT updates in one branch.
(Specific details on what's actually here and new is pretty easy to
tell from the diffstat, so there's little point in duplicating listing
it here)"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (499 commits)
ARM: dts: uniphier: add system-bus-controller nodes
ARM64: juno: disable NOR flash node by default
ARM: dts: uniphier: add outer cache controller nodes
arm64: defconfig: Enable PCI generic host bridge by default
arm64: Juno: Add support for the PCIe host bridge on Juno R1
Documentation: of: Document the bindings used by Juno R1 PCIe host bridge
ARM: dts: uniphier: add I2C aliases for ProXstream2 boards
dts/Makefile: Add build support for LS2080a QDS & RDB board DTS
dts/ls2080a: Add DTS support for LS2080a QDS & RDB boards
dts/ls2080a: Update Simulator DTS to add support of various peripherals
dts/ls2080a: Remove text about writing to Free Software Foundation
dts/ls2080a: Update DTSI to add support of various peripherals
doc: DTS: Update DWC3 binding to provide reference to generic bindings
doc/bindings: Update GPIO devicetree binding documentation for LS2080A
Documentation/dts: Move FSL board-specific bindings out of /powerpc
Documentation: DT: Add entry for FSL LS2080A QDS and RDB boards
arm64: Rename FSL LS2085A SoC support code to LS2080A
arm64: Use generic Layerscape SoC family naming
ARM: dts: uniphier: add ProXstream2 Vodka board support
ARM: dts: uniphier: add ProXstream2 Gentil board support
...
As we've enabled multiplatform kernels on ARM, and greatly done away with
the contents under arch/arm/mach-*, there's still need for SoC-related
drivers to go somewhere.
Many of them go in through other driver trees, but we still have
drivers/soc to hold some of the "doesn't fit anywhere" lowlevel code
that might be shared between ARM and ARM64 (or just in general makes
sense to not have under the architecture directory).
This branch contains mostly such code:
- Drivers for qualcomm SoCs for SMEM, SMD and SMD-RPM, used to communicate
with power management blocks on these SoCs for use by clock, regulator and
bus frequency drivers.
- Allwinner Reduced Serial Bus driver, again used to communicate with PMICs.
- Drivers for ARM's SCPI (System Control Processor). Not to be confused with
PSCI (Power State Coordination Interface). SCPI is used to communicate with
the assistant embedded cores doing power management, and we have yet to see
how many of them will implement this for their hardware vs abstracting in
other ways (or not at all like in the past).
- To make confusion between SCPI and PSCI more likely, this release also
includes an update of PSCI to interface version 1.0.
- Rockchip support for power domains.
- A driver to talk to the firmware on Raspberry Pi.
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Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Olof Johansson:
"As we've enabled multiplatform kernels on ARM, and greatly done away
with the contents under arch/arm/mach-*, there's still need for
SoC-related drivers to go somewhere.
Many of them go in through other driver trees, but we still have
drivers/soc to hold some of the "doesn't fit anywhere" lowlevel code
that might be shared between ARM and ARM64 (or just in general makes
sense to not have under the architecture directory).
This branch contains mostly such code:
- Drivers for qualcomm SoCs for SMEM, SMD and SMD-RPM, used to
communicate with power management blocks on these SoCs for use by
clock, regulator and bus frequency drivers.
- Allwinner Reduced Serial Bus driver, again used to communicate with
PMICs.
- Drivers for ARM's SCPI (System Control Processor). Not to be
confused with PSCI (Power State Coordination Interface). SCPI is
used to communicate with the assistant embedded cores doing power
management, and we have yet to see how many of them will implement
this for their hardware vs abstracting in other ways (or not at all
like in the past).
- To make confusion between SCPI and PSCI more likely, this release
also includes an update of PSCI to interface version 1.0.
- Rockchip support for power domains.
- A driver to talk to the firmware on Raspberry Pi"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (57 commits)
soc: qcom: smd-rpm: Correct size of outgoing message
bus: sunxi-rsb: Add driver for Allwinner Reduced Serial Bus
bus: sunxi-rsb: Add Allwinner Reduced Serial Bus (RSB) controller bindings
ARM: bcm2835: add mutual inclusion protection
drivers: psci: make PSCI 1.0 functions initialization version dependent
dt-bindings: Correct paths in Rockchip power domains binding document
soc: rockchip: power-domain: don't try to print the clock name in error case
soc: qcom/smem: add HWSPINLOCK dependency
clk: berlin: add cpuclk
ARM: berlin: dts: add CLKID_CPU for BG2Q
ARM: bcm2835: Add the Raspberry Pi firmware driver
soc: qcom: smem: Move RPM message ram out of smem DT node
soc: qcom: smd-rpm: Correct the active vs sleep state flagging
soc: qcom: smd: delete unneeded of_node_put
firmware: qcom-scm: build for correct architecture level
soc: qcom: smd: Correct SMEM items for upper channels
qcom-scm: add missing prototype for qcom_scm_is_available()
qcom-scm: fix endianess issue in __qcom_scm_is_call_available
soc: qcom: smd: Reject send of too big packets
soc: qcom: smd: Handle big endian CPUs
...
- Support for the Audio PLL and child clocks
- Support for the A33 AHB gates
- New clk-multiplier generic driver
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Merge tag 'sunxi-clocks-for-4.4' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/dt
Bringing in the sunxi clock branch since it introduces header file contents
that is needed by the DT branch. This is a stable tag shared with the clk tree.
Allwinner clock additions for 4.4
- Support for the Audio PLL and child clocks
- Support for the A33 AHB gates
- New clk-multiplier generic driver
* tag 'sunxi-clocks-for-4.4' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
clk: sunxi: mod1 clock support
clk: sunxi: codec clock support
clk: sunxi: pll2: Add A13 support
clk: sunxi: Add a driver for the PLL2
clk: Add a basic multiplier clock
clk: sunxi: Add A33 gates support
Signed-off-by: Olof Johansson <olof@lixom.net>
