leandrof/linux
1
0
Fork 0
forked from Minki/linux
Code Issues Pull Requests Packages Projects Releases Wiki Activity
721,739 Commits 2 Branches 0 Tags 5.1 GiB
9bc01114b1
Commit Graph

1319 Commits

Author SHA1 Message Date
Tero Kristo
9bc01114b1 dt-bindings: clk: add am43xx clkctrl definitions 
Contains offsets for all am43xx clkctrl main and optional clocks.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
 2017-12-01 15:17:28 +02:00
Tero Kristo
172c48c7d1 dt-bindings: clk: add am33xx clkctrl definitions 
Contains offsets for all am33xx clkctrl main and optional clocks.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
 2017-12-01 15:17:23 +02:00
Tero Kristo
ae263d5276 dt-bindings: clk: add dra7 clkctrl definitions 
Contains offsets for all dra7 clkctrl main and optional clocks.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
 2017-12-01 15:17:18 +02:00
Tero Kristo
e11f1d6823 dt-bindings: clk: add omap5 clkctrl definitions 
Contains offsets for all omap5 clkctrl main and optional clocks.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
 2017-12-01 15:17:17 +02:00
Linus Torvalds
c353bfc6eb fixes/cleanups for rc1, non-desktop flags for VR 
-----BEGIN PGP SIGNATURE-----
 
 iQIcBAABAgAGBQJaFkpiAAoJEAx081l5xIa+LOcQAJqXyh7vx++oPe5kJFC2rCoX
 MqX1aJ4nH8y04QJqLmKx1SC6eyYsTM92rcg3RfHOThktzonD5l2wSO9TvCkmLtr9
 2n9P/aYMcbPTZntrbJc4mQyzd82U0D4h40i5Cmhr9n4gcLPOsOpau/7eclyuEUds
 PHZSTCRq0Ygk1K5VWQPyKsY1k1TqFes2YE46FJzkD8SQwKDfbWxVZG0BPnvqb5Om
 PMVobnEukruzpsSqnetaEYsW89e0TJ2TW9MSCfVohzWvyCVGzmwSzqaooqOkgFe2
 5ZrzA4aW6qRez4nXN2Zw+p9qhS4DZ8MVEJO8qczrR6BGx5yRlHriGhs+5FQskGBT
 Idqj6YZX3x/qab/AXQy0fzn2lrZdwxTolG6BgnNOwdGhyFEfz7P7p9kcv4QLbyn5
 8MynMUcLmOkpouHD0mpIwn5kS7EU4hbEPGOeBwxy54FbiLFWb81FjlGts2N+/ckI
 69UlmyyFZrpxvTmL9vRzvGCeO0zdfvKtBa1GoYWbzNTs8r50F2EtdJkS64SYOVOf
 o4ApcG5bznx42NfBwa3TBc+NETTYJPS0blFImPVu1qvdQn5AciX137vYbqzwuqac
 2gM2m6Rdfpncw/3VRIePwXYwpNS/3fsa3V6UgzTFlDhrQCtP2XxKPhfru7pFN+te
 Vav1I46Q8pa7ko8dS3A3
 =P4O6
 -----END PGP SIGNATURE-----

Merge tag 'drm-for-v4.15-part2' of git://people.freedesktop.org/~airlied/linux

Pull more drm updates from Dave Airlie:
 "Fixes/cleanups for rc1, non-desktop flags for VR

   - remove the MSM dt-bindings file Rob managed to push in the previous
     pull.

   - add a property/edid quirk to denote HMD devices, I had these
     hanging around for a few weeks and Keith had done some work on
     them, they are fairly self contained and small, and only affect
     people using HTC Vive VR headsets so far.

   - amdgpu, tegra, tilcdc, fsl fixes

   - some imx-drm cleanups I missed, these seemed pretty small, and no
     reason to hold off.

  I have one TTM regression fix (fixes bochs-vga in qemu) sitting
  locally awaiting review I'll probably send that in a separate pull
  request tomorrow"

* tag 'drm-for-v4.15-part2' of git://people.freedesktop.org/~airlied/linux: (33 commits)
  dt-bindings: remove file that was added accidentally
  drm/edid: quirk HTC vive headset as non-desktop. [v2]
  drm/fb: add support for not enabling fbcon on non-desktop displays [v2]
  drm: add connector info/property for non-desktop displays [v2]
  drm/amdgpu: fix rmmod KCQ disable failed error
  drm/amdgpu: fix kernel hang when starting VNC server
  drm/amdgpu: don't skip attributes when powerplay is enabled
  drm/amd/pp: fix typecast error in powerplay.
  drm/tilcdc: Remove obsolete "ti,tilcdc,slave" dts binding support
  drm/tegra: sor: Reimplement pad clock
  Revert "drm/radeon: dont switch vt on suspend"
  drm/amd/amdgpu: fix over-bound accessing in amdgpu_cs_wait_any_fence
  drm/amd/powerplay: fix unfreeze level smc message for smu7
  drm/amdgpu:fix memleak
  drm/amdgpu:fix memleak in takedown
  drm/amd/pp: fix dpm randomly failed on Vega10
  drm/amdgpu: set f_mapping on exported DMA-bufs
  drm/amdgpu: Properly allocate VM invalidate eng v2
  drm/fsl-dcu: enable IRQ before drm_atomic_helper_resume()
  drm/fsl-dcu: avoid disabling pixel clock twice on suspend
  ...
 2017-11-23 21:04:56 -10:00
Rob Clark
98ecf1a308 dt-bindings: remove file that was added accidentally 
I think this snuck in when I applied the patch for f97decac5f (didn't
apply cleanly, required some manual applying + git-add).  It is unused
and shouldn't be here.  My bad.

Fixes: f97decac5f "drm/msm: Support multiple ringbuffers"
Signed-off-by: Rob Clark <robdclark@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
 2017-11-23 14:10:39 +10:00
Linus Torvalds
fc35c1966e We have two changes to the core framework this time around. The first being a 
large change that introduces runtime PM support to the clk framework. Now we
 properly call runtime PM operations on the device providing a clk when the clk
 is in use. This helps on SoCs where the clks provided by a device need
 something to be powered on before using the clks, like power domains or
 regulators. It also helps power those things down when clks aren't in use. The
 other core change is a devm API addition for clk providers so we can get rid of
 a bunch of clk driver remove functions that are just doing
 of_clk_del_provider().
 
 Outside of the core, we have the usual addition of clk drivers and smattering
 of non-critical fixes to existing drivers. The biggest diff is support for
 Mediatek MT2712 and MT7622 SoCs, but those patches really just add a bunch
 of data.
 
 By the way, we're trying something new here where we build the tree up with
 topic branches. We plan to work this into our workflow so that we don't step
 on each other's toes, and so the fixes branch can be merged on an as-needed
 basis.
 
 Core:
  - Runtime PM support for clk providers
  - devm API for of_clk_add_hw_provider()
 
 New Drivers:
  - Mediatek MT2712 and MT7622
  - Renesas R-Car V3M SoC
 
 Updates:
  - Runtime PM support for Samsung exynos5433/exynos4412 providers
  - Removal of clkdev aliases on Samsung SoCs
  - Convert clk-gpio to use gpio descriptors
  - Various driver cleanups to match kernel coding style
  - Amlogic Video Processing Unit VPU and VAPB clks
  - Sigma-delta modulation for Allwinner audio PLLs
  - Allwinner A83t Display clks
  - Support for the second display unit clock on Renesas RZ/G1E
  - Suspend/resume support for Renesas R-Car Gen3 CPG/MSSR
  - New clock ids for Rockchip rk3188 and rk3368 SoCs
  - Various 'const' markings on clk_ops structures
  - RPM clk support on Qualcomm MSM8996/MSM8660 SoCs
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2.0.22 (GNU/Linux)
 
 iQIcBAABCAAGBQJaD3qRAAoJEK0CiJfG5JUlOLgQAKWekgG/IYgcPzPWDYfg8Hwr
 sVVUK7+q7TVfbHsbYVikJuUaxutKZ0onnrYmOalTTyyxqL2E1/rYScnxdYHfcwX8
 cyfHebRHsbh/Xg45ktwjzBkO49nwuppkpXd/V80GSBUZ+lsIVl5DUrrFAZdRUEdr
 CEsAsF9tEWIl+0gqXYNuiKBV7QAYv5BUPrbJQf0PwL6jX0OAhLv+ukfN8BdmYsOb
 rdoqhdgmyHkTuIMqsC/H2yP59aAKBse7wxIYebDiTdbPWfTkC9q927fTs4A02F6L
 sHfLvCpfuB4rOjXy6LSd1gMGWIcjotZai+idHBqtNLLVz6exF1QpUCp+pZjEULbA
 /Sx9lk8A3cYoa8pTu1NrrZbZX17iHkFswqMF3T20nhUN9+Ti597ZEbRcWDcoEZtw
 v2NznOTJ7Mm2SrNHOvDklstggNIGcwiAEePGMo7rJNEQZChpDjQj/gJWKzn0UwL4
 zfk+0EzoejPdvZ5FJUfmlr8Tqk53uw+y7/0xQ6gf8lDviTrzzoeXtJUyumGBiuGx
 RxFywf8n02oLYRJm5hu+0NkC+/bX0Lxg/kwiR6FLBFbBFgkWyp7FGcxhlm6ZiBfe
 0KkPciWslNavn5KhljIkZDbXymbvhhSr9uBEFsyeJueA5q7sSghWloL8Ag1cac3W
 e6swD1ngXtM/t5gjOLhR
 =hC7z
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "We have two changes to the core framework this time around.

  The first being a large change that introduces runtime PM support to
  the clk framework. Now we properly call runtime PM operations on the
  device providing a clk when the clk is in use. This helps on SoCs
  where the clks provided by a device need something to be powered on
  before using the clks, like power domains or regulators. It also helps
  power those things down when clks aren't in use.

  The other core change is a devm API addition for clk providers so we
  can get rid of a bunch of clk driver remove functions that are just
  doing of_clk_del_provider().

  Outside of the core, we have the usual addition of clk drivers and
  smattering of non-critical fixes to existing drivers. The biggest diff
  is support for Mediatek MT2712 and MT7622 SoCs, but those patches
  really just add a bunch of data.

  By the way, we're trying something new here where we build the tree up
  with topic branches. We plan to work this into our workflow so that we
  don't step on each other's toes, and so the fixes branch can be merged
  on an as-needed basis.

  Summary:

  Core:
   - runtime PM support for clk providers
   - devm API for of_clk_add_hw_provider()

  New Drivers:
   - Mediatek MT2712 and MT7622
   - Renesas R-Car V3M SoC

  Updates:
   - runtime PM support for Samsung exynos5433/exynos4412 providers
   - removal of clkdev aliases on Samsung SoCs
   - convert clk-gpio to use gpio descriptors
   - various driver cleanups to match kernel coding style
   - Amlogic Video Processing Unit VPU and VAPB clks
   - sigma-delta modulation for Allwinner audio PLLs
   - Allwinner A83t Display clks
   - support for the second display unit clock on Renesas RZ/G1E
   - suspend/resume support for Renesas R-Car Gen3 CPG/MSSR
   - new clock ids for Rockchip rk3188 and rk3368 SoCs
   - various 'const' markings on clk_ops structures
   - RPM clk support on Qualcomm MSM8996/MSM8660 SoCs"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (137 commits)
  clk: stm32h7: fix test of clock config
  clk: pxa: fix building on older compilers
  clk: sunxi-ng: a83t: Fix i2c buses bits
  clk: ti: dra7-atl-clock: fix child-node lookups
  clk: qcom: common: fix legacy board-clock registration
  clk: uniphier: fix DAPLL2 clock rate of Pro5
  clk: uniphier: fix parent of miodmac clock data
  clk: hi3798cv200: correct parent mux clock for 'clk_sdio0_ciu'
  clk: hisilicon: Delete an error message for a failed memory allocation in hisi_register_clkgate_sep()
  clk: hi3660: fix incorrect uart3 clock freqency
  clk: kona-setup: Delete error messages for failed memory allocations
  ARC: clk: fix spelling mistake: "configurarion" -> "configuration"
  clk: cdce925: remove redundant check for non-null parent_name
  clk: versatile: Improve sizeof() usage
  clk: versatile: Delete error messages for failed memory allocations
  clk: ux500: Improve sizeof() usage
  clk: ux500: Delete error messages for failed memory allocations
  clk: spear: Delete error messages for failed memory allocations
  clk: ti: Delete error messages for failed memory allocations
  clk: mmp: Adjust checks for NULL pointers
  ...
 2017-11-17 20:04:24 -08:00
Linus Torvalds
cf9b0772f2 ARM: SoC driver updates for v4.15 
This branch contains platform-related driver updates for ARM and ARM64,
 these are the areas that bring the changes:
 
 New drivers:
  - Driver support for Renesas R-Car V3M (R8A77970)
  - Power management support for Amlogic GX
  - A new driver for the Tegra BPMP thermal sensor
  - A new bus driver for Technologic Systems NBUS
 
 Changes for subsystems that prefer to merge through arm-soc:
  - The usual updates for reset controller drivers from Philipp Zabel,
    with five added drivers for SoCs in the arc, meson, socfpa, uniphier
    and mediatek families.
  - Updates to the ARM SCPI and PSCI frameworks, from Sudeep Holla,
    Heiner Kallweit and Lorenzo Pieralisi.
 
 Changes specific to some ARM-based SoC
  - The Freescale/NXP DPAA QBMan drivers from PowerPC can now work
    on ARM as well.
  - Several changes for power management on Broadcom SoCs
  - Various improvements on Qualcomm, Broadcom, Amlogic, Atmel, Mediatek
  - Minor Cleanups for Samsung, TI OMAP SoCs
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJaDggbAAoJEGCrR//JCVInIeQQAN1MDyO1UaWiFYnbkVOgzFcj
 dqbFOc41DBE/90JoBWE8kR/rjyF83OqztiaYpx9viu2qMMBZVcOwxhCUthWK59c/
 IujYdw4zGevLscF+jdrLbXgk97nfaWebsHyTAF307WAdZVJxiVGGzQEcgm71d6Zp
 CXjLiUii4winHUMK9FLRY2st0HKAevXhuvZJVV432+sTg3p7fGVilYeGOL5G62WO
 zQfCisqzC5q677kGGyUlPRGlHWMPkllsTTnfXcmV/FUiGyVa3lUWY5sEu+wCl96O
 U1ffPENeNj/A/4fa1dbErtbiNnC2z/+jf+Dg7Cn8w/dPk4Suf0ppjP8RqIGyxmDl
 Wm/UxbwDClxaeF4GSaYh2yKgGRJMH5N87bJnZRINE5ccGiol8Ww/34bFG0xNnfyh
 jSAFAc318AFG62WD4lvqWc7LSpzOYxp/MNqIFXKN692St/MJLkx8/q0nTwY1qPY0
 3SELz9II3hz+3MfDRqtRi7hZpkgHgQ+UG7S5+Xhmqrl309GOEldCjPVJhhXxWoxK
 ZPtZOuyYvGhIC+YAnHaN6lUjADIdNJZHwbuXFImx85oKHVofoxHbcni5vk8Uu7z1
 sQNYOtdDGaPG/2u9RJdJlPg/jIgLKxxt/Xm9TYVawpZ5hFANhBTtIq5ExCRAil68
 j9sMOrpZ1DzCQyR7zN2v
 =qDhq
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC driver updates from Arnd Bergmann:
 "This branch contains platform-related driver updates for ARM and
  ARM64, these are the areas that bring the changes:

  New drivers:

   - driver support for Renesas R-Car V3M (R8A77970)

   - power management support for Amlogic GX

   - a new driver for the Tegra BPMP thermal sensor

   - a new bus driver for Technologic Systems NBUS

  Changes for subsystems that prefer to merge through arm-soc:

   - the usual updates for reset controller drivers from Philipp Zabel,
     with five added drivers for SoCs in the arc, meson, socfpa,
     uniphier and mediatek families

   - updates to the ARM SCPI and PSCI frameworks, from Sudeep Holla,
     Heiner Kallweit and Lorenzo Pieralisi

  Changes specific to some ARM-based SoC

   - the Freescale/NXP DPAA QBMan drivers from PowerPC can now work on
     ARM as well

   - several changes for power management on Broadcom SoCs

   - various improvements on Qualcomm, Broadcom, Amlogic, Atmel,
     Mediatek

   - minor Cleanups for Samsung, TI OMAP SoCs"

[ NOTE! This doesn't work without the previous ARM SoC device-tree pull,
  because the R8A77970 driver is missing a header file that came from
  that pull.

  The fact that this got merged afterwards only fixes it at this point,
  and bisection of that driver will fail if/when you walk into the
  history of that driver.           - Linus ]

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (96 commits)
  soc: amlogic: meson-gx-pwrc-vpu: fix power-off when powered by bootloader
  bus: add driver for the Technologic Systems NBUS
  memory: omap-gpmc: Remove deprecated gpmc_update_nand_reg()
  soc: qcom: remove unused label
  soc: amlogic: gx pm domain: add PM and OF dependencies
  drivers/firmware: psci_checker: Add missing destroy_timer_on_stack()
  dt-bindings: power: add amlogic meson power domain bindings
  soc: amlogic: add Meson GX VPU Domains driver
  soc: qcom: Remote filesystem memory driver
  dt-binding: soc: qcom: Add binding for rmtfs memory
  of: reserved_mem: Accessor for acquiring reserved_mem
  of/platform: Generalize /reserved-memory handling
  soc: mediatek: pwrap: fix fatal compiler error
  soc: mediatek: pwrap: fix compiler errors
  arm64: mediatek: cleanup message for platform selection
  soc: Allow test-building of MediaTek drivers
  soc: mediatek: place Kconfig for all SoC drivers under menu
  soc: mediatek: pwrap: add support for MT7622 SoC
  soc: mediatek: pwrap: add common way for setup CS timing extenstion
  soc: mediatek: pwrap: add MediaTek MT6380 as one slave of pwrap
  ..
 2017-11-16 16:05:01 -08:00
Linus Torvalds
527d147074 ARM: Device-tree updates for 4.15 
We add device tree files for a couple of additional SoCs in various areas:
 
 Allwinner R40/V40 for entertainment, Broadcom Hurricane 2 for networking,
 Amlogic A113D for audio, and Renesas R-Car V3M for automotive.
 
 As usual, lots of new boards get added based on those and other SoCs:
 
  - Actions S500 based CubieBoard6 single-board computer
 
  - Amlogic Meson-AXG A113D based development board
  - Amlogic S912 based Khadas VIM2 single-board computer
  - Amlogic S912 based Tronsmart Vega S96 set-top-box
 
  - Allwinner H5 based NanoPi NEO Plus2 single-board computer
  - Allwinner R40 based Banana Pi M2 Ultra and Berry single-board computers
  - Allwinner A83T based TBS A711 Tablet
 
  - Broadcom Hurricane 2 based Ubiquiti UniFi Switch 8
  - Broadcom bcm47xx based Luxul XAP-1440/XAP-810/ABR-4500/XBR-4500
      wireless access points and routers
 
  - NXP i.MX51 based Zodiac Inflight Innovations RDU1 board
  - NXP i.MX53 based GE Healthcare PPD biometric monitor
  - NXP i.MX6 based Pistachio single-board computer
  - NXP i.MX6 based Vining-2000 automotive diagnostic interface
  - NXP i.MX6 based Ka-Ro TX6 Computer-on-Module in additional variants
 
  - Qualcomm MSM8974 (Snapdragon 800) based Fairphone 2 phone
  - Qualcomm MSM8974pro (Snapdragon 801) based Sony Xperia Z2 Tablet
 
  - Realtek RTD1295 based set-top-boxes MeLE V9 and PROBOX2 AVA
 
  - Renesas R-Car V3M (R8A77970) SoC and "Eagle" reference board
  - Renesas H3ULCB and M3ULCB "Kingfisher" extension infotainment boards
  - Renasas r8a7745 based iWave G22D-SODIMM SoM
 
  - Rockchip rk3288 based Amarula Vyasa single-board computer
 
  - Samsung Exynos5800 based Odroid HC1 single-board computer
 
 For existing SoC support, there was a lot of ongoing work, as usual
 most of that concentrated on the Renesas, Rockchip, OMAP, i.MX, Amlogic
 and Allwinner platforms, but others were also active.
 
 Rob Herring and many others worked on reducing the number of issues that
 the latest version of 'dtc' now warns about. Unfortunately there is still
 a lot left to do.
 
 A rework of the ARM foundation model introduced several new files
 for common variations of the model.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJaDhcfAAoJEGCrR//JCVIngu0QAI2ntVotaOAOaCurNCnoVwI1
 j+eKwHGTawQRcSHWN8C+p4FzzaOmw+vvbOyewky8PWaDOCkK6yWEHRf3hb2la2jw
 j9prht28R1RAHIRPuah4SxKHYoT4VW9q/2hMHJ2BiNDOMX54xE7j2cUvWSsIRz5o
 id2QqKsp2OIDNQAXAA4N25FjdBCYvSik80panSdJITtJODIj6UfmcXSgqkoQ3TTV
 rwVyFtryl9Si3eyZYcfB2/0ILKuaMC8gl7IX9z+PkRqu9XN7i6bZKZlMMtpJqX3u
 Ad89kLkFqNhiwZ77bIoRRl+0NEoSu5hTPLHRqghS6gPfDY2JT6igf0rGC8twjfea
 fzGOBWr6NlIlUmR4smS0GyE/3YsfOQvYWjE+zx5qkmay30TORVTZBzsBR+kQJzKK
 tnbO1zvst1ECtk9e8np0di4NAo9rwM37dxpu4aspP1Umxw1K68VSNE3RhGl8UUwW
 oNvHa8hD8Ck0QDBNltrkmKBVoIYKRU3XhXrRXVjRQdu6Xitml0XYBi80V0h33EE3
 162UXDEMu1/aqRRZUtKw7+yozT8fqOHjH8Zrv2zCVGg0HEwVohcWv/BPXbrg0abJ
 wXYS8VocZJP6Nb4FQMe+cRbBUHoBgBQqbsF60tWiYsjv0zoc5hogLWcZYqzDcIO6
 06OBR3HgUW27urUn/JBu
 =TnSo
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM device-tree updates from Arnd Bergmann:
 "We add device tree files for a couple of additional SoCs in various
  areas:

  Allwinner R40/V40 for entertainment, Broadcom Hurricane 2 for
  networking, Amlogic A113D for audio, and Renesas R-Car V3M for
  automotive.

  As usual, lots of new boards get added based on those and other SoCs:

   - Actions S500 based CubieBoard6 single-board computer

   - Amlogic Meson-AXG A113D based development board
   - Amlogic S912 based Khadas VIM2 single-board computer
   - Amlogic S912 based Tronsmart Vega S96 set-top-box

   - Allwinner H5 based NanoPi NEO Plus2 single-board computer
   - Allwinner R40 based Banana Pi M2 Ultra and Berry single-board computers
   - Allwinner A83T based TBS A711 Tablet

   - Broadcom Hurricane 2 based Ubiquiti UniFi Switch 8
   - Broadcom bcm47xx based Luxul XAP-1440/XAP-810/ABR-4500/XBR-4500
     wireless access points and routers

   - NXP i.MX51 based Zodiac Inflight Innovations RDU1 board
   - NXP i.MX53 based GE Healthcare PPD biometric monitor
   - NXP i.MX6 based Pistachio single-board computer
   - NXP i.MX6 based Vining-2000 automotive diagnostic interface
   - NXP i.MX6 based Ka-Ro TX6 Computer-on-Module in additional variants

   - Qualcomm MSM8974 (Snapdragon 800) based Fairphone 2 phone
   - Qualcomm MSM8974pro (Snapdragon 801) based Sony Xperia Z2 Tablet

   - Realtek RTD1295 based set-top-boxes MeLE V9 and PROBOX2 AVA

   - Renesas R-Car V3M (R8A77970) SoC and "Eagle" reference board
   - Renesas H3ULCB and M3ULCB "Kingfisher" extension infotainment boards
   - Renasas r8a7745 based iWave G22D-SODIMM SoM

   - Rockchip rk3288 based Amarula Vyasa single-board computer

   - Samsung Exynos5800 based Odroid HC1 single-board computer

  For existing SoC support, there was a lot of ongoing work, as usual
  most of that concentrated on the Renesas, Rockchip, OMAP, i.MX,
  Amlogic and Allwinner platforms, but others were also active.

  Rob Herring and many others worked on reducing the number of issues
  that the latest version of 'dtc' now warns about. Unfortunately there
  is still a lot left to do.

  A rework of the ARM foundation model introduced several new files for
  common variations of the model"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (599 commits)
  arm64: dts: uniphier: route on-board device IRQ to GPIO controller for PXs3
  dt-bindings: bus: Add documentation for the Technologic Systems NBUS
  arm64: dts: actions: s900-bubblegum-96: Add fake uart5 clock
  ARM: dts: owl-s500: Add CubieBoard6
  dt-bindings: arm: actions: Add CubieBoard6
  ARM: dts: owl-s500-guitar-bb-rev-b: Add fake uart3 clock
  ARM: dts: owl-s500: Set power domains for CPU2 and CPU3
  arm: dts: mt7623: remove unused compatible string for pio node
  arm: dts: mt7623: update usb related nodes
  arm: dts: mt7623: update crypto node
  ARM: dts: sun8i: a711: Enable USB OTG
  ARM: dts: sun8i: a711: Add regulator support
  ARM: dts: sun8i: a83t: bananapi-m3: Enable AP6212 WiFi on mmc1
  ARM: dts: sun8i: a83t: cubietruck-plus: Enable AP6330 WiFi on mmc1
  ARM: dts: sun8i: a83t: Move mmc1 pinctrl setting to dtsi file
  ARM: dts: sun8i: a83t: allwinner-h8homlet-v2: Add AXP818 regulator nodes
  ARM: dts: sun8i: a83t: bananapi-m3: Add AXP813 regulator nodes
  ARM: dts: sun8i: a83t: cubietruck-plus: Add AXP818 regulator nodes
  ARM: dts: sunxi: Add dtsi for AXP81x PMIC
  arm64: dts: allwinner: H5: Restore EMAC changes
  ...
 2017-11-16 15:48:26 -08:00
Linus Torvalds
b630a23a73 This is the bulk of pin control changes for the v4.15 
kernel cycle:
 
 Core:
 
 - The pin control Kconfig entry PINCTRL is now turned into
   a menuconfig option. This obviously has the implication of
   making the subsystem menu visible in menuconfig. This is
   happening because of two things:
 
   - Intel have started to deploy and depend on pin controllers
     in a way that is affecting users directly. This happens
     on the highly integrated laptop chipsets named after
     geographical places: baytrail, broxton, cannonlake,
     cedarfork, cherryview, denverton, geminilake, lewisburg,
     merrifield, sunrisepoint... It started a while back and
     now it is ever more evident that this is crucial
     infrastructure for x86 laptops and not an embedded
     obscurity anymore. Users need to be aware.
 
   - Pin control expanders on I2C and SPI that are
     arch-agnostic. Currently Semtech SX150X and Microchip
     MCP28x08 but more are expected. Users will have to be
     able to configure these in directly for their set-up.
 
 - Just go and select GPIOLIB now that we made sure that
   GPIOLIB is a very vanilla subsystem. Do not depend on
   it, if we need it, select it.
 
 - Exposing the pin control subsystem in menuconfig uncovered
   a bunch of obscure bugs that are now hopefully fixed,
   all more or less pertaining to Blackfin.
 
 - Unified namespace for cross-calls between pin control and
   GPIO.
 
 - New support for clock skew/delay generic DT bindings
   and generic pin config options for this.
 
 - Minor documentation improvements.
 
 Various:
 
 - The Renesas SH-PFC pin controller has evolved a lot. It seems
   Renesas are churning out new SoCs by the minute.
 
 - A bunch of non-critical fixes for the Rockchip driver.
 
 - Improve the use of library functions instead of open coding.
 
 - Support the MCP28018 variant in the MCP28x08 driver.
 
 - Static constifying.
 -----BEGIN PGP SIGNATURE-----
 
 iQIcBAABAgAGBQJaDV9TAAoJEEEQszewGV1zf0AQAIlHxM8B0mJPOFv7WdPIHs8j
 GSGAPv0rPobdgZI8vegosIQmAiry5jjaHP6VGOrK5n8FRxfBLd89NLT7dgK7J9Yx
 tYcQRQn1/MqZKaIjWWgTes3okEr9s77Of3aWkA9gyvBjTGoo2hu8BTwZOYuPrIPP
 aYcI7VR0VbTe7FQR1QRtKBXnBTXfznF1j5ckKNY4ahgIPcUgxyh6EA1E61rDorLK
 gvwwzoBqIKQAcnapgarF7YOJjoE0i7ZoSlhL0b0nvhcgolyK/zLN4xujLcTGPeTJ
 hQwe7LhxtvtmJmu0jRMuetDLFT52d6eq8ttyFBMULkgRzcgMv6GZZXUy4k92t7ZT
 F2DRbAjyAlxkhUhQ8BORzEXwfWYITt1M49jWQqugdDR2fV/MAlF8motOkVBl73iS
 zHIQ/ZDcAD+PlwTHiDyDOUxj7qyDs2MkTLTzfXc0koOQZOqskDHQ1dIf3UzLzZ9S
 /dx339/ejwP73E0lzOsanhianfonqWZ3Apn3aRG18uqCt2+eHySWpxyRANuOlBZI
 czERg+47wDfng24xyuH0EElgbS5G0Bt1lT5zLVLdFEvoLmcBHVKqaCkiuvYXOjVM
 GyMRvQPiJbhT6qiJ+aSP8t/utl1aUhXQLtrUnXxu8qv9tQ6jgmqiQd9855Uvrzb0
 ZR2wyNc2jtWzwCfrkWjt
 =kj/b
 -----END PGP SIGNATURE-----

Merge tag 'pinctrl-v4.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "This is the bulk of pin control changes for the v4.15 kernel cycle:

  Core:

   - The pin control Kconfig entry PINCTRL is now turned into a
     menuconfig option. This obviously has the implication of making the
     subsystem menu visible in menuconfig. This is happening because of
     two things:

      (a) Intel have started to deploy and depend on pin controllers in
          a way that is affecting users directly. This happens on the
          highly integrated laptop chipsets named after geographical
          places: baytrail, broxton, cannonlake, cedarfork, cherryview,
          denverton, geminilake, lewisburg, merrifield, sunrisepoint...
          It started a while back and now it is ever more evident that
          this is crucial infrastructure for x86 laptops and not an
          embedded obscurity anymore. Users need to be aware.

      (b) Pin control expanders on I2C and SPI that are arch-agnostic.
          Currently Semtech SX150X and Microchip MCP28x08 but more are
          expected. Users will have to be able to configure these in
          directly for their set-up.

   - Just go and select GPIOLIB now that we made sure that GPIOLIB is a
     very vanilla subsystem. Do not depend on it, if we need it, select
     it.

   - Exposing the pin control subsystem in menuconfig uncovered a bunch
     of obscure bugs that are now hopefully fixed, all more or less
     pertaining to Blackfin.

   - Unified namespace for cross-calls between pin control and GPIO.

   - New support for clock skew/delay generic DT bindings and generic
     pin config options for this.

   - Minor documentation improvements.

  Various:

   - The Renesas SH-PFC pin controller has evolved a lot. It seems
     Renesas are churning out new SoCs by the minute.

   - A bunch of non-critical fixes for the Rockchip driver.

   - Improve the use of library functions instead of open coding.

   - Support the MCP28018 variant in the MCP28x08 driver.

   - Static constifying"

* tag 'pinctrl-v4.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (91 commits)
  pinctrl: gemini: Fix missing pad descriptions
  pinctrl: Add some depends on HAS_IOMEM
  pinctrl: samsung/s3c24xx: add CONFIG_OF dependency
  pinctrl: gemini: Fix GMAC groups
  pinctrl: qcom: spmi-gpio: Add pmi8994 gpio support
  pinctrl: ti-iodelay: remove redundant unused variable dev
  pinctrl: max77620: Use common error handling code in max77620_pinconf_set()
  pinctrl: gemini: Implement clock skew/delay config
  pinctrl: gemini: Use generic DT parser
  pinctrl: Add skew-delay pin config and bindings
  pinctrl: armada-37xx: Add edge both type gpio irq support
  pinctrl: uniphier: remove eMMC hardware reset pin-mux
  pinctrl: rockchip: Add iomux-route switching support for rk3288
  pinctrl: intel: Add Intel Cedar Fork PCH pin controller support
  pinctrl: intel: Make offset to interrupt status register configurable
  pinctrl: sunxi: Enforce the strict mode by default
  pinctrl: sunxi: Disable strict mode for old pinctrl drivers
  pinctrl: sunxi: Introduce the strict flag
  pinctrl: sh-pfc: Save/restore registers for PSCI system suspend
  pinctrl: sh-pfc: r8a7796: Use generic IOCTRL register description
  ...
 2017-11-16 10:57:11 -08:00
Linus Torvalds
e60e1ee606 main drm pull request for v4.15 
-----BEGIN PGP SIGNATURE-----
 
 iQIcBAABAgAGBQJaCm8RAAoJEAx081l5xIa+zX0QAJSm31kCG3vdw2CNiRx25L3q
 3hcsEOgAjVJ9FQVGKFWjzb8TK35tSqtNx5kWIj0VGaIfBE5Bdg5SLLgKKUYas8rY
 4LaphqICq2uxu2BNa2tpiar/sHhAnuozwQ4czpVWXzlaISnb9yYzRl7gMuyUVGkx
 +Gih5VUhLmQC0HsRTLJ3vaZQoUsLAl2gAjKcWa1bx57j2S+iKOPfsLaq7VYo+y1I
 Njc+iSGqMhJzRLXVkxL2lQKaslp7R38Bbh5K4Kvyjkm4Aq7zErOF6irpOXKMcrGl
 mwnr89vf1G9thjikrBaXpKnuvdbWYveoN/ORMlTdCfxkFnChHLnm3bd7NJ49RXDN
 Hv/Iq9YYjmZ9GTatxnx7lWtmXnZXC5he1yn1JAuz/yt7/0b/Wx+Mu/wEpBXYNFTd
 1AZdD586i+AmPo3yDkqH9nBu8JC0W0AnS9VZma4LVvZOP2UfJmj5Im1CLHItbGDN
 FnUCkwyD/lJUUk+WgT+w/GOMJgmFHDiFFl4tFtYVVjrUirpCFVguSKG9xuv6tT8P
 8iRsoP7RrcmDN9ojN2SEHwcpsAv3HnKkDv+9+GIbWnrGsSbCPq8Qm+JDSvf4h22I
 K5lwNpJrcpSKI+q10L7w2xliTBwb98sJkWGA/rssomrdBOWteGZAyqFRYAVgQ+mJ
 x/nJurIqQYh2KQN9+uLG
 =xVV2
 -----END PGP SIGNATURE-----

Merge tag 'drm-for-v4.15' of git://people.freedesktop.org/~airlied/linux

Pull drm updates from Dave Airlie:
 "This is the main drm pull request for v4.15.

  Core:
   - Atomic object lifetime fixes
   - Atomic iterator improvements
   - Sparse/smatch fixes
   - Legacy kms ioctls to be interruptible
   - EDID override improvements
   - fb/gem helper cleanups
   - Simple outreachy patches
   - Documentation improvements
   - Fix dma-buf rcu races
   - DRM mode object leasing for improving VR use cases.
   - vgaarb improvements for non-x86 platforms.

  New driver:
   - tve200: Faraday Technology TVE200 block.

     This "TV Encoder" encodes a ITU-T BT.656 stream and can be found in
     the StorLink SL3516 (later Cortina Systems CS3516) as well as the
     Grain Media GM8180.

  New bridges:
   - SiI9234 support

  New panels:
   - S6E63J0X03, OTM8009A, Seiko 43WVF1G, 7" rpi touch panel, Toshiba
     LT089AC19000, Innolux AT043TN24

  i915:
   - Remove Coffeelake from alpha support
   - Cannonlake workarounds
   - Infoframe refactoring for DisplayPort
   - VBT updates
   - DisplayPort vswing/emph/buffer translation refactoring
   - CCS fixes
   - Restore GPU clock boost on missed vblanks
   - Scatter list updates for userptr allocations
   - Gen9+ transition watermarks
   - Display IPC (Isochronous Priority Control)
   - Private PAT management
   - GVT: improved error handling and pci config sanitizing
   - Execlist refactoring
   - Transparent Huge Page support
   - User defined priorities support
   - HuC/GuC firmware refactoring
   - DP MST fixes
   - eDP power sequencing fixes
   - Use RCU instead of stop_machine
   - PSR state tracking support
   - Eviction fixes
   - BDW DP aux channel timeout fixes
   - LSPCON fixes
   - Cannonlake PLL fixes

  amdgpu:
   - Per VM BO support
   - Powerplay cleanups
   - CI powerplay support
   - PASID mgr for kfd
   - SR-IOV fixes
   - initial GPU reset for vega10
   - Prime mmap support
   - TTM updates
   - Clock query interface for Raven
   - Fence to handle ioctl
   - UVD encode ring support on Polaris
   - Transparent huge page DMA support
   - Compute LRU pipe tweaks
   - BO flag to allow buffers to opt out of implicit sync
   - CTX priority setting API
   - VRAM lost infrastructure plumbing

  qxl:
   - fix flicker since atomic rework

  amdkfd:
   - Further improvements from internal AMD tree
   - Usermode events
   - Drop radeon support

  nouveau:
   - Pascal temperature sensor support
   - Improved BAR2 handling
   - MMU rework to support Pascal MMU

  exynos:
   - Improved HDMI/mixer support
   - HDMI audio interface support

  tegra:
   - Prep work for tegra186
   - Cleanup/fixes

  msm:
   - Preemption support for a5xx
   - Display fixes for 8x96 (snapdragon 820)
   - Async cursor plane fixes
   - FW loading rework
   - GPU debugging improvements

  vc4:
   - Prep for DSI panels
   - fix T-format tiling scanout
   - New madvise ioctl

  Rockchip:
   - LVDS support

  omapdrm:
   - omap4 HDMI CEC support

  etnaviv:
   - GPU performance counters groundwork

  sun4i:
   - refactor driver load + TCON backend
   - HDMI improvements
   - A31 support
   - Misc fixes

  udl:
   - Probe/EDID read fixes.

  tilcdc:
   - Misc fixes.

  pl111:
   - Support more variants

  adv7511:
   - Improve EDID handling.
   - HDMI CEC support

  sii8620:
   - Add remote control support"

* tag 'drm-for-v4.15' of git://people.freedesktop.org/~airlied/linux: (1480 commits)
  drm/rockchip: analogix_dp: Use mutex rather than spinlock
  drm/mode_object: fix documentation for object lookups.
  drm/i915: Reorder context-close to avoid calling i915_vma_close() under RCU
  drm/i915: Move init_clock_gating() back to where it was
  drm/i915: Prune the reservation shared fence array
  drm/i915: Idle the GPU before shinking everything
  drm/i915: Lock llist_del_first() vs llist_del_all()
  drm/i915: Calculate ironlake intermediate watermarks correctly, v2.
  drm/i915: Disable lazy PPGTT page table optimization for vGPU
  drm/i915/execlists: Remove the priority "optimisation"
  drm/i915: Filter out spurious execlists context-switch interrupts
  drm/amdgpu: use irq-safe lock for kiq->ring_lock
  drm/amdgpu: bypass lru touch for KIQ ring submission
  drm/amdgpu: Potential uninitialized variable in amdgpu_vm_update_directories()
  drm/amdgpu: potential uninitialized variable in amdgpu_vce_ring_parse_cs()
  drm/amd/powerplay: initialize a variable before using it
  drm/amd/powerplay: suppress KASAN out of bounds warning in vega10_populate_all_memory_levels
  drm/amd/amdgpu: fix evicted VRAM bo adjudgement condition
  drm/vblank: Tune drm_crtc_accurate_vblank_count() WARN down to a debug
  drm/rockchip: add CONFIG_OF dependency for lvds
  ...
 2017-11-15 20:42:10 -08:00
Linus Torvalds
6aa2f9441f This is the bulk of GPIO changes for the v4.15 kernel cycle: 
CORE:
 - Fix the semantics of raw GPIO to actually be raw. No
   inversion semantics as before, but also no open draining,
   and allow the raw operations to affect lines used for
   interrupts as the caller supposedly knows what they are
   doing if they are getting the big hammer.
 
 - Rewrote the __inner_function() notation calls to names that
   make more sense. I just find this kind of code disturbing.
 
 - Drop the .irq_base() field from the gpiochip since now all
   IRQs are mapped dynamically. This is nice.
 
 - Support for .get_multiple() in the core driver API. This
   allows us to read several GPIO lines with a single
   register read. This has high value for some usecases: it
   can be used to create oscilloscopes and signal analyzers
   and other things that rely on reading several lines at
   exactly the same instant. Also a generally nice
   optimization. This uses the new assign_bit() macro from
   the bitops lib that was ACKed by Andrew Morton and
   is implemented for two drivers, one of them being the
   generic MMIO driver so everyone using that will be able
   to benefit from this.
 
 - Do not allow requests of Open Drain and Open Source
   setting of a GPIO line simultaneously. If the hardware
   actually supports enabling both at the same time the
   electrical result would be disastrous.
 
 - A new interrupt chip core helper. This will be helpful
   to deal with "banked" GPIOs, which means GPIO controllers
   with several logical blocks of GPIO inside them. This
   is several gpiochips per device in the device model, in
   contrast to the case when there is a 1-to-1 relationship
   between a device and a gpiochip.
 
 NEW DRIVERS:
 
 - Maxim MAX3191x industrial serializer, a very interesting
   piece of professional I/O hardware.
 
 - Uniphier GPIO driver. This is the GPIO block from the
   recent Socionext (ex Fujitsu and Panasonic) platform.
 
 - Tegra 186 driver. This is based on the new banked GPIO
   infrastructure.
 
 OTHER IMPROVEMENTS:
 
 - Some documentation improvements.
 
 - Wakeup support for the DesignWare DWAPB GPIO controller.
 
 - Reset line support on the DesignWare DWAPB GPIO controller.
 
 - Several non-critical bug fixes and improvements for the
   Broadcom BRCMSTB driver.
 
 - Misc non-critical bug fixes like exotic errorpaths, removal
   of dead code etc.
 
 - Explicit comments on fall-through switch() statements.
 -----BEGIN PGP SIGNATURE-----
 
 iQIcBAABAgAGBQJaCvGiAAoJEEEQszewGV1z+oAQAJUpdPH/msdgHDuXSuBcbuFq
 NObQdkRiz1hez4vJOT+kbgES6ay57MArnbmM/xRdy+37lKrmkP+yfZe4UUruQhhW
 f2GVlwBbUp9tIzNliS8IYWO0tj+BTYyg1MQx0C0nE1zMZqVZk44EDa9SO6esRaFJ
 SLc2BpO3oJCQRaObe0+KTHIJV0dK3vQh4QXSzL+cM5u7P67Jq+wv4xdLVVScwbJB
 4jgwVER3Ah0E1jHclIG2PxI1rbYKwlOBumafOTUlq5fmfC3tULVPJEm9FXcdaBLJ
 KAmtxX4yi+SgUccYFsmK+fNNLVQiAjmkhJCl6kxVOrxYqamrG100YST4Iew3sakM
 /iQ3lpup5L6eJ/dndfgE207OqRFhvAzNRxORv1p/wJIRLmV1/QehCX8GYOcDumXY
 MySRcEeUeZPfBHcnjIDRP6y/XOg8zBKso7GL+feRgLZUJZlNQZqokdC95TY9S5nm
 QLK+sU367o41tomyv5TP3y1DDsym6+ZdpuOUh73znxuz2x/x+FfTfwM2J0r8Ussm
 GQTfAojeBI9aSOZ2mvgRI1XxSprXqO3FFFWBwrQ6RS9rBceLF1o2ySKC2gI0FG5d
 6GBkARcN5RyyNtYkH923pyrqz/FZJc6ZkrsUTGmERM5HGuWwczcditqwYRhbHwl8
 pIlmX4y0AYh6FFVoIcQE
 =8Mon
 -----END PGP SIGNATURE-----

Merge tag 'gpio-v4.15-1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio

Pull GPIO updates from Linus Walleij:
 "This is the bulk of GPIO changes for the v4.15 kernel cycle:

  Core:

   - Fix the semantics of raw GPIO to actually be raw. No inversion
     semantics as before, but also no open draining, and allow the raw
     operations to affect lines used for interrupts as the caller
     supposedly knows what they are doing if they are getting the big
     hammer.

   - Rewrote the __inner_function() notation calls to names that make
     more sense. I just find this kind of code disturbing.

   - Drop the .irq_base() field from the gpiochip since now all IRQs are
     mapped dynamically. This is nice.

   - Support for .get_multiple() in the core driver API. This allows us
     to read several GPIO lines with a single register read. This has
     high value for some usecases: it can be used to create
     oscilloscopes and signal analyzers and other things that rely on
     reading several lines at exactly the same instant. Also a generally
     nice optimization. This uses the new assign_bit() macro from the
     bitops lib that was ACKed by Andrew Morton and is implemented for
     two drivers, one of them being the generic MMIO driver so everyone
     using that will be able to benefit from this.

   - Do not allow requests of Open Drain and Open Source setting of a
     GPIO line simultaneously. If the hardware actually supports
     enabling both at the same time the electrical result would be
     disastrous.

   - A new interrupt chip core helper. This will be helpful to deal with
     "banked" GPIOs, which means GPIO controllers with several logical
     blocks of GPIO inside them. This is several gpiochips per device in
     the device model, in contrast to the case when there is a 1-to-1
     relationship between a device and a gpiochip.

  New drivers:

   - Maxim MAX3191x industrial serializer, a very interesting piece of
     professional I/O hardware.

   - Uniphier GPIO driver. This is the GPIO block from the recent
     Socionext (ex Fujitsu and Panasonic) platform.

   - Tegra 186 driver. This is based on the new banked GPIO
     infrastructure.

  Other improvements:

   - Some documentation improvements.

   - Wakeup support for the DesignWare DWAPB GPIO controller.

   - Reset line support on the DesignWare DWAPB GPIO controller.

   - Several non-critical bug fixes and improvements for the Broadcom
     BRCMSTB driver.

   - Misc non-critical bug fixes like exotic errorpaths, removal of dead
     code etc.

   - Explicit comments on fall-through switch() statements"

* tag 'gpio-v4.15-1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (65 commits)
  gpio: tegra186: Remove tegra186_gpio_lock_class
  gpio: rcar: Add r8a77995 (R-Car D3) support
  pinctrl: bcm2835: Fix some merge fallout
  gpio: Fix undefined lock_dep_class
  gpio: Automatically add lockdep keys
  gpio: Introduce struct gpio_irq_chip.first
  gpio: Disambiguate struct gpio_irq_chip.nested
  gpio: Add Tegra186 support
  gpio: Export gpiochip_irq_{map,unmap}()
  gpio: Implement tighter IRQ chip integration
  gpio: Move lock_key into struct gpio_irq_chip
  gpio: Move irq_valid_mask into struct gpio_irq_chip
  gpio: Move irq_nested into struct gpio_irq_chip
  gpio: Move irq_chained_parent to struct gpio_irq_chip
  gpio: Move irq_default_type to struct gpio_irq_chip
  gpio: Move irq_handler to struct gpio_irq_chip
  gpio: Move irqdomain into struct gpio_irq_chip
  gpio: Move irqchip into struct gpio_irq_chip
  gpio: Introduce struct gpio_irq_chip
  pinctrl: armada-37xx: remove unused variable
  ...
 2017-11-14 17:23:44 -08:00
Stephen Boyd
4c4fe16971 Merge branch 'clk-mediatek' into clk-next 
* clk-mediatek:
  clk: mediatek: add clock support for MT7622 SoC
  clk: mediatek: add clocks dt-bindings required header for MT7622 SoC
  clk: mediatek: add the option for determining PLL source clock
  dt-bindings: clock: mediatek: document clk bindings for MediaTek MT7622 SoC
  clk: mediatek: mark mtk_infrasys_init_early __init
  clk: mediatek: Add MT2712 clock support
  clk: mediatek: Add dt-bindings for MT2712 clocks
  dt-bindings: ARM: Mediatek: Document bindings for MT2712
 2017-11-14 10:07:44 -08:00
Stephen Boyd
eed58151d6 Merge branch 'clk-imx' into clk-next 
* clk-imx:
  clk: imx: imx7d: Remove ARM_M0 clock
  clk: imx: imx7d: Fix parent clock for OCRAM_CLK
  clk: imx: clk-imx6ul: allow lcdif_pre_sel to change parent rate
  clk: imx6: refine hdmi_isfr's parent to make HDMI work on i.MX6 SoCs w/o VPU
 2017-11-14 10:07:43 -08:00
Stephen Boyd
8f62040086 Merge branch 'clk-qcom' into clk-next 
* clk-qcom:
  clk: qcom: clk-smd-rpm: add msm8996 rpmclks
  clk: qcom: Implement RPM clocks for MSM8660/APQ8060
  clk: qcom: Update DT bindings for the MSM8660/APQ8060 RPMCC
  clk: qcom: Elaborate on "active" clocks in the RPM clock bindings
  clk: qcom: Remove unused RCG ops
 2017-11-14 10:07:42 -08:00
Stephen Boyd
042e2e9c2c clk: tegra: Changes for v4.15-rc1 
This contains cleanups and minor fixes for the Tegra clock driver.
 -----BEGIN PGP SIGNATURE-----
 
 iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAloBzq8THHRyZWRpbmdA
 bnZpZGlhLmNvbQAKCRDdI6zXfz6zobeJD/9QhqSqE1EA5jLZDE/9yqNWL7BJHgOP
 +csMY4y6PaEX5SkxGuLrHmMOJPNHTfFeqnL8djAkMfsmAnUOYqxKvweEFqxmgT2V
 7lPOv5ScdvAejPKje1TMou29P2JYaScoU2Pk3Ve6mQIye/m1IoTJxDMhDWJYCn1c
 8fetIu2J25vrGHQcl9xChxce8au0KenEkQQSot0czrgymtrpZcBAJLFPn7EqVh5i
 HVkvB1RZG8GKbRNNhmm9P1ryWE0r5Yi+MOCki1izr153uDLsNM5oV20UY3FohoY3
 97CsgZCt3PisCRuNd+4M4uYUQomQfalfz7MR5z+4wws+9tOi3uVujNUmRzU03pBY
 4fscXy6iepDGLDngUxqZkjAhy1mvV8g0iGEvNS+7ELzyC7hsAAkNHN3j2xg+uklE
 aVl9/SSdKMDFjZk0n2YHmnE5bYAhlweluNUsEnJ2KnNpB9V7xWuDhF6abq3NPVbS
 XxMLGbwy/jT4t4IziPb2CicLsRbM1qySjlDd5AxyhM4t8bq3JVgVU6M+JwcrOZnQ
 ydkTvoFS489kXPDl2E3NyUJOSVPfp6z05mONGsNNJIMqh4pE7Q4uaMoBXEntMxbl
 UHhOcJSx8SAtRe2gnEnIc7+U+ngWAFzRD6mU0qEab2bEg1VfpCP6GD6MLa2PrUBU
 8Ln17zfr0lD2YQ==
 =wB8S
 -----END PGP SIGNATURE-----

Merge tag 'tegra-for-4.15-clk-2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into clk-next

Pull tegra clk drivers updates from Thierry Reding:

This contains cleanups and minor fixes for the Tegra clock driver.

* tag 'tegra-for-4.15-clk-2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  clk: tegra: Use readl_relaxed_poll_timeout_atomic() in tegra210_clock_init()
  clk: tegra: dfll: Fix drvdata overwriting issue
  clk: tegra: Fix cclk_lp divisor register
  clk: tegra: Bump SCLK clock rate to 216 MHz
  clk: tegra: Use common definition of APBDMA clock gate
  clk: tegra: Correct parent of the APBDMA clock
  clk: tegra: Add AHB DMA clock entry
  clk: tegra: Mark APB clock as critical
  clk: tegra: Make tegra_clk_pll_params __ro_after_init
  clk: tegra: Fix sor1_out clock implementation
  clk: tegra: Use tegra_clk_register_periph_data()
  clk: tegra: Add peripheral clock registration helper
  clk: tegra: Check BPMP response return code
  dt-bindings: clock: tegra: Add sor1_out clock
  firmware: tegra: Propagate error code to caller
 2017-11-14 10:07:15 -08:00
Linus Torvalds
894025f24b USB/PHY patches for 4.15-rc1 
Here is the big set of USB and PHY driver updates for 4.15-rc1.
 
 There is the usual amount of gadget and xhci driver updates, along with
 phy and chipidea enhancements.  There's also a lot of SPDX tags and
 license boilerplate cleanups as well, which provide some churn in the
 diffstat.
 
 Other major thing is the typec code that moved out of staging and into
 the "real" part of the drivers/usb/ tree, which was nice to see happen.
 
 All of these have been in linux-next with no reported issues for a
 while.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 -----BEGIN PGP SIGNATURE-----
 
 iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCWgm/Vw8cZ3JlZ0Brcm9h
 aC5jb20ACgkQMUfUDdst+yktXwCdGgpInfOEvOGFd83EPDL7a1ncyc4AoM5wI8yl
 1CeLipqVIN3IsMMJptvb
 =zvDI
 -----END PGP SIGNATURE-----

Merge tag 'usb-4.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb

Pull USB/PHY updates from Greg KH:
 "Here is the big set of USB and PHY driver updates for 4.15-rc1.

  There is the usual amount of gadget and xhci driver updates, along
  with phy and chipidea enhancements. There's also a lot of SPDX tags
  and license boilerplate cleanups as well, which provide some churn in
  the diffstat.

  Other major thing is the typec code that moved out of staging and into
  the "real" part of the drivers/usb/ tree, which was nice to see
  happen.

  All of these have been in linux-next with no reported issues for a
  while"

* tag 'usb-4.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (263 commits)
  usb: gadget: f_fs: Fix use-after-free in ffs_free_inst
  USB: usbfs: compute urb->actual_length for isochronous
  usb: core: message: remember to reset 'ret' to 0 when necessary
  USB: typec: Remove remaining redundant license text
  USB: typec: add SPDX identifiers to some files
  USB: renesas_usbhs: rcar?.h: add SPDX tags
  USB: chipidea: ci_hdrc_tegra.c: add SPDX line
  USB: host: xhci-debugfs: add SPDX lines
  USB: add SPDX identifiers to all remaining Makefiles
  usb: host: isp1362-hcd: remove a couple of redundant assignments
  USB: adutux: remove redundant variable minor
  usb: core: add a new usb_get_ptm_status() helper
  usb: core: add a 'type' parameter to usb_get_status()
  usb: core: introduce a new usb_get_std_status() helper
  usb: core: rename usb_get_status() 'type' argument to 'recip'
  usb: core: add Status Type definitions
  USB: gadget: Remove redundant license text
  USB: gadget: function: Remove redundant license text
  USB: gadget: udc: Remove redundant license text
  USB: gadget: legacy: Remove redundant license text
  ...
 2017-11-13 21:14:07 -08:00
Linus Walleij
bee67c7c9d Merge branch 'gpio-irqchip-rework' of /home/linus/linux-gpio into devel 2017-11-09 09:38:42 +01:00
Arnd Bergmann
1e11cbf720 Support for the RGA (raster graphics accelerator) on rk3399 
and efuses on rk3368.
 -----BEGIN PGP SIGNATURE-----
 
 iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAlnxjcYQHGhlaWtvQHNu
 dGVjaC5kZQAKCRDzpnnJnNEdgQg9CACKoNn8LseipJa0kc6ZYXXtVDurmVHgaPyV
 OpC3+YbN9tpaBh6lsujkecthmlS45qrjZUsw00P50vcGbrMgrB9zytVrFrpEVxQT
 iNdEccU9RFEZ1GSQTPstxI3Uv1fnDcqSCplzKEeVxZ/U7vwWwq5YAi4bSey6eMzc
 GNq6FfT65Uf07a0Ondn3+IUzvjRpY42BHjjQjMv3k3lSn7z94/OG0AmCkRrXkBw/
 0+jxf9eMkkEj3JaC+OhwHOLJn7bv2U67HPGjLV7BLfFUQYGjPYd8g+LdeVV9Y2PJ
 urGiu3o/VbUbTbl2+TWh+OWYbfLFhpBdE+ouPHBPxJMPFkiGnrdA
 =xf8q
 -----END PGP SIGNATURE-----

Merge tag 'v4.15-rockchip-dts64-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt

Pull "Rockchip dts64 updates for 4.15 part2" from Heiko Stübner:

Support for the RGA (raster graphics accelerator) on rk3399
and efuses on rk3368.

* tag 'v4.15-rockchip-dts64-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  arm64: dts: rockchip: add efuse for RK3368 SoCs
  arm64: dts: rockchip: add RGA device node for RK3399
  clk: rockchip: add more rk3188 graphics clock ids
  clk: rockchip: add clock id for PCLK_EFUSE256 of RK3368 SoCs
 2017-11-07 16:23:57 +01:00
Arnd Bergmann
78af0be67b thermal: tegra: Changes for v4.15-rc1 
This contains the Tegra186 BPMP thermal driver. It is used to monitor
 and access several thermal sensors found in the SoC.
 -----BEGIN PGP SIGNATURE-----
 
 iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAlnp4eMTHHRyZWRpbmdA
 bnZpZGlhLmNvbQAKCRDdI6zXfz6zodrZEACEhH5rCNN/848plxE43sG3nr67MBgd
 j012dMLQJghvTv60nJerWOapfiNIQIubaGxMe4cW0QM6tiQ4fmIrl4ewTA20R6lI
 Udsy/vgzzpfGZeClVGlL9DDmnxu7yNDL+LL70Hps00d74k3rWpnf6xRcIqxsdpxJ
 1bEZzZRCu4Q+0RpjgfmfrHrDo22qUrj1f0HjVQ4iFwDx6fbzNLPEkKszFoevgNPE
 ce7pnzmYywR+694t7CQ2REWDBIYzTZrgWqxkMtXmPgQISYzUXmqD5dzBFA2IZQO4
 kWyxzlMLyV2eK4ElvKnycZFYhuEzaOG/EVlpvHtFxy8NOlAIJWNh1CXT0mwdKx/o
 ZQvOU64vyqBSXURFoHLkGn8KfqrNpkc1nC4KU65Vuef4XMTTeLabki2rkxKo+7nb
 ljnwuMBTMfsaN9iLDHCdbXxxLQN1qXiUIcdOpt95NVZS4wsL7gQvpLj9UvUCFqJj
 o1OilXyArZd0KzxDQDAfoq1TC+AzYrQ2/29QZHqi6gi9/Qg4ipWKOiLezeqiwSyG
 6I85+fNV8Oc1nor9HqOC4cxNrO5woJA/gFw/J+JP3zg7aHOwldD4feKCeAV6QUKg
 /XS+S6iVqQQ7CVMV1Dw6ruiq1vaZ+DiapoaTnhC7n1g+wTfWdiQ9CsQ8UnAjVT76
 mfjD/Qjn8m5NoQ==
 =Y8Vc
 -----END PGP SIGNATURE-----

Merge tag 'tegra-for-4.15-thermal' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers

Pull "thermal: tegra: Changes for v4.15-rc1" from Thierry Reding:

This contains the Tegra186 BPMP thermal driver. It is used to monitor
and access several thermal sensors found in the SoC.

* tag 'tegra-for-4.15-thermal' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  thermal: Add Tegra BPMP thermal sensor driver
  dt-bindings: Add bindings for nvidia,tegra186-bpmp-thermal
  dt-bindings: clock: tegra: Add sor1_out clock
 2017-11-02 16:17:30 +01:00
Greg Kroah-Hartman
b24413180f License cleanup: add SPDX GPL-2.0 license identifier to files with no license 
Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.

By default all files without license information are under the default
license of the kernel, which is GPL version 2.

Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier.  The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.

This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.

How this work was done:

Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
 - file had no licensing information it it.
 - file was a */uapi/* one with no licensing information in it,
 - file was a */uapi/* one with existing licensing information,

Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.

The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne.  Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.

The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed.  Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.

Criteria used to select files for SPDX license identifier tagging was:
 - Files considered eligible had to be source code files.
 - Make and config files were included as candidates if they contained >5
   lines of source
 - File already had some variant of a license header in it (even if <5
   lines).

All documentation files were explicitly excluded.

The following heuristics were used to determine which SPDX license
identifiers to apply.

 - when both scanners couldn't find any license traces, file was
   considered to have no license information in it, and the top level
   COPYING file license applied.

   For non */uapi/* files that summary was:

   SPDX license identifier                            # files
   ---------------------------------------------------|-------
   GPL-2.0                                              11139

   and resulted in the first patch in this series.

   If that file was a */uapi/* path one, it was "GPL-2.0 WITH
   Linux-syscall-note" otherwise it was "GPL-2.0".  Results of that was:

   SPDX license identifier                            # files
   ---------------------------------------------------|-------
   GPL-2.0 WITH Linux-syscall-note                        930

   and resulted in the second patch in this series.

 - if a file had some form of licensing information in it, and was one
   of the */uapi/* ones, it was denoted with the Linux-syscall-note if
   any GPL family license was found in the file or had no licensing in
   it (per prior point).  Results summary:

   SPDX license identifier                            # files
   ---------------------------------------------------|------
   GPL-2.0 WITH Linux-syscall-note                       270
   GPL-2.0+ WITH Linux-syscall-note                      169
   ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause)    21
   ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)    17
   LGPL-2.1+ WITH Linux-syscall-note                      15
   GPL-1.0+ WITH Linux-syscall-note                       14
   ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause)    5
   LGPL-2.0+ WITH Linux-syscall-note                       4
   LGPL-2.1 WITH Linux-syscall-note                        3
   ((GPL-2.0 WITH Linux-syscall-note) OR MIT)              3
   ((GPL-2.0 WITH Linux-syscall-note) AND MIT)             1

   and that resulted in the third patch in this series.

 - when the two scanners agreed on the detected license(s), that became
   the concluded license(s).

 - when there was disagreement between the two scanners (one detected a
   license but the other didn't, or they both detected different
   licenses) a manual inspection of the file occurred.

 - In most cases a manual inspection of the information in the file
   resulted in a clear resolution of the license that should apply (and
   which scanner probably needed to revisit its heuristics).

 - When it was not immediately clear, the license identifier was
   confirmed with lawyers working with the Linux Foundation.

 - If there was any question as to the appropriate license identifier,
   the file was flagged for further research and to be revisited later
   in time.

In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.

Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights.  The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.

Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.

In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.

Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
 - a full scancode scan run, collecting the matched texts, detected
   license ids and scores
 - reviewing anything where there was a license detected (about 500+
   files) to ensure that the applied SPDX license was correct
 - reviewing anything where there was no detection but the patch license
   was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
   SPDX license was correct

This produced a worksheet with 20 files needing minor correction.  This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.

These .csv files were then reviewed by Greg.  Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected.  This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.)  Finally Greg ran the script using the .csv files to
generate the patches.

Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 2017-11-02 11:10:55 +01:00
Chen Zhong
bda921fad5 clk: mediatek: add clocks dt-bindings required header for MT7622 SoC 
Add the required header for the entire clocks dt-bindings exported
from topckgen, apmixedsys, infracfg, pericfg, ethsys, pciesys, ssusbsys
and audsys which could be found on MT7622 SoC.

Signed-off-by: Chen Zhong <chen.zhong@mediatek.com>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
 2017-11-02 01:10:11 -07:00
weiyi.lu@mediatek.com
b7f1a721bb clk: mediatek: Add dt-bindings for MT2712 clocks 
Add MT2712 clock dt-bindings, include topckgen, apmixedsys,
infracfg, pericfg, mcucfg and subsystem clocks.

Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
 2017-11-02 00:57:25 -07:00
Adriana Reus
259bc28306 clk: imx: imx7d: Remove ARM_M0 clock 
IMX7d does not have an M0 Core and this particular
clock doesn't seem connected to anything else.
Remove this entry from the CCM driver.

Signed-off-by: Adriana Reus <adriana.reus@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
 2017-11-02 00:26:18 -07:00
Rajendra Nayak
7066fdd0d7 clk: qcom: clk-smd-rpm: add msm8996 rpmclks 
Add all RPM controlled clocks on msm8996 platform

[srini: Fixed various issues with offsets and made names specific to msm8996]
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
 2017-11-02 00:08:12 -07:00
Linus Walleij
856e6bb91e clk: qcom: Update DT bindings for the MSM8660/APQ8060 RPMCC 
These compatible strings need to be added to extend support
for the RPM CC to cover MSM8660/APQ8060. We also need to add
enumberators to the include file for a few clocks that were
missing.

Cc: devicetree@vger.kernel.org
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
 2017-11-01 23:47:27 -07:00
Dave Airlie
7a88cbd8d6 Linux 4.14-rc7 
-----BEGIN PGP SIGNATURE-----
 
 iQEcBAABAgAGBQJZ9kEFAAoJEHm+PkMAQRiGw6wH/0j197qyGd0hkVFMJO6LAgN3
 KQWS4nZ5BkVDocwv0RVnUJTtXqU1eozFgdVEtSoaFXpzlHGuptR2Tau9efDCJ7w3
 /utZxqvhGebZd2T+j+/o/LE8BRQxhADBNJq2D/o0WNt8ecxuG0GIkhkEYt/o3z1v
 /sxlwVwzXB7Dc/h1WcgGJG7cS6L9KzzAzGAS/iNvdFrPOygHBv8c0MxVZIiBIeeK
 1nZdyvbyM8uenSyG+prGt9ENrqXZxxfwUxIchi2V7A9m1WmD5zijNkf1JCWji/O+
 UsA1auxna7MwoxjxqZuGm4MlKOwZ+8xutk4JGgc+aP/ulndJbJYu+4op/3vaFBM=
 =Mhx+
 -----END PGP SIGNATURE-----

Backmerge tag 'v4.14-rc7' into drm-next

Linux 4.14-rc7

Requested by Ben Skeggs for nouveau to avoid major conflicts,
and things were getting a bit conflicty already, esp around amdgpu
reverts.
 2017-11-02 12:40:41 +10:00
Stephen Boyd
6705fc9441 Some new clock ids for rk3188 and rk3368 as well as removal of a 
superfluous memory allocation error message.
 -----BEGIN PGP SIGNATURE-----
 
 iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAlnmPGsQHGhlaWtvQHNu
 dGVjaC5kZQAKCRDzpnnJnNEdgYO7CACCYT7nEtwfQd4ajxUp9CoMYqBUEuZYv1xR
 NWbaK99eF2gNLZwUIkY3Y1C/YV8SA14gfeD2zmqbBe+f7MNqyUvi8VtEzidyHj0d
 JpIGjD1Gqy/A/Qli2RN76rPyQc9hW7KgFGIFSOEdKwmmkf6gQcb66tlG9qFfmAka
 Gfx7+5E226NGOtG6vjGtfW6lsrxpgpffsyOZiAK0MWLSF6y2tvxkO8kA4/elWhfc
 +fRYuBxjxZ74O2zJvIFMNC7L9S3fflPJ1+LRs+PSZwUgTwd7+bQlSXxh3ktc/9uf
 v57UmlDcRLABdL126tEK4oQLCXwIDy+LGx/2XCr791HRyQDcXo3q
 =0pyD
 -----END PGP SIGNATURE-----

Merge tag 'v4.15-rockchip-clk-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next

Pull Rockchip clk drivers updates from Heiko Stuebner:

 - new clock ids for rk3188 and rk3368
 - removal of a superfluous memory allocation error message

* tag 'v4.15-rockchip-clk-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  clk: rockchip: use new cif/vdpu clock ids on rk3188
  clk: rockchip: export clock pclk_efuse_256 for RK3368 SoCs
  clk: rockchip: add more rk3188 graphics clock ids
  clk: rockchip: add clock id for PCLK_EFUSE256 of RK3368 SoCs
  clk: rockchip: Remove superfluous error message in rockchip_clk_register_cpuclk()
 2017-10-31 16:28:02 -07:00
Stephen Boyd
319663c7d1 Amlogic clock changes for 4.15 
- Addition of Video Processing Unit VPU and VAPB clocks
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJZ6bW/AAoJEHfc29rIyEnRAvkP+wZhUNg/5s/tj68Qmc34yfRq
 WKk6Hn4ySOpjQr3DR0LNYevqNhVALFOsMGafIRnFIE89cLyoHqTjBn7K21TctOnj
 YyPjMx54PP46PjBV0XJ9jk1Km+z/JYa4A79xjW4x2lfaazxZfdXyfvOCHzWsmF6R
 jyLwsOwNyqpbP7eYqss5qXJeBVQ56VvjL35n3fLbbpTS56RsjXNGUMoS84WNECS4
 6ixs/YhpmkgJE+cOY9KaeDXmd8v9IWK4wWjcqty+CMiOZPmxW2LuxisVNEZriGQ4
 dmEiD/FSjqL7hNtNco2AHhvq/Erh96S1jf8lj8grHOSSIV+jVnA/zZNGCM4Myi2P
 lq7qI8EuQLa5PqVdRzG5RoWelbLkvJ351QQZolmLjAVTjAdSiwibFQHqF1Ofwnak
 CzG3qblgItnXhboreKwvP1VI6qmnGq7m3LWi3FT6Lp3GxUsEYsvT97RMjXpOerZN
 D7ZGoMKu4Qu2v8i1JWJzfDPuoAg0/+jz6HAx/nKgK6bgbNYjoJ3Llw+8Tf3wPjOm
 uJrEHKY2WpishRFbHclO9AftBAU4+8UBh9S6Gvz4l9tGeWklHVQh1u2F7jzmNyRT
 pNjWVEcuiX5ckNaARDqKZu0Lv5FYdTMfQQ6OdLnxTGmWCwB9QFnzIrI2AR/tuESl
 hfsh89AFS7f5QnzI9P41
 =rDVJ
 -----END PGP SIGNATURE-----

Merge tag 'meson-clk-for-4.15' of git://github.com/baylibre/clk-meson into clk-next

Pull Amlogic clock driver updates from Neil Armstrong:

 - Addition of Video Processing Unit VPU and VAPB clocks

* tag 'meson-clk-for-4.15' of git://github.com/baylibre/clk-meson:
  clk: meson: gxbb: Add VPU and VAPB clocks data
  clk: meson: gxbb: Add VPU and VAPB clockids
 2017-10-31 16:25:07 -07:00
Stephen Boyd
ffc3eb6f3a Allwinner clock changes for 4.15 
The most notable changes are:
   - Addition of sigma/delta modulation for the audio PLLs on the newer SoCs
   - A83t Display clocks supports
 
 There's also a bunch of minor fixes that didn't have any impact on current
 features provided by the kernel.
 -----BEGIN PGP SIGNATURE-----
 
 iQIcBAABAgAGBQJZ6ahsAAoJEBx+YmzsjxAgtvAQALfAX8+9HfJ7dk84s2qhLoZ6
 LsTujOAzUSWgOFDRhHK5vkqzq4GMqL+Tum57g7Sa7iStkYjSjtqDoMG3ajvehm1L
 rGqilZFMLSiOGiV2sQXmA8EANVjqNH6jeOc6Szwo7e0tqw5FC27TjN3jNHAAmd0z
 B9dmKQSaquMfHa+ldtOSmUjitY1uwq4dKdxuZrCxBVcgjJEwYuXOVCCioUN+d+/j
 ZRkcsoROW48FqVcsu9wONGYJxgKMVfkOR6P4QuTOfrw5Flvj5DZPYKMk0c2hYcEh
 FfSFJU7kq43dEIzD2sS4o17RTtoJQz8pO7qQ6TwL23sgtZuxvUKofhnSFbe7OV3P
 nqqiaDXEayjxNYD+aN4hpKBdK6rml9bhO8d1Y4d3dgFTdP3jhbsbO3CQebbzTKTs
 /KLyYKG3G7r3BrvY7XfrSRT1q68mp9O8GFxUMXCGwcESiqyBFLoDX32+25fZumtg
 2wADvSyTBHViJDsgHaJFuzG0rOKQLxVW2VUce3RFlFZAUCxZ9ZMrSj8ANhGfCqJ9
 RH9dpTVPVw1fPl1Lpx9ZLz9sE5Y+rQXn18etyV04rTuW9nlAQqua5wLicGEAz3Dq
 bln44RgngxpQk/0/O77Q6U+7F9gUdowwri+1m2m0s73xNjAUAE42SuCnuFZz7P3L
 4i58+Nv/CU9H98ew4TRR
 =4mo5
 -----END PGP SIGNATURE-----

Merge tag 'sunxi-clk-for-4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into clk-next

Pull Allwinner clock driver updates from Maxime Ripard:

  - Addition of sigma/delta modulation for the audio PLLs on the newer SoCs
  - A83t Display clocks supports
  - minor fixes that didn't have any impact on current features

* tag 'sunxi-clk-for-4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  clk: sunxi-ng: sun4i: Export video PLLs
  clk: sunxi-ng: Add A83T display clocks
  clk: sunxi-ng: sun8i: a23: Use sigma-delta modulation for audio PLL
  clk: sunxi-ng: sun6i: Use sigma-delta modulation for audio PLL
  clk: sunxi-ng: sun5i: Use sigma-delta modulation for audio PLL
  clk: sunxi-ng: sun4i: Use sigma-delta modulation for audio PLL
  clk: sunxi-ng: sun8i: h3: Use sigma-delta modulation for audio PLL
  clk: sunxi-ng: nm: Add support for sigma-delta modulation
  clk: sunxi-ng: Add sigma-delta modulation support
  clk: sunxi-ng: nm: Check if requested rate is supported by fractional clock
  clk: sunxi-ng: sun5i: Fix bit offset of audio PLL post-divider
  clk: sunxi-ng: a83t: Fix invalid csi-mclk mux offset
  clk: sunxi-ng: sun6i: Rename HDMI DDC clock to avoid name collision
  clk: sunxi-ng: sun6i: Export video PLLs
  clk: sunxi-ng: Implement reset control status readback
  clk: sunxi-ng: Fix missing CLK_SET_RATE_PARENT in ccu-sun4i-a10.c
  clk: sunxi-ng: add CLK_SET_RATE_PARENT flag to H3 GPU clock
  clk: sunxi-ng: add CLK_SET_RATE_UNGATE to all H3 PLLs
 2017-10-31 14:52:21 -07:00
Stephen Boyd
ae74ac0828 clk/samsung updates for v4.15, part 2 
- An addition of separate driver for the Exynos 4412 ISP CMU, needed
    to model and properly handle the clock controller's dependencies
    on the ISP power domain.
  - Adding __maybe_unused attributes to the exynos5433_cmu_{suspend,
    resume} ops to suppress compiler warnings with CONFIG_PM disabled.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABCAAGBQJZ5IjJAAoJEE1bIKeAnHqLsnIP/iPVWF3tkpKgc7v5cq3US+HW
 U7uU3/Di1A8jWgIVYyFVjAAceahz9xefu2rgCxsiUAkh1i+SdR9O9gAWq08AcmZu
 OMGWI7zMzH0GVvRXDbZsRGKVxtkrda519KnOTXorawhh1JnODuOzMBxMcAXm+zen
 bvPuqiXBvGXADFc18QtaR7JAd7sqd+rMFYCJ45RJAIf20Z9PPGJQPtkxfvkK2xRX
 nuB6ZaUfN9xrBVhWvjYq6WjKhkIO/j848B+0+l5GLi2au/a+nDN0qOYrMpFG8EQe
 k/6zu3xDTG/9UgKWNJN5fMon7QK82sOJTszDwDLLsttz5LhuUGV+oLHnAdt8rcgJ
 7UuTNRc169t0tNtoep6m/5kHn81XARSQAgPVKs5xuOfTef4lP3kXhbDLoIENx/+H
 fCDq7GteFat1Shu/01HZJhBe4MOolZLHsFvu7+KawB6CmD3KzDSckgRRIrEFDqck
 AYqxDmqJLaNbnJeTBsNRQQ3uX5D1wAaGKJLNq4HSfNOL3ZeOHQ2nxp0GgIOk7CSB
 agelkdpMaN4uNTB8cENnEIBv99bEkbdd4o5unCbO8lu3JgqfgjqFm6FjQZRR0ZQi
 uu1rFK+w7G239B6eBpkRLuJ7h8v3FntQy6FJOHHm8fKkHtN+BpBEUgX9EkJsW1QG
 ii7VgIaLm7QLcFOupKeh
 =DlbQ
 -----END PGP SIGNATURE-----

Merge tag 'clk-v4.15-exynos-pm' of git://git.kernel.org/pub/scm/linux/kernel/git/snawrocki/clk into clk-next

Pull Samsung clk driver updates from Sylwester Nawrocki:

 - An addition of separate driver for the Exynos 4412 ISP CMU, needed
   to model and properly handle the clock controller's dependencies
   on the ISP power domain.
 - Adding __maybe_unused attributes to the exynos5433_cmu_{suspend,
   resume} ops to suppress compiler warnings with CONFIG_PM disabled.

* tag 'clk-v4.15-exynos-pm' of git://git.kernel.org/pub/scm/linux/kernel/git/snawrocki/clk:
  clk: samsung: Add a separate driver for Exynos4412 ISP clocks
  clk: samsung: Add dt bindings for Exynos4412 ISP clock controller
  clk: samsung: Instantiate Exynos4412 ISP clocks only when available
  clk: samsung: exynos5433: mark PM functions as __maybe_unused
 2017-10-30 17:59:10 -07:00
Arnd Bergmann
c4db01edba dt-bindings: Updates for v4.15-rc1 
This contains the addition of a clock alias which will be used to fix
 the implementation of the SOR1 clock.
 
 Also included are the bindings for the Tegra186 BPMP thermal driver, a
 prerequisite for both the driver and device tree changes.
 -----BEGIN PGP SIGNATURE-----
 
 iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAlnp4PgTHHRyZWRpbmdA
 bnZpZGlhLmNvbQAKCRDdI6zXfz6zod0iD/wITLsu5aK0z8LH9lyXo0lgQJuakHTQ
 s/Au1D+baT4a7qGuT86unqQLlAxnlWjgmQzOnw3KSxQ0ech92uwlP9lIqeieYH20
 g0jNxNFLLsfd+k6mKn1SEKx2QRxsStv+qH/rjTRB1oU7tlE87PBSwI8IdmpczVY4
 EsJs4wqnbkFfmAzAEBLqyC2+P+vyW37DTq0IVK+y840iEKkEBjIpGQnNCIarc6B2
 gHxFVZGZWeV0BmeuWDUzSaoxIs0tSjH/FRMbIx4CML404FMlTgdhz4j/eIGvNhAI
 A/9bkKeiicflg55ra7cc1GQC5wkT+KaJzO2AgQ5dVW9/OeY8zntT2/B1N/52Pz5x
 yJTRfP/F8KzSNQ4FMwz99CwBOgCjymHTiYWFRrVCUcM4vLJLIKy5nsiMozxGN0aH
 Zz53mB1qiVTUTD8rSp/8bfB/QdMac0PFhKct8pQQPpF7X4hkJ3kcidkx5UzNwCND
 4/oIjaS0Oz46mxlcGkG06tnBs1TPS+s8txp+Z73V+Jccj0ppQKG6Ehs7H8t9wWPg
 pqVT4imE5y0zH8PJyMz/TsFzsLgc3jceP5iqRzvziK8i0mrK/Lshl6rIpe3UTavP
 QFLkfNyxoya1cGzist4SbQ5/0yAh2YQkRUblGMaQScHEeksftQpEWJKEVBune9CD
 2ZCGdNPXE2MsuQ==
 =xdyX
 -----END PGP SIGNATURE-----

Merge tag 'tegra-for-4.15-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt

Pull "dt-bindings: Updates for v4.15-rc1" from Thierry Reding:

This contains the addition of a clock alias which will be used to fix
the implementation of the SOR1 clock.

Also included are the bindings for the Tegra186 BPMP thermal driver, a
prerequisite for both the driver and device tree changes.

* tag 'tegra-for-4.15-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  dt-bindings: Add bindings for nvidia,tegra186-bpmp-thermal
  dt-bindings: clock: tegra: Add sor1_out clock
 2017-10-30 12:04:32 +01:00
Arnd Bergmann
6ac5482ee6 Second Round of Renesas ARM Based SoC DT Updates for v4.15 
* r8a77430 (RZ/G1M) SoC
   - Add XHCI support to SoC DT. Boards may enable this as appropriate
 
 * All Renesas ARM based SoCs
   - Add missing clocks for ARM CPU cores
 
     Geert Uytterhoeven says "This series improves DT hardware descriptions
     for Renesas arm32 SoCs by adding missing clocks properties to the
     device nodes corresponding to ARM CPU cores."
 
 * R-Car Gen 1 and 2, and RZ/G SoCs
   - Use R-Car Fallback compat strings for GPIO
 
     Simon Horman says "Use newly added R-Car GPIO Gen 1, 2 and 3 fallback
     compat strings in peace of now deprecated non-generation specific R-Car
     GPIO fallback compat string in the DT of Renesas ARM and arm64 based
     SoCs.
 
     As noted in the changelogs for the r8a777[89] changes, this introduces
     an incompatibility with pre-v4.14 kernels used with new DTBs. There is
     no run-time effect for other SoCs updated by this changeset."
 
 * r7s72100 (RZ/A1H) GR-Peach board
   - Add pin configuration subnode for ETHER pin group.
     This avoids relying on boot-loader configuration of these pins.
 
   - Enable ostm0 and ostm1 timers
 
     Jacopo Mondi says these are "to be used as clock source and clockevent
     source. The timers provides greater accuracy than the already enabled
     mtu2 one."
 
   - Correct leds node name indent
 
   - Enable MTU2 timer pulse unit
 
    Jacopo Mondi says "MTU2 multi-function/multi-channel timer/counter is
    not enabled for GR-Peach board. The timer is used as clock event source
    to schedule wake-ups, and without this enabled all sleeps not performed
    through busy waiting hang the board."
 
 * r8a7743 (RZ/G1M) iW-RainboW-G20M-Qseven SoM
   - Add USB function support
 
 * r8a7745 (RZ/G1E) iW-RainboW-G22D development platform
   - Add USB2.0 Host support
 
 * r8a7743 (RZ/G1M) iW-RainboW-G20D-Qseven development platform
   - Rework DT architecture and add DT for camera DB
 
     Fabrizio Castro says "Some of the serial interfaces are exposed on the
     camera daughter board.  The camera daughter board can be connected to
     the carrier board by means of expansion connectors 1, 2 and 3. The
     carrier board may host an RZ/G1M or an RZ/G1N based SoM.
 
     While adding support for the serial interfaces on the camera daughter
     board we faced the dilemma of how to properly describe all of the
     possible HW configurations and how to maximize code reuse.
 
     The best option would be to use device tree overlays, however there is
     still some work to be done on that front before actually using them,
     therefore for the time being we decided to provide .dtsi files to
     describe the carrier board and the camera daughter board, and provide
     .dts files to describe the HW configurations we need to support."
 
 * r8a779[0-4] R-Car Gen2 SoCs
   - Use generic node name for VSP1 nodes
 
     Geert Uytterhoeven says "This patch series replaces the specific node
     names used for the VSP1 nodes by the preferred generic node names, cfr.
     commit 0e1bfb72b0 ("v4l: vsp1: Use generic node name")."
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEE4nzZofWswv9L/nKF189kaWo3T74FAlnpyZ4ACgkQ189kaWo3
 T74hdw//TFy3jIbO2Uc6lk/dPDgDTY9su+acosM496PjUWu1a0qxc6haEfbQzz/t
 Tz6jCKaqOa7V/v+44vye00sU/iG22DJum7S+Hq2bBPrhOYWUcUxU1r7uwFC1+/TL
 L9hk/fNqUkkB1C/8mOjrQUsnVLUt8uYIu3jPTjfrStyL1on2SnrCxi4y6sxZLFpc
 nv8hcAk61iBW8JfC66g0Hx2eChd9aJBhRFYh3SIpzeeKMufRn8NeeUlK1/DSbLW9
 GYWYyC5bw8Ie7JvzrucY9pp4MFtmxmObPlUKoZrpikrFv0ZCMoW3z27ZhU4ooFhd
 aPMy4I+mbT5Ua+KzeIQiG+HftLuNrYZqiqg92h1MRdUoTCug9u531Y0sN/qAn1sN
 XJZ4NK+yY8V8mJGgFIeXF0qSNlzynpHd44HO4cEGtXP5RlgQFIu+vhhEV0hOO86p
 3jbI35ATPcYjmBXY3tDQhPp0WxL/zgspX3YqRtgYGHa50XtcVMAt8Z2oA4PotTgY
 hfStHKR9nLsf1TMUv7kqbH/T4mujVOnIMJ2zd85S8Pujdt5mdEyrUChKTlXPzCZg
 nTigppy8hIYGix24b5guOMfh4HPEenTWNQS2vZ687r2DwayKYTAV4bJTPEpxckoj
 rxnoGDJjt7Hfc8cTIjPSalOgS5UjweRaGIvihxg43qyRKtkyxjg=
 =Y3FX
 -----END PGP SIGNATURE-----

Merge tag 'renesas-dt2-for-v4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt

Pull "Second Round of Renesas ARM Based SoC DT Updates for v4.15" from Simon Horman:

* r8a77430 (RZ/G1M) SoC
  - Add XHCI support to SoC DT. Boards may enable this as appropriate

* All Renesas ARM based SoCs
  - Add missing clocks for ARM CPU cores

    Geert Uytterhoeven says "This series improves DT hardware descriptions
    for Renesas arm32 SoCs by adding missing clocks properties to the
    device nodes corresponding to ARM CPU cores."

* R-Car Gen 1 and 2, and RZ/G SoCs
  - Use R-Car Fallback compat strings for GPIO

    Simon Horman says "Use newly added R-Car GPIO Gen 1, 2 and 3 fallback
    compat strings in peace of now deprecated non-generation specific R-Car
    GPIO fallback compat string in the DT of Renesas ARM and arm64 based
    SoCs.

    As noted in the changelogs for the r8a777[89] changes, this introduces
    an incompatibility with pre-v4.14 kernels used with new DTBs. There is
    no run-time effect for other SoCs updated by this changeset."

* r7s72100 (RZ/A1H) GR-Peach board
  - Add pin configuration subnode for ETHER pin group.
    This avoids relying on boot-loader configuration of these pins.

  - Enable ostm0 and ostm1 timers

    Jacopo Mondi says these are "to be used as clock source and clockevent
    source. The timers provides greater accuracy than the already enabled
    mtu2 one."

  - Correct leds node name indent

  - Enable MTU2 timer pulse unit

   Jacopo Mondi says "MTU2 multi-function/multi-channel timer/counter is
   not enabled for GR-Peach board. The timer is used as clock event source
   to schedule wake-ups, and without this enabled all sleeps not performed
   through busy waiting hang the board."

* r8a7743 (RZ/G1M) iW-RainboW-G20M-Qseven SoM
  - Add USB function support

* r8a7745 (RZ/G1E) iW-RainboW-G22D development platform
  - Add USB2.0 Host support

* r8a7743 (RZ/G1M) iW-RainboW-G20D-Qseven development platform
  - Rework DT architecture and add DT for camera DB

    Fabrizio Castro says "Some of the serial interfaces are exposed on the
    camera daughter board.  The camera daughter board can be connected to
    the carrier board by means of expansion connectors 1, 2 and 3. The
    carrier board may host an RZ/G1M or an RZ/G1N based SoM.

    While adding support for the serial interfaces on the camera daughter
    board we faced the dilemma of how to properly describe all of the
    possible HW configurations and how to maximize code reuse.

    The best option would be to use device tree overlays, however there is
    still some work to be done on that front before actually using them,
    therefore for the time being we decided to provide .dtsi files to
    describe the carrier board and the camera daughter board, and provide
    .dts files to describe the HW configurations we need to support."

* r8a779[0-4] R-Car Gen2 SoCs
  - Use generic node name for VSP1 nodes

    Geert Uytterhoeven says "This patch series replaces the specific node
    names used for the VSP1 nodes by the preferred generic node names, cfr.
    commit 0e1bfb72b0 ("v4l: vsp1: Use generic node name")."

* tag 'renesas-dt2-for-v4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (42 commits)
  ARM: dts: r8a7743: Add xhci support to SoC dtsi
  ARM: dts: r7s72100: Add clock for CA9 CPU core
  dt-bindings: clk: r7s72100: Add missing I and G clocks
  ARM: dts: sh73a0: Add clocks for CA9 CPU cores
  ARM: dts: r8a7794: Add missing clock for secondary CA7 CPU core
  ARM: dts: r8a7793: Add missing clock for secondary CA15 CPU core
  ARM: dts: r8a7792: Add missing clock for secondary CA15 CPU core
  ARM: dts: r8a7791: Add missing clock for secondary CA15 CPU core
  ARM: dts: r8a7790: Add clocks for CA7 CPU cores
  ARM: dts: r8a7790: Add missing clocks for secondary CA15 CPU cores
  ARM: dts: r8a7779: Add clocks for CA9 CPU cores
  ARM: dts: r8a7778: Add clock for CA9 CPU core
  ARM: dts: r8a7743: Add missing clock for secondary CA15 CPU core
  ARM: dts: r8a73a4: Add clock for CA15 CPU0 core
  ARM: dts: r8a7794: Use R-Car GPIO Gen2 fallback compat string
  ARM: dts: r8a7793: Use R-Car GPIO Gen2 fallback compat string
  ARM: dts: r8a7792: Use R-Car GPIO Gen2 fallback compat string
  ARM: dts: r8a7791: Use R-Car GPIO Gen2 fallback compat string
  ARM: dts: r8a7790: Use R-Car GPIO Gen2 fallback compat string
  ARM: dts: r8a7743: Use R-Car GPIO Gen2 fallback compat string
  ...
 2017-10-30 12:02:31 +01:00
Jordan Crouse
f97decac5f drm/msm: Support multiple ringbuffers 
Add the infrastructure to support the idea of multiple ringbuffers.
Assign each ringbuffer an id and use that as an index for the various
ring specific operations.

The biggest delta is to support legacy fences. Each fence gets its own
sequence number but the legacy functions expect to use a unique integer.
To handle this we return a unique identifier for each submission but
map it to a specific ring/sequence under the covers. Newer users use
a dma_fence pointer anyway so they don't care about the actual sequence
ID or ring.

The actual mechanics for multiple ringbuffers are very target specific
so this code just allows for the possibility but still only defines
one ringbuffer for each target family.

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
 2017-10-28 11:01:36 -04:00
Greg Kroah-Hartman
6bd5bb1ede phy: for 4.15 
*) Add support in phy core to perform phy calibration
  *) Return NULL for optional PHY's even if CONFIG_GENERIC_PHY is not selected
  *) Add USB Phy driver for Broadcom STB SoCs
  *) Add support to force mediatek PHY with USB OTG function to enter
     a specific mode
  *) Calibrate rockchip-typec PHY according to docs
  *) Enable dual route feature for sun4i-usb in V3s SoC
  *) Use dr_mode dt property to enable otg capability in rcar-gen3-usb2
  *) Add driver data to specify dedicated otg pins in rcar-gen3-usb2 driver
  *) Configure the RX equalizer of brcm-sata PHY
  *) Update pcie phy settings for ti-pipe3 phy
  *) Add set_mode callback in qcom-ufs-qmp-14nm phy
  *) Use PHY callbacks in phy-qcom-ufs instead of export APIs
 
 Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJZ8HRDAAoJEA5ceFyATYLZyFAP/R8kN02DtuvPTzXxgGYli1kC
 CNpFYBGwL4rq39C/zT7+8xBXamwCOpPWqQJ6M0HgkD3XX1Vg6htH0VdvND9nZsPk
 oSDenxPkDELyM6k5OqjGdWQCBEZdvoZqGHtuIsk4ZrZKVajvqBPAG2WI8tVBpiPL
 27mwm/5QpXzXfNm1k8onXDqTpSBGmY1EcNvIgmon2Zl/qkWoKuNTpOv3w6JE/ktt
 YOxg9ScQCyw1LYx82hKF86aq0M9nQ5F+pN5o6c7oNFrotK5cE/Us3XTgKCVH+3sb
 wtbgHhDCCYeYShBr+msgPj8u8Jy596W6IcGFt2nuIm+ATL/qBZQyhSUtfzqPEf6k
 ShtJ05jTUHrM16jVDf+nDIkv9ENeSsUOoDJ7FKo4ht0miBE5fD3tmLcXP5NfOla6
 PMJN4g+TF/5Ym6eB0mtlq41V5aBInbBr07wD+WFp4uNgdtBHVSRz0yRA2CNIZpww
 dhjoiAPjOeJlIeWMDJni7cvU6eAEV1hXRHB0+hPa0lQU3B7t4hZaROypzIwJd7Fu
 ZUetYfcKCmViRinr8O6Ym4DhMatlxPSLgD2R6VQhGYtThUEO57oLBPv5XMzAthwi
 PkigsXaO9fDCodECcNDO/PD0Zc6tUugRmiiD/UhVpSCQ+X1EsdYSrYBYtSwwMauC
 DqNvwPo3MExkMjFs68ZU
 =VvPn
 -----END PGP SIGNATURE-----

Merge tag 'phy-for-4.15_v1' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy into usb-next

Kishon writes:

phy: for 4.15

 *) Add support in phy core to perform phy calibration
 *) Return NULL for optional PHY's even if CONFIG_GENERIC_PHY is not selected
 *) Add USB Phy driver for Broadcom STB SoCs
 *) Add support to force mediatek PHY with USB OTG function to enter
    a specific mode
 *) Calibrate rockchip-typec PHY according to docs
 *) Enable dual route feature for sun4i-usb in V3s SoC
 *) Use dr_mode dt property to enable otg capability in rcar-gen3-usb2
 *) Add driver data to specify dedicated otg pins in rcar-gen3-usb2 driver
 *) Configure the RX equalizer of brcm-sata PHY
 *) Update pcie phy settings for ti-pipe3 phy
 *) Add set_mode callback in qcom-ufs-qmp-14nm phy
 *) Use PHY callbacks in phy-qcom-ufs instead of export APIs

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
 2017-10-27 11:52:46 +02:00
Stephen Boyd
faa865f18c clk/samsung updates for v4.15 
Overall clk/samsung clean up and fixes. Removed remaining unused code
 after removal of exynos4212 SoC support; dropped internal data structure
 fields and related code for registering clkdev lookup entry for each
 possible clock object, clkdev aliases could still be defined if needed
 in a separate table; other minor fixes of the clock tree definitions.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABCAAGBQJZ4K7OAAoJEE1bIKeAnHqLlFUP/12Mnb3KIeO4WvNewZupUETd
 2BWpPHMS/4Al216I+RAZIgBU5lxx9xv0lMUeSfOWXwPMh/xReCY3SQ3N11KTE6DW
 6PwZpXtkYUyJ9sakVMNonczljfuWKFleRBscqPy3DH2S1vzG611lmmE8QvMmie2O
 shKrRQOwN7lWIGSQFdu1aSa/9OsHM9xsmgGGcAWMcpXTm26/nZ4EZxd7OU3nB39G
 fBzqjIP8hrvDKUi4b4+5uQxaXTYN8HKTmteWJzlXtXglVR55Wu7DmXXK4eFDLsmh
 iE3lkUnFK2cgkQjANJeeF/GK19ZvIVjlzEGX66IrAUG8qTDSgLDCWJRxW6qwm9jl
 KrSyC4d1D6GfymcVWUe8drixdeimVpOxyg/FCzyJXA8jkWUfwJJvi4eqJ3inPbh7
 5fv84bTxm4xOhWYOLWu4r0Z9GvxDl/DyeW5tJhkGh7ZSWBWng9f2FDZp9aloJf4K
 DPopqAt5e+8NCe1jyKCNLdDrZxlHp7xyYu+n/xTAVOxS/BZJ+bKvuGIp6b39dzhB
 LMdTwwuwDCneEINROH09FqqH7y+HqyG2vR7cFaiShzP02OE0YGu20WlhRykzajFj
 XhXwfDiGzgTiLjuCS3BbtuYlgFxWAmjo81/3nuJ8MTZYDaXLWuaGCWHYvSc2+oFy
 AiNNDhap38/ed2cLdsgl
 =VHBX
 -----END PGP SIGNATURE-----

Merge tag 'clk-v4.15-samsung' of git://git.kernel.org/pub/scm/linux/kernel/git/snawrocki/clk into clk-next

Pull Samsung clk driver updates from Sylwester Nawrocki:

Overall clk/samsung clean up and fixes. Removed remaining unused code
after removal of exynos4212 SoC support; dropped internal data structure
fields and related code for registering clkdev lookup entry for each
possible clock object, clkdev aliases could still be defined if needed
in a separate table; other minor fixes of the clock tree definitions.

* tag 'clk-v4.15-samsung' of git://git.kernel.org/pub/scm/linux/kernel/git/snawrocki/clk:
  clk: samsung: Remove obsolete clkdev alias support
  clk: samsung: Add explicit MPLL, EPLL clkdev aliases in S3C2443 driver
  clk: samsung: Rework clkdev alias handling in S3C2443 driver
  clk: samsung: Rework clkdev alias handling in Exynos5440 driver
  clk: samsung: Drop useless alias in Exynos5420 clk driver
  clk: samsung: Remove clkdev alias support in Exynos5250 clk driver
  clk: samsung: Remove double assignment of CLK_ARM_CLK in Exynos4 driver
  clk: samsung: Remove clkdev alias support in Exynos4 clk driver
  clk: samsung: Remove support for obsolete Exynos4212 CPU clock
  clk: samsung: Remove support for Exynos4212 SoCs in Exynos CLKOUT driver
  clk: samsung: Properly propagate flags in __PLL macro
  clk: samsung: Fix m2m scaler clock on Exynos542x
  clk: samsung: Delete a memory allocation error message in clk-cpu.c
 2017-10-25 02:37:03 -07:00
Masahiro Yamada
1c59d04505 dt-bindings: gpio: uniphier: add UniPhier GPIO binding 
This GPIO controller is used on UniPhier SoC family.

The vendor specific property "socionext,interrupt-ranges" is for
specifying interrupt mapping to the parent interrupt controller
because the mapping is not contiguous.  It works like "ranges",
but transforms "interrupts" instead of "reg".

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2017-10-23 10:36:58 +02:00
Vivek Gautam
55b20e8de9 dt-bindings: phy: Add PHY_TYPE_UFS definition 
Add definition for UFS phy type.

Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
 2017-10-23 11:19:27 +05:30
Neil Armstrong
4cf8f811c6 clk: meson: gxbb: Add VPU and VAPB clockids 
Add the clkids for the clocks feeding the Video Processing Unit.

Acked-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
 2017-10-20 10:24:30 +02:00
Andrew Jeffery
2cbfca66ba gpio: Fix loose spelling 
Literally.

I expect "lose" was meant here, rather than "loose", though you could feasibly
use a somewhat uncommon definition of "loose" to mean what would be meant by
"lose": "Loose the hounds" for instance, as in "Release the hounds".
Substituting in "value" for "hounds" gives "release the value", and makes some
sense, but futher substituting back to loose gives "loose the value" which
overall just seems a bit anachronistic.

Instead, use modern, pragmatic English and save a character.

Cc: Russell Currey <ruscur@russell.cc>
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2017-10-20 09:37:32 +02:00
Arnd Bergmann
092283190a Device tree changes for omaps for v4.15 merge window to improve 
support for omap35xx-evm, am34xx-epos-evm and dra7:
 
 - A series of changes to fix support for omap35xx-evm
 
 - A series of changes to add earlycon support for n8x0, pandaboard
   and omap5 boards
 
 - A series of changes for am43xx-epos-evm pinctrl modes for default
   and sleep states
 
 - A series of changes to correct pbias regulator voltage for dra7
   from 3V to 3.3V
 
 - Use microchip compatible instead of deprecated mcp compatible for
   mcp23017
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAlng604RHHRvbnlAYXRv
 bWlkZS5jb20ACgkQG9Q+yVyrpXPLCQ//cPpaHUB7wW0jKLVX3J0cUQt5lWjNv/16
 3W/ap6TPIwNmkdeF8YySt22exHNXtgPjd6XuIK5MPfx5B/4Z1llEjet4kjb01Jmw
 j2A7QeQln0lqWfAXux4Rw7G7bnmN8Zsph8BYKz5K2vYfAca1Y+xhlNPRRSmsD7Wx
 +zHR87eKQ+WEL8x+7iBnw5tgqKvdKVyqmkKHm1y/Hr4DqewuOTgvVZJ6FnxG6hGA
 PeNnQrM1GOLGxU28tlROuGnaUTT1knBQcoJy2lWwxx4on2S/XzAMcetEq8e0RR2C
 0WOotWAQPSPicncr17Gmx7kNewcAwJ+bnNmbkXsuIsGksOkcil+Q+H0Y5gzImYQu
 XBRbuhLwqrFxqSfOyQIppFa0w5KGF7Mm9zTyjaO9DshpTny9gwsxJK2r0rh6ucbq
 Rt3WuJmJwdMZ9XT8iBRJonkGle4Q6dmtuHu0pqlJzjclfLwvLUoxNZwc0k0e5g2f
 a/PGNUj0rqSo6AgUfjlvQU8M/f3T9X0bRIIE7zWbIo8P0qxJPUDBnz+CHHADVD4G
 Yn/rM1omIfcMCIOKiY3l53Nclr6Nld2U1Mg4tMiG32AkE8lefU4q1dlfUblO/Vrw
 wAAoG54IMH4ekv5ljSeAKR0cB+a6PzlLwZivwZaN9/mUuMBRYlFSQEhRD1KdhZbR
 L/c9isoMAqk=
 =xWf5
 -----END PGP SIGNATURE-----

Merge tag 'omap-for-v4.15/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt

Pull "device tree changes for omaps for v4.15 merge window" from Tony Lindgren:

Device tree changes for omaps for v4.15 merge window to improve
support for omap35xx-evm, am34xx-epos-evm and dra7:

- A series of changes to fix support for omap35xx-evm

- A series of changes to add earlycon support for n8x0, pandaboard
  and omap5 boards

- A series of changes for am43xx-epos-evm pinctrl modes for default
  and sleep states

- A series of changes to correct pbias regulator voltage for dra7
  from 3V to 3.3V

- Use microchip compatible instead of deprecated mcp compatible for
  mcp23017

* tag 'omap-for-v4.15/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (22 commits)
  ARM: dts: omap3: Replace deprecated mcp prefix
  ARM: dts: dra7-evm: Move pcie RC node to common file
  ARM: dts: omap5: Increase max-voltage of pbias regulator
  ARM: dts: dra7: Increase max-voltage of pbias regulator
  ARM: dts: am43xx-epos-evm: Add default pinmux for unused pins
  ARM: dts: am43xx-epos-evm: Add default and sleep pinmux for usb2_phy1 and usb2_phy2
  ARM: dts: am43xx-epos-evm: Add default and sleep pinmux for uart0
  ARM: dts: am43xx-epos-evm: Add default and sleep pinmux for matrix_keypad0
  ARM: dts: am43xx-epos-evm: Add sleep pinmux for mmc1
  ARM: dts: am43xx-epos-evm: Add sleep pinmux for pixcir_ts
  ARM: dts: am43xx-epos-evm: Add sleep pinmux for gpmc
  ARM: dts: am43xx-epos-evm: Add sleep pinmux for ecap0
  ARM: dts: am43xx-epos-evm: Add sleep pinmux for qspi1
  ARM: dts: am43xx-epos-evm: Add sleep pinmux for spi0 and spi1
  ARM: dts: am43xx: Introduce additional pinmux definitions for DS0
  ARM: dts: Configure earlycon for omap5-common
  ARM: dts: Configure earlycon for pandaboard
  ARM: dts: Configure earlycon for n8x0
  ARM: dts: omap3-evm: Add DSS {vdds_dsi,vdda_video}-supply references
  ARM: dts: omap3: Add Sharp LS037V7DW01 'envdd' supply
  ...
 2017-10-20 00:45:19 +02:00
Arnd Bergmann
7d738dbbe2 Merge tag 'stm32-dt-for-v4.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into next/soc 
Pull "STM32 DT updates for v4.15, round 1" from Alexandre Torgue:

Highlights:
----------
 -Add I2C1 support on STM32F746 SoC
 -Enable I2C1 on STM32F746 eval board
 -Add Timers support on STM32F746 SoC
 -Add USB HS and FS supports on STM32F746 Soc
 -Enable USB HS on STM32F746 disco and eval boards
 -Enable USB FS en STM32F746 disco board
 -Add Vrefbuf to STM32H743 SoC
 -Add LPTIMERS support on STM32H743 SoC
 -Add DMAMUX support on STM32H743 SoC
 -Enable STM32H743 clock driver
 -Add MDMA support on STM32H743 SoC
 -Change pinctrl pinmux entries for all SoC.

* tag 'stm32-dt-for-v4.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
  ARM: dts: stm32: Add MDMA support for STM32H743 SoC
  ARM: dts: stm32: Enable USB FS on stm32f746-disco
  ARM: dts: stm32: Add USB FS support for STM32F746 MCU
  ARM: dts: stm32: Enable USB HS on stm32f746-disco
  ARM: dts: stm32: Enable USB HS on stm32746g-eval
  ARM: dts: stm32: Add USB HS support for STM32F746 MCU
  ARM: dts: stm32: change pinctrl bindings definition
  ARM: dts: stm32: Enable STM32H743 clock driver
  ARM: dts: stm32: fix hse clock frequency on STM32H743 Eval board
  ARM: dts: stm32: add Timers driver for stm32f746 MCU
  ARM: dts: stm32: Add DMAMUX support for STM32H743 SoC
  ARM: dts: stm32: Add lptimer definitions to stm32h743
  ARM: dts: stm32: add vrefbuf to stm32h743
  ARM: dts: stm32: Add I2C1 support for STM32F746 eval board
  ARM: dts: stm32: Add I2C1 support for STM32F746 SoC
 2017-10-20 00:39:00 +02:00
Arnd Bergmann
c305cf3388 Merge tag 'renesas-dt-bindings-for-v4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc 
Pull "Renesas ARM Based SoC DT Bindings Updates for v4.15" from Simon Horman:

* Consistently do not use ';' in documentation of compat strings
  for boards. A misture of using and not using a trailing ';' had
  krept in over time with not using being dominant.

* Document bindings for
  - Eagle board and r8a77970 (V3M) SoC bindings.
    Eagle is a board for the V3M SoC
  - Document Kingfisher board bindings.
    Kingfisher is an extension board for the H3ULCB and M3ULCB boards.

* Add r8a77970 (V3M) SYSC power domain definitions

  Add macros usable by the device tree sources to reference r8a77970 SYSC
  power domains by index.

* Add Renesas SoC DT bindings doc to Renesas ARM section of MAINTAINERS file

* Drop bogus node name suffix from example of /renesas,dw-hdmi binding

* Document APMU and SMP enable method for r8a7745 (RZ/G1E) SoC

* tag 'renesas-dt-bindings-for-v4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: remove inconsistent ; from documentation
  arm64: renesas: document Eagle board bindings
  arm: shmobile: Document Kingfisher board DT bindings
  dt-bindings: power: add R8A77970 SYSC power domain definitions
  MAINTAINERS: Add Renesas SoC DT bindings doc to Renesas ARM sections
  ARM: shmobile: Document R-Car V3M SoC DT bindings
  dt-bindings: display: renesas: dw-hdmi: Drop bogus node name suffix
  dt-bindings: apmu: Document r8a7745 support
 2017-10-20 00:38:00 +02:00
Mikko Perttunen
3e09b155d5 dt-bindings: Add bindings for nvidia,tegra186-bpmp-thermal 
In Tegra186, the BPMP (Boot and Power Management Processor) implements
an interface that is used to read system temperatures, including CPU
cluster and GPU temperatures. This binding describes the thermal sensor
that is exposed by BPMP.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
 2017-10-19 16:26:22 +02:00
Jonathan Liu
4328a2186e clk: sunxi-ng: sun4i: Export video PLLs 
The video PLLs are used directly by the HDMI controller. Export them so
that we can use them in our DT node.

Signed-off-by: Jonathan Liu <net147@gmail.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
 2017-10-17 19:32:16 +02:00
Thierry Reding
4d1dc40185 dt-bindings: clock: tegra: Add sor1_out clock 
The sor1_src clock implemented on Tegra210 is modelled the wrong way
around, which causes some issues with HDMI and DP support. This clock
implementation is provided by BPMP on Tegra186, which models this in
a more correct way. Since this introduces incompatibilities between
the two SoC generations which we want to avoid, the Tegra210 will be
fixed in subsequent patches.

This change adds sor1_out as an alias for sor1_src.

Signed-off-by: Thierry Reding <treding@nvidia.com>
 2017-10-17 13:31:10 +02:00
Alexandre Torgue
162d58c26d ARM: dts: stm32: change pinctrl bindings definition 
Initially each pin was declared in "include/dt-bindings/stm32<SOC>-pinfunc.h"
and each definition contained SOC names (ex: STM32F429_PA9_FUNC_USART1_TX).
Since this approach was approved, the number of supported MCU has
increased (STM32F429/STM32F469/STM32f746/STM32H743). To avoid to add a new
file in "include/dt-bindings" each time a new STM32 SOC arrives I propose
a new approach which consist to use a macro to define pin muxing in device
tree. All STM32 will use the common macro to define pinmux. Furthermore, it
will make STM32 maintenance and integration of new SOC easier .

Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
Reviewed-by: Vikas MANOCHA <vikas.manocha@st.com>
Reviewed-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
 2017-10-16 14:01:25 +02:00
Geert Uytterhoeven
44842cc8a8 dt-bindings: clk: r7s72100: Add missing I and G clocks 
Add the missing definitions for the I (CPU) and G (Image Processing)
clocks, so these clocks can be referred to from device nodes in DT.

Note that these clocks are already fully supported otherwise (DT
bindings, Linux driver, r7s72100.dtsi), they were just omitted from the
header file.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2017-10-16 11:51:10 +02:00
Marek Szyprowski
8ca8ac1024 clk: samsung: Add dt bindings for Exynos4412 ISP clock controller 
Some registers for the Exynos 4412 ISP (Camera subsystem) clocks are
located in the ISP power domain. Because those registers are also
located in a different memory region than the main clock controller,
support for them can be provided by a separate clock controller.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
 2017-10-16 11:25:35 +02:00
Heiko Stuebner
4e07533f30 clk: rockchip: add more rk3188 graphics clock ids 
Add ids for cif, v{d/e}pu clocks on rk3188. ACLK_CIF does get a needed
1 at it's end but that should be safe because no driver for the camera
interface has surfaced so far and the old vendor kernels for these socs
are based on linux-3.0 and still used board files then, so there really
are no previous users anywhere to be found.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2017-10-14 21:30:22 +02:00