forked from Minki/linux
Device tree changes for omaps for v4.15 merge window to improve
support for omap35xx-evm, am34xx-epos-evm and dra7: - A series of changes to fix support for omap35xx-evm - A series of changes to add earlycon support for n8x0, pandaboard and omap5 boards - A series of changes for am43xx-epos-evm pinctrl modes for default and sleep states - A series of changes to correct pbias regulator voltage for dra7 from 3V to 3.3V - Use microchip compatible instead of deprecated mcp compatible for mcp23017 -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAlng604RHHRvbnlAYXRv bWlkZS5jb20ACgkQG9Q+yVyrpXPLCQ//cPpaHUB7wW0jKLVX3J0cUQt5lWjNv/16 3W/ap6TPIwNmkdeF8YySt22exHNXtgPjd6XuIK5MPfx5B/4Z1llEjet4kjb01Jmw j2A7QeQln0lqWfAXux4Rw7G7bnmN8Zsph8BYKz5K2vYfAca1Y+xhlNPRRSmsD7Wx +zHR87eKQ+WEL8x+7iBnw5tgqKvdKVyqmkKHm1y/Hr4DqewuOTgvVZJ6FnxG6hGA PeNnQrM1GOLGxU28tlROuGnaUTT1knBQcoJy2lWwxx4on2S/XzAMcetEq8e0RR2C 0WOotWAQPSPicncr17Gmx7kNewcAwJ+bnNmbkXsuIsGksOkcil+Q+H0Y5gzImYQu XBRbuhLwqrFxqSfOyQIppFa0w5KGF7Mm9zTyjaO9DshpTny9gwsxJK2r0rh6ucbq Rt3WuJmJwdMZ9XT8iBRJonkGle4Q6dmtuHu0pqlJzjclfLwvLUoxNZwc0k0e5g2f a/PGNUj0rqSo6AgUfjlvQU8M/f3T9X0bRIIE7zWbIo8P0qxJPUDBnz+CHHADVD4G Yn/rM1omIfcMCIOKiY3l53Nclr6Nld2U1Mg4tMiG32AkE8lefU4q1dlfUblO/Vrw wAAoG54IMH4ekv5ljSeAKR0cB+a6PzlLwZivwZaN9/mUuMBRYlFSQEhRD1KdhZbR L/c9isoMAqk= =xWf5 -----END PGP SIGNATURE----- Merge tag 'omap-for-v4.15/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt Pull "device tree changes for omaps for v4.15 merge window" from Tony Lindgren: Device tree changes for omaps for v4.15 merge window to improve support for omap35xx-evm, am34xx-epos-evm and dra7: - A series of changes to fix support for omap35xx-evm - A series of changes to add earlycon support for n8x0, pandaboard and omap5 boards - A series of changes for am43xx-epos-evm pinctrl modes for default and sleep states - A series of changes to correct pbias regulator voltage for dra7 from 3V to 3.3V - Use microchip compatible instead of deprecated mcp compatible for mcp23017 * tag 'omap-for-v4.15/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (22 commits) ARM: dts: omap3: Replace deprecated mcp prefix ARM: dts: dra7-evm: Move pcie RC node to common file ARM: dts: omap5: Increase max-voltage of pbias regulator ARM: dts: dra7: Increase max-voltage of pbias regulator ARM: dts: am43xx-epos-evm: Add default pinmux for unused pins ARM: dts: am43xx-epos-evm: Add default and sleep pinmux for usb2_phy1 and usb2_phy2 ARM: dts: am43xx-epos-evm: Add default and sleep pinmux for uart0 ARM: dts: am43xx-epos-evm: Add default and sleep pinmux for matrix_keypad0 ARM: dts: am43xx-epos-evm: Add sleep pinmux for mmc1 ARM: dts: am43xx-epos-evm: Add sleep pinmux for pixcir_ts ARM: dts: am43xx-epos-evm: Add sleep pinmux for gpmc ARM: dts: am43xx-epos-evm: Add sleep pinmux for ecap0 ARM: dts: am43xx-epos-evm: Add sleep pinmux for qspi1 ARM: dts: am43xx-epos-evm: Add sleep pinmux for spi0 and spi1 ARM: dts: am43xx: Introduce additional pinmux definitions for DS0 ARM: dts: Configure earlycon for omap5-common ARM: dts: Configure earlycon for pandaboard ARM: dts: Configure earlycon for n8x0 ARM: dts: omap3-evm: Add DSS {vdds_dsi,vdda_video}-supply references ARM: dts: omap3: Add Sharp LS037V7DW01 'envdd' supply ...
This commit is contained in:
commit
092283190a
@ -75,6 +75,9 @@
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compatible = "gpio-matrix-keypad";
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debounce-delay-ms = <5>;
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col-scan-delay-us = <2>;
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&matrix_keypad_default>;
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pinctrl-1 = <&matrix_keypad_sleep>;
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row-gpios = <&gpio0 12 GPIO_ACTIVE_HIGH /* Bank0, pin12 */
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&gpio0 13 GPIO_ACTIVE_HIGH /* Bank0, pin13 */
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@ -145,6 +148,43 @@
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};
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&am43xx_pinmux {
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pinctrl-names = "default";
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pinctrl-0 = <&unused_pins>;
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unused_pins: unused_pins {
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pinctrl-single,pins = <
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AM4372_IOPAD(0x848, DS0_PIN_OUTPUT_PULLUP | PIN_OUTPUT_PULLUP | MUX_MODE7)
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AM4372_IOPAD(0x850, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0x858, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0x860, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0x864, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0x868, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0x86c, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0x878, DS0_PIN_OUTPUT_PULLUP | PIN_OUTPUT_PULLUP | MUX_MODE7)
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AM4372_IOPAD(0x908, DS0_PIN_INPUT_PULLDOWN | PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0x91c, DS0_PIN_OUTPUT_PULLDOWN | PIN_OUTPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0x920, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0x9e0, DS0_PIN_INPUT_PULLDOWN | PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0xA0c, DS0_PIN_OUTPUT_PULLDOWN | PIN_OUTPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0xA38, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0xA3c, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0xA40, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0xA44, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0xA48, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0xA4c, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0xA50, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0xA54, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0xA58, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0xA5c, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0xA60, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0xA64, DS0_PIN_OUTPUT_PULLUP | PIN_OUTPUT_PULLUP | MUX_MODE7)
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AM4372_IOPAD(0xA68, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0xA6C, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0xA74, DS0_PIN_INPUT_PULLDOWN | PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0xA78, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
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>;
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};
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cpsw_default: cpsw_default {
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pinctrl-single,pins = <
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/* Slave 1 */
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@ -198,7 +238,7 @@
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>;
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};
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nand_flash_x8: nand_flash_x8 {
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nand_flash_x8_default: nand_flash_x8_default {
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pinctrl-single,pins = <
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AM4372_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a0.SELQSPIorNAND/GPIO */
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AM4372_IOPAD(0x800, PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
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@ -219,12 +259,39 @@
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>;
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};
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ecap0_pins: backlight_pins {
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nand_flash_x8_sleep: nand_flash_x8_sleep {
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pinctrl-single,pins = <
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AM4372_IOPAD(0x840, DS0_PIN_OUTPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0x800, DS0_PIN_OUTPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0x804, DS0_PIN_OUTPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0x808, DS0_PIN_OUTPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0x80c, DS0_PIN_OUTPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0x810, DS0_PIN_OUTPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0x814, DS0_PIN_OUTPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0x818, DS0_PIN_OUTPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0x81c, DS0_PIN_OUTPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0x870, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
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AM4372_IOPAD(0x874, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
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AM4372_IOPAD(0x87c, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
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AM4372_IOPAD(0x890, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
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AM4372_IOPAD(0x894, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
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AM4372_IOPAD(0x898, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
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AM4372_IOPAD(0x89c, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
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>;
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};
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ecap0_pins_default: backlight_pins_default {
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pinctrl-single,pins = <
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AM4372_IOPAD(0x964, MUX_MODE0) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
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>;
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};
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ecap0_pins_sleep: backlight_pins_sleep {
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pinctrl-single,pins = <
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AM4372_IOPAD(0x964, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
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>;
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};
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i2c2_pins: pinmux_i2c2_pins {
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pinctrl-single,pins = <
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AM4372_IOPAD(0x9c0, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE8) /* i2c2_sda.i2c2_sda */
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@ -232,7 +299,7 @@
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>;
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};
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spi0_pins: pinmux_spi0_pins {
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spi0_pins_default: pinmux_spi0_pins_default {
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pinctrl-single,pins = <
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AM4372_IOPAD(0x950, PIN_INPUT | MUX_MODE0) /* spi0_clk.spi0_clk */
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AM4372_IOPAD(0x954, PIN_OUTPUT | MUX_MODE0) /* spi0_d0.spi0_d0 */
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@ -241,7 +308,16 @@
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>;
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};
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spi1_pins: pinmux_spi1_pins {
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spi0_pins_sleep: pinmux_spi0_pins_sleep {
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pinctrl-single,pins = <
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AM4372_IOPAD(0x950, DS0_PIN_OUTPUT_PULLUP | PIN_OUTPUT_PULLUP | MUX_MODE7)
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AM4372_IOPAD(0x954, DS0_PIN_OUTPUT_PULLUP | PIN_OUTPUT_PULLUP | MUX_MODE7)
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AM4372_IOPAD(0x958, DS0_PIN_OUTPUT_PULLUP | PIN_OUTPUT_PULLUP | MUX_MODE7)
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AM4372_IOPAD(0x95c, DS0_PIN_OUTPUT_PULLUP | PIN_OUTPUT_PULLUP | MUX_MODE7)
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>;
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};
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spi1_pins_default: pinmux_spi1_pins_default {
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pinctrl-single,pins = <
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AM4372_IOPAD(0x990, PIN_INPUT | MUX_MODE3) /* mcasp0_aclkx.spi1_clk */
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AM4372_IOPAD(0x994, PIN_OUTPUT | MUX_MODE3) /* mcasp0_fsx.spi1_d0 */
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@ -250,13 +326,54 @@
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>;
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};
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mmc1_pins: pinmux_mmc1_pins {
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spi1_pins_sleep: pinmux_spi1_pins_sleep {
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pinctrl-single,pins = <
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AM4372_IOPAD(0x990, DS0_PIN_OUTPUT_PULLDOWN | PIN_OUTPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0x994, DS0_PIN_OUTPUT_PULLDOWN | PIN_OUTPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0x998, DS0_PIN_OUTPUT_PULLDOWN | PIN_OUTPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0x99c, DS0_PIN_OUTPUT_PULLDOWN | PIN_OUTPUT_PULLDOWN | MUX_MODE7)
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>;
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};
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mmc1_pins_default: pinmux_mmc1_pins_default {
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pinctrl-single,pins = <
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AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
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>;
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};
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qspi1_default: qspi1_default {
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mmc1_pins_sleep: pinmux_mmc1_pins_sleep {
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pinctrl-single,pins = <
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AM4372_IOPAD(0x960, DS0_PIN_OUTPUT_PULLUP | PIN_INPUT | MUX_MODE7)
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>;
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};
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matrix_keypad_default: matrix_keypad_default {
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pinctrl-single,pins = <
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AM4372_IOPAD(0x92c, PIN_OUTPUT | MUX_MODE7) /* mii1_tx_clk.gpio3_9 */
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AM4372_IOPAD(0x930, PIN_OUTPUT | MUX_MODE7) /* mii1_rx_clk.gpio3_10 */
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AM4372_IOPAD(0x934, PIN_OUTPUT | MUX_MODE7) /* mii1_rxd3.gpio2_18 */
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AM4372_IOPAD(0x938, PIN_OUTPUT | MUX_MODE7) /* mii1_rxd2.gpio2_19 */
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AM4372_IOPAD(0x978, PIN_INPUT_PULLDOWN | MUX_MODE7) /* uart1_ctsn.gpio0_12 */
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AM4372_IOPAD(0x97C, PIN_INPUT_PULLDOWN | MUX_MODE7) /* uart1_rtsn.gpio0_13 */
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AM4372_IOPAD(0x980, PIN_INPUT_PULLDOWN | MUX_MODE7) /* uart1_rxd.gpio0_14 */
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AM4372_IOPAD(0x984, PIN_INPUT_PULLDOWN | MUX_MODE7) /* uart1_txd.gpio0_15 */
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>;
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};
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matrix_keypad_sleep: matrix_keypad_sleep {
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pinctrl-single,pins = <
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AM4372_IOPAD(0x92c, PIN_INPUT_PULLUP | MUX_MODE7)
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AM4372_IOPAD(0x930, PIN_INPUT_PULLUP | MUX_MODE7)
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AM4372_IOPAD(0x934, PIN_INPUT_PULLUP | MUX_MODE7)
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AM4372_IOPAD(0x938, PIN_INPUT_PULLUP | MUX_MODE7)
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AM4372_IOPAD(0x978, PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0x97C, PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0x980, PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0x984, PIN_INPUT_PULLDOWN | MUX_MODE7)
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>;
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};
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qspi1_pins_default: qspi1_pins_default {
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pinctrl-single,pins = <
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AM4372_IOPAD(0x87c, PIN_INPUT_PULLUP | MUX_MODE3)
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AM4372_IOPAD(0x888, PIN_INPUT_PULLUP | MUX_MODE2)
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@ -267,12 +384,29 @@
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>;
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};
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pixcir_ts_pins: pixcir_ts_pins {
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qspi1_pins_sleep: qspi1_pins_sleep {
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pinctrl-single,pins = <
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AM4372_IOPAD(0x87c, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
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AM4372_IOPAD(0x888, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
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AM4372_IOPAD(0x890, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
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AM4372_IOPAD(0x894, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
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AM4372_IOPAD(0x898, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
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AM4372_IOPAD(0x89c, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
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>;
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};
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pixcir_ts_pins_default: pixcir_ts_pins_default {
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pinctrl-single,pins = <
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AM4372_IOPAD(0x844, PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_a1.gpio1_17 */
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>;
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};
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pixcir_ts_pins_sleep: pixcir_ts_pins_sleep {
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pinctrl-single,pins = <
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AM4372_IOPAD(0x844, DS0_PIN_OUTPUT_PULLUP | PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a1.gpio1_17 */
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>;
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};
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hdq_pins: pinmux_hdq_pins {
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pinctrl-single,pins = <
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AM4372_IOPAD(0xa34, PIN_INPUT_PULLUP | MUX_MODE1) /* cam1_wen.hdq_gpio */
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@ -355,6 +489,48 @@
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>;
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};
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uart0_pins_default: uart0_pins_default {
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pinctrl-single,pins = <
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AM4372_IOPAD(0x968, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE0) /* uart0_ctsn.uart0_ctsn */
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AM4372_IOPAD(0x96C, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE0) /* uart0_rtsn.uart0_rtsn */
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AM4372_IOPAD(0x970, PIN_INPUT_PULLUP | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0) /* uart0_rxd.uart0_rxd */
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AM4372_IOPAD(0x974, PIN_INPUT | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0) /* uart0_txd.uart0_txd */
|
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>;
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};
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uart0_pins_sleep: uart0_pins_sleep {
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pinctrl-single,pins = <
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AM4372_IOPAD(0x968, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
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AM4372_IOPAD(0x96C, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
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AM4372_IOPAD(0x970, PIN_INPUT_PULLUP | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0)
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AM4372_IOPAD(0x974, PIN_INPUT | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0)
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>;
|
||||
};
|
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|
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usb2_phy1_default: usb2_phy1_default {
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pinctrl-single,pins = <
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AM4372_IOPAD(0xac0, PIN_INPUT_PULLDOWN | MUX_MODE0)
|
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>;
|
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};
|
||||
|
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usb2_phy1_sleep: usb2_phy1_sleep {
|
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pinctrl-single,pins = <
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AM4372_IOPAD(0xac0, DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN | MUX_MODE7)
|
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>;
|
||||
};
|
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|
||||
usb2_phy2_default: usb2_phy2_default {
|
||||
pinctrl-single,pins = <
|
||||
AM4372_IOPAD(0xac4, PIN_INPUT_PULLDOWN | MUX_MODE0)
|
||||
>;
|
||||
};
|
||||
|
||||
usb2_phy2_sleep: usb2_phy2_sleep {
|
||||
pinctrl-single,pins = <
|
||||
AM4372_IOPAD(0xac4, DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
mcasp1_pins: mcasp1_pins {
|
||||
pinctrl-single,pins = <
|
||||
AM4372_IOPAD(0x9a0, PIN_INPUT_PULLDOWN | MUX_MODE3) /* MCASP0_ACLKR/MCASP1_ACLKX */
|
||||
@ -378,8 +554,9 @@
|
||||
status = "okay";
|
||||
vmmc-supply = <&vmmcsd_fixed>;
|
||||
bus-width = <4>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc1_pins>;
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&mmc1_pins_default>;
|
||||
pinctrl-1 = <&mmc1_pins_sleep>;
|
||||
cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
@ -478,8 +655,10 @@
|
||||
|
||||
pixcir_ts@5c {
|
||||
compatible = "pixcir,pixcir_tangoc";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pixcir_ts_pins>;
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&pixcir_ts_pins_default>;
|
||||
pinctrl-1 = <&pixcir_ts_pins_sleep>;
|
||||
|
||||
reg = <0x5c>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <17 IRQ_TYPE_EDGE_FALLING>;
|
||||
@ -550,8 +729,9 @@
|
||||
|
||||
&gpmc {
|
||||
status = "okay"; /* Disable QSPI when enabling GPMC (NAND) */
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&nand_flash_x8>;
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&nand_flash_x8_default>;
|
||||
pinctrl-1 = <&nand_flash_x8_sleep>;
|
||||
ranges = <0 0 0x08000000 0x01000000>; /* CS0 space. Min partition = 16MB */
|
||||
nand@0,0 {
|
||||
compatible = "ti,omap2-nand";
|
||||
@ -647,24 +827,30 @@
|
||||
|
||||
&ecap0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&ecap0_pins>;
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&ecap0_pins_default>;
|
||||
pinctrl-1 = <&ecap0_pins_sleep>;
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi0_pins>;
|
||||
status = "okay";
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&spi0_pins_default>;
|
||||
pinctrl-1 = <&spi0_pins_sleep>;
|
||||
};
|
||||
|
||||
&spi1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi1_pins>;
|
||||
status = "okay";
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&spi1_pins_default>;
|
||||
pinctrl-1 = <&spi1_pins_sleep>;
|
||||
};
|
||||
|
||||
&usb2_phy1 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&usb2_phy1_default>;
|
||||
pinctrl-1 = <&usb2_phy1_sleep>;
|
||||
};
|
||||
|
||||
&usb1 {
|
||||
@ -674,6 +860,9 @@
|
||||
|
||||
&usb2_phy2 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&usb2_phy2_default>;
|
||||
pinctrl-1 = <&usb2_phy2_sleep>;
|
||||
};
|
||||
|
||||
&usb2 {
|
||||
@ -683,8 +872,9 @@
|
||||
|
||||
&qspi {
|
||||
status = "disabled"; /* Disable GPMC (NAND) when enabling QSPI */
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&qspi1_default>;
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&qspi1_pins_default>;
|
||||
pinctrl-1 = <&qspi1_pins_sleep>;
|
||||
|
||||
spi-max-frequency = <48000000>;
|
||||
m25p80@0 {
|
||||
@ -770,6 +960,13 @@
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&uart0_pins_default>;
|
||||
pinctrl-1 = <&uart0_pins_sleep>;
|
||||
};
|
||||
|
||||
&mcasp1 {
|
||||
#sound-dai-cells = <0>;
|
||||
pinctrl-names = "default", "sleep";
|
||||
|
@ -256,3 +256,7 @@
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&pcie1_rc {
|
||||
status = "okay";
|
||||
};
|
||||
|
@ -497,7 +497,3 @@
|
||||
pinctrl-1 = <&dcan1_pins_sleep>;
|
||||
pinctrl-2 = <&dcan1_pins_default>;
|
||||
};
|
||||
|
||||
&pcie1_rc {
|
||||
status = "okay";
|
||||
};
|
||||
|
@ -170,7 +170,7 @@
|
||||
pbias_mmc_reg: pbias_mmc_omap5 {
|
||||
regulator-name = "pbias_mmc_omap5";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3000000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
};
|
||||
|
||||
|
@ -6,6 +6,10 @@
|
||||
reg = <0x80000000 0x8000000>; /* 128 MB */
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = &uart3;
|
||||
};
|
||||
|
||||
ocp {
|
||||
i2c0 {
|
||||
compatible = "i2c-cbus-gpio";
|
||||
|
@ -9,146 +9,11 @@
|
||||
|
||||
#include "omap36xx.dtsi"
|
||||
#include "omap3-evm-common.dtsi"
|
||||
|
||||
#include "omap3-evm-processor-common.dtsi"
|
||||
|
||||
/ {
|
||||
model = "TI OMAP37XX EVM (TMDSEVM3730)";
|
||||
compatible = "ti,omap3-evm-37xx", "ti,omap3630", "ti,omap3";
|
||||
|
||||
memory@80000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x10000000>; /* 256 MB */
|
||||
};
|
||||
|
||||
wl12xx_vmmc: wl12xx_vmmc {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&wl12xx_gpio>;
|
||||
};
|
||||
};
|
||||
|
||||
&dss {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <
|
||||
&dss_dpi_pins1
|
||||
&dss_dpi_pins2
|
||||
>;
|
||||
};
|
||||
|
||||
&hsusb2_phy {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&ehci_phy_pins>;
|
||||
};
|
||||
|
||||
&omap3_pmx_core {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&on_board_gpio_61 &hsusb2_pins>;
|
||||
|
||||
dss_dpi_pins1: pinmux_dss_dpi_pins2 {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
|
||||
OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
|
||||
OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */
|
||||
OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */
|
||||
|
||||
OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */
|
||||
OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */
|
||||
OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */
|
||||
OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */
|
||||
OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */
|
||||
OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */
|
||||
OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */
|
||||
OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */
|
||||
OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */
|
||||
OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */
|
||||
OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0) /* dss_data16.dss_data16 */
|
||||
OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0) /* dss_data17.dss_data17 */
|
||||
|
||||
OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE3) /* dss_data18.dss_data0 */
|
||||
OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE3) /* dss_data19.dss_data1 */
|
||||
OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE3) /* dss_data20.dss_data2 */
|
||||
OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE3) /* dss_data21.dss_data3 */
|
||||
OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE3) /* dss_data22.dss_data4 */
|
||||
OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE3) /* dss_data23.dss_data5 */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc1_pins: pinmux_mmc1_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x2144, PIN_OUTPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
|
||||
OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
|
||||
OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
|
||||
OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
|
||||
OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
|
||||
OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
|
||||
OMAP3_CORE1_IOPAD(0x2150, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat4.sdmmc1_dat4 */
|
||||
OMAP3_CORE1_IOPAD(0x2152, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat5.sdmmc1_dat5 */
|
||||
OMAP3_CORE1_IOPAD(0x2154, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat6.sdmmc1_dat6 */
|
||||
OMAP3_CORE1_IOPAD(0x2156, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat7.sdmmc1_dat7 */
|
||||
>;
|
||||
};
|
||||
|
||||
/* NOTE: Clocked externally, needs INPUT also for sdmmc2_clk.sdmmc2_clk */
|
||||
mmc2_pins: pinmux_mmc2_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
|
||||
OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
|
||||
OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
|
||||
OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
|
||||
OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
|
||||
OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
|
||||
>;
|
||||
};
|
||||
|
||||
uart3_pins: pinmux_uart3_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x219e, WAKEUP_EN | PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
|
||||
OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
|
||||
>;
|
||||
};
|
||||
|
||||
/* Devices are routed with gpmc_nbe1.gpio_61 to on-board devices */
|
||||
on_board_gpio_61: pinmux_ehci_port_select_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x20c8, PIN_OUTPUT | MUX_MODE4)
|
||||
>;
|
||||
};
|
||||
|
||||
/* Used by OHCI and EHCI. OHCI won't work without external phy */
|
||||
hsusb2_pins: pinmux_hsusb2_pins {
|
||||
pinctrl-single,pins = <
|
||||
|
||||
/* mcspi1_cs3.hsusb2_data2 */
|
||||
OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3)
|
||||
|
||||
/* mcspi2_clk.hsusb2_data7 */
|
||||
OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3)
|
||||
|
||||
/* mcspi2_simo.hsusb2_data4 */
|
||||
OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3)
|
||||
|
||||
/* mcspi2_somi.hsusb2_data5 */
|
||||
OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3)
|
||||
|
||||
/* mcspi2_cs0.hsusb2_data6 */
|
||||
OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3)
|
||||
|
||||
/* mcspi2_cs1.hsusb2_data3 */
|
||||
OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3)
|
||||
>;
|
||||
};
|
||||
|
||||
wl12xx_gpio: pinmux_wl12xx_gpio {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x2180, PIN_OUTPUT | MUX_MODE4) /* uart1_cts.gpio_150 */
|
||||
OMAP3_CORE1_IOPAD(0x217e, PIN_INPUT | MUX_MODE4) /* uart1_rts.gpio_149 */
|
||||
>;
|
||||
};
|
||||
|
||||
smsc911x_pins: pinmux_smsc911x_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x21d2, PIN_INPUT | MUX_MODE4) /* mcspi1_cs2.gpio_176 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&omap3_pmx_core2 {
|
||||
@ -191,74 +56,7 @@
|
||||
};
|
||||
};
|
||||
|
||||
&omap3_pmx_wkup {
|
||||
dss_dpi_pins2: pinmux_dss_dpi_pins1 {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_WKUP_IOPAD(0x2a0a, PIN_OUTPUT | MUX_MODE3) /* sys_boot0.dss_data18 */
|
||||
OMAP3_WKUP_IOPAD(0x2a0c, PIN_OUTPUT | MUX_MODE3) /* sys_boot1.dss_data19 */
|
||||
OMAP3_WKUP_IOPAD(0x2a10, PIN_OUTPUT | MUX_MODE3) /* sys_boot3.dss_data20 */
|
||||
OMAP3_WKUP_IOPAD(0x2a12, PIN_OUTPUT | MUX_MODE3) /* sys_boot4.dss_data21 */
|
||||
OMAP3_WKUP_IOPAD(0x2a14, PIN_OUTPUT | MUX_MODE3) /* sys_boot5.dss_data22 */
|
||||
OMAP3_WKUP_IOPAD(0x2a16, PIN_OUTPUT | MUX_MODE3) /* sys_boot6.dss_data23 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc1_pins>;
|
||||
};
|
||||
|
||||
&mmc2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc2_pins>;
|
||||
};
|
||||
|
||||
&mmc3 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
interrupts-extended = <&intc 72 &omap3_pmx_core OMAP3_UART1_RX>;
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
interrupts-extended = <&intc 73 &omap3_pmx_core OMAP3_UART2_RX>;
|
||||
};
|
||||
|
||||
&uart3 {
|
||||
interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart3_pins>;
|
||||
};
|
||||
|
||||
/*
|
||||
* GPIO_61 (nUSB2_EN_1V8) must be low to enable on-board EHCI USB2 interface
|
||||
* for bus switch SN74CB3Q3384A, level-shifter SN74AVC16T245DGGR, and 1.8V.
|
||||
*/
|
||||
&gpio2 {
|
||||
en_usb2_port {
|
||||
gpio-hog;
|
||||
gpios = <29 GPIO_ACTIVE_HIGH>; /* gpio_61 */
|
||||
output-low;
|
||||
line-name = "enable usb2 port";
|
||||
};
|
||||
};
|
||||
|
||||
/* T2_GPIO_2 low to route GPIO_61 to on-board devices */
|
||||
&twl_gpio {
|
||||
en_on_board_gpio_61 {
|
||||
gpio-hog;
|
||||
gpios = <2 GPIO_ACTIVE_HIGH>;
|
||||
output-low;
|
||||
line-name = "en_hsusb2_clk";
|
||||
};
|
||||
};
|
||||
|
||||
&gpmc {
|
||||
ranges = <0 0 0x30000000 0x1000000>, /* CS0: 16MB for NAND */
|
||||
<5 0 0x2c000000 0x01000000>;
|
||||
|
||||
nand@0,0 {
|
||||
compatible = "ti,omap2-nand";
|
||||
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
|
||||
@ -309,9 +107,4 @@
|
||||
reg = <0x780000 0x1f880000>;
|
||||
};
|
||||
};
|
||||
|
||||
ethernet@gpmc {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&smsc911x_pins>;
|
||||
};
|
||||
};
|
||||
|
216
arch/arm/boot/dts/omap3-evm-processor-common.dtsi
Normal file
216
arch/arm/boot/dts/omap3-evm-processor-common.dtsi
Normal file
@ -0,0 +1,216 @@
|
||||
/*
|
||||
* Common support for omap3 EVM 35xx/37xx processor modules
|
||||
*/
|
||||
|
||||
/ {
|
||||
memory@80000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x10000000>; /* 256 MB */
|
||||
};
|
||||
|
||||
wl12xx_vmmc: wl12xx_vmmc {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&wl12xx_gpio>;
|
||||
};
|
||||
};
|
||||
|
||||
&dss {
|
||||
vdds_dsi-supply = <&vpll2>;
|
||||
vdda_video-supply = <&lcd_3v3>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <
|
||||
&dss_dpi_pins1
|
||||
&dss_dpi_pins2
|
||||
>;
|
||||
};
|
||||
|
||||
&hsusb2_phy {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&ehci_phy_pins>;
|
||||
};
|
||||
|
||||
&omap3_pmx_core {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&on_board_gpio_61 &hsusb2_pins>;
|
||||
|
||||
dss_dpi_pins1: pinmux_dss_dpi_pins2 {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
|
||||
OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
|
||||
OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */
|
||||
OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */
|
||||
|
||||
OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */
|
||||
OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */
|
||||
OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */
|
||||
OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */
|
||||
OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */
|
||||
OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */
|
||||
OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */
|
||||
OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */
|
||||
OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */
|
||||
OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */
|
||||
OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0) /* dss_data16.dss_data16 */
|
||||
OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0) /* dss_data17.dss_data17 */
|
||||
|
||||
OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE3) /* dss_data18.dss_data0 */
|
||||
OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE3) /* dss_data19.dss_data1 */
|
||||
OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE3) /* dss_data20.dss_data2 */
|
||||
OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE3) /* dss_data21.dss_data3 */
|
||||
OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE3) /* dss_data22.dss_data4 */
|
||||
OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE3) /* dss_data23.dss_data5 */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc1_pins: pinmux_mmc1_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x2144, PIN_OUTPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
|
||||
OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
|
||||
OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
|
||||
OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
|
||||
OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
|
||||
OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
|
||||
OMAP3_CORE1_IOPAD(0x2150, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat4.sdmmc1_dat4 */
|
||||
OMAP3_CORE1_IOPAD(0x2152, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat5.sdmmc1_dat5 */
|
||||
OMAP3_CORE1_IOPAD(0x2154, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat6.sdmmc1_dat6 */
|
||||
OMAP3_CORE1_IOPAD(0x2156, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat7.sdmmc1_dat7 */
|
||||
>;
|
||||
};
|
||||
|
||||
/* NOTE: Clocked externally, needs INPUT also for sdmmc2_clk.sdmmc2_clk */
|
||||
mmc2_pins: pinmux_mmc2_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
|
||||
OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
|
||||
OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
|
||||
OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
|
||||
OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
|
||||
OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
|
||||
>;
|
||||
};
|
||||
|
||||
uart3_pins: pinmux_uart3_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x219e, WAKEUP_EN | PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
|
||||
OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
|
||||
>;
|
||||
};
|
||||
|
||||
/* Devices are routed with gpmc_nbe1.gpio_61 to on-board devices */
|
||||
on_board_gpio_61: pinmux_ehci_port_select_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x20c8, PIN_OUTPUT | MUX_MODE4)
|
||||
>;
|
||||
};
|
||||
|
||||
/* Used by OHCI and EHCI. OHCI won't work without external phy */
|
||||
hsusb2_pins: pinmux_hsusb2_pins {
|
||||
pinctrl-single,pins = <
|
||||
|
||||
/* mcspi1_cs3.hsusb2_data2 */
|
||||
OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3)
|
||||
|
||||
/* mcspi2_clk.hsusb2_data7 */
|
||||
OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3)
|
||||
|
||||
/* mcspi2_simo.hsusb2_data4 */
|
||||
OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3)
|
||||
|
||||
/* mcspi2_somi.hsusb2_data5 */
|
||||
OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3)
|
||||
|
||||
/* mcspi2_cs0.hsusb2_data6 */
|
||||
OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3)
|
||||
|
||||
/* mcspi2_cs1.hsusb2_data3 */
|
||||
OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3)
|
||||
>;
|
||||
};
|
||||
|
||||
wl12xx_gpio: pinmux_wl12xx_gpio {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x2180, PIN_OUTPUT | MUX_MODE4) /* uart1_cts.gpio_150 */
|
||||
OMAP3_CORE1_IOPAD(0x217e, PIN_INPUT | MUX_MODE4) /* uart1_rts.gpio_149 */
|
||||
>;
|
||||
};
|
||||
|
||||
smsc911x_pins: pinmux_smsc911x_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x21d2, PIN_INPUT | MUX_MODE4) /* mcspi1_cs2.gpio_176 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&omap3_pmx_wkup {
|
||||
dss_dpi_pins2: pinmux_dss_dpi_pins1 {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_WKUP_IOPAD(0x2a0a, PIN_OUTPUT | MUX_MODE3) /* sys_boot0.dss_data18 */
|
||||
OMAP3_WKUP_IOPAD(0x2a0c, PIN_OUTPUT | MUX_MODE3) /* sys_boot1.dss_data19 */
|
||||
OMAP3_WKUP_IOPAD(0x2a10, PIN_OUTPUT | MUX_MODE3) /* sys_boot3.dss_data20 */
|
||||
OMAP3_WKUP_IOPAD(0x2a12, PIN_OUTPUT | MUX_MODE3) /* sys_boot4.dss_data21 */
|
||||
OMAP3_WKUP_IOPAD(0x2a14, PIN_OUTPUT | MUX_MODE3) /* sys_boot5.dss_data22 */
|
||||
OMAP3_WKUP_IOPAD(0x2a16, PIN_OUTPUT | MUX_MODE3) /* sys_boot6.dss_data23 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc1_pins>;
|
||||
};
|
||||
|
||||
&mmc2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc2_pins>;
|
||||
};
|
||||
|
||||
&mmc3 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
interrupts-extended = <&intc 72 &omap3_pmx_core OMAP3_UART1_RX>;
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
interrupts-extended = <&intc 73 &omap3_pmx_core OMAP3_UART2_RX>;
|
||||
};
|
||||
|
||||
&uart3 {
|
||||
interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart3_pins>;
|
||||
};
|
||||
|
||||
/*
|
||||
* GPIO_61 (nUSB2_EN_1V8) must be low to enable on-board EHCI USB2 interface
|
||||
* for bus switch SN74CB3Q3384A, level-shifter SN74AVC16T245DGGR, and 1.8V.
|
||||
*/
|
||||
&gpio2 {
|
||||
en_usb2_port {
|
||||
gpio-hog;
|
||||
gpios = <29 GPIO_ACTIVE_HIGH>; /* gpio_61 */
|
||||
output-low;
|
||||
line-name = "enable usb2 port";
|
||||
};
|
||||
};
|
||||
|
||||
/* T2_GPIO_2 low to route GPIO_61 to on-board devices */
|
||||
&twl_gpio {
|
||||
en_on_board_gpio_61 {
|
||||
gpio-hog;
|
||||
gpios = <2 GPIO_ACTIVE_HIGH>;
|
||||
output-low;
|
||||
line-name = "en_hsusb2_clk";
|
||||
};
|
||||
};
|
||||
|
||||
&gpmc {
|
||||
ranges = <0 0 0x30000000 0x1000000>, /* CS0: 16MB for NAND */
|
||||
<5 0 0x2c000000 0x01000000>; /* CS5: 16MB for LAN9220 */
|
||||
|
||||
ethernet@gpmc {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&smsc911x_pins>;
|
||||
};
|
||||
};
|
@ -9,13 +9,81 @@
|
||||
|
||||
#include "omap34xx.dtsi"
|
||||
#include "omap3-evm-common.dtsi"
|
||||
#include "omap3-evm-processor-common.dtsi"
|
||||
|
||||
/ {
|
||||
model = "TI OMAP35XX EVM (TMDSEVM3530)";
|
||||
compatible = "ti,omap3-evm", "ti,omap3";
|
||||
compatible = "ti,omap3-evm", "ti,omap3430", "ti,omap3";
|
||||
};
|
||||
|
||||
memory@80000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x10000000>; /* 256 MB */
|
||||
&omap3_pmx_core2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&hsusb2_2_pins>;
|
||||
|
||||
ehci_phy_pins: pinmux_ehci_phy_pins {
|
||||
pinctrl-single,pins = <
|
||||
|
||||
/* EHCI PHY reset GPIO etk_d7.gpio_21 */
|
||||
OMAP3430_CORE2_IOPAD(0x25ea, PIN_OUTPUT | MUX_MODE4)
|
||||
|
||||
/* EHCI VBUS etk_d8.gpio_22 */
|
||||
OMAP3430_CORE2_IOPAD(0x25ec, PIN_OUTPUT | MUX_MODE4)
|
||||
>;
|
||||
};
|
||||
|
||||
/* Used by OHCI and EHCI. OHCI won't work without external phy */
|
||||
hsusb2_2_pins: pinmux_hsusb2_2_pins {
|
||||
pinctrl-single,pins = <
|
||||
|
||||
/* etk_d10.hsusb2_clk */
|
||||
OMAP3430_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3)
|
||||
|
||||
/* etk_d11.hsusb2_stp */
|
||||
OMAP3430_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3)
|
||||
|
||||
/* etk_d12.hsusb2_dir */
|
||||
OMAP3430_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3)
|
||||
|
||||
/* etk_d13.hsusb2_nxt */
|
||||
OMAP3430_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3)
|
||||
|
||||
/* etk_d14.hsusb2_data0 */
|
||||
OMAP3430_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3)
|
||||
|
||||
/* etk_d15.hsusb2_data1 */
|
||||
OMAP3430_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3)
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&gpmc {
|
||||
nand@0,0 {
|
||||
compatible = "ti,omap2-nand";
|
||||
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
|
||||
interrupt-parent = <&gpmc>;
|
||||
interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
|
||||
<1 IRQ_TYPE_NONE>; /* termcount */
|
||||
linux,mtd-name= "micron,mt29f2g16abdhc";
|
||||
nand-bus-width = <16>;
|
||||
gpmc,device-width = <2>;
|
||||
ti,nand-ecc-opt = "bch8";
|
||||
|
||||
gpmc,sync-clk-ps = <0>;
|
||||
gpmc,cs-on-ns = <0>;
|
||||
gpmc,cs-rd-off-ns = <44>;
|
||||
gpmc,cs-wr-off-ns = <44>;
|
||||
gpmc,adv-on-ns = <6>;
|
||||
gpmc,adv-rd-off-ns = <34>;
|
||||
gpmc,adv-wr-off-ns = <44>;
|
||||
gpmc,we-off-ns = <40>;
|
||||
gpmc,oe-off-ns = <54>;
|
||||
gpmc,access-ns = <64>;
|
||||
gpmc,rd-cycle-ns = <82>;
|
||||
gpmc,wr-cycle-ns = <82>;
|
||||
gpmc,wr-access-ns = <40>;
|
||||
gpmc,wr-data-mux-bus-ns = <0>;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
@ -257,7 +257,7 @@
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c3_pins>;
|
||||
gpiom1: gpio@20 {
|
||||
compatible = "mcp,mcp23017";
|
||||
compatible = "microchip,mcp23017";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
reg = <0x20>;
|
||||
|
@ -29,6 +29,7 @@
|
||||
compatible = "sharp,ls037v7dw01";
|
||||
label = "lcd";
|
||||
power-supply = <&lcd_3v3>;
|
||||
envdd-supply = <&lcd_3v3>;
|
||||
|
||||
port {
|
||||
lcd_in: endpoint {
|
||||
|
@ -13,6 +13,10 @@
|
||||
reg = <0x80000000 0x40000000>; /* 1 GB */
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = &uart3;
|
||||
};
|
||||
|
||||
aliases {
|
||||
display0 = &dvi0;
|
||||
display1 = &hdmi0;
|
||||
|
@ -14,6 +14,10 @@
|
||||
display0 = &hdmi0;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = &uart3;
|
||||
};
|
||||
|
||||
vmain: fixedregulator-vmain {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vmain";
|
||||
|
@ -194,7 +194,7 @@
|
||||
pbias_mmc_reg: pbias_mmc_omap5 {
|
||||
regulator-name = "pbias_mmc_omap5";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3000000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
@ -21,9 +21,21 @@
|
||||
#define INPUT_EN (1 << 18)
|
||||
#define SLEWCTRL_SLOW (1 << 19)
|
||||
#define SLEWCTRL_FAST 0
|
||||
#define DS0_FORCE_OFF_MODE (1 << 24)
|
||||
#define DS0_INPUT (1 << 25)
|
||||
#define DS0_FORCE_OUT_HIGH (1 << 26)
|
||||
#define DS0_PULL_UP_DOWN_EN (1 << 27)
|
||||
#define DS0_PULL_UP_SEL (1 << 28)
|
||||
#define WAKEUP_ENABLE (1 << 29)
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#define DS0_PIN_OUTPUT (DS0_FORCE_OFF_MODE)
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#define DS0_PIN_OUTPUT_HIGH (DS0_FORCE_OFF_MODE | DS0_FORCE_OUT_HIGH)
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#define DS0_PIN_OUTPUT_PULLUP (DS0_FORCE_OFF_MODE | DS0_PULL_UP_DOWN_EN | DS0_PULL_UP_SEL)
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#define DS0_PIN_OUTPUT_PULLDOWN (DS0_FORCE_OFF_MODE | DS0_PULL_UP_DOWN_EN)
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#define DS0_PIN_INPUT (DS0_FORCE_OFF_MODE | DS0_INPUT)
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#define DS0_PIN_INPUT_PULLUP (DS0_FORCE_OFF_MODE | DS0_INPUT | DS0_PULL_UP_DOWN_EN | DS0_PULL_UP_SEL)
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#define DS0_PIN_INPUT_PULLDOWN (DS0_FORCE_OFF_MODE | DS0_INPUT | DS0_PULL_UP_DOWN_EN)
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|
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#define PIN_OUTPUT (PULL_DISABLE)
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#define PIN_OUTPUT_PULLUP (PULL_UP)
|
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#define PIN_OUTPUT_PULLDOWN 0
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||||
|
Loading…
Reference in New Issue
Block a user