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70d2148209
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45794 Commits

Author SHA1 Message Date
Ben Skeggs
70d2148209 drm/nouveau/gr/gf100-: virtualise init_ppc_exceptions 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2018-05-18 15:01:23 +10:00
Ben Skeggs
778f18c607 drm/nouveau/gr/gf100-: virtualise init_419c9c + apply fixes from traces 
Deliberately removed from non-GP100, as RM doesn't touch it.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2018-05-18 15:01:23 +10:00
Ben Skeggs
0a84a51334 drm/nouveau/gr/gf100-: virtualise init_419eb4 + apply fixes from traces 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2018-05-18 15:01:23 +10:00
Ben Skeggs
0feab0250d drm/nouveau/gr/gf100-: virtualise init_419cc0 + apply fixes from traces 
Pulled some init out of main per-GPC/TPC loops to match RM.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2018-05-18 15:01:23 +10:00
Ben Skeggs
0a5b97304b drm/nouveau/gr/gf100-: virtualise init_sked_hww_esr 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2018-05-18 15:01:23 +10:00
Ben Skeggs
2b297b0d6d drm/nouveau/gr/gf100-: virtualise init_40601c 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2018-05-18 15:01:23 +10:00
Ben Skeggs
3ac72e98b4 drm/nouveau/gr/gf100-: virtualise init_ds_hww_esr_2 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2018-05-18 15:01:22 +10:00
Ben Skeggs
2585a1b131 drm/nouveau/gr/gf100-: virtualise init_fecs_exceptions + apply fixes from traces 
The value for GF100 has changed here, but it matches RM now.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2018-05-18 15:01:22 +10:00
Ben Skeggs
7c76ebb65a drm/nouveau/gr/gf100: write 0x400124 during init 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2018-05-18 15:01:22 +10:00
Ben Skeggs
dff30dbd1d drm/nouveau/gr/gf100-: virtualise init_swdx_pes_mask 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2018-05-18 15:01:22 +10:00
Ben Skeggs
0f78acc86b drm/nouveau/gr/gf100-: implement another chunk of bios-provided init 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2018-05-18 15:01:22 +10:00
Ben Skeggs
429412e231 drm/nouveau/gr/gf100-: virtualise init_rop_active_fbps 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2018-05-18 15:01:22 +10:00
Ben Skeggs
bfd27f39b5 drm/nouveau/gr/gf100-: virtualise init_num_active_ltcs 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2018-05-18 15:01:22 +10:00
Ben Skeggs
02917aa39d drm/nouveau/gr/gf100-: virtualise init_zcull 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2018-05-18 15:01:22 +10:00
Ben Skeggs
2fe5ff6371 drm/nouveau/gr/gf100-: virtualise init_vsc_stream_master 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2018-05-18 15:01:22 +10:00
Ben Skeggs
a37279e94c drm/nouveau/gr/gf100-: virtualise init_bios 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2018-05-18 15:01:22 +10:00
Ben Skeggs
cd9662f89e drm/nouveau/gr/gf100-: support clkgate_pack everywhere 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2018-05-18 15:01:22 +10:00
Ben Skeggs
8b058ca518 drm/nouveau/gr/gf100-: virtualise r405a14 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2018-05-18 15:01:22 +10:00
Ben Skeggs
6f63a5fb1e drm/nouveau/gr/gf100-: support firmware-provided sw_nonctx everywhere 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2018-05-18 15:01:22 +10:00
Ben Skeggs
1246f1dc22 drm/nouveau/gr/gf100-: virtualise init_gpc_mmu + apply fixes from traces 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2018-05-18 15:01:22 +10:00
Ben Skeggs
334cc26d4d drm/nouveau/fifo/gp100-: force individual channels into a channel group 
RM does this for some reason, and is enforced in HW on Volta.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2018-05-18 15:01:22 +10:00
Ben Skeggs
eda12417d3 drm/nouveau/fifo/gm107-: write instance address in channel runlist entry 
RM does this for some reason.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2018-05-18 15:01:22 +10:00
Ben Skeggs
79bb4b617f drm/nouveau/fifo/gk208-: write pbdma timeout regs during initialisation 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2018-05-18 15:01:22 +10:00
Ben Skeggs
8c4e9f9dff drm/nouveau/fifo/gk110-: support writing channel group runlist entries 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2018-05-18 15:01:22 +10:00
Ben Skeggs
4f2fc25c0f drm/nouveau/fifo/gk104-: poll for runlist update completion 
Newer HW doesn't appear to send this event, which will cause long delays
in runlist updates if they don't complete immediately.

RM doesn't use these events anywhere, and an NVGPU commit message notes
that polling is the preferred method even on HW that supports the event.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2018-05-18 15:01:21 +10:00
Ben Skeggs
665870837a drm/nouveau/fifo/gk104-: add interfaces to support different runlist layouts 
This will be required to support features on newer hardware.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2018-05-18 15:01:21 +10:00
Ben Skeggs
f9360c3aa6 drm/nouveau/fifo/gk104-: simplify definition of channel classes 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2018-05-18 15:01:21 +10:00
Ben Skeggs
a7cf01809b drm/nouveau/fifo/gk104-: require explicit runlist selection for channel allocation 
We didn't used to be aware that runlist/engine IDs weren't the same thing,
or that there was such variability in configuration between GPUs.

By exposing this information to a client, and giving it explicit control
of which runlist it's allocating a channel on, we're able to make better
choices.

The immediate effect of this is that on GPUs where CE0 is the "GRCE", we
will now be allocating a copy engine running asynchronously to GR for BO
migrations - as intended.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2018-05-18 15:01:21 +10:00
Ben Skeggs
cc36205085 drm/nouveau/fifo/gk104-: support querying engines available on each runlist 
Will be used to improve channel runlist selection.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2018-05-18 15:01:21 +10:00
Ben Skeggs
ddc669e256 drm/nouveau/fifo/gk104-: allow fault recovery code to be called by other subdevs 
This will be required to support Volta.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2018-05-18 15:01:21 +10:00
Ben Skeggs
55b8e85b0b drm/nouveau/fifo/gk104-: accept engine contexts for CE3 and up 
These can exist on GP100 and newer.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2018-05-18 15:01:21 +10:00
Ben Skeggs
eb47db4f3b drm/nouveau/fifo: support channel count query 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2018-05-18 15:01:21 +10:00
Ben Skeggs
6eb01aa898 drm/nouveau/device: support querying available engines of a specific type 
Will be used for fifo runlist selection.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2018-05-18 15:01:21 +10:00
Ben Skeggs
c5c9127b25 drm/nouveau/device: implement a generic method to query device-specific properties 
We have a need to fetch data from GPU-specific sub-devices that is not
tied to any particular engine object.

This commit provides the framework to support such queries.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2018-05-18 15:01:21 +10:00
Ben Skeggs
f5650478ab drm/nouveau/disp/nv50-: pass nvkm_memory objects for channel push buffers 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2018-05-18 15:01:21 +10:00
Ben Skeggs
a9c44a88ca drm/nouveau/disp/nv50-: add channel interfaces to control error interrupts 
This will be required to support Volta, but also allows us to remove code
that's duplicated for each channel type already.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2018-05-18 15:01:21 +10:00
Ben Skeggs
4a8621a24a drm/nouveau/disp/nv50-: add channel interfaces to determine the user area 
This will be required to support Volta.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2018-05-18 15:01:21 +10:00
Ben Skeggs
8531f57027 drm/nouveau/disp/nv50-: merge handling of pio and dma channels 
Unnecessarily complicated, and a barrier to cleanly supporting Volta.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2018-05-18 15:01:21 +10:00
Ben Skeggs
9b096283bf drm/nouveau/disp/nv50-: simplify definiton of core channels 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2018-05-18 15:01:21 +10:00
Ben Skeggs
6d41a7536f drm/nouveau/disp/nv50-: simplify definition of cursor channels 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2018-05-18 15:01:21 +10:00
Ben Skeggs
3ceeef9c03 drm/nouveau/disp/nv50-: simplify definition of base channels 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2018-05-18 15:01:21 +10:00
Ben Skeggs
c2c3a00310 drm/nouveau/disp/nv50-: simplify definition of overlay immediate channels 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2018-05-18 15:01:20 +10:00
Ben Skeggs
46f74a8ad7 drm/nouveau/disp/nv50-: simplify definition of overlay channels 
Introduces a new method of defining channels available from the display,
common to all channel types, allowing for more flexibility in available
channel types/counts, and reducing the amount of boiler-plate required.

This will be required to support Volta.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2018-05-18 15:01:20 +10:00
Ben Skeggs
abc1d4379b drm/nouveau/disp/nv50-: replace user object with engine pointer in channels 
More simplification.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2018-05-18 15:01:20 +10:00
Ben Skeggs
bb3b0a4220 drm/nouveau/disp/nv50-: initialise from the engine, rather than the user object 
Engines are initialised on an as-needed basis, so this results in the
same behaviour, whilst allowing us to simplify things a bit.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2018-05-18 15:01:20 +10:00
Ben Skeggs
f5e088d6f0 drm/nouveau/disp/nv50-: fetch mask of available piors during oneinit 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2018-05-18 15:01:20 +10:00
Ben Skeggs
9fe4e17704 drm/nouveau/disp/nv50-: fetch mask of available sors during oneinit 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2018-05-18 15:01:20 +10:00
Ben Skeggs
bf5d1a6b6a drm/nouveau/disp/nv50-: fetch mask of available dacs during oneinit 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2018-05-18 15:01:20 +10:00
Ben Skeggs
f7b2ece37f drm/nouveau/disp/nv50-: fetch mask of available heads during oneinit 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2018-05-18 15:01:20 +10:00
Ben Skeggs
3b9ba66ab0 drm/nouveau/disp/nv50-: delay subunit construction until oneinit 
We should be reading registers to determine which subunits are really
present on a given board, and this needs to be done after DEVINIT.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2018-05-18 15:01:20 +10:00