any market.
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAl1w+fEQHGhlaWtvQHNu
dGVjaC5kZQAKCRDzpnnJnNEdgaolB/9QiQc2k2HFAwQTS1RpvVW87yKdLXPhqBBs
HhagbY3ucMXDY38tZnLnbLis6CwdvkeHCCL6KC9XLzIgiJZHzXhb+QLiu9YLAw25
ymnWVtamVh0WmSNOBqex65fXwCQH9l/godI8BaxltllEkb472/jwainqHsVkFI7Z
idVGrTo9zgW7NTGQU88Rl6cagHLR6OpHBvc5meu7TIzGYF2U+Xx+x9TZw7BfdQ7u
gKZtIeRTFwsHdiBNbeU78znQCW/apCyzyKaIKW517TiXQsmsm/CEGai2/+XTN0ft
+QqHkXO7NBUh0cPZvBefq53EyDlvJbv1TW+XXP9d+TTFotTtJmXU
=PkdV
-----END PGP SIGNATURE-----
Merge tag 'v5.4-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt
Removal of the rk3288-fennec board which never made it to
any market.
* tag 'v5.4-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
dt-bindings: arm: rockchip: remove reference to fennec board
ARM: dts: rockchip: remove rk3288 fennec board support
Link: https://lore.kernel.org/r/1718334.9BoTfW0Ujv@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Alternate flash support for Vesnin
- Minor cleanups and fixes
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEE+nHMAt9PCBDH63wBa3ZZB4FHcJ4FAl1wWLYACgkQa3ZZB4FH
cJ7d+RAAu1JRUnKxtSgyVlgZuEI9KrwP1asU2pmcSvAWvqHhnYloFNcp8RNJKaKu
dqjv7sdiITR2fE9fh2G63pz45uc4/BrC/QKlhG/tx8Br7jabIeSlP0fC42tqqq4M
9WMWpM37+w5dvoeTaW5E2kU7C6SHjGkLcSsZu7hC5DVhD2WOfwlPu3yl0fgJNTTu
17xyWHHlj0PP0FZHH7Yrz7HSuxJC5s6oieGiAJzR3uqX24BtHw7UBi2f+XQWYaOw
fO967SsvW5/ySbrhNUDhNKEpNbVyfJoZQzrT6TjN83csPKLbZJ1/AWz4TX6rI6jw
3qbYodpXF8hhhjUt0bScIThqjp02R338UEV8vgAvoemjzAz9rxajCxlFPw8ZSVxB
Hm17MJvSm3sIYHw476zeZzoEmyU9FsmTlkStOISfA7DXaS0FMOQBDgCgcU+wYyFa
i5Iz5RBEk/9unBAHps6mdVe/ZmBsQ1YEC8b6RHM3Inywpp9l3/LnnKIitjCKeBgV
Ty6vkiN7Bqi0/oe/F8RtaB1faI+AppWCIngrkVfSsSkmwJcIL4+PJvPOeXrwXoKF
BIz/Rwqv41KXlQL4KMFsbMKTnLawdMthVXFzDH5LcM5oopMYxPcDK38W9ke1wpz3
Ql4I2Ok5iG22ei6RaYXjv7lq8mSEovALxLpvOpltO3LxtTQzH0g=
=ranz
-----END PGP SIGNATURE-----
Merge tag 'aspeed-5.4-devicetree-2' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed into arm/dt
ASPEED device tree updates for 5.4, second round
- Alternate flash support for Vesnin
- Minor cleanups and fixes
* tag 'aspeed-5.4-devicetree-2' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed:
ARM: dts: aspeed-g5: Fixe gpio-ranges upper limit
ARM; dts: aspeed: mihawk: File should not be executable
ARM: dts: aspeed: swift: Change power supplies to version 2
ARM: dts: aspeed: vesnin: Add secondary SPI flash chip
ARM: dts: aspeed: vesnin: Add wdt2 with alt-boot option
ARM: dts: aspeed-g4: Add all flash chips
Link: https://lore.kernel.org/r/CACPK8Xdp4gVuetmiu2bRTTH6oHhRrC7FELHWKVB2ZGSbPbH7HQ@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
According to the AST2500/AST2520 specs, these SoCs support up to 228 GPIO
pins. However, 'gpio-ranges' value in 'aspeed-g5.dtsi' file is currently
setting the upper limit to 220 which isn't allowing access to all their
GPIOs. The correct upper limit value is 232 (actual number is 228 plus a
4-GPIO hole in GPIOAB). Without this patch, GPIOs AC5 and AC6 do not work
correctly on a AST2500 BMC running Linux Kernel v4.19
Fixes: 2039f90d13 ("ARM: dts: aspeed-g5: Add gpio controller to devicetree")
Signed-off-by: Oscar A Perez <linux@neuralgames.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Swift power supplies are version 2 of the IBM CFFPS.
Fixes: 8e8fd0cbd7 ("ARM: dts: aspeed: Add Swift BMC machine")
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Adds wdt2 section with 'alt-boot' option into dts for vesnin.
Signed-off-by: Ivan Mikhaylov <i.mikhaylov@yadro.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
The FMC supports five chip selects, so describe the five possible flash
chips.
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Tested with kmscube and some glmark2* tests on arndale board.
Signed-off-by: Guillaume Gardet <guillaume.gardet@arm.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested with kmscube and some glmark2* tests on Chromebook snow.
Frequency adapts with load.
Signed-off-by: Guillaume Gardet <guillaume.gardet@arm.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Required to have GPU voltage scaling working properly.
Signed-off-by: Guillaume Gardet <guillaume.gardet@arm.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
for 5.4, please pull the following:
- Stefan does a bunch of preparatory work for supporting the Raspberry
Pi 4in the next merge window correct register ranges (SPI, I2C,
UART), define memory, HDMI and MMC properties at the board level
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAl1a4NwACgkQh9CWnEQH
BwSzZhAAtH6gpPJRFsZUSqJh7h8DVwji1W126WcdLyR+NrckBaAV2nKQyd1U6HQM
vKKZWtwCYn4j+aJQcQGJk7lShhXVPV20ZyD3R6NhHyedbh2IQFf8YJPhXRVK3XU8
xnoeTGCQK1GRpReYn+rSno+1TilR3rGcevXIRCGQF/pYfbKxc4lpQk0Bt15chxXJ
Mt6ZwwEs5FdRJhJgUZSOXfIW0zuhHAW0rOWcT8Abek+WPmYbaJkFPOxXZOQLAOAZ
jKdflZpZOQSIZqvB4WfgZYw258YRBhVWzlaSJadB+i66lNON7bBxeG2Xa4lHGqn/
Vh7opI4NgDd06nozkte9619c6naoh2PWLLUQ3J3/vbSAvSoc+jmhz7eL+lmgt1MR
N/eLY9pRTGAX31HGI4TQnRM9TZjS24Vy5j+uhxNKpN4P7g2ptNBqHUL/9gqyKTMx
bJai63FtE0EdIGtmNTNgUmxSSXAPS4jEhFdb/PM/B6Xavnt9YygR5b+cWv8CcUE+
XGH15KHI3PN2RSnf/BawjUKNXSIj1jWVWXN1CWTr3p6tzZmSMKkY/fMwYC94VqPy
a2j/xLMtr7pwjVhShG5chjngIc4F2skRRlNQ4mzPHTI93S54YkwMoPmraNCkOP2/
jOassdIDoty6gMofn7ege0fh8fanPJ5iLoUBBzYsaIRjeyRWB/s=
=DR09
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-5.4/devicetree' of https://github.com/Broadcom/stblinux into arm/dt
This pull request contains Broadcom ARM-based SoCs Device Tree updates
for 5.4, please pull the following:
- Stefan does a bunch of preparatory work for supporting the Raspberry
Pi 4in the next merge window correct register ranges (SPI, I2C,
UART), define memory, HDMI and MMC properties at the board level
* tag 'arm-soc/for-5.4/devicetree' of https://github.com/Broadcom/stblinux:
ARM: dts: bcm283x: Enable HDMI at board level
ARM: dts: bcm283x: Define memory at board level
ARM: dts: bcm283x: Define MMC interfaces at board level
ARM: bcm283x: Reduce register ranges for UART, SPI and I2C
This helps SPI NOR to work on newer board variants.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJdZotdAAoJEGFBu2jqvgRNi3UP/RNEWWVG2HYm6ipPTsgb5FGu
2hW3p+4iIGHCpON9GjXTMPkr4RHFPqFGdcXFYyjxPG+A6wy8IsfFIg2rIglBrerK
wPVl+7pxG3F+PHoGnRZ2SqADgzhBb7Rn3uyJ/ku7YK421zk9OvpBu1ZWUPwEJENj
sd9RTevRqrep9fP+JMiLksYPXmQstG7mxQXdHdB+xVJ0O6+RjayV4/cAM2fYkElI
/z9ThTPU/na8EvYFOgNU9HhDmkS5fcv0PIY6b2KautgETrqyLcWuP5WQd/ynOw/c
ZCq9WTsCgLoiS6z04aGPN3913MDPu/bxkxjAW3CrCGaRdtRVRbdGJxM9MoWiVPNJ
ImLaoAzd0ARKFeqjrQrJ5fWmPuM+puNdH2oVWXmCOZ92Kcz4sSAIWcAi9GtgpVag
nCkIEC7LsCFOVVotoP7NRWCiWc8QIVO8tAtwEP9ShrPZLVGIA1Z6n6I/+9tECuNp
hYJYPZ/QsNblag/iolXBaLKdUnQ1Epg+hpTyB93gecphmqvnoJ1XiL9+qCorNKP0
ejPDCGuccu5ga4/BtCPURYSMm7gaPxKek1pDkFqAbJBkYuvoGO/iMzgRWZzLTiEk
x/ufaisly+7bwwsaOjk3Qi1XO4xd+SKLkpm2heQXs0plx6mA6GBCQyjX4AWFf/c9
dtGCOZeqiKDTnL4oflUo
=ZBa8
-----END PGP SIGNATURE-----
Merge tag 'davinci-for-v5.4/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into arm/dt
Contains a patch to switch to more generic compatible for SPI NOR.
This helps SPI NOR to work on newer board variants.
* tag 'davinci-for-v5.4/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: dts: da850-evm: Use generic jedec, spi-nor for flash
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Most of the basic infrastructure is completed for BM1880 SoC except
common clock support. We are still couple of patchset away from
booting a distro from eMMC/SD with mainline. Below are the changes
for this cycle:
- Added Reset controller support to BM1880 SoC based on reset-simple
driver.
- Modified pinctrl memory map for BM1880 SoC. The initial pinctrl support
included the PWM registers as a part of the pinctrl memory map. But this
turned out to be useless as PWM registers are not handling any pin muxing
at all. So removed the PWM registers from pinctrl memory map.
-----BEGIN PGP SIGNATURE-----
iQEzBAABCgAdFiEEZ6VDKoFIy9ikWCeXVZ8R5v6RzvUFAl1FfmoACgkQVZ8R5v6R
zvXRbwf/ZS8GArYRVLrwLMBA7HpJ4tTTDKKauCsTH/fIdEneTZj6u2gWjKw8cKzt
hIZqZ0V+djiGuKf4CtXpZKyaOyf8MhPO7r9yrGUFMJVe4XsZijB4s7VVuFyULFHU
i3+GKPGptHUl7UPLg0+csbBPoY1vyzY/3g8TlKqEmjK6CU6qNIxu6k22AeDnNGmR
IF0g7/M2ucietDs4OugoVrwSDVtUm2g8voLafRLiKG6/HNTMtMGybv+LFb3yt0qU
asS2q2WTJMSbahhh5sTd2SRMc9YEPmp+i2xY1hqdM4TOfycH4A8b1Rp7FnSlMWoC
cpo6RmVIj+L1it5qKICRth2qRy08Tg==
=8nxl
-----END PGP SIGNATURE-----
Merge tag 'bitmain-soc-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/mani/linux-bitmain into arm/dt
Bitmain SoC changes for v5.4:
Most of the basic infrastructure is completed for BM1880 SoC except
common clock support. We are still couple of patchset away from
booting a distro from eMMC/SD with mainline. Below are the changes
for this cycle:
- Added Reset controller support to BM1880 SoC based on reset-simple
driver.
- Modified pinctrl memory map for BM1880 SoC. The initial pinctrl support
included the PWM registers as a part of the pinctrl memory map. But this
turned out to be useless as PWM registers are not handling any pin muxing
at all. So removed the PWM registers from pinctrl memory map.
* tag 'bitmain-soc-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/mani/linux-bitmain:
arm64: dts: bitmain: Modify pin controller memory map
arm64: dts: bitmain: Add reset controller support for BM1880 SoC
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Drop TV-OUT muxgroup from the HREF pin control
- Fix up BU21013 touchpad from Dmitry
- Split of AB8500 config in its own DTSI
- Drop the unused USB regulator config
- Add proper thermal zone for the CPU
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAl1miDgACgkQQRCzN7AZ
XXP1iA//cfSbd6ltsZLkDEPscHYQn8LyoMi1DPbrP5wxGSVqKQ0nPWJlhFBax3y9
4V7uUaZKMAgWY6X+omr8g2OGe++ZETqOkRN1Fgg7ltSVVuaoXahgDBQ+mfUFbcsQ
zbyvGR4RdmhkzLU0rQoYnmlZaAlmYjNuGYBR7FhCOB2sGs/bPw8FfXvefdeN9P8v
EJuihO0iH2Qsp63GzYc7Tqif1fpaOjcHBOgxmrRl4Cewx1gux3dv8AUoqeRBtObJ
aI77w4jP09I0yPiYWAJ0EBiSAOk5zYh8gG/P2id6ma26HyCb42n21HeM5en+qaTL
SMuy6WgVPudCoeZiqbXjj+M/m6USwAivm7DDw6lCArpEjRjWoDhGxQKI1LWUwvG1
nRySkj9N3obl6ojrWwDZ6QUYnuEYoM+hsM0B4pm8cDnCqVv6WnjlnUZ3FLeteLej
PvQIwchtk6tCe5wnkeC8MQF10WXObsV4hcqEMH5yxHeTgMZGSuVRyAUeQXaosUyD
DMoHhBGJlsFs6xHmR/xpi7zdLu2vZn4cl22DK/N252JGpVuQV1tG6yxOS2z6QBUp
J2Y/2QIBohcW/T2GUltMuoMf35BR+ECH05LsaiNKCYgWVSc4rpNryv+Y6aSyJ7t5
iLmJPYEc/nSmkOpbz9CifFlJYiVvfoG5IAaiJCWYKdMbX9nP248=
=JGg5
-----END PGP SIGNATURE-----
Merge tag 'ux500-dts-v5.4-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into arm/dt
More Ux500 device tree updates for the v5.4 kernel:
- Drop TV-OUT muxgroup from the HREF pin control
- Fix up BU21013 touchpad from Dmitry
- Split of AB8500 config in its own DTSI
- Drop the unused USB regulator config
- Add proper thermal zone for the CPU
* tag 'ux500-dts-v5.4-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: dts: ux500: Update thermal zone
ARM: dts: ux500: Remove ab8500_ldo_usb regulator from device tree
ARM: dts: ux500: Move ab8500 nodes to ste-ab8500.dtsi
ARM: ux500: improve BU21013 touchpad bindings
ARM: dts: ux500: Drop TV-out muxgroup on HREFs
Link: https://lore.kernel.org/r/CACRpkdZ9Xvx+rg-hFVgG61_i2CdQSs+nZq5FXkkK2-3Ce9ooWg@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Add mailbox support on Armada 37xx
- Add cpu clock node needed for CPU freq on Armada 7K/8K
- Enhance CP110 COMPHY support used by PCIe, USB3 and SATA
-----BEGIN PGP SIGNATURE-----
iF0EABECAB0WIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCXWZRawAKCRALBhiOFHI7
1a9pAKCbNBlpgHH5wTFrz9crOunl+zSe8gCgrCcCGiTwyKyPdPDEcZLd25eYQz4=
=/vad
-----END PGP SIGNATURE-----
Merge tag 'mvebu-dt64-5.4-1' of git://git.infradead.org/linux-mvebu into arm/dt
mvebu dt64 for 5.4 (part 1)
- Add mailbox support on Armada 37xx
- Add cpu clock node needed for CPU freq on Armada 7K/8K
- Enhance CP110 COMPHY support used by PCIe, USB3 and SATA
* tag 'mvebu-dt64-5.4-1' of git://git.infradead.org/linux-mvebu:
arm64: dts: marvell: Add cpu clock node on Armada 7K/8K
arm64: dts: marvell: Convert 7k/8k usb-phy properties to phy-supply
arm64: dts: marvell: Add 7k/8k PHYs in PCIe nodes
arm64: dts: marvell: Add 7k/8k PHYs in USB3 nodes
arm64: dts: marvell: Add 7k/8k per-port PHYs in SATA nodes
arm64: dts: marvell: Add CP110 COMPHY clocks
arm64: dts: marvell: armada-37xx: add mailbox node
Link: https://lore.kernel.org/r/875zmhzjml.fsf@FE-laptop
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Disable the kirkwood RTC that doesn't work on the ts219 board
-----BEGIN PGP SIGNATURE-----
iFwEABECAB0WIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCXWZPAQAKCRALBhiOFHI7
1XDhAJiWiPskIJ8+YYuSzyf7N7ukmN8ZAJ4sz+nfLMBlC9YiOaAI+eFywZUHfQ==
=hvyg
-----END PGP SIGNATURE-----
Merge tag 'mvebu-dt-5.4-1' of git://git.infradead.org/linux-mvebu into arm/dt
mvebu dt for 5.4 (part 1)
- Disable the kirkwood RTC that doesn't work on the ts219 board
* tag 'mvebu-dt-5.4-1' of git://git.infradead.org/linux-mvebu:
ARM: dts: kirkwood: ts219: disable the SoC's RTC
Link: https://lore.kernel.org/r/878srdzjpj.fsf@FE-laptop
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- New board support: i.MX8MQ Nitrogen8m, Hummingboard Pulse,
PICO-PI-IMX8M, i.MX8QXP AI_ML, and LS1046A FRWY board.
- Add gpio-ranges for GPIO devices on i.MX8MQ and i.MX8MM.
- Update OPP table according to latest data sheet and add opp-suspend
to OPP table for i.MX8MQ and i.MX8MM.
- Add IDEL states for i.MX8MM SoC.
- Correct I2C clock divider for Layerscape SoCs.
- Add series alias and LPUART baud clock for i.MX8QXP SoC.
- Add MIPI D-PHY device for i.MX8MQ and enable it on imx8mq-librem5
board.
- Enable USB1 and Type-C support for i.MX8MM EVK board.
- Add Thermal Monitor Unit support for LS1028A SoC.
- Misc small update and correction on Layerscape and i.MX8 support.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJdYqNmAAoJEFBXWFqHsHzOXFoH/2x5pFXOcHkGcfjWAjguYu4C
gd+fgY/KIBR/t9Fk0Etvi6TRxB6qU061zOrjQSRIB8NCv7zy9P4LuJnyHQsJB8fw
XRYExzxtnsH2NAwpLQN1CX4AFqe9hGEGM3xspck6DQAA5S1fQUBSaak88WqEgfQp
kpf+PnoLMtrG6aUYHQbZXP1WSweH9w6zZwJUlN9YxTeJO91cHCbXdKPZ7NkLasxM
5hLeE8LCFaPGXeAPcgCXyweu2Lv9ncp5R+hx6tb4psfOd18RVz6mTWPYerAW7P/U
EBP/0hTm+7Lk4G4sZJ8a06Of1wBpDD1QprMa0fslzFRt7QzgbOYEvPINlVXRTAk=
=1mGW
-----END PGP SIGNATURE-----
Merge tag 'imx-dt64-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt
i.MX arm64 device tree update for 5.4:
- New board support: i.MX8MQ Nitrogen8m, Hummingboard Pulse,
PICO-PI-IMX8M, i.MX8QXP AI_ML, and LS1046A FRWY board.
- Add gpio-ranges for GPIO devices on i.MX8MQ and i.MX8MM.
- Update OPP table according to latest data sheet and add opp-suspend
to OPP table for i.MX8MQ and i.MX8MM.
- Add IDEL states for i.MX8MM SoC.
- Correct I2C clock divider for Layerscape SoCs.
- Add series alias and LPUART baud clock for i.MX8QXP SoC.
- Add MIPI D-PHY device for i.MX8MQ and enable it on imx8mq-librem5
board.
- Enable USB1 and Type-C support for i.MX8MM EVK board.
- Add Thermal Monitor Unit support for LS1028A SoC.
- Misc small update and correction on Layerscape and i.MX8 support.
* tag 'imx-dt64-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (41 commits)
arm64: dts: imx8mq: Add mux controller to iomuxc_gpr
arm64: dts: fsl: add support for Hummingboard Pulse
arm64: dts: ls1088a: update gpio compatible
arm64: dts: imx: Add i.mx8mq nitrogen8m basic dts support
arm64: dts: ls1088a-qds: Add the spi-flash nodes under the DSPI controller
arm64: dts: ls1088a: Add the DSPI controller node
arm64: dts: imx8mm: Enable cpu-idle driver
arm64: dts: ls1028a: Add esdhc node in dts
arm64: dts: ls1028a: Add properties node for Display output pixel clock
arm64: dts: lx2160a: Fix incorrect I2C clock divider
arm64: dts: ls1028a: Fix incorrect I2C clock divider
arm64: dts: ls1012a: Fix incorrect I2C clock divider
arm64: dts: ls1088a: Fix incorrect I2C clock divider
arm64: dts: ls1028a: fix gpio nodes
arm64: dts: ls1028a: Add Thermal Monitor Unit node
arm64: dts: imx8mq-evk: Unbypass audio_pll1
arm64: dts: imx8mm: Add opp-suspend property to OPP table
arm64: dts: imx8mq: Add opp-suspend property to OPP table
arm64: dts: ls1088a: Revise gpio registers to little-endian
arm64: dts: add the console node for DPAA2 platforms
...
Link: https://lore.kernel.org/r/20190825153237.28829-6-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- New board support: ZII i.MX7 RMU2, Kontron i.MX6UL N6310, and
PHYTEC phyBOARD-Segin based on i.MX6ULL.
- A series from Andrey Smirnov to update vf610-zii boards on I2C
pinmux, switch watchdog, GPIO expander IRQ.
- Move GIC node into soc node for i.MX6 SoCs.
- Add OV5645 camera support for imx6qdl-wandboard board.
- Drop unneeded snvs_pwrkey node for imx7d-zii-rpu2 and imx7-colibri.
- Use simple-mfd instead of simple-bus for i.MX6 ANATOP.
- Move the native-mode property inside the display-timings node for
various i.MX25 and i.MX27 boards.
- Add EDMA devices for i.MX7ULP SoC.
- A series from Stefan Riedmueller to update imx6ul-phytec-segin board
on various devices.
- Use OF graph to describe the display for opos6uldev board.
- Misc random updates on i.MX7/6 boards.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJdYpwdAAoJEFBXWFqHsHzOpjMH/ArmJ/FlGDFmyffpXIT1qQdu
vyHdwySvCtftUsypDAhPSD43eFAOwqqfZR8b05UA+LE3TYKildxu4X2eEK2eFVn9
d97AEUuC49utHv9kf28kVPX0atI3QgqwJOW8/Xa1dlJl8CZN4GupmbLzYl9w6zF/
ii1WCzfnKjCQRW7s6+vFGqSdBnT1QXGSVXSYv5JI9MDh2qCzuYB1AI11CEnemYAq
pgJdTtdgW5g8sn8NHoAzQ9nUsq2IPkBHZzmt38eVk2YyvOmrMnpktNlBzMIBGaCJ
q6tmU7GaLrgcXe/lQMApBZ21jieAeKLWY+mdYN+kg1EumZHzllfitBZKYcL7mVs=
=DoYY
-----END PGP SIGNATURE-----
Merge tag 'imx-dt-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt
i.MX arm32 device tree changes for 5.4:
- New board support: ZII i.MX7 RMU2, Kontron i.MX6UL N6310, and
PHYTEC phyBOARD-Segin based on i.MX6ULL.
- A series from Andrey Smirnov to update vf610-zii boards on I2C
pinmux, switch watchdog, GPIO expander IRQ.
- Move GIC node into soc node for i.MX6 SoCs.
- Add OV5645 camera support for imx6qdl-wandboard board.
- Drop unneeded snvs_pwrkey node for imx7d-zii-rpu2 and imx7-colibri.
- Use simple-mfd instead of simple-bus for i.MX6 ANATOP.
- Move the native-mode property inside the display-timings node for
various i.MX25 and i.MX27 boards.
- Add EDMA devices for i.MX7ULP SoC.
- A series from Stefan Riedmueller to update imx6ul-phytec-segin board
on various devices.
- Use OF graph to describe the display for opos6uldev board.
- Misc random updates on i.MX7/6 boards.
* tag 'imx-dt-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (53 commits)
ARM: dts: vf610-zii-scu4-aib: Configure IRQ line for GPIO expander
ARM: dts: imx6ul-kontron-n6310: Add Kontron i.MX6UL N6310 SoM and boards
ARM: dts: vf610-zii-cfu1: Slow I2C0 down to 100 kHz
ARM: dts: pbab01: correct rtc vendor
ARM: vf610-zii-cfu1: Add node for switch watchdog
ARM: dts: imx6: drop gpmi-nand address and size cells
ARM: dts: imx6: replace simple-bus by simple-mfd for anatop
ARM: dts: imx6qdl-colibri: add phy to fec
ARM: dts: imx7-colibri: add recovery for I2C for iMX7
ARM: dts: imx7-colibri: Add sleep pinctrl to ethernet
ARM: dts: imx7-colibri: prepare module device tree for FlexCAN
ARM: dts: imx7-colibri: disable HS400
ARM: dts: imx7-colibri: make sure module supplies are always on
ARM: dts: imx7d: cl-som-imx7: add compatible for phy
ARM: dts: imx7d: cl-som-imx7: make ethernet work again
ARM: dts: imx6ul: Add csi node
ARM: dts: imx25: mbimxsd25: native-mode is part of display-timings
ARM: dts: apf27dev: native-mode is part of display-timings
ARM: dts: edb7211: native-mode is part of display-timings
ARM: dts: imx27-phytec-phycore-rdk: native-mode is part of display-timings
...
Link: https://lore.kernel.org/r/20190825153237.28829-5-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- A series from Anson Huang to add i.MX8MN SoC and DDR4 EVK board
device tree support.
- Add DSP device tree support for i.MX8QXP SoC.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJdYom7AAoJEFBXWFqHsHzOVG8H/RTfCTmRCBaClVZ031GWl/Q2
2NP+AY1l8UE0NKsvEuoMf/VY1atvFNgDvbm4gV1PW5KOBbgZmB3M32lHvXfqbLOu
vACCc8b7JY/8scWUgQBNbE5xAiZjPkLPuIYNJTLmrgVrYkYhtkB/4pwAk9YjVlYt
eHF3SWizKmam8vV3yp6KUNKvEYPBiMBfjSHDUvgT0GHUB4SHpPm/ERruTdKxP0Zm
c730yvV320XiKvxuErdvNfsw6FWs8Bhp8xCIhvF4Wbm0w4c5ucuqHKSV1v63lbbj
GVfdi0cH/eKlugNhfhIH7RsYL5TYjCDwzEyBSnqGCaBW+gnTpRnFkEricgvB+yY=
=3nO3
-----END PGP SIGNATURE-----
Merge tag 'imx-dt-clkdep-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt
i.MX device tree update with new clocks:
- A series from Anson Huang to add i.MX8MN SoC and DDR4 EVK board
device tree support.
- Add DSP device tree support for i.MX8QXP SoC.
* tag 'imx-dt-clkdep-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
arm64: dts: imx8qxp: Add DSP DT node
arm64: dts: imx8mn: Add cpu-freq support
arm64: dts: imx8mn-ddr4-evk: Add rohm,bd71847 PMIC support
arm64: dts: imx8mn-ddr4-evk: Add i2c1 support
arm64: dts: freescale: Add i.MX8MN DDR4 EVK board support
arm64: dts: imx8mn: Add gpio-ranges property
arm64: dts: freescale: Add i.MX8MN dtsi support
clk: imx8: Add DSP related clocks
clk: imx: Add support for i.MX8MN clock driver
clk: imx: Add API for clk unregister when driver probe fail
clk: imx8mm: Make 1416X/1443X PLL macro definitions common for usage
dt-bindings: imx: Add clock binding doc for i.MX8MN
Link: https://lore.kernel.org/r/20190825153237.28829-4-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Remove regulator-boot-off properties that we never had in the mainline
kernel so they won't do anything. We add stdout-path for gta04, and
make am335x-boneblue use am335x-osd335x-common.dtsi file.
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAl1gZ14RHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXOEuRAAopDCOC3rJST6vk20mVGe8VI+teyErjWi
oLtZqsvJ8IgMz3oKGxrpsUU9OX1PtBlnQk/UlyyEGvHKHJCqmNXgAef1ZQ3f8pSH
nxqIMAZVMW2RKW1UIY432zN7V7/BbKhMXJnCk9AQhiuy3myL2P02a0+RPyVHT9IF
0o+6j7JqPQ20UsKTqqe0x78HJxfsGq4XGbJCs2RYYmrhOmYLnQ8lVP4s2o+8lLT7
nPH4fL0BNpiPzUEmL80fcyuq9jJwzbUnzYPAZTcVs4N1eZK9VYH7VA4Z7LvdwmLC
H4S0Ov70kQ4QpVoX79OGtf4eeeZHDWi2F3QyLDgAAOF9+kuz2CNCYSIqnNBez/4p
3ptnFnZneiU2GxnP8SQEfCQVCJ74HC6JRqpaM7AYpTXhYmkFy8N4Rp2che53c6in
ogRdejW+4XEM87wdsXAghH32Y9H4hvtp13bEvBDN9BiZt/Ok8WFTsBOVtlZ0DGgw
Gf42oKqWvYPMhkwq2Q5qH9CWuHYsTghNCKiufYh6s/muMgWP7Jxg2vVV3JbGFOq2
CvR5xw7V0rMoULKwmHvVSm3/21RLvdNRJMqEhhjvF+590pQPqX1/w5WuIOTRo/u1
+Y1Qwiq7zLEy8GrzM58EiDdes48rpkeKN29QNhJavwK1uKF5QFXy8H5hk2xcfYGK
PmPTZnUhMFg=
=Utq2
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v5.4/dt-take2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt
dts changes for omap variants for v5.4
Remove regulator-boot-off properties that we never had in the mainline
kernel so they won't do anything. We add stdout-path for gta04, and
make am335x-boneblue use am335x-osd335x-common.dtsi file.
* tag 'omap-for-v5.4/dt-take2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: am335x-boneblue: Use of am335x-osd335x-common.dtsi
ARM: dts: gta04: define chosen/stdout-path
ARM: dts: omap3-n950-n9: Remove regulator-boot-off property
ARM: dts: am335x-cm-t335: Remove regulator-boot-off property
Link: https://lore.kernel.org/r/pull-1566599057-142651@atomide.com-2
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Our usual pile of patches for the next release, which include mostly:
- More fixes thanks to the DT validation using the YAML bindings
- IR receiver support on the H6
- SPDIF support on the H6
- I2C Support on the H6
- CSI support on the A20
- RTC support on the H6
- New Boards: Lichee Zero Plus, Tanix TX6, A64-Olinuxino-eMMC
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCXV/6JgAKCRDj7w1vZxhR
xc+VAQDjZWvNeMX75qsrz7Jbdy7jlbJJ/oDFBGx3C4clcTn7tgD6AsHeM760Pc6o
4a7G5DGcJakuFGsb1s4hNQOylmG3IQ4=
=pXxO
-----END PGP SIGNATURE-----
Merge tag 'sunxi-dt-for-5.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt
Allwinner DT changes for 5.4
Our usual pile of patches for the next release, which include mostly:
- More fixes thanks to the DT validation using the YAML bindings
- IR receiver support on the H6
- SPDIF support on the H6
- I2C Support on the H6
- CSI support on the A20
- RTC support on the H6
- New Boards: Lichee Zero Plus, Tanix TX6, A64-Olinuxino-eMMC
* tag 'sunxi-dt-for-5.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (40 commits)
arm64: dts: allwinner: orange-pi-3: Enable WiFi
ARM: dts: sunxi: Add missing watchdog clocks
ARM: dts: sunxi: Add missing watchdog interrupts
arm64: dts: allwinner: h6: Add support for RTC and fix the clock tree
ARM: dts: sun7i: Add CSI0 controller
arm64: dts: allwinner: a64: Add A64 OlinuXino board (with eMMC)
dt-bindings: arm: sunxi: Add compatible for A64 OlinuXino with eMMC
ARM: dts: v3s: Change the timers compatible
ARM: dts: h3: Change the timers compatible
ARM: dts: a83t: Change the timers compatible
ARM: dts: a23/a33: Change the timers compatible
ARM: dts: sun6i: Add missing timers interrupts
ARM: dts: sun5i: Add missing timers interrupts
ARM: dts: sun4i: Add missing timers interrupts
dt-bindings: mfd: Convert Allwinner GPADC bindings to a schema
arm64: dts: allwinner: h6: Introduce Tanix TX6 board
dt-bindings: arm: sunxi: Add compatible for Tanix TX6 board
arm64: allwinner: h6: add I2C nodes
dt-bindings: i2c: mv64xxx: Add compatible for the H6 i2c node.
ARM: dts: sunxi: Add mdio bus sub-node to GMAC
...
Link: https://lore.kernel.org/r/d97e6252-9dd7-4cf5-a3cf-56f78b0ca455.lettre@localhost
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Highlights
- odroid-c1: use MAC address from efuse
- add VDD_EE regulator to several boards
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEEe4dGDhaSf6n1v/EMWTcYmtP7xmUFAl1cbb0ACgkQWTcYmtP7
xmXlwhAAhPL9N9p4sLYjGy7CMGYzN9N5SJ7mufADC2K1uTDe7BREtgkFZaFRcnTp
MBuCkrLb+aRn8iIsdKHo1Y1uOJ5XHo5kXMCEWzT2BsA9ilzBZ7u+/Zeb3izi7OCy
Vti92xWePzsTQqtYBVnOhmwX/QpGLeED3XC+t87IrjI7PMiyGUjq34PPf9QycdAh
Ck0o8SFCb8OuVqXsbiCyKkbZs7naAiuJKXIMxRQj/4THE1mMjfgVxKYZpMiUI0pQ
CdCucZ5RJ3ylhmA6T8ikhxbUWRrZwrtklgUsPuZAVIyXh/eOYlpCunPsdsDlRm8z
a8DfNOzIXLyQWfYrNjFE7NShEPkb7aV4HN4E73CCgvAivthoh5hpcmv4FnFsqH20
frta6qcvKzNpk88mc95NQJ3a5OWVaGK6CJYfGK2VBI6+y5+QKXntUzp9kxiZqysH
6/ghU7xP8QSdynno88UqHubwpyMEfWVAIymS3ziRheu7LX02OIGE0ZEpmzu5e7gU
kozGilY6pQr7lHP9K1LlKI1DYi5P3UFGNF09YjZPsp9xiPeQKXAmBkWUrYFdk1+x
urpsrL3Pd+RD77ZOq8xTHnO3zL3vKzhIh2ginnzaC9zxjKR72VEgU90SLy/oDboT
W8x2oG5UrkDVPMrBSiNWg5IUNqYjSLJonIf+afXbr9cqlwX3Y4I=
=zCaj
-----END PGP SIGNATURE-----
Merge tag 'amlogic-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dt
ARM: dts: Amlogic updates for v5.4
Highlights
- odroid-c1: use MAC address from efuse
- add VDD_EE regulator to several boards
* tag 'amlogic-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
ARM: dts: meson8b: odroidc1: use the MAC address stored in the eFuse
ARM: dts: meson8b: mxq: add the VDDEE regulator
ARM: dts: meson8b: odroidc1: add the VDDEE regulator
ARM: dts: meson8b: ec100: add the VDDEE regulator
ARM: dts: meson8b: add the PWM_D output pin
ARM: dts: meson8b: add ethernet fifo sizes
Link: https://lore.kernel.org/r/7hzhk3bi96.fsf@baylibre.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
the Kevin Chromebook and a new board the Leez P710 SBC.
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAl1X/7UQHGhlaWtvQHNu
dGVjaC5kZQAKCRDzpnnJnNEdgSeCB/4o5aQ6PRfpm+TnXIdiw1GqnhAp3lhQLtT/
jZkSAiANcH2tFyFiPOjPDARbnd7T2J8ZxfBzJt5/5z/VsCpwh0BQGJFXq4Htbnfj
d9YkhS7N9y1tRuCregpD/0LcKXSdttmYXiiHUzuL3FzNtU1U5buXf4pyDDwqtvNN
AYiKYvUixO+Sr3J71Ww4WWXZUt/m2VEN4MPvjjheMSWCSmSV3pw1yjKSb+MpovfP
tBdPjOCKizDm2W/+5eLCH4HbV6A7bp5GA4v71Qt9B5UT1RxdZ4befx9JJqgJteDw
uEyHiSyf4jdjczHAxMryuev0yiU2r/UsGGintDLMggpAI6dcXk9O
=52SD
-----END PGP SIGNATURE-----
Merge tag 'v5.4-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt
PWM-Fan and nor-flash for the RockPro64, a better display mode for
the Kevin Chromebook and a new board the Leez P710 SBC.
* tag 'v5.4-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm64: dts: rockchip: Add dts for Leez RK3399 P710 SBC
arm64: dts: rockchip: enable internal SPI flash for RockPro64.
arm64: dts: rockchip: Add PWM fan for RockPro64
arm64: dts: rockchip: Specify override mode for kevin panel
Link: https://lore.kernel.org/r/20190819141659.26414-1-dinguyen@kernel.org
Link: https://lore.kernel.org/r/2362486.gYoCZEsBuK@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
areas and also a 100ms speedup as a delay isn't needed anymore.
New boards are Tiger and Fievel from the Veyron family and the Mecer Xtreme
Mini S6, which I think is the first consumer-grade rk3229-based device in
the kernel.
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAl1X/0cQHGhlaWtvQHNu
dGVjaC5kZQAKCRDzpnnJnNEdgT2RB/0X8SGcSRLL6vGCBH4vbATtnh1ceh6O2GA8
NO1N+OgQjPQWQyVx8ZWb7oaWgECwnXn41WT1HP9t0KB4w4sILZEswJrDRKV0dj1o
g+8tpgdxzJ7YF+vEkW1EcdPU2d1bRBJZ4qN38t2/StWg5WCrfThM2zBEUEJyWHpr
QYfSVXmhvPHISyZE+/k0tdgBhEi3KQph7ZVPhsmhugd1PeIV5lMDTVx4H7ljdnuC
/rVM/Yj+93r23bMgp6VGaMQmidlymYWCwxdTM4d4vDozViaykJ38BwDKVzfXX99y
hxA2BxKjp+37tuy4r4IO3kuqTEH6b4rvZzdNxJwBrGmIcBfv3n9j
=b567
-----END PGP SIGNATURE-----
Merge tag 'v5.4-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt
A lot more love for Veyron devices with cleanups in the display and wifi
areas and also a 100ms speedup as a delay isn't needed anymore.
New boards are Tiger and Fievel from the Veyron family and the Mecer Xtreme
Mini S6, which I think is the first consumer-grade rk3229-based device in
the kernel.
* tag 'v5.4-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: add device tree for Mecer Xtreme Mini S6
Revert "ARM: dts: rockchip: add startup delay to rk3288-veyron panel-regulators"
ARM: dts: rockchip: Add pin names for rk3288-veyron fievel
ARM: dts: rockchip: A few fixes for veyron-{fievel,tiger}
ARM: dts: rockchip: Cleanup style around assignment operator
ARM: dts: rockchip: add veyron-tiger board
ARM: dts: rockchip: add veyron-fievel board
dt-bindings: ARM: dts: rockchip: Add bindings for rk3288-veyron-{fievel,tiger}
ARM: dts: rockchip: consolidate veyron panel and backlight settings
ARM: dts: rockchip: move rk3288-veryon display settings into a separate file
ARM: dts: rockchip: Limit WiFi TX power on rk3288-veyron-jerry
ARM: dts: rockchip: Specify rk3288-veyron-minnie's display timings
ARM: dts: rockchip: Specify rk3288-veyron-chromebook's display timings
Link: https://lore.kernel.org/r/1611583.rKl1eQBRh8@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
1. Add AHCI to Exynos5250,
2. Add camera and GPU power domains to Exynos5422,
3. Minor cleanup.
-----BEGIN PGP SIGNATURE-----
iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAl1W0McQHGtyemtAa2Vy
bmVsLm9yZwAKCRDBN2bmhouD11NdD/9gBRh/aDmWNcY7nAtUzQKeexRdG0BQtEXO
sRot5nSJPmlz/AtCLtX+q8R+ZpbpDtLj3GWYHPE+1tU8JFoSaLgAvP8lSqK/n+mQ
52uYKRWKjhrZgCRXVbMJMCxmse7V+QvA5r/182T+TIJBcfnWPyJ6U0UpI89mDaqv
qTJkB/bUh6i2O+HJBj2QOUTi91J5Uo3OEemSksHezfVlhShVC6JdvTCnJ+eUCukY
qRScDpORRigoxIIhpU38af7pxfkHteIWiboZ24UrqPbI9lIV7ipUY9iRxaSKTF7T
ZSNNMUc9WVYmqxSLb9SBEpfXQuPG4v0ENdxh7ZI17hv3tjTrbp6R3YjCgqWuFJxr
2hfW5wJFdl5QrxESN5KiudtSoW8ArFNH/Sl1funy/fJu8foJznpe31ELlvl1hmgG
n1MqY4uMhieozMse/OJd32zs5amqNkUo9vsvg+R/Bm5rrWMwmyyBcyrLd20/3Qar
OwlKHKoX9OgjitQS0UUsDc6MB+Q4qWUTpdaG4eEKXty0OxRGvSoJvZmeG8rWqidi
tA2kaB60+XjB6CrefQoSI68z4qkNT5DXibrn9tMiK5mmzfempLA2RH5A+4sW0GKi
3KC1djjThCMs4yKpfcSVqP/c37+mNE0r68K0UFIWPSTpbRenEvQxKrAdd6vRYzmL
Ntz7AggayQ==
=HMId
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt
Samsung DTS ARM changes for v5.4
1. Add AHCI to Exynos5250,
2. Add camera and GPU power domains to Exynos5422,
3. Minor cleanup.
* tag 'samsung-dt-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: exynos: Add CAM power domain to Exynos5422/5800
ARM: dts: exynos: Add G3D power domain to Exynos542x
ARM: dts: exynos: Move MSC power domain to the right (sorted) place
ARM: dts: exynos: Add port map to Exynos5250 AHCI node
ARM: dts: exynos: Use space after '=' in exynos4412-itop-scp-core
Link: https://lore.kernel.org/r/20190816163042.6604-2-krzk@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Commit aff138bf8e ("ARM: dts: exynos: Add TMU nodes regulator supply
for Peach boards") assigned LDO10 to Exynos Thermal Measurement Unit,
but it turned out that it supplies also some other critical parts and
board freezes/crashes when it is turned off.
The mentioned commit made Exynos TMU a consumer of that regulator and in
typical case Exynos TMU driver keeps it enabled from early boot. However
there are such configurations (example is multi_v7_defconfig), in which
some of the regulators are compiled as modules and are not available
from early boot. In such case it may happen that LDO10 is turned off by
regulator core, because it has no consumers yet (in this case consumer
drivers cannot get it, because the supply regulators for it are not yet
available). This in turn causes the board to crash. This patch restores
'always-on' property for the LDO10 regulator.
Fixes: aff138bf8e ("ARM: dts: exynos: Add TMU nodes regulator supply for Peach boards")
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
The Exynos3250 ADC has its own compatible because of differences from
other Exynos SoCs. Therefore it is not entirely compatible with
samsung,exynos-adc-v2. Remove the samsung,exynos-adc-v2.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
The commit d4609acce187 ("arm64: dts: meson-sm1-sei610: enable DVFS")
incorrectly removed the chosen node and the stdout-path property.
Add these back.
Fixes: d4609acce187 ("arm64: dts: meson-sm1-sei610: enable DVFS")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This enables DVFS for the Amlogic SM1 based SEI610 board by:
- Adding the SM1 SoC OPPs taken from the vendor tree
- Selecting the SM1 Clock controller instead of the G12A one
- Adding the CPU rail regulator, PWM and OPPs for each CPU nodes.
Each power supply can achieve 0.69V to 1.05V using a single PWM
output clocked at 666KHz with an inverse duty-cycle.
DVFS has been tested by running the arm64 cpuburn at [1] and cycling
between all the possible cpufreq translations of the cpu cluster and
checking the final frequency using the clock-measurer, script at [2].
[1] https://github.com/ssvb/cpuburn-arm/blob/master/cpuburn-a53.S
[2] https://gist.github.com/superna9999/d4de964dbc0f84b7d527e1df2ddea25f
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add the Amlogic SM1 based Khadas VIM3L, sharing all the same features
as the G12B based VIM3, but:
- a different DVFS support since only a single cluster is available
- audio is still not available on SM1
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The Khadas VIM3 is also available as VIM3L with the Pin-to-pin compatible
Amlogic SM1 SoC in the S905D3 variant package.
Change the description to match the S905X3/D3/Y3 variants like the G12A
description, and add the khadas,vim3l compatible.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
To prepare support of the Amlogic SM1 based Khadas VIM3, move the non-G12B
specific nodes (all except DVFS and Audio) to a new meson-khadas-vim3.dtsi
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add the reset to the TDM formatters of the g12a. This helps
with channel mapping when a playback/capture uses more than 1 lane.
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The clock controller dedicated to audio clocks also provides reset lines
on the g12 SoC family
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This enables DVFS for the Amlogic SM1 based SEI610 board by:
- Adding the SM1 SoC OPPs taken from the vendor tree
- Selecting the SM1 Clock controller instead of the G12A one
- Adding the CPU rail regulator, PWM and OPPs for each CPU nodes.
Each power supply can achieve 0.69V to 1.05V using a single PWM
output clocked at 666KHz with an inverse duty-cycle.
DVFS has been tested by running the arm64 cpuburn at [1] and cycling
between all the possible cpufreq translations of the cpu cluster and
checking the final frequency using the clock-measurer, script at [2].
[1] https://github.com/ssvb/cpuburn-arm/blob/master/cpuburn-a53.S
[2] https://gist.github.com/superna9999/d4de964dbc0f84b7d527e1df2ddea25f
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
