- Allow using Armada 3700 gpio controller as interrupt one too
- Describe SPI flash on the EspressoBin
- Mark ahci as dma-coherent for Armada 7K/8K
- Add 10G interface support Armada 7K/8K based boards (including MacBin)
-----BEGIN PGP SIGNATURE-----
iF0EABECAB0WIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCWv8DYwAKCRALBhiOFHI7
1XpdAKCGSSJQjUSkwu7luezYH9Hz0rRkkQCgoPNedba4WxKrKck5aIFiqHyaFBk=
=pUZZ
-----END PGP SIGNATURE-----
Merge tag 'mvebu-dt64-4.18-1' of git://git.infradead.org/linux-mvebu into next/dt
mvebu dt64 for 4.18 (part 1)
- Allow using Armada 3700 gpio controller as interrupt one too
- Describe SPI flash on the EspressoBin
- Mark ahci as dma-coherent for Armada 7K/8K
- Add 10G interface support Armada 7K/8K based boards (including MacBin)
* tag 'mvebu-dt64-4.18-1' of git://git.infradead.org/linux-mvebu:
arm64: dts: marvell: armada-37xx: mark the gpio controllers as irq controller
arm64: dts: marvell: 7040-db: describe the 10G interface as fixed-link
arm64: dts: marvell: 8040-db: describe the 10G interfaces as fixed-link
arm64: dts: marvell: mcbin: enable the fourth network interface
arm64: dts: marvell: mcbin: add 10G SFP support
arm64: dts: marvell: mark CP110 ahci as dma-coherent
arm64: dts: armada-3720-espressobin: wire up spi flash
Signed-off-by: Olof Johansson <olof@lixom.net>
- Add mailbox, stub clock, CPU frequency scaling, thermal cooling
management and pcie msi interruption support for hi3660
- Add LPC support for hip06 and hip07
- Add PCIe, usb and emmc support for hi3798cv200
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJa+umIAAoJEAvIV27ZiWZcItwP/R4kgy+0SKzmHzTXVdfIv1UT
PrxVLLBsGfk2XosBfLAOGOIR7eVH4AtYWs1J6Nsu8yIs1df3+YdUeapOpdzGJiA3
rKG5boI4v2rrMQ75T8gXXzePAth+zgwC3JFKFZioU2kpBYLW1GM9spT7dhdb+Xj8
gETrp/I120KrtSCAmxwT0dG0n0uwDB1ZtWGTDiVFJD6A5LNJte96kd5haShMqLo1
HACVKNc5i5QqfLu/NjsNxu5KBUYUjgHbZnuqbnpfGi2mBjlLYnfp/l0Qu88nfbiO
xVlWem7H0OziO5XxNNaLk8mZ9jZw+Ak9sspDa9+htM4GMkqM0z6WdN52E9Guj1Ll
xOl3ZghM3Z/qwZB4Rnlduhi2R7IKi6el+942Kc3A6gyhJaifHxBn4+BMJ2t1UytR
zTIEj+YhgYQ37TvR/PZkESrAXxpKtH4CwNRZ7gycWBJaVhSGsZTGEW53AnqeTAOf
EKGDoQ/iyZ/T4vNArCAGa7V1Opf3P4pj60rnc8gC6AidDlys9cKEFmkOXTtdFJe0
D3DW9pVIstUm31znKSob13DRHZLPMyoui1ZjDNrbEPLp9ayY5FVkEg2c/1w/dUvo
wNfpTWhgQB8mvsqiQ5P4urjyv9Gv45v4GfRB7GAAed9s7YYXzOmuOpktthQMmLl/
/Zjt36JIyhQ8g//E44NC
=7lcf
-----END PGP SIGNATURE-----
Merge tag 'hisi-arm64-dt-for-4.18v2' of git://github.com/hisilicon/linux-hisi into next/dt
ARM64: DT: Hisilicon SoC DT updates for 4.18v2
- Add mailbox, stub clock, CPU frequency scaling, thermal cooling
management and pcie msi interruption support for hi3660
- Add LPC support for hip06 and hip07
- Add PCIe, usb and emmc support for hi3798cv200
* tag 'hisi-arm64-dt-for-4.18v2' of git://github.com/hisilicon/linux-hisi:
arm64: dts: hi3798cv200: enable emmc support for poplar board
arm64: dts: hi3798cv200: enable usb2 support for poplar board
arm64: dts: hi3798cv200: enable PCIe support for poplar board
arm64: dts: hisi: Enable Hisi LPC node for hip07
arm64: dts: hisi: Enable Hisi LPC node for hip06
arm64: dts: hi3660: Add pcie msi interrupt attribute
arm64: dts: hi3660: Add thermal cooling management
arm64: dts: hi3660: Add CPU frequency scaling support
arm64: dts: hi3660: Add stub clock node
arm64: dts: hi3660: Add mailbox node
Signed-off-by: Olof Johansson <olof@lixom.net>
This allows to reference these gpio controller as interrupt parent. Also
add a comment which cpu line names are managed by the controllers
because "nb" and "sb" usually doesn't appear in schematics, but MPPX_Y
do.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This patch adds a fixed-link node to the 10G interface of the 7040-db
board. This is required as the mvpp2 driver now uses phylink. The best
solution would have been to describe the SFP cage but they are not
wired correctly, and thus unusable, so we chose to use fixed-link
instead.
Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This patch adds a fixed-link node to both 10G interfaces of the 8040-db
board. This is required as the mvpp2 driver now uses phylink. The best
solution would have been to describe the SFP cages but they are not
wired correctly, and thus unusable, so we chose to use fixed-link
instead.
Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This patch enables the fourth network interface on the Marvell
Macchiatobin. It is configured in the 2500Base-X PHY mode. The SFP cage
is also described.
Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This patch adds the SFP cage description in the Marvell Armada 8040
mcbin, for both 10G interfaces.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
[Antoine: small reworks, commit message]
Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
usb3-phy otg-port and better ajustment for the cpll child clocks.
On the board side, all rk3399 got their typec phys enabled - which
is needed for better usb support, the sapphire board got some more
properties moved to the excavator baseboard where they really belong,
kevin got a fix to use a real devicetree compatible and puma-haikou
got its hdmi port enabled.
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAlr5cvgQHGhlaWtvQHNu
dGVjaC5kZQAKCRDzpnnJnNEdgUvPCAC1lIIvNsPrnstlFrRcq8M+ijJaAvGQog3l
oFRdGpLENJc5rSrwCushK1b8attZxYE5kSd8ly4PK3LzM5w9vlXwSh3qOXzIfaX1
ClsJj7kXOJwVDsesvvWN9Dzc83D+552fCsNBru+ifTNqwo9JQ1neZhVzE2LsVFHh
mbXnNk0VlxtqXRT3TlIc1WZnVX9+4TQZMmXD9QRaFsHOqJ0fRaysn5SVKEYkbLDa
v9wLhrbjsbhnY01QLCguhKinMUs5lYLBn1PWkcAZdtf3Jctzlt0H5aFs13YCYdBA
4n8zGn21wrHlh3rvkn1ayysWESj6mc+Br1TFVMuqMCag7fId8Qsh
=fbhd
-----END PGP SIGNATURE-----
Merge tag 'v4.18-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
All iommus got their clocks added and rk3399 got support for its
usb3-phy otg-port and better ajustment for the cpll child clocks.
On the board side, all rk3399 got their typec phys enabled - which
is needed for better usb support, the sapphire board got some more
properties moved to the excavator baseboard where they really belong,
kevin got a fix to use a real devicetree compatible and puma-haikou
got its hdmi port enabled.
* tag 'v4.18-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm64: dts: rockchip: enable hdmi on rk3399-puma-haikou
arm64: dts: rockchip: use canonical compatible for touchpad/touchscreen on gru-kevin
arm64: dts: rockchip: add clocks in iommu nodes
arm64: dts: rockchip: add usb3-phy otg-port support for rk3399
arm64: dts: rockchip: remove PCIe assigned-clocks in excavator baseboard
arm64: dts: rockchip: move rk3399-sapphire PCIe to excavator baseboard
arm64: dts: rockchip: assign clock rate for cpll child clocks on rk3399
arm64: dts: rockchip: enable typec-phy0 for rk3399-puma-haikou
arm64: dts: rockchip: enable typec-phy1 for rk3399-puma
arm64: dts: rockchip: enable typec-phy for rk3399-firefly
arm64: dts: rockchip: enable typec-phy for rk3399-sapphire
Signed-off-by: Olof Johansson <olof@lixom.net>
1. Add the missing connections to the STM output port as all endpoint
connections must be bidirectional.
2. Replace all the custom OF graph endpoint node names with the standard
'endpoint'
3. Cleanup to replace all underscores('_') with hyphens('-') in the
device node names
4. Syntactic restructuring of motherboard include file so that it can be
included at the top of any other DTS file as it should be rather than
existing include in the middle of the file at a specific location
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABCAAGBQJa+av7AAoJEABBurwxfuKYF7IQALj10J8sxdG9Os9AqvzsLO/+
CFziHD9oY+PjZnp9txMDCTtdFBqq5TS1vXvYB6E+gxH7LAfl76rnNH6UZeYPooVD
P2rBdK4n46/VfS3F4Z+PQFYgme8XmDyx/pK2uZbgxukGU0VhNPLlzP64tqF1Ky4J
iq8nkFeXJEq6e5J7qwAMM8oKnEaZh7Z93LN7FsHgeEQiocB9OHBNnB/FtCGQWk8Z
mc7OuoBjUMGSPQ4ucma0oWp7NdnBf4eXyP3UzxHusOdWR0cU++c9FLa1Y2qKnX7T
3HL6GVamOBKUP54nKiHB7Aj0kASWjYam2YdwSvlc3jIbCyRoh/Tgk6+UN9OdSiCf
vt0MaVigMhC9lw/BCA2LB0n0fyw45Yg1LQBLLc3NENlngAGJYM0E6waOpcmKsFu6
keo3vS9XxLkuy0qmzUUyzDdRuNQZNeAS4gbnTKsWdFmIv3sxxOqIrHNno4jDf1bL
P0gmxcQjZ0olbpGWzVALqvYgr2axyIM9QCEZa7HlDfemN70jYAaNapw/An2l10P6
Wfi6YT5/+jEwCiiPCtWe8+XX4yn+vgv6JCHI28tbglKIcFyOp14pIDHQhvw4FIEf
nRbjgN/ntn0cYElgCpekfN3ahbVjkYi0n+2WGlW6yitEi8ZH10lw7YXV4d6KqyOC
UL30JZ6H1zPLxQi0sGKs
=D/b9
-----END PGP SIGNATURE-----
Merge tag 'juno-updates-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/dt
ARMv8 Juno/Vexpress updates/cleanups for v4.18
1. Add the missing connections to the STM output port as all endpoint
connections must be bidirectional.
2. Replace all the custom OF graph endpoint node names with the standard
'endpoint'
3. Cleanup to replace all underscores('_') with hyphens('-') in the
device node names
4. Syntactic restructuring of motherboard include file so that it can be
included at the top of any other DTS file as it should be rather than
existing include in the middle of the file at a specific location
* tag 'juno-updates-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
arm64: dts: juno/rtsm: re-structure motherboard includes
arm64: dts: juno: replace '_' with '-' in node names
arm64: dts: juno: Fix "debounce-interval" property misspelling
arm64: dts: juno: fix OF graph endpoint node names
arm64: dts: juno: fix missing Coresight STM graph connection
Signed-off-by: Olof Johansson <olof@lixom.net>
1. Syntactic restructuring of motherboard include file so that it can be
included at the top of any other DTS file as it should be rather than
existing include in the middle of the file at a specific location
2. Use of standard GPIO controller bindings for few sysreg components
like LED, MMC Write Protect/Card Detect and Flash Write Protect
to fix some of the new DTC warnings
3. Cleanup to replace all underscores('_') with hyphens('-') in the
device node names
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABCAAGBQJa+apxAAoJEABBurwxfuKYgUIP/j+e5K4bm7GBtXezKyMmdsdK
J4dcfk/9ti2LOVqNveRy5N8Z1aeNd+QtXh/DFhCIdov1sjvjqWMV8Vw0K1PsziSB
aSQoFyscx0OQ0JKtFJVQdjOnHvCNSXQXz/XZC89AARLMHHxPdckfF7okQFzO22Xo
hk+cm+ith3cifnUxIt+JAZLg2xzU5/2+TfquGGDnP5wzJTxyX6B06bTOdZUNMzu3
zhVUIRwh/FVwPpsaDlWCjz2m1jeUq8TR9DUvlCTxzQ0yfPcMQb3dIvdxF7sVjrjc
m6xFkdgJJUCyFQ+Xtwp6cVHUpQJLmM0G3eKuIH6KfFAy1Sbfdyy/2LyH8OFgSe8C
eHgedg8ibcdHwXcjNhCj4uAd3tUZwUSwmwBPAICRHBK4zY35u+WFkmtvyjt+c5Bb
EvRNBDsi9/8zZEpBoAExmHvi7sLCxWdcOYLkWUbosgsHByToIbn0t6T0LtlN5mkF
ygFZUxTbdeiwN0yxkJ0qLAXs1L+dROMtz1YN54981vJmW/7/5mkpRvg/W4Zi0Fdx
EQu3FGUVx+p63olCCaCaXN9AydGNLbWv0w5qh6zcJEeUMIZ61v/k3npwZ8RjfUcH
nVBDBxfLbZqfscGUdcFOk1ul8Z8t40LTSeWmc7hYvv3rjXzrmpRtTibaT2H2DgaN
HtM3dD5I/rEdCv7lTxsb
=X3Vc
-----END PGP SIGNATURE-----
Merge tag 'vexpress-updates-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/dt
ARMv7 Vexpress updates/cleanups for v4.18
1. Syntactic restructuring of motherboard include file so that it can be
included at the top of any other DTS file as it should be rather than
existing include in the middle of the file at a specific location
2. Use of standard GPIO controller bindings for few sysreg components
like LED, MMC Write Protect/Card Detect and Flash Write Protect
to fix some of the new DTC warnings
3. Cleanup to replace all underscores('_') with hyphens('-') in the
device node names
* tag 'vexpress-updates-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
ARM: dts: vexpress: replace '_' with '-' in node names
ARM: dts: vexpress: use standard gpio bindings for sys_{led,mci,flash}
ARM: dts: vexpress: Restructure motherboard includes
Signed-off-by: Olof Johansson <olof@lixom.net>
It adds pinctrl device pinconf@8a21000, gpio-ranges for GPIO devices,
and then enables eMMC support for Hi3798CV200 Poplar board.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
It adds combophy devices under peripheral controller and enables PCIe
support for Hi3798CV200 Poplar board.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
The patch enables the HiSi LPC node for hip07, with
the IPMI child device.
Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
The patch enables the HiSi LPC node for hip06, with
IPMI and UART child devices.
Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Add nodes and properties for thermal cooling management support.
Signed-off-by: Tao Wang <jean.wangtao@linaro.org>
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Add two CPU OPP tables, one table is corresponding to one cluster,
which allow CPU frequency scaling on hi3660 platforms.
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Add stub clock node for hi3660 platform.
Reviewed-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Kaihua Zhong <zhongkaihua@huawei.com>
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Add the mailbox controller node for hi3660 platform.
Signed-off-by: Kaihua Zhong <zhongkaihua@huawei.com>
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
for 4.18, please pull the following:
- Stefan provides updates to the BCM2835 RNG Device Tree binding and
Device Tree node by adding its missing interrupt line.
- Rafal switches the Luxul XWC-1000 and the D-Link DIR-885L to the new
partitions syntax which allows specifying a partition parser
- Rafal also updates a bunch of BCM5301X Device Tree source files to a
more standard SPDX tag and dual GPL 2.0 and MIT. This is a follow-up
to this discussion with Greg:
https://lkml.org/lkml/2018/4/28/179
- Dan adds support for two Luxul devices: XAP-1610 (based on BCM47094)
and XWR-3150 V1 (similar to XWR-3100)
- Stefan provides a set of updates to the BCM283x Device Tree sources to
support the Raspberry Pi 3 B+ for both the ARM and ARM64 kernels. He
adds the required nodes for the LAN7515 USB Ethernet, Cypress CYW43455
BT/WiFi combo chip. Stefan also provides a few fixes for the PWM pin
assignment for RPi 3B and Zero/Zero W. Finally, Stefan adds the
missing GPIOs for controlling additional peripherals now that support
for the RPi 3 GPIO expander has landed
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJa9dQoAAoJEIfQlpxEBwcEmoIP/jlh7R8r+k1UI3JGBdskUuif
KG5LnFpw509zPJhtb70KgUWJ8QmzT2F0m1QtAvpsINmgZe3lZW+mnkcSP1k8rg6n
rJMz2hLb1ytVUxcoTvieUljh7F13qvME/RBp86BleVqjiAdMFw+nJb2Qgq++G8hV
Of7gqNH1+c8OvYfdx4kr91mbnvt9EHwuYuFAgPpcQNKGMWbfL+jpVg8aQBmIpKPi
R06YGmTzevdkCzuB5Uf/1yYYkQf00/CNP6bpI+0mq0zYH7nPj0UP5WS2NFIl47M3
rLnQi7ayvdg0YUR8wAG+PoyPW7QIBL3znTSOQAfjKFcN9FSnp7nPOXcjNt5ZfJBY
GNvVfy6PjRfqgrrfCfnAnJJ0bUPPB56NNv2gQWBSwjbXsvb7GgZaxBkWZfJKnsi7
W0T4zp0xQcM8S4/salUoUeFU+sZcETmU69e4Oa+/nurCcjxgFrxFlusPA7jBFouL
GLAH6xPEvY8Q8st8MYQYNSiJaigvIntb5eOGqdrpXHlsgKqXCJ7viwMYAH3+2csH
46I7fZxh+56ug1YIx51ZlQwJB77sa6vTHT2KZ4eycaZPglksnHhFB52Vdzxma7Bm
2mbkc/wbZQ4jvVQcxoLgjoGbzBJCQkIMBp84CatpM0t/yXQ2/E7yvtuQO+7f0W2/
G9V8oj1UVHG+ja4iu+RB
=R36h
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-4.18/devicetree' of https://github.com/Broadcom/stblinux into next/dt
This pull request contains Broadcom ARM-based SoC Device Tree changes
for 4.18, please pull the following:
- Stefan provides updates to the BCM2835 RNG Device Tree binding and
Device Tree node by adding its missing interrupt line.
- Rafal switches the Luxul XWC-1000 and the D-Link DIR-885L to the new
partitions syntax which allows specifying a partition parser
- Rafal also updates a bunch of BCM5301X Device Tree source files to a
more standard SPDX tag and dual GPL 2.0 and MIT. This is a follow-up
to this discussion with Greg:
https://lkml.org/lkml/2018/4/28/179
- Dan adds support for two Luxul devices: XAP-1610 (based on BCM47094)
and XWR-3150 V1 (similar to XWR-3100)
- Stefan provides a set of updates to the BCM283x Device Tree sources to
support the Raspberry Pi 3 B+ for both the ARM and ARM64 kernels. He
adds the required nodes for the LAN7515 USB Ethernet, Cypress CYW43455
BT/WiFi combo chip. Stefan also provides a few fixes for the PWM pin
assignment for RPi 3B and Zero/Zero W. Finally, Stefan adds the
missing GPIOs for controlling additional peripherals now that support
for the RPi 3 GPIO expander has landed
* tag 'arm-soc/for-4.18/devicetree' of https://github.com/Broadcom/stblinux:
ARM: dts: BCM5301X: Switch D-Link DIR-885L to the new partitions syntax
ARM: dts: BCM5301X: Relicense Asus RT-AC87U file to the GPL 2.0+ / MIT
ARM: dts: BCM5301X: Add DT for Luxul XAP-1610
ARM: dts: BCM5301X: Add DT for Luxul XWR-3150 V1
ARM: dts: BCM5301X: Relicense Buffalo files to the GPL 2.0+ / MIT
ARM: dts: BCM5301X: Relicense most DTS files to the GPL 2.0+ / MIT
arm64: dts: broadcom: Add reference to Raspberry Pi 3 B+
ARM: dts: bcm2837: Add Raspberry Pi 3 B+
dt-bindings: bcm: Add Raspberry Pi 3 B+
ARM: dts: bcm2837: Add missing GPIOs of Expander
ARM: dts: bcm283x: Fix PWM pin assignment
ARM: dts: BCM5301X: Switch Luxul XWC-1000 to the new fixed partitions syntax
ARM: bcm283x: Add missing interrupt for RNG block
dt-binding: rng: Add interrupt property for BCM2835
Signed-off-by: Olof Johansson <olof@lixom.net>
There are two Scaler devices in Exynos5433 SoCs. Add nodes for them and
their SYSMMU controllers.
Signed-off-by: Andrzej Pietrasiewicz <andrzej.p@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
- Mitigate Spectre-v2 for NVIDIA Denver CPUs
- Free memblocks corresponding to freed initrd area
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABCgAGBQJa9bgsAAoJELescNyEwWM0yYwIAKvMuUU8d6fy/5EdjTm2uG9p
DoSw+ezHeiUrphQwNvOc/fj0vGutM+sftcmghRV1KmP7lvAqk/zvK57PAZjwQ5ua
i1X2AJemKr7Gs77FV5Y6Jgkkd2kaIh3n86d9/hM7n9TfAt31vPAYCapb8h3LbRBJ
bjZXoTHeujZAIMLGyxzLGVlk9MdW2UjQ3LvWGby/mFEPuktJKkApxBSNQOJOuRKw
Ny/eCwFhbyLzDA4zXw7hASld/J+WWBhk0m8ks2qy7BD/F2auZX/p5flU/NoE1VXi
JevclGif18iQtZQRV/hJ1woLROfbp6cRKWaVB4cEFKSnB2mG6FLSfrYyvbCj6LE=
=lZDP
-----END PGP SIGNATURE-----
Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux
Pull arm64 fixes from Will Deacon:
"There's a small memblock accounting problem when freeing the initrd
and a Spectre-v2 mitigation for NVIDIA Denver CPUs which just requires
a match on the CPU ID register.
Summary:
- Mitigate Spectre-v2 for NVIDIA Denver CPUs
- Free memblocks corresponding to freed initrd area"
* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
arm64: capabilities: Add NVIDIA Denver CPU to bp_harden list
arm64: Add MIDR encoding for NVIDIA CPUs
arm64: To remove initrd reserved area entry from memblock
Add audio device nodes and its proper setup for all used pins
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
It is a bit unorthodox to just include a file in the middle of a another
DTS file, it breaks the pattern from other device trees and also makes
it really hard to reference things across the files with phandles.
Restructure the include for the Juno/RTSM motherboards to happen at the
top of the file, reference the target nodes directly, and indent the
motherboard .dtsi files to reflect their actual depth in the hierarchy.
This is a purely syntactic change that result in the same DTB files from
the DTS/DTSI files. This is based on similar patch from Linus Walleij
for ARM Vexpress platforms.
Acked-by: Liviu Dudau <liviu.dudau@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
The latest DTC throws warnings for character '_' in the node names.
Warning (node_name_chars_strict): /thermal-zones/big_cluster: Character '_' not recommended in node name
Warning (node_name_chars_strict): /thermal-zones/little_cluster: Character '_' not recommended in node name
Warning (node_name_chars_strict): /smb@8000000/motherboard/gpio_keys: Character '_' not recommended in node name
Warning (node_name_chars_strict): /pmu_a57: Character '_' not recommended in node name
Warning (node_name_chars_strict): /pmu_a53: Character '_' not recommended in node name
The general recommendation is to use character '-' for all the node names.
This patch fixes the warnings following the recommendation.
Acked-by: Liviu Dudau <liviu.dudau@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
"debounce_interval" was never supported in the bindings. It should be
"debounce-interval". Moreover, latest DTC complains the following:
Warning (property_name_chars_strict): debounce_interval: Character '_' not recommended in property name
This patch fixes the above warning by using the correct property as
per the bindings.
Acked-by: Liviu Dudau <liviu.dudau@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
The Meson-AXG S400 board is shipped with AP6255 wifi module,
which is actually using the brcmfmac 43455 driver.
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add reset lines to the mmc controllers of the meson gx and axg SoCs
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The ao_clk81 in AO domain have two clock source,
one from a 32K alt crystal we name it as ao_alt_clk,
another is the clk81 signal from EE domain.
Acked-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add the GPIO interrupt controller driver which found in the Amlogic's
Meson-AXG SoC, the controller share the similar ASIC IP as other meson SoCs.
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The IP of eMMC controller in AXG is similiar to Meson-GX series.
Here we add the initial support of the HS200 mode with
clock running at 166MHz (to be safe), since we found some eMMC chip
fail to run at 200MHz due to tunning phase error.
Signed-off-by: Nan Li <nan.li@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
[khilman: drop incorrect SDIO pwrseq property]
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
OF graph endpoint node names should be 'endpoint'. Fix the following
warnings found by dtc:
Warning (graph_endpoint): /hdlcd@7ff50000/port/hdlcd1-endpoint: graph endpont node nameshould be 'endpoint'
Warning (graph_endpoint): /hdlcd@7ff60000/port/hdlcd0-endpoint: graph endpont node nameshould be 'endpoint'
Warning (graph_endpoint): /i2c@7ffa0000/hdmi-transmitter@70/port/tda998x-0-endpoint: graph endpont node name should be 'endpoint'
Warning (graph_endpoint): /i2c@7ffa0000/hdmi-transmitter@71/port/tda998x-1-endpoint: graph endpont node name should be 'endpoint'
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Liviu Dudau <liviu.dudau@arm.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
It is a bit unorthodox to just include a file in the middle of a another
DTS file, it breaks the pattern from other device trees and also makes
it really hard to reference things across the files with phandles.
Restructure the include for the Versatile Express motherboards to happen
at the top of the file, reference the target nodes directly, and indent
the motherboard .dtsi files to reflect their actual depth in the
hierarchy.
This is a purely syntactic change that result in the same DTB files from
the DTS/DTSI files.
Cc: Robin Murphy <robin.murphy@arm.com>
Cc: Liviu Dudau <liviu.dudau@arm.com>
Cc: Mali DP Maintainers <malidp@foss.arm.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
The NVIDIA Denver CPU also needs a PSCI call to harden the branch
predictor.
Signed-off-by: David Gilhooley <dgilhooley@nvidia.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
This patch adds the MIDR encodings for NVIDIA as well as
the Denver and Carmel CPUs used in Tegra SoCs.
Signed-off-by: David Gilhooley <dgilhooley@nvidia.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
- Fix proxying of GICv2 CPU interface accesses
- Fix crash when switching to BE
- Track source vcpu git GICv2 SGIs
- Fix an outdated bit of documentation
-----BEGIN PGP SIGNATURE-----
iQJJBAABCAAzFiEEn9UcU+C1Yxj9lZw9I9DQutE9ekMFAlrshkYVHG1hcmMuenlu
Z2llckBhcm0uY29tAAoJECPQ0LrRPXpDK4sQAMkwRaenPNbph+IdohrZo7Px8HKR
bFlz0Qyj4ksy0dNd2jVbCO/s2LgJndYKhuYWx/geVZW0Clx6GiBP53rrXbMhtkRV
PvX2g9nk74OHhI80z9iyKmyt7nKOItiZTkKK6UQqXe91oZqiT5jx8G5N6Zv4DUvm
+4nyNb7nP1VMimLpa5w5CFjL3nbX/VVSdHNMGmbZwDuQ2wrP3d3mfKEtSRBmIBC+
MTjV1DJxIluiIsg0hQvnnV+rTRScj0y36DzsS0th/c2BmzeYBWN/RKmQHdn1OyFj
WGdiDur5vy3/WqDrHh/opFF4a5J7HSHviWGkieUF5fwd7pMsrqzv7rltMrM5rNjm
ZdS49r2XRCH+nU9D72FV6N/4VJ5tmAhLjK7T5Ujz2f+fodStePkSEM69QyvhpZAJ
3dAgGiyauFzK0jVdNul3kKivfY7xHMEnYvi3SXOhtfMNl8FNBf6yR/yp9omwaQID
Te9aaugLvl0b62gRlfznCCUZ9GWsyU2EjpZqztkFCfuTaokbGRiCEF+X7/Xl7cMq
DmvC8T8VvLVNcSP40yJ1peeVap6px6CcQpjNKKKjyDO5ITSEZegYfO1kh8p2YOSr
3Bxd59LMgVkfDLssjMElPoo+nWmfUXxxnWmSO8ehl0/Tgw6H48R5SjoIF0iEnqek
P+lMR9H9YOIBUy07
=cO6X
-----END PGP SIGNATURE-----
Merge tag 'kvmarm-fixes-for-4.17-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm
KVM/arm fixes for 4.17, take #2
- Fix proxying of GICv2 CPU interface accesses
- Fix crash when switching to BE
- Track source vcpu git GICv2 SGIs
- Fix an outdated bit of documentation
Proxying the cpuif accesses at EL2 makes use of vcpu_data_guest_to_host
and co, which check the endianness, which call into vcpu_read_sys_reg...
which isn't mapped at EL2 (it was inlined before, and got moved OoL
with the VHE optimizations).
The result is of course a nice panic. Let's add some specialized
cruft to keep the broken platforms that require this hack alive.
But, this code used vcpu_data_guest_to_host(), which expected us to
write the value to host memory, instead we have trapped the guest's
read or write to an mmio-device, and are about to replay it using the
host's readl()/writel() which also perform swabbing based on the host
endianness. This goes wrong when both host and guest are big-endian,
as readl()/writel() will undo the guest's swabbing, causing the
big-endian value to be written to device-memory.
What needs doing?
A big-endian guest will have pre-swabbed data before storing, undo this.
If its necessary for the host, writel() will re-swab it.
For a read a big-endian guest expects to swab the data after the load.
The hosts's readl() will correct for host endianness, giving us the
device-memory's value in the register. For a big-endian guest, swab it
as if we'd only done the load.
For a little-endian guest, nothing needs doing as readl()/writel() leave
the correct device-memory value in registers.
Tested on Juno with that rarest of things: a big-endian 64K host.
Based on a patch from Marc Zyngier.
Reported-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Fixes: bf8feb3964 ("arm64: KVM: vgic-v2: Add GICV access from HYP")
Signed-off-by: James Morse <james.morse@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
A typo in kvm_vcpu_set_be()'s call:
| vcpu_write_sys_reg(vcpu, SCTLR_EL1, sctlr)
causes us to use the 32bit register value as an index into the sys_reg[]
array, and sail off the end of the linear map when we try to bring up
big-endian secondaries.
| Unable to handle kernel paging request at virtual address ffff80098b982c00
| Mem abort info:
| ESR = 0x96000045
| Exception class = DABT (current EL), IL = 32 bits
| SET = 0, FnV = 0
| EA = 0, S1PTW = 0
| Data abort info:
| ISV = 0, ISS = 0x00000045
| CM = 0, WnR = 1
| swapper pgtable: 4k pages, 48-bit VAs, pgdp = 000000002ea0571a
| [ffff80098b982c00] pgd=00000009ffff8803, pud=0000000000000000
| Internal error: Oops: 96000045 [#1] PREEMPT SMP
| Modules linked in:
| CPU: 2 PID: 1561 Comm: kvm-vcpu-0 Not tainted 4.17.0-rc3-00001-ga912e2261ca6-dirty #1323
| Hardware name: ARM Juno development board (r1) (DT)
| pstate: 60000005 (nZCv daif -PAN -UAO)
| pc : vcpu_write_sys_reg+0x50/0x134
| lr : vcpu_write_sys_reg+0x50/0x134
| Process kvm-vcpu-0 (pid: 1561, stack limit = 0x000000006df4728b)
| Call trace:
| vcpu_write_sys_reg+0x50/0x134
| kvm_psci_vcpu_on+0x14c/0x150
| kvm_psci_0_2_call+0x244/0x2a4
| kvm_hvc_call_handler+0x1cc/0x258
| handle_hvc+0x20/0x3c
| handle_exit+0x130/0x1ec
| kvm_arch_vcpu_ioctl_run+0x340/0x614
| kvm_vcpu_ioctl+0x4d0/0x840
| do_vfs_ioctl+0xc8/0x8d0
| ksys_ioctl+0x78/0xa8
| sys_ioctl+0xc/0x18
| el0_svc_naked+0x30/0x34
| Code: 73620291 604d00b0 00201891 1ab10194 (957a33f8)
|---[ end trace 4b4a4f9628596602 ]---
Fix the order of the arguments.
Fixes: 8d404c4c24 ("KVM: arm64: Rewrite system register accessors to read/write functions")
CC: Christoffer Dall <cdall@cs.columbia.edu>
Signed-off-by: James Morse <james.morse@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
The Puma-haikou combo supports hdmi output, so enable the hdmi controller
and vop controllers on it.
Signed-off-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>
Cc: linux-rockchip@lists.infradead.org
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: Klaus Goger <klaus.goger@theobroma-systems.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
INITRD reserved area entry is not removed from memblock
even though initrd reserved area is freed. After freeing
the memory it is released from memblock. The same can be
checked from /sys/kernel/debug/memblock/reserved.
The patch makes sure that the initrd entry is removed from
memblock when keepinitrd is not enabled.
The patch only affects accounting and debugging. This does not
fix any memory leak.
Acked-by: Laura Abbott <labbott@redhat.com>
Signed-off-by: CHANDAN VN <chandan.vn@samsung.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Remove the address space mapping between root and soc nodes to fix
DTC warnings in Exynos5433 and Exynos7 like:
arch/arm64/boot/dts/exynos/exynos5433-tm2.dtb:
Warning (unit_address_vs_reg): /soc: node has a reg or ranges property, but no unit name
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
ARM:
- PSCI selection API, a leftover from 4.16 (for stable)
- Kick vcpu on active interrupt affinity change
- Plug a VMID allocation race on oversubscribed systems
- Silence debug messages
- Update Christoffer's email address (linaro -> arm)
x86:
- Expose userspace-relevant bits of a newly added feature
- Fix TLB flushing on VMX with VPID, but without EPT
-----BEGIN PGP SIGNATURE-----
iQEcBAABCAAGBQJa44lQAAoJEED/6hsPKofo1dIH/3n9AZSWvavgL2V3j6agT8Yy
hxF4nHCFEJd5aqDNwbG9QEzivKw88r3o3mdB2XAQESB2MlCYR1jkTONm7yvVJTs/
/P9gj+DEQbCj2AgT//u3BGsAsZDKFhB9JwfmV2Mp4zDIqWFa6oCOGeq/iPVAGDcN
vUpuYeIicuH9SRoxH7de3z+BEXW0O+gCABXQtvA93FKTMz35yFTgmbDVCnvaV0zL
3B+3/4/jdbTRICW8EX6Li43+gEBUMtnVNkdqxLPTuCtDG8iuPUGfgF02gH99/9gj
hliV3Q4VUZKkSABW5AqKPe4+9rbsHCh9eL0LpHFGI9y+6LeUIOXAX4CtohR8gWE=
=W9Vz
-----END PGP SIGNATURE-----
rMerge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm
Pull KVM fixes from Radim Krčmář:
"ARM:
- PSCI selection API, a leftover from 4.16 (for stable)
- Kick vcpu on active interrupt affinity change
- Plug a VMID allocation race on oversubscribed systems
- Silence debug messages
- Update Christoffer's email address (linaro -> arm)
x86:
- Expose userspace-relevant bits of a newly added feature
- Fix TLB flushing on VMX with VPID, but without EPT"
* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm:
x86/headers/UAPI: Move DISABLE_EXITS KVM capability bits to the UAPI
kvm: apic: Flush TLB after APIC mode/address change if VPIDs are in use
arm/arm64: KVM: Add PSCI version selection API
KVM: arm/arm64: vgic: Kick new VCPU on interrupt migration
arm64: KVM: Demote SVE and LORegion warnings to debug only
MAINTAINERS: Update e-mail address for Christoffer Dall
KVM: arm/arm64: Close VMID generation race
