Commit Graph

5593 Commits

Author SHA1 Message Date
Andy Shevchenko
6738fbc08f mmc: mmc_spi: Drop unused NO_IRQ definition
After the commit 073350f7b5 ("mmc: mmc_spi: Fix return value evaluation of
irq_of_parse_and_map()") the NO_IRQ is not used anymore, drop it for good.

Fixes: 073350f7b5 ("mmc: mmc_spi: Fix return value evaluation of irq_of_parse_and_map()")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20210419112459.25241-4-andriy.shevchenko@linux.intel.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-04-23 09:29:49 +02:00
Andy Shevchenko
6c857ccf4e mmc: mmc_spi: Set up polling even if voltage-ranges is not present
When voltage-ranges property is not present the driver assumes that
it is 3.3v (3.2v..3.4v). But at the same time it disallows polling.

Fix that by dropping the comparison to 0 when no property is provided.

While at it, mark voltage-ranges property optional as it was initially.

Fixes: 9c43df5791 ("mmc_spi: Add support for OpenFirmware bindings")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20210419112459.25241-3-andriy.shevchenko@linux.intel.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-04-23 09:29:49 +02:00
Andy Shevchenko
6dab809bb5 mmc: core: Convert mmc_of_parse_voltage() to use device property API
mmc_of_parse() for a few years has been using device property API.
Convert mmc_of_parse_voltage() as well.

At the same time switch users to new API.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20210419112459.25241-2-andriy.shevchenko@linux.intel.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-04-23 09:29:49 +02:00
Ulf Hansson
82104edc59 Merge branch 'fixes' into next 2021-04-19 09:52:08 +02:00
Neil Armstrong
7412dee9f1 mmc: meson-gx: replace WARN_ONCE with dev_warn_once about scatterlist size alignment in block mode
Since commit e085b51c74 ("mmc: meson-gx: check for scatterlist size alignment in block mode"),
support for SDIO SD_IO_RW_EXTENDED transferts are properly filtered but some driver
like brcmfmac still gives a block sg buffer size not aligned with SDIO block,
triggerring a WARN_ONCE() with scary stacktrace even if the transfer works fine
but with possible degraded performances.

Simply replace with dev_warn_once() to inform user this should be fixed to avoid
degraded performance.

This should be ultimately fixed in brcmfmac, but since it's only a performance issue
the warning should be removed.

Fixes: e085b51c74 ("mmc: meson-gx: check for scatterlist size alignment in block mode")
Reported-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20210416094347.2015896-1-narmstrong@baylibre.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-04-19 09:49:27 +02:00
Shawn Lin
df4e137299 mmc: dw_mmc-rockchip: Just set default sample value for legacy mode
.set_ios() is called from .resume() as well. For SDIO device which sets
keep-power-in-suspend, nothing should be changed after resuming, as well
as sample tuning value, since this value is tuned already. So we should
not overwrite it with the default value.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Link: https://lore.kernel.org/r/1618539454-182170-1-git-send-email-shawn.lin@rock-chips.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-04-16 15:10:08 +02:00
Krzysztof Kozlowski
e614740a06 mmc: sdhci-s3c: constify uses of driver/match data
The driver data (struct sdhci_s3c_drv_data) stored in of_device_id
table is allocated as const and used only in const-way.  Skip
unnecessary const-away casts and convert all users to work with pointer
to const.  This is both more logical and safer.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Sylwester Nawrocki <snawrocki@kernel.org>
Link: https://lore.kernel.org/r/20210415084412.51125-3-krzysztof.kozlowski@canonical.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-04-15 14:00:15 +02:00
Krzysztof Kozlowski
90cdaa84c5 mmc: sdhci-s3c: correct kerneldoc of sdhci_s3c_drv_data
Correct the name of sdhci_s3c_drv_data structure in kerneldoc:

  drivers/mmc/host/sdhci-s3c.c:143: warning:
    expecting prototype for struct sdhci_s3c_driver_data. Prototype was for struct sdhci_s3c_drv_data instead

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Sylwester Nawrocki <snawrocki@kernel.org>
Link: https://lore.kernel.org/r/20210415084412.51125-2-krzysztof.kozlowski@canonical.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-04-15 14:00:15 +02:00
Krzysztof Kozlowski
0ab53e498f mmc: sdhci-s3c: simplify getting of_device_id match data
Use of_device_get_match_data() to make the code slightly smaller and to
remove the of_device_id table forward declaration.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Sylwester Nawrocki <snawrocki@kernel.org>
Link: https://lore.kernel.org/r/20210415084412.51125-1-krzysztof.kozlowski@canonical.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-04-15 14:00:15 +02:00
Wolfram Sang
0751d56ef1 mmc: tmio: always restore irq register
Currently, only SDHI on R-Car Gen2+ reinitializes the irq register
during reset but it should be done on all instances. We can move it from
the SDHI driver to the TMIO core, because we now have the
'sd_irq_mask_all' variable which carries the proper value to use. That
also means we can remove the initialization from tmio_mmc_probe()
because it calls tmio_mmc_reset(), too. We only move that
tmio_mmc_reset() call there a little to ensure 'sd_irq_mask_all' is
properly set.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20210413083137.11171-1-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-04-15 13:59:02 +02:00
Ben Chuang
9751bacc8c mmc: sdhci-pci-gli: Enlarge ASPM L1 entry delay of GL975x
GL975x enters ASPM L1 state after a short idle in default.
Enlarge the idle period to 7.9us for improving the R/W performance.

Signed-off-by: Ben Chuang <benchuanggli@gmail.com>
Link: https://lore.kernel.org/r/20210415032637.5219-1-benchuanggli@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-04-15 13:51:37 +02:00
Rafael J. Wysocki
eed7a17508 Merge branch 'opp/linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/vireshk/pm
Pull OPP (Operating Performance Points) framework updates for v5.13
from Viresh Kumar:

"This adds devm variants for OPP APIs and updates few of the users
 as well (Yangtao Li and Dmitry Osipenko)."

* 'opp/linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/vireshk/pm:
  memory: samsung: exynos5422-dmc: Convert to use resource-managed OPP API
  drm/panfrost: Convert to use resource-managed OPP API
  drm/lima: Convert to use resource-managed OPP API
  mmc: sdhci-msm: Convert to use resource-managed OPP API
  spi: spi-qcom-qspi: Convert to use resource-managed OPP API
  spi: spi-geni-qcom: Convert to use resource-managed OPP API
  serial: qcom_geni_serial: Convert to use resource-managed OPP API
  opp: Change return type of devm_pm_opp_attach_genpd()
  opp: Change return type of devm_pm_opp_register_set_opp_helper()
  opp: Add devres wrapper for dev_pm_opp_of_add_table
  opp: Add devres wrapper for dev_pm_opp_set_supported_hw
  opp: Add devres wrapper for dev_pm_opp_set_regulators
  opp: Add devres wrapper for dev_pm_opp_set_clkname
2021-04-12 14:49:31 +02:00
Laibin Qiu
50eae6bada mmc: sdhci-st: Remove unnecessary error log
devm_ioremap_resource() has recorded error log, so it's
unnecessary to record log again.

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Laibin Qiu <qiulaibin@huawei.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Link: https://lore.kernel.org/r/20210409023801.3326572-1-qiulaibin@huawei.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-04-12 13:52:48 +02:00
Jia Yang
ffa4877c0a mmc: sdhci-msm: Remove unnecessary error log
devm_ioremap_resource() has recorded error log, so it's
unnecessary to record log again.

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Jia Yang <jiayang5@huawei.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210409015424.3277212-1-jiayang5@huawei.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-04-12 13:52:47 +02:00
Laibin Qiu
489702f450 mmc: owl-mmc: Remove unnecessary error log
devm_ioremap_resource() has recorded error log, so it's
unnecessary to record log again.

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Laibin Qiu <qiulaibin@huawei.com>
Reviewed-by: Manivannan Sadhasivam <mani@kernel.org>
Link: https://lore.kernel.org/r/20210409023349.3325907-1-qiulaibin@huawei.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-04-12 13:52:47 +02:00
Wolfram Sang
87e985aea2 mmc: renesas_sdhi: enable WAIT_WHILE_BUSY
Now that we got the timeout handling in the driver correct, we can use
this capability to avoid polling via the MMC core.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20210409094606.4317-1-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-04-12 13:52:47 +02:00
Aniruddha Tvs Rao
5ec6fa5a6d mmc: sdhci-tegra: Add required callbacks to set/clear CQE_EN bit
CMD8 is not supported with Command Queue Enabled. Add required callback
to clear CQE_EN and CQE_INTR fields in the host controller register
before sending CMD8. Add corresponding callback in the CQHCI resume path
to re-enable CQE_EN and CQE_INTR fields.

Reported-by: Kamal Mostafa <kamal@canonical.com>
Tested-by: Kamal Mostafa <kamal@canonical.com>
Signed-off-by: Aniruddha Tvs Rao <anrao@nvidia.com>
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20210407094617.770495-1-jonathanh@nvidia.com
Cc: stable@vger.kernel.org # v5.10+
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-04-12 13:52:29 +02:00
Ben Chuang
baaaf55d99 mmc: sdhci-pci-gli: Improve GL9763E L1 entry delay to increase battery life
For GL9763E, although there is the best performance at the maximum delay.
Change the value to 20us in order to have better power consumption.
This change may reduce the maximum performance by 10%.

Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw>
Link: https://lore.kernel.org/r/20210407093816.8863-1-benchuanggli@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-04-12 09:09:05 +02:00
Yang Li
ae3519b6ab mmc: moxart: Remove unused variable 'dma_time' and 'pio_time'
Fixes the following W=1 kernel build warning(s):

drivers/mmc/host/moxart-mmc.c:257:7: warning: variable ‘dma_time’ set
but not used
drivers/mmc/host/moxart-mmc.c:395:7: warning: variable ‘pio_time’ set
but not used

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Yang Li <yang.lee@linux.alibaba.com>
Link: https://lore.kernel.org/r/1617357231-93064-1-git-send-email-yang.lee@linux.alibaba.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-04-12 08:54:06 +02:00
Adrian Hunter
2970134b92 mmc: sdhci-pci: Fix initialization of some SD cards for Intel BYT-based controllers
Bus power may control card power, but the full reset done by SDHCI at
initialization still may not reset the power, whereas a direct write to
SDHCI_POWER_CONTROL can. That might be needed to initialize correctly, if
the card was left powered on previously.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20210331081752.23621-1-adrian.hunter@intel.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-03-31 14:49:32 +02:00
Hao Fang
47805532eb mmc: dw_mmc-k3: use the correct HiSilicon copyright
s/Hisilicon/HiSilicon/g.
It should use capital S, according to
https://www.hisilicon.com/en/terms-of-use.

Signed-off-by: Hao Fang <fanghao11@huawei.com>
Acked-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Link: https://lore.kernel.org/r/1617086448-51054-1-git-send-email-fanghao11@huawei.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-03-31 14:47:53 +02:00
Shawn Guo
25e8b9eb09 mmc: sdhci-esdhc-imx: separate 100/200 MHz pinctrl states check
As indicated by function esdhc_change_pinstate(), SDR50 and DDR50
require pins_100mhz, while SDR104 and HS400 require pins_200mhz.  Some
system design may support SDR50 and DDR50 with 100mhz pin state only
(without 200mhz one).  Currently the combined 100/200 MHz pinctrl state
check prevents such system from running SDR50 and DDR50.  Separate the
check to support such system design.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Reviewed-by: Haibo Chen <haibo.chen@nxp.com>
Link: https://lore.kernel.org/r/20210326110214.28416-1-shawnguo@kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-03-30 12:42:54 +02:00
Al Cooper
f0bdf98fab mmc: sdhci-brcmstb: Remove CQE quirk
Remove the CQHCI_QUIRK_SHORT_TXFR_DESC_SZ quirk because the
latest chips have this fixed and earlier chips have other
CQE problems that prevent the feature from being enabled.

Signed-off-by: Al Cooper <alcooperx@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Link: https://lore.kernel.org/r/20210325192834.42955-1-alcooperx@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-03-30 12:42:44 +02:00
Jisheng Zhang
bac53336ca mmc: sdhci: replace mmc->parent with mmc_dev() for consistency
As pointed out by Ulf, "both "mmc->parent" and mmc_dev(mmc) are being
used in the entire c-file". Convert all the mmc->parent usage in all
sdhci host driver to mmc_dev() for consistency.

Suggested-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Link: https://lore.kernel.org/r/20210324155013.1e5faa3c@xhacker.debian
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-03-30 11:42:07 +02:00
Jisheng Zhang
57ac3084f5 mmc: sdhci-of-dwcmshc: set MMC_CAP_WAIT_WHILE_BUSY
The host supports HW busy detection of the device busy signaling over
dat0 line. Set MMC_CAP_wAIT_WHILE_BUSY host capability.

Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Link: https://lore.kernel.org/r/20210324154703.69f97fde@xhacker.debian
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-03-30 11:42:07 +02:00
Wei Yongjun
34884c4f64 mmc: sdhci-of-dwcmshc: fix error return code in dwcmshc_probe()
Fix to return negative error code -ENOMEM from the error handling
case instead of 0, as done elsewhere in this function.

Fixes: c2c4da37837e ("mmc: sdhci-of-dwcmshc: add rockchip platform support")
Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Link: https://lore.kernel.org/r/20210323112956.1016884-1-weiyongjun1@huawei.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-03-30 11:42:07 +02:00
Liming Sun
eb81ed5180 mmc: sdhci-of-dwcmshc: add ACPI support for BlueField-3 SoC
This commit adds ACPI support in the sdhci-of-dwcmshc driver for
BlueField-3 SoC. It has changes to only use the clock hierarchy
for Deviec Tree since the clk is not supported by ACPI. Instead,
ACPI can define 'clock-frequency' which is parsed by existing
sdhci_get_property(). This clock value will be returned in function
dwcmshc_get_max_clock().

Signed-off-by: Liming Sun <limings@nvidia.com>
Reviewed-by: Khalil Blaiech <kblaiech@nvidia.com>
Link: https://lore.kernel.org/r/1616453211-275165-1-git-send-email-limings@nvidia.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-03-30 11:42:07 +02:00
Adrian Hunter
ee629112be mmc: sdhci-pci: Add PCI IDs for Intel LKF
Add PCI IDs for Intel LKF eMMC and SD card host controllers.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20210322055356.24923-1-adrian.hunter@intel.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-03-30 11:42:07 +02:00
Wolfram Sang
6e5c951b4c mmc: tmio: always flag retune when resetting and a card is present
After reset, we manually flagged retune in runtime resume, but missed it
in the workqueue. To fix that and avoid the problem in the future, let's
flag retune in the reset handler directly whenever a card is present.

Reported-by: Takeshi Saito <takeshi.saito.xv@renesas.com>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210316085717.7276-3-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-03-30 11:42:06 +02:00
Takeshi Saito
0a446288aa mmc: tmio: restore bus width when resetting
Resetting the IP core will lose the bus width information and not all
code paths recover it. So, make sure the latest bus width gets restored
in the reset routine. For that, tmio_mmc_set_bus_width() is moved, but
not modified.

Signed-off-by: Takeshi Saito <takeshi.saito.xv@renesas.com>
[wsa: reworded commit message]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210316085717.7276-2-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-03-30 11:42:06 +02:00
Bean Huo
6b0e0fce40 mmc: cavium: Use '"%s...", __func__' to print function name
Use preferred way '"%s...", __func__' to print function name.

Signed-off-by: Bean Huo <beanhuo@micron.com>
Link: https://lore.kernel.org/r/20210319121357.255176-2-huobean@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-03-30 11:42:06 +02:00
James Young
955047f3c3 mmc: sdhci-acpi: Add device ID for the AMDI0041 variant of the AMD eMMC controller.
This variant is present on a Lenovo IdeaPad Slim 1, which uses an AMD Dali/Athlon Silver 3050e.
The Windows AMD SD Host Controller driver also lists this as a valid device ID.

Adding this device ID makes the internal eMMC storage on the Lenovo accessible.
Consequently this makes Linux installable and usable on it as well.

Signed-off-by: James Young <james@pocketfluff.org>
Link: https://lore.kernel.org/r/20210318124025.3002861-1-james@pocketfluff.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-03-30 11:42:06 +02:00
Wolfram Sang
b4d86f37ea mmc: renesas_sdhi: do hard reset if possible
All recent SDHI instances can be reset via the reset controller. If one
is found, use it instead of the open coded reset. This is to get a
future-proof sane reset state.

Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210317091622.31890-4-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-03-30 11:42:05 +02:00
Wolfram Sang
0e58701458 mmc: renesas_sdhi: break SCC reset into own function
renesas_sdhi_reset used to mainly reset the SCC but is now doing more
and even more will be added. So, factor out SCC reset to have a clear
distinction when we want to reset either SCC or SDHI+SCC.

Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210317091622.31890-3-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-03-30 11:42:05 +02:00
Wolfram Sang
ab0cdefec0 mmc: tmio: abort DMA before reset
We will soon allow resetting the whole IP core via a reset controller.
For this case, DMA must be terminated before the actual reset. For the
other cases, it is probably better, too.

Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210317091622.31890-2-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-03-30 11:42:05 +02:00
Shawn Lin
08f3dff799 mmc: sdhci-of-dwcmshc: add rockchip platform support
sdhci based synopsys MMC IP is also used on some rockchip platforms,
so add a basic support here.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Link: https://lore.kernel.org/r/1615879102-45919-3-git-send-email-shawn.lin@rock-chips.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-03-30 11:42:05 +02:00
Fabio Estevam
91b3d2e5b7 mmc: sdhci-esdhc-imx: Use device_get_match_data()
The retrieval of driver data can be a bit simplified by using
device_get_match_data(), so switch to it.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Link: https://lore.kernel.org/r/20210314230824.148969-2-festevam@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-03-30 11:42:04 +02:00
Fabio Estevam
ebe9572fd2 mmc: sdhci-esdhc-imx: Remove non-DT stub
i.MX has been converted to a devicetree only platform, so remove
the non-DT stub for sdhci_esdhc_imx_probe_dt().

Also, make the driver depend on OF now.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Link: https://lore.kernel.org/r/20210314230824.148969-1-festevam@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-03-30 11:42:04 +02:00
Jisheng Zhang
d2f025b08e mmc: sdhci: Use "mmc" directly rather than "host->mmc"
Clean up the code to use the "mmc" directly instead of "host->mmc".
If the code sits in hot code path, this clean up also brings trvial
performance improvement. Take the sdhci_post_req() for example:

before the patch:
     ...
     8d0:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
     8d4:	910003fd 	mov	x29, sp
     8d8:	f9000bf3 	str	x19, [sp, #16]
     8dc:	f9400833 	ldr	x19, [x1, #16]
     8e0:	b9404261 	ldr	w1, [x19, #64]
     8e4:	34000161 	cbz	w1, 910 <sdhci_post_req+0x50>
     8e8:	f9424400 	ldr	x0, [x0, #1160]
     8ec:	d2800004 	mov	x4, #0x0                   	// #0
     8f0:	b9401a61 	ldr	w1, [x19, #24]
     8f4:	b9403262 	ldr	w2, [x19, #48]
     8f8:	f9400000 	ldr	x0, [x0]
     8fc:	f278003f 	tst	x1, #0x100
     900:	f9401e61 	ldr	x1, [x19, #56]
     904:	1a9f17e3 	cset	w3, eq  // eq = none
     908:	11000463 	add	w3, w3, #0x1
     90c:	94000000 	bl	0 <dma_unmap_sg_attrs>
     ...

After the patch:
     ...
     8d0:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
     8d4:	910003fd 	mov	x29, sp
     8d8:	f9000bf3 	str	x19, [sp, #16]
     8dc:	f9400833 	ldr	x19, [x1, #16]
     8e0:	b9404261 	ldr	w1, [x19, #64]
     8e4:	34000141 	cbz	w1, 90c <sdhci_post_req+0x4c>
     8e8:	b9401a61 	ldr	w1, [x19, #24]
     8ec:	d2800004 	mov	x4, #0x0                   	// #0
     8f0:	b9403262 	ldr	w2, [x19, #48]
     8f4:	f9400000 	ldr	x0, [x0]
     8f8:	f278003f 	tst	x1, #0x100
     8fc:	f9401e61 	ldr	x1, [x19, #56]
     900:	1a9f17e3 	cset	w3, eq  // eq = none
     904:	11000463 	add	w3, w3, #0x1
     908:	94000000 	bl	0 <dma_unmap_sg_attrs>
     ...

We saved one ldr instruction: "ldr     x0, [x0, #1160]"

Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20210311174046.597d1951@xhacker.debian
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-03-30 11:42:03 +02:00
Jisheng Zhang
ba8734dfbe mmc: sdhci-pci: Avoid comma separated statements
Use semicolons.

Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20210311181432.6385cd2b@xhacker.debian
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-03-30 11:42:03 +02:00
Yang Li
3a75283a6b mmc: via-sdmmc: remove unneeded variable 'ret'
Fix the following coccicheck warning:
./drivers/mmc/host/via-sdmmc.c:1274:5-8: Unneeded variable: "ret".
Return "0" on line 1295

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Yang Li <yang.lee@linux.alibaba.com>
Link: https://lore.kernel.org/r/1615272478-52458-1-git-send-email-yang.lee@linux.alibaba.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-03-30 11:42:03 +02:00
Philipp Zabel
baf6fe4036 mmc: dw_mmc: simplify optional reset handling
As of commit bb475230b8 ("reset: make optional functions really
optional"), the reset framework API calls use NULL pointers to describe
optional, non-present reset controls.

This allows to return errors from devm_reset_control_get_optional and to
call reset_control_(de)assert unconditionally.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Link: https://lore.kernel.org/r/20210305090724.18832-1-p.zabel@pengutronix.de
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-03-30 11:42:02 +02:00
Philipp Zabel
95211a98e3 mmc: sdhci-st: simplify optional reset handling
As of commit bb475230b8 ("reset: make optional functions really
optional"), the reset framework API calls use NULL pointers to describe
optional, non-present reset controls.

This allows to return errors from devm_reset_control_get_optional and to
call reset_control_(de)assert unconditionally.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Link: https://lore.kernel.org/r/20210305090827.19124-1-p.zabel@pengutronix.de
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-03-30 11:42:02 +02:00
Wolfram Sang
9f12cac1bb mmc: renesas_sdhi: use custom mask for TMIO_MASK_ALL
Populate the new member for custom mask values to make sure this value
is applied whenever needed. Also, rename the define holding the value
because this is not only about initialization anymore.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20210304092903.8534-1-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-03-30 11:42:01 +02:00
Pradeep P V K
21e35e898a mmc: sdhci: Check for reset prior to DMA address unmap
For data read commands, SDHC may initiate data transfers even before it
completely process the command response. In case command itself fails,
driver un-maps the memory associated with data transfer but this memory
can still be accessed by SDHC for the already initiated data transfer.
This scenario can lead to un-mapped memory access error.

To avoid this scenario, reset SDHC (when command fails) prior to
un-mapping memory. Resetting SDHC ensures that all in-flight data
transfers are either aborted or completed. So we don't run into this
scenario.

Swap the reset, un-map steps sequence in sdhci_request_done().

Suggested-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
Signed-off-by: Pradeep P V K <pragalla@codeaurora.org>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/1614760331-43499-1-git-send-email-pragalla@qti.qualcomm.com
Cc: stable@vger.kernel.org # v4.9+
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-03-30 11:42:01 +02:00
Dinghao Liu
d599005afd mmc: sdhci-pci-o2micro: Add missing checks in sdhci_pci_o2_probe
It's odd to adopt different error handling on failure of
pci_read_config_dword(). Check the return value and terminate
execution flow on failure of all pci_read_config_dword() calls
in this function.

Signed-off-by: Dinghao Liu <dinghao.liu@zju.edu.cn>
Link: https://lore.kernel.org/r/20210226084146.29095-1-dinghao.liu@zju.edu.cn
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-03-30 11:42:00 +02:00
Renius Chen
f46b54cc72 mmc: sdhci-pci-gli: Enable short circuit protection mechanism of GL9755
Short circuit protection mechanism of GL9755 is disabled by HW default
setting. Enable short circuit protection to prevent GL9755 from being
damaged by short circuit or over current.

Signed-off-by: Renius Chen <reniuschengl@gmail.com>
Link: https://lore.kernel.org/r/20210225111307.62975-1-reniuschengl@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-03-30 11:42:00 +02:00
Peng Fan
f410ee0aa2 mmc: sdhci-esdhc-imx: validate pinctrl before use it
When imx_data->pinctrl is not a valid pointer, pinctrl_lookup_state
will trigger kernel panic.

When we boot Dual OS on Jailhouse hypervisor, we let the 1st Linux to
configure pinmux ready for the 2nd OS, so the 2nd OS not have pinctrl
settings.

Similar to this commit b62eee9f80 ("mmc: sdhci-esdhc-imx: no fail when no pinctrl available").

Reviewed-by: Bough Chen <haobo.chen@nxp.com>
Reviewed-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Link: https://lore.kernel.org/r/1614222604-27066-6-git-send-email-peng.fan@oss.nxp.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-03-30 11:42:00 +02:00
Wolfram Sang
0d856c4c68 mmc: tmio: support custom irq masks
SDHI Gen2+ has a different value for TMIO_MASK_ALL, so add a member to
support that. If the member is not used, the previous default value is
applied.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20210223100830.25125-2-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-03-30 11:41:59 +02:00
Christophe JAILLET
e29c84857e mmc: uniphier-sd: Fix a resource leak in the remove function
A 'tmio_mmc_host_free()' call is missing in the remove function, in order
to balance a 'tmio_mmc_host_alloc()' call in the probe.
This is done in the error handling path of the probe, but not in the remove
function.

Add the missing call.

Fixes: 3fd784f745 ("mmc: uniphier-sd: add UniPhier SD/eMMC controller driver")
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Reviewed-by: Masahiro Yamada <masahiroy@kernel.org>
Link: https://lore.kernel.org/r/20210220142953.918608-1-christophe.jaillet@wanadoo.fr
Cc: stable@vger.kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-03-30 11:41:59 +02:00
Christophe JAILLET
b03aec1c1f mmc: uniphier-sd: Fix an error handling path in uniphier_sd_probe()
A 'uniphier_sd_clk_enable()' call should be balanced by a corresponding
'uniphier_sd_clk_disable()' call.
This is done in the remove function, but not in the error handling path of
the probe.

Add the missing call.

Fixes: 3fd784f745 ("mmc: uniphier-sd: add UniPhier SD/eMMC controller driver")
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Reviewed-by: Masahiro Yamada <masahiroy@kernel.org>
Link: https://lore.kernel.org/r/20210220142935.918554-1-christophe.jaillet@wanadoo.fr
Cc: stable@vger.kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-03-30 11:41:59 +02:00
Wolfram Sang
c29b84d6d5 mmc: tmio: remove workaround for NON_REMOVABLE
RPM handling has been improved twice since this comment, and also SCC
handling has been improved a lot. All the testing we did (Geert's and
Niklas' and Wolfram's board farms) with the workaround removed did not
lead to problems, so it is time to get rid of it to the best of our
knowledge.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20210218110224.6910-1-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-03-30 11:41:58 +02:00
Ulf Hansson
6bfe4f749e mmc: dw_mmc: Drop redundant call to ->card_event callback
The ->card_event callback isn't being used by any of the dw_mmc variants.
It's likely a leftover from an earlier change, hence let's just drop the
redundant call to it.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-03-30 11:41:58 +02:00
Yangtao Li
411281d24b mmc: sdhci-msm: Convert to use resource-managed OPP API
Use resource-managed OPP API to simplify code.

Signed-off-by: Yangtao Li <tiny.windzz@gmail.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2021-03-16 10:14:11 +05:30
Yann Gautier
774514bf97 mmc: mmci: Add MMC_CAP_NEED_RSP_BUSY for the stm32 variants
An issue has been observed on STM32MP157C-EV1 board, with an erase command
with secure erase argument, ending up waiting for ~4 hours before timeout.

The requested busy timeout from the mmc core ends up with 14784000ms (~4
hours), but the supported host->max_busy_timeout is 86767ms, which leads to
that the core switch to use an R1 response in favor of the R1B and polls
for busy with the host->card_busy() ops. In this case the polling doesn't
work as expected, as we never detects that the card stops signaling busy,
which leads to the following message:

 mmc1: Card stuck being busy! __mmc_poll_for_busy

The problem boils done to that the stm32 variants can't use R1 responses in
favor of R1B responses, as it leads to an internal state machine in the
controller to get stuck. To continue to process requests, it would need to
be reset.

To fix this problem, let's set MMC_CAP_NEED_RSP_BUSY for the stm32 variant,
which prevent the mmc core from switching to R1 responses. Additionally,
let's cap the cmd->busy_timeout to the host->max_busy_timeout, thus rely on
86767ms to be sufficient (~66 seconds was need for this test case).

Fixes: 94fe2580a2 ("mmc: core: Enable erase/discard/trim support for all mmc hosts")
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Link: https://lore.kernel.org/r/20210225145454.12780-1-yann.gautier@foss.st.com
Cc: stable@vger.kernel.org
[Ulf: Simplified the code and extended the commit message]
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-03-09 10:00:52 +01:00
Linus Torvalds
ef9856a734 Merge branch 'stable/for-linus-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/konrad/swiotlb
Pull swiotlb updates from Konrad Rzeszutek Wilk:
 "Two memory encryption related patches (SWIOTLB is enabled by default
  for AMD-SEV):

   - Add support for alignment so that NVME can properly work

   - Keep track of requested DMA buffers length, as underlaying hardware
     devices can trip SWIOTLB to bounce too much and crash the kernel

  And a tiny fix to use proper APIs in drivers"

* 'stable/for-linus-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/konrad/swiotlb:
  swiotlb: Validate bounce size in the sync/unmap path
  nvme-pci: set min_align_mask
  swiotlb: respect min_align_mask
  swiotlb: don't modify orig_addr in swiotlb_tbl_sync_single
  swiotlb: refactor swiotlb_tbl_map_single
  swiotlb: clean up swiotlb_tbl_unmap_single
  swiotlb: factor out a nr_slots helper
  swiotlb: factor out an io_tlb_offset helper
  swiotlb: add a IO_TLB_SIZE define
  driver core: add a min_align_mask field to struct device_dma_parameters
  sdhci: stop poking into swiotlb internals
2021-02-26 13:59:32 -08:00
Linus Torvalds
6ff6f86bc4 ARM updates for 5.12-rc1:
- Generalise byte swapping assembly
 - Update debug addresses for STI
 - Validate start of physical memory with DTB
 - Do not clear SCTLR.nTLSMD in decompressor
 - amba/locomo/sa1111 devices remove method return type is void
 - address markers for KASAN in page table dump
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEuNNh8scc2k/wOAE+9OeQG+StrGQFAmAzrfYACgkQ9OeQG+St
 rGTmRQ/+MG9BO1WahlXZ9eVx6n6KmtwlzAy5m4B24GomvcXsa+T2s0Vs43hAsOQ2
 f/b6n1mPlwRjAvKW8IfO243HKDE6STGbtVPae6ts586QCODs8i3MQsq4SWmM/DMk
 TR87hTo1zd4baVT9tkM8/UdUwQjr0yRf4ZDhcCj09tMClnV/8ZAEE9/lLkBpDoer
 wcuPaDtRfJhN+Pqnm8ES8KPj15nVm/GFWBFoDWZIOCjyDnl8Y/1Bnz3NeqzfwM1o
 O0NS/9a1tMBn7TNGkkcJCimqOLZS2OgxLND8fie0rC5fmwzVomKXE24OdXpSQCps
 LiGJr+iQOaX6qNqJY2h1If8F+RPwKfh4Mrk12x0MWB6Ap2iKsQ6bmtUCNatmJ4PG
 5iKV5zY0SwKRYXAkXcNosEPUJqZirFHJCzrQ8IBmiSJ1cahZykWFgorDnA97kNLR
 Wlp2Y/037ug7EGZ0YSaXvbpuMyyjDP4TBKqBiSl7a90QYoXQg2QgcrBO3kVlh/5H
 Dxq9URvIpDLIGo1EUBU90kB54TUeDhJVHJWDfXNwOp4dP1Xm6b2w+d86GnUQanlC
 sinRut1ULMyitmIzg9F74MZKaSJ65ffEP3nZKIAlSSISQL+/bXtMDVtakVGsv1k1
 w4IdACf3GqbjHig4mOX0oW7IwtyfBY+0q3udY28ASW0ujsH9qHE=
 =BULT
 -----END PGP SIGNATURE-----

Merge tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm

Pull ARM updates from Russell King:

 - Generalise byte swapping assembly

 - Update debug addresses for STI

 - Validate start of physical memory with DTB

 - Do not clear SCTLR.nTLSMD in decompressor

 - amba/locomo/sa1111 devices remove method return type is void

 - address markers for KASAN in page table dump

* tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm:
  ARM: 9065/1: OABI compat: fix build when EPOLL is not enabled
  ARM: 9055/1: mailbox: arm_mhuv2: make remove callback return void
  amba: Make use of bus_type functions
  amba: Make the remove callback return void
  vfio: platform: simplify device removal
  amba: reorder functions
  amba: Fix resource leak for drivers without .remove
  ARM: 9054/1: arch/arm/mm/mmu.c: Remove duplicate header
  ARM: 9053/1: arm/mm/ptdump:Add address markers for KASAN regions
  ARM: 9051/1: vdso: remove unneded extra-y addition
  ARM: 9050/1: Kconfig: Select ARCH_HAVE_NMI_SAFE_CMPXCHG where possible
  ARM: 9049/1: locomo: make locomo bus's remove callback return void
  ARM: 9048/1: sa1111: make sa1111 bus's remove callback return void
  ARM: 9047/1: smp: remove unused variable
  ARM: 9046/1: decompressor: Do not clear SCTLR.nTLSMD for ARMv7+ cores
  ARM: 9045/1: uncompress: Validate start of physical memory against passed DTB
  ARM: 9042/1: debug: no uncompress debugging while semihosting
  ARM: 9041/1: sti LL_UART: add STiH418 SBC UART0 support
  ARM: 9040/1: use DEBUG_UART_PHYS and DEBUG_UART_VIRT for sti LL_UART
  ARM: 9039/1: assembler: generalize byte swapping macro into rev_l
2021-02-22 14:27:07 -08:00
Christoph Hellwig
66e8d3b899 sdhci: stop poking into swiotlb internals
Use the proper API to query the max mapping size instead of guessing
it based on swiotlb internals.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
2021-02-20 10:13:19 -05:00
Frank Li
a56f44138a mmc: sdhci-esdhc-imx: fix kernel panic when remove module
In sdhci_esdhc_imx_remove() the SDHCI_INT_STATUS in read. Under some
circumstances, this may be done while the device is runtime suspended,
triggering the below splat.

Fix the problem by adding a pm_runtime_get_sync(), before reading the
register, which will turn on clocks etc making the device accessible again.

[ 1811.323148] mmc1: card aaaa removed
[ 1811.347483] Internal error: synchronous external abort: 96000210 [#1] PREEMPT SMP
[ 1811.354988] Modules linked in: sdhci_esdhc_imx(-) sdhci_pltfm sdhci cqhci mmc_block mmc_core [last unloaded: mmc_core]
[ 1811.365726] CPU: 0 PID: 3464 Comm: rmmod Not tainted 5.10.1-sd-99871-g53835a2e8186 #5
[ 1811.373559] Hardware name: Freescale i.MX8DXL EVK (DT)
[ 1811.378705] pstate: 60000005 (nZCv daif -PAN -UAO -TCO BTYPE=--)
[ 1811.384723] pc : sdhci_esdhc_imx_remove+0x28/0x15c [sdhci_esdhc_imx]
[ 1811.391090] lr : platform_drv_remove+0x2c/0x50
[ 1811.395536] sp : ffff800012c7bcb0
[ 1811.398855] x29: ffff800012c7bcb0 x28: ffff00002c72b900
[ 1811.404181] x27: 0000000000000000 x26: 0000000000000000
[ 1811.409497] x25: 0000000000000000 x24: 0000000000000000
[ 1811.414814] x23: ffff0000042b3890 x22: ffff800009127120
[ 1811.420131] x21: ffff00002c4c9580 x20: ffff0000042d0810
[ 1811.425456] x19: ffff0000042d0800 x18: 0000000000000020
[ 1811.430773] x17: 0000000000000000 x16: 0000000000000000
[ 1811.436089] x15: 0000000000000004 x14: ffff000004019c10
[ 1811.441406] x13: 0000000000000000 x12: 0000000000000020
[ 1811.446723] x11: 0101010101010101 x10: 7f7f7f7f7f7f7f7f
[ 1811.452040] x9 : fefefeff6364626d x8 : 7f7f7f7f7f7f7f7f
[ 1811.457356] x7 : 78725e6473607372 x6 : 0000000080808080
[ 1811.462673] x5 : 0000000000000000 x4 : 0000000000000000
[ 1811.467990] x3 : ffff800011ac1cb0 x2 : 0000000000000000
[ 1811.473307] x1 : ffff8000091214d4 x0 : ffff8000133a0030
[ 1811.478624] Call trace:
[ 1811.481081]  sdhci_esdhc_imx_remove+0x28/0x15c [sdhci_esdhc_imx]
[ 1811.487098]  platform_drv_remove+0x2c/0x50
[ 1811.491198]  __device_release_driver+0x188/0x230
[ 1811.495818]  driver_detach+0xc0/0x14c
[ 1811.499487]  bus_remove_driver+0x5c/0xb0
[ 1811.503413]  driver_unregister+0x30/0x60
[ 1811.507341]  platform_driver_unregister+0x14/0x20
[ 1811.512048]  sdhci_esdhc_imx_driver_exit+0x1c/0x3a8 [sdhci_esdhc_imx]
[ 1811.518495]  __arm64_sys_delete_module+0x19c/0x230
[ 1811.523291]  el0_svc_common.constprop.0+0x78/0x1a0
[ 1811.528086]  do_el0_svc+0x24/0x90
[ 1811.531405]  el0_svc+0x14/0x20
[ 1811.534461]  el0_sync_handler+0x1a4/0x1b0
[ 1811.538474]  el0_sync+0x174/0x180
[ 1811.541801] Code: a9025bf5 f9403e95 f9400ea0 9100c000 (b9400000)
[ 1811.547902] ---[ end trace 3fb1a3bd48ff7be5 ]---

Signed-off-by: Frank Li <Frank.Li@nxp.com>
Cc: stable@vger.kernel.org # v4.0+
Link: https://lore.kernel.org/r/20210210181933.29263-1-Frank.Li@nxp.com
[Ulf: Clarified the commit message a bit]
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-15 10:43:23 +01:00
Roman Kiryanov
11b2ce62bd mmc: host: Retire MMC_GOLDFISH
Android Studio Emulator no longer uses this driver, so let's drop it.

Signed-off-by: Roman Kiryanov <rkir@google.com>
Link: https://lore.kernel.org/r/20210209190850.16647-1-rkir@google.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-15 10:43:23 +01:00
Emil Renner Berthing
f8f007c13e mmc: cb710: Use new tasklet API
This converts the driver to use the new tasklet API introduced in
commit 12cc923f1c ("tasklet: Introduce new initialization API")

Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Acked-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
Link: https://lore.kernel.org/r/20210208134551.39696-1-kernel@esmil.dk
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-15 10:43:23 +01:00
Shirley Her
1ad9f88014 mmc: sdhci-pci-o2micro: Bug fix for SDR104 HW tuning failure
Force chip enter L0 power state during SDR104 HW tuning to avoid tuning failure

Signed-off-by: Shirley Her <shirley.her@bayhubtech.com>
Link: https://lore.kernel.org/r/20210206014051.3418-1-shirley.her@bayhubtech.com
Fixes: 7b7d897e88 ("mmc: sdhci-pci-o2micro: Add HW tuning for SDR104 mode")
Cc: stable@vger.kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-15 10:37:57 +01:00
Emil Renner Berthing
0c1a3e8b2e mmc: wbsd: Use new tasklet API
This converts the driver to use the new tasklet API introduced in
commit 12cc923f1c ("tasklet: Introduce new initialization API")

Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Link: https://lore.kernel.org/r/20210204151847.91353-10-kernel@esmil.dk
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-08 13:00:31 +01:00
Emil Renner Berthing
e821afd8e0 mmc: via-sdmmc: Use new tasklet API
This converts the driver to use the new tasklet API introduced in
commit 12cc923f1c ("tasklet: Introduce new initialization API")

Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Link: https://lore.kernel.org/r/20210204151847.91353-9-kernel@esmil.dk
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-08 13:00:31 +01:00
Emil Renner Berthing
39d2969d7b mmc: uniphier-sd: Use new tasklet API
This converts the driver to use the new tasklet API introduced in
commit 12cc923f1c ("tasklet: Introduce new initialization API")

Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Link: https://lore.kernel.org/r/20210204151847.91353-8-kernel@esmil.dk
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-08 13:00:31 +01:00
Emil Renner Berthing
c36dd04282 mmc: tifm_sd: Use new tasklet API
This converts the driver to use the new tasklet API introduced in
commit 12cc923f1c ("tasklet: Introduce new initialization API")

Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Link: https://lore.kernel.org/r/20210204151847.91353-7-kernel@esmil.dk
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-08 13:00:31 +01:00
Emil Renner Berthing
ddf116f96f mmc: s3cmci: Use new tasklet API
This converts the driver to use the new tasklet API introduced in
commit 12cc923f1c ("tasklet: Introduce new initialization API")

Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Link: https://lore.kernel.org/r/20210204151847.91353-6-kernel@esmil.dk
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-08 13:00:31 +01:00
Emil Renner Berthing
0f5a7cb639 mmc: omap: Use new tasklet API
This converts the driver to use the new tasklet API introduced in
commit 12cc923f1c ("tasklet: Introduce new initialization API")

Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Link: https://lore.kernel.org/r/20210204151847.91353-5-kernel@esmil.dk
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-08 13:00:31 +01:00
Emil Renner Berthing
6078df1565 mmc: dw_mmc: Use new tasklet API
This converts the driver to use the new tasklet API introduced in
commit 12cc923f1c ("tasklet: Introduce new initialization API")

Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Link: https://lore.kernel.org/r/20210204151847.91353-4-kernel@esmil.dk
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-08 13:00:31 +01:00
Emil Renner Berthing
a1149c387c mmc: au1xmmc: Use new tasklet API
This converts the driver to use the new tasklet API introduced in
commit 12cc923f1c ("tasklet: Introduce new initialization API")

Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Link: https://lore.kernel.org/r/20210204151847.91353-3-kernel@esmil.dk
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-08 13:00:31 +01:00
Emil Renner Berthing
82a5d372ed mmc: atmel-mci: Use new tasklet API
This converts the driver to use the new tasklet API introduced in
commit 12cc923f1c ("tasklet: Introduce new initialization API")

Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Link: https://lore.kernel.org/r/20210204151847.91353-2-kernel@esmil.dk
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-08 13:00:31 +01:00
Xiaofei Tan
f9261eb7d3 mmc: cavium: Replace spin_lock_irqsave with spin_lock in hard IRQ
It is redundant to do irqsave and irqrestore in hardIRQ context, where
it has been in a irq-disabled context.

Signed-off-by: Xiaofei Tan <tanxiaofei@huawei.com>
Link: https://lore.kernel.org/r/1612422438-32525-1-git-send-email-tanxiaofei@huawei.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-08 12:57:16 +01:00
Uwe Kleine-König
3fd269e74f amba: Make the remove callback return void
All amba drivers return 0 in their remove callback. Together with the
driver core ignoring the return value anyhow, it doesn't make sense to
return a value here.

Change the remove prototype to return void, which makes it explicit that
returning an error value doesn't work as expected. This simplifies changing
the core remove callback to return void, too.

Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org> # for drivers/memory
Acked-by: Mark Brown <broonie@kernel.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Suzuki K Poulose <suzuki.poulose@arm.com> # for hwtracing/coresight
Acked-By: Vinod Koul <vkoul@kernel.org> # for dmaengine
Acked-by: Guenter Roeck <linux@roeck-us.net> # for watchdog
Acked-by: Wolfram Sang <wsa@kernel.org> # for I2C
Acked-by: Takashi Iwai <tiwai@suse.de> # for sound
Acked-by: Vladimir Zapolskiy <vz@mleia.com> # for memory/pl172
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Link: https://lore.kernel.org/r/20210126165835.687514-5-u.kleine-koenig@pengutronix.de
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2021-02-02 14:25:50 +01:00
Ulf Hansson
fdb7ef5b7d Merge branch 'fixes' into next 2021-02-01 12:03:14 +01:00
Marek Vasut
6351cac92a mmc: mmci: Add support for probing bus voltage level translator
Add support for testing whether bus voltage level translator is present
and operational. This is useful on systems where the bus voltage level
translator is optional, as the translator can be auto-detected by the
driver and the feedback clock functionality can be disabled if it is
not present.

This requires additional pinmux state, "init", where the CMD, CK, CKIN
lines are not configured, so they can be claimed as GPIOs early on in
probe(). The translator test sets CMD high to avoid interfering with a
card, and then verifies whether signal set on CK is detected on CKIN.
If the signal is detected, translator is present, otherwise the CKIN
feedback clock are disabled.

Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Ludovic Barre <ludovic.barre@st.com>
Tested-by: Yann Gautier <yann.gautier@foss.st.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Marek Vasut <marex@denx.de>
Link: https://lore.kernel.org/r/20210124170258.32862-2-marex@denx.de
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01 12:02:34 +01:00
Eric Biggers
c93767cf64 mmc: sdhci-msm: add Inline Crypto Engine support
Add support for Qualcomm Inline Crypto Engine (ICE) to sdhci-msm.

The standard-compliant parts, such as querying the crypto capabilities
and enabling crypto for individual MMC requests, are already handled by
cqhci-crypto.c, which itself is wired into the blk-crypto framework.
However, ICE requires vendor-specific init, enable, and resume logic,
and it requires that keys be programmed and evicted by vendor-specific
SMC calls.  Make the sdhci-msm driver handle these details.

This is heavily inspired by the similar changes made for UFS, since the
UFS and eMMC ICE instances are very similar.  See commit df4ec2fa7a
("scsi: ufs-qcom: Add Inline Crypto Engine support").

I tested this on a Sony Xperia 10, which uses the Snapdragon 630 SoC,
which has basic upstream support.  Mainly, I used android-xfstests
(https://github.com/tytso/xfstests-bld/blob/master/Documentation/android-xfstests.md)
to run the ext4 and f2fs encryption tests in a Debian chroot:

	android-xfstests -c ext4,f2fs -g encrypt -m inlinecrypt

These tests included tests which verify that the on-disk ciphertext is
identical to that produced by a software implementation.  I also
verified that ICE was actually being used.

Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Reviewed-by: Satya Tangirala <satyat@google.com>
Signed-off-by: Eric Biggers <ebiggers@google.com>
Link: https://lore.kernel.org/r/20210126001456.382989-9-ebiggers@kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01 12:02:34 +01:00
Eric Biggers
0a0c866f37 mmc: cqhci: add cqhci_host_ops::program_key
On Snapdragon SoCs, the Linux kernel isn't permitted to directly access
the standard CQHCI crypto configuration registers.  Instead, programming
and evicting keys must be done through vendor-specific SMC calls.

To support this hardware, add a ->program_key() method to
'struct cqhci_host_ops'.  This allows overriding the standard CQHCI
crypto key programming / eviction procedure.

This is inspired by the corresponding UFS crypto support, which uses
these same SMC calls.  See commit 1bc726e26e ("scsi: ufs: Add
program_key() variant op").

Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Reviewed-by: Satya Tangirala <satyat@google.com>
Reviewed-and-tested-by: Peng Zhou <peng.zhou@mediatek.com>
Signed-off-by: Eric Biggers <ebiggers@google.com>
Link: https://lore.kernel.org/r/20210126001456.382989-6-ebiggers@kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01 12:02:33 +01:00
Eric Biggers
1e80709bdb mmc: cqhci: add support for inline encryption
Add support for eMMC inline encryption using the blk-crypto framework
(Documentation/block/inline-encryption.rst).

eMMC inline encryption support is specified by the upcoming JEDEC eMMC
v5.2 specification.  It is only specified for the CQ interface, not the
non-CQ interface.  Although the eMMC v5.2 specification hasn't been
officially released yet, the crypto support was already agreed on
several years ago, and it was already implemented by at least two major
hardware vendors.  Lots of hardware in the field already supports and
uses it, e.g. Snapdragon 630 to give one example.

eMMC inline encryption support is very similar to the UFS inline
encryption support which was standardized in the UFS v2.1 specification
and was already upstreamed.  The only major difference is that eMMC
limits data unit numbers to 32 bits, unlike UFS's 64 bits.

Like we did with UFS, make the crypto support opt-in by individual
drivers; don't enable it automatically whenever the hardware declares
crypto support.  This is necessary because in every case we've seen,
some extra vendor-specific logic is needed to use the crypto support.

Co-developed-by: Satya Tangirala <satyat@google.com>
Signed-off-by: Satya Tangirala <satyat@google.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Reviewed-by: Satya Tangirala <satyat@google.com>
Reviewed-and-tested-by: Peng Zhou <peng.zhou@mediatek.com>
Signed-off-by: Eric Biggers <ebiggers@google.com>
Link: https://lore.kernel.org/r/20210125183810.198008-5-ebiggers@kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01 12:02:33 +01:00
Eric Biggers
ee49d0321f mmc: cqhci: initialize upper 64 bits of 128-bit task descriptors
Move the task descriptor initialization into cqhci_prep_task_desc().
In addition, make it explicitly initialize all 128 bits of the task
descriptor if the host controller is using 128-bit task descriptors,
rather than relying on the implicit zeroing from dmam_alloc_coherent().

This is needed to prepare for CQHCI inline encryption support, which
requires 128-bit task descriptors and uses the upper 64 bits.

Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Reviewed-by: Satya Tangirala <satyat@google.com>
Reviewed-and-tested-by: Peng Zhou <peng.zhou@mediatek.com>
Signed-off-by: Eric Biggers <ebiggers@google.com>
Link: https://lore.kernel.org/r/20210126001456.382989-4-ebiggers@kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01 12:02:33 +01:00
Eric Biggers
0653300224 mmc: cqhci: rename cqhci.c to cqhci-core.c
Rename cqhci.c to cqhci-core.c so that another source file can be added
to the cqhci module without having to rename the module.

Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Reviewed-and-tested-by: Peng Zhou <peng.zhou@mediatek.com>
Signed-off-by: Eric Biggers <ebiggers@google.com>
Link: https://lore.kernel.org/r/20210126001456.382989-3-ebiggers@kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01 12:02:33 +01:00
Andrew Jeffery
4af307f574 mmc: sdhci-of-aspeed: Fix kunit-related build error
Randy found that with the following Kconfig settings we have duplicate
definitions (e.g. __inittest()) in sdhci-of-aspeed due to competing
module_init()/module_exit() calls from kunit and driver the itself.

```
CONFIG_MMC_SDHCI_OF_ASPEED=m
CONFIG_MMC_SDHCI_OF_ASPEED_TEST=y
```

Conditionally open-code the kunit initialisation to avoid the error.

Fixes: 7efa02a981d6 ("mmc: sdhci-of-aspeed: Add KUnit tests for phase calculations")
Reported-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Acked-by: Randy Dunlap <rdunlap@infradead.org> # build-tested
Link: https://lore.kernel.org/r/20210122114852.3790565-1-andrew@aj.id.au
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01 11:54:49 +01:00
Arnd Bergmann
c7b9f01fd1 mmc: remove sirf prima/atlas driver
The CSR SiRF prima2/atlas platforms are getting removed, so this driver
is no longer needed.

Cc: Barry Song <baohua@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Barry Song <baohua@kernel.org>
Link: https://lore.kernel.org/r/20210120142801.334550-3-arnd@kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01 11:54:49 +01:00
Arnd Bergmann
e55f2cf512 mmc: remove dw_mmc-zx driver
The zte zx platform is getting removed, so this driver is no
longer needed.

Cc: Jun Nie <jun.nie@linaro.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/r/20210120142801.334550-2-arnd@kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01 11:54:48 +01:00
Jiapeng Zhong
fe6e147178 mmc: atmel-mci: Assign boolean values to a bool variable
Fix the following coccicheck warnings:

./drivers/mmc/host/atmel-mci.c:2436:2-34: WARNING: Assignment
of 0/1 to bool variable.

./drivers/mmc/host/atmel-mci.c:2425:2-20: WARNING: Assignment
of 0/1 to bool variable.

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Zhong <abaci-bugfix@linux.alibaba.com>
Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Link: https://lore.kernel.org/r/1611128377-66216-1-git-send-email-abaci-bugfix@linux.alibaba.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01 11:54:48 +01:00
Jeremy Linton
4f9833d3ec mmc: sdhci-iproc: Add ACPI bindings for the RPi
The RPi4 has an Arasan controller it carries over from the RPi3 and a newer
eMMC2 controller.  Because of a couple of quirks, it seems wiser to bind
these controllers to the same driver that DT is using on this platform
rather than the generic sdhci_acpi driver with PNP0D40.

So, BCM2847 describes the older Arasan and BRCME88C describes the newer
eMMC2. The older Arasan is reusing an existing ACPI _HID used by other OSes
booting these tables on the RPi.

With this change, Linux is capable of utilizing the SD card slot, and the
Wi-Fi when booted with UEFI+ACPI on the RPi4.

Signed-off-by: Jeremy Linton <jeremy.linton@arm.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Link: https://lore.kernel.org/r/20210120000406.1843400-2-jeremy.linton@arm.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01 11:54:48 +01:00
Andrew Jeffery
0bbcd22556 mmc: sdhci-of-aspeed: Add KUnit tests for phase calculations
Converting degrees of phase to logic delays is irritating to test on
hardware, so lets exercise the function using KUnit.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20210114031433.2388532-5-andrew@aj.id.au
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01 11:54:47 +01:00
Andrew Jeffery
0c53dc321a mmc: sdhci-of-aspeed: Add AST2600 bus clock support
The AST2600 can achieve HS200 speeds with a change to the bus clock
divisor behaviour. The divisor can also be more accurate with respect
to the requested clock rate, but keep the one-hot behaviour for
backwards compatibility with the AST2400 and AST2500.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20210114031433.2388532-4-andrew@aj.id.au
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01 11:54:47 +01:00
Andrew Jeffery
2fc88f9235 mmc: sdhci-of-aspeed: Expose clock phase controls
The Aspeed SD/eMMC controllers expose configurable clock phase
correction by inserting delays of up to 15 logic elements in length into
the bus clock path. The hardware supports independent configuration for
both bus directions on a per-slot basis.

The timing delay per element encoded in the driver was experimentally
determined by scope measurements.

The phase controls for both slots are grouped together in a single
register of the global register block of the SD/MMC controller(s), which
drives the use of a locking scheme between the SDHCIs and the global
register set.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20210114031433.2388532-3-andrew@aj.id.au
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01 11:54:47 +01:00
Yang Li
eab234fce3 mmc: omap_hsmmc: Simplify bool comparison and conversion
Fix the following coccicheck warning:
./drivers/mmc/host/omap_hsmmc.c:297:6-25: WARNING: Comparison of 0/1 to
bool variable

According to the context, vqmmc_enabled is more suitable for bool type.

Reported-by: Abaci Robot<abaci@linux.alibaba.com>
Signed-off-by: Yang Li <abaci-bugfix@linux.alibaba.com>
Link: https://lore.kernel.org/r/1610704281-11036-1-git-send-email-abaci-bugfix@linux.alibaba.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01 11:54:47 +01:00
Renius Chen
c58c5950b8 mmc: sdhci-pci-gli: Finetune HS400 RX delay for GL9763E
To improve the compatibility of GL9763E with HS400 eMMC cards,
finetune the RX delay of HS400 mode.

Signed-off-by: Renius Chen <reniuschengl@gmail.com>
Link: https://lore.kernel.org/r/20210111082249.17092-1-reniuschengl@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01 11:54:46 +01:00
Muhammad Husaini Zulkifli
ffd68f356e mmc: sdhci-of-arasan: Use dev_err_probe() to avoid spamming logs
Using dev_err_probe() can avoid spamming logs when probe is deferred.
This function can also help to reduce code the size, uniform error handling
and simplify the code.

Signed-off-by: Muhammad Husaini Zulkifli <muhammad.husaini.zulkifli@intel.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Acked-by: Andy Shevchenko <andriy.shevchenko@intel.com>
Link: https://lore.kernel.org/r/20210114152700.21916-5-muhammad.husaini.zulkifli@intel.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01 11:54:46 +01:00
Muhammad Husaini Zulkifli
2ff0b85d62 mmc: sdhci-of-arasan: Add structure device pointer in probe function
Add struct device *dev in probe func() so that it can widely use in
probe to make code more readable.

Signed-off-by: Muhammad Husaini Zulkifli <muhammad.husaini.zulkifli@intel.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Acked-by: Andy Shevchenko <andriy.shevchenko@intel.com>
Link: https://lore.kernel.org/r/20210114152700.21916-4-muhammad.husaini.zulkifli@intel.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01 11:54:46 +01:00
Muhammad Husaini Zulkifli
80d41efe2e mmc: sdhci-of-arasan: Convert to use np instead of pdev->dev.of_node
Use np pointer to simplify code and improve readability.

Signed-off-by: Muhammad Husaini Zulkifli <muhammad.husaini.zulkifli@intel.com>
Suggested-by: Andy Shevchenko <andriy.shevchenko@intel.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Acked-by: Andy Shevchenko <andriy.shevchenko@intel.com>
Link: https://lore.kernel.org/r/20210114152700.21916-3-muhammad.husaini.zulkifli@intel.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01 11:54:46 +01:00
Muhammad Husaini Zulkifli
eb08587524 mmc: sdhci-of-arasan: use of_device_get_match_data()
Use of_device_get_match_data() helper to get the match-data.

Signed-off-by: Muhammad Husaini Zulkifli <muhammad.husaini.zulkifli@intel.com>
Suggested-by: Andy Shevchenko <andriy.shevchenko@intel.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Acked-by: Andy Shevchenko <andriy.shevchenko@intel.com>
Link: https://lore.kernel.org/r/20210114152700.21916-2-muhammad.husaini.zulkifli@intel.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01 11:54:46 +01:00
Renius Chen
edee82f79b mmc: sdhci-pci-gli: Enlarge ASPM L1 entry delay of GL9763E
GL9763E enters ASPM L1 state after a very short idle in default,
even during a burst of request. So the R/W performance of GL9763E
is low with some platforms, which support ASPM mechanism, due to
entering ASPM L1 state very frequently in R/W process. Set the L1
entry delay bits in vendor-specific register to 0x3FF to enlarge
the idle period to 260us for improving the R/W performance
of GL9763E.

Signed-off-by: Renius Chen <reniuschengl@gmail.com>
Link: https://lore.kernel.org/r/20210115054736.27769-1-reniuschengl@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01 11:54:46 +01:00
Faiz Abbas
754b7f2f7d mmc: sdhci_am654: Add Support for TI's AM64 SoC
Add support for the controller present on the AM64x SoC.

There are instances:
sdhci0: 8bit bus width, max 400 MBps
sdhci1: 4bit bus width, max 100 MBps

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Link: https://lore.kernel.org/r/20210113115908.3882-3-a-govindraju@ti.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01 11:54:45 +01:00
Ricky Wu
12b1c5edc3 mmc: rtsx: add delay before power on
To make sure voltage is below 0.5V before power on during a power cycle,
add a delay of at least 100ms. The delays in the mmc core is not sufficient
for the rtsx pci device.

Signed-off-by: Ricky Wu <ricky_wu@realtek.com>
Link: https://lore.kernel.org/r/20210113105723.7916-1-ricky_wu@realtek.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01 11:54:45 +01:00
Samuel Holland
3882917da8 mmc: sunxi-mmc: Ensure host is suspended during system sleep
If the device suspend process begins before the mmc host's autosuspend
timeout, the host will continue running during system sleep. Avoid
this by forcing runtime suspend during a global suspend transition.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Maxime Ripard <mripard@kernel.org>
Link: https://lore.kernel.org/r/20210113052421.36553-1-samuel@sholland.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01 11:54:45 +01:00
Marcin Wojtas
7214d79237 mmc: xenon: add AP807 compatible string
This patch adds new compatible string to differentiate
between the controllers versions included in the AP807
north bridge. Thanks to this change, the SoCs which use
AP807 will not run unintentionally in the 'slow mode'
with disabled UHS modes.

Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Link: https://lore.kernel.org/r/20210112094655.12274-3-kostap@marvell.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01 11:54:45 +01:00
Muhammad Husaini Zulkifli
db84509359 mmc: sdhci-of-arasan: Change code style of mapping the syscon field
Change code style of mapping the syscon in sdhci_arasan_update_support64b()
for readability and consistency.

Signed-off-by: Muhammad Husaini Zulkifli <muhammad.husaini.zulkifli@intel.com>
Acked-by: Andy Shevchenko <andriy.shevchenko@intel.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20210111155001.12307-3-muhammad.husaini.zulkifli@intel.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01 11:54:44 +01:00
Muhammad Husaini Zulkifli
973c7c994b mmc: sdhci-of-arasan: Fixed kernel-doc format warning
Commit 36c6aadaae ("mmc: sdhci-of-arasan: Add support for Intel Keem Bay")
introduces syscon map sdhci_arasan_update_support64b(). Unfortunately,
kernel-doc format script tool has not been run before and causing warning
on the documentation style.

Below is the output when running the kernel-doc script tool:
drivers/mmc/host/sdhci-of-arasan.c:1388: warning: contents before sections

Let's fix this by using standard conventions kernel-doc format.

Fixes: 36c6aadaae ("mmc: sdhci-of-arasan: Add support for Intel Keem Bay")
Signed-off-by: Muhammad Husaini Zulkifli <muhammad.husaini.zulkifli@intel.com>
Acked-by: Andy Shevchenko <andriy.shevchenko@intel.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20210111155001.12307-2-muhammad.husaini.zulkifli@intel.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01 11:54:44 +01:00
Renius Chen
15f908fafc mmc: sdhci-pci-gli: Add a switch to enable/disable CQHCI support
Add a vendor-specific bit named GLI_9763E_MB_ERP_ON at the bit7 of
register 888h to decide whether to enhance random R/W performance
of GL9763E. CQHCI support will be enabled if and only if the bit is
set and the GLI_9763E_MB_CMQ_OFF bit is not set.

Signed-off-by: Renius Chen <reniuschengl@gmail.com>
Link: https://lore.kernel.org/r/20210106085332.5494-1-reniuschengl@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01 11:54:44 +01:00
Ricky Wu
8b2805647a mmc: rtsx: Add MMC_CAP2_NO_SDIO flag
Added flag MMC_CAP2_NO_SDIO to mmc->caps2
Card Reader not support SDIO

Signed-off-by: Ricky Wu <ricky_wu@realtek.com>
Link: https://lore.kernel.org/r/20201230090401.12627-2-ricky_wu@realtek.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01 11:54:44 +01:00
H. Nikolaus Schaller
c7129b703f mmc: jz4740: remove unused struct component card_detect_irq
I have not found any user for this struct component.

Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
Reviewed-by: Paul Cercueil <paul@crapouillou.net>
Link: https://lore.kernel.org/r/415ea1cb85eedc12f0c2f70da9a1ae3885bdd091.1608714110.git.hns@goldelico.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01 11:54:44 +01:00
Yoshihiro Shimoda
ed2fab9a82 mmc: renesas_sdhi: Add a condition of cmd/data timeout for retune
According to the datasheet, this controller needs retune when
cmd or data timeout happens. So, add a condition into .check_retune().

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/1608708622-29668-3-git-send-email-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01 11:54:43 +01:00
Masaharu Hayakawa
35cdcd1268 mmc: tmio: Add data timeout error detection
Currently, busy timeout is not checked for data transfer command. But,
if the temperature condition changes, the data cannot be acquired
correctly and timeout may occur. Also, we could reproduce an issue by
using mmc_test driver (e.g. "Correct xfer_size at write (start
failure)"). Therefore, this adds timeout error check.

Signed-off-by: Masaharu Hayakawa <masaharu.hayakawa.ry@renesas.com>
[saito: rework commit message.]
Signed-off-by: Takeshi Saito <takeshi.saito.xv@renesas.com>
[shimoda: rebase, add commit description]
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/1608708622-29668-2-git-send-email-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01 11:54:43 +01:00
Dmitry Lebed
e085b51c74 mmc: meson-gx: check for scatterlist size alignment in block mode
Enable SGDMA support for SD_IO_RW_EXTENDED and add proper check
for scatterlist size alignment in block mode.

According to documentation, in SDIO block mode meson-gx DMA could
only handle buffers with sizes that are multiples of SDIO block size.

Some SDIO drivers like brcmfmac use scatterlist API, but do not enforce
proper scatterlist buffer size alignemnt, this looks like a root cause
of non-working CMD53.

Some minor style fixes.

Signed-off-by: Dmitry Lebed <lebed.dmitry@gmail.com>
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lore.kernel.org/r/20201218075312.67338-1-lebed.dmitry@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01 11:54:43 +01:00
Chaotian Jing
0354ca6edd mmc: mediatek: fix race condition between msdc_request_timeout and irq
when get request SW timeout, if CMD/DAT xfer done irq coming right now,
then there is race between the msdc_request_timeout work and irq handler,
and the host->cmd and host->data may set to NULL in irq handler. also,
current flow ensure that only one path can go to msdc_request_done(), so
no need check the return value of cancel_delayed_work().

Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com>
Link: https://lore.kernel.org/r/20201218071611.12276-1-chaotian.jing@mediatek.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01 11:54:43 +01:00
Yoshihiro Shimoda
69e7d76afd mmc: renesas_internal_dmac: add pre_req and post_req support
Add pre_req and post_req support to improve performance.

Inspired by a patch in the BSP by Masaharu Hayakawa.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/1608114572-1892-3-git-send-email-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01 11:54:43 +01:00
Takeshi Saito
d7aefb2887 mmc: renesas_sdhi_internal_dmac: Fix DMA buffer alignment from 8 to 128-bytes
According to the latest datasheet, the internal DMAC buffer alignment
R-Car Gen3 SDHI HW should be 128-bytes. So, fix it.

Signed-off-by: Takeshi Saito <takeshi.saito.xv@renesas.com>
[shimoda: revise commit description, rebase]
Fixes: 2a68ea7896 ("mmc: renesas-sdhi: add support for R-Car Gen3 SDHI DMAC")
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/1608114572-1892-2-git-send-email-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01 11:54:43 +01:00
Douglas Anderson
f16c8fd444 mmc: sdhci-msm: Actually set the actual clock
The MSM SDHCI driver always set the "actual_clock" field to 0.  It had
a comment about it not being needed because we weren't using the
standard SDHCI divider mechanism and we'd just fallback to
"host->clock".  However, it's still better to provide the actual
clock.  Why?

1. It will make timeout calculations slightly better.  On one system I
   have, the eMMC requets 200 MHz (for HS400-ES) but actually gets 192
   MHz.  These are close, but why not get the more accurate one.

2. If things are seriously off in the clock driver and it's missing
   rates or picking the wrong rate (maybe it's rounding up instead of
   down), this will make it much more obvious what's going on.

NOTE: we have to be a little careful here because the "actual_clock"
field shouldn't include the multiplier that sdhci-msm needs
internally.

Suggested-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Reviewed-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
Link: https://lore.kernel.org/r/20201214092048.v5.2.I7564620993acd4baa63fa0e3925ca879a86d3ee3@changeid
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01 11:54:43 +01:00
Douglas Anderson
a8cd989e1a mmc: sdhci-msm: Warn about overclocking SD/MMC
As talked about in commit 5e4b7e82d4 ("clk: qcom: gcc-sdm845: Use
floor ops for sdcc clks"), most clocks handled by the Qualcomm clock
drivers are rounded _up_ by default instead of down.  We should make
sure SD/MMC clocks are always rounded down in the clock drivers.
Let's add a warning in the Qualcomm SDHCI driver to help catch the
problem.

This would have saved a bunch of time [1].

NOTE: this doesn't actually fix any problems, it just makes it obvious
to devs that there is a problem and that should be an indication to
fix the clock driver.

[1] http://lore.kernel.org/r/20201210102234.1.I096779f219625148900fc984dd0084ed1ba87c7f@changeid

Suggested-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20201214092048.v5.1.Iec3430c7d3c2a29262695edef7b82a14aaa567e5@changeid
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01 11:54:42 +01:00
Yangtao Li
3536b82e58 mmc: sunxi: add support for A100 mmc controller
This patch adds support for A100 MMC controller, which use word address
for internal dma.

Signed-off-by: Yangtao Li <frank@allwinnertech.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Link: https://lore.kernel.org/r/20201211011934.6171-10-andre.przywara@arm.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01 11:54:42 +01:00
Jisheng Zhang
5f7dfda4f2 mmc: sdhci-of-dwcmshc: set SDHCI_QUIRK2_PRESET_VALUE_BROKEN
The SDHCI_PRESET_FOR_* registers are not set(all read as zeros), so
set the quirk.

Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Link: https://lore.kernel.org/r/20201210165510.76b917e5@xhacker.debian
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01 11:54:42 +01:00
Christophe JAILLET
6052b3c370 mmc: usdhi6rol0: Fix a resource leak in the error handling path of the probe
A call to 'ausdhi6_dma_release()' to undo a previous call to
'usdhi6_dma_request()' is missing in the error handling path of the probe
function.

It is already present in the remove function.

Fixes: 75fa9ea6e3 ("mmc: add a driver for the Renesas usdhi6rol0 SD/SDIO host controller")
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Link: https://lore.kernel.org/r/20201217210922.165340-1-christophe.jaillet@wanadoo.fr
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01 11:54:42 +01:00
Christophe JAILLET
c9c256a8b0 mmc: sdhci-sprd: Fix some resource leaks in the remove function
'sdhci_remove_host()' and 'sdhci_pltfm_free()' should be used in place of
'mmc_remove_host()' and 'mmc_free_host()'.

This avoids some resource leaks, is more in line with the error handling
path of the probe function, and is more consistent with other drivers.

Fixes: fb8bd90f83 ("mmc: sdhci-sprd: Add Spreadtrum's initial host controller")
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Acked-by: Orson Zhai <orson.zhai@gmail.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20201217204236.163446-1-christophe.jaillet@wanadoo.fr
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01 11:54:42 +01:00
Christophe JAILLET
5d15cbf635 mmc: owl-mmc: Fix a resource leak in an error handling path and in the remove function
'dma_request_chan()' calls should be balanced by a corresponding
'dma_release_channel()' call.

Add the missing call both in the error handling path of the probe function
and in the remove function.

Fixes: ff65ffe46d ("mmc: Add Actions Semi Owl SoCs SD/MMC driver")
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Link: https://lore.kernel.org/r/20201209194202.54099-1-christophe.jaillet@wanadoo.fr
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01 11:54:42 +01:00
Christophe JAILLET
0bb7e560f8 mmc: mxs-mmc: Fix a resource leak in an error handling path in 'mxs_mmc_probe()'
If 'mmc_of_parse()' fails, we must undo the previous 'dma_request_chan()'
call.

Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Link: https://lore.kernel.org/r/20201208203527.49262-1-christophe.jaillet@wanadoo.fr
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01 11:54:41 +01:00
Ulf Hansson
d7fb9c2420 mmc: sdhci-pltfm: Fix linking err for sdhci-brcmstb
The implementation of sdhci_pltfm_suspend() is only available when
CONFIG_PM_SLEEP is set, which triggers a linking error:

"undefined symbol: sdhci_pltfm_suspend" when building sdhci-brcmstb.c.

Fix this by implementing the missing stubs when CONFIG_PM_SLEEP is unset.

Reported-by: Arnd Bergmann <arnd@arndb.de>
Suggested-by: Florian Fainelli <f.fainelli@gmail.com>
Fixes: 5b191dcba7 ("mmc: sdhci-brcmstb: Fix mmc timeout errors on S5 suspend")
Cc: stable@vger.kernel.org
Tested-By: Nicolas Schichan <nschichan@freeebox.fr>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01 11:13:09 +01:00
Al Cooper
5b191dcba7 mmc: sdhci-brcmstb: Fix mmc timeout errors on S5 suspend
Commit e7b5d63a82 ("mmc: sdhci-brcmstb: Add shutdown callback")
that added a shutdown callback to the diver, is causing "mmc timeout"
errors on S5 suspend. The problem was that the "remove" was queuing
additional MMC commands after the "shutdown" and these caused
timeouts as the MMC queues were cleaned up for "remove". The
shutdown callback will be changed to calling sdhci-pltfm_suspend
which should get better power savings because the clocks will be
shutdown.

Fixes: e7b5d63a82 ("mmc: sdhci-brcmstb: Add shutdown callback")
Signed-off-by: Al Cooper <alcooperx@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20210107221509.6597-1-alcooperx@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-01-13 12:06:37 +01:00
Alex Leibovich
1a3ed0dc35 mmc: sdhci-xenon: fix 1.8v regulator stabilization
Automatic Clock Gating is a feature used for the power consumption
optimisation. It turned out that during early init phase it may prevent the
stable voltage switch to 1.8V - due to that on some platforms an endless
printout in dmesg can be observed: "mmc1: 1.8V regulator output did not
became stable" Fix the problem by disabling the ACG at very beginning of
the sdhci_init and let that be enabled later.

Fixes: 3a3748dba8 ("mmc: sdhci-xenon: Add Marvell Xenon SDHC core functionality")
Signed-off-by: Alex Leibovich <alexl@marvell.com>
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Cc: stable@vger.kernel.org
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20201211141656.24915-1-mw@semihalf.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-01-11 18:16:44 +01:00
Jisheng Zhang
ca1219c0a7 mmc: sdhci-of-dwcmshc: fix rpmb access
Commit a44f7cb937 ("mmc: core: use mrq->sbc when sending CMD23 for
RPMB") began to use ACMD23 for RPMB if the host supports ACMD23. In
RPMB ACM23 case, we need to set bit 31 to CMD23 argument, otherwise
RPMB write operation will return general fail.

However, no matter V4 is enabled or not, the dwcmshc's ARGUMENT2
register is 32-bit block count register which doesn't support stuff
bits of CMD23 argument. So let's handle this specific ACMD23 case.

From another side, this patch also prepare for future v4 enabling
for dwcmshc, because from the 4.10 spec, the ARGUMENT2 register is
redefined as 32bit block count which doesn't support stuff bits of
CMD23 argument.

Fixes: a44f7cb937 ("mmc: core: use mrq->sbc when sending CMD23 for RPMB")
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20201229161625.38255233@xhacker.debian
Cc: stable@vger.kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-01-11 17:50:51 +01:00
Linus Torvalds
ce51c2b7ce MMC core:
- Initial support for SD express card/host
 
 MMC host:
  - mxc: Convert the driver to DT-only
  - mtk-sd: Add HS400 enhanced strobe support
  - mtk-sd: Add support for the MT8192 SoC variant
  - sdhci-acpi: Allow changing HS200/HS400 driver strength for AMDI0040
  - sdhci-esdhc-imx: Convert the driver to DT-only
  - sdhci-pci-gli: Improve performance for HS400 mode for GL9763E
  - sdhci-pci-gli: Reduce power consumption for GL9755
  - sdhci-xenon: Introduce ACPI support
  - tmio: Fix command error processing
  - tmio: Inform the core about the max_busy_timeout
  - tmio/renesas_sdhi: Support custom calculation of busy-wait time
  - renesas_sdhi: Reset SCC only when available
  - rtsx_pci: Add SD Express mode support for RTS5261
  - rtsx_pci: Various fixes and improvements for RTS5261
 
 MEMSTICK:
  - Minor fixes/improvements.
 -----BEGIN PGP SIGNATURE-----
 
 iQJLBAABCgA1FiEEugLDXPmKSktSkQsV/iaEJXNYjCkFAl/XZuAXHHVsZi5oYW5z
 c29uQGxpbmFyby5vcmcACgkQ/iaEJXNYjCnYEBAAkHWJNCUILpqAcvc8VNpo2YJ3
 vpLT1u4S3CgZ0DMJ8Oatgw6gaoTCJwX/qdXJPCCCsaiCg+H0rZATnq7/fp3CnPk+
 NZ0JYoSxLTRIkaNaOxHDkR3P7JcJKy9pxUV6rvTQMK6rRtFxv9w7xrUTNOT5GiNj
 5xB+uPrZ0AGhGdNaBU3/ZmmuCi1s8yf1B64IljqXTfQZJ6nvWbYFAWw8r4gfslfx
 NLCo1+vwTOj3ADrgOI3eafFKKnME2bRgc/o/PM/iDciJlQfHnKzcQmDKSO4Rp89a
 SVz5QYNfatfrjhgUv4DY/RsFEDlPbOiP71jKodcOSNoF5vjfNaudHhTNI1df0Pdw
 /McFtKBIisrapDMa2wXwE7fTFLDUngACTc6FaSn86PyFU0wum3XEH90aqF9KKuQp
 Ra88U/zsLUYE0jGkm6XWBsvmJHBZMTgFwXjlmdu52rnDRKccLgfCCTvb1oBGjrTj
 ZMDokgrZ74JiAHu3o0VtKLGCtNVZBjVC6TqC1ZBIrXLOpALGZGkFW8iSXgiArMX+
 NpMr9rExgobsAv02DTqWxlXLrEcUMO9IgM/TXbDQZP4hD5j1kzce9P5m59He9t/B
 UMmJc5SEgdCbMjwuBORdB0qyW0g9So880E8uuk8kw5/I7F8ONsahCsKbZntvwOrY
 s/UoF5RizRZhDJx2au4=
 =1A/T
 -----END PGP SIGNATURE-----

Merge tag 'mmc-v5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc

Pull MMC updates from Ulf Hansson:
 "MMC core:
   - Initial support for SD express card/host

  MMC host:
   - mxc: Convert the driver to DT-only
   - mtk-sd: Add HS400 enhanced strobe support
   - mtk-sd: Add support for the MT8192 SoC variant
   - sdhci-acpi: Allow changing HS200/HS400 driver strength for AMDI0040
   - sdhci-esdhc-imx: Convert the driver to DT-only
   - sdhci-pci-gli: Improve performance for HS400 mode for GL9763E
   - sdhci-pci-gli: Reduce power consumption for GL9755
   - sdhci-xenon: Introduce ACPI support
   - tmio: Fix command error processing
   - tmio: Inform the core about the max_busy_timeout
   - tmio/renesas_sdhi: Support custom calculation of busy-wait time
   - renesas_sdhi: Reset SCC only when available
   - rtsx_pci: Add SD Express mode support for RTS5261
   - rtsx_pci: Various fixes and improvements for RTS5261

  MEMSTICK:
   - Minor fixes/improvements"

* tag 'mmc-v5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: (72 commits)
  dt-bindings: mmc: eliminate yamllint warnings
  mmc: sdhci-xenon: introduce ACPI support
  mmc: sdhci-xenon: use clk only with DT
  mmc: sdhci-xenon: switch to device_* API
  mmc: sdhci-xenon: use match data for controllers variants
  dt-bindings: mmc: Fix xlnx,mio-bank property values for arasan driver
  mmc: renesas_sdhi: populate hook for longer busy_wait
  mmc: tmio: add hook for custom busy_wait calculation
  mmc: tmio: set max_busy_timeout
  dt-bindings: mmc: imx: fix the wrongly dropped imx8qm compatible string
  mmc: sdhci-pci-gli: Disable slow mode in HS400 mode for GL9763E
  mmc: sdhci: Use more concise device_property_read_u64
  memstick: r592: Fix error return in r592_probe()
  mmc: mxc: Convert the driver to DT-only
  mmc: mxs: Remove the unused .id_table
  mmc: sdhci-of-arasan: Fix fall-through warnings for Clang
  mmc: sdhci-pci-gli: Reduce power consumption for GL9755
  mmc: mediatek: depend on COMMON_CLK to fix compile tests
  mmc: pxamci: Fix error return code in pxamci_probe
  mmc: sdhci: Update firmware interface API
  ...
2020-12-15 15:57:25 -08:00
Linus Torvalds
2911ed9f47 Char / Misc driver updates for 5.11-rc1
Here is the big char/misc driver update for 5.11-rc1.
 
 Continuing the tradition of previous -rc1 pulls, there seems to be more
 and more tiny driver subsystems flowing through this tree.
 
 Lots of different things, all of which have been in linux-next for a
 while with no reported issues:
 	- extcon driver updates
 	- habannalab driver updates
 	- mei driver updates
 	- uio driver updates
 	- binder fixes and features added
 	- soundwire driver updates
 	- mhi bus driver updates
 	- phy driver updates
 	- coresight driver updates
 	- fpga driver updates
 	- speakup driver updates
 	- slimbus driver updates
 	- various small char and misc driver updates
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 -----BEGIN PGP SIGNATURE-----
 
 iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCX9iDZA8cZ3JlZ0Brcm9h
 aC5jb20ACgkQMUfUDdst+ylRMACgqxKS2CUcY8tPnR5weHEsbz6O+KAAn3BtEFnK
 7V9EnSuZe4L1jNOHOB5V
 =xzHh
 -----END PGP SIGNATURE-----

Merge tag 'char-misc-5.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Pull char / misc driver updates from Greg KH:
 "Here is the big char/misc driver update for 5.11-rc1.

  Continuing the tradition of previous -rc1 pulls, there seems to be
  more and more tiny driver subsystems flowing through this tree.

  Lots of different things, all of which have been in linux-next for a
  while with no reported issues:

   - extcon driver updates

   - habannalab driver updates

   - mei driver updates

   - uio driver updates

   - binder fixes and features added

   - soundwire driver updates

   - mhi bus driver updates

   - phy driver updates

   - coresight driver updates

   - fpga driver updates

   - speakup driver updates

   - slimbus driver updates

   - various small char and misc driver updates"

* tag 'char-misc-5.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (305 commits)
  extcon: max77693: Fix modalias string
  extcon: fsa9480: Support TI TSU6111 variant
  extcon: fsa9480: Rewrite bindings in YAML and extend
  dt-bindings: extcon: add binding for TUSB320
  extcon: Add driver for TI TUSB320
  slimbus: qcom: fix potential NULL dereference in qcom_slim_prg_slew()
  siox: Make remove callback return void
  siox: Use bus_type functions for probe, remove and shutdown
  spmi: Add driver shutdown support
  spmi: fix some coding style issues at the spmi core
  spmi: get rid of a warning when built with W=1
  uio: uio_hv_generic: use devm_kzalloc() for private data alloc
  uio: uio_fsl_elbc_gpcm: use device-managed allocators
  uio: uio_aec: use devm_kzalloc() for uio_info object
  uio: uio_cif: use devm_kzalloc() for uio_info object
  uio: uio_netx: use devm_kzalloc() for or uio_info object
  uio: uio_mf624: use devm_kzalloc() for uio_info object
  uio: uio_sercos3: use device-managed functions for simple allocs
  uio: uio_dmem_genirq: finalize conversion of probe to devm_ handlers
  uio: uio_dmem_genirq: convert simple allocations to device-managed
  ...
2020-12-15 14:10:09 -08:00
Marcin Wojtas
471cf4548e mmc: sdhci-xenon: introduce ACPI support
Previous patches dropped the strict dependency on the OF_*
in the sdhci-xenon driver. As a result the ACPI support
can be introduced (except for the XENON_A3700 variant)
by adding the necessary ID's in the acpi_match_table.

Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Link: https://lore.kernel.org/r/20201204171626.10935-5-mw@semihalf.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-12-11 10:08:37 +01:00
Marcin Wojtas
1542488031 mmc: sdhci-xenon: use clk only with DT
As a preparation for supporting ACPI, modify the driver
to use the clk framework only when booting with DT -
otherwise rely on the configuration done by firmware.
For that purpose introduce also a custom SDHCI get_max_clock
callback.

Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Link: https://lore.kernel.org/r/20201204171626.10935-4-mw@semihalf.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-12-11 10:08:37 +01:00
Marcin Wojtas
f29bf660bf mmc: sdhci-xenon: switch to device_* API
In order to support both ACPI and DT, modify the driver
to use device_* routines for obtaining the properties
values.

Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Link: https://lore.kernel.org/r/20201204171626.10935-3-mw@semihalf.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-12-11 10:08:37 +01:00
Marcin Wojtas
f75fda3730 mmc: sdhci-xenon: use match data for controllers variants
As a part of the ACPI support preparation resign from checking
compatible strings in the driver. Instead of that use a new
enum and assign the values to match data accordingly.

Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Link: https://lore.kernel.org/r/20201204171626.10935-2-mw@semihalf.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-12-11 10:08:37 +01:00
Ricky Wu
5b4258f672 misc: rtsx: rts5249 support runtime PM
rtsx_pcr:
add callback functions to support runtime PM
add delay_work to put device to D3 after idle
over 10 sec

rts5249:
add extra init flow for rtd3 and set rtd3_en from
config setting

rtsx_pci_sdmmc:
child device support autosuspend

Signed-off-by: Ricky Wu <ricky_wu@realtek.com>
Link: https://lore.kernel.org/r/20201202065857.19412-1-ricky_wu@realtek.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-12-09 19:42:18 +01:00
Ulf Hansson
6f56023aea Merge branch 'fixes' into next 2020-12-04 15:36:56 +01:00
Arnd Bergmann
c0d638a03b mmc: mediatek: mark PM functions as __maybe_unused
The #ifdef check for the suspend/resume functions is wrong:

drivers/mmc/host/mtk-sd.c:2765:12: error: unused function 'msdc_suspend' [-Werror,-Wunused-function]
static int msdc_suspend(struct device *dev)
drivers/mmc/host/mtk-sd.c:2779:12: error: unused function 'msdc_resume' [-Werror,-Wunused-function]
static int msdc_resume(struct device *dev)

Remove the #ifdef and mark all four as __maybe_unused to aovid the
problem.

Fixes: c0a2074ac5 ("mmc: mediatek: Fix system suspend/resume support for CQHCI")
Cc: stable@vger.kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/r/20201203222922.1067522-1-arnd@kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-12-04 15:35:54 +01:00
Wolfram Sang
b191deced7 mmc: renesas_sdhi: populate hook for longer busy_wait
Make use of the EXTOP bit in R-Car Gen3 SoCs to have a twice as large
busy wait duration.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20201125213001.15003-4-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-12-04 13:30:35 +01:00
Wolfram Sang
58959f89dd mmc: tmio: add hook for custom busy_wait calculation
Newer SDHI variants can 'wait while busy' longer than the generic TMIO.
Provide a hook to get the maximum cycle count to wait for. If the hook
is not populated, fall back to a generic version which works well with
all older TMIO/SDHI variants.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20201125213001.15003-3-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-12-04 13:30:04 +01:00
Wolfram Sang
30ae3e13ca mmc: tmio: set max_busy_timeout
Set max_busy_timeouts for variants known to support the TOPxx bits in
the SD_OPTION register. The timeout mechanism was running in the
background but not yet properly handled in the driver. So, let the MMC
core know when to not use R1B to avoid unhandled timeouts.

My datasheets for older variants (tmio_mmc.c) suggest that they support
it, too. However, actual bit descriptions are lacking, so I chose an
opt-in approach.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20201125213001.15003-2-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-12-04 13:28:25 +01:00
Ulf Hansson
46ed081078 Merge branch 'fixes' into next 2020-12-04 12:34:19 +01:00
Wolfram Sang
32a9e0c445 mmc: tmio: improve bringing HW to a sane state with MMC_POWER_OFF
Further testing of error cases revealed that downgrade is not enough, so
we need to reset the SCC which is done by calling the custom reset
function. This reset function can distinguish between the various SDHI
variants, so protecting the call with MIN_RCAR2 is enough here.

Fixes: 24ce2d7b8b ("mmc: tmio: bring tuning HW to a sane state with MMC_POWER_OFF")
Reported-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20201125204953.3344-1-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-12-04 12:33:59 +01:00
Ben Chuang
98991b1853 mmc: sdhci-pci-gli: Disable slow mode in HS400 mode for GL9763E
The GL9763E uses 150Mhz (slow mode) by default in HS400 mode. In order
to make HS400 mode run at 200Mhz, the slow mode needs to be turned off.

Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw>
Link: https://lore.kernel.org/r/20201125110145.2824-1-benchuanggli@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-12-04 12:30:56 +01:00
Jeremy Linton
cb80a7e917 mmc: sdhci: Use more concise device_property_read_u64
Since we only need a single u64 the _array form is
unnecessarily. Use device_property_read_u64 instead.

Signed-off-by: Jeremy Linton <jeremy.linton@arm.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20201125033630.603863-1-jeremy.linton@arm.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-12-04 12:27:58 +01:00
Fabio Estevam
8223e885e7 mmc: mxc: Convert the driver to DT-only
Since 5.10-rc1 i.MX is a devicetree-only platform, so simplify the code
by removing the unused non-DT support.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Link: https://lore.kernel.org/r/20201123203004.18792-1-festevam@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-11-24 15:18:19 +01:00
Fabio Estevam
d33b5b6857 mmc: mxs: Remove the unused .id_table
The mxs-mmc driver is only used by DT platforms and the .id_table
is unused.

Get rid of it to simplify the code.

While at it, use of_device_get_match_data() to retrieve the driver
data.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Link: https://lore.kernel.org/r/20201123191956.10542-1-festevam@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-11-24 15:17:18 +01:00
Gustavo A. R. Silva
a3096ec649 mmc: sdhci-of-arasan: Fix fall-through warnings for Clang
In preparation to enable -Wimplicit-fallthrough for Clang, fix multiple
warnings by explicitly adding multiple break statements instead of
letting the code fall through to the next case.

Link: https://github.com/KSPP/linux/issues/115
Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/387cab3a466038aa5d1fc34b8b6a7c4f693826ea.1605896060.git.gustavoars@kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-11-24 15:14:33 +01:00
Ben Chuang
0f1d9961d6 mmc: sdhci-pci-gli: Reduce power consumption for GL9755
For GL9755, reduce power consumption by lowering the LFCLK and disabling
the DMACLK on low-power.

Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw>
Link: https://lore.kernel.org/r/20201123053702.6083-1-benchuanggli@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-11-24 12:39:36 +01:00
Krzysztof Kozlowski
b61d468d96 mmc: mediatek: depend on COMMON_CLK to fix compile tests
The MFD_OMAP_USB_HOST uses Common Clock Framework thus it cannot be
built on platforms without it (e.g. compile test on MIPS with LANTIQ):

    mips-linux-ld: drivers/mmc/host/mtk-sd.o: in function `msdc_ops_set_ios':
    mtk-sd.c:(.text+0x2bbc): undefined reference to `clk_get_parent'

Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20201122120056.100045-1-krzk@kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-11-24 12:36:29 +01:00
Zhihao Cheng
d7b819b5d3 mmc: pxamci: Fix error return code in pxamci_probe
Fix to return the error code from devm_gpiod_get_optional() instaed
of 0 in pxamci_probe().

Fixes: f54005b508 ("mmc: pxa: Use GPIO descriptor for power")
Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Zhihao Cheng <chengzhihao1@huawei.com>
Link: https://lore.kernel.org/r/20201121021431.3168506-1-chengzhihao1@huawei.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-11-24 12:35:34 +01:00
Jeremy Linton
c5b1c6dc13 mmc: sdhci: Update firmware interface API
The device_* calls were added a few years ago to abstract
DT/ACPI/fwnode firmware interfaces. Lets convert the two
sdhci caps fields to use the generic calls rather than the OF
specific ones. This has the side effect of allowing
ACPI based devices to quirk themselves when the caps field
is broken.

Signed-off-by: Jeremy Linton <jeremy.linton@arm.com>
Link: https://lore.kernel.org/r/20201120233831.447365-1-jeremy.linton@arm.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-11-24 12:33:17 +01:00
Ulf Hansson
1208e75176 Merge branch 'fixes' into next 2020-11-24 11:28:38 +01:00
Muhammad Husaini Zulkifli
a42a7ec9bb mmc: sdhci-of-arasan: Fix clock registration error for Keem Bay SOC
The commit 16ada730a7 ("mmc: sdhci-of-arasan: Modify clock operations
handling") introduced support for platform specific clock operations.
Around the same point in time the commit 36c6aadaae ("mmc:
sdhci-of-arasan: Add support for Intel Keem Bay") was also  merged.
Unfortunate it was not really tested on top of the previously mentioned
commit, which causes clock registration failures for Keem Bay SOC devices.

Let's fix this, by properly declaring the clock operation for Keem Bay SOC
devices.

Fixes: 36c6aadaae ("mmc: sdhci-of-arasan: Add support for Intel Keem Bay")
Signed-off-by: Muhammad Husaini Zulkifli <muhammad.husaini.zulkifli@intel.com>
Reviewed-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20201118120120.24908-2-muhammad.husaini.zulkifli@intel.com
Cc: stable@vger.kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-11-24 11:28:12 +01:00
yong mao
903a72eca4 mmc: mediatek: Extend recheck_sdio_irq fix to more variants
The SDIO recheck fix is required for more of the supported variants. Let's
add it to those that needs it.

Reported-by: Fabien Parent <fparent@baylibre.com>
Reported-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Signed-off-by: Yong Mao <yong.mao@mediatek.com>
Link: https://lore.kernel.org/r/20201119030237.9414-1-yong.mao@mediatek.com
Fixes: 9e2582e574 ("mmc: mediatek: fix SDIO irq issue")
Cc: stable@vger.kernel.org
[Ulf: Clarified commitmsg ]
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-11-24 11:27:38 +01:00
Krzysztof Kozlowski
bf3023e6e8 mmc: sdhci-st: drop of_match_ptr from of_device_id table
The driver can match only via the DT table so the table should be always
used and the of_match_ptr does not have any sense (this also allows ACPI
matching via PRP0001, even though it is not relevant here).  This fixes
compile warning (!CONFIG_OF on x86_64):

    drivers/mmc/host/sdhci-st.c:512:34: warning:
        ‘st_sdhci_match’ defined but not used [-Wunused-const-variable=]

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20201120162344.485921-2-krzk@kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-11-24 11:26:55 +01:00
Krzysztof Kozlowski
a96e6523d0 mmc: sdhci-sprd: drop of_match_ptr from of_device_id table
The driver can match only via the DT table so the table should be always
used and the of_match_ptr does not have any sense (this also allows ACPI
matching via PRP0001, even though it is not relevant here).  This fixes
compile warning (!CONFIG_OF on x86_64):

    drivers/mmc/host/sdhci-sprd.c:723:34: warning:
        ‘sdhci_sprd_of_match’ defined but not used [-Wunused-const-variable=]

Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Chunyan Zhang <zhang.lyra@gmail.com>
Link: https://lore.kernel.org/r/20201120162344.485921-1-krzk@kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-11-24 11:26:55 +01:00
Wenbin Mei
c0a2074ac5 mmc: mediatek: Fix system suspend/resume support for CQHCI
Before we got these errors on MT8192 platform:
[   59.153891] Restarting tasks ...
[   59.154540] done.
[   59.159175] PM: suspend exit
[   59.218724] mtk-msdc 11f60000.mmc: phase: [map:fffffffe] [maxlen:31]
[final:16]
[  119.776083] mmc0: cqhci: timeout for tag 9
[  119.780196] mmc0: cqhci: ============ CQHCI REGISTER DUMP ===========
[  119.786709] mmc0: cqhci: Caps:      0x100020b6 | Version:  0x00000510
[  119.793225] mmc0: cqhci: Config:    0x00000101 | Control:  0x00000000
[  119.799706] mmc0: cqhci: Int stat:  0x00000000 | Int enab: 0x00000000
[  119.806177] mmc0: cqhci: Int sig:   0x00000000 | Int Coal: 0x00000000
[  119.812670] mmc0: cqhci: TDL base:  0x00000000 | TDL up32: 0x00000000
[  119.819149] mmc0: cqhci: Doorbell:  0x003ffc00 | TCN:      0x00000200
[  119.825656] mmc0: cqhci: Dev queue: 0x00000000 | Dev Pend: 0x00000000
[  119.832155] mmc0: cqhci: Task clr:  0x00000000 | SSC1:     0x00001000
[  119.838627] mmc0: cqhci: SSC2:      0x00000000 | DCMD rsp: 0x00000000
[  119.845174] mmc0: cqhci: RED mask:  0xfdf9a080 | TERRI:    0x0000891c
[  119.851654] mmc0: cqhci: Resp idx:  0x00000000 | Resp arg: 0x00000000
[  119.865773] mmc0: cqhci: : ===========================================
[  119.872358] mmc0: running CQE recovery
From these logs, we found TDL base was back to the default value.

After suspend, the mmc host is powered off by HW, and bring CQE register
to the default value, so we add system suspend/resume interface, then bring
CQE to deactivated state before suspend, it will be enabled by CQE first
request after resume.

Signed-off-by: Wenbin Mei <wenbin.mei@mediatek.com>
Link: https://lore.kernel.org/r/20201118063405.24906-1-wenbin.mei@mediatek.com
Fixes: 88bd652b3c ("mmc: mediatek: command queue support")
Cc: stable@vger.kernel.org
[Ulf: Renamed functions]
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-11-23 14:42:56 +01:00
Masaharu Hayakawa
40e49564e1 mmc: tmio: Fix command error processing
If some errors are detected at the same time as the access end
interrupt, the access end interrupt was not cleared. Especially with
DMA, because then the access end interrupt was never enabled and, thus,
never cleared. Clear the interrupt register always when a command error
occurs.

Signed-off-by: Masaharu Hayakawa <masaharu.hayakawa.ry@renesas.com>
[saito: rebase to v5.4]
Signed-off-by: Takeshi Saito <takeshi.saito.xv@renesas.com>
[wsa: rebase and extension of the commit message]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20201117131337.35307-1-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-11-23 14:22:14 +01:00
Fabio Estevam
854a22997a mmc: sdhci-esdhc-imx: Convert the driver to DT-only
Since 5.10-rc1 i.MX is a devicetree-only platform, so simplify the code
by removing the unused non-DT support.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Haibo Chen <haibo.chen@nxp.com>
Link: https://lore.kernel.org/r/20201117113750.25053-1-festevam@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-11-23 14:20:03 +01:00
Ulf Hansson
506f43994d Merge branch 'fixes' into next 2020-11-17 12:48:34 +01:00
Krzysztof Kozlowski
ade8e9d3fb mmc: tmio: do not print real IOMEM pointer
Printing kernel pointers is discouraged because they might leak kernel
memory layout.  This fixes smatch warning:

    drivers/mmc/host/tmio_mmc.c:177 tmio_mmc_probe() warn: argument 3 to %08lx specifier is cast from pointer

Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20201116164252.44078-1-krzk@kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-11-17 12:46:39 +01:00
Wolfram Sang
fcc541fea3 mmc: sdhci: tegra: fix wrong unit with busy_timeout
'busy_timeout' is in msecs, not in jiffies. Use the correct factor.

Fixes: 5e958e4aac ("sdhci: tegra: Implement Tegra specific set_timeout callback")
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20201116132206.23518-1-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-11-17 12:45:27 +01:00
Manish Narani
d06d60d52e mmc: sdhci-of-arasan: Issue DLL reset explicitly
In the current implementation DLL reset will be issued for
each ITAP and OTAP setting inside ATF, this is creating issues
in some scenarios and this sequence is not inline with the TRM.
To fix the issue, DLL reset should be removed from the ATF and
host driver will request it explicitly.
This patch update host driver to explicitly request for DLL reset
before ITAP (assert DLL) and after OTAP (release DLL) settings.

Fixes: a5c8b2ae2e ("mmc: sdhci-of-arasan: Add support for ZynqMP Platform Tap Delays Setup")
Signed-off-by: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>
Signed-off-by: Manish Narani <manish.narani@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/1605515565-117562-4-git-send-email-manish.narani@xilinx.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-11-17 12:44:44 +01:00
Manish Narani
d338c6d01d mmc: sdhci-of-arasan: Use Mask writes for Tap delays
Mask the ITAP and OTAP delay bits before updating with the new
tap value for Versal platform.

Fixes: 1a470721c8 ("sdhci: arasan: Add support for Versal Tap Delays")
Signed-off-by: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>
Signed-off-by: Manish Narani <manish.narani@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/1605515565-117562-3-git-send-email-manish.narani@xilinx.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-11-17 12:44:40 +01:00
Manish Narani
9e95343293 mmc: sdhci-of-arasan: Allow configuring zero tap values
Allow configuring the Output and Input tap values with zero to avoid
failures in some cases (one of them is SD boot mode) where the output
and input tap values may be already set to non-zero.

Fixes: a5c8b2ae2e ("mmc: sdhci-of-arasan: Add support for ZynqMP Platform Tap Delays Setup")
Signed-off-by: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>
Signed-off-by: Manish Narani <manish.narani@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/1605515565-117562-2-git-send-email-manish.narani@xilinx.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-11-17 12:43:47 +01:00
Colin Ian King
fde71a3eed mmc: host: Kconfig: fix spelling mistake "hardare" -> "hardware"
There is a spelling mistake in the Kconfig file. Fix it.

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Link: https://lore.kernel.org/r/20201114120819.416311-1-colin.king@canonical.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-11-17 12:36:06 +01:00
Dmitry Baryshkov
8ffbfe43e9 mmc: sdhci-msm: detect if tassadar_dll is used by using core version
Detect if tassadar_dll is required by using core version rather than
just specifying it in the sdhci_msm_variant_info.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Cc: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
Reviewed-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
Link: https://lore.kernel.org/r/20201112173636.360186-1-dmitry.baryshkov@linaro.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-11-17 12:35:35 +01:00
Adrian Hunter
60d5356610 mmc: sdhci-pci: Prefer SDR25 timing for High Speed mode for BYT-based Intel controllers
A UHS setting of SDR25 can give better results for High Speed mode.
This is because there is no setting corresponding to high speed.  Currently
SDHCI sets no value, which means zero which is also the setting for SDR12.
There was an attempt to change this in sdhci.c but it caused problems for
some drivers, so it was reverted and the change was made to sdhci-brcmstb
in commit 2fefc7c5f7 ("mmc: sdhci-brcmstb: Fix incorrect switch to HS
mode").  Several other drivers also do this.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Cc: stable@vger.kernel.org # v5.4+
Link: https://lore.kernel.org/r/20201112133656.20317-1-adrian.hunter@intel.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-11-17 12:33:06 +01:00
Zheng Liang
bbba85fae4 mmc: mediatek: fix mem leak in msdc_drv_probe
It should use mmc_free_host to free mem in error patch of
msdc_drv_probe.

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Zheng Liang <zhengliang6@huawei.com>
Reviewed-by: Chaotian Jing <chaotian.jing@mediatek.com>
Link: https://lore.kernel.org/r/20201112092530.32446-1-zhengliang6@huawei.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-11-17 12:30:30 +01:00
Wolfram Sang
ab07a13560 mmc: renesas_sdhi: sort includes
Better prevent double includes.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20201111100244.15823-4-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-11-16 12:55:04 +01:00
Wolfram Sang
0e08a41158 mmc: renesas_sdhi: don't hardcode SDIF values
Use a macro to name the hardcoded values. Also, move the SDIF register
definition into the SDHI driver because this is an SDHI extension.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20201111100244.15823-3-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-11-16 12:54:59 +01:00
Wolfram Sang
4533c3eb89 mmc: renesas_sdhi: improve HOST_MODE usage
HOST_MODE should have a CTL_ prefix, too. This makes the code more
readable because we immediately know what it is. Also, remove the
hardcoded values with something readable, too.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20201111100244.15823-2-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-11-16 12:54:48 +01:00
Wolfram Sang
8c8310a6c2 mmc: renesas_sdhi: remove superfluous SCLKEN
All previously called functions handle SCLKEN on their own, no need to
enable it again in sdhi_reset().

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20201110162151.37622-4-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-11-16 12:51:47 +01:00
Wolfram Sang
80d0be8110 mmc: renesas_sdhi: merge the SCC reset functions
There is no user of renesas_sdhi_reset_scc() anymore, only
renesas_sdhi_disable_scc() so merge these functions into one. I guess
the seperation was cruft anyhow. The BSP doesn't have it anymore and I
can't recall the reason we had it.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20201110162151.37622-3-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-11-16 12:51:23 +01:00
Wolfram Sang
183edc060e mmc: renesas_sdhi: clear TAPEN when resetting, too
We want to clear TAPEN in a software reset, too, to have a completely
known state. Especially when we doing the initial reset during boot to
clear previous firmware states.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20201110162151.37622-2-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-11-16 12:50:41 +01:00
Wolfram Sang
9f809065d8 mmc: renesas_sdhi: simplify reset routine a little
The 'reset' pointer is only populated for Gen2+. So, we don't need to
check for that flag inside the routine.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20201110142058.36393-5-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-11-16 12:48:24 +01:00
Wolfram Sang
d14ac691bb mmc: renesas_sdhi: populate SCC pointer at the proper place
The SCC pointer is currently filled whenever the SoC is Gen2+. This is
wrong because there is a Gen2-variant without SCC (SDHI_VER_GEN2_SDR50).
We have been lucky because the writes to unintended registers have not
caused problems so far. But further refactoring work exposed the
problem. So, move the pointer initialization to the place where we know
that the SDHI instance supports tuning. And also populate the 'reset'
pointer unconditionally to make sure the interrupt enable register is
always properly set for Gen2+.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20201110142058.36393-4-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-11-16 12:48:19 +01:00
Wolfram Sang
b161d87dfd mmc: renesas_sdhi: probe into TMIO after SCC parameters have been setup
Setting up the SCC parameters does not need a probed TMIO device. But in
the near future, probing the TMIO device needs the SCC parameters setup.
So, fix the ordering.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20201110142058.36393-3-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-11-16 12:48:14 +01:00
Wolfram Sang
45bffc371f mmc: renesas_sdhi: only reset SCC when its pointer is populated
Only re-initialize SCC and tuning when an SCC was found during probe().
This is currently a noop because all R-Car Gen2+ are considered to have
an SCC. But this will change in a later patch, so we need this
preparation.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20201110142058.36393-2-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-11-16 12:46:50 +01:00
Zou Wei
1f71b0bf4e mmc: owl-mmc: use true and false for bool variables
Fix coccicheck warnings:

./owl-mmc.c:524:2-18: WARNING: Assignment of 0/1 to bool variable
./owl-mmc.c:528:2-18: WARNING: Assignment of 0/1 to bool variable

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Zou Wei <zou_wei@huawei.com>
Link: https://lore.kernel.org/r/1604888706-63429-1-git-send-email-zou_wei@huawei.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-11-16 12:44:31 +01:00
Kaixu Xia
c24aa7b160 mmc: sdhci-pic32: Make pic32_sdhci_probe_platform() void
pic32_sdhci_probe_platform() always returned 0, so there's no reason for
a return value.  In addition, pic32_sdhci_probe() checked the return value
for possible error which is unnecessary.

Convert pic32_sdhci_probe_platform() to a void function and remove the
return value check. Fix the following Coccinelle warning:

./drivers/mmc/host/sdhci-pic32.c:127:5-8: Unneeded variable: "ret". Return "0" on line 137

Reported-by: Tosk Robot <tencent_os_robot@tencent.com>
Signed-off-by: Kaixu Xia <kaixuxia@tencent.com>
Link: https://lore.kernel.org/r/1604847648-13036-1-git-send-email-kaixuxia@tencent.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-11-16 11:59:30 +01:00
Tian Tao
9f7d4c916c mmc: dw_mmc: replace spin_lock_irqsave by spin_lock in hard IRQ
The code has been in a irq-disabled context since it is hard IRQ. There
is no necessity to do it again.

Signed-off-by: Tian Tao <tiantao6@hisilicon.com>
Link: https://lore.kernel.org/r/1604627813-59785-1-git-send-email-tiantao6@hisilicon.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-11-16 11:59:30 +01:00
Krzysztof Kozlowski
e2c01e9192 mmc: meson-gx: drop of_match_ptr from of_device_id table
The driver can match only via the DT table so the table should be always
used and the of_match_ptr does not have any sense (this also allows ACPI
matching via PRP0001, even though it is not relevant here).  This fixes
compile warning (!CONFIG_OF && !CONFIG_MODULES):

    drivers/mmc/host/meson-gx-mmc.c:1252:34: warning:
        ‘meson_mmc_of_match’ defined but not used [-Wunused-const-variable=]

Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20201103163046.14336-1-krzk@kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-11-16 11:59:30 +01:00
Rui Feng
6b7b58f425 mmc: rtsx: Add test mode for RTS5261
This patch add test mode for RTS5261.
If test mode is set, reader will switch to SD Express mode
mandatorily, and this mode is used by factory testing only.

Signed-off-by: Rui Feng <rui_feng@realsil.com.cn>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Link: https://lore.kernel.org/r/1604397269-2780-1-git-send-email-rui_feng@realsil.com.cn
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-11-16 11:59:29 +01:00
Wenbin Mei
13b4e1e924 mmc: mediatek: add HS400 enhanced strobe support
Add support for HS400ES mode to MediaTek MMC Card Driver.

Signed-off-by: Wenbin Mei <wenbin.mei@mediatek.com>
Link: https://lore.kernel.org/r/20201102092822.5301-2-wenbin.mei@mediatek.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-11-16 11:59:29 +01:00
Tian Tao
fa4c9a497c mmc: owl-mmc: replace spin_lock_irqsave by spin_lock in hard IRQ
The code has been in a irq-disabled context since it is hard IRQ. There
is no necessity to do it again.

Signed-off-by: Tian Tao <tiantao6@hisilicon.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/1604278337-55624-1-git-send-email-tiantao6@hisilicon.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-11-16 11:59:29 +01:00
Tian Tao
291a81c3b0 mmc: meson-mx-sdio: replace spin_lock_irqsave by spin_lock in hard IRQ
The code has been in a irq-disabled context since it is hard IRQ. There
is no necessity to do it again.

Signed-off-by: Tian Tao <tiantao6@hisilicon.com>
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lore.kernel.org/r/1604375323-33556-1-git-send-email-tiantao6@hisilicon.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-11-16 11:59:29 +01:00
Tian Tao
120ae805fb mmc: moxart: replace spin_lock_irqsave by spin_lock in hard IRQ
The code has been in a irq-disabled context since it is hard IRQ. There
is no necessity to do it again.

Signed-off-by: Tian Tao <tiantao6@hisilicon.com>
Link: https://lore.kernel.org/r/1604021319-31338-1-git-send-email-tiantao6@hisilicon.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-11-16 11:59:29 +01:00
Tom Rix
86d9bf50af mmc: davinci: remove unneeded semicolon
A semicolon is not needed after a switch statement.

Signed-off-by: Tom Rix <trix@redhat.com>
Link: https://lore.kernel.org/r/20201031152708.2146690-1-trix@redhat.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-11-16 11:59:28 +01:00
Rui Feng
9ff43c7be9 mmc: rtsx_pci: Add SD Express mode support for RTS5261
RTS5261 support SD mode and PCIe/NVMe mode. The workflow is as follows.
1.RTS5261 work in SD mode and set MMC_CAPS2_SD_EXP flag.
2.If card is plugged in, Host send CMD8 to ask card's PCIe availability.
3.If the card has PCIe availability and WP is not set, init_sd_express() will be invoked,
RTS5261 switch to PCIe/NVMe mode.
4.Mmc driver handover it to NVMe driver.
5.If card is unplugged, RTS5261 will switch to SD mode.

Signed-off-by: Rui Feng <rui_feng@realsil.com.cn>
Link: https://lore.kernel.org/r/1603936703-3403-1-git-send-email-rui_feng@realsil.com.cn
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-11-16 11:59:28 +01:00
Tian Tao
9baf7c5e3a mmc: mediatek: Replace spin_lock_irqsave by spin_lock in hard IRQ
The code has been in a irq-disabled context since it is hard IRQ. Therefore
there no need to do it again.

Signed-off-by: Tian Tao <tiantao6@hisilicon.com>
Link: https://lore.kernel.org/r/1603068193-44688-1-git-send-email-tiantao6@hisilicon.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-11-16 11:59:28 +01:00
Wenbin Mei
f5eccd94b6 mmc: mediatek: Add subsys clock control for MT8192 msdc
MT8192 msdc is an independent sub system, we need control more bus
clocks for it.
Add support for the additional subsys clocks to allow it to be
configured appropriately.

Signed-off-by: Wenbin Mei <wenbin.mei@mediatek.com>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
Link: https://lore.kernel.org/r/20201014030846.12428-5-wenbin.mei@mediatek.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-11-16 11:59:27 +01:00
Raul E Rangel
e10f480902 mmc: sdhci-acpi: AMDI0040: Allow changing HS200/HS400 driver strength
This change will allow platform designers better control over signal
integrity by allowing them to tune the HS200 and HS400 driver strengths.

The driver strength was previously hard coded to A to solve boot
problems with certain platforms. This driver strength does not
universally apply to all platforms so we need a knob to adjust it.

All older platforms currently have the SDR104 preset hard coded to A in
the firmware. This means that switching from the hard coded value in
the kernel to reading the SDR104 preset is a no-op for these platforms.
Newer platforms will have properly set presets. So this change will
support both new and old platforms.

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Signed-off-by: Victor Ding <victording@google.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20201027084612.528301-1-victording@google.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-11-16 11:59:27 +01:00
Krzysztof Kozlowski
b733775fb6 mmc: sunxi: drop of_match_ptr from of_device_id table
The driver can match only via DT table so it should be always used and
the of_match_ptr does not have any sense (this also allows ACPI
matching via PRP0001, even though it is not relevant for sunxi).  This
fixes compile warning:

    drivers/mmc/host/sunxi-mmc.c:1181:34: warning: ‘sunxi_mmc_of_match’ defined but not used [-Wunused-const-variable=]

Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Maxime Ripard <mripard@kernel.org>
Link: https://lore.kernel.org/r/20201026153810.89512-3-krzk@kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-11-16 11:59:27 +01:00
Krzysztof Kozlowski
1b0e4a2141 mmc: s3cmci: enable compile testing
The driver can be compile tested to increase build coverage.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20201026153810.89512-2-krzk@kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-11-16 11:59:27 +01:00
Krzysztof Kozlowski
1dc575490b mmc: s3cmci: include GPIO descriptor consumer header
The driver uses GPIO Descriptor Consumer Interface so include proper
header to fix compile test errors like:

    drivers/mmc/host/s3cmci.c: In function ‘s3cmci_check_sdio_irq’:
    drivers/mmc/host/s3cmci.c:304:7: error:
        implicit declaration of function ‘gpiod_get_value’; did you mean ‘gpio_get_value’? [-Werror=implicit-function-declaration]

    drivers/mmc/host/s3cmci.c: In function ‘s3cmci_probe_pdata’:
    drivers/mmc/host/s3cmci.c:1451:19: error:
        implicit declaration of function ‘devm_gpiod_get_index’ [-Werror=implicit-function-declaration]

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20201026153810.89512-1-krzk@kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-11-16 11:59:27 +01:00
Wolfram Sang
03d80e042a Revert "mmc: renesas_sdhi: workaround a regression when reinserting SD cards"
This reverts commit db1af1e971. It was
only a workaround to hide a regression. We now have proper fixes.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20201106072549.1495-4-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-11-10 13:58:01 +01:00
Wolfram Sang
24ce2d7b8b mmc: tmio: bring tuning HW to a sane state with MMC_POWER_OFF
When powering off a card, we need to disable the tuning HW (like SCC for
the Renesas SDHI) to get to a sane state and allow for re-tuning new
cards. This was hidden before because we wrongly did that in hw_reset()
before which was an unintended use of hw_reset(). Now that we corrected
the use of hw_reset() meanwhile, we revealed this shortcoming and need
to fix it properly by explicitly calling the downgrade callback.

Fixes: 6e7d4de108 ("mmc: renesas_sdhi: move wrong 'hw_reset' to 'reset'")
Suggested-by: Takeshi Saito <takeshi.saito.xv@renesas.com>
Reviewed-by: Takeshi Saito <takeshi.saito.xv@renesas.com>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20201106072549.1495-3-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-11-10 13:58:01 +01:00
Wolfram Sang
1023e290ba mmc: tmio: when resetting, reset DMA controller, too
When applying a revert, the assumption that DMA only needs to be cleared
in specific cases was wrong. We want to reset the DMA controller every
time the rest of the HW gets reset, too.

Fixes: 34e3211e54 ("Revert "mmc: tmio: fix reset operation"")
Reported-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20201106072549.1495-2-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-11-10 13:58:01 +01:00
Yangbo Lu
71b053276a mmc: sdhci-of-esdhc: Handle pulse width detection erratum for more SoCs
Apply erratum workaround of unreliable pulse width detection to
more affected platforms (LX2160A Rev2.0 and LS1028A Rev1.0).

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Fixes: 48e304cc19 ("mmc: sdhci-of-esdhc: workaround for unreliable pulse width detection")
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20201110071314.3868-1-yangbo.lu@nxp.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-11-10 13:20:37 +01:00
Yoshihiro Shimoda
e8973201d9 mmc: renesas_sdhi_core: Add missing tmio_mmc_host_free() at remove
The commit 94b110aff8 ("mmc: tmio: add tmio_mmc_host_alloc/free()")
added tmio_mmc_host_free(), but missed the function calling in
the sh_mobile_sdhi_remove() at that time. So, fix it. Otherwise,
we cannot rebind the sdhi/mmc devices when we use aliases of mmc.

Fixes: 94b110aff8 ("mmc: tmio: add tmio_mmc_host_alloc/free()")
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/1604654730-29914-1-git-send-email-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-11-10 13:15:19 +01:00
Linus Torvalds
88098fd61b MMC host:
- sdhci: Fix performance regression with auto CMD auto select
  - sdhci-of-esdhc: Fix initialization for eMMC HS400 mode
  - sdhci-of-esdhc: Fix timeout bug for tuning commands
 -----BEGIN PGP SIGNATURE-----
 
 iQJLBAABCgA1FiEEugLDXPmKSktSkQsV/iaEJXNYjCkFAl+cAaAXHHVsZi5oYW5z
 c29uQGxpbmFyby5vcmcACgkQ/iaEJXNYjCk1TxAArYMU3N/xv05wsgqY2v3S9chF
 WZluEFcY27XwC327gev8009+a4iC2425j6VXy15IQ85r2EG1HrkxOVL+JpAbPrAC
 EKcdaqbMfp6onpGpx7PRj8VeAtx6ZTYO1iUyxQDJjS2DtRxIerSxHp5kDOYPiH+X
 O2vlzyqIS4c6g1cmY9wbSG0ii8Nw3JgMDhANsqYYXIjnNkZblZKFp/j5W0RcQ15m
 hhXYkK4m1YxsMtmWywYG3+YeVV6M8qkpjGHY0H0+IxWJY6sFF5vyBZ/SrkfnOSlC
 lghQVv4vCzecZbonUawR12GMSzu9U5f2vwHya1e1uKXVKJVK6Tw0mXOohhbnE8q6
 rAHeDuMpUp+0QZW/oJ6CqGMEmnqsmpdvtSvlN943US7M/xnQBHyznK/3t80tM1fv
 Npgvzwz1mBjUlWutiRQUUyNCZT/7cBNWaaSPly8/cnHyxUgZb6M7gVEel23xFE9i
 nAbJjKL5TWQUdp7EFKMSpic12Gu5RbkeLs2/UW60UlAz9hfGo2ADzwIrRS/nC8ni
 8Ko8y8RNhAJ4cQJDUMd3F2JwIS4AjJgXOGg9R1u0KO2ocAnB7CADzamIUDTywwam
 576RgYWiR3nppnRno1e69392y2orRFzHbMWzi+r32phjQs+q5qHodB0Yzn2ikg+7
 zn1zCQwFyTuD3LwThoQ=
 =LDSp
 -----END PGP SIGNATURE-----

Merge tag 'mmc-v5.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc

Pull MMC host fixes from Ulf Hansson:

 - sdhci: Fix performance regression with auto CMD auto select

 - sdhci-of-esdhc: Fix initialization for eMMC HS400 mode

 - sdhci-of-esdhc: Fix timeout bug for tuning commands

* tag 'mmc-v5.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc:
  mmc: sdhci-of-esdhc: make sure delay chain locked for HS400
  mmc: sdhci-of-esdhc: set timeout to max before tuning
  mmc: sdhci: Use Auto CMD Auto Select only when v4_mode is true
2020-10-30 11:04:11 -07:00
Yangbo Lu
011fde4839 mmc: sdhci-of-esdhc: make sure delay chain locked for HS400
For eMMC HS400 mode initialization, the DLL reset is a required step
if DLL is enabled to use previously, like in bootloader.
This step has not been documented in reference manual, but the RM will
be fixed sooner or later.

This patch is to add the step of DLL reset, and make sure delay chain
locked for HS400.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20201020081116.20918-1-yangbo.lu@nxp.com
Fixes: 54e08d9a95 ("mmc: sdhci-of-esdhc: add hs400 mode support")
Cc: stable@vger.kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-10-28 11:07:01 +01:00
Linus Torvalds
e731f3146f ARM: SoC platform updates
SoC changes, a substantial part of this is cleanup of some of the older
 platforms that used to have a bunch of board files. In particular:
 
  - Removal of non-DT i.MX platforms that haven't seen activity in years,
    it's time to remove them.
  - A bunch of cleanup and removal of platform data for TI/OMAP platforms,
    moving over to genpd for power/reset control (yay!)
  - Major cleanup of Samsung S3C24xx and S3C64xx platforms, moving them
    closer to multiplatform support (not quite there yet, but getting
    close).
 
 THere are a few other changes too, smaller fixlets, etc. For new
 platform support, the primary ones re:
 
  - New SoC: Hisilicon SD5203, ARM926EJ-S platform.
  - Cpufreq support for i.MX7ULP
 -----BEGIN PGP SIGNATURE-----
 
 iQJDBAABCgAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAl+TT4gPHG9sb2ZAbGl4
 b20ubmV0AAoJEIwa5zzehBx322MP/1mI56SyOFx30AqtWBPSjHJp+DzhOObyb4vD
 ndYuicBIn9tJwvVRBBZkfsbIU8EENVwrN3hOpesaj9L7xiqOqKakcnyC1REYmpIs
 8XBDfdZzy5PrMHIu3fF1ZDCQyO7KndGf5DfLVxJtcf1tSPQyQCuIA3FtS6d8Bxnz
 r491+om67ucnlFD5X0Spm3RdZH+ECmXx2iXwoS0Zi7P+X+S+ovG8wBV/X0ggeoBc
 Zgi4W01SiRupmSVZ6PA7FvWaLGQErQAALQOcFtMcFgjeWzc1v2QzcURELH8JW7ro
 72AH9st1Kvi3hoN2HNNzUnNUdQvZ+AdH8skMIpN/e1cBYqYStAF3gm/R9h+iVHbG
 GMmgzXHAFErfAW2UcF8tq1CzvQ5ChcTLNXdeoa8CeQbcDfocF3EyuKSPuDH+ve0H
 kk4tPesTAc6XCEVwLaGnoC75sdum5mSi8h9vqhln2KCdeTY7jxzH9YGHjm71Supb
 kV9vqo5Q5U/c5l2nU4r5q/DZdIahKsk3HIQZ0iG7BifAzamaTh4uyLVjtM6HSwNz
 tdHZaxoHd/PLI5IoeggFelx6qgvK5qVRLP0evgOdTLRFLj/ZbrOf0Q7DjdTy2BjZ
 Lgq461QqNapOzxq43G2IDT2+P62Q1+d+YLCKBgaGQaJicyU5m9STCNo3UBb1qH1h
 W6UwGF5z
 =0+Ee
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC platform updates from Olof Johansson:
 "SoC changes, a substantial part of this is cleanup of some of the
  older platforms that used to have a bunch of board files.

  In particular:

   - Remove non-DT i.MX platforms that haven't seen activity in years,
     it's time to remove them.

   - A bunch of cleanup and removal of platform data for TI/OMAP
     platforms, moving over to genpd for power/reset control (yay!)

   - Major cleanup of Samsung S3C24xx and S3C64xx platforms, moving them
     closer to multiplatform support (not quite there yet, but getting
     close).

  There are a few other changes too, smaller fixlets, etc. For new
  platform support, the primary ones are:

   - New SoC: Hisilicon SD5203, ARM926EJ-S platform.

   - Cpufreq support for i.MX7ULP"

* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (121 commits)
  ARM: mstar: Select MStar intc
  ARM: stm32: Replace HTTP links with HTTPS ones
  ARM: debug: add UART early console support for SD5203
  ARM: hisi: add support for SD5203 SoC
  ARM: omap3: enable off mode automatically
  clk: imx: imx35: Remove mx35_clocks_init()
  clk: imx: imx31: Remove mx31_clocks_init()
  clk: imx: imx27: Remove mx27_clocks_init()
  ARM: imx: Remove unused definitions
  ARM: imx35: Retrieve the IIM base address from devicetree
  ARM: imx3: Retrieve the AVIC base address from devicetree
  ARM: imx3: Retrieve the CCM base address from devicetree
  ARM: imx31: Retrieve the IIM base address from devicetree
  ARM: imx27: Retrieve the CCM base address from devicetree
  ARM: imx27: Retrieve the SYSCTRL base address from devicetree
  ARM: s3c64xx: bring back notes from removed debug-macro.S
  ARM: s3c24xx: fix Wunused-variable warning on !MMU
  ARM: samsung: fix PM debug build with DEBUG_LL but !MMU
  MAINTAINERS: mark linux-samsung-soc list non-moderated
  ARM: imx: Remove remnant board file support pieces
  ...
2020-10-24 10:33:08 -07:00
Michael Walle
0add6e9b88 mmc: sdhci-of-esdhc: set timeout to max before tuning
On rare occations there is the following error:

  mmc0: Tuning timeout, falling back to fixed sampling clock

There are SD cards which takes a significant longer time to reply to the
first CMD19 command. The eSDHC takes the data timeout value into account
during the tuning period. The SDHCI core doesn't explicitly set this
timeout for the tuning procedure. Thus on the slow cards, there might be
a spurious "Buffer Read Ready" interrupt, which in turn triggers a wrong
sequence of events. In the end this will lead to an unsuccessful tuning
procedure and to the above error.

To workaround this, set the timeout to the maximum value (which is the
best we can do) and the SDHCI core will take care of the proper timeout
handling.

Fixes: ba49cbd093 ("mmc: sdhci-of-esdhc: add tuning support")
Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20201022222337.19857-1-michael@walle.cc
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-10-23 14:16:47 +02:00
Jisheng Zhang
b3e1ea16fb mmc: sdhci: Use Auto CMD Auto Select only when v4_mode is true
sdhci-of-dwcmshc meets an eMMC read performance regression with below
command after commit 427b6514d0 ("mmc: sdhci: Add Auto CMD Auto
Select support"):

dd if=/dev/mmcblk0 of=/dev/null bs=8192 count=100000

Before the commit, the above command gives 120MB/s
After the commit, the above command gives 51.3 MB/s

So it looks like sdhci-of-dwcmshc expects Version 4 Mode for Auto
CMD Auto Select. Fix the performance degradation by ensuring v4_mode
is true to use Auto CMD Auto Select.

Fixes: 427b6514d0 ("mmc: sdhci: Add Auto CMD Auto Select support")
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20201015174115.4cf2c19a@xhacker.debian
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-10-15 12:29:59 +02:00