forked from Minki/linux
mmc: renesas_sdhi: enable WAIT_WHILE_BUSY
Now that we got the timeout handling in the driver correct, we can use this capability to avoid polling via the MMC core. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20210409094606.4317-1-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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@ -97,7 +97,7 @@ static const struct renesas_sdhi_of_data of_rza2_compatible = {
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TMIO_MMC_HAVE_CBSY,
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.tmio_ocr_mask = MMC_VDD_32_33,
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.capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
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MMC_CAP_CMD23,
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MMC_CAP_CMD23 | MMC_CAP_WAIT_WHILE_BUSY,
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.bus_shift = 2,
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.scc_offset = 0 - 0x1000,
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.taps = rcar_gen3_scc_taps,
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@ -111,7 +111,7 @@ static const struct renesas_sdhi_of_data of_rcar_gen3_compatible = {
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.tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_CLK_ACTUAL |
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TMIO_MMC_HAVE_CBSY | TMIO_MMC_MIN_RCAR2,
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.capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
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MMC_CAP_CMD23,
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MMC_CAP_CMD23 | MMC_CAP_WAIT_WHILE_BUSY,
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.capabilities2 = MMC_CAP2_NO_WRITE_PROTECT | MMC_CAP2_MERGE_CAPABLE,
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.bus_shift = 2,
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.scc_offset = 0x1000,
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@ -33,12 +33,14 @@ static const struct renesas_sdhi_of_data of_rz_compatible = {
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.tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_32BIT_DATA_PORT |
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TMIO_MMC_HAVE_CBSY,
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.tmio_ocr_mask = MMC_VDD_32_33,
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.capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
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.capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
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MMC_CAP_WAIT_WHILE_BUSY,
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};
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static const struct renesas_sdhi_of_data of_rcar_gen1_compatible = {
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.tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_CLK_ACTUAL,
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.capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
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.capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
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MMC_CAP_WAIT_WHILE_BUSY,
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.capabilities2 = MMC_CAP2_NO_WRITE_PROTECT,
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};
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@ -58,7 +60,7 @@ static const struct renesas_sdhi_of_data of_rcar_gen2_compatible = {
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.tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_CLK_ACTUAL |
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TMIO_MMC_HAVE_CBSY | TMIO_MMC_MIN_RCAR2,
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.capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
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MMC_CAP_CMD23,
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MMC_CAP_CMD23 | MMC_CAP_WAIT_WHILE_BUSY,
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.capabilities2 = MMC_CAP2_NO_WRITE_PROTECT,
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.dma_buswidth = DMA_SLAVE_BUSWIDTH_4_BYTES,
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.dma_rx_offset = 0x2000,
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