The LEDs on the kzm9g board are labeled using upper-case characters.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The LEDs on the koelsch board are labeled using upper-case characters.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The IIC nodes used the generic compatible properties only.
This causes the driver to fail when using Standard Speed, as the
operational clock is driven by the 104 MHz HP clock:
i2c-sh_mobile e6820000.i2c: timing values out of range: L/H=0x208/0x1bf
i2c-sh_mobile: probe of e6820000.i2c failed with error -22
Add the SoC-specific compatible property to fix this.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The IIC nodes used the generic compatible properties only.
This may cause the driver to fail when using Standard Speed on IIC
masters where the operational clock is driven by the 130 MHz HP clock.
Add the SoC-specific compatible property to fix this.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Current Koelsch I2C2 has 400kHz settings,
but, ak4643 audio codec chip which is connected to I2C2 can't
work such frequency.
Fixup I2C2 clock frequency to 100kHz.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Current Lager IIC2 is using default clock frequency,
but, ak4643 audio codec chip needs 100kHz
This patch clarifies IIC2 clock frequency as 100kHz.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Enable usb1 on Google Chromecast which is connected to micro-USB
plug used for external power supply, too.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Adds nodes describing the Marvell Berlin BG2CD USB PHY and USB. The BG2CD
SoC has 2 USB ChipIdea controllers, with usb0 host-only and usb1 dual-role
capable.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Enable the 2 available USB PHY and USB nodes on the Marvell Berlin BG2Q
DMP.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Adds nodes describing the Marvell Berlin BG2Q USB PHY and USB. The BG2Q
SoC has 3 USB host controller, compatible with ChipIdea.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Add nodes for I2C controllers A,B,AO, which are available in both
Meson6 and Meson8.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Signed-off-by: Carlo Caione <carlo@caione.org>
This enables the L2 cache controller available in Amlogic SoCs.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Carlo Caione <carlo@caione.org>
This adds a dtsi for Amlogic Meson8 SoCs. It differs from the Meson6
dtsi for the number of Cortex-A9 cores (4 vs 2) and for the frequency
of clk81.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Carlo Caione <carlo@caione.org>
Following Arnds review comments, update the miphy365 to follow the
common convention of naming the phy node names as phy@addr.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Suggested-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
At the moment we don't take a reference on some core interconnect
clocks which means when CCF turns off unused clocks the SoC will
hang. As a temp soltuion we will boot with clk_ignore_unused
parameter for all b2120 boards.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
The STiH410 is an advanced multi-HD AVC processor with 3D graphics acceleration
and 1.5-GHz ARM Cortex-A9 SMP CPU part of the stih407 family.
It has wide connectivity including USB 3.0, PCI-e, SATA and gigabit ethernet.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
The stih410 soc which will be added in the following commit is very similar to
the stih407, to enable maximum re-use of the dt files this commit abstracts the
common parts into a shared dt file stihxxx-b2120 for the board, and also a shared
file stih407-family.dtsi for the SoC.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
This patch adds the required pin configiguration for the extra usb
controllers found on the stih410 device.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
This patch adds the DT nodes for the 4 usb ehci and ohci usb controllers
on the stih416 SoC.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
This usb picophy is found on stih415/6 SoC.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
This patch adds the required pin config for all usb controllers
on the stih416.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
The Mele M9 has an ethernet board, enable it.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
PLL6 on sun6i has multiple outputs, just like the other sunxi platforms.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Another small set of fixes:
- Some DT compatible typo fixes
- irq setup fix dealing with irq storms on orion
- i2c quirk generalization for mvebu
- A handful of smaller fixes for OMAP
- A couple of added file patterns for OMAP entries in MAINTAINERS
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Merge tag 'armsoc-for-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
"Another small set of fixes:
- some DT compatible typo fixes
- irq setup fix dealing with irq storms on orion
- i2c quirk generalization for mvebu
- a handful of smaller fixes for OMAP
- a couple of added file patterns for OMAP entries in MAINTAINERS"
* tag 'armsoc-for-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: at91/dt: Fix sama5d3x typos
pinctrl: dra: dt-bindings: Fix output pull up/down
MAINTAINERS: Update entry for omap related .dts files to cover new SoCs
MAINTAINERS: add more files under OMAP SUPPORT
ARM: dts: AM437x-SK-EVM: Fix DCDC3 voltage
ARM: dts: AM437x-GP-EVM: Fix DCDC3 voltage
ARM: dts: AM43x-EPOS-EVM: Fix DCDC3 voltage
ARM: dts: am335x-evm: Fix 5th NAND partition's name
ARM: orion: Fix for certain sequence of request_irq can cause irq storm
ARM: mvebu: armada xp: Generalize use of i2c quirk
Some DT files had a typo with a missing "5" in sama5d3x first compatible string.
Signed-off-by: Peter Rosin <peda@axentia.se>
[nicolas.ferre@atmel.com: modify commit log]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
MAINTAINERS file to avoid missing PMIC and SoC related patches:
- Fix random hangs on am437x because of incorrect default
value for the DDR regulator
- Fix wrong partition name for NAND on am335x-evm
- Fix wrong pinctrl defines for dra7xx
- Update maintainers entries for PMICs and SoCs
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Merge tag 'omap-fixes-against-v3.18-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Merge "omap fixes against v3.18-rc4" from Tony Lindgren:
Few omap fixes for hangs and wrong pinctrl defines, and update
MAINTAINERS file to avoid missing PMIC and SoC related patches:
- Fix random hangs on am437x because of incorrect default
value for the DDR regulator
- Fix wrong partition name for NAND on am335x-evm
- Fix wrong pinctrl defines for dra7xx
- Update maintainers entries for PMICs and SoCs
* tag 'omap-fixes-against-v3.18-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
pinctrl: dra: dt-bindings: Fix output pull up/down
MAINTAINERS: Update entry for omap related .dts files to cover new SoCs
MAINTAINERS: add more files under OMAP SUPPORT
ARM: dts: AM437x-SK-EVM: Fix DCDC3 voltage
ARM: dts: AM437x-GP-EVM: Fix DCDC3 voltage
ARM: dts: AM43x-EPOS-EVM: Fix DCDC3 voltage
ARM: dts: am335x-evm: Fix 5th NAND partition's name
Signed-off-by: Olof Johansson <olof@lixom.net>
Pull ARM fixes from Russell King:
"Two fixes this time, one to ensure that the kuser helper option
depends on MMU as they aren't available for noMMU targets (and if the
option is selected, we end up oopsing.)
The second fix plugs a corner case with the decompressor, ensuring
that the instruction stream can see the relocated code in every case
on ARMv7 CPUs"
* 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm:
ARM: 8198/1: make kuser helpers depend on MMU
ARM: 8191/1: decompressor: ensure I-side picks up relocated code
This enables user space access to the 3 PWM available on the Radxa Rock headers.
Signed-off-by: Julien CHAUVEAU <julien.chauveau@neo-technologies.fr>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The clock nodes for DSS VIDEO1/2 and HDMI have wrong register addresses.
This patch fixes the addresses so that they point to
CM_CLKSEL_VIDEO1_PLL_SYS, CM_CLKSEL_VIDEO2_PLL_SYS and
CM_CLKSEL_HDMI_PLL_SYS.
Reported-by: Somnath Mukherjee <somnath@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The mt6592-evb is an evaluation board based on the MT6592 SoC.
Signed-off-by: Howard Chen <ibanezchen@gmail.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* A dtsi for boards based on Mediatek MT6592 SoCs
* Compatible string in arch/arm/mach-mediatek/mediatek.c
Signed-off-by: Howard Chen <ibanezchen@gmail.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This allows the "make dtbs" to build the moose and mt8135-evbp1
for MediaTek SoC
Signed-off-by: Joe.C <yingjoe.chen@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
To speed up decompression, the decompressor sets up a flat, cacheable
mapping of memory. However, when there is insufficient space to hold
the page tables for this mapping, we don't bother to enable the caches
and subsequently skip all the cache maintenance hooks.
Skipping the cache maintenance before jumping to the relocated code
allows the processor to predict the branch and populate the I-cache
with stale data before the relocation loop has completed (since a
bootloader may have SCTLR.I set, which permits normal, cacheable
instruction fetches regardless of SCTLR.M).
This patch moves the cache maintenance check into the maintenance
routines themselves, allowing the v6/v7 versions to invalidate the
I-cache regardless of the MMU state.
Cc: <stable@vger.kernel.org>
Reported-by: Marc Carino <marc.ceeeee@gmail.com>
Tested-by: Julien Grall <julien.grall@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The Mele M9 / A1000G quad has a blue status led, add support for this.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The Mele M9 / A1000G quad uses both usb-ports, one goes to an internal
usb wifi card, the other to a build-in usb-hub, so neither need their
OHCI companion controller to be enabled since the are always connected at
USB-2 speeds.
The controller which is attached to the wifi also does not need a vbus
regulator.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This avoids it getting briefly turned off between when the regulator getting
registered and the ahci driver turning it back on, thus avoiding the disk
going into emergency head park mode.
Reported-by: Bruno Prémont <bonbons@linux-vserver.org>
Tested-by: Bruno Prémont <bonbons@linux-vserver.org>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
vddio_sdmmc3 is a vdd_io, and thus should be under the vqmmc-supply
property, not vmmc-supply.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This property was wrong and broke eMMC since commit 52221610d ("mmc:
sdhci: Improve external VDD regulator support"). Align the eMMC
properties to those of other Tegra boards.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
There are general changes pending to make the /aliases/serial* entries
number the serial ports on the system. On Tegra, so far the ports have
been just numbered dynamically as they are configured so that makes them
change.
To avoid this, add specific aliases per board to keep the old numbers.
This allows us to change the numbering by default on future SoCs while
keeping the numbering on existing boards.
Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Thierry Reding <treding@nvidia.com>
These labels will be used to provide deterministic numbering of consoles
in a later patch.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
[treding@nvidia.com: drop aliases, reword commit message]
Signed-off-by: Thierry Reding <treding@nvidia.com>
This gets rid of the custom LED driver in the Integrator directory
altogether and switches us over to using the syscon LEDs for this.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The Integrator debug block is a simple set of registers, make
it a syscon and register the four LEDs on the Integrator/AP
baseboard as syscon LEDs.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Using the augmented reset driver for the Versatile family,
we can move the reset handling for the Integrator out of the
machine. We add a "syscon" attribute to the core module, and
access the syscon registers using this handle. We need to
select SYSCON, POWER, POWER_RESET and POWER_RESET_VERSATILE
in order for the restart functionality to always be
available on all systems (it should not be optional).
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Change the dtsi and dts file, soc initialization code to make
use of DT support clock.
So now in the code we do only need call of_clk_init to initialize
the clocks.
Signed-off-by: Chao Xie <chao.xie@marvell.com>
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Add items in arch/arm/boot/dt/Makefile to compile the dtb
for mach-mmp.
Change the dts and dtsi file to use #include instead of \include\
Signed-off-by: Chao Xie <chao.xie@marvell.com>
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Unit addresses, whilst written in hex, don't contain a 0x prefix.
Signed-off-by: Julien CHAUVEAU <julien.chauveau@neo-technologies.fr>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Cubietruck uses different pin for the USB OTG VBUS that
is why we override the one defined in sunxi-common-regulators.dtsi
Signed-off-by: Roman Byshko <rbyshko@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Until now the regulator nodes for powering USB VBUS
existed only for the two host controllers. Now the regulator
is added for USB OTG too.
Signed-off-by: Roman Byshko <rbyshko@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Evbp1 is a tablet evaluation board based on MT8135 SoC.
Signed-off-by: Joe.C <yingjoe.chen@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Moose is a tablet evalutation board based on MT8127 SoC.
Signed-off-by: Joe.C <yingjoe.chen@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
OMAP wdt driver supports only ti,omap3-wdt compatible. In DRA7 dt
wdt compatible property is defined as ti,omap4-wdt by mistake instead of
ti,omap3-wdt. Correcting the typo.
Fixes: 6e58b8f1da ("ARM: dts: DRA7: Add the dts files for dra7 SoC and dra7-evm board")
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
BeagleBoard-X15 is the next generation Open Source Hardware
BeagleBoard based on TI's AM5728 SoC featuring dual core 1.5GHz A15
processor. The platform features 2GB DDR3L (w/dual 32bit busses),
eSATA, 3 USB3.0 ports, integrated HDMI (1920x1080@60), separate LCD
port, video In port, 4GB eMMC, uSD, Analog audio in/out, dual 1G
Ethernet.
For more information, refer to:
BeagleBoard-X15 Wiki:
http://www.elinux.org/Beagleboard:BeagleBoard-X15
AM5728 is part of the Sitara product family whose additional details
will be available: http://www.ti.com/lsds/ti/arm/overview.page
Technical Reference Manual for AM5728 is public domain at:
http://www.ti.com/lit/spruhz6
Just add basic support for the moment, the following updates are needed:
i) Ethernet - depends on SoC dts fixes
ii) USB Client (USB2) - depends on GPIO extcon
ii) HDMI - additional driver fixes pending
iii) Audio - additional driver fixes pending
NOTE:
AM5728 Data Manual (SPRS915L - August 2014) section 4.1.1 states: "All
unused power supply balls must be supplied with the voltages specified
in the Section 5.2, Recommended Operating Conditions". This implies
that all unused voltage rails for AM5728 can never be switched off even
if the hardware blocks inside that voltage domain is unused. Switching
off these unused rails may result in stability issues on other domains
and increased leakage and power-on-hour impacts.
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
We can't suppose that the i2c2 pins are configured as I2C bus, these pins are
connected to expansion connectors.
Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Acked-by: Javier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add support for the new hardware revision of the IGEPv2. Basically, the new
revision F replaces the old Wifi module for a Wilink8 based module.
Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Acked-by: Javier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Use the omap3-igep0020-common.dtsi file and remove repeated parts leaving
the nodes that are not common between IGEPv2 hardware revisions.
Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Acked-by: Javier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add support for the new hardware revision of the IGEP COM MODULE. Basically,
the new revision G replaces the old Wifi module for a Wilink8 based module.
Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Acked-by: Javier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Use the omap3-igep0030-common.dtsi file and remove repeated parts leaving
the nodes that are not common between IGEP COM MODULE hardware revisions.
Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Acked-by: Javier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
New IGEP boards revisions will use another Wifi module, so this patch moves
the DT nodes outside the common omap3-igep.dtsi file to specific DT for every
board.
Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Acked-by: Javier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
We'll introduce new hardware revisions soon. This patch is only to
indicate which board revision supports this device tree file in order
to avoid confusions.
Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Acked-by: Javier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
We'll introduce new hardware revisions soon. This patch is only to
indicate which board revision supports this device tree file in order
to avoid confusions.
Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Acked-by: Javier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
At this moment all supported boards use same NAND chip, so has more sense
move the GPMC and NAND configuration to the omap3-igep.dtsi common place.
Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Acked-by: Javier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
UART2 is used to connect the processor with the bluetooth chip, these pins
are not common between IGEPv2 boards and IGEP COM MODULE boards. This patch
muxes the correct pins for every board and removes UART2 configuration from
common omap3-igep.dtsi file.
Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Acked-by: Javier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
On the LeMaker Banana Pi, probing the external ethernet PHY connected
to the SoC's internal GMAC module sometimes fails. The PHY power
supply is handled via a GPIO-controlled regulator, and the existing
regulator startup-delay of 50000us is too short to make sure that the
PHY is always fully powered up when it is queried by phylib. Tests
have shown that to provide a reliable PHY detection, the startup-delay
has to be increased to at least 60000us. To have a certain safety margin
and to cater for manufacturing variations between different boards,
the delay gets set to 100000us as discussed on the linux-arm-kernel
mailinglist.
Signed-off-by: Karsten Merker <merker@debian.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Marvell Berlin BG2 based Sony NSZ-GS7 has an unpopulated SATA plug
on its PCB solder side. As it is quite easy to populate and I have
done it, enable AHCI and SATA by default.
Acked-by: Antoine Ténart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Add DT nodes for the AHCI controller and SATA PHY found on Marvell
Berlin2 SoCs.
Acked-by: Antoine Ténart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
The apb2 clocks are actually the same as apb1 clocks on the other sunxi
platforms, hence compatible with "allwinner,sun4i-a10-apb1-clk".
Update the dtsi to use the new unified apb1 clk.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
With the new factors infrastructure in place, we can unify apb1 and
apb1_mux as a single clock now.
Signed-off-by: Emilio López <emilio@elopez.com.ar>
[wens@csie.org: Change apb1 node label to "apb1"; reword commit title]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
by adding labels to DWC3 nodes, it's far easier
for boards to reference them.
Signed-off-by: Felipe Balbi <balbi@ti.com>
[tony@atomide.com: updated for otg 4 move to dra74x.dtsi]
Signed-off-by: Tony Lindgren <tony@atomide.com>
Whenever Suspend PHY bit is set on AM437x devices,
USB will not work due to Set EP Configuration command
always failing.
This was only found after a recent commit 2164a47 (usb:
dwc3: set SUSPHY bit for all cores, which will be merged
for v3.19) added a missing *required* step to dwc3
initialization. Synopsys Databook requires that we enable
Suspend PHY bit after initialization but that, unfortunately,
breaks AM437x.
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Adding CPSW phy-id, CPSW and MDIO pinmux configuration for active and
sleep states and enable them in board evm dts file.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
DRA7 Data Manual (SPRS857L - August 2014) section 4.1.1 states: "All
unused power supply balls must be supplied with the voltages specified
in the Section 5.2, Recommended Operating Conditions".
This implies that all unused voltage rails for Vayu can never be
switched off even if the hardware blocks inside that voltage domain is
unused. Switching off these unused rails may result in stability issues
on other domains and increased leakage and power-on-hour impacts.
J6eco-evm dts file already considers this, however j6evm-dts file needs
to be fixed to consider this constraint of the SoC.
Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add MMC1 and 2 nodes. MMC1 is SDcard and MMC2 is eMMC.
NOTE on MMC1 card detect: Ideally, we should be using in-built SDCD
support, but we dont have it yet. So, use the fact that control module
of DRA7 is setup such that no matter what mode one configures it, GPIO
option is always hardwired in - use GPIO mode for SDcard detection.
[peter.ujfalusi@ti.com]
The power line feeding the SD card is also used by other devices on the EVM.
Use generic name instead of mmc2_3v3 so when other devices want to use the
same regulator it will look a bit better.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
With Commit adff5962fd ("Input: introduce palmas-pwrbutton"), we can
now support tps power button as a event source - This is SW7 (PB/WAKE)
on the J6-evm.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Even thought sys_nirq1 is hardwired on the SoC for the pin, it is
better to configure the pin to the required mux configuration.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The ldo4_reg regulator provides power to the USB1 and USB2
High Speed PHYs.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add USB data and pinctrl for USB.
Signed-off-by: George Cherian <george.cherian@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The 4th USB controller instance present only on the DRA74x family of
devices so move it there.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
DRA72-evm has a 256MB 16-bit wide NAND chip. Add
pinmux and NAND node.
The NAND chips 'Chip select' and 'Write protect' can be
controlled using DIP Switch SW5. To use NAND,
the switch must be configured like so:
SW5.1 (NAND_SELn) = ON (LOW)
SW5.9 (GPMC_WPN) = OFF (HIGH)
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Tested-by: Nishanth Menon <nm@ti.com>
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Adding CPSW phy-id, CPSW and MDIO pinmux configuration for active and
sleep states and enable them in board evm dts file.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add CPSW and MDIO related device tree data for DRA7XX and made as status
disabled. Phy-id, pinmux for active and sleep state needs to be added in
board dts files and enable the CPSW device.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Use omap specific pinctrl defines (OMAP3_CORE1_IOPAD) to configure
the padconf register offset.
Signed-off-by: Marek Belisko <marek@goldelico.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add DSS related pinmux and display data nodes required to support
DVI video out on SBC-T3530, SBC-T3730 and SBC-T3517.
Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Cc: devicetree@vger.kernel.org
Reviewed-by: Tony Lindgren <tony@atomide.com>
Tested-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
DCDC3 supplies voltage to DDR. Fix DCDC3 volatge to 1.5V which is the reset
value. Programming to a non-reset value while executing from DDR will result
in random hangs.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
DCDC3 supplies voltage to DDR. Fix DCDC3 volatge to 1.5V which is the reset
value. Programming to a non-reset value while executing from DDR will result
in random hangs.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
DCDC3 supplies voltage to DDR. Fix DCDC3 volatge to 1.5V which is the reset
value. Programming to a non-reset value while executing from DDR will result
in random hangs.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Cc: devicetree@vger.kernel.org
Reviewed-by: Tony Lindgren <tony@atomide.com>
Tested-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The '#mbox-cells' property is added to all the OMAP mailbox
nodes. This property is mandatory with the new mailbox framework.
Cc: "Benoît Cousson" <bcousson@baylibre.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add the interrupts property to all the 13 mailbox nodes in
DRA7xx. The interrupts property information added is inline
with the expected values with the DRA7xx crossbar driver,
and is common to both DRA74x and DRA72x SoCs.
Do note that the mailbox 1 is only capable of generating out
3 interrupts, while all the remaining mailboxes have 4
interrupts each.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Instantiate the Audio DMAC peri peri controllers
in the r8a7791 device tree.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Instantiate the Audio DMAC peri peri controllers
in the r8a7790 device tree.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Instantiate the two Audio DMA controllers in the r8a7791 device tree.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
[geert: corrected spelling of audmac1]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Instantiate the two Audio DMA controllers in the r8a7790 device tree.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
[geert: corrected spelling of audmac1]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
According to the datasheet, the operating clock for IIC0 is the HPP
(RT Peri) clock, not the SUB (Peri) clock. Both clocks run at the same
speed (50 Mhz).
This is consistent with IIC0 being located in the A4R PM domain, and
IIC1 in the A3SP PM domain.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
- Rearrange the DTS files to make a pure SoC-specific file and
a pure board file for S8815.
- Add the device tree for the NDK15 board.
- Update the defconfig and configure in the STMPE expander by
default on the Nomadik.
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Merge tag 'nomadik-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into next/dt
Merge "Nomadik updates for the v3.19 series" from Linus Walleij:
Nomadik changes for the v3.19 development series:
- Rearrange the DTS files to make a pure SoC-specific file and
a pure board file for S8815.
- Add the device tree for the NDK15 board.
- Update the defconfig and configure in the STMPE expander by
default on the Nomadik.
* tag 'nomadik-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: nomadik: configure in STMPE support
ARM: update Nomadik config
ARM: nomadik: device tree for NHK15 board
ARM: nomadik: push ethernet down to board
ARM: nomadik: set up MCDATDIR2
ARM: nomadik: move GPIO I2C to S8815 board file
ARM: nomadik: disable chrystals in top level board files
ARM: nomadik: move MMC/SD card detect GPIO to board DTS
Signed-off-by: Olof Johansson <olof@lixom.net>
The Parallella board comes with a U-Boot bootloader that loads one of
two predefined FPGA bitstreams before booting the kernel. Both define an
AXI interface to the on-board Epiphany processor.
Enable clocks FCLK0..FCLK3 for the Programmable Logic by default.
Otherwise accessing, e.g., the ESYSRESET register freezes the board,
as seen with the Epiphany SDK tools e-reset and e-hw-rev, using /dev/mem.
Cc: <stable@vger.kernel.org> # 3.17.x
Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
- CAN device nodes for at91sam9263 and at91sam9x5
- at91sam9x5 DMA definitions for usart
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Merge tag 'at91-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into next/dt
Merge "at91: dt for 3.19 #1" from Nicolas Ferre:
"Very little DT update for AT91. More will come but I want to send this first
batch soon so it doesn't get in the way of larger modifications."
First DT batch for 3.19:
- CAN device nodes for at91sam9263 and at91sam9x5
- at91sam9x5 DMA definitions for usart
* tag 'at91-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91:
ARM: at91/dt: at91sam9263: Add CAN device nodes
ARM: at91/dt: at91sam9x5: Add CAN device nodes
ARM: at91/dt/trivial: at91sam9x5_can.dtsi: comment and whitespace fixes
ARM: at91: at91sam9x5 dt: add usart dma definitions to dt
Signed-off-by: Olof Johansson <olof@lixom.net>
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Merge tag 'ux500-core-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/soc
Merge "Ux500 core changes for v3.19" from Linus Walleij:
"please pull in these Ux500 core changes for this kernel development
cycle: mainly a generic power domain implementation from Ulf Hansson
that needs to get queued up in -next and tested."
Generic power domains for the Ux500
* tag 'ux500-core-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: ux500: Add i2c devices to the VAPE PM domain
ARM: ux500: Add spi and ssp devices to the VAPE PM domain
ARM: ux500: Add sdi devices to the VAPE PM domain
ARM: ux500: Add DT node for ux500 PM domains
ARM: ux500: Enable Kconfig for the generic PM domain
ARM: ux500: Initial support for PM domains
dt: bindings: ux500: Add header for PM domains specifiers
dt: bindings: ux500: Add documentation for PM domains
ARM: u300: Convert pr_warning to pr_warn
- AHCI and SATA PHY nodes for BG2Q
- Reset controller binding docs
- Ethernet nodes for BG2, BG2CD
- SDHCI nodes for BG2, BG2CD
- Corresponding board changes to enable AHCI, Ethernet, SDHCI
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Merge tag 'berlin-dt-3.19-1' of git://git.infradead.org/users/hesselba/linux-berlin into next/dt
Merge "ARM: berlin: DT changes for v3.19 (round 1)" from Sebastian Hesselbarth:
"This is Berlin DT changes for v3.19 and contains those patches that missed
the v3.18 merge window plus corresponding patches to catch-up with Antoine's
BG2Q improvements for BG2 and BG2CD. We now have working SDHCI and Ethernet
on all SoCs (well, BG2CD has HDMI HEC only), SATA PHY support for BG2 is still
pending."
Berlin DT changes for v3.19 (round 1)
- AHCI and SATA PHY nodes for BG2Q
- Reset controller binding docs
- Ethernet nodes for BG2, BG2CD
- SDHCI nodes for BG2, BG2CD
- Corresponding board changes to enable AHCI, Ethernet, SDHCI
* tag 'berlin-dt-3.19-1' of git://git.infradead.org/users/hesselba/linux-berlin:
ARM: dts: berlin: Enable eMMC on Sony NSZ-GS7
ARM: dts: berlin: Enable WiFi on Google Chromecast
ARM: dts: berlin: Add SDHCI controller nodes to BG2/BG2CD
ARM: dts: berlin: Enable ethernet on Sony NSZ-GS7
ARM: dts: berlin: Add phy-connection-type to BG2Q Ethernet
ARM: dts: berlin: Add BG2CD ethernet DT nodes
ARM: dts: berlin: Add BG2 ethernet DT nodes
ARM: dts: berlin: Add GPIO leds to Google Chromecast
ARM: dts: berlin: enable timer 1 for sched_clock
ARM: dts: berlin: add a required reset property in the chip controller node
Documentation: bindings: add reset bindings docs for Marvell Berlin SoCs
ARM: dts: berlin: enable the eSATA interface on the BG2Q DMP
ARM: dts: berlin: add the AHCI node for the BG2Q
Signed-off-by: Olof Johansson <olof@lixom.net>
Merge "Broadcom Cygnus SoC Device Tree changes" from Florian Fianelli:
This patchset contains initial support for Broadcom's Cygnus SoC based on our
iProc architecture. Initial support is minimal and includes just the mach
platform code, clock driver, and a basic device tree configuration. Peripheral
drivers will be submitted soon, as will device tree configurations for other
Cygnus board variants.
These are the Device Tree changes
* tag 'arm-soc/for-3.18/cygnus-dts-v9' of http://github.com/brcm/linux:
ARM: dts: Enable Broadcom Cygnus SoC
dt-bindings: Document Broadcom Cygnus SoC and clocks
Signed-off-by: Olof Johansson <olof@lixom.net>
The dma controller requires that the ahb1 bus clock be driven by pll6
for peripheral access to work. Previously this was done in the dma
controller driver, but was since removed as part of a series to unify
the ahb1_mux and ahb1 clock drivers, in
14e0e28 dmaengine: sun6i: Remove obsolete clk muxing code
Unfortunately the rest of that series did not make it, leaving us with
broken dma on sun6i.
This patch reparents ahb1_mux to pll6 using the DT assigned-clocks
properties in the dma controller node.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Support for 16 PTMs, funnel, TPIU and replicator connected
to the ETB are included.
Signed-off-by: Xia Kaixu <kaixu.xia@linaro.org>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Support for the 2 PTMs, 3 ETMs, funnel, TPIU and replicator
connected to the ETB are included. Proper handling of the
ITM and the replicator linked to it along with the CTIs
and SWO are not included.
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Currently supporting ETM and ETB. Support for TPIU
and SDTI are yet to be added.
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
The current GPL only licensing on the DTSI makes it very impractical for other
software components licensed under another license.
In order to make it easier for them to reuse our device trees, relicense our
device trees under a GPL/X11 dual-license.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Olof Johansson <olof@lixom.net>
Acked-by: Roman Byshko <rbyshko@gmail.com>
The current GPL only licensing on the DTSI makes it very impractical for other
software components licensed under another license.
In order to make it easier for them to reuse our device trees, relicense our
device trees under a GPL/X11 dual-license.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Carlo Caione <carlo@caione.org>
Acked-by: Emilio López <emilio@elopez.com.ar>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Olliver Schinagl <oliver@schinagl.nl>
Acked-by: Olof Johansson <olof@lixom.net>
Acked-by: Roman Byshko <rbyshko@gmail.com>
Acked-by: Stefan Roese <sr@denx.de>
The 370 rd has a 7 port, mv88E6182 switch, connected to eth1. Add a
fixed-link subnode to the ethernet device tree node, to force
gigabit/full duplex. Add a dsa node, with describing the four used
ports. This requires adding an alias to the mdio node, so it can be
referenced as a phandle.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lkml.kernel.org/r/1415214121-29286-3-git-send-email-andrew@lunn.ch
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This commit modifies the Armada 370 and Armada 370 DB Device Tree
descriptions to use the simple-card DT binding to describe the audio
complex of the Armada 370 DB instead of a custom audio machine driver.
To do so, it:
- Adds the sound-dai-cells properties to the CS42L51 node, the audio
controller node and the SPDIF in/out nodes.
- Completely changes the description of the sound complex to use the
"simple-audio-card" DT binding instead of the
"marvell,a370db-audio" DT binding.
- Fixes the indentation to properly use tabs instead of spaces.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lkml.kernel.org/r/1414512524-24466-6-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Back when audio was enabled, the muxing of some MPP pins was causing
problems. However, since commit fea038ed55 ("ARM: mvebu: Add proper
pin muxing on the Armada 370 DB board"), those problematic MPP pins
have been assigned a proper muxing for the Ethernet interfaces. This
proper muxing is now conflicting with the hog pins muxing that had
been added as part of 249f382250 ("ARM: mvebu: add audio support to
Armada 370 DB").
Therefore, this commit simply removes the hog pins muxing, which
solves a warning a boot time due to the conflicting muxing
requirements.
Fixes: fea038ed55 ("ARM: mvebu: Add proper pin muxing on the Armada 370 DB board")
Cc: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lkml.kernel.org/r/1414512524-24466-5-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Add SDHCI node for supporting the micro SD card. On Trats2 board the
SDHCI does not use sd2_cd pins (gpk2-2) for card detect but gpx3-4
instead.
Power is supplied from LDO21 regulator which in off state is controlled
by external GPIO pin.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch adds new exynos4415.dtsi to support Exynos4415 SoC
based on Cortex-A9 quad cores and includes following dt nodes:
- GIC interrupt controller (GIC-400)
- Pinctrl to control three GPIO parts
- CMU (Clock Management Unit) for CMU/CMU_DMC/AUDSS
- CPU information (Cortex-A9 quad cores)
- UART to support serial port
- MCT (Multi Core Timer)
- ADC (Analog Digital Converter)
- RTC (Real Time Clock)
- I2C/SPI busses
- Power domains (CAM, TV, MFC, G3D, LCD0, ISP0/1)
- PMU (Performance Monitoring Unit)
- MSHC (Mobile Storage Host Controller)
- EHCI (Enhanced Host Controller Interface)
- OHIC (Open Host Controller Interface)
- USB 2.0 device with hsotg
- PWM (Pluse Width Modulation) Timer
- AMBA bus for PDMA0/1
- SYSRAM node for memory mapping
- SYSREG node for memory mapping
- PMU (Power Management Unit) node for memory mapping
Cc: Ben Dooks <ben-linux@fluff.org>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Olof Johansson <olof@lixom.net>
Cc: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
[m.szyprowski: Add OHCI node and correct EHCI node]
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
[yj44.cho: Add mipi-phy node]
Signed-off-by: YoungJun Cho <yj44.cho@samsung.com>
[jaewon02: Add EHCI and SPI_2 node]
Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com>
[ideal.song: Add I2S0 node for audio interface]
Signed-off-by: Inha Song <ideal.song@samsung.com>
[tomasz.figa: Add L2 cache node]
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch adds sleep mode of regulator for exynos3250-rinato board
to optimize power-consumption in sleep state.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch add sleep mode pin configuration using pinctrl subsystem
to reduce leakage power-consumption of gpio pin in sleep state.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch adds support for device tree source for Samsung Rinato
board (Gear 2) based on Exynos3250 SoC.
This dts file support following features:
- eMMC
- Main PMIC (Samsung S2MPS14)
- Interface PMIC (Maxim MAX77836, MUIC, fuel-gauge, charger)
- RTC of Exynos3250
- ADC of Exynos3250 with NTC thermistor
- I2S of Exynos3250
- TMU of Exynos3250
- MFC of Exynos3250
- Secure firmware for Exynos3250 secondary cpu boot
- Serial ports of Exynos3250
- gpio-key for power key
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The 5th NAND partition should be named "NAND.u-boot-spl-os"
instead of "NAND.u-boot-spl". This is to be consistent with other
TI boards as well as u-boot.
Fixes: 91994facdd ("ARM: dts: am335x-evm: NAND: update MTD partition table")
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add device nodes for the VOP iommus.
Device nodes for other iommus will be added in later patches.
The iommu nodes use the #iommu-cells property as described in:
Documentation/devicetree/bindings/iommu/iommu.txt
Signed-off-by: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: Simon Xue <xxm@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Looks like we're still missing the keypad map for EVM.
Let's add it since we have the binding now available
for the twl4030_keypad as otherwise we get the following
errors during the boot:
twl4030_keypad keypad.31: OF: linux,keymap property not defined
in /ocp/i2c@48070000/twl@48/keypad
twl4030_keypad keypad.31: Failed to build keymap
twl4030_keypad: probe of keypad.31 failed with error -2
Signed-off-by: Tony Lindgren <tony@atomide.com>
Looks like we're still missing the keypad map for LDP.
Let's add it since we have the binding now available
for the twl4030_keypad as otherwise we get the following
errors during the boot:
twl4030_keypad keypad.31: OF: linux,keymap property not defined
in /ocp/i2c@48070000/twl@48/keypad
twl4030_keypad keypad.31: Failed to build keymap
twl4030_keypad: probe of keypad.31 failed with error -2
Reported-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Fix the following warning during the boot:
mtd: partition "Filesystem" extends beyond the end of device
"omap2-nand.0" -- size truncated to 0x6000000
Looks like I got the last partition size wrong while setting
up the .dts file. Note that this does not affect the partition
as the size has been getting truncated to the right size.
Signed-off-by: Tony Lindgren <tony@atomide.com>
New drivers / supported parts
* rockchip - rk3066-tsadc variant
* si7020 humidity and temperature sensor
* mcp320x - add mcp3001, mcp3002, mcp3004, mcp3008, mcp3201, mcp3202
* bmp280 pressure and temperature sensor
* Qualcomm SPMI PMIC current ADC driver
* Exynos_adc - support exynos7
New features
* vf610-adc - add temperature sensor support
* Documentation of current attributes, scaled pressure, offset and
scaled humidity, RGBC intensity gain factor and scale applied to
differential voltage channels.
* Bring iio_event_monitor up to date with newer modifiers.
* Add of_xlate function to allow for complex channel mappings from the
device tree.
* Add -g parameter to generic_buffer example to allow for devices with
directly fed (no trigger) buffers.
* Move exynos driver over to syscon for PMU register access.
Cleanups, fixes for new drivers
* lis3l02dq drop an unneeded else.
* st sensors - renam st_sensors to st_sensor_settings (for clarity)
* st sensors - drop an unused parameter from all the probe utility
functions.
* vf610 better error handling and tidy up.
* si7020 - cleanups following merge
* as3935 - drop some unnecessary semicolons.
* bmp280 - fix the pressure calculation.
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Merge tag 'iio-for-3.19a' of git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into staging-next
Jonathan writes:
First round of new drivers, features and cleanups for IIO in the 3.19 cycle.
New drivers / supported parts
* rockchip - rk3066-tsadc variant
* si7020 humidity and temperature sensor
* mcp320x - add mcp3001, mcp3002, mcp3004, mcp3008, mcp3201, mcp3202
* bmp280 pressure and temperature sensor
* Qualcomm SPMI PMIC current ADC driver
* Exynos_adc - support exynos7
New features
* vf610-adc - add temperature sensor support
* Documentation of current attributes, scaled pressure, offset and
scaled humidity, RGBC intensity gain factor and scale applied to
differential voltage channels.
* Bring iio_event_monitor up to date with newer modifiers.
* Add of_xlate function to allow for complex channel mappings from the
device tree.
* Add -g parameter to generic_buffer example to allow for devices with
directly fed (no trigger) buffers.
* Move exynos driver over to syscon for PMU register access.
Cleanups, fixes for new drivers
* lis3l02dq drop an unneeded else.
* st sensors - renam st_sensors to st_sensor_settings (for clarity)
* st sensors - drop an unused parameter from all the probe utility
functions.
* vf610 better error handling and tidy up.
* si7020 - cleanups following merge
* as3935 - drop some unnecessary semicolons.
* bmp280 - fix the pressure calculation.
Driver has been there since a while back, but the dts never seems to
have been updated with the node (nor pinctrl). Do so now.
Cc: Matt Porter <mporter@linaro.org>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Olof Johansson <olof@lixom.net>
When booting omap3 in device tree mode, we're currently getting
the following errors:
omap_l3_smx omap_l3_smx.0: couldn't request debug irq
omap_l3_smx: probe of omap_l3_smx.0 failed with error -22
This is because we don't have handling in the driver for the
compatible property and instead assume platform data being
passed.
Note that this binding is already documented, and implemented
for the related omap_l3_noc driver for omap4 and later. Looks
like the binding somehow never got never implemented for this
omap_l3_smx driver though.
Let's also remove __exit_p to allow binding and unbinding
of the driver while at it.
Reported-by: Pavel Machek <pavel@ucw.cz>
Reported-by: Russell King <rmk+kernel@arm.linux.org.uk>
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Instead of using the ADC_PHY register base address, use sysreg phandle
in ADC node to control ADC_PHY configuration register.
This patch adds syscon node for Exynos3250, Exynos4x12, Exynos5250,
and Exynos5420, Exynos5800.
Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
To: linux-samsung-soc@vger.kernel.org
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
The current GPL only licensing on the DTSI makes it very impractical for other
software components licensed under another license.
In order to make it easier for them to reuse our device trees, relicense our
device trees under a GPL/X11 dual-license.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Zoltan HERPAI <wigyori@uid0.hu>
The current GPL only licensing on the DTSI makes it very impractical for other
software components licensed under another license.
In order to make it easier for them to reuse our device trees, relicense our
device trees under a GPL/X11 dual-license.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Carlo Caione <carlo@caione.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Zoltan HERPAI <wigyori@uid0.hu>
Alt is booted from DT, so chosen/stdout-path is
always used, and we can drop the "console=" parameter from chosen/bootargs.
This change has a side-effect of changing the console speed from 38400
to 115200. This is intentional as 115200 is consistently used on
all other shmobile boards.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Ports are named scifb0-3, not scifb2-5.
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
- cpu operating points and supplies
- dma support for spi controllers
- i2s on rk3066 and rk3188
- default core clock settings for rk3288
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Merge tag 'v3.19-rockchip-dts1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
Merge "first bunch on Rockchip dt changes" from Heiko Stübner:
First hunk of rockchip devicetree patches, containing:
- cpu operating points and supplies
- dma support for spi controllers
- i2s on rk3066 and rk3188
- default core clock settings for rk3288
* tag 'v3.19-rockchip-dts1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: Add SPI DMA into rk3288.dtsi
ARM: dts: rockchip: enable init rate for clock
ARM: dts: rockchip: add I2S controllers for rk3066 and rk3188
ARM: dts: rockchip: enable DMA on SPI for rk3066 and rk3188
ARM: dts: rockchip: add cpu supplies to boards
ARM: dts: rockchip: add operating points and armclk references
Signed-off-by: Olof Johansson <olof@lixom.net>
K2E SoC has a second PCI port based on Synopsis Designware PCIe h/w.
Add DT bindings to support PCI controller for port 1 for this SoC.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
Add common DT bindings to support PCI controller driver for port 0 on all
of the K2 SoCs that has Synopsis Designware based pcie h/w.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
Keystone K2L-EVM has two 1G Marvell 88E1514 Ethernet PHYs
installed, which are compatible with 88E1510.
Hence, add corresponding child nodes for 1G MDIO bus.
For more information see:
https://www.einfochips.com/index.php/partnerships/texas-instruments/k2l-evm.html
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
Keystone K2E-EVM has two 1G Marvell 88E1514 Ethernet PHYs
installed, which are compatible with 88E1510.
Hence, add corresponding child nodes for 1G MDIO bus.
For more information see:
https://www.einfochips.com/index.php/partnerships/texas-instruments/k2e-evm.html
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
The current GPL only licensing on the DTSI makes it very impractical for other
software components licensed under another license.
In order to make it easier for them to reuse our device trees, relicense our
device trees under a GPL/X11 dual-license.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: FUKAUMI Naoki <naobsd@gmail.com>
- DTS file for the ARM RealView PB1176
- Updates on top of the same DTS file
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Merge tag 'arm-realview-dt-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into next/dt
Merge "RealView DeviceTree support for v3.19" from Linus Walleij:
- Device Tree implementation for the ARM RealView boards
- DTS file for the ARM RealView PB1176
- Updates on top of the same DTS file
* tag 'arm-realview-dt-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
ARM: realview: add MMCI to the PB1176 DTS
ARM: realview: add KMIs to the PB1176 DTS
ARM: realview: add FPGA UART4 to PB1176 DTS
ARM: realview: add PL022 SSP/SPI block to PB1176 DTS
ARM: realview: add RTC clocks to device tree
ARM: realview: add charlcd to PB1176 device tree
ARM: realview: add PL061 GPIO to the PB1176 DTS
ARM: realview: move DT GIC to FPGA node
ARM: realview: add device tree and bindings for PB1176
ARM: realview: basic device tree implementation
Signed-off-by: Olof Johansson <olof@lixom.net>
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Merge tag 'dts-subdirs-for-arm-soc-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/rric/linux into next/cleanup
Pull "dts, kbuild: Implement support for dtb vendor subdirs" from
Robert Richter:
dts, kbuild: Implement support for dtb vendor subdirs
For arm64 we want to put dts files into vendor's subdirectories from
the beginning. This patch set implements this. As this is a generic
kbuild implementation, vendor subdirs will be also available for
arch/arm and other architectures. The subdirectory tree is also
reflected in the install path.
A new makefile variable dts-dirs is introduced to point to dts
subdirs. This variable is used by kbuild for building and installation
of dtb files.
A dts Makefile looks now as follows:
----
dtb-$(CONFIG_...) += some_file_1.dtb
dtb-$(CONFIG_...) += some_file_2.dtb
dts-dirs += dir_vendor_a
dts-dirs += dir_vendor_b
always := $(dtb-y)
subdir-y := $(dts-dirs)
clean-files := *.dtb
----
This patches also introduces the dtbs_install make target for
arm64. Install rules are moved to Makefile.dtbinst using the same
style and calling convention like for modinst and fwinst.
* tag 'dts-subdirs-for-arm-soc-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/rric/linux:
dts, arm: Remove $(MACHINE) variable from dtbs make recipes
dts, arm64: Move dts files to vendor subdirs
dts, kbuild: Implement support for dtb vendor subdirs
dts, arm/arm64: Remove dtbs build rules in sub-makes
dts, kbuild: Factor out dtbs install rules to Makefile.dtbinst
dts, arm64: Add dtbs_install make target
Signed-off-by: Olof Johansson <olof@lixom.net>
Looks like we have some GPMC NAND timings missing device
width. This fixes "gpmc_cs_program_settings: invalid width 0!"
errors during boot.
Signed-off-by: Tony Lindgren <tony@atomide.com>
With the GPMC warnings now enabled, I noticed the LAN9220 timings
can overflow the GPMC registers with 200MHz L3 speed. Earlier we
were just skipping the bad timings and would continue with the
bootloader timings. Now we no longer allow to continue with bad
timings as we have the timings in the .dts files.
We could start using the GPMC clock divider, but let's instead
use the u-boot timings that are known to be working and a bit
faster. These are basically the u-boot NET_GPMC_CONFIG[1-6]
defines deciphered. Except that we don't set gpmc,burst-length
as that's only partially configured and does not seem to work
if fully enabled.
[tony@atomide.com: updated to remove gpmc,burst-length]
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add the missing CAN devices node including their pin muxing. The required
clock node already exists.
Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Add the missing CAN devices node including their pin muxing to the shared
.dtsi for at91sam9x5. Actually include this file.
Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
This patch adds usart dma definitions to both dtsi for sam9x5 chips. Without
usage of dma it's unable to catch all bytes on usart receiver.
Signed-off-by: Jiri Prchal <jiri.prchal@aksignal.cz>
Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
There is only one 74hc595 connected to GPIO but two were given
in the registers-number property. Fix it up.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-By: Benoit Masson <yahoo@perenite.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
There is an I2C eeprom connected on Lenovo ix4-300d, add the
corresponding node.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-By: Benoit Masson <yahoo@perenite.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Lenovo ix4-300d has two ethernet PHYs connected via RGMII. Add the
corresponding pinctrl settings.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-By: Benoit Masson <yahoo@perenite.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
There is a GMII setting for GE0, add it to the common pinctrl node.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-By: Benoit Masson <yahoo@perenite.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Pinctrl settings for GE0 and GE1 are not only usable on RD-AXPWiFiAP.
Moreover, naming the RGMII settings pmx-ge{0,1} is not precise enough
as there is also a GMII setting for GE0.
Move the pinctrl sub-nodes to the common pinctrl node and rename them
to pmx-ge{0,1}-rgmii.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-By: Benoit Masson <yahoo@perenite.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Armada XP pinctrl node gained an alias, make use of it.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-By: Benoit Masson <yahoo@perenite.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
In other MVEBU SoCs, the pin controller node is called pin-ctrl with
its base address added. Also, we have a node alias to access the pinctrl
node easily. Fix this for Armada XP pinctrl nodes to be consistent with
other SoCs.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-By: Benoit Masson <yahoo@perenite.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
All current Armada XP SoCs have their pin controller at 0x18000/0x38.
Move the common properties of pinctrl nodes to armada-xp.dtsi to allow
to share pinctrl settings later.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-By: Benoit Masson <yahoo@perenite.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This patch add reset for CPU nodes to use the reset controller.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This patch add intmem node des which is needed by platsmp.c
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This patch add pmu reference and enable-method for smp
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add aliases for UARTs on rk3066 and rk3188 in order to fix the numbering scheme.
This will keep the debug console on ttyS2 when UART 1 is disabled, for example.
Signed-off-by: Julien CHAUVEAU <julien.chauveau@neo-technologies.fr>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This patch adds initial support for the Marsboard RK3066. It enables
EMAC Rockchip which is the ethernet support on the board and registers
it as a supported rockchip platform.
Signed-off-by: Romain Perier <romain.perier@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This patch adds the right pins topology for the MAC and MDIO
found in RK3066 SoCs. Boards based on this SoC have an
initial support for the emac-rockchip dt-binding.
Signed-off-by: Romain Perier <romain.perier@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The DIR665 has an 8 port Ethernet Switch, a Marvell mv88e6171. Add a
DSA node in DT, to instantiate DSA support for the 4 back panel ports,
the Internet port, and the port to the CPU which is connected to eth0.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lkml.kernel.org/r/1414793613-11798-3-git-send-email-andrew@lunn.ch
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Add a device tree description of the DLINK DIR665 wireless access
point. The support for the 88E6171 switch will be added in a later
patch.
Signed-off-by: Claudio Leite <leitec@staticky.com>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lkml.kernel.org/r/1414793613-11798-2-git-send-email-andrew@lunn.ch
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
NETGEAR ReadyNAS 2120 supports its four main SATA disks via 2
Marvell 88SE9170 SATA controllers connected on the PCIe bus
of the the SoC. The two eSATA ports available at the rear of
the device are handled by the native SATA controller of the
Armada XP SoC powering the NAS. This patch enables the SoC
SATA controller in the .dts file to make those two rear ports
available.
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lkml.kernel.org/r/f3876c7a9ef11eb758b9df18c671ee740b8be614.1414250947.git.arno@natisbad.org
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Now that the timer and watchdog drivers support the Armada 375 usage of
the reference clock, we can enable it in the devicetree.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1414248522-16055-5-git-send-email-ezequiel.garcia@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
On NETGEAR ReadyNAS 102, the two disks are connected to the external
Marvell 88SE9170 SATA Controller connected to the PCIe bus. The rear
eSATA port is connected to the native Armada 370 SATA controller.
This patch updates the comments in .dts file wrt SATA interfaces and
reduces the number of ports for native Armada 370 interface from 2
to 1.
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Link: https://lkml.kernel.org/r/4af680f9a68281755e31df2491f0590046138230.1414185031.git.arno@natisbad.org
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
When writing initial .dts file for NETGEAR ReadyNAS 102, I put the wrong color
for backup and SATA leds (green instead of blue for all three).
Reported-by: Johan Kristell <johan.kristell@gmail.com>
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Link: https://lkml.kernel.org/r/4eb4049d934a3a8fe9f7235dafb6842422792566.1414185031.git.arno@natisbad.org
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The L2 cache controller on the Armada 370 and Armada XP SoCs is a
unified cache. Moreover, the Aurora cache controller is compatible
with the L2x0 cache controller: the "cache-unified" property is
required by its binding.
This patch fixes the Aurora L2 cache node for the Armada 370 and
Armada XP SoCs by adding this property.
Reported-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Link: https://lkml.kernel.org/r/1412588276-4514-1-git-send-email-gregory.clement@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Pull networking fixes from David Miller:
"A bit has accumulated, but it's been a week or so since my last batch
of post-merge-window fixes, so...
1) Missing module license in netfilter reject module, from Pablo.
Lots of people ran into this.
2) Off by one in mac80211 baserate calculation, from Karl Beldan.
3) Fix incorrect return value from ax88179_178a driver's set_mac_addr
op, which broke use of it with bonding. From Ian Morgan.
4) Checking of skb_gso_segment()'s return value was not all
encompassing, it can return an SKB pointer, a pointer error, or
NULL. Fix from Florian Westphal.
This is crummy, and longer term will be fixed to just return error
pointers or a real SKB.
6) Encapsulation offloads not being handled by
skb_gso_transport_seglen(). From Florian Westphal.
7) Fix deadlock in TIPC stack, from Ying Xue.
8) Fix performance regression from using rhashtable for netlink
sockets. The problem was the synchronize_net() invoked for every
socket destroy. From Thomas Graf.
9) Fix bug in eBPF verifier, and remove the strong dependency of BPF
on NET. From Alexei Starovoitov.
10) In qdisc_create(), use the correct interface to allocate
->cpu_bstats, otherwise the u64_stats_sync member isn't
initialized properly. From Sabrina Dubroca.
11) Off by one in ip_set_nfnl_get_byindex(), from Dan Carpenter.
12) nf_tables_newchain() was erroneously expecting error pointers from
netdev_alloc_pcpu_stats(). It only returna a valid pointer or
NULL. From Sabrina Dubroca.
13) Fix use-after-free in _decode_session6(), from Li RongQing.
14) When we set the TX flow hash on a socket, we mistakenly do so
before we've nailed down the final source port. Move the setting
deeper to fix this. From Sathya Perla.
15) NAPI budget accounting in amd-xgbe driver was counting descriptors
instead of full packets, fix from Thomas Lendacky.
16) Fix total_data_buflen calculation in hyperv driver, from Haiyang
Zhang.
17) Fix bcma driver build with OF_ADDRESS disabled, from Hauke
Mehrtens.
18) Fix mis-use of per-cpu memory in TCP md5 code. The problem is
that something that ends up being vmalloc memory can't be passed
to the crypto hash routines via scatter-gather lists. From Eric
Dumazet.
19) Fix regression in promiscuous mode enabling in cdc-ether, from
Olivier Blin.
20) Bucket eviction and frag entry killing can race with eachother,
causing an unlink of the object from the wrong list. Fix from
Nikolay Aleksandrov.
21) Missing initialization of spinlock in cxgb4 driver, from Anish
Bhatt.
22) Do not cache ipv4 routing failures, otherwise if the sysctl for
forwarding is subsequently enabled this won't be seen. From
Nicolas Cavallari"
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net: (131 commits)
drivers: net: cpsw: Support ALLMULTI and fix IFF_PROMISC in switch mode
drivers: net: cpsw: Fix broken loop condition in switch mode
net: ethtool: Return -EOPNOTSUPP if user space tries to read EEPROM with lengh 0
stmmac: pci: set default of the filter bins
net: smc91x: Fix gpios for device tree based booting
mpls: Allow mpls_gso to be built as module
mpls: Fix mpls_gso handler.
r8152: stop submitting intr for -EPROTO
netfilter: nft_reject_bridge: restrict reject to prerouting and input
netfilter: nft_reject_bridge: don't use IP stack to reject traffic
netfilter: nf_reject_ipv6: split nf_send_reset6() in smaller functions
netfilter: nf_reject_ipv4: split nf_send_reset() in smaller functions
netfilter: nf_tables_bridge: update hook_mask to allow {pre,post}routing
drivers/net: macvtap and tun depend on INET
drivers/net, ipv6: Select IPv6 fragment idents for virtio UFO packets
drivers/net: Disable UFO through virtio
net: skb_fclone_busy() needs to detect orphaned skb
gre: Use inner mac length when computing tunnel length
mlx4: Avoid leaking steering rules on flow creation error flow
net/mlx4_en: Don't attempt to TX offload the outer UDP checksum for VXLAN
...
The SoC file defines the location and type of the ethernet
adapter, this should be in the per-board file, as it is by no
means necessary to have an ethernet adapter connected to this
memory space.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This extra data line for high-speed MMC transfers was unrouted,
set it up properly in the dtsi file.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The idea to use two GPIO pins for bit-banged I2C is an S8815
pecularity, so move this over to the board-specific file and
out of the SoC core DTSI file.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This pushes the setting of the card detect GPIO pin down into
the top-level file for the board, since it is not a property of
the ASIC (which this DTSI is about) but a property of the board
design.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
With legacy booting, the platform init code was taking care of
the configuring of GPIOs. With device tree based booting, things
may or may not work depending what bootloader has configured or
if the legacy platform code gets called.
Let's add support for the pwrdn and reset GPIOs to the smc91x
driver to fix the issues of smc91x not working properly when
booted in device tree mode.
And let's change n900 to use these settings as some versions
of the bootloader do not configure things properly causing
errors.
Reported-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
ARM: DT: STi: STiH416: Add DT node for ST's SATA device
Cc: devicetree@vger.kernel.org
Acked-by: Alexandre Torgue <alexandre.torgue@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
The MiPHY365x is a Generic PHY which can serve various SATA or PCIe
devices. It has 2 ports which it can use for either; both SATA, both
PCIe or one of each in any configuration.
Acked-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Alexandre Torgue <alexandre.torgue@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
We supply two of these. The first is controlled by the System Configuration
registers and the second one provided is a more traditional 'memory mapped'
variant. Each are handled by they own sub-driver.
Signed-off-by: Ajit Pal Singh <ajitpal.singh@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
The second controller is only present on the stih416 SoC. Also
mark this as non-removeable as its eMMC.
Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Maxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Because the first sdhci controller is present on both stih415 and
stih416 SoC which can both populate the b2020 board, it can be
enabled in the generic DT file.
Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Maxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
This patch adds device tree config for the sdhci controller
on the stih415 SoC.
Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Maxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
This patch adds the required pin config for the sdhci controller
present in the stih415 SoC.
Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Maxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
This patch adds device tree config for both sdhci controllers
on the stih416 SoC.
Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Maxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
This adds the required pin config for both SDHCI controllers on
the stih416 SoC.
Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Maxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
This patch adds the reset controller DT nodes for the powerdown,
softreset and picophy controllers.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
The A80 Optimus board exposes uart4 on the GPIO expansion header.
Enable it so we can use it.
Also enable the internal pull-ups, as there doesn't seem to be
external pull-up resistors for pins on the expansion header.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
uart4 only has one possible pinmux setting on the A80 SoC.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The A80 Optimus board has 3 usable LEDs that are controlled via GPIO.
This patch adds support for 2 of them which are driver by GPIOs in the
main pin controller. The remaining one uses GPIO from the R_PIO
controller, which we don't support yet.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
i2c3 is exposed on the GPIO extension header. Enable it so we can use it.
Also enable internal pull-ups on the pins, as they don't seem to have
external pull-up resistors.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
i2c3 has only one possible pinmux setting on the A80 SoC.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The A80 has 5 i2c controllers in the main processor block.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The four port serial port on the zoom debug board uses a TL16CP754C
with a single interrupt and GPMC chip select. The serial ports each
use a 8 bytes for IO registers, and are 256 bytes apart on the GPMC
line.
Let's add timings for all four ports so we can remove the GPMC
workarounds for using bootloader timings.
Not caused by this patch, but looks like u-boot only properly
initializes the fifo on the first serial port. Currently the other
ports produce garbage at least with my version of u-boot. I suspect
that TL16CP754C needs non-standard initialization added to 8250
driver to properly fix this issue.
Cc: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Let's use the bootloader values except for the partially configured
wait-pin that does not seem to work.
Cc: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Enable the UART0 muxing, as set up by the bootloader.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
The A80 pinctrl driver is just as usual our pinctrl/gpio/external interrupt
controller.
Nothing really out of the extraordinary here...
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
The GPMC binding is obviously very confusing as the values
are all over the place. People seem to confuse the GPMC partition
size for the chip select, and the device IO size within the GPMC
partition easily.
The ranges entry contains the GPMC partition size. And the
reg entry contains the size of the IO registers of the
device connected to the GPMC.
Let's fix the issue according to the following table:
Device GPMC partition size Device IO size
connected in the ranges entry in the reg entry
NAND 0x01000000 (16MB) 4
16550 0x01000000 (16MB) 8
smc91x 0x01000000 (16MB) 0xf
smc911x 0x01000000 (16MB) 0xff
OneNAND 0x01000000 (16MB) 0x20000 (128KB)
16MB NOR 0x01000000 (16MB) 0x01000000 (16MB)
32MB NOR 0x02000000 (32MB) 0x02000000 (32MB)
64MB NOR 0x04000000 (64MB) 0x04000000 (64MB)
128MB NOR 0x08000000 (128MB) 0x08000000 (128MB)
256MB NOR 0x10000000 (256MB) 0x10000000 (256MB)
Let's also add comments to the fixed entries while at it.
Acked-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Koelsch is now restricted to booting from DT, so chosen/stdout-path is
always used, and we can drop the "console=" parameter from chosen/bootargs.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: devicetree@vger.kernel.org
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Koelsch is no longer supported in legacy builds.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
As of commit 423f6c2e97 ("mmc: sdhi: update sh_mobile_sdhi_of_data
for r8a7790"), the driver takes care of r8a7790 specific MMC options.
Hence they can be removed from the dtsi.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
[geert: Rebased, reworded, added reference]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
[simon: Rebased]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
As of commit 81bbbc7278 ("mmc: sdhi: update sh_mobile_sdhi_of_data
for r8a7779"), the driver takes care of r8a7779 specific MMC options.
Hence they can be removed from the dtsi.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
[geert: Rebased, reworded, added reference]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
As of commit b3a5d4ce65 ("mmc: sdhi: update sh_mobile_sdhi_of_data
for r8a7778), the driver takes care of r8a7778 specific MMC options.
Hence they can be removed from the dtsi.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
[geert: Rebased, reworded, added reference]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The SATA node used the generic compatible property only, which was
deprecated by commit e67adb4e66 ("sata_rcar: Add R-Car Gen2 SATA
PHY support"). Add the SoC-specific one introduced by that commit.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add references to the transmit and receive DMA channels in the MMCIF
node.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add references to the transmit and receive DMA channels in the two
MMCIF nodes.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Node names should describe the function of the device, not its IP core
name.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The TMU timers used the generic compatible property only.
Add the SoC-specific one, to make it future proof.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The CMT1 timer used the generic compatible property only.
Add the SoC-specific one, which is already documented, to make it future
proof.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Enable HS-USB device for the Henninger board, defining the GPIO that the driver
should check when probing (which is the ID output from MAX3355 OTG chip).
Note that there will be pinctrl-related error messages if both internal PCI
and HS-USB drivers are enabled but they should be just ignored.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
[Sergei: added pin function/group and prop, moved device node, fixed summary,
added changelog]
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Enable HS-USB device for the Koelsch board, defining the GPIO that the driver
should check when probing (which is the ID output from MAX3355 OTG chip).
Note that there will be pinctrl-related error messages if both internal PCI
and HS-USB drivers are enabled but they should be just ignored.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
[Sergei: added pin function/group and prop, moved device node, fixed summary,
added changelog]
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Define the R8A7791 generic part of the HS-USB device node. It is up to the board
file to enable the device.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
[Sergei: fixed summary, added changelog]
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Enable HS-USB device for the Lager board, defining the GPIO that the driver
should check when probing. Since this board doesn't have the OTG ID pin, we
assume that GP5_18 (USB0_PWEN) is an ID pin because it is 1 when the SW5 is
in position 2-3 (meaning USB function) and 0 in other positions.
Note that there will be pinctrl-related error messages if both internal PCI
and HS-USB drivers are enabled but they should be just ignored.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
[Sergei: added pin node and prop, moved device node, fixed summary, supplemented
changelog]
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Define the R8A7790 generic part of the HS-USB device node.
It is up to the board file to enable the device.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
[Sergei: fixed summary, added changelog]
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Since the PHY of USB3.0 and EHCI/OHCI ch2 are the same, the USB3.0
driver cannot use the phy driver when the EHCI/OHCI ch2 already used it:
phy phy-e6590100.usb-phy.3: phy init failed --> -16
xhci-hcd: probe of ee000000.usb failed with error -16
If so, we have to unbind the EHCI/OHCI ch2, and then we have to bind
the USB3.0 driver as the following:
echo 0000:02:02.0 > /sys/bus/pci/drivers/ehci-pci/unbind
echo 0000:02:01.0 > /sys/bus/pci/drivers/ohci-pci/unbind
echo ee000000.usb > /sys/bus/platform/drivers/xhci-hcd/bind
Note that there will be pinctrl-related error messages if both
internal PCI and USB3.0 are enabled but they should be just ignored:
sh-pfc e6060000.pfc: pin GP_5_22 already requested by ee0d0000.pci; cannot claim for ee000000.usb
sh-pfc e6060000.pfc: pin-182 (ee000000.usb) status -22
ata1: SATA link down (SStatus 0 SControl 300)
sh-pfc e6060000.pfc: could not request pin 182 (GP_5_22) from group usb2 on device sh-pfc
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Initialise TMU device using DT when booting bockw
using DT-reference.
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This describes all of the TMU hardware of the r8a7778.
Each node is disabled and may be enabled as necessary
by board DTS files.
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
ch0 will be used for clock events and for periodic clock events,
ch1 will be used as clock source.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The clocks property for the scifa2 device node referred to the scifa0
clock index instead of the scifa2 clock index.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
SCIF and SCIFA can be plexed onto the same wires on Lager board. The
datasheet also describes the wires as SCIFA. So, to make use of the
bigger FIFOs switch to SCIFA instead.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Describe the PCI USB devices that are behind the PCI bridges, adding necessary
links to the USB PHY device.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Describe the PCI USB devices that are behind the PCI bridges, adding necessary
links to the USB PHY device.
Based on the original work by Ben Dooks <ben.dooks@codethink.co.uk>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Enable USB PHY device for the Henninger board.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Enable USB PHY device for the Koelsch board.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Define the R8A7791 generic part of the USB PHY device node. It is up to the
board file to enable the device.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Enable USB PHY device for the Lager board.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Define the R8A7790 generic part of the USB PHY device node. It is up to the
board file to enable the device.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This clock drives the INTCA irqpin controller modules.
Before, it was assumed enabled by the bootloader or reset state.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: devicetree@vger.kernel.org
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Specify the DU output topology, enable the DU device and configure the
related pins.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Specify the DU output topology, enable the DU device and configure the
related pins.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Specify the DU output topology, enable the DU device and configure the
related pins.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Apparently some versions of nolo don't mux the all the necessary GPMC
pins for the smc91x probe to work properly. Let's fix this issue
by adding mux support for GPMC to the kernel.
Note that GPMC clk needs input enabled for OnenNAND to work.
Cc: Kevin Hilman <khilman@kernel.org>
Cc: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
With SDHCI for BG2, we can now enable the port and allow to access
Samsung M8G2FA 8GB eMMC on Sony NSZ-GS7.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
With SDHCI for BG2CD, we can now enable the port and allow to access
AzureWave WiFi/BT module on Google Chromecast.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Marvell Berlin BG2 has three, BG2CD just one pxav3 compatible
sdhci controllers, add them to the corresponding DT SoC
includes.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Marvell Berlin BG2 based Sony NSZ-GS7 has one ethernet controller
connected to rear RJ45 jack. Enable it by default.
Tested-by: Antoine Ténart <antoine.tenart@free-electrons.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Internal FastEthernet PHY on BG2Q is connected via MII, add a
corresponding phy-connection-type property to the Ethernet node.
Tested-by: Antoine Ténart <antoine.tenart@free-electrons.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Marvell BG2CD has two fast ethernet controllers with internal PHY,
add the corresponding nodes to SoC dtsi.
Tested-by: Antoine Ténart <antoine.tenart@free-electrons.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Marvell BG2 has two fast ethernet controllers with internal PHY,
add the corresponding nodes to SoC dtsi.
Tested-by: Antoine Ténart <antoine.tenart@free-electrons.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
With GPIO support for Marvell Berlin, now add the two gpio-connected
LEDs on Google Chromecast.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Enable timer 1 to be the source for the sched_clock, allowing to have a
more precise value than 1/HZ.
Signed-off-by: Antoine Ténart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
The chip controller node now also describes the Marvell Berlin reset
controller. Add the required 'reset-cells' property.
Signed-off-by: Antoine Ténart <antoine.tenart@free-electrons.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
The BG2Q has an AHCI SATA controller with an eSATA interface. Enable it.
Only enable the first port, the BG2Q DMP does not support the second one.
Signed-off-by: Antoine Ténart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
The BG2Q has an AHCI SATA controller. Add the corresponding nodes
(AHCI, PHY) into its device tree.
Signed-off-by: Antoine Ténart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
The i2c-nomadik driver handle these devices properly from a runtime PM
perspective. Therefore, let's add them into VAPE PM domain for ux500.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The spi-pl022 driver handle these devices properly from a runtime PM
perspective. Therefore, let's add them into VAPE PM domain for ux500.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The mmci driver handle these devices properly from a runtime PM
perspective, including register context save/restore. Therefore let's
add them into VAPE PM domain for ux500.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add a DT node for the ux500 PM domains. Follow the DT semantics of the
generic PM domain.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The current GPL only licensing on the DTSI makes it very impractical for other
software components licensed under another license.
In order to make it easier for them to reuse our device trees, relicense our
device trees under a GPL/X11 dual-license.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Carlo Caione <carlo@caione.org>
Acked-by: Emilio López <emilio@elopez.com.ar>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Olliver Schinagl <oliver@schinagl.nl>
Acked-by: Roman Byshko <rbyshko@gmail.com>
During the GPL to GPL/X11 licensing migration, the GPL notice introduced
mentionned the device trees as a library, which is not really accurate. It
began to spread by copy and paste. Fix all these library mentions to reflect
the file that it's actually just a file.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The current GPL only licensing on the DTSI makes it very impractical for other
software components licensed under another license.
In order to make it easier for them to reuse our device trees, relicense our
device trees under a GPL/X11 dual-license.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
The Mitsubishi AA104XD12 panel is commonly used with the Marzen, Lager
and Koelsch boards. Create a .dtsi file that describe the panel and its
connection to the board.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the DU device with a disabled state. Boards that want to enable the
DU need to specify the output topology
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the DU device with a disabled state. Boards that want to enable the
DU need to specify the output topology.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
[horms+renesas@verge.net.au: resolved minor conflict]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the DU device with a disabled state. Boards that want to enable the
DU need to specify the output topology
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
[horms+renesas@verge.net.au: resolved minor conflict]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
- Revert one patch which increases I2C bus frequency on imx28-evk
- Fix a typo on imx6q EIM clock name
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Merge tag 'imx-fixes-3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes
Merge "ARM: imx: fixes for 3.18" from Shawn Guo:
The i.MX fixes for 3.18:
- Revert one patch which increases I2C bus frequency on imx28-evk
- Fix a typo on imx6q EIM clock name
* tag 'imx-fixes-3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: dts: imx28-evk: Let i2c0 run at 100kHz
ARM: i.MX6: Fix "emi" clock name typo
Signed-off-by: Olof Johansson <olof@lixom.net>
Commit 78b81f4666 ("ARM: dts: imx28-evk: Run I2C0 at 400kHz") caused issues
when doing the following sequence in loop:
- Boot the kernel
- Perform audio playback
- Reboot the system via 'reboot' command
In many times the audio card cannot be probed, which causes playback to fail.
After restoring to the original i2c0 frequency of 100kHz there is no such
problem anymore.
This reverts commit 78b81f4666.
Cc: <stable@vger.kernel.org> # 3.16+
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Now that SPI DMA has been fixed on rk3288 we can enable it.
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
These patches fixes an SMP and SDMMC driver hang during boot up on the
SOCFPGA platform.
Patch "arm: socfpga: fix fetching cpu1start_addr for SMP" fixes the SMP
trampoline code in order for CPU1 to correctly fetch it's cpu1start_addr.
Patch "ARM: dts: socfpga: rename gpio nodes" renames that GPIO node in order
to allow a standard way of specifying status="okay" in the board DTS file.
Patch "ARM: dts: socfpga: Fix SD card detect" fixes a SDMMC driver hang
during boot. The reason for the hang was the deferred probe of the SDMMC
driver was waiting for the GPIO resource that would never come.
Patch "ARM: dts: socfpga: Add a 3.3V fixed regulator node" adds a fixed
regulator node for the SDMMC driver to use.
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Merge tag 'socfpga_fixes_for_3.18' of git://git.rocketboards.org/linux-socfpga-next into fixes
Merge "SOCFPGA fixes for 3.18" from Dinh Nguyen:
These patches fixes an SMP and SDMMC driver hang during boot up on the
SOCFPGA platform.
Patch "arm: socfpga: fix fetching cpu1start_addr for SMP" fixes the SMP
trampoline code in order for CPU1 to correctly fetch it's cpu1start_addr.
Patch "ARM: dts: socfpga: rename gpio nodes" renames that GPIO node in order
to allow a standard way of specifying status="okay" in the board DTS file.
Patch "ARM: dts: socfpga: Fix SD card detect" fixes a SDMMC driver hang
during boot. The reason for the hang was the deferred probe of the SDMMC
driver was waiting for the GPIO resource that would never come.
Patch "ARM: dts: socfpga: Add a 3.3V fixed regulator node" adds a fixed
regulator node for the SDMMC driver to use.
* tag 'socfpga_fixes_for_3.18' of git://git.rocketboards.org/linux-socfpga-next:
ARM: dts: socfpga: Add a 3.3V fixed regulator node
ARM: dts: socfpga: Fix SD card detect
ARM: dts: socfpga: rename gpio nodes
arm: socfpga: fix fetching cpu1start_addr for SMP
Signed-off-by: Olof Johansson <olof@lixom.net>
- one more MAINTAINERS entry for the SSC driver
- a fix for the newly introduced power/reset driver
- a fix on at91sam9263 USB due to PLLB misconfiguration
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Merge tag 'at91-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into fixes
Merge "at91: fixes for v3.18 #1" from Nicholas Ferre:
First AT91 fixes for 3.18:
- one more MAINTAINERS entry for the SSC driver
- a fix for the newly introduced power/reset driver
- a fix on at91sam9263 USB due to PLLB misconfiguration
* tag 'at91-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91:
ARM: at91/dt: sam9263: fix PLLB frequencies
power: reset: at91-reset: fix power down register
MAINTAINERS: add atmel ssc driver maintainer entry
Signed-off-by: Olof Johansson <olof@lixom.net>
This describes all of the CMT1 hardware of the r8a73a4.
The node is disabled and may be enabled as necessary by board DTS files.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a stdout-path property so that automatic console selection works
in the absence of a "console=" parameter on the kernel command line.
Note that we have to keep the "console=ttyS1,115200n81" parameter in
chosen/bootargs, else the console will use the default setting of 9600
baud.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a stdout-path property so that automatic console selection works
in the absence of a "console=" parameter on the kernel command line.
In addition, this will allow the PM domain code to find the PM domain
for the console device.
Note that we have to keep the "console=ttySC4" parameter in
chosen/bootargs, else we only get console messages on tty0.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a stdout-path property so that automatic console selection works
in the absence of a "console=" parameter on the kernel command line.
Note that we have to keep the "console=ttySC0,38400" parameter in
chosen/bootargs, else the console will use the default setting of 115200
baud.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a stdout-path property so that automatic console selection works
in the absence of a "console=" parameter on the kernel command line.
Note that we have to keep the "console=" parameter in chosen/bootargs,
as this DTS is shared between legacy and multi-platform.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a stdout-path property so that automatic console selection works
in the absence of a "console=" parameter on the kernel command line.
Note that we have to keep the "console=ttySC0,38400" parameter in
chosen/bootargs, else the console will use the default setting of 115200
baud.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a stdout-path property so that automatic console selection works
in the absence of a "console=" parameter on the kernel command line.
Note that we have to keep the "console=" parameter in chosen/bootargs,
as this DTS is shared between legacy and multi-platform.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a stdout-path property so that automatic console selection works
in the absence of a "console=" parameter on the kernel command line.
Note that we have to keep the "console=" parameter in chosen/bootargs,
as this DTS is shared between legacy and multi-platform.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a stdout-path property so that automatic console selection works
in the absence of a "console=" parameter on the kernel command line.
Remove the now-superfluous "console=" parameter from chosen/bootargs.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a stdout-path property so that automatic console selection works
in the absence of a "console=" parameter on the kernel command line.
In addition, this will allow the PM domain code to find the PM domain
for the console device.
Note that we have to keep the "console=ttySC1" parameter in
chosen/bootargs, else we only get console messages on tty0, and because
this DTS is shared between legacy and multi-platform.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a stdout-path property so that automatic console selection works
in the absence of a "console=" parameter on the kernel command line.
In addition, this will allow the PM domain code to find the PM domain
for the console device.
Remove the now-superfluous "console=" parameter from chosen/bootargs.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a stdout-path property so that automatic console selection works
in the absence of a "console=" parameter on the kernel command line.
Remove the now-superfluous "console=" parameter from chosen/bootargs.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
smu -> clocks
sti -> timer
uart -> serial
All but "clocks" are defined in ePAPR v1.1.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
[horms+renesas@verge.net.au: updated for removal of dma-multiplexer base
address]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
As there is no reg property the dma-multiplexer nodes should
not include @...
Reported-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
[horms+renesas@verge.net.au: update for addition of r8a7794-alt.dtb]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Without the 3.3V regulator node, the SDMMC driver will give these warnings:
dw_mmc ff704000.dwmmc0: No vmmc regulator found
dw_mmc ff704000.dwmmc0: No vqmmc regulator found
This patch adds the regulator node, and points the SD/MMC to the regulator.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Reviewed-by: Doug Anderson <dianders@chromium.org>
---
v3: Rename nodes to have schematic-name_regulator and remove "boot-on" and
"always-on"
v2: Move the regulator nodes to their respective board dts file and
correctly rename them to match the schematic
Without this patch, the booting the SOCFPGA platform would hang at the
SDMMC driver loading. The issue, debugged by Doug Anderson, turned out
to be that the GPIO bank used by the SD card-detect was not set to
status="okay".
Also update the cd-gpios to point to portb of the &gpio1 GPIO IP.
Suggested-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
---
v4: Use &gpio1 to set status="okay" and update cd-gpio=&portb
v3: Correctly degugged the issue to be a gpio node not having status="okay"
Since the Synopsys GPIO IP can support multiple ports of varying widths, it
would make more sense to have the GPIO node DTS entry as this:
gpio0: gpio@ff708000{
porta{
};
};
Also, this is documented in the snps-dwapb-gpio.txt.
Suggested-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
This adds the MMC/SD card reader (MMCI) block to the
RealView PB1176 DTS file. Add a special MCLK derived clock
and a fixed regulator to represent the 3.3V rail hardwired
to the MMC reader on the board.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds the Keyboard Mouse Interface (KMI) blocks to the
PB1176 DTS file, and defines the special KMI clock derived
from the 24 MHz chrystal.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add the PL022 SSP/SPI block to the PL1176 DTS file, also
define the separate SSPCLK clock derived from the 24MHz
chrystal.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The PB1176 has two PL031 RTC clocks, one in the devchip and one
in the FPGA. Add them to the device tree.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
